Bio-inspired cross-modal super-additive plasticity for seamless visual processing-in-sensory and -in-memory

Domain: physics
Published: 2025-12-04
Editorial outcome: major_revision

Abstract
Bio-inspired cross-modal visual perception hardware offers potential for edge intelligence. However, physical implementation of such hardware by conventional optoelectronics typically results in linear function combinations, lacking super-additive integration. Here, inspired by the primary cortex of the biological brain, we design a hardware platform based on molybdenum disulfide channel for processing-in-sensory and -in-memory. Cross-modal correlation photoelectric signals processing is demonstrated by utilizing electric field-assisted photogenerated carrier tunneling based on a floating gate photoelectric device array. The devices exhibit high synergistic paradigm super-additive behavior up to 103 times and significant time-dependent plasticity for visual encoding and perception enhancement. After sensory preprocessing, patterns are accurately routed and recognized by a non-volatile four-transistor ternary content-addressable memory circuit array. The cell maintains a large resistance ratio of 105 and high lookup durability of 1012. The hardware platform of cross-modal visual perception empowers seamless visual process-in-sensory and -in-memory, providing potential for ubiquitous visual edge intelligent systems.

Introduction
Recent studies have revealed that the primary sensory cortex can respond to stimuli outside its main sensory modality, challenging the longstanding notion that it exclusively processes one sensory mode1,2. Cross-modal multisensory information provides richer, more accurate responses, enabling organisms to achieve more efficient perception in shorter timeframes and at lower detection thresholds3. For instance, animals utilize visual and auditory correlation perception for more accurate environmental perception, motion navigation, and predator detection behavior4–6. Simultaneously, cross-modal correlation responses facilitate information re-encoding and integration, as confirmed by classic effects like the McGurk effect7, sound-induced flash illusion8, and rubber hand illusion9. Although neuroscience has extensively studied cross-modal associated perception, there are still challenges in mechanism development and physical implementation of related bio-inspired solid-state electronic hardware, with the super-additive nature of cross-modal perception for high-efficiency artificial intelligence.

Visual information occupies a significant proportion of Internet of Things applications. Traditional information processing techniques face challenges of data chain redundancy, high energy consumption, and low efficiency10,11. Significant efforts have been invested in simulating bionic visual morphological hardware, such as biomimetic visual information preprocessing techniques for reducing redundant data and improving the recognition efficiency of subsequent processing12–14, high-speed in-situ photoelectric neural network training and inference15, visual motion object detection16,17, and various electronic or optical synapses18–20. However, most of these studies focus on single-channel responses and the perception of light or electricity, lacking effective processing of cross-modal information. Some research has demonstrated hardware that can be stimulated by multiple modalities of information21–23, such as visual (optical signals) and tactile, auditory, etc. (usually coupled as electrical signals). For example, nanowire transistors that respond to light and stretching, triboelectric sensors that respond to light and tactile stimuli24, and perovskite artificial synapses that respond to light and electricity25. However, these studies involve only linear combinations of stimuli and do not demonstrate the natural super-additive advantage of bionic cross-channel plasticity. Recent research simulated multisensory integration of optical and tactile perception using digital spiking events from triboelectric sensors and phototransistors26, but information encoding and functional reconstruction still need further development to inspire efficient machine vision encoding and seamlessly integrated sensing-computation platforms.

In this work, we fabricate a floating-gate photoelectric device array based on a chemical vapor deposition (CVD) monolayer of molybdenum disulfide (MoS2) and gold as the channel and floating-gate components. By regulating the tunneling efficiency of electric-field-assisted photogenerated carriers, we simulate the cross-modal correlation plasticity observed in the primary cortex of the biological brain. The photoelectric sensor devices showcased over 1000 times synergistic paradigm super-additive behavior and significant time-dependent plasticity, which is then used for energy-efficient and secure image coding. Preprocessed visual images can be further routed and searched using the MoS2 floating-gate-transistors (FGTs) based non-volatile four-transistor ternary content-addressable memory (4T-TCAM) cells array, which exhibits a resistance ratio of up to 105 between matching and mismatching states and a lookup durability of up to 1012. The hardware platform of cross-modal visual perception empowers seamless visual process-in-sensory and -in-memory, inspiring the development of low-power edge computing platforms for artificial intelligence.

Results
Cross-modal correlation perception and design
Various sensory stimuli provide distinct dimensions of information27. When faced with different sensory elements, the brain’s perception cortex not only simply adds them together but also carries out cross-sensory correlation and integration to form a unified experience27,28. The well-known McGurk effect experiment exemplifies this phenomenon (Fig. 1a). When the visual presentation of the Ba mouth shape coincides with the auditory transmission of the Ga sound, the subjects will think they hear a third sound, Da, due to the correlation of visual and auditory information7. Similarly, maintaining the auditory Ba sound while displaying different mouth shape visual information leads subjects to perceive different sounds. For instance, if subjects see the Ba mouth shape while hearing the sound, they think they hear Ba, and if they see the Fa mouth shape, they think they hear Fa. This accomplishes the visual signal encoding of the perceived auditory signal to some extent29.

With the development of biological understanding, these cross-sensory couplings can occur in the primary sensory cortex without the involvement of higher brain regions30,31. Research indicates that corresponding cross-modal perception exhibits evident spatiotemporal coupling characteristics, where two signals can produce responses that exceed the sum of their individual responses, achieving super-additive new features beyond threshold26,32. This behavior also demonstrates a time synchronization effect33, where multiple stimulus information is difficult to show associated responses when it exceeds a certain time range (typically tens to hundreds of milliseconds8,34), as depicted in Fig. 1b. The use of solid-state electronic device arrays to simulate cross-modal correlation response features such as the McGurk effect to achieve efficient information integration and coding (as shown in Fig. 1c) is expected to reduce the overall power consumption overhead. The mechanism of electric-field-assisted photogenerated carrier tunneling through the barrier can emulate this bionic behavior at the mechanism level of solid-state electronic devices, as illustrated in Fig. 1d. In the barrier tunneling model, photo-induced non-equilibrium carriers in semiconductors can only undergo inefficient tunneling in the absence of an applied electric field due to the large and wide energy barrier. The carrier energy can be estimated from the difference between the photon energy (hv) and the excitation barrier (barrier 1 in Fig. 1d) in the semiconductor bandgap when there is also a large barrier (barrier 2 in Fig. 1d) to block carrier tunneling. In this model, energy barrier 1 and barrier 2 together determine the tunneling possibility. Correspondingly, in the absence of light but with an applied electric field, the Fermi level is too low to undergo high-probability tunneling. However, when light and an electric field occur simultaneously, photo-induced carriers with enough energy can tunnel through the electric-field-induced triangular barrier by Fowler-Nordheim (FN) tunneling, significantly increasing the tunneling efficiency. The number of tunneling carriers also positively correlates with the time overlap between the electric field and illumination in this process, demonstrating strong coupling characteristics of time correlation.

To achieve an efficient photogenerated carrier system, this work utilizes CVD-grown monolayer transition metal dichalcogenides, molybdenum disulfide, as the device channel to construct a floating-gate transistor. Monolayer molybdenum disulfide exhibits robust light-matter interaction and a direct bandgap energy band structure, showcasing exceptional performance in optoelectronic devices35,36. Additionally, its ultra-thin body structure, low-temperature fabrication processing characteristics, and manufacturing scalability confer unique advantages in semiconductor devices and are widely studied in logic, memory, and sensing applications37–43.

Device structure and basic characteristics
We approach the seamless sensing-memory-processing scheme by exploiting monolayer MoS2 floating-gate transistors as the core components. Figure 2a shows the device’s layout design. To achieve monolithic integration for processing-in-sensor and computing-in-memory basic components, local gate electrodes are predefined on the substrate of a silicon wafer covered by an insulating oxide layer, and then 25 nm hafnium oxide is deposited on the gate electrodes as a blocking oxide layer. The 2 nm patterned gold is then deposited on the gate region to form the floating gate. 9 nm hafnium oxide is then deposited on the wafer to serve as the tunnel oxide. The CVD-grown monolayer MoS2 single crystals with suitable density are used and transferred onto the substrate as the active channel layer (Supplementary Fig. 1 for details of the material characterization). The channel region is defined by etching. The channel under the floating gate is used to implement memory devices, while the channel located beneath the gate electrode without a floating gate is used to implement transistors. Finally, source/drain electrodes and interconnections are patterned. The schematic of the device fabrication process flow is shown in Supplementary Fig. 2. Figure 2b shows an enlarged MoS2 FGT units array picture for processing-in-sensor, Fig. 2c shows a 4T-TCAM unit consisting of two MoS2 transistors and two MoS2 FGTs for computing-in-memory, and Fig. 2d, e show enlarged microscope images of the channel region of the MoS2 FGT and MoS2 transistors, respectively. The electrical properties of the single basic components of MoS2 FGTs (the schematic diagram is shown in Fig. 2f) are investigated first. The MoS2 FGTs show transfer characteristic curves with hysteresis and non-volatile storage characteristics that can be programmed by Vg pulses due to charges stored in the floating-gate layer, which results are presented in Supplementary Fig. 3 and Supplementary Fig. 4. The memory behavior of MoS2 FGTs is further demonstrated as shown in Supplementary Fig. 5. The basic principle behind the memory behavior of MoS2 FGTs is described in the Supplementary Note 2. The statistical electrical variability of separate MoS2 FGTs with a median program/erase current ratio of about 106 provides a solid foundation for subsequent memory applications as shown in Fig. 2g. As a memory-based neural component, the continuous potentiation and depression of conductance can also be simulated through continuous voltage stimulation, and the relevant results are shown in the Supplementary Fig. 6. Moreover, a demonstration of the interconnection of the 4 × 4 cells is also presented in the Supplementary Fig. 7.

Moreover, as a processing-in-sensor unit, MoS2 FGTs also show the optical response characteristics under different light-emitting diode (LED) light sources with wavelengths of 470 nm, 530 nm, and 625 nm, demonstrating the potential of broadband detection. The photo-response characteristics of the device are shown in Fig. 2h, and more results of photodetectors are shown in the Supplementary Fig. 8. The photodetector maximum responsivity and detectivity of a 470-nm-wavelength LED are 1.7×104 AW−1 and 1.36×1011 Jones, respectively. The leakage current can be neglected during device operation due to a thick blocking oxide layer of the MoS2 FGT device, as shown in Supplementary Fig. 9. Based on MoS2 FGTs, another basic circuit unit, the ternary content-addressable memory (the schematic diagram is shown in Fig. 2i), is also studied. As the special hardware performs in-memory searching and matching, the definition of storage states and operations rules for pattern matching, as well as the non-volatility of the 4T-TCAM cell, is described in Supplementary Fig. 10 and Supplementary Note 1. The sequence of search signals is shown in Fig. 2j with a period of 2 s, and the bias voltage (Vbias) is always 1 V. It can be seen that the matched output current is about 10−10 amperes and the mismatched output is about 10−5 amperes when the stored state is bit 1 or 0. The high resistance ratio (Rratio = Rmismatch/Rmatch) of up to 105 between match or mismatch improves the sensing margin in a data-intensive application, which can be compared to the best results based on NV-TCAM44–46. As a read-dominant device, the read endurance of the 4T-TCAM is also investigated and presented in Fig. 2k with stable reading cycles up to 1012 (Supplementary Fig. 11 for more details). Moreover, the programming and erasing endurance of the stored bits in the TCAM is also performed and presented in Supplementary Fig. 12.

Super-additive electro-optic devices
The monolayer MoS2 FGTs exhibited excellent photo-response under illumination by a blue light-emitting diode (470 nm) light source, thanks to the direct bandgap of monolayer MoS2 (Supplementary Fig. 13). Different from the conventional image sensors unit whose response is not dependent on irradiation time12, the MoS2 FGTs image sensors manifest a light-dosage-dependent output with illumination and exhibit synaptic plasticity features as shown in Supplementary Figs. 13 and 14. Interestingly, the synchronous gate voltage pulse with the light stimulations applied to the devices enhances the photo-response, realizing the in-situ image preprocessing without additional hardware cost. Figure 3a shows the real-time monitored output current comparison by different signal stimulation of 30 times with a period of 1 s and a duration of 10 milliseconds. The timing diagram of LED light pulse with a power intensity of 16.7 mW cm−2 and the gate voltage pulse with an amplitude of −2 V are shown in Fig. 3b. The output photocurrent by the synergistic stimulus with light and voltage is much larger than the output current of the optical signal or electric signal applying on the device separately, indicating that the super-additive effect exists in MoS2 FGTs due to the process of charge injection into floating gate was enhanced by the electric field. The super-additive current ratio (CR) = Ielectro-optic / (Ielectric + Ioptic) is extracted over 100 in Fig. 3a, which enables efficient visual perception. Visualized graphics sensing results of the letter P with a power intensity of 16.7 mW cm−2 based on the 4 × 4 MoS2 FGTs array are carried out to demonstrate the advantages of super-additive optoelectronic sensing. The bright and dark pixels can be gradually distinguished as the number of light pulses increases. When the letter P is stimulated with a simultaneous gate voltage pulse at all pixels, significantly enhanced current in bright pixels and slightly enhanced current in dark pixels result in the signal-to-noise margin ratio improvement of the visual information compared with only light stimulation, even better than the effect of light stimulation of 150 times as illustrated in Fig. 3a. As a result, the realization of similar quality image sensing can greatly reduce the delay and energy consumption. Figure 3c shows the comparison of illumination/dark current, energy consumption per pixel, and the latency of the devices for 150 optical pulses and one optical-electrical cooperative pulse. The statistical illumination-current (Iph) and dark current (Idark) of sensor pixels extracted from 20 MoS2 FGTs suggest that the signal-to-noise margin ratio improves by over 6 times by the optical-electrical cooperative stimulation. The energy consumption extracted from 20 MoS2 FGTs devices by E = Ipeak × Vbias × T, where Ipeak is the transient peak output current for each pulse, Vbias is 50 mV, and T is the duration time of stimulation (10 ms). The low energy consumption of the optical-electrical cooperative stimulation is about 0.23 nJ, which is about one-tenth of that of the optical stimulation. Moreover, the latency can be dramatically reduced 150 times for the optical-electrical co-stimulated device. The super-additive electro-optic response of MoS2 FGTs is also realized under incident LEDs of different wavelengths, as shown in Supplementary Fig. 15. We further extract the super-additive CR with respect to the power intensity, pulse width, amplitude of Vg pulse, and base voltage of Vg for stimulation 1, 15, and 30 times, as shown in Supplementary Fig. 16. The continuous tunable CR of up to >1000 of the MoS2 FGTs enables parallel complex sensing and preprocessing by coupled optical signals and electrical signals.

Cross-modal plasticity and mechanisms
To explore the spatiotemporal dynamics of the MoS2 FTGs device, optical-electrical signals with a relative timing Δt were implemented, and the transient response is presented in Fig. 4a. The optical pulse signals with a power intensity of 16.7 mW cm−2 and electrical pulse signals (Vg_pulse = −2 V, Vg_base = 0 V) have the same period of 1 s and duration of 10 ms. Δt > 0 means that the optical pulse arrives before the electrical pulse. The optical-electrical signal stimulation with a relative arriving timing Δt decreased the total time of electric-field-assisted charge injection and thus led to an attenuated effect for photocurrent enhancement. The energy band diagram is plotted in Fig. 4b–d to get a deep insight into the dynamics capture of photogenerated carriers. Figure 4b shows the energy band diagram under LED illumination only. At zero bias thermal equilibrium, the Fermi levels EF of the system are consistent. Under illumination with a photon energy of 2.6 eV, photogenerated carriers can be excited to the conduction band (electrons) and valence band (holes). Temporarily augmented carrier density is expressed by quasi-Fermi levels EnF and EpF for electrons and holes, respectively. The EpF for minority carriers in the n-type semiconductor of MoS2 will deviate more from the initial Fermi level47. As a result, some photogenerated holes tend to be injected into the floating gate, although the tunneling efficiency is low at this condition due to the sufficient barrier height, as we have discussed in Fig. 1d, while some are trapped in the interface states48, resulting in the shifted negative of the channel threshold voltage. Meanwhile, the photogenerated electrons excited into the conduction band increase the conductance of the channel. Taken together, the device exhibits enhanced current under illumination and the residual non-volatility from the carriers injected into the floating gate. Under continuous light exposure or repeated light pulses, photogenerated carriers are continuously excited within the band gap. This process can persist until the charge in the floating gate reaches saturation. Figure 4c shows the energy band diagram under negative Vbias only. Although the barrier of the tunneling oxide decreases under the bias voltage at this time, it still shows a very low tunneling efficiency due to the relatively high barrier, due to the lack of excited high-energy photogenerated carriers in the channel. But when light and electric field occur simultaneously, the light-excited high-energy carriers can tunnel through the electric-field-induced triangular barrier by FN tunneling, greatly increasing the tunneling efficiency as shown in Fig. 4d. Since the duration of the electric-field-assisted photogenerated carrier tunneling process determines the amount of charge injected into the floating gate, and the channel current depends on channel threshold voltage shift, the photoelectric coordination time shows a strong correlation with the final output current. To fully elucidate the relative timing dependence, the excitation current with various Δt for different stimulation times is extracted to demonstrate the spatiotemporal evolutionary trend. The current changes by nearly two orders of magnitude within the |Δt| of 10 ms, and barely changes beyond 10 ms as shown in Fig. 4e. This trend does not change with the number of stimuli from 1 to 30, only increases the overall current level. This behavior also simulates the time dependence of biological cross-modal correlation response on a similar timescale. Furthermore, similar to the time-dependent plasticity of super-additive electro-optic response for negative voltage, the synergistic depression effect of the positive voltage also exhibits a similar time dependence, resulting in an overall depression trend presented in Supplementary Fig. 17. This process can also be explained using the electric-field-assisted photogenerated carrier tunneling model. Since the opposite electric field assists electrons in tunneling into the floating gate, an overall inhibitory trend is formed. By using cross-modal time-dependence plasticity and light intensity tunability as we have discussed from the experimental results of individual devices, a bionic pattern decoding application for the obfuscation of visual information can be achieved in the integrated sensor array (Fig. 4f). In order to improve the transmission efficiency and security of visual information, the obfuscation of visual information can be used for transmission and then decoding in the sensor array terminal with a corresponding key. The decoding key is known a priori from the message sender, and it is composed of Vg pulses with different Δt for each pixel. The decoded visual information can then be obtained from pre-blurred information and the corresponding key by the MoS2 FGTs sensor array. The numerical simulations for the proposed pattern decoding process prove the consistency between the decoded information and the original information. This approach also allows for the retrieval of different visual information using various keys from the same input pattern, thereby enhancing the efficiency of graphics transmission to different terminal devices.

One-shot visual signal processing
In traditional vision processing architectures, cameras capture visual scenes frame by frame, converting optical signals into analog electrical signals in real-time, which are then converted to digital signals and stored and processed in the information chain10 (Fig. 5a). Due to the different semiconductor manufacturing processes of the individual hardware, the hardware of the sensor, memory, and processing units is physically separated, which lead to drawbacks in terms of speed and energy consumption11. The superfluous data in the sensor add an exponential burden to the subsequent information processing15, and the memory wall between the memory and processing units11 leads to high energy consumption and high latency in computation. To overcome the drawbacks of the traditional visual processing scheme mentioned above, a processing-in-sensor array was used to reduce redundant data and perform vision information decoding by bio-inspired cross-modal correlation, while processing-in-memory units were used for subsequent one-shot processing to break the memory wall between conventional memory and processing units. Figure 5b shows the operational concept of the seamless sensing-storage-processing scheme in this work. Input visual signals stimulate the sensor pixels with a gate voltage pulse simultaneously. After preprocessing by the MoS2 FGTs array, the visual information is converted into non-volatile electrical signals. Each pixel of information is then used as input to each TCAM cell, and the entire TCAM cell outputs whether it matches its pre-stored information. The NV-TCAM array shows notably improved advantages in energy saving and speed for the exact match lookup task. We then performed an image recognition simulation with circuit-level analysis using the experimental data. More simulation details and results are presented in the Supplementary Fig. 18, Supplementary Table 1 and Supplementary Note 3. By using the statistics of the resistance distribution of MoS2 transistors and MoS2 FGTs, a 16 × 4 TCAM array circuit with 16 inputs and 4 outputs was constructed by SPICE as illustrated in Fig. 5c. Each TCAM cell pre-stores digital bit information at two MoS2 FGTs, and two gates of transistors connect to input signal lines (search lines). Each output line connects 16 TCAM cells with pre-stored letters P, K, U, or N marks with color blocks. Once the visual information is sensed and preprocessed by the sensor array, the preprocessed images are transformed into input signals for TCAM cells by the sense amplifiers. Then the TCAM circuits return the matching lookup results as shown in Fig. 5d. When the preprocessed letter images are input to the TCAM circuits, the line output that exactly matches the stored letter is high resistance, otherwise low resistance. The simulation result shows a high resistance ratio of over 104 for 16-pixel images between all-match and 1-bit-mismatch states, and remains of 103 for 64-pixel images. TCAM cell-based image recognition circuits also allow for imprecise image matching by storing bit X to highlight critical information, as shown in Supplementary Fig. 19. Furthermore, efficient information transmission and a multi-terminal secure publishing process are also demonstrated by taking advantage of the cross-optical-electrical correlation response of the MoS2 FGTs sensor and the TCAM circuits, as presented in Fig. 5e. The input visual pattern is obfuscated and then received by various terminals with different keys. The terminals without the right key return fuzzy results, while the terminal receiver with special right keys (key 1 and key 2 in Fig. 5e) gets special results.

In conclusion, we demonstrate bio-inspired cross-modal hardware with super-additive plasticity for a seamless sensing-memory-processing scheme. By regulating the tunneling efficiency of electric-field-assisted photogenerated carriers in the MoS2 FGTs, we simulated the cross-modal correlation plasticity observed in the primary cortex of the biological brain. The bionic-inspired MoS2 FGTs show more than 1000 times synergistic paradigm superposition behavior and significant time-dependent plasticity, and can be further used for energy-saving and efficient image perception and image security coding. The preprocessed visual images can be routed and searched using a non-volatile 4T-TCAM unit array composed of MoS2 FGTs, with a resistance ratio of up to 105 between the matching and mismatching states of a single cell and a lookup durability of up to 1012, providing rich sense margin and reliability for high-resolution perception mode one-shot processing. The hardware platform of cross-modal visual perception empowers seamless visual perception and a processing-in-memory platform, providing tremendous potential for ubiquitous visual low-power edge intelligent hardware.

Methods
Synthesis of molybdenum disulfide
The monolayer MoS2 film is synthesized on molten soda-lime-silica glass substrates by a two-zone CVD system. The powdered sulfur precursor is located in Zone I at 230 °C with a constant argon flow. The MoO3 precursor is evaporated at 800 °C in Zone II, where the molten glass substrate is placed downstream. The growing duration is kept at 10 min and then cooled down naturally. Monolayer MoS2 with an appropriate nucleation density can be obtained.

Device fabrication
The schematic of the device fabrication process flow is shown in Supplementary Fig. 2. During the device fabrication process, all lithography is performed by electron-beam lithography, and metal deposition is performed by an electron-beam evaporation system. The local gate electrodes (20/40 nm Ni/Au) are predefined on the substrate, and then 25 nm hafnium oxide is deposited by ALD as a blocking oxide layer at 200 °C. A 2-nm thick gold layer is deposited on the gate region to form the floating gate. Another 9 nm hafnium oxide is then deposited as tunnel oxide. The CVD-growth monolayer MoS2 film is transferred onto the substrate as the active channel layer. After the MoS2 transfer is completed, photo-resist is used as a mask, and the etching region is defined via electron-beam exposure. The exposed resist is removed after development, while the resist in the channel region is retained. The channel region is defined by Ar/O2 plasma etching. Finally, source/drain electrodes and interconnections are patterned using 20/60 nm Ni/Au. The temperature of the whole process does not exceed 200 °C. Supplementary Fig. 20 shows the layout images of the early batch of devices, which included some redundant pad designs.

Electrical measurements
The electrical measurements are carried out in a Lakeshore CPX-VF probe station under 10−5 Torr at room temperature. An Agilent semiconductor parameter analyzer B1500A is used to perform measurements. The device is irradiated through a fiber-coupled LED light source with models of Thorlabs M470F3 (λ = 470 nm), M530F2 (λ = 530 nm), and M625F2 (λ = 625 nm) with a T-Cube series LED driver (LEDD1B). The light pulse can be modulated by an external voltage pulse with a delay of <100 μs. The timing of synchronous electrical-optical pulses applied to devices can be obtained by the two channels of the Agilent B1525A SPGU module. Millisecond-scale optical/electrical pulses are used to better simulate the timescale of biomimetic behaviors, while also being limited by the LED equipment speed.

Simulation
The blurred picture decoding results are simulated based on the experimental results of the single device. The cross-modal time-dependent plasticity and light intensity tunability used in the simulation are extracted from the experimental results of individual devices, rather than a fully driven interconnected array. The resistance ratio of the TCAM array is simulated by SPICE, including the resistance variation of MoS2 FGTs measured from the experimental data. See Supplementary Note 3 for more simulation details.

Data availability
All data needed to evaluate the conclusions in the paper are present in the paper and/or the Supplementary Information. The data that support the plots within this paper and other findings of this study are available from the corresponding author upon request. The data generated in this paper are provided in the Source Data file. Source data are provided with this paper.

Peer review rounds
[{"round": 1, "reviewer_comments": {"reviewer_1": "The authors present a study on bio-inspired multimodal in memory and in visual sensory. Following are my\nqueries regarding the work.\n1. When it comes to heterosynaptic plasticity, the connection of neurons and each neuron to how it potentiates and\ndepresses the information is crucial. That aspect is not tackled and it is highly suggested to incorporate that.2. How about\ngiving +ve gate pulses? Will it allow for depression or forgetting the information?3. What about the leakage current problem?\nHave the authors quantified it?4How did the authors decide the light pulse width? Time resolved PL is required to\nunderstand the lifetime of carriers and also the memory aspect. 5. What about the light perception at different wavelengths?\nEven though the work highlights bio-inspired, the work does not tackle the issue of broadband detection? Authors should\ncomment on this.6. Wouldn't a search match need extra circuitry and extra power which again goes back to the same\nconcept as taking the inputs from memory? 7. Basic IV characteristics (at Vg = 0V) demonstrating memory behavior should\nbe added.8. What property of MoS2 makes it perform like in memory behavior? The visual aspect is due to the absorption\nbut the memory aspect is due to what? Authors need to clearly mention the physics behind the memory aspect. 9. What is\nthe linearity factor of the device in terms of memory? 10. A demonstration of the interconnection of the cells should be\nprovided.", "reviewer_2": "The manuscript by Xiong Xiong et al. introduces a bio-inspired hardware platform using MoS2 for cross-modal visual\nperception, enabling super-additive photoelectric signal processing and enhanced visual sensitivity. It also features a non-\nvolatile 4T-TCAM circuit for precise image routing with high durability, offering potential for edge AI applications. Before\nconsidering acceptance, the authors need to address the following comments during the minor revisions:\n1.The array presented in this paper is very interesting. However, Figure 1a and b, which are intended to explain cross-modal\nsuper-additive plasticity, seem to be unrelated to this array.\n2.Figure 2a-c is inadequate in explaining this array. There are parts that do not fit well. And the absence of an enlarged\npicture may make it difficult for readers to understand.\n3.Why is there a persistent photoconductivity effect in this FGM device?\n4.What is the speed when it is a FGM without a gate voltage?\n5.Are there any characteristics for light sources other than blue LED? Show the behavior for various light sources.\n6.Provide figure of merits of the FGM, such as D*, Rph, etc.\n7.The cross-talk between neighboring FGM should be analyzed. A comprehensive study of photocurrent mapping using\nscanning photocurrent microscopy could provide valuable insights.\n8.Looking at Figure 2a, although it is monolithic, the arrays on the left are not connected to each other. That is, they are not\nactually driven. Readers may misunderstand. I hope you write the simulation part in more depth. And you need to mention\nthat they are not actually driven. (That is, each characteristic was extracted and simulated.)", "reviewer_3": "This paper is an interesting study that demonstrates the implementation of a device using a monolayer molybdenum sulfide (MoS2) channel with a floating gate, and further explores its potential applications in processing-in-sensory and compute-in-\nmemory. To improve the accuracy and reliability of this study, the following points should be addressed.\n1. It is necessary to present the memory characteristics of the MoS2 floating gate transistor (such as speed according to\nprogram and erase voltages, Vth shifts, sensing margin, retention, and endurance).\n2. The hysteresis characteristics shown in Figure S2a appear to be related to the presence or absence of trapped charges in\nthe storage layer. It is necessary to present the programming pulse conditions for each curve. Additionally, to demonstrate\nthe hysteresis-free characteristics of the MoS2 channel or other factors in the MoS2 floating gate transistor, presenting the\ntransfer curves in double sweep mode is also necessary.\n3. The authors presented retention and reading endurance for the 4T-TCAM cell in Figure S4, but the cyclic endurance of\nP/R/E/R (Program/Read/Erase/Read) should also be included.\n4. The authors presented characteristics of visual security through TCAM array simulation. To increase reliability, additional\nexplanation about the SPICE simulation and presentation of calibration data with actual devices are necessary."}, "author_response": "Point-by-point response to reviewers’ comments for Manuscript\nNCOMMS-24-78678-T\nREVIEWER COMMENTS\nReviewer #1 (Remarks to the Author):\nThe authors present a study on bio-inspired multimodal in memory and in visual sensory.\nFollowing are my queries regarding the work.\n1. When it comes to heterosynaptic plasticity, the connection of neurons and each\nneuron to how it potentiates and depresses the information is crucial. That aspect is not\ntackled and it is highly suggested to incorporate that.\nResponse: We thank the reviewer for pointing this out. As mentioned by the reviewer,\nthe potentiation and depression of information are crucial for neuronal connections,\nwhich was not emphasized in the previous version of this paper. For the MoS FGT\n2\ndevice in this study, the number of floating-gate charges leads to a change in the channel\nconductance, which can be used to simulate the potentiation and depression behaviors\nof neuronal connections. The results shown in Figure R1 demonstrate that continuous\nstimulation with a voltage pulse induces a continuously adjustable enhancement and\nsuppression effect for channel conductance of device. Regarding the response to optical\nstimulation, the device in this work exhibits positive photoconductivity, showing only\ninformation potentiation (depression can be achieved via positive voltage stimulation).\nFollowing the reviewer’s suggestion, we have incorporated these results into the\nSupplementary Figure S4 of the revised version and added the following discussion in\nthe main text: “As a memory-based neural component, the continuous potentiation and\ndepression of conductance can also be simulated by continuous voltage stimulation,\nand the relevant results are shown in the Supplementary Figure S4”\n1.2\n0.8\n0.4\n0.0\n0 25 50\nFigure R1. Continuous increase (a) and decrease (b) of the MoS FGT channel\n2\nconductance under continuous gate pulse voltage stimulation, where a negative voltage\ninduces an increase in conductance, and a positive voltage induces a decrease in\nconductance.\n2. How about giving +ve gate pulses? Will it allow for depression or forgetting the\ninformation?\nResponse: We thank the reviewer for pointing this out. In fact, the depression or\nforgetting the information exhibited by the positive gate voltage pulse can be achieved\nby modifying the charge in floating gate layer, which is evident in devices based on the\nfloating-gate operation. As shown in Figure R1b, with the continuous application of\npositive voltage pulses, the device conductance gradually decreases. When working in\nconjunction with optical pulses, we have already discussed in the manuscript the\ngradual increase in current exhibited by the device under optical pulse stimulation alone.\nWhen a positive gate voltage pulse (2 V, 10 ms) is applied simultaneously with the\n)Sμ(\nG\n1.2\nV = 0 V，V = 50 mV g d\nPulse V = -4.5 V, 10 ms g\n0.8\n0.4\n0.0\n0 25 50\nPulse number\n)Sμ(\nG\na b\nV = 0 V，V = 50 mV g d\nPulse V = 4 V, 1 ms g\nPulse number\noptical pulse, as shown in Figure R2, the device exhibits information depression,\ncounteracting the trend of photo-induced conductance increase. Furthermore, similar to\nthe time-dependent plasticity of synergistic enhancement discussed in the main text\n(Figure 4e), the depression effect of the positive voltage also exhibits a similar time\ndependence, resulting in an overall depression trend.\nFollowing the reviewer’s comments, we have included these results in the\nSupplementary Figure S14 of the revised version and added the following discussion\nin the main text: “Furthermore, similar to the time-dependent plasticity of super-\nadditive electro-optic response for negative voltage, the synergistic depression effect of\nthe positive voltage also exhibits a similar time dependence, resulting in an overall\ndepression trend presented in Supplementary Figure S14. This process can also be\nexplained using the electric-field-assisted photogenerated carrier tunneling model.\nSince the opposite electric field assists electrons in tunneling into the floating gate, an\noverall inhibitory trend is formed”.\nFigure R2. (a) Device current response under optical pulse stimulation and\nsimultaneous optical and positive voltage pulse stimulation. (b) Time dependence of\nthe photonic stimulation response, where I represents the current decrease under\nd\nsynergistic stimulation compared to the current with optical stimulation alone (at T =\n30 s).\n3. What about the leakage current problem? Have the authors quantified it?\nResponse: We thank the reviewer for pointing this out. We characterized the leakage\ncurrent of the device, as shown in Figure R3. Under bidirectional scanning within\ndifferent gate voltage ranges (Figure R3a-b), the leakage current of the device remains\nbelow 100 pA, almost identical to the off-state current level. Additionally, the leakage\ncurrent of the device under optical illumination does not exhibit significant changes\n(Figure R3c). Therefore, in this work, the leakage current issue can be neglected during\ndevice operation. This is primarily due to the use of a thicker blocking oxide layer of\nMoS FGT device, which effectively suppresses gate leakage current.\nSupplementary Figure S7 of the revised version and added the following discussion in\nthe main text: “The leakage current can be neglected during device operation due to the\nuse of a thicker blocking oxide layer of MoS FGT device, as shown in Supplementary\n10−4\n10−6\n10−8\n10−10\n10−12\n10−14\n−6 −3 0 3 6\nFigure R3. Bidirectional swept transfer characteristic curves and gate leakage current\n)A(\nI&\nI\ng\nd\n10−4\nI I\ng d\n10−6\n10−8\n10−10\n10−12\n10−14\n−10 −5 0 5 10\nV (V)\ng\n)A(\nI&\nI\ng\nd\n10−4\nI I\ng d\n10−6\n10−8\n10−10\n10−12\n10−14\n−6 −3 0 3 6\nV (V)\ng\n)A(\nI&\nI\ng\nd\na b c\nDark, Ig\nDark, Id\nLED, Ig\nLED, Id\nV (V)\ng\nof the MoS FGT device under V ranges of (a) ±6V and (b) ±10V, respectively. (c)\n2 g\nComparison of drain current and leakage current under dark and optical illumination\nconditions.\n4.How did the authors decide the light pulse width? Time resolved PL is required to\nunderstand the lifetime of carriers and also the memory aspect.\nResponse: We thank the reviewer for pointing this out. The device designed in this work\nis inspired by cross-modal correlation perception, which simulate the synergistic\ninteractions between multiple channel signals to achieve mutual encoding of\ninformation. Taking the biological multisensory perception as an example, the\nperception time scale for a single signal, or the time scale of multimodal perception\ncoupling, is on the order of tens of milliseconds (Nature, 2000, 408, 788-788) [1]. This\nwork emphasizes the design and mechanisms of electronic devices based on\nbiomimetics. To simulate biological behaviors and achieve sufficiently strong detection\nsignals, a pulse width on the millisecond scale was chosen. This pulse width selection\nalso ensures the reliability of the timing when studying time-dependent plasticity, as the\nswitching speed of our optical pulse equipment is approximately 80 µs (according to\nthe product manual) [2], and we selected a millisecond pulse width to guarantee timing\nreliability.\nTo better understand the photogenerated carrier dynamics at the material and device\nlevels, we also, following the reviewer’s suggestion, characterized the time-resolved\nphotoluminescence spectra, as shown in Figure R4. The MoS films with a floating gate\n2\nstructure were characterized at room temperature without any gate voltage bias. The\ndynamic decay spectra were fitted using a triple exponential decay function, revealing\nthree characteristic lifetimes of 405 ps, 1.4 ns, and 6.2 ns, indicating different carrier\ndynamic behaviors. These results are consistent with previous studies (Nano Research,\n2019, 12, 1619–1624; Nanoscale, 2015, 7, 7402-7408) [3, 4].\nFollowing the reviewer’s suggestion, we have included these results in the\nSupplementary Figure S1 of the revised version. Additionally, we have added the\nfollowing discussion in the main text: “Millisecond-scale optical/electrical pulses were\nused to better simulate the timescale of biomimetic behaviors, while also being limited\nby the LED equipment speed.”\nExperiment\nFitting\n10 20 30 40 50\nFigure R4. Time-resolved photoluminescence spectra of MoS , with the red line\n2\nrepresenting the triple exponential decay function fitting result.\n5. What about the light perception at different wavelengths? Even though the work\nhighlights bio-inspired, the work does not tackle the issue of broadband detection?\nAuthors should comment on this.\nytisnetni\nLP\na Tri-exponential decay function\nτ = 405 ps\n1\nτ = 1.4 ns\n2\nτ = 6.2 ns\nResponse: We thank the reviewer for their insightful comments. In the old version of\nthe manuscripts, we only presented the device’s response to LED light source with a\nwavelength of 470 nm, primarily because the LED light source could not achieve\ncontinuous wavelength tuning. As the reviewer pointed out, the focus of this work is on\nbiomimetic-inspired devices, so broadband response and detection were not the main\nfocus of the paper. In fact, MoS , as the photoconductive semiconductor material has\n2\nalready demonstrated excellent broadband detection characteristics in previous studies\n(Adv. Mater. 2017, 29, 1605972; Adv. Mater., 2015, 27: 6575-6581) [5, 6], primarily\ndetermined by the material properties, specifically the bandgap of MoS .\nunder three different wavelengths (470 nm, 530 nm, and 625 nm) using separate LED\nlight sources (Thorlabs), as shown in Figure R5. The device exhibits clear\nphotoconductive behavior and significant photo-induced synergistic enhancement\nunder all three wavelengths, which is consistent with the conclusions and trends\ndiscussed in the main text of manuscripts. We have included these results in the Figure\n2h and Supplementary Figure S12 of the revised version and added the following\ndescription in the main text: “Moreover, as a processing-in-sensor unit, MoS FGTs\n2\nalso shows the optical response characteristics under different LED light sources with\nwavelengths of 470 nm, 530 nm and 625 nm, demonstrating the potential of broadband\ndetection.”\na b c\n10−5\n10−7\n10−9\n10−11\n10−13\n−6 −3 0 3 6\nd e f\nFigure R5. (a-c) Transfer characteristic curves of the device under LED illumination\nwith wavelengths of (a) 470 nm, (b) 530 nm, and (c) 625 nm, showing evident\nphotoconductive responses. (d-f) Current responses of the device under LED pulses at\nwavelengths of (d) 470 nm, (e) 530 nm, and (f) 625 nm, showing photoconductive and\nsynergistic photo-electrical enhancement responses.\n6. Wouldn't a search match need extra circuitry and extra power which again goes back\nto the same concept as taking the inputs from memory?\nResponse: We thank the reviewer for pointing out this, which raises a valid concern\nregarding the final energy consumption. In fact, the concepts proposed in this work are\nall aimed at reducing energy consumption. On the single-device level, the non-volatile\nTCAM device can maintain its stored state without the need for refresh cycles, which\nsignificantly reduces dynamic power consumption. The 4T-TCAM device, with its high\nlookup resistance ratio of 105 and high reading endurance of up to 1012, minimizes\nhardware redundancy, enabling fault tolerance. When it comes to integration, additional\n)A(\nI\nd\nλ = 470 nm 10−5\nLED power ⬆ 10−7\n10−9\nDark\n10−11\n10−13\n−6 −3 0 3 6\nV (V)\ng\n)A(\nI\nd\nλ = 530 nm 10−5\nLED power ⬆ 10−7\n10−9\nDark\n10−11\n10−13\n−6 −3 0 3 6\nV (V)\ng\n)A(\nI\nd\nλ = 625 nm\nLED power ⬆\nDark\nV (V)\ng\n200\n150\n100 50\n0 0 10 20 30 40\n)An(\nI d\n150 λ = 470 nm LED power =\n0 0 10 20 30 40\nTime (s)\n)An(\nI d\n150 λ = 625 nm LED power =\n0 0 10 20 30 40\nTime (s)\n)An(\nI d\nλ = 530 nm LED power =\nLED + Vg pulse (-1V) LED pulse 30 pulse Pulse width =10 ms T= 1 s\nTime (s)\ncircuits and power consumption are inevitably required. However, the overall data flow\nmay not necessarily return to models that require extra memory. This is because the\noptoelectronic cross-modal association can reduce redundant data and improve the\nsignal-to-noise ratio. Moreover, the optoelectronic FGT, as a non-volatile information\nstorage (Figure 3a), avoids the additional hardware overhead associated with extra\nmemory. Therefore, both the optoelectronic synergy of the FGT in reducing redundant\ndata volume (Nat. Nanotechnol., 2019, 14, 776-782) [7] and the in-memory search\noperation of the 4T non-volatile TCAM (Nat Commun, 2021, 12, 5806.) [8] are aimed\nat providing new technological approaches for low-power edge computing.\nSimilar discussions also appear in the comparison between the von Neumann\narchitecture and computing-in-memory architecture, as shown in Figure R6 (IEEE\nIEDM 2017, DOI: 10.1109/IEDM.2017.8268380) [9]. The main advantage of\ncomputing-in-memory architecture lies in processing large amounts of data directly\nwithin the memory, with only commands and address transmissions between logic and\nmemory. This reduces the data communication bandwidth requirement between logic\nand memory. From this comparison, it can be seen that while the circuit modules of the\ntraditional von Neumann architecture remain similar to those of computing-in-memory\narchitecture, the input requirements within the memory are significantly reduced.\n[FIGURE REDACTED]\nFigure R6. Comparison between von Neumann architecture and computing-in-memory\narchitecture. [9]\n7. Basic IV characteristics (at Vg = 0V) demonstrating memory behavior should\nbe added.\nResponse: We thank the reviewer for pointing this out. To characterize the basic\nmemory properties, we tested the device’s current-voltage characteristics after\nprogramming or erasing operations, as shown in Figure R7. At V = 0 V, the device\ng\nexhibits a high-resistance state (after programming with a positive voltage pulse) and a\nlow-resistance state (after programming with a negative voltage pulse), demonstrating\nbasic storage behavior.\nFollowing the reviewer’s comments, we have included these results in the\nSupplementary Figure S3 of the revised version and added the following discussion in\nthe main text: “The memory behavior of MoS FGTs is also demonstrated as shown in\n10−4\n10−5\n10−6\n10−7\n10−8\n10−9\n10−10\n−1.0 −0.5 0.0 0.5 1.0\nFigure R7. Basic current-voltage curves of the device at V = 0 V after gate voltage\ng\npulse programming or erasing operations: (a) linear scale, (b) logarithmic scale.\n8. What property of MoS2 makes it perform like in memory behavior? The visual aspect\nis due to the absorption but the memory aspect is due to what? Authors need to clearly\nmention the physics behind the memory aspect.\nResponse: We thank the reviewer for pointing this out. The memory effect is primarily\ndue to the carrier injection into the floating gate of the device (by Fowler–Nordheim\ntunneling and hot-electron injection), which establishes a channel threshold voltage\nshift. This can be described using an energy band diagram. When a large positive gate\nvoltage is applied (Figure R8a), the electric field induces the band bending, and\nelectrons in the channel tunnel into the floating-gate layer and are trapped there. When\nthe gate voltage is removed, the negative charges trapped in the floating gate shift the\nchannel threshold voltage positively via the field effect. Similarly, when a large\nnegative gate voltage is applied (Figure R8b), holes in the channel tunnel into the\nfloating-gate layer and are trapped there. When the gate voltage is removed, the channel\nthreshold voltage shifts negatively. This is the main reason why the MoS FGT device\n2\n)A(\nI\nd\n50\ng\n0\n−25\nP: V=-8 V, 0.2 s g\nE: V=8 V, 0.2 s\ng\n−50\n−1.0 −0.5 0.0 0.5 1.0\nV (V)\nd\n)Aμ(\nI d\na b\nV = 0 V\ng\nProgram: V=-8 V, 0.2 s\ng\nErase: V=8 V, 0.2 s\ng\nV (V)\nd\nexhibits memory characteristics.\nOn the other hand, the charge trapping and detrapping processes at the interface could\nalso contribute to hysteresis. To investigate this, we compared the basic electrical\ncharacteristics of the floating-gate device with the control group (normal MoS\n2\ntransistor), as shown in Figure R9. It can be observed that as the gate sweep voltage\nrange increases, the hysteresis observed in the control transistor remains relatively\nsmall, while the hysteresis in the floating-gate transistor significantly increases. This\ntest further supports the fact that the memory characteristics are primarily due to the\ncharge in floating-gate structure of device.\nFollowing the reviewer’s comments, we have included these results in the\nSupplementary Figures S2 of the revised version and discussed the physics behind the\nmemory in Supplementary Note 2.\nFigure R8. Band diagram of the floating-gate transistors showing the memory\nmechanism at (a) V > 0V and (b) V < 0V.\ng g\nFigure R9. (a) Microscopic images of MoS transistor and MoS floating-gate transistor.\n2 2\n(b) Bidirectional transfer characteristic curves of normal MoS transistor under\n2\ndifferent V sweep ranges. (c) Bidirectional transfer characteristic curves of MoS\ng 2\nfloating-gate transistor under different V sweep ranges. (d) Comparison of hysteresis\ng\nwindows between the two types of devices.\n9. What is the linearity factor of the device in terms of memory?\nResponse: We thank the reviewer for pointing this out. The linearity of the floating-\ngate memory is critical for the realization of multi-level storage, which is primarily\nreflected in the distribution of the threshold voltage. We conducted a preliminary\nevaluation of the linearity of memory device by analyzing the relationship between the\nthreshold voltage and the gate voltage sweep range, as shown in Figure R10. Under\ndifferent applied V bias ranges, the memory device exhibited both forward and reverse\ng\nthreshold voltage shifts, which show a reasonably good linear dependence on the\nprogramming voltage. The extracted linearity coefficients are R2 = 0.99 for the forward\ndirection and R2 = 0.954 for the reverse direction.\nFollowing the reviewer’s comments, we have included linearity factor in the\nSupplementary Figures S3 of the revised version.\n4\n2\n0\n−2\n−4\n4 6 8 10\nFigure R10. (a) Transfer characteristics of the floating-gate memory device under\nbidirectional gate voltage sweeps. (b) Linear fitting of the threshold voltage as a\nfunction of the gate voltage sweep range.\n10. A demonstration of the interconnection of the cells should be provided.\nResponse: We thank the reviewer for pointing this out. Although this work primarily\nemphasizes bio-inspired cross-modal associative responses, following the reviewer’s\nsuggestion, we have included a 4×4 interconnected device array, as shown in Figure\nR11. We tested the basic electrical characteristics of the devices, and it can be seen that\neach unit exhibits a pronounced hysteresis window, indicating consistent memory\nbehavior across the array.\nFollowing the reviewer’s comments, we have included these results in the\n)V(\nV\nht\na b\nV sweep range Forward\ng Reverse\n10 ±4 V Linear Fitting\n±6 V Linear Fitting\n±8 V\n±10 V R2 = 0.954\n0\n−10 −5 0 5 10\nV (V)\ng\n)Aμ(\nI\nd\nV (V)\ng\nSupplementary Figure S5 of the revised version and added the following discussion in\nthe manuscript: “Moreover, a demonstration of the interconnection of the 4×4 cells is\nalso presented in the Supplementary Figure S5”.\n.\nFigure R11. (a) Optical microscope image of the interconnected devices in the array.\nScale bar is 40 μm. (b) Basic electrical characteristics showing memory behavior of\ndevices in the 4×4 array.\nReviewer #2 (Remarks to the Author):\nThe manuscript by Xiong Xiong et al. introduces a bio-inspired hardware platform\nusing MoS2 for cross-modal visual perception, enabling super-additive photoelectric\nsignal processing and enhanced visual sensitivity. It also features a non-volatile 4T-\nTCAM circuit for precise image routing with high durability, offering potential for edge\nAI applications. Before considering acceptance, the authors need to address the\nfollowing comments during the minor revisions:\nResponse: We sincerely thank the reviewer for their valuable time and insightful\ncomments, which have greatly helped improve the quality of our manuscript.\n1.The array presented in this paper is very interesting. However, Figure 1a and b, which\nare intended to explain cross-modal super-additive plasticity, seem to be unrelated to\nthis array.\nResponse: We appreciate the reviewer’s positive evaluation. The photoelectric\nsynergistic super-additive enhancement response and time-correlated plasticity effects\ndemonstrated in this work are based on a MoS floating-gate transistor. At the energy\n2\nband level, the mechanism relies on an electric-field-assisted tunneling model of\nphotogenerated carriers, while from a bio-inspired perspective, the concept originates\nfrom cross-modal associative responses.\nTo better illustrate this biomimetic concept, we introduced Figures 1a and 1b (in old\nversion), using the well-known McGurk effect as a classic example to explain how\nbiological systems integrate multimodal sensory information. This serves to inspire the\nunderstanding of features such as supra-additive effects or mutual information encoding\nin cross-modal associations. Therefore, the logical flow of this work begins with\nclassical biomimetic phenomena to introduce the biological basis of cross-modal\nassociative responses, which subsequently informs the design of the device mechanism\nand the fabrication of device arrays. Figures 1a and 1b (in old version) are thus highly\nrelevant to the rest of the study and form the foundation of the bio-inspired framework\npresented in this work.\nFollowing the reviewer’s comment, we have revised Figures 1a and 1b and added a\ncorresponding discussion in the revised version to improve the logical flow and\ncontextual linkage of the manuscript: “The use of solid-state electronic device arrays to\nsimulate cross-modal correlation response features such as the “McGurk effect” to\nachieve efficient information integration and coding (as shown in Figure 1b) is expected\nto reduce the overall power consumption overhead.”.\nFigure 1. The revised Figure 1 to improve the logical flow and contextual linkage in the\nrevised version manuscript.\n2.Figure 2a-c is inadequate in explaining this array. There are parts that do not fit well.\nAnd the absence of an enlarged picture may make it difficult for readers to understand.\nResponse: We thank the reviewer for pointing this out. The version shown in the\noriginal manuscript was based on an early batch of device layouts, which included some\nredundant pad designs (We have also provided the enlarged pictures for this batch of\ndevice as shown in Figure R12 and Supplementary Figure S17 in revised version). To\nimprove clarity for readers, we have reorganized Figure 2 to present a clearer optical\nmicroscope image of the new batch devices with layout optimization, as shown in\nFigure R12 and the revised Figure 2. According to the reviewer’s suggestion, we have\nupdated the microscope images in the main text with views at different magnifications\nto improve readability, and revised the corresponding discussion in the main text with\nmarked.\nFigure R12. Device images of the initial version (top panel) and the update version\n(bottom panel) with layout optimization to improve readability.\nFigure 2. The revised Figure 2 to improve readability for device array in the revised\nversion manuscript.\n3.Why is there a persistent photoconductivity effect in this FGM device?\nResponse: We thank the reviewer for pointing this out. Since the channel material of\nour device is monolayer MoS with a direct bandgap, and a floating-gate structure is\n2\nemployed, we explain the mechanism of persistent photoconductivity based on the\nenergy band diagrams shown in Figure R13. Under illumination with a photon energy\nof 2.6 eV, photogenerated carriers can be excited to the conduction band (electrons) and\nvalence band (holes). Temporarily augmented carrier density is expressed by Quasi-\nFermi levels E and E for electrons and holes, respectively. The E for minority\nF,n F,p F,p\ncarriers in the n-type semiconductor of MoS will deviate more from the initial Fermi\n2\nlevel47. As a result, some photogenerated holes tend to be injected into the floating gate,\nalthough the tunneling efficiency is low at this condition due to the sufficient barrier\nheight as we have discussed in Figure 1d, while some are trapped in the interface states,\nresulting in the shifted negative of the channel threshold voltage. Meanwhile, the\nphotogenerated electrons excited into the conduction band increases the conductance\nof the channel. Taken together, the device exhibits enhanced current under illumination\nand the residual nonvolatility from the carriers injected into the floating gate. Under\ncontinuous light exposure or repeated light pulses, photogenerated carriers are\ncontinuously excited within the bandgap. This process can persist until the charge in\nthe floating gate reaches saturation.\nAccording to the reviewer’s suggestion, we have included the Figure R13 in the\nSupplementary Figures S10 of the revised version updated the corresponding\ndiscussion in the revised manuscript with marked.\nFigure R13. (a) Energy band diagram of the floating-gate device under thermal\nequilibrium. (b) Energy band diagram of the device under light illumination with photo-\nexcited electron-hole pairs.\n4.What is the speed when it is a FGM without a gate voltage?\nResponse: We thank the reviewer for pointing this out. We tested the current variation\nof the device under shorter light pulse widths (470 nm LED light source, power 16.7\nmW/cm2, with no additional gate voltage), and the results are shown in Figure R14.\nWhen the LED pulse width was reduced to 0.1 ms, a slight increase in photocurrent\nwas still observed, indicating that the device speed can reach 100 μs. However, as\ndescribed in the methods section, the LED light pulses were triggered by a 1525 module\npulse voltage, which is limited by the device delay (<100 μs, according to the product\nmanual). Therefore, this is only a rough estimation, and shorter pulse width tests could\nnot be conducted. According to the reviewer’s suggestion, we have included this result\nin the Supplementary Figure S11 of the revised manuscript.\ng d\n4\n0 10 20 30\nFigure R14. Current response of the device under small pulse width light illumination\nwithout gate voltage.\n5.Are there any characteristics for light sources other than blue LED? Show the\n)An(\nI\nd\nLED pulse (ms) Power:16.7 mW/cm2\n0.1 0.2 0.5\na\nTime (s)\nbehavior for various light sources.\nResponse: We thank the reviewer for their insightful questions. Following reviewer’s\nsuggestion, we have characterized the device’s performance under three different\nwavelengths (470 nm, 530 nm, and 625 nm) using separate LED light sources\n(Thorlabs), as shown in Figure R5. The device exhibits clear photoconductive behavior\nand significant photo-induced synergistic enhancement under all three wavelengths,\nwhich is consistent with the conclusions and trends discussed in the main text of\nmanuscripts. We have included these results in the Figure 2h and Supplementary Figure\nS12 of the revised version and added the following description in the main text:\n“Moreover, as a processing-in-sensor unit, MoS FGTs also shows the optical response\n2\ncharacteristics under different LED light sources with wavelengths of 470 nm, 530 nm\nand 625 nm, demonstrating the potential of broadband detection.”\na b c\n10−5\n10−7\n10−9\n10−11\n10−13\n−6 −3 0 3 6\nd e f\nFigure R5. (a-c) Transfer characteristic curves of the device under LED illumination\nwith wavelengths of (a) 470 nm, (b) 530 nm, and (c) 625 nm, showing evident\nphotoconductive responses. (d-f) Current responses of the device under LED pulses at\n)A(\nI\nd\nλ = 470 nm 10−5\nLED power ⬆ 10−7\n10−9\nDark\n10−11\n10−13\n−6 −3 0 3 6\nV (V)\ng\n)A(\nI\nd\nλ = 530 nm 10−5\nLED power ⬆ 10−7\n10−9\nDark\n10−11\n10−13\n−6 −3 0 3 6\nV (V)\ng\n)A(\nI\nd\nλ = 625 nm\nLED power ⬆\nDark\nV (V)\ng\n200\n150\n100 50\n0 0 10 20 30 40\n)An(\nI d\n150 λ = 470 nm LED power =\n0 0 10 20 30 40\nTime (s)\n)An(\nI d\n150 λ = 625 nm LED power =\n0 0 10 20 30 40\nTime (s)\n)An(\nI d\nλ = 530 nm LED power =\nLED + Vg pulse (-1V) LED pulse 30 pulse Pulse width =10 ms T= 1 s\nTime (s)\nwavelengths of (d) 470 nm, (e) 530 nm, and (f) 625 nm, showing photoconductive and\nsynergistic photo-electrical enhancement responses.\n6.Provide figure of merits of the FGM, such as D*, Rph, etc.\nResponse: We thank the reviewer for pointing this out. We have added the results of\nthe device’s photodetection performance, as shown in Figure R15. Figure R15a shows\nthe photogenerated current (I = I - I ) under different light intensities with gate\nph light dark\nvoltage (V ) tunability under the LED with wavelengths of 470 nm. Figure R15b\ng\npresents the photodetector responsivity (R = I / P ) calculated from the excited\nph in\nphotocurrent and incident light power. Figures R15c-d show the photodetector\nresponsivity and detectivity under different light intensities at V =0 V, calculated using\ng\nthe formulas: D*= (I /P )*(S/(2q*I ))1/2, where S is the photosensitive area, I is the\nph in dark ph\nphotocurrent, P is the incident power, q is the unit charge, and I is the dark current.\nin dark\nIn this work, both the device’s photodetector responsivity and detectivity exhibit an\nincreasing trend with decreasing incident light power, reaching a maximum of 1.7×104\nA/W and 1.36×1011 Jones, respectively. According to the reviewer’s suggestion, we\nhave included this additional result in the Supplementary Figure S6 of the revised\nmanuscript and added the following description in the main text: “The photodetector\nmaximum responsivity and detectivity with LED wavelengths of 470 nm is 1.7×104\nA/W and 1.36×1011 Jones, respectively.”.\n20\n10\n0\n−6 −3 0 3 6\nFigure R15. Photodetection performance of the MoS FGTs device with LED\n2\nwavelengths of 470 nm. (a) Photocurrent under different light powers and gate voltages,\n(b) Photodetector responsivity under different light powers and gate voltages, (c)\nPhotodetector responsivity at V = 0 V under different light powers, (d) Detectivity at\ng\nV = 0 V under different light powers.\ng\n7.The cross-talk between neighboring FGM should be analyzed. A comprehensive\nstudy of photocurrent mapping using scanning photocurrent microscopy could provide\nvaluable insights.\nResponse: We thank the reviewer for pointing this out. In the previous version, each\nMoS flake had some redundant electrode designs, which raised the reviewer’s concern\n2\nregarding crosstalk in the photoelectric response. However, during photoelectric testing,\n)Aμ(\nI\nhp\nLED power intensity (mW/cm2)\n0.35 104\n0.65\n0.9 1.2\n1.8 103\n2.2\n3.6 6 102\n7\n10\n14 15 101\n16.7\n100\n−6 −3 0 3 6\nV (V)\ng\n)W/A(\nR LED power intensity (mW/cm2) 0.35 0.65\n0.9 1.2\n1.8 2.2\n3.6 6 7 10\n14 15\n16.7\nV (V)\ng\n104\n103\n0.1 1 10 100\n)W/A(\nR\n1.7*104\n1011\n1010\n0.1 1 10 100\nP (mW/cm2)\nin\n)senoJ(\n*D\na b\nc d\nV = 0 V, V = 50 mV g d\n1.36*1011\nP (mW/cm2)\nin\nonly the two adjacent electrodes are used, while the other electrodes remain unbiased.\nFollowing the reviewer’s suggestion, we conducted scanning photocurrent microscopy\nmeasurements for this structure, with the results shown in the Figure R16. It was\nobserved that when the biased electrodes were A and B, the photo-response distribution\nwas influenced by the intermediate electrodes C and D. In contrast, when the bias was\napplied directly to adjacent electrodes (C and D), the photocurrent was primarily\ngenerated between these electrodes, and its magnitude increased. As all results\npresented in this work were obtained using adjacent electrodes, the concern about\ncrosstalk in this type of structure is mitigated. On the other hand, in the new batch of\ndevices, we have eliminated these redundant electrodes, and the adjacent device units\nare isolated physically and controlled by independent bias voltages. As shown in Figure\n2, each MoS flake and its corresponding electrodes are physically isolated, which\n2\nprevents crosstalk issues.\nFigure R16. (a) Optical microscope image of the device with redundant electrode design.\nScale bar: 6(cid:3031)μm. (b) Spatial photocurrent mapping under V =0(cid:3031)V and V =50(cid:3031)mV. (c)\ng AB\nSpatial photocurrent mapping under V\ng\n=0(cid:3031)V and V\nCD\n=50(cid:3031)mV. In the scanning\nphotocurrent microscopy measurements, the incident laser wavelength is 488(cid:3031)nm with\nthe power of 112 μW.\n8.Looking at Figure 2a, although it is monolithic, the arrays on the left are not connected\nto each other. That is, they are not actually driven. Readers may misunderstand. I hope\nyou write the simulation part in more depth. And you need to mention that they are not\nactually driven. (That is, each characteristic was extracted and simulated.)\nResponse: We thank the reviewer for pointing this out. In the revised version, we have\nreorganized Figure 2 and provided additional clarifications for parts that may have\ncaused confusion for the readers. The core contribution of this work lies in the design\nand emulation of solid-state electronic devices mimicking cross-modal biomimetic\nbehaviors. Therefore, the main results and tests in this paper are based on isolated,\nindividual devices rather than arrays. Although we have included basic demonstrations\nof arrays in the revised version (Supplementary Figure S5), there are still many\nchallenges to overcome before achieving a fully driven array. In the image information\nconfusion simulation (Figure 4f), we used the nonlinear relationship between the\nphotonic pulse time interval and the voltage pulse amplitude of a single device (based\non experimental results extracted, as shown in Figure 4e) as a physical function for\nimage encoding and decoding. We first fit the experimental results of the single device\nto form a functional relationship: Output = f(input, t). Specifically, we fitted the scatter\ntrend obtained from the experiments with a cubic polynomial, normalized the response,\nand obtained a three-dimensional surface function. This function is crucial for mapping\nand reverse-mapping the pixel values of the image. Both the confused image pixels and\nthe decoded image pixels were grayscale normalized, then associated using this\nmapping relationship, and solved by a bisection method. For the decoding process, the\nconfused pixel (input) and the key (t) undergo the f operation to obtain the decoded\nimage (output), while the encryption process is the inverse of this process.\nIn the SPICE simulation shown in Figure 5, we performed an experimental statistical\ndistribution of the high and low resistance states of multiple FGM devices (Figure 2g),\nwhich served as the basis for the TCAM unit’s memory section. Due to the lack of\naccurate universal models for new material devices, we simplified the model and only\nextracted the R index in the TCAM lookup operation as a verification of the basic\nratio\nfunctionality. In the TCAM lookup operation, since the stored information in the MoS\nthe resistance value is randomly generated from the experimental high and low\nresistance distributions. The core of the transistor is a switching operation, and the\nswitch state of the MoS transistor is fitted using a semi-empirical level 3 model with\n2\nparameter correction. In multi-bit parallel lookups, multiple TCAM units are connected\nin parallel, with the FGM resistance distribution in the transistor model consistent with\nthe single-bit device simulation method.\nAccording to the reviewer’s comments, we have provided a more detailed description\nof the simulation in Supplementary Note 3 and clarified that the simulation is based on\na single-device explanation in the main text to avoid misunderstand as follows: “The\ncross-modal time-dependence plasticity and light intensity tunability used in simulation\nwas extracted from the experimental results of individual devices, rather than a fully\ndriven interconnected array.”.\nReviewer #3 (Remarks to the Author):\nThis paper is an interesting study that demonstrates the implementation of a device\nusing a monolayer molybdenum sulfide (MoS2) channel with a floating gate, and\nfurther explores its potential applications in processing-in-sensory and compute-in-\nmemory. To improve the accuracy and reliability of this study, the following points\nshould be addressed.\nResponse: We appreciate the reviewer’s positive comments.\n1. It is necessary to present the memory characteristics of the MoS2 floating gate\ntransistor (such as speed according to program and erase voltages, Vth shifts, sensing\nmargin, retention, and endurance).\nResponse: We thank the reviewer for pointing this out. As the key device unit of this\nwork, the memory properties of the MoS floating gate transistor have been fully\n2\ncharacterized, as shown in Figure R17. Figure R17a displays the basic transfer\ncharacteristics curve (double sweep) of the device under different gate voltage scan\nranges. It can be observed that as the gate voltage scan range increases, the device\nexhibits different hysteresis windows, as shown in Figure R17b. This is due to the larger\nnumber of carriers injected into the floating gate under higher voltages, causing a\ngreater change in the threshold voltage, thus providing a larger memory window. It is\nnoted that the hysteresis window is smaller when the gate voltage range is less than 4\nV. Therefore, a scan range of ±3 V was chosen to test the programming and erasure\nspeeds of the device. Subsequently, the speed of the device was tested. Figure R17c\nshows the transfer characteristics curve of device after applying different erasure\nvoltage pulses to the device following a programming operation. An intuitive\nobservation is that, under the same pulse width, as the programming voltage amplitude\nincreases, the positive shift in threshold voltage becomes more obvious. At the same\ntime, for the same programming voltage, a decrease in pulse width weakens the positive\nthreshold voltage shift. In Figure R17c, a significant positive shift in threshold voltage\nis achieved under a -7 V programming voltage amplitude and a 50 μs pulse width,\nindicating a programming speed of 50 μs. Correspondingly, Figure R17c shows the\ntransfer characteristics curve of device after the erasure operation, where different\nprogramming voltage pulses were applied to the device. It can also be observed that\nafter a 7 V erasure voltage amplitude and a 50 μs pulse width, the threshold voltage of\ndevice undergoes a significant negative shift. We then performed durability testing on\nthe device unit, using complete programming and erasure operations. The ratio of low\nresistance state to high resistance state exceeded 105, as shown in Figure R17e. Figure\nR17f shows the relationship between the number of complete programming/erasure\ncycles and the current in the high and low resistance states. It can be observed that after\nmore than 1000 cycles, the high resistance state shows significant degradation, while\nthe low resistance state remains relatively unchanged. Therefore, the robust cycle\nnumber of the device is approximately 1000. Figure R17g shows the retention\ncharacteristics of the device. By applying different programming voltages, the device\ncan stably exhibit six resistance states, with each state maintaining stability for over\n1200 seconds. However, we believe that programming speed, retention, and endurance\nare interdependent and related to interface states and the thickness of the tunneling\noxide layer. According to the reviewer’s comments, we have included this part of the\nresults in the Supplementary Figure S3 of the revised version and added the following\ndescription in the manuscript: “The memory behavior of MoS FGTs is also further\n2\ndemonstrated as shown in Supplementary Figure S3.”.\n10-4\nV = -8 V, 10 s\ng,program\n10-6 V\ng,program\n= -6 V, 10 s\nV = -6 V, 4 s\ng,program\n10-8 V = -5 V, 4 s\ng,program\nV = -4 V, 3 s\ng,program\n10-10 V = 8 V, 10 s\ng,program\n10-12\n0 300 600 900 1200\nFigure R17. The memory characteristics of the MoS floating gate transistor.\n2\n2. The hysteresis characteristics shown in Figure S2a appear to be related to the\n)A(\nI\nd\n8\n6\n4\n2\n0\n2 4 6 8 10\nTime (s)\n)V(\nsiseretsyH\n10−5\n10−7\n10−9 V g sweep range\n±2 V\n±4 V\n10−11 ±6 V\n±8 V\n±10 V\n10−13\n−10 −5 0 5 10\nV range (V)\ng\n)A(\nI\nd\nV (V)\ng\n10−6\n10−8\n10−10\n10−12\n10 100 1000\n)A(\nI\nd\n10-6\nLRS\n10-8\n10-10\nHRS\n10-12\n0 2 4 6 8\nP/E endurance\n)A(\nI\nd\n10−6\n10−7\n10−8\n10−9\n10−10\n10−11\n10−12\n10−13\n−3 0 3\nLRS\n-6.8V, 10 ms\nHRS\nTime (s)\n)A(\nI d\n10−6\nErase Speed\n10−7\n10−8\n10−9\nP: 6 V, 200 ms 10−10\nE: -6 V, 1 ms\nE: -6.5 V, 1 ms 10−11\nE: -7 V, 1 ms\nE: -7 V, 500 μs\nE: -7 V, 100 μs\n10−12\nE: -7 V, 50 μs\n10−13\n−3 0 3\nV (V)\ng\n)A(\nI d\na b\nc d\nProgram Speed\nE: -6 V, 200 ms\nP: 6 V, 500 μs\nP: 6.5 V, 50 μs\nP: 7 V, 50 μs\nV (V)\ng\ne f\ng\npresence or absence of trapped charges in the storage layer. It is necessary to present\nthe programming pulse conditions for each curve. Additionally, to demonstrate the\nhysteresis-free characteristics of the MoS2 channel or other factors in the MoS2 floating\ngate transistor, presenting the transfer curves in double sweep mode is also necessary.\nResponse: We thank the reviewer for pointing this out. We thank the reviewer for their\ninsightful comments. Indeed, as the reviewer mentioned, the presence of charges in the\nfloating gate layer can affect the transfer characteristics curve during scanning. To avoid\nconfusion for readers, we retested the transfer characteristics curve of the device under\ndifferent scan ranges, as shown in Figure R16a. On the other hand, the charge trapping\nand detrapping process at the interface may also contribute to hysteresis. Therefore, we\ncompared the basic electrical characteristics of the floating gate device with those of\nthe control group device (a back-gate transistor), and the results are shown in Figure\nR9. The devices were scanned from a smaller voltage range to a larger voltage range to\navoid the charges already injected into the floating gate before testing. It can be seen\nthat, as the gate voltage scan range increases, the hysteresis of the regular transistor\ndevice remains relatively small, while the hysteresis of the floating gate structure device\nsignificantly increases. This test further confirms that the hysteresis behavior mainly\noriginates from the floating gate device structure.\nAccording to the reviewer’s comments, we have included this part of the results in the\nSupplementary Figure S2 of the revised version, and updated the relevant discussion in\nthe revised manuscript.\nFigure R9. (a) Microscopic images of MoS transistor and MoS floating-gate transistor.\n2 2\n(b) Bidirectional transfer characteristic curves of normal MoS transistor under\n2\ndifferent V sweep ranges. (c) Bidirectional transfer characteristic curves of MoS\ng 2\nfloating-gate transistor under different V sweep ranges. (d) Comparison of hysteresis\ng\nwindows between the two types of devices.\n3. The authors presented retention and reading endurance for the 4T-TCAM cell in\nFigure S4, but the cyclic endurance of P/R/E/R (Program/Read/Erase/Read) should also\nbe included.\nResponse: We thank the reviewer for pointing this out. As TCAM is a device dominated\nby routing lookup operations, its retrieval and readout operations are more frequent,\nand the endurance of the readout has already been discussed in the original version. The\nprogramming and erasing endurance mentioned by the reviewer mainly depend on the\nendurance of the two MoS FGTs. According to the results in Figure R17, the electrical\n2\nprogramming/erasing endurance of a single MoS FGT is about 1000 cycles, which\n2\nsomewhat limits the write/erase cycle endurance of the 4T TCAM. Based on the\nreviewer’s suggestion, we tested this process, as shown in Figure R18. The test process\nalternates between route addressing (read) operations and cyclical modification\n(programming/erasing) operations. It can be observed that after 200 cycles of\nprogramming/erasing on the two FGTs, the read operations of TCAM cell are consistent\nwith the initial state. After another 200 cycles of programming/erasing, the logical state\nof TCAM cell remains correct, but the HRS/LRS starts to degrade. After another 200\ncycles of programming/erasing, the TCAM device fails. Thus, the write/erase cycle\nendurance of the 4T-TCAM is approximately 400 cycles. The suboptimal write/erase\ncycle count may be related to the layout design and the micro-nano fabrication process.\nAccording to the reviewer’s comments, we have included this part of the result in the\nSupplementary Figure S9 of the revised version.\n10−4\n10−5\n10−6\n10−7\n10−8\n10−9\n10−10\nFigure R18. The cyclical programming/erasing and route addressing operations\nendurance of 4T-TCAM cell.\n4. The authors presented characteristics of visual security through TCAM array\nsimulation. To increase reliability, additional explanation about the SPICE simulation\nand presentation of calibration data with actual devices are necessary.\nResponse: We thank the reviewer for pointing this out. In the SPICE simulation, the\ndistribution of the high-resistance state (HRS) and low-resistance state (LRS) for MoS\n2\nfloating gate memories was experimentally statistically analyzed (Figure 2g), which\nserves as the basic component for the TCAM. Due to the current lack of accurate\n)A(\nI\nd\nVg2\nSL\nVg1\nP/E n times\nSL\n0 2 4 6\nV Vg1 Vg2\nbias\nSL SL\nGND GND\nFailed\nP/E P/E P/E\n200 200 200\ntimes times times\nTime (s)\ngeneral models for new material devices, we simplified the model and only extracted\nthe R metric in TCAM lookup operations as a basic function verification. In the\nratio\nTCAM lookup operation, since the stored bit information in the MoS FGTs unit\n2\nremains unchanged, the FGTs unit is equivalent to a resistor, and the resistance value is\nrandomly generated based on the experimental high- and low-resistance distributions.\nThe transistor operates as a switch unit, and the semi-empirical Level 3 model with\ntransistor parameter correction by experimental (Figure R19a) is used to fit the on/off\nstates of the MoS transistor. In the parallel lookup of multi-bit data, multiple TCAM\n2\nunits are connected in parallel, with the FGTs resistance distribution in the transistor\nmodel being consistent with the single-bit device simulation method. We extracted the\nkey experimental parameters for MoS transistor model calibration (Figure R19a and\nunit with experimental results (Figure R19b).\nFollowing the reviewer’s suggestion, we have included this part of the results in the\nSupplementary Figure S15 of the revised version and added additional explanations in\nthe Supplementary Note 3.\n20\n15\n10\n5\n0\n−4 −2 0 2 4\nFigure R19. (a) Experimental parameters extraction of MoS transistor. (b) TCAM\n2\noperations results comparison for experimental and simulation. (c) Parameters used in\nSPICE simulation.\nReference\n[1]. Shams, L., Kamitani, Y. & Shimojo, S. What you see is what you hear. Nature 408,\n788 (2000).\n[2]. https://www.thorlabs.us/thorProduct.cfm?partNumber=LEDD1B)\n[3]. Xu, L., Zhao, L., Wang, Y. et al. Analysis of photoluminescence behavior of high-\nquality single-layer MoS . Nano Res. 12, 1619–1624 (2019)\n2\n)Aμ(\nI\nd\nExperimental Simulation\nL = 2 μm\nW = 20 μm 10−5\nV = 50 mV\nds\nμ = 25 cm2/Vs\nV = 0.4 V th\n10−7\n10−9\n10−11\n0 2 4 6 8 10\nV (V)\ng\n)A(\ntnerruC\na b\nTime (s)\nc\nParameter Value\nW Channel width 20 μm\nL Channel length 2 μm\nTox Oxide thickness 30 nm\nVto Threshold voltage 0.4 V\nKp Transconductance parameter 4e-5 A/V2\nUo Mobility 25 cm2/Vs\nRds Drain-source shunt resistance 100G Ω\nNSF Interfacial state density 3.5e12\nEta Static feedback coefficient 5\n[4]. L. Yuan and L. Huang, Exciton dynamics and annihilation in WS 2D\n2\nsemiconductors, Nanoscale, 2015, 7, 7402-7408.\n[5]. Y. Xie, B. Zhang, S. X. Wang, et al., Ultrabroadband MoS2 Photodetector with\nSpectral Response from 445 to 2717 nm, Adv. Mater. 2017, 29, 1605972.\n[6]. Wang, X., Wang, P., Wang, J. et al., Ultrasensitive and Broadband\nMoS Photodetector Driven by Ferroelectrics., Adv. Mater. 2015, 27: 6575-6581.\n2\n[7]. F. Zhou, Z. Zhou, J. Chen, et al., Optoelectronic random access memories for\nneuromorphic vision sensors, Nature Nanotechnology, 2019, 14, 776-782.\n[8]. Pedretti, G., Graves, C.E., Serebryakov, S. et al. Tree-based machine learning\nperformed in-memory with memristive analog CAM. Nat Commun 12, 5806 (2021).\n[9]. Fu-Kuo Hsueh et al., TSV-free FinFET based monolithic 3D-IC with computing-\nin-memory SRAM cell for intelligent IoT devices. IEEE IEDM 2017. DOI:\n10.1109/IEDM.2017.8268380\n[10]. K. Moon, M. Kwak, J. Park, D. Lee and H. Hwang, \"Improved Conductance\nLinearity and Conductance Ratio of 1T2R Synapse Device for Neuromorphic\nSystems,\" in IEEE Electron Device Letters, vol. 38, no. 8, pp. 1023-1026, Aug. 2017,\ndoi: 10.1109/LED.2017.2721638.\n[11]. P. -Y. Chen et al., \"Mitigating effects of non-ideal synaptic device characteristics\nfor on-chip learning,\" 2015 IEEE/ACM International Conference on Computer-Aided\nDesign (ICCAD), Austin, TX, USA, 2015, pp. 194-199, doi:\n10.1109/ICCAD.2015.7372570."}, {"round": 2, "reviewer_comments": {"reviewer_1": "The present study reports a Bio-inspired cross-modal visual perception hardware for\nartificial intelligence applications. Based on the presented results of the study, there are some questions which are important to\naddress in order to support the reliability and claimed application of the device/system.\n1. Can the authors comment on the electrical contact between the HfO2 tunnel oxide layer\nand the transferred MoS 2 layer on it? How will this contact impact the optical response of the\ndevice and the contact non-uniformity among different devices in the array on the overall\nsystem performance? Please explain.\n2. After transferring the MoS 2 flakes, how was it masked before the actual etching?\nPlease explain.\n3. The statement on page 5, lines 12-13 in the main manuscript, i.e. \"MoS 2 located on the\nfloating gate or not was selected based on the function\", is not clear. Can authors convey the\nintended information in a more elaborate manner?\n4. What is the physical structural difference between the MoS 2 transistor and the MoS 2 FGT?\nPlease discuss the significance of the difference in the structure in the experimentally\nobtained characteristics of the device.\n5. Why is there a huge order of magnitude difference (>10 4 ) in the photo response if we\ncompare the photo response as shown in Figure 2(h) in the main manuscript, at optical light\nintensity of 9.5 mW/cm 2 and Supplementary Figure S6(a) at comparable optical light\nintensity at around -3V and more negative gate voltages? Please explain.\n6. Referring to Figure 2(j) of the main manuscript, Supplementary Figure S3(e), and\nSupplementary Figure S8 (c), why is there an instantaneous drop in current to a much lower\norder of current as soon as the off-state corresponding to bit \"0\" is induced? This shows a\nlower state retention/memory capability of the device. How are they consistent with\nSupplementary Figure S11, Supplementary Figure S12, and Supplementary Figure S14?\nPlease explain the reason and how it will impact the claims.\n7. The authors have reported a read cycle of 10 12 in Figure 2(K) of the main manuscript, but\nthe number of plotted data points in the graph is extremely less compared to the number of\nread cycles. A similar observation holds for Figure S3(f). Therefore, it is highly suggested to\nreplot the graph with an equal number of data points. This will enhance the reliability of the\nstudy.\n8. In Supplementary Figure S4(a, b), no model fittings have been employed to support the\nclaim of linearity. Please provide a detailed analysis.\n9. It is highly suggested to improve the explanation of the conduction mechanism, which\nresults in the plasticity behaviour, from its current state, by incorporating some more\nexperimental observations related to the role of sulfur vacancies and floating gate,\nemploying in-situ TEM, C-AFM and temperature-dependent studies.\n10. Can the authors provide and explain a physics-based model of the current-voltage\nbehavior of a single device?", "reviewer_2": "The authors have adequately addressed the reviewer comments and revised the manuscript accordingly. I find it acceptable\nfor publication.", "reviewer_3": "The authors have adequately addressed the comments, and I recommend the revised manuscript for publication."}, "author_response": "Point-by-point response to reviewers’ comments for Manuscript\nNCOMMS-24-78678A\nREVIEWER COMMENTS\nReviewer #1 (Remarks to the Author):\nThe present study reports a Bio-inspired cross-modal visual perception hardware for\nartificial intelligence applications. Based on the presented results of the study, there are\nsome questions which are important to address in order to support the reliability and\nclaimed application of the device/system.\n1. Can the authors comment on the electrical contact between the HfO2 tunnel oxide\nlayer and the transferred MoS2 layer on it? How will this contact impact the optical\nresponse of the device and the contact non-uniformity among different devices in the\narray on the overall system performance? Please explain.\nResponse: We thank the reviewer for pointing this out. In device fabrication process of\nthis work, MoS is brought into contact with ALD-grown HfO through a transfer\n2 2\nmethod. Under ideal conditions, a van der Waals gap may forms at the MoS /HfO\n2 2\ninterface, which has the potential to improve interface states. The observed variability\nmay arise from the surface roughness of HfO , which can introduce additional surface\n2\nroughness scattering. However, in actual laboratory-scale fabrication processes, a more\nsignificant source of variability comes from the MoS film and the transfer process\n2\nitself, including organic residues, damage, wrinkles, and grain boundaries in the MoS\n2\nmaterial. These issues stem from the use of organic layers as the supporting layer during\nthe transfer process, which directly impacts device performance by causing variations\nin mobility, threshold voltage, and other electrical characteristics. It also affects the\noptical response, including light absorption, interface states, and the efficiency of\nphotocarrier separation.\nDue to these non-uniformities, there can be increased threshold voltage fluctuations\nacross device arrays, broader distributions in operating speed, and degradation in\nreliability, ultimately leading to a higher error rate and reduced program/erase efficiency.\nTherefore, we believe that the contact between HfO and MoS does not pose an\n2 2\nintrinsic limitation. Instead, substantial progress is needed in improving the uniformity\nof the MoS material and the transfer process in order to enable array-level applications.\ncaption of the original Figure S7 in the revised Supplementary Information to eliminate\npossible confusion.\n2. After transferring the MoS2 flakes, how was it masked before the actual etching?\nPlease explain.\nResponse: We thank the reviewer for pointing this out. To clarify the actual etching\nprocess, we have presented the device etching layout, as shown in Figure R1. After the\nMoS transfer is completed, PMMA resist is used as a mask, and the etching region is\n2\ndefined via electron beam exposure (left panel of Figure R1). The exposed resist is\nremoved after development, while the resist in the channel region is retained. It is worth\nnoting that the exposed region is carefully designed to balance device isolation and\nelectron beam exposure efficiency, extending only a few micrometers beyond the active\ndevice layout. Subsequently, the exposed area is etched, and the etching boundary can\nbe clearly observed in the optical microscope image of the device shown in Figure R1.\nFollowing the reviewer’s comments, we have added the relevant description in Method\nof the revised manuscript.\nFigure R1. Device etching layout and device microscope image.\n3. The statement on page 5, lines 12-13 in the main manuscript, i.e. \"MoS2 located on\nthe floating gate or not was selected based on the function\", is not clear. Can authors\nconvey the intended information in a more elaborate manner?\nResponse: We thank the reviewer for pointing this out. We have revised the sentence\nto: “The channel under the floating gate is used to implement memory devices, while\nthe channel located beneath the gate electrode without a floating gate is used to\nimplement transistors.” which replaces the original description.\n4. What is the physical structural difference between the MoS2 transistor and the MoS2\nFGT? Please discuss the significance of the difference in the structure in the\nL it h\nT\no\nh\ng\ne\nr a\nm\np\na\nh\ns\ny\nk\n&\ne d\nE\nc\nt c\nh\nh\na\nin\nn n\ng\ne\nz\nl\no n e\nexperimentally obtained characteristics of the device.\nResponse: We thank the reviewer for pointing this out. To more clearly illustrate the\nfabrication process of both the MoS transistor and the MoS FGT device, and to better\n2 2\nclarify the working mechanism, we have provided a schematic diagram of the\nfabrication process to highlight their similarities and differences, as shown in Figure\nR2. It should be noted that the MoS transistor and the MoS FGT device are fabricated\n2 2\non the same substrate and share an identical process flow. The only distinction lies in\nthe presence of a floating gate layer in the MoS FGT, which is introduced through an\n2\nadditional process step involving floating gate patterning, thin film (Au) deposition,\nand metal lift-off, as shown in Figure R2. This extra floating gate layer represents the\nsole fabrication difference between the MoS FGT and the MoS transistor, and is the\n2 2\nprimary source of the observed differences in their electrical characteristics.\nFollowing the reviewer’s comments, we have presented the fabrication process flow in\nthe revised Supplementary Information as Figure S2.\nMoS FGT MoS transistor\n2 2\nGate Gate\nLocal gate Substrate\n1st HfO\nGate 2 Gate\nHfO deposition\nFG\n1st HfO\nGate 2 Gate\nFloating gate\nSubstrate\n2ndHfO\nFG 2\n1stHfO\nM F o G S 2 2ndHfO 2 MoS 2\nMoS transfer 1stHfO\n2 2\nand etching Gate Gate\nSubstrate\nS M F o G S 2 D 2ndHfO 2 S MoS 2 D\nSource/drain 1stHfO\nSubstrate\nFigure R2. Schematic diagram of the MoS transistor and MoS FGT device process\n2 2\nflow.\n5. Why is there a huge order of magnitude difference (>10 4 ) in the photo response if\nwe compare the photo response as shown in Figure 2(h) in the main manuscript, at\noptical light intensity of 9.5 mW/cm 2 and Supplementary Figure S6(a) at comparable\noptical light intensity at around -3V and more negative gate voltages? Please explain.\nResponse: We thank the reviewer’s insightful comment. Under the bias conditions\nspecified by the reviewer, a significant difference in photo-response is indeed observed.\nThis is primarily due to the presence of stored charges in the floating gate of the MoS\nsubthreshold regime highlighted by the reviewer (e.g., at V = –3 V or more negative),\ng\nthe current differs significantly due to the threshold voltage shift.\nTo provide a more intuitive comparison of the photo-response, we extracted and\ncompared the photocurrent (I = I – I ) from Figure 2h (470 nm, 9.5 mW/cm2)\nph illumination dark\nand Figure S6a (470 nm, 10 mW/cm2), as shown in Figure R3. It should be clarified\nthat these two measurements were conducted on different devices and under different\ngate voltage sweep ranges. Since the gate voltage was scanned from negative to positive\nvalues, more negative V conditions result in more negative threshold voltages (Figure\ng\nS6a). This is the main reason for the observed photocurrent differences around V = –\ng\nFollowing the reviewer’s comments, we have added the relevant discussion to the\ncaption of the original Figure S6 (now updated as Figure S8) in the revised\nSupplementary Information to eliminate possible confusion.\na b\n20 102\nLED power intensity\n9.5 mW/cm2 (data from Fig. 2h)\n10 mW/cm2 (data from Fig. S6a) 101\n) )\nA A\nμ μ 100\n( (\n10\nh h\nI p I p 10−1\n10−2 LED power intensity\n9.5 mW/cm2 (data from Fig. 2h)\n10 mW/cm2 (data from Fig. S6a)\n0 10−3\n−6 −4 −2 0 2 4 6 −6 −4 −2 0 2 4 6\nV (V) V (V)\ng g\nFigure R3. The comparison of the photo-response extracted from Figure 2h (470 nm,\n9.5 mW/cm2) and Figure S6a (470 nm, 10 mW/cm2, updated as Figure S8a in revised\nversion) at (a) linear coordinates, and (b) semi-logarithmic coordinates.\n6. Referring to Figure 2(j) of the main manuscript, Supplementary Figure S3(e), and\nSupplementary Figure S8 (c), why is there an instantaneous drop in current to a much\nlower order of current as soon as the off-state corresponding to bit \"0\" is induced? This\nshows a lower state retention/memory capability of the device. How are they consistent\nwith Supplementary Figure S11, Supplementary Figure S12, and Supplementary Figure\nS14? Please explain the reason and how it will impact the claims.\nResponse: We thank the reviewer for pointing this out. The results mentioned by the\nreviewer involve three different types of device measurements:\nFirst, Figures 2j and S8c correspond to the logic functionality test of the 4T-TCAM\ndevice. The specific operating principles are illustrated in Figures S8a and S8b and\ndetailed in Supplementary Note 1. These results show the relationship between given\nlogic inputs and the corresponding logic outputs. The transition from logic “1” to logic\n“0” reflects a change in output state and is largely unrelated to the data retention\ncharacteristics of the device.\nSecond, Figure S3e demonstrates the switching of the MoS FGT between high-\n2\nresistance and low-resistance states, controlled by sufficiently large gate voltage pulses\n(6 V/–6.8 V). The device current remains stable before each switching event (e.g., from\ntime = 1–3 s or time = 3–5 s), indicating good data retention.\nThird, for the optical pulse response of the MoS FGT device (sometimes accompanied\n2\nby a weak gate voltage pulse, e.g., –2 V) in Figure S11, S12, S14, since the floating\ngate cannot be fully charged by a single stimulus, the device current gradually increases\nwith the number of pulses. This process is inherently associated with the retention of\ncharge in the floating gate.\nAll three sets of measurements are consistently based on the same type of non-volatile\nMoS FGT device, and the results are unified in interpretation.\n2\n7. The authors have reported a read cycle of 10 12 in Figure 2(K) of the main manuscript,\nbut the number of plotted data points in the graph is extremely less compared to the\nnumber of read cycles. A similar observation holds for Figure S3(f). Therefore, it is\nhighly suggested to replot the graph with an equal number of data points. This will\nenhance the reliability of the study.\nResponse: We thank the reviewer for pointing this out. While the reviewer recommends\nincreasing the amount of data to enhance reliability, we would like to clarify that this\ndoes not necessarily improve the reliability of the endurance results. For example, in\nthe case of Figure S3f, adding data points up to 1000 yields a plot as shown in Figure\nR4. However, this does not provide more informative insights into the endurance\nbehavior compared to the original version. Regarding Figure 2k, including 1012 pairs\nof data points in a single figure would significantly compromise its readability.\nFurthermore, since the figure is displayed on a logarithmic scale, it is common to\npresent data at logarithmic intervals rather than displaying every single cycle point in\nthe literature [1-4]. Conventionally, readout data points after a decade of cycling can be\nchosen as the representative data without compromising the data reliability.\nTo enhance the reliability of Figure 2k, we have provided additional TCAM test results,\nas shown in Figure R5, and included them in the revised Supplementary Figure S11.\nFigure R4. The relationship between the number of complete programming/erasure\ncycles and the current in the high and low resistance states for MoS FGT.\n)A(\nI\n)A(\nI\n)A(\nI\nd\nd\nd\n-4 1 0\n-5 1 0\n-6 1 0\n-7 1 0\n-8 1 0\n-9 1 0\n-10 1 0\n0\n-4 1 0\n-5 1 0\n-6 1 0\n-7 1 0\n-8 1 0\n-9 1 0\n-10 1 0\n0\n-4 1 0\n-5 1 0\n-6 1 0\n-7 1 0\n-8 1 0\n-9 1 0\n-10 1 0\n0\n2\n2\n2\n@\n@\n3 @ 1 0 tim\n4 6\nT im e ( s\n6 1 0 tim e\n4 6\nT im e ( s\n9 1 0 tim e\n4 6\nT im e ( s\ne\n)s\n)s\n)\n)A(\nI\ns\nd\n8\n8\n8\n1\n1\n1\n1\n0\n0\n− 0\n− 0\n− 1\n− 1\n1 0\n1 0\n1 0\n6\n8\n0\n2\n1\n)A(\nd\nI\n)A(\nd\nI\n)A(\nd I\na\n-4 1 0\n-5 1 0\n-6 1 0\n-7 1 0\n-8 1 0\n-9 1 0\n-10 1 0\n0\n-4 1 0\n-5 1 0\n-6 1 0\n-7 1 0\n-8 1 0\n-9 1 0\n-10 1 0\n0\n-4 1 0\n-5 1 0\n-6 1 0\n-7 1 0\n-8 1 0\n-9 1 0\n-10 1 0\n1/\n2\n2\n0E 1\ne n d u r\n4 @ 1 0 tim e s\nT im e ( s )\n7 @ 1 0 tim e s\n4 6\nT im e ( s )\n10 @ 1 0 tim e s\n4 6\nT im e ( s )\n0a 0\nn\n8\n8\nc e\n1 0 0 0\n-4 1 0\n-5 1 0\n-6 1 0\n)A\n-7 1 0 (\nd\nI -8 1 0\n-9 1 0\n-10 1 0\n0 1 0\n-4 1 0\n-5 1 0\n-6 1 0\n)A\n-7 1 0 (\nd\nI -8 1 0\n-9 1 0\n-10 1 0\n0 1 0\n-4 1 0\n-5 1 0\n-6 1 0\n)A\n-7 1 0 (\nd I -8 1 0\n-9 1 0\n-10 1 0\n1 0 0\n2\n2\n2\n5 @ 1 0 tim e s\n4 6\nT im e ( s )\n8 @ 1 0 tim e s\n4 6\nT im e ( s )\n11 @ 1 0 tim e s\n4 6\nT im e ( s )\n8\n8\n8\n1 0\n1 0\n1 0\n10-4 10-4\n10-5 @ 1012 times 10-5 @ 1012 times / rewrite MoS 2 FGTs\n10-6 10-6\n) A 10-7 Rewrite the memory states of ) A 10-7\n( d10-8 the two MoS 2 FGTs ( d10-8\nI I\n10-9 10-9\n10-10 10-10\n10-11 10-11\n0 2 4 6 8 10 0 2 4 6 8 10\nTime (s) Time (s)\npresent the read endurance of the 4T-TCAM.\n8. In Supplementary Figure S4(a, b), no model fittings have been employed to support\nthe claim of linearity. Please provide a detailed analysis.\nResponse: We thank the reviewer for pointing this out. The evaluation of synaptic\ndevice linearity is typically performed using models that describe the relationship\nbetween conductance (G) and pulse number (N). In Figure S4, we employed a basic\nbehavioral model, using the coefficient of determination (R2) from a linear fit (G = a×N\n+ b) to indirectly reflect the linearity of the conductance modulation, where a value of\nR2 closer to 1 indicates better linearity. This method has also been adopted in previous\nliterature [5]. For the potentiation process, the linear fitting yields a relationship of G =\n–3.6 × 10⁻8 + 2.1 × 10⁻8 × N. In contrast, the depression process clearly exhibits poorer\nlinearity.\nFollowing the reviewer’s comments, we have revised the description of linearity in the\ncaption of the Supplementary Figure S6 accordingly.\n9. It is highly suggested to improve the explanation of the conduction mechanism,\nwhich results in the plasticity behaviour, from its current state, by incorporating some\nmore experimental observations related to the role of sulfur vacancies and floating gate,\nemploying in-situ TEM, C-AFM and temperature-dependent studies.\nResponse: We thank the reviewer for pointing this out. To enable non-destructive\ncharacterization and avoid introducing extrinsic factors that could confound the\nexperimental conclusions, we followed the reviewer’s suggestion and conducted\ntemperature-dependent electrical measurements to further elucidate the conduction\nmechanism of the device. As discussed in Figure R2, the physical structure difference\nbetween the MoS FGT and the control MoS transistor lies in the presence or absence\n2 2\nof the floating gate layer. We performed low-temperature measurements on both types\nof devices under identical conditions. Figure R6 presents the transfer characteristics of\nboth devices under low temperatures and different bias conditions. At the lowest\nmeasured temperature of 40 K, the MoS FGT still exhibits a pronounced hysteresis. In\n2\ncontrast, the hysteresis window of the MoS transistor is reduced by more than an order\n2\nof magnitude and becomes nearly negligible, especially under lower gate voltages.\nThis comparison clearly demonstrates that the floating gate structure plays a dominant role\nin the hysteresis behavior, as opposed to effects from sulfur vacancies. Combined with\nour earlier energy band diagram analysis, this result further confirms that carrier\ntrapping in the floating gate is the primary origin of the transport mechanism.\nFollowing the reviewer’s suggestion, we have included these results in the revised\nsupplementary information Figure S4.\nFigure R6. Transfer characteristics of the (a) MoS FGT and (b) the MoS transistor\n2 2\nmeasured at a low temperature of 40 K. Extracted hysteresis windows of the (c, e) MoS\n2\nranges.\n10. Can the authors provide and explain a physics-based model of the current-voltage\nbehavior of a single device?\nResponse: We thank the reviewer for pointing this out. We would like to reiterate that\n)A(\nI\nc\nd\n)V(\nsiseretsyH\ne\n1\n1\n)V(\nsiseretsyH\n− 5 1 0\n− 7 1 0\n− 9 1 0\n− 1 1 0\n− 1 3 0\n− 1\n1 1 0\n0 1 0\n− 1 1 0\n− 2 1 0\n0\n1 2\n1 0\n8\n6\n4\n2\n0\n0\nM\ns\ng\no S F G 2\n− 5\nw e e p ra n g\n± 2 V\n± 4 V\n± 6 V\n± 8 V\n± 1 0 V\n5 0 1\nT e\n3 0 0 K 2 8 0 K 2 6 0 K\n2 4 0 K\n2 2 0 K\n2 0 0 K\n1 7 5 K\n1 5 0 K\n1 2 5 K\n1 0 0 K\n7 0 K\n4 0 K\ng\nT\ne\n0m\nw\n0\np\n4e\nV\n1e\ne\ng\n5r\np\n0\n(\n0a\nV\n2\nt u\n6r\na\n)\n0r\nn\n0e\nT = 4 0 K\nV s w e e p ra n g e g\n± 2 V\n± 4 V\n± 6 V\n± 8 V\n± 1 0 V\n5 1\nM o S F G T\n2\n2 5 0 3 0 0\n( K )\nM o S F G T 2\n8 1 0\ng e ( V )\n0\n)A(\nI\nd\nf\nd\n)V(\nsiseretsyH\n)V(\nsiseretsyH\n1\n1\n1\n1\n1\n0\n0\n1\n1\n0\n0\n0\n−\n−\n1\n1\n0\n0\n1\n1\n0\n0\n0\n0\n0\n− 5\n− 7\n− 9\n1 1\n1 3−\n1\n1 0\n0 0\n− 1\n− 2\n0\n.2\n.0\n.8\n.6\n.4\n.2\n.0\n0\nM o S tra n s 2\n− 5\ns w e e p ra n g e g\n± 2 V\n± 4 V\n± 6 V\n± 8 V ± 1 0 V\n5 0 1 0\nT e m\n3 0 0 K 2 8 0 K 2 6 0 K\n2 4 0 K\n2 2 0 K\n2 0 0 K\n1 7 5 K\n1 5 0 K\n1 2 5 K\n1 0 0 K\n7 0 K\n4 0 K\ng\nis to r\nV\n0 1\np e\n4e\ne\n0\n(\ng\n5 0\nr a\np\nV )\nM\n2 0\nt u r\nM\n6r\na n\nTV\no\n0e\no\ng\n= 4 0 K\ns w e e p ra n g e g\n± 2 V\n± 4 V\n± 6 V\n± 8 V\n± 1 0 V\n5 1\nS tra n s is to r\n2\n2 5 0 3 0 0\n( K )\nS tra n s is to r 2\n8 1 0\ne ( V )\n0\nthe main focus of this work is the realization of photo-electronic synergistic responses\nin solid-state electronic devices for emulating associative plasticity, rather than\nestablishing a detailed physical model of the device, which could be a standalone topic\non its own.\nNevertheless, following the reviewer’s suggestion, we have provided a physics-based\nmodel explanation based on recent works [6] published in the specialized journal for a\nsingle floating gate transistor device. Specifically, we used Fermi–Dirac statistics to\ncalculate the carrier density and employed the drift–diffusion equation to model the\nchannel current, serving as the basis for the transistor model. For the floating-gate\nstructure, a floating-gate charge storage model was constructed based on the FN\ntunneling mechanism and Maxwell’s equations. The Lambert W function was also used\nfollowing methodologies reported in previous literature. Additionally, we also provided\na subset of the parameters used in this work, while the remaining parameters are kept\nconsistent with those reported in the literature. The current-voltage characteristics of\nthe single-device model and the experimental results are shown in Figure R7.\nFigure R7. (a) Parameters used in the model and (b) comparison of the modeling and\n1\n1\n1\n1\n1\n0\n0\n0\n0\n0\n−\n−\n− 5\n− 7\n− 9\n1 1\n1 3−\n1 0 − 5 0\nE\nM\nx p e rim\no d e lin\n5\neg n ta l\n1 0\n)\nA\n(\nd\nI\na\nP A R A M E T E R S\nL , c h a n n e l le n g th\nW , c h a n n e l w id th\nT b lo c k in g o x id e th ic k n e s s\nox1,\nT tu n n in g o x id e th ic k n e s s ox2,\nε d ie le c tr ic c o n s ta n t\nox,\nμ e le c tro n m o b ility n ,\nφ F G w o r k fu n c tio n\nA u ,\n c h a n n e l w o r k fu n c tio n c,\n1\n6 μ m\n2 0 μ m\n2 2 n m\n7 n m\n1 5\n2 0 c m / V\n5 .1 e V\n3 .3 1 e V\ns\nb\nV\ng\n( V )\nexperimental current–voltage characteristics for floating gate transistors.\nReviewer #2 (Remarks to the Author):\nThe authors have adequately addressed the reviewer comments and revised the\nmanuscript accordingly. I find it acceptable for publication.\nResponse: We appreciate the reviewer’s positive comments.\nReviewer #3 (Remarks to the Author):\nThe authors have adequately addressed the comments, and I recommend the revised\nmanuscript for publication.\nResponse: We appreciate the reviewer’s positive comments.\nReference\n[1]. Yang, R., Li, H., Smithe, K.K.H. et al. Ternary content-addressable memory with\nMoS transistors for massively parallel data search. Nat Electron 2, 108–114 (2019).\n2\n[2]. M. Pešić, U. Schroeder, S. Slesazeck and T. Mikolajick, Comparative Study of\nReliability of Ferroelectric and Anti-Ferroelectric Memories, IEEE Transactions on\nDevice and Materials Reliability, 18, 2, 154-162, (2018).\n[3]. Chao Hu, Lijuan Liang, Jinran Yu, et al. Neuromorphic Floating-Gate Memory\nBased on 2D Materials. Cyborg Bionic Syst. 2025; 6: 0256.\n[4]. S. P. Wang, C. L. He, J. Tang, et al., New Floating Gate Memory with Excellent\nRetention Characteristics. Adv. Electron. Mater. 2019, 5, 1800726.\n[5]. J. -M. Choi, E. -J. Park, J. -J. Woo, et al., A Highly Linear Neuromorphic Synaptic\nDevice Based on Regulated Charge Trap/Detrap, IEEE Electron Device Letters, 40, 11,\n1848-1851 (2019)\n[6]. Z. Wu et al., A SPICE Model for Ambipolar 2-D-Material Photoelectric Floating\nGate Field-Effect Transistors, in IEEE Transactions on Electron Devices, doi:\n10.1109/TED.2025.3584749."}, {"round": 3, "reviewer_comments": {"reviewer_1": "The authors have adequately addressed the comments and have revised the manuscript accordingly. The manuscript can\nbe accepted for publication in its current state."}, "author_response": ""}]

Decision letter