Fully integrated hybrid multimode-multiwavelength photonic processor with picosecond latency

Domain: physics
Published: 2025-12-18
Editorial outcome: minor_revision

Abstract
High-speed signal processing is crucial for increasing the data throughput in next-generation communication systems, including multiple-input multiple-output (MIMO) networks, emerging 6G architectures, and beyond. However, system scaling inevitably increases hardware complexity, computational demands, and the challenges associated with digital signal processing (DSP). The physical limitations of electronic processors constrain computational throughput and increase DSP latency, creating a critical bottleneck. Photonic processors offer a compelling alternative, with inherent advantages of broad bandwidth, low loss, massive parallelism, and ultralow latency. Nevertheless, their scalability has been hindered by integration challenges, large device footprints, and on-chip multiplexing limits. Here, we present a scalable, monolithically integrated hybrid photonic processor that simultaneously leverages mode-division and wavelength-division multiplexing. The processor integrates adiabatic mode multiplexers, mode-selective microring resonators, and balanced multimode photodetectors on a single chip. We experimentally demonstrate real-time optical MIMO signal unscrambling at 5 Gb/s and radio frequency signal unjamming in phase-shift keying transmission, performed entirely in the analog optical domain with a processing latency of just 30 ps. This work opens a pathway toward energy-efficient, ultralow-latency processors for future wireless and optical communication networks.

Introduction
Multiple-input multiple-output (MIMO) links are fundamental to today’s high-performance communication infrastructure, supporting increased data rates and enhanced spectral efficiency in both wireless and optical networks1,2. To process high-speed MIMO signals, analog radio-frequency (RF) or optical signals are often converted into digital signals and processed by electronic digital signal processors (DSP)3,4. However, as communication standards evolve toward massive MIMO configurations, DSP throughput and latency have emerged as critical bottlenecks, impeding real-time data processing5,6. These challenges extend to RF signal processing applications, such as interference cancellation7. Electronic processors increasingly struggle to meet the demands of such high-throughput tasks due to inherent limitations including bus latency, power leakage, and signal distortion8,9. Recent advances in photonic processors offer promising alternatives, particularly in compute density (defined as the number of multiply-accumulate (MAC) operations per second per unit area) and energy efficiency (energy consumed per MAC)10,11. Photonic processors offer inherent advantages such as low propagation loss, high bandwidth, and resilience to large fan-in/fan-out configurations12–15. Moreover, photonic interconnects are immune to parasitic resistance and capacitance effects16. Consequently, photonic MAC processors have the potential to achieve attojoule per MAC energy efficiency, picosecond-scale latency, and compute densities exceeding petaMAC per second per mm2, outperforming conventional digital processors12,17,18.

Various photonic platforms have been explored, including those based on discrete components, free-space optics, and integrated photonics19–21. Among these, on-chip photonic processors fabricated using CMOS-compatible processes offer high-density integration, low-latency operation, and energy-efficient, real-time signal processing22. These processors exploit multiple degrees of freedom inherent to light, enabling parallel and distributed processing through time-division multiplexing (TDM), space-division multiplexing (SDM), and wavelength-division multiplexing (WDM). TDM-based photonic processors, for example implemented using high-speed thin-film lithium niobate modulators, offer fast operation but require ultrafast modulation and detection electronics, which introduces synchronization complexity and increases power consumption23. SDM-based architectures, typically implemented with Mach-Zehnder interferometer (MZI) meshes20, provide spatial parallelism but rely on coherent interference, making them highly sensitive to phase fluctuations. Furthermore, MZI-based designs are bulky and require extensive control parameters, limiting scalability. In contrast, WDM-based processors, which utilize microring resonators (MRRs) or crossbar arrays, offer incoherent, phase-insensitive operation with compact footprints12,24. However, their scalability is constrained by the finite free spectral range (FSR) of MRRs, which limits the number of usable wavelength channels to fewer than 14811,25. Despite the diversity of multiplexing strategies, on-chip photonic processors continue to face scalability challenges, especially for large-scale applications such as massive MIMO signal processing.

Recent interest in hybrid multiplexing approaches provides a promising path to enhancing both scalability and throughput. Here, throughput refers to the number of operations performed per second, where each MAC operation comprises a multiplication and an addition. Combining WDM with mode-division multiplexing (MDM) enables scaling of WDM-based processors beyond the MRRs FSR-imposed limit, while preserving the advantages of WDM. MDM further boosts processing capacity by exploiting orthogonal spatial modes within a single waveguide. In a hybrid MDM-WDM architecture, n WDM wavelength channels can be reused across m MDM spatial modes, effectively scaling capacity to m × n. However, practical implementation of multimode systems poses significant challenges. Variability in mode confinement, mode coupling, and eigenmode propagation across different devices can lead to intermodal crosstalk, loss, and increased design complexity, particularly in mode switching and routing26. While previous works have explored hybrid MDM-WDM in fiber-based photonic beamformers27, these systems remain off-chip and lack monolithic integration. On-chip MDM photonic processors based on single-mode all-pass MRRs and MZIs have also been proposed28,29, but they offer limited functionalities and multimode compatibility. Specifically, they do not support negative weighting or direct multimode addition; instead, mode signals must be demultiplexed and individually detected before summing the photocurrents, defeating the purpose of MDM and complicating single-chip integration. Moreover, MZI-based systems lack WDM compatibility and employ passive multimode combiners, whose outputs are highly dependent on phase and amplitude of input signals, necessitating additional phase-shifting and calibration circuitry.

In this work, we present a monolithically integrated, fully functional MDM-WDM-compatible processor. This processor addresses the WDM scalability limits imposed by the FSR of MRRs30. The processor architecture (Fig. 1) comprises an adiabatic mode multiplexer (MUX), a mode-selective MRR array, and multimode balanced photodetectors (PDs). Inputs are encoded onto different combinations of wavelength and mode channels, allowing wavelengths to be reused across spatial modes. The MDM-WDM weight banks are made mode-selective by tuning the bus waveguide width and wavelength-selective by adjusting the ring radius. The weighted signals are then summed optically at the balanced multimode PD. Our design overcomes the limitations of previous works by fully integrating mode-selective, WDM-compatible MRR weight banks with multimode germanium PDs in a balanced configuration on a single-chip. This allows direct mode weighting and addition of signals across both wavelength and modes domains while supporting positive and negative weights. The adiabatic mode multiplexer further relaxes fabrication tolerances by eliminating stringent requirements on selective mode coupling. We experimentally demonstrate two proof-of-concept MAC processors: one with 2 modes and 2 wavelengths, and another with 4 modes and 1 wavelength. While the total number of channels is limited to 4, these demonstrations validate the scalability of MDM-WDM approach and highlight its potential for future large-scale, high-speed, and real-time signal processing.

As the channel capacity of transmission links approaches the nonlinear Shannon limit, the demand for increased capacity necessitates a paradigm shift. MDM, particularly in multimode fiber (MMF) combined with MIMO techniques, holds great promise. However, traditional MIMO systems often experience mode scrambling caused by modal dispersion, scattering, mode mixing, diffraction loss, and crosstalk–all of which significantly complicate signal reconstruction at the receiver31–33. Our fully integrated MDM-WDM-compatible photonic processor overcomes these challenges by enabling direct, arbitrary access to individual modes and wavelengths, supporting reconfigurable, real-time unscrambling of mixed-mode signals in massive MIMO links. As a proof of concept, we demonstrate real-time unscrambling of two spatial modes at a bit rate of 5 Gb/s with an optical processing latency of just 30 ps. We also demonstrate a scalable RF signal unjamming application using the same architecture, with a processing bandwidth of 2.5 GHz. To our knowledge, this is the first monolithic, fully integrated MDM-WDM photonic processor capable of direct negative and positive mode weighting and mode addition via integrated multimode balanced photodetectors. Furthermore, the processor achieves approximately 4.1 times higher throughput compared to traditional WDM processors where outputs of multiple processor instances are electrically connected. This work establishes a compelling foundation for the next generation of scalable, energy-efficient, and high-speed photonic processors for advanced signal processing tasks.

Results
Multimode photonic processor
Figure 1 illustrates the architecture of the MDM-WDM-compatible on-chip photonic processor. The system comprises three key components: an adiabatic mode multiplexer, mode-selective MRRs, and balanced multimode photodetectors. A microscope image of the fabricated processor, along with the measured performance of each component, is shown in Fig. 2. To realize hybrid multiplxing, all photonic devices must simultaneously support both multimode and multiwavelength operation. Accordingly, each component is engineered to optimize modal loss, crosstalk, and responsivity. The adiabatic directional coupler, used as the mode multiplexer, features a gradually varying waveguide width to support robust mode operation. The index-matching point lies at the midpoint of the coupler (see Supplementary Section S1). This design offers two principal advantages: (1) it guarantees an index-matched coupling point that compensates for fabrication variations34, and (2) it suppresses back-coupling of higher-order modes into the fundamental mode at the input. Since the coupler relies on index matching to convert the input single mode into a higher-order mode, all other modes in the multimode waveguide pass through unaffected. The full multiplexer/demultiplexer (MUX/deMUX) stage is realized by cascading adiabatic couplers. Figure 2a shows the mode MUX/deMUX layout. We characterized the insertion loss and crosstalk by launching light into each input port and measuring transmission spectra at each output port of back-to-back connected identical multiplexers. As shown in Fig. 2b, the MUX/deMUX exhibits broadband operation over a 40 nm range, with measured insertion losses of 1.9 dB, 1.5 dB, 1.5 dB, 3 dB and maximum crosstalk of 33 dB, 28 dB, 28 dB, 26 dB for TE0, TE1, TE2 and TE3 modes, respectively. The design parameters are summarized in Table S1 in the Supplementary information. As a proof of concept, we implemented a four-mode MUX/deMUX. While our demonstration is limited to four modes, similar devices supporting up to 10 modes with comparable performance have been reported35. Increasing the number of supported modes typically requires wider waveguides and more complex mode multiplexers, which increases chip area. However, this overhead can be mitigated by using inverse-designed photonic components36, which have been shown to significantly reduce the footprint of mode multiplexers37.

The weight bank in the processor consists of an array of MRRs, each designed for both mode and wavelength selectivity (Fig. 2d). Unlike conventional single-mode MRRs, each ring is uniquely defined by a specific bus waveguide width (for mode selectivity) and ring radius (for wavelength selectivity)38. Using mode index dispersion curves, the rings are carefully engineered to strongly couple only the desired mode. This architecture allows all n WDM channels to be reused across m spatial modes, effectively scaling the WDM weight bank capacity by a factor of m. The practical scalability limit is determined by factors such as chip area, MRR insertion loss, and the number of required MRR drivers. Excessive insertion loss can lower the optical signal power at the photodetector to near the noise floor, reducing accuracy. While scaling to n × m MRRs may increase optical losses and control complexity, these limitations can be mitigated through the co-integration of driver electronics and the use of higher optical input power. Each MRR has a thermal tuner that adjusts its resonance frequency to set the desired weight. While thermal tuning consumes power (typically in the milliwatt range), it could be more energy-efficient than DSP approaches, depending on the scale of the system39,40. These advantages stem from the inherently low resistive and capacitive effects in photonic circuits, enabling high bandwidth and energy efficiency independent of signal frequency, unlike in DSP systems. Moreover, energy efficiency can be further improved by adopting alternative non-volatile tuning mechanisms, such as phase change materials17 or photochromic materials41, but require post-fabrication processing. Further details on the ring design are provided in Supplementary Section S2.

Measured through and drop port responses for two weight bank configurations—2-mode/2-wavelength and 4-mode/1-wavelength—are shown in Fig. 2e, f, respectively. The results confirm that each ring couples selectively to the correct mode and wavelength. However, we observe finite modal crosstalk between the TE2 and TE3 modes. In particular, the drop spectra of TE2 and TE3 show minor peaks aligned with each other’s main resonances. Additionally, the extinction ratios for these two modes are reduced, which we attribute to an overestimation of the coupling coefficient between the bus waveguide and the ring. While the weights remain functional, future designs can improve extinction by increasing the coupling strength.

To realize the photonic processor, we integrated a balanced multimode PIN germanium-on-silicon vertical photodetectors (BPD) at the output of the through and drop multimode waveguides (Fig. 2g). For efficient multimode operation, the BPD are designed (see Supplementary Section S3) with two off-centered metal contacts on the N-doped region, reducing attenuation near modal power peaks and improving responsivity across modes42. Each detector has an active area of 10.6 μm × 27.2 μm, with measured responsivities ranging from 0.83 to 1.05 A/W for TE0 through TE3 modes (Fig. 2h). The bandwidth of the multimode photodetector is consistent across modes, measured between 16 and 17 GHz (Fig. 2i). The measured eye diagrams (Fig. 2j) validate high-speed operation of the PD across all modes. More generally, optimized PIN germanium-on-silicon vertical photodetectors can achieve >50 GHz bandwidths through dimension optimization and inductive peaking42,43. In summary, we demonstrate a fully integrated MDM-WDM-compatible on-chip photonic processor with two configurations: 2-mode/2-wavelength and 4-mode/1-wavelength (Fig. 2c). The processor incorporates mode multiplexers, mode-selective microring weight banks, and balanced multimode photodetectors, providing a reconfigurable, high-speed platform for real-time signal processing across a broad range of applications.

Optical signal unscrambling
In optical MIMO links that utilize multiple spatial modes, effects such as fiber bending, modal dispersion and scattering induce mode scrambling, which distorts transmitted signals and significantly increases the bit error rate (BER). The BER is further influenced by factors including input power, intersymbol interference, and mode-dependent loss44. These degradations are particularly pronounced at higher baud rates, resulting in elevated BER and reduced transmission capacity. Conventional MIMO-based communication systems rely on complex DSP to recover the original signals, leading to increased latency, power consumption, and hardware complexity45–48. In contrast, our photonic processor enables real-time unscrambling of high-speed MIMO signals entirely in the analog optical domain. Unlike prior photonics systems, which typically required demultiplexing of signals into separate detectors followed by summation of their output currents28, our processor features integrated multimode photodetectors that allow direct on-chip processing of scrambled multimode signals. Additionally, our processor accepts inputs natively in the mode domain, eliminating the need to convert all multimode signals to the fundamental mode prior to processing. Together, the use of mode-domain inputs and integrated multimode PDs allows for full system integration and eliminates the need for complex external signal handling.

As a proof of concept, we experimentally demonstrate real-time unscrambling of two modes, TE0 and TE1, at data rates of 5 Gb/s. Using an arbitrary waveform generator (AWG), we emulated the scrambling that occurs in multimode fiber transmission in a controlled fashion by applying predefined scrambled modulation to the original signals. The scrambling of MIMO signals can be modeled by a scrambling matrix A. We scrambled two raised cosine non-return-to-zero (NRZ) pseudorandom binary sequence (PRBS) signals of length 213-1. The signals were modulated onto TE0 and TE1 spatial modes at the same wavelength using Mach-Zehnder modulators (MZMs).

The scrambled signals are then input to the 2-mode, 2-wavelength photonic processor for real-time unscrambling. Signal recovery is achieved using pilot signals, known sequences transmitted alongside the data, which are used to estimate the scrambling matrix A49. The processor performs matrix-vector multiplication (MVM) by applying the inverse of the scrambling matrix A−1 through the mode-selective MRR weight bank, followed by signal summation at the multimode PDs. Details of the scrambling matrix estimation and experimental setup are provided in the Methods Section and Supplementary Section S4. Unlike conventional DSP approaches, our system processes signals directly in the analog optical domain, enabling high parallelism, low latency, wide bandwidth, and low energy consumption within a compact footprint. Furthermore, this MDM-WDM architecture operates incoherently, eliminating the need for phase tuning and avoiding phase instability and interference issues common in coherent MVM systems.

Figure 3 shows eye diagrams of the original, scrambled, and recovered signals. The scrambled signals at 5 Gb/s exhibit closed eyes, corresponding to a theoretical BER of 50%. After applying the inverse scrambling matrix using the thermally-tuned MRR weights, the recovered signals exhibit clear eye-opening (Fig. 3a), with measured BERs of 2.6 × 10−5 and 5.7 × 10−6 for the TE0 and TE1 channels, respectively, at an input power value of −6 dBm. Figure 3b shows the estimated BER as a function of input power for both modes. The TE0 and TE1 modes exhibit power penalties of approximately 6 dB and 4 dB, respectively, at the input power value of −6 dBm. These penalties are primarily attributed to modal crosstalk and limited bit precision in the microring weight settings. Performance can be further improved by optimizing device design and fabrication. Once the weights are configured, the processor operates entirely in the optical domain, with an estimated optical processing latency of 30 ps—the time it takes for the optical signal to propagate through and be processed by the circuit. This low latency makes our processor well-suited for high-speed real-time communication and signal processing applications.

RF signal unjamming
To demonstrate the versatility of our system, we performed RF signal unjamming using blind source separation (BSS). Noisy RF interference is a major challenge in modern communication systems, particularly with the expansion of telecommunications as emerging wireless telecommunication signals are squeezed into limited frequency bands, leading to spectral congestion40. MIMO wireless links are especially vulnerable to interference, such as that caused by coexistence conflicts between radar altimeters and 5G cellular networks operating in overlapping frequency bands7. While digital post-processing methods have shown effectiveness for interference cancellation in low-speed, narrowband applications, they face serious limitations at gigahertz operating frequencies, including increased latency, reduced energy efficiency, and scalability issues. Moreover, conventional interference mitigation techniques often require prior knowledge of the signal format and data rate—an increasingly impractical assumption as communication systems evolve toward higher carrier frequencies, broader bandwidths, and more diverse modulation schemes. In contrast, our fully integrated photonic processor—featuring a mode-selective microring weight bank and integrated multimode photodetectors—enables on-chip, scalable, and low-latency BSS with wideband processing capabilities. This architecture provides a promising path forward for high-performance wireless technologies. Critically, BSS does not require knowledge of the modulation format or communication standard. It operates under the assumption that source signals are statistically independent and non-Gaussian, making it inherently modulation-agnostic and broadly applicable to a wide range of wireless communication environments18.

The block diagram for the RF signal unjamming experiment is shown in Fig. 4a. We emulate the mixing of a target signal and a jamming signal, analogous to those received from the MIMO antennas, using two channels of an AWG. These signals are fed into two MZMs operating at the same wavelength. The resulting optical signals are encoded onto the TE0 and TE1 mode channels of our 2-mode, 2-wavelength photonic processor.

The target signal is a phase-shift keying (PSK) waveform, modulated onto a 2.565 GHz carrier. The jamming signal is a broadband interferer composed of random samples drawn from a continuous uniform distribution. The resulting mixed signals can be modeled as X = AS, where A is the unknown mixing matrix, S is the matrix whose rows represent the original signals and the jammers, and X is the matrix whose rows represent the observed mixed signals. By applying the inverse of the mixing matrix, A−1, the original signal can be recovered via S = A−1X. We implemented BSS using our integrated multimode photonic processor as an efficient method to implement the inverse mixing matrix and cancel interference with minimal prior knowledge about the communication link50.

To experimentally recover the original PSK signal, we first recorded the received data from each mode channel at the multimode photodetectors. We then performed offline independent component analysis (ICA) using the FastICA algorithm51,52 in Python to estimate the unknown mixing matrix (see Methods). The inverse of this matrix was subsequently implemented on-chip by thermally tuning the weights of the MRRs. In our experiment, the same processor is used twice; first, with the MRRs programmed to the first row of the inverse matrix A−1 to recover the desired signal sPSK; and then reprogrammed with the second row to recover the jamming signals sJ. However, in this specific application, recovering sJ is not necessary for system functionality.

Figure 4b shows the constellation diagrams of the jammed and unjammed binary PSK (BPSK) and quadrature PSK (QPSK) signals, along with their corresponding measured Q-factors. Following the application of BSS-based unjamming, a marked reduction in constellation noise is observed, with Q-factor improving from 3.7 to 6.0 for BPSK, and from 2.9 to 5.3 for QPSK. It is important to note that the relationship between Q-factor and BER is nonlinear and governed by the complementary error function (erfc). For example, a Q-factor improvement from 2.9 to 5.3 in QPSK corresponds to a BER reduction from approximately 1.87 × 10−3 to 5.79 × 10−8, representing an improvement of nearly five-orders-of-magnitude. Notably, these BER values are achieved without any error correction. With the addition of standard forward error correction (FEC) techniques, the BER can be further reduced to below 10−1853.

The BSS algorithm used here relies on kurtosis analysis, making it suitable for both coherent and incoherent communication systems, regardless of carrier frequency, modulation format, or channel conditions. Our demonstration validates the real-time separation of desired and jamming signals across a broadband spectrum, enhancing efficient data transmission in MIMO RF links. While this work focuses on introducing a scalable photonic processor architecture through hybrid multiplexing, future iterations could incorporate adaptive BSS control. Prior studies have shown that BSS computation and reprogramming can be completed at rates up to 305 Hz using FPGA-based control with integrated monitoring40, enabling adaptation on millisecond-timescale. Such reconfiguration speeds are sufficient for real-world applications, including mitigation of 5G interference in radar altimetry and interference cancellation in the crowded 2.4 GHz band. These findings suggest that future integration of FPGA-based control could enable dynamic, real-time adaptation of our photonic processor in rapidly changing wireless environments.

Methods
Pilot signaling
In an optical MIMO transmission system where multiple mode channels are employed, different signals encoded on different modes experience mixing upon propagation as follows:

X = AS, (3)

where S is the matrix whose rows represent the original signals, X is the matrix whose rows represent the corresponding mixed signals, and A is the mixing matrix representing the channel. The original signals can be recovered by applying the unmixing matrix, which is the inverse of the mixing matrix, to the mixed signals as follows:

S = A−1X = WX, (4)

where W is the unmixing matrix. However, this unmixing matrix is unknown. One effective approach to estimate the unmixing matrix is to use pilot signals, which are known a priori symbols inserted at regular intervals in the transmitted data stream. In this scheme, pilot symbols of length P are inserted every D data symbols, forming a transmission frame of total length Lf = P + D and resulting in an overhead of P/(P + D).

For example, in a two-mode transmission system, two original signals s1 and s2 can be recovered from two mixed signals x1 and x2 by transmitting four pilot symbols over two sets. In the first set (p1), pilot symbols s1p1 and s2p1 are transmitted simultaneously on their respective mode channels. In the second set (p2), pilot symbols s1p2 and s2p2 are transmitted. The corresponding received mixed signals are x1p1, x2p1, x1p2, and x2p2. By expanding equation (4), we obtain:

(s1) = (w11 w12) (x1), (5a)
(s2) (w21 w22) (x2)

then we substitute by the transmitted pilot symbols and the corresponding received symbols:

s1p1 = w11x1p1 + w12x2p1, (5b)
s2p1 = w21x1p1 + w22x2p1, (5c)
s1p2 = w11x1p2 + w12x2p2, (5d)
s2p2 = w21x1p2 + w22x2p2, (5e)

where wij are the elements of the unmixing matrix W. By solving Eqs. 5b–e simultaneously, all four elements of W can be estimated. Once the unmixing matrix is known, the original signals can be recovered using Eq. (4). In general, for a transmission system with m mixed signals, at least m2 distinct pilot symbols are required to estimate the full unmixing matrix.

Blind source separation
BSS is a powerful technique used to unmix any statistically independent mixed signals without prior knowledge about the signals. According to the central limit theorem, the Gaussianity of the mixed signals is always higher than that of the original signals. Therefore, the BSS algorithm searches for the unmixing matrix that maximizes the non-Gaussianity of the unmixed signals. Kurtosis is the metric used to quantify non-Gaussianity, and it is given by:

K[si] = E[(si − μi)4] / σi4 − 3, (6)

where K is the kurtosis of the signal si and μi and σi are its mean and standard deviation, respectively. The kurtosis of a Gaussian distribution is zero. For BSS, it is often desirable to whiten the received signals by uncorrelating them, zeroing their mean, and normalizing their variance. This whitening process ensures that the vectors of the unmixing matrix are orthogonal.

Starting from the received mixed signals x1 and x2 resulting from mixing original signals s1 and s2:

Xw = X − E[X] / E[X], (7)

where X is a matrix with rows representing the mixed signals, x1 and x2, while Xc is a matrix containing the corresponding mixed signals that have been centered (i.e., with zero mean). The centered signals are then uncorrelated and their variance is normalized as follows:

Xw = V D−1/2 VT Xc, (8)

where Xw denotes the matrix whose rows represent the whitened mixed signals, D is the diagonal matrix containing the eigenvalues of the covariance matrix of the centered signals, and V is the matrix of eigenvectors of the covariance matrix of the centered signals. Since the original signals s1 and s2 are uncorrelated, we can deduce that the vectors of the unmixing matrix are orthogonal:

Cov[ssT] = E[ssT] = 0 = E[(wXw)(wXw)T] = wE[XwXwT]wT = wwT, (9)

where w1 and w2 are the rows of the unmixing matrix W that are used to recover s1 and s2 from the whitened received signals, respectively. It is noteworthy that we assume the mean of the original signals to be zero, so the recovered signals will have zero mean.

Finally, to recover the original signals, we begin with random vectors w1 and w2, then iteratively optimize them using gradient ascent until convergence to a maximum kurtosis as follows:

K[s] = K[wXw] = E[(wXw)4] − 3, (10a)

where wXw is maintained at zero mean and unit variance during optimization. The gradient of this kurtosis is obtained as:

∂K / ∂w1 = 4E[(w1Xw)3 Xw], (10b)

and w1 updater rule is formulated as:

wj+1 = wj + 4ηE[(w1Xw)3 Xw], (10c)

where j represents the index of the optimization iteration and η is the learning rate.

Since w1 and w2 are orthogonal due to whitening the received signals (Eq. (9)), we can find w2 using the relation:

w2 = w2 − (w2w1T)w1, (11)

The original signals are then recovered using the optimized weight vectors as follows:

s1 = w1Xw, (12a)
s2 = w2Xw, (12b)

Peer review rounds
[{"round": 1, "reviewer_comments": {"reviewer_1": "In this work the authors present their results on a new approach to multiplexing both mode and wavelength information using a broadcast and weight ring-based architecture. This includes the design of multimode and broadband micro rings, couplers, and photodetectors. While the results are interesting and the topic is timely, the manuscript has several issues which lead to confusion and should be addressed before considering publication:\n1. The biggest issue with this work is the lack of a clearly defined motivation. The authors motivate the work by claiming that adding an additional degree of freedom will improve the throughput. This is of course true, but throughout the work it is very confusing what mathematical function is actually being implemented. The authors characterize a 2 wavelength x 2 mode device as well as a 1 wavelength x 4 mode device. However, since these two designs both only have a single balanced photodetector at the output, they can both only implement a dot-product between two 4-element vectors. This function is the same as many of the previous works by the authors (e.g. 10.1038/s41598-017-07754-z). Thus, both wavelengths and modes are both summed on the same balanced photodetectors which mainly just reduces capacitance (as emphasized in Figure 5). From my understanding, the biggest issue that this multimode-wavelength architecture could potentially address is the crosstalk/FSR limitation that a broadcast and weight architecture typically faces when attempting to scale many rings on the same bus. The authors have several previous works which analyze the crosstalk between rings due to Q-factor and FSR. However, the authors do not discuss this at all in the motivation. Thus, the authors should be much clearer in their motivation as to what issues this new approach actually solves.\n2. Relatedly with the above concern, the authors report that they use a 2 wavelength x 2 mode device to perform blind source separation in Figure 4 (page 6, line 205). However, their photonic circuit drawn in Figure 4a shows two 1 wavelength x 2 mode devices. This is indeed necessary to perform signal recovery on both “S” and “J”, but this requires two pairs of balanced photodetectors which is clearly different from the device they characterized in the prior experiments. This should be resolved in the text and figure.\n3. There are obviously some challenges in fabricating micro-rings which are both wavelength and mode addressable (which the authors do a nice job achieving). However, it appears that the ratio between the power at the drop ports and through ports differs quite significantly from TE0 to TE3 (see Figure 2f) for the 1 wavelength x 4 mode device. How do the authors propose to set equal weights between -1 to +1 for all modes simultaneously if all modes share a common detector? The detector also has a slightly different responsivity for each mode which would seem to compound this problem.\n4. The reported Q-factors in the text do not match those in the titles of Figure 4b for the QPSK BSS experiments.", "reviewer_2": "The current work lies in the field of integrated photonic processors for performing linear optical processes for unscrambling signals. The main focus of the work is to develop a scalable processor that can apply multiple parallel weights in a single \"bus\" waveguide, with mode-plus-wavelength selectivity. Specifically, the current work presents the design and development of adiabatic mode-multiplexers in a single waveguide, rings with different waveguide-mode and a multimode photodiode. The work is inline with current trends on developing photonic processors for MIMO processing and unscrambling/jamming operations, while cleverly introducing SDM/Mode division Multiplexing.\nThe work can be possible proposed as suitable for publication, pending some major reviews.\n1) Despite its claims for scalable processor, the current work presents only a 4x1 and 2x2 operation. Some literature review on recent MIMO / photonics processors can reveals (some indicative only are presented at the end of the review) that 4x1 or 3x3 operations have been already demonstrated, with even higher transmissions metrics. Therefore, it would be recommended to try to provide a clearer overview of the existing works and body of knowledge.\n2) The reviewer is wondering how were the inverse identified and applied? (Quoting text: \"By sending pilot signals [46], which are a set of signals known a priori by the receiver, we are able to estimate the scrambling matrix\"), Are the pilot tones considered to be transmitted separately/sequentially, in order to identify the proper weights. How is it normally applied in the envisioned scenario?\n3) According to the reviewers understanding the rings can only apply amplitude tuning, while all signals are simply added at the multimode-PD. Is there any phase-tuning / interference considered?\n4) It is proposed to provide a clearer description and elaboration on their statemenet that \"Typically, the scrambling is mode-dependent and Baud rate-dependent, which has a substantial impact on system performance and bit error rate (BER).\". Does this refer to the electronic DSP processing?\n5) Please elaborate more on the FastICA python packaged deployment and how the values of the weights for the matrix A-1 have been defined? Was it performed offline using the captured measurements or real time? Does the process assume the transmission of PSK signals for X or S, before identifying the weigth vectors?\n6) The reviewer is wondering if the use of term \"real-time processing\" is the correct term. The term is usually used in scenarios where system level traffic is provided by realistic devics, rather than laboratory equipment such as AWG and pattern generators.\n7) In Fig. 2(h), there are photocurrent measurements on each mode separately. Is there a characterization of the PD in combined 2-mode, 3-mode, and 4-mode operation? Moreover, an experimental characterization of the PD in terms of in terms of bandwidth would also be useful\n8) Although the reviewer appreciates the novelty, one of his concerns is the limited performance improvement provided by the processor. For instance, the BER is improved only by 1 or 2 orders of magnitude (e.g. from 10-3 --> 10-4) or from already classified constellation diagrams with Q from 2.9 to 5.3.\nOverall the work is interested and impressive, though some better elaboration of its operational characteristics, scalability and comparison with state of the art would be worthy of being included.\nIndicative References\n[A] P.M.C. Romero, et. a;. \"Integrated Microwave Photonics Coherent Processor for Massive-MIMO Systems in Wireless Communications,\" IEEE JSTQE 29 (6), 6101112, Dec. 2023\n[B] C. R. Doerr, \"Proposed Architecture for MIMO Optical Demultiplexing Using Photonic Integration,\" IEEE PTL 23 (21), 1573, Nov. 2011\n[C] R. Tanomura, et. a;, \"All-Optical MIMO Demultiplexing Using Silicon-Photonic Dual-Polarization Optical Unitary Processor,\" IEEE JLT, 41 (12), 3791 (2023)\n[D] M. Milanizadeh, et. al. \"Separating arbitrary free-space beams with an integrated photonic processor,\" Light: Science & Applications (2022) 11:197\n[E] W. Zhange, et. al. \"A system-on-chip microwave photonic processor solves dynamic RF interference in real time with picosecond latency,\" Light: Science & Applications (2024) 13:14\n[F] X. Zhao, et. al. \"Photonic parallel channel estimation of MIMO-OFDM wireless communication systems,\" Optics Express, 31 (2), 1394, Jan. 2023", "reviewer_3": "The authors present a fully integrated system for photonics assisted signal processing and show its functionality by two very interesting applications, i.e. MIMO channel de-scrambling and RF interference cancellation. The parallel signal processing is enabled by wavelengths and mode multiplexing in few-mode waveguides and photodetectors and by mode selective ring resonators. Compared to spatial multiplexed WDM schemes, the authors have calculated an improvement in the number of operations per second by 4.1 for their approach. This mainly comes from an increased operation speed of their designed multimode photodetector (PD) due to a reduced node and wiring capacitance. The presented chip consists of a multi-mode multi-wavelength coupler, a tunable bank of mode-selective ring resonators, which the authors call: “mode-division multiplex wavelength-division multiplex processor” and the multi-mode PD.\nSuch a real-time, high-speed signal processing of data signals is very important for future wireless and optical communication systems, AI and many other applications. Photonics might offer unprecedented opportunities due to its high-bandwidth, low-latency and potential for low power consumption. Furthermore, the presented results are convincing and very nice. Therefore, I could recommend a publication of the paper in Nature Communications if my following concerns are addressed.\nMy first concern is the scalability. In the conclusion the authors wrote: “…our analysis shows that … the processor can support a very large number of modes and wavelengths.” Up to this point this has not really be discussed and what does “very large” exactly mean? In Fig.2 f I can see that the resonance of the ring resonators is quite low for the third and fourth mode. Additionally, for n modes a bank of ring resonators with m rings for each wavelength is necessary. This line of mxn rings increases the optical insertion loss and each single ring has to be independently thermally tuned for imprinting the weights on the signal, which increases the complexity. So what are the fundamental and especially practical limits for the possible number of modes and number of wavelengths?\nFurthermore, photonics has the potential of a lower energy consumption, and the authors claim a high energy efficiency due to reduced resistive and capacitive effects. But here for each ring a thermal tuning is necessary, which increases the energy consumption and requires more space on the chip to avoid thermal crosstalk. I suggest that the authors elaborate a little bit more on these issues, and if they claim a high energy efficiency, they must include the thermal tuning, or they should propose an alternative.\nIn the title the authors claim a ps latency and for the MIMO unscrambling a total processing latency of 30 ps is mentioned. How has this been measured and how is it defined? As I got it, the weights are pre-adjusted with the look-up table and thermal tuning of the ring resonators. So, until the next pilote tones have measured new weights for the channel, the photonic chip should work real-time, right? So, is the latency the propagation time in the chip? I would not call this latency. Is it instead the propagation time in the chip plus the electronics? If the latter, what’s the contribution of both parts? If it’s the electronics, how much is it compared to a full electronic system? This number would give more insight.\nTogether with latency, the time required to adjust the chip to new weights would be interesting. This is especially a point for the second application when only minimal information on the communication link is given. The presented blind source separation is based on a massive electronic post-processing, which defines the weights for the processor. As long as the channel stays constant after the calculation, this might be ok for a while. But how fast does such a channel really change, especially if the interference comes from an unkind jammer signal and how fast can the chip be adjusted to the new values? How sensitive is the device on environmental changes, or the other way round, how exact must the temperature of the whole chip be controlled? There are athermal ring resonators but normal rings, as used here, are very sensitive. In the presented chip everything depends on the rings and a slight change of environmental temperature may completely change the look-up table. Since every single of the mxn rings is thermally tuned, I could imagine that this is even more severe, due to a heating up of the chip with operation time and an increased thermal crosstalk between the rings. The authors should elaborate a little more on these issues.\nAssuming an increased thermal crosstalk especially for a high number of integrated rings and after a longer operation time, is there a possibility to measure and compensate it, or can it be addressed by different look-up tables for different working times, or do the authors have some other ideas?\nIn my opinion, the phrase “multimode microring resonators” is misleading. The ring resonator itself only supports a single mode and this mode is pre-designed by the bus waveguide width. Therefore, for each mode at each wavelength a single ring resonator is needed in the chip. So, they are rather mode-selective microring resonators.\nIn Fig.2 f there are some second resonance peaks for the drop transmission spectrum of the TE3 mode. They are small, but the primary peaks are small as well. Where do they come from and why aren’t they visible in the through spectra?\nAre the insertion loss and crosstalk numbers in the lines 132 and 133 really linear, or in dB? They should be in dB, since Fig.2 b is in dB as well.\nThomas Schneider"}, "author_response": "We sincerely thank the reviewers for their careful reading of our manuscript and for their insightfulandconstructivefeedback. Theircommentshavebeeninstrumentalinhelpingusimprove\nthe clarity, rigor, and overall quality of our work. In response, we have thoroughly revised the\nmanuscript to address each of the points raised. Below, we provide a detailed, point-by-point reply\nto the reviewers’ comments, highlighting the specific changes made.\nTo ensure clarity in referencing, please note the following: citations within this response letter\nare labeled with an “R” prefix (e.g., [R8]), while references cited in the revised manuscript itself\nappear without any prefix (e.g., [8]). Key modifications made to the manuscript text are marked\nin purple color to facilitate easy identification.\nReviewer 1\nComment: In this work the authors present their results on a new approach to multiplexing\nboth mode and wavelength information using a broadcast and weight ring-based architecture. This\nincludes the design of multimode and broadband micro rings, couplers, and photodetectors. While\nthe results are interesting and the topic is timely, the manuscript has several issues which lead to\nconfusion and should be addressed before considering publication.\nResponse: We thank the reviewer for recognizing the significance of our work. We have carefully\naddressed all concerns and made substantial revisions to strengthen the manuscript. We believe\nthe revised version resolves previous ambiguities and now provides improved clarity for the reader.\nComment 1.1a: The biggest issue with this work is the lack of a clearly defined motivation. The\nauthorsmotivatetheworkbyclaimingthataddinganadditionaldegreeoffreedomwillimprovethe\nthroughput. Thisisofcoursetrue, butthroughouttheworkitisveryconfusingwhatmathematical\nfunction is actually being implemented.\nResponse: Wethankthereviewerfortheconstructivefeedback. Thecoremathematicaloperation\nimplemented by our processor is the dot product of two vectors, expressed as y = w x +w x +\n1 1 2 2\n+w x , where x is the input vector, w is the weight vector implemented in the processor, and\nn n\n···\nn is the dimensionality. This dot product comprises multiply-accumulate (MAC) operations of the\nform y = w x +C .\nk k k k\nCurrent photonic processors employ various multiplexing schemes to implement this function-\nality, including spatial-division multiplexing (SDM) [R1–R3], mode-division multiplexing (MDM)\n[R4,R5], or wavelength-division multiplexing schemes (WDM) [R6]. However, the scalability, and\nconsequently the throughput, of these approaches is fundamentally limited by physical constraints.\nIn SDM-based architectures, interferometric meshes constructed from Mach-Zehnder interfer-\nometers (MZIs) are commonly used. However, these coherent systems are highly sensitive to phase\n1\nfluctuations, and the bulky nature of MZIs limits scalability and throughput. WDM architectures\nofferspectralmultiplexingbutfacefundamentalscalabilityconstraintsduetothefinitefreespectral\nrange (FSR) of mircoring resonators (MRRs), which restricts the number of usable wavelengths\n(and hence weights) at approximately 109-148 [R7]. Existing MDM architectures do not support\nWDM, lack native implementation of negative weights (necessitating post-processing), and rely\non single-mode photodetectors (PD). As a result, mode signals must be demultiplexed and de-\ntected separately, which undermines the benefits of MDM, reduces throughput due to increased\ninterconnect capacitance, and increases complexity in single-chip integration.\nOur processor addresses these challenges by introducing a fully integrated, scalable architecture\nbasedonhybridmultiplexing. BycombiningWDMandMDM,weexploitbothspectralandspatial\ndegrees of freedom. This hybrid scheme enables scaling beyond the fundamental limit set by the\nFSR of MRRs while preserving the key advantages of WDM such as incoherence and compact\nfootprint of MRRs. MDM increases processing capacity by utilizing orthogonal spatial modes in\na single waveguide; in our hybrid MDM-WDM architecture, n WDM channels are reused across\nm MDM spatial modes, scaling capacity to m n. This approach is inherently robust to phase\n×\nfluctuations and benefits from compact integration. Furthermore, our architecture supports native\npositive and negative weights and integrates a multimode photodetector that combines WDM and\nMDM signals on-chip, enabling efficient, scalable, single-chip integration.\nAction taken:\n• We added a clearer motivation to the introduction section and expanded on the limitations of\nthe current SDM, WDM, and MDM architectures. We discussed how the hybrid multiplexing\nof MDM and WDM bypasses these limitations, paving the way for large-scale, high-speed,\nand real-time signal processing applications. Please see lines 59-77 in page 2 and lines 81-101\nin pages 2 and 3 of the manuscript.\n• We added an extra section in the supplementary information where we compare our archi-\ntecture with the state-of-the-art architectures in terms of various operational characteristics.\nPlease see Section S6 in the supplementary information.\nComment1.1b: Theauthorscharacterizea2wavelengthx2modedeviceaswellasa1wavelength\nx4modedevice. However,sincethesetwodesignsbothonlyhaveasinglebalancedphotodetectorat\ntheoutput, theycanbothonlyimplementadot-productbetweentwo4-elementvectors. Thisfunc-\ntion is the same as many of the previous works by the authors (e.g. 10.1038/s41598-017-07754-z).\nThus, both wavelengths and modes are both summed on the same balanced photodetectors which\nmainly just reduces capacitance (as emphasized in Figure 5). From my understanding, the biggest\nissue that this multimode-wavelength architecture could potentially address is the\ncrosstalk/FSR\nlimitation that a broadcast and weight architecture typically faces when attempting to scale many\nringsonthesamebus. Theauthorshaveseveralpreviousworkswhichanalyzethecrosstalkbetween\nrings due to Q-factor and FSR. However, the authors do not discuss this at all in the motivation.\nactually solves.\nResponse: It is correct that our current demonstration features two 4-weight configurations: 1 4\n×\n(1 mode and 4 wavelengths) and 2 2 (2 modes and 2 wavelengths). However, by reusing the\n×\nwavelength channels across modes, the architecture overcomes the scalability bottleneck (N < 109\n- 148) inherent in WDM-only approaches [R7]. This work presents the first proof-of-concept for a\nmonolithically integrated hybrid photonic processor that combines mode- and wavelength-division\nmultiplexing. The novelty of our photonic processor is as follows:\n1. Increased scalability and throughput: By reusing wavelengths across modes, the processor\nsurpasses the limitations of WDM-only systems. The hybrid multiplexing processor achieves\n4.1timeshigherthroughputcomparedtospatialmultiplexingschemesthatcombineWDM\n∼\nweight banks electrically, making it a promising candidate for next-generation large-scale\nphotonic processors.\n2. Single-chipintegration: Ourprocessormonolithicallyintegrateswavelength-andmode-selective\nMRRs, multimode photodetectors, and mode converters on a single foundry-fabricated chip.\nUnlike existing MDM systems, our architecture avoids off-chip demultiplexing and off-chip\nsingle-mode detectors whose photocurrents are summed electrically. This eliminates inter-\nconnect capacitance issues that would otherwise limit throughput (as detailed in Discussion\nsection of the manuscript and supplementary Section S5). Additionally, owing to our bal-\nanced photodetection, our processor supports native negative weighting, eliminating the need\nfor post-processing.\n3. Versatile hybrid photonic processor: Our processor is programmable via tunable weights,\nenabling it to perform a range of functions. It executes dot products (hence matrix–vector\nmultiplication operations) and supports applications such as blind-source separation, tensor\ncore processing, and signal unscrambling.\n4. High processing speed: Our processor achieves a 17 GHz bandwidth, limited by the band-\n∼\nwidth of our photodetectors. This bandwidth can increased by further optimization of the\nphotodetector [R8]. By performing analog-domain computations, it avoids digital-to-analog\n(DACs) and analog-to-digital (ADCs) converters, offering high parallelism, low latency, and\nreduced energy consumption.\n5. Scalable hardware architecture: Prior MZI-based mesh architectures are bulky and highly\nsensitive to phase fluctuations due to their coherent nature, leading to increased control\ncomplexity at scale. In contrast, our MRR-based architecture operates incoherently and\nfeatures a compact footprint, facilitating scalability.\nAction taken:\n3\n• As mentioned in the response to comment 1.1a, we added a clearer motivation to the in-\ntroduction section and expanded on the limitations of the current SDM, WDM, and MDM\narchitectures. We discussed how the hybrid multiplexing of MDM and WDM bypasses these\nlimitations, paving the way for large-scale, high-speed, and real-time signal processing appli-\ncations. Please see lines 59-77 in page 2 and lines 81-101 in pages 2 and 3 of the manuscript.\n• We highlighted that while the number of channels in our demonstrations is 4, our demon-\nstrated MAC processors are proof-of-concept to highlight the scalability of MDM-WDM ap-\nproach. Please see lines 101-103 in page 3 of the manuscript.\nComment 1.2: Relatedlywiththeaboveconcern, theauthorsreportthattheyusea2wavelength\nx 2 mode device to perform blind source separation in Figure 4 (page 6, line 205). However, their\nphotonic circuit drawn in Figure 4a shows two 1 wavelength x 2 mode devices. This is indeed\nnecessary to perform signal recovery on both “S” and “J”, but this requires two pairs of balanced\nphotodetectorswhichisclearlydifferentfromthedevicetheycharacterizedinthepriorexperiments.\nThis should be resolved in the text and figure.\nResponse: We apologize for the confusion. Figure 4a illustrates that two pairs of balanced pho-\ntodetectorsarerequiredtosimultaneouslyrecoversignalsSandJ.Inourexperiment, wereusedthe\nsame processor twice with identical inputs, programming weights corresponding to one row of the\n2 2 weight matrix per run. For applications such as signal unjamming, where the received signal\n×\nis a mixture of the desired signal and the jammer, a single balanced photodetector is sufficient to\nextract the desired signal.\nAction taken: To clear the confusion, we explained how we use the same device twice to recover\nS and J in the text and Figure 4a caption. We also emphasized that recovering J is not essential.\nPlease see the updated Figure 4 caption and lines 266-269 in page 7 of the manuscript.\nComment 1.3: There are obviously some challenges in fabricating micro-rings which are both\nwavelength and mode addressable (which the authors do a nice job achieving). However, it appears\nthattheratiobetweenthepoweratthedropportsandthroughportsdiffersquitesignificantlyfrom\nTE0 to TE3 (see Figure 2f) for the 1 wavelength x 4 mode device. How do the authors propose\nto set equal weights between -1 to +1 for all modes simultaneously if all modes share a common\ndetector? The detector also has a slightly different responsivity for each mode which would seem\nto compound this problem.\nResponse: We thank the reviewer for acknowledging the novelty of our work. To compensate for\nvariationindrop-to-throughportratiosacrossdifferentmode-selectiveMRRsandPDresponsivities\nacross modes, we employ a one-time calibration procedure:\n1. Power compensation: First, each mode is injected individually with the MRRs tuned off-\nresonance. PD output currents are measured, and laser input powers are adjusted to equalize\n4\ndetector currents, thereby compensating for variations in detector responsivity, grating cou-\npler insertion loss, and MRR insertion losses across different modes.\n2. Normalizationtechnique: Toaddressthedifferenceinthedrop-to-throughportratio,welimit\nthe tuning range of all heaters to match the weight range of the most constrained MRR in\nthe array, ensuring weight uniformity and to equalize the absolute values of the maximum\npositive and negative weights. For example, if one MRR supports weights from 1 to -0.8 and\nanother from 1 to -0.7, all weights are limited to the overlapping range (0.7 to -0.7), and\nnormalized to span from 1 to -1.\nAction taken: We described the calibration procedure, which includes power compensation and\nweight normalization, in the supplementary information. Please see lines 63-86 in page 5 of the\nsupplementary information.\nComment 1.4: The reported Q-factors in the text do not match those in the titles of Figure 4b\nfor the QPSK BSS experiments.\nResponse: We thank the reviewer for pointing the typo. We corrected the typo in the revised\nmanuscript.\nAction taken: We corrected this typo. Please see lines 271-273 in page 7 of the manuscript.\nComment: The current work lies in the field of integrated photonic processors for performing\nlinear optical processes for unscrambling signals. The main focus of the work is to develop a\nscalable processor that can apply multiple parallel weights in a single ”bus” waveguide, with mode-\nplus-wavelength selectivity. Specifically, the current work presents the design and development\nof adiabatic mode-multiplexers in a single waveguide, rings with different waveguide-mode and a\nmultimodephotodiode. Theworkisinlinewithcurrenttrendsondevelopingphotonicprocessorsfor\nMIMO processing and unscrambling/jamming operations, while cleverly introducing SDM/Mode\ndivisionMultiplexing. Theworkcanbepossibleproposedassuitableforpublication, pendingsome\nmajor reviews.\nResponse: We appreciate the reviewer for highlighting the novelty of our architecture. We have\ncarefully addressed all the concerns and made substantial revisions to strengthen the manuscript.\nWe believe the revised version significantly improves the quality and is now suitable for publication\nin Nature Communications.\nComment 2.1: Despite its claims for scalable processor, the current work presents only a 4x1 and\n2x2 operation. Some literature review on recent MIMO / photonics processors can reveals (some\nindicativeonlyarepresentedattheendofthereview)that4x1or3x3operationshavebeenalready\ndemonstrated, with even higher transmissions metrics. Therefore, it would be recommended to try\nto provide a clearer overview of the existing works and body of knowledge.\nResponse: We thank the reviewer for bringing recent works on MIMO and photonic proces-\nsors [R2,R3,R6,R9–R11] to our attention. Current architectures primarily employ either on-\nchip Mach-Zehnder interferometer (MZI) meshes for spatial division multiplexing (SDM) [R1–R3],\nmode-division multiplexing schemes (MDM) [R4,R5], or wavelength-division multiplexing schemes\n(WDM) [R6]. Interferometric mesh grid architectures are coherent approaches and are thus highly\nsensitive to phase fluctuations. In addition, they rely on bulky MZI structures, which limit scala-\nbility. WDM architectures, while offering spectral multiplexing, face fundamental scalability chal-\nlenges due to the finite free spectral range (FSR) of microring resonators (MRRs), which restricts\nthe number of usable wavelengths and hence weights to the range of 109-148 [R7]. Existing MDM\narchitectures lack support for WDM, do not implement native negative weights (requiring addi-\ntional post-processing), and rely on single-mode photodetectors. This necessitates demultiplexing\nand individually detecting each mode, followed by summation of the photocurrents. Such complex-\nity undermines the efficiency of MDM and poses challenges for single-chip integration.\nIn contrast, our photonic processor introduces a hybrid scheme that combines both mode-\nand wavelength-division multiplexing, enabling the efficient use of spatial and spectral degrees of\nfreedom. It employs an incoherent approach, making it inherently robust to phase fluctuation, and\noffers the potential for a more compact footprint thanks to the small size of MRRs. Furthermore,\n6\nour architecture supports native positive and negative weighting, eliminating the need for post\nprocessing, andintegratesamultimodephotodetector(PD)thatcombinesWDMandMDMsignals\non-chip, enabling single-chip integration and efficient use of MDM. Our current demonstration\nincludestwoconfigurations: 1×4(1modeand4wavelengths)and2×2(2modesand2wavelengths).\nHowever, the architecture overcomes the scalability bottleneck (N < 109 - 148) inherent in WDM-\nonly approaches [R7] by resusing the same wavelength channels across different modes. This work\npresents a proof-of-concept for the first hybrid photonic processor that monolithically integrates\nboth mode- and wavelength division multiplexing. The novelty of our photonic processor lies in\nthe following aspects:\n1. Increased scalability and throughput: By reusing wavelengths across modes, the processor\nsurpasses the limitations of WDM-only systems. The hybrid multiplexing processor achieves\n4.1timeshigherthroughputcomparedtospatialmultiplexingschemesthatcombineWDM\n∼\nweight banks electrically, making it a promising candidate for next-generation large-scale\nphotonic processors.\n2. Single-chipintegration: Ourprocessormonolithicallyintegrateswavelength-andmode-selective\nMRRs, multimode photodetectors, and mode converters on a single foundry-fabricated chip.\nUnlike existing MDM systems, our architecture avoids off-chip demultiplexing and off-chip\nsingle-mode detectors whose photocurrents are summed electrically. This eliminates inter-\nconnect capacitance issues that would otherwise limit throughput (as detailed in Discussion\nsection of the manuscript and supplementary Section S5). Additionally, owing to our bal-\nanced photodetection, our processor supports native negative weighting, eliminating the need\nfor post-processing.\n3. Versatile hybrid photonic processor: Our processor is programmable via tunable weights,\nenabling it to perform a range of functions. It executes dot products (hence matrix–vector\nmultiplication operations) and supports applications such as blind-source separation, tensor\ncore processing, and signal unscrambling.\n4. High processing speed: Our processor achieves a 17 GHz bandwidth, limited by the band-\n∼\nwidth of our photodetectors. This bandwidth can increased by further optimization of the\nphotodetector [R8]. By performing analog-domain computations, it avoids digital-to-analog\n(DACs) and analog-to-digital (ADCs) converters, offering high parallelism, low latency, and\nreduced energy consumption.\n5. Scalable hardware architecture: Prior MZI-based mesh architectures are bulky and highly\nsensitive to phase fluctuations due to their coherent nature, leading to increased control\ncomplexity at scale. In contrast, our MRR-based architecture operates incoherently and\nfeatures a compact footprint, facilitating scalability.\nAction taken:\n7\n• We added a clearer overview of the existing works in the revised manuscript and expanded\non the limitations of the current SDM, WDM, and MDM architectures. We discussed how\nthe hybrid multiplexing of MDM and WDM bypasses these limitations, paving the way for\nlarge-scale, high-speed, and real-time signal processing applications. Please see lines 59-77 in\npage 2 and lines 81-101 in pages 2 and 3 of the manuscript.\n• We added an extra section in the supplementary information where we compare our archi-\ntecture with the state-of-the-art architectures in terms of various operational characteristics.\nPlease see Section S6 in the supplementary information.\nComment 2.2: The reviewer is wondering how were the inverse identified and applied? (Quoting\ntext: ”By sending pilot signals [46], which are a set of signals known a priori by the receiver, we\nare able to estimate the scrambling matrix”), Are the pilot tones considered to be transmitted\nseparately/sequentially, in order to identify the proper weights. How is it normally applied in the\nenvisioned scenario?\nResponse: We thank the reviewer for the comment. Pilot signals are typically predefined bit\nsequences known to both the transmitter and receiver. They are inserted into the data stream to\nassist with channel estimation and compensation [R12,R13]. In our demonstration, we performed\nunscrambling of two modes that had been scrambled by a 2 2 mixing matrix. To estimate the four\n×\nelements of this matrix, we require at least two pilot signals per mode. More generally, estimating\nan M M scrambling matrix necessitates at least M pilot symbols in each mode. Once the matrix is\n×\nestimated, we compute its inverse and apply the corresponding weights to our photonic processor.\nFurther details on this estimation process and the procedure for signal unscrambling are provided\nin the Methods Section. While pilot-assisted channel estimation can introduce certain drawbacks\nsuch as reduced transmission rate, increased symbol overhead, and added latency, our processor\nminimizes these effects as it requires only M embedded pilot symbols per mode to unscramble M\nmodes, keeping overhead and latency to a minimum.\nAction taken: We have provided a clarified and expanded explanation of pilot signaling in the\nMethods section, including additional details and an illustrative example. Please see lines 344-365\nin page 10 of the manuscript.\nComment 2.3: According to the reviewers understanding the rings can only apply amplitude\ntuning, while all signals are simply added at the multimode-PD. Is there any phase-tuning / inter-\nference considered?\nResponse: Wethankthe reviewerfortheir insightfulcomments. The reviewercorrectlyhighlights\nthat the MRR weight bank array is a key component of our MDM-WDM architecture, enabling\nanalog-domain signal processing on a silicon photonic platform. Each MRR is independently tuned\ntoimplementaspecificweight,andallweightedsignalsaresummedatthemultimodephotodetector\ntoperformadotproduct. Thisdesignsupportsamplitude-onlytuningbyadjustingthetransmission\n8\nlevel of each MRR. Coherent architectures, such as MZI meshes based on interference [R1–R3]\nrequire precise phase tuning and stable phase control. In contrast, our MDM-WDM architecture\nin incoherent, eliminating the need for fine phase control and mitigating interference and phase\ninstabilityissuescommonincoherentsystems. Consequently,ourdesignoffersimprovedrobustness,\nreduced control complexity and better scalability.\nAction taken: We emphasized that our architecture is incoherent which eliminates the need for\nfinephasecontrol, mitigatinginterferenceandphaseinstabilityissuescommonincoherentsystems.\nPlease see lines 61-63, lines 65-66, and lines 72-74 in page 2 of the manuscript. Please also see lines\n216-217 in page 6 of the manuscript.\nComment 2.4: It is proposed to provide a clearer description and elaboration on their statement\nthat ”Typically, the scrambling is mode-dependent and Baud rate-dependent, which has a substan-\ntial impact on system performance and bit error rate (BER).”. Does this refer to the electronic\nDSP processing?\nResponse: We apologize for the ambiguity. The sentence refers to how scrambling of transmitted\nmode signals can lead to higher bit error rates (BER), which are influenced by both the number of\nmodes and the baud rate. When multiple modes propagate through the channel, each mode expe-\nriences different group velocity, resulting in modal dispersion. Furthermore, mode coupling, caused\nby waveguide imperfections or environmental fluctuations, can further distort the transmitted sig-\nnals. The severity of scrambling increases with both the number of modes and higher baud rate.\nAs such, attempts to increase channel capacity by using higher baud rates and mode count can un-\nintentionally increase BER. In typical MIMO transmission links, BER is also significantly affected\nby intersymbol interference, mode-dependent insertion loss, and chromatic dispersion [R14], with\nthese impairments becoming more pronounced at higher baud rates, limiting the overall transmis-\nsion capacity. Conventional DSP units are typically used for channel estimation and compensation,\nbut they suffer from high latency and energy consumption [R15]. In contrast, our photonic pro-\ncessor operates directly on analog signals, offering the potential for high parallelism, low latency,\nultra-wide bandwidth, and low energy consumption, all within a compact footprint.\nAction taken: We elaborated more on the causes of scrambling and the imperfections in MIMO\nlinks. We emphasized that unlike conventional DSP approaches, our photonic processor performs\ncomputation directly on analog optical signals. Please see lines 187-200 in pages 5 and 6 of the\nmanuscript.\nComment 2.5: Please elaborate more on the FastICA python packaged deployment and how the\nvalues of the weights for the matrix A−1 have been defined? Was it performed offline using the\ncaptured measurements or real time? Does the process assume the transmission of PSK signals for\nX or S, before identifying the weight vectors?\nResponse: We thank the reviewer for the question and apologize for any confusion. We imple-\n9\nmentedblindsourceseparation(BSS)usingtheFastICAalgorithm. FastICAiswidelyusedmethod\nfor recovering original source signals from their mixed conterparts through independent component\nanalysis (ICA). The algorithm relies on kurtosis-based analysis, as outlined in the Methods section.\nAccording to the central limit theorem, mixing independent signals results in a more Gaussian dis-\ntribution than the original sources. Therefore, FastICA seeks to maximizes the non-Gaussianity of\nthe separated signals, using kurtosis as the objective function. The weight vectors of the unmixing\nmatrix are optimized via gradient descent to maximize kurtosis. Once optimized, the unmixing\nmatrix is applied to the received mixed signals to recover the original sources.\nIn our experimental setup, BSS was performed offline using data captured from the photode-\ntectors after signal transmission. The resulting unmixing weights were then used to program the\nMRRweightsinthephotonicprocessor. However,thisprocessisnotrestrictedtoofflineprocessing.\nA prior demonstration by our group using a WDM photonic processor showed that, with FPGA-\nbased control and integrated monitoring, the entire BSS computation and weight reprogramming\nloop can operate at rates up to 305 Hz [R6]. This corresponds to millisecond-level adaptation\nand supports real-time operation in dynamic environments. In the same study, this capability was\ndemonstrated for interference cancellation in practical applications, such as 5G tower interference\nmitigation in radar altimetry and congestion mitigation in the 2.4 GHz band. We believe that this\nhardware-accelerated control loop holds promise for enabling adaptive BSS in even more dynamic\nand time-sensitive scenarios in future work.\nIt is important to emphasize that the BSS algorithm does not assume any specific modulation\nformat, such as PSK or QAM. Its only requirement is that the source signals be statistically inde-\npendent and non-Gaussian. As a result, the method is modulation-agnostic and broadly applicable\nto a wide range of communication systems and scenarios.\nAction taken:\n• We noted that while BSS is performed offline in our experiment, it can be performed dynami-\ncally using a photonic processor at rates up to 305 Hz with FPGA control, and we referenced\na demonstration on 5G tower interference mitigation in radar altimetry and interference can-\ncellation in the crowded 2.4 GHz band. Please see line 263 and lines 282-290 in page 7 of the\nmanuscript.\n• We emphasized that BSS is agnostic to the modulation format and only requires statistically\nindependent and non-Gaussian signals. Please see lines 245-248 and lines 259-261 in page 7\nof the manuscript.\nComment 2.6: The reviewer is wondering if the use of term “real-time processing” is the correct\nterm. The term is usually used in scenarios where system level traffic is provided by realistic\ndevices, rather than laboratory equipment such as AWG and pattern generators.\nResponse: We are grateful to the reviewer for their valuable comment. Once the weights are\nprogrammed, our processor operates entirely in the optical domain, with a latency of 30 ps,\n∼\n10\nqualifying it as a “real-time processing” in the conventional sense. Compared to an electronic pro-\ncessor performing similar matrix operations at high speed, the photonic processing delay is orders\nof magnitude lower. For example, electronic DSP engines can have latencies ranging from several\nnanosecondstomilliseconds, duetoanalog-to-digitalconversion, memoryaccessandcomputational\noverhead. That said, we agree with the reviewer that the most compelling demonstrations of real-\ntime processing involve real world signals, and generated out of controlled laboratory settings. In\nthiswork,wepresentaproof-of-conceptimplementationbyemulatingmixedsignalstodemonstrate\nreal-time signal processing capabilities. Notably, our previous work [R6] demonstrated real-time\nBSS using WDM and RF signals transmitted over MIMO antennas. The current study builds on\nthat foundation and represents a promising step toward real-world scenarios, which is an active\narea of ongoing work.\nAction taken: We expanded on the impact of our work and potential real-world applications that\nare well-suited for our processor. Please see lines 322-331 in page 8 of the manuscript.\nComment 2.7: In Fig. 2(h), there are photocurrent measurements on each mode separately. Is\nthere a characterization of the PD in combined 2-mode, 3-mode, and 4-mode operation? Moreover,\nan experimental characterization of the PD in terms of in terms of bandwidth would also be useful.\nResponse: We thank the reviewer for the insightful comment. To enable efficient multimode\ndetection, the photodetector is designed with two off-centered metal contacts positioned over the\nN-doped region, instead of a single centered contact. This configuration improves responsivity of\nthe PD across all supported modes as outlined in the supplementary Section S3. We characterized\nthe PD responsivity for modes TE through TE (Figure 2h). As our measurements show, the\n0 3\nphotocurrent scales linearly with input optical intensity. When multiple modes are present (e.g.,\n2, 3, or 4 modes), the resulting photocurrent is the linear sum of the individual contributions from\neach mode. This linear superposition is critical for the correctness of matrix-vector multiplication\nin our photonic processor. Since each input mode corresponds to a separate component of the\ninput vector, the final output current represents a weighted sum across modes. The successful\ndemonstration of various applications involving weighted multimode combinations confirms that\nthe validity of this linear superposition.\nFollowing the reviewer’s suggestion, we characterized the bandwidth of the PD for modes TE\n0\nthrough TE (Figure 2i). Our measurements show consistent performance across all modes, with a\n3\n3-dB bandwidth of approximately 16-17 GHz. These news results have been included in the revised\nmanuscript to provide a comprehensive view of the detector’s mode-solved bandwidth characteris-\ntics.\nAction taken: We characterized the bandwidth of the PD for modes TE through TE . Please\n0 3\nsee the added Figure 2i and lines 177-179 in page 5 of the manuscript.\nComment 2.8: Although the reviewer appreciates the novelty, one of his concerns is the limited\n11\nperformance improvement provided by the processor. For instance, the BER is improved only\nby 1 or 2 orders of magnitude (e.g. from 10−3 to 10−4) or from already classified constellation\ndiagrams with Q from 2.9 to 5.3. Overall the work is interested and impressive, though some\nbetter elaboration of its operational characteristics, scalability and comparison with state of the\nart would be worthy of being included.\nResponse: We thank the reviewer for acknowledging the novelty of our work. Figure 3 compares\nthe BER curve of the original mode transmission with the same mode after being unscrambled by\nour system. The BER of a completely scrambled mode is theoretically 50%, so the enhancement,\nfrom 0.5 to values between 10−3 and 10−5, is substantial. The difference between the BER curves\nof the original mode transmission and the unscrambled mode is known as the power penalty. This\nreflects the fact that the BER of the unscrambled mode is higher than that of the original mode at\nthesameinputpowerlevel. Powerpenaltiesarecommoninsignalprocessingsystemandarisefrom\npractical nonidealities introduced during operations such as filtering, equalization, demultiplexing,\norunscrambling. Theseoperationscanintroduceeffectslikeinsertionloss,noise,quantizationerror,\nand imperfect compensation, all of which can degrade signal integrity and necessitate increased\ninput power to achieve the same BER performance [R16]. Figure 4 shows a comparison of the Q\nfactor before and after the unjamming process. While the increase in Q-factor (Q) from 2.9 to 5.3\nmay not initially appear significant, it is very significant when translated into BER, which is the\nprimary metric of concern in communication systems. This is due to the nonlinear relationship\nbetween Q-factor and BER, expressed as:\n1 (cid:18) Q (cid:19)\nBER = erfc , (1)\n2 √2\nwhereerfcisthecomplementaryerrorfunction. Usingthisrelationship,increasingtheQ-factorfrom\n2.9 to 5.3 results in a dramatic reduction in BER from approximately 1.87 10−3 to 5.79 10−8,\n× ×\nrepresenting nearly five orders of magnitude improvement. Importantly, these BER values are\nachieved without the use of any error correction schemes. With the integration of standard error\ncorrection techniques, the BER can be further improved to below 10−18 [R17].\nFurthermore, we benchmark our photonic processor against state-of-the-art architectures in\ntermsofvariousoperationalcharacteristics. Adetailedcomparisonisincludedinthesupplementary\nSection S6 of the revised manuscript.\nAction taken:\n• We mentioned that the BER of the signals before unscrambling is theoretically 50%. We also\nexplained how the increase in Q-factor leads to a substantial decrease in the BER. Please see\nline 219 in page 6 and lines 271-278 in page 7 of the manuscript.\n• We added a detailed comparison of our processor with the state-of-the-art architectures in\nterms of various operational characteristics. Please see the supplementary Section S6 of the\nmanuscript.\nComment: The authors present a fully integrated system for photonics assisted signal processing\nand show its functionality by two very interesting applications, i.e. MIMO channel de-scrambling\nandRFinterferencecancellation. Theparallelsignalprocessingisenabledbywavelengthsandmode\nmultiplexing in few-mode waveguides and photodetectors and by mode selective ring resonators.\nCompared to spatial multiplexed WDM schemes, the authors have calculated an improvement\nin the number of operations per second by 4.1 for their approach. This mainly comes from an\nincreased operation speed of their designed multimode photodetector (PD) due to a reduced node\nand wiring capacitance. The presented chip consists of a multi-mode multi-wavelength coupler, a\ntunable bank of mode-selective ring resonators, which the authors call: “mode-division multiplex\nwavelength-division multiplex processor” and the multi-mode PD. Such a real-time, high-speed\nsignal processing of data signals is very important for future wireless and optical communication\nsystems, AI and many other applications. Photonics might offer unprecedented opportunities due\nto its high-bandwidth, low-latency and potential for low power consumption. Furthermore, the\npresented results are convincing and very nice. Therefore, I could recommend a publication of the\npaper in Nature Communications if my following concerns are addressed.\nResponse: We thank the reviewer for their careful reading of our manuscript and for recognizing\nthe importance of our work. We have addressed all concerns raised and made substantial revisions\nto strengthen the manuscript.\nComment 3.1: My first concern is the scalability. In the conclusion the authors wrote: “...our\nanalysis shows that ... the processor can support a very large number of modes and wavelengths.”\nUp to this point this has not really be discussed and what does “very large” exactly mean?\nResponse: We appreciate the reviewer’s constructive feedback. Our intention was to compare our\ncurrent photonic processor with the maximum number of channels demonstrated in wavelength-\ndivision multiplexed (WDM) or mode-division multiplexed (MDM) architectures to date. As cor-\nrectly noted, the phrase “very large” is vague. We now clarify quantitatively:\n1. Number of supported wavelengths: The maximum number of wavelengths is limited by the\nfree spectral range (FSR) of microring resonators (MRRs), which constrains how many wave-\nlengths (weights) can be accommodated within one FSR. Based on prior studies [R7], the\nestimated upper bound for the number of usable wavelengths, and hence the input or weight\nvector dimensionality, ranges from 109 to 148.\n2. Number of supported modes: In integrated photonics, experimental MDM systems have\ndemonstrated up to 10 supported modes [R18]. We therefore anticipate similar mode counts\ncan be achieved in our system. While no hard theoretical limit exists, practical constraints\nprimarily arise from the physical area needed for wider waveguides and additional multiplex-\n13\ners. Theselimitationscanbealleviatedusinginverse-designedcomponents,whichhaveshown\npromise in significantly reducing multiplexer footprint [R19].\nAction taken:\n• We discussed the limit on the number of WDM channels due to the FSR of MRRs in the\nintroduction, and we also referenced MDM literature demonstrating systems with up to 10\nmodes. We also discussed that the practical limit on the number of modes will likely come\nfromtherequiredarea, butthatcanbemitigatedbytechniquessuchasinversedesign. Please\nsee lines 66-68 and 72-77 in page 2 and lines 140-145 in page 3 of the manuscript.\n• We removed the wording “very large” from the conclusion section to avoid vagueness.\nComment 3.2a: In Fig.2 f I can see that the resonance of the ring resonators is quite low for the\nthird and fourth mode.\nResponse:\n1.00\n0.75\n0.50\n0.25\n0.00\n1551 1552 1553 1554 1555 1556\nWavelength(nm)\nsedutilpma\nporD\ndna\nhguorhT\nκ = 0.24\n| |\nκ = 0.44\n| |\nFigure 1: Simulation of through and drop port responses of a microring resonator for two different\ncoupling coefficient (κ) values.\nRegardingthelowextinctionratioobservedatthethroughanddropports, wesuspectitresults\nfrom an overestimation of the coupling coefficient (κ) between the bus and the ring. To illustrate\nits impact, please see above a plot showing the MRR’s through and drop port responses for two\ndifferent κ values. To address this, we redesigned the coupling region to increase κ and taped out\na new version with the aim of improving the extinction ratio.\nAction taken: We explained the reason for the lower extinction ratios observed in TE and TE ,\n2 3\nand outlined how they can be improved. Please see lines 168-171 in page 4 and 5 of the manuscript.\nwavelength is necessary. This line of mxn rings increases the optical insertion loss and each single\nring has to be independently thermally tuned for imprinting the weights on the signal, which\nincreases the complexity. So what are the fundamental and especially practical limits for the\npossible number of modes and number of wavelengths?\nResponse: In conventional photonic architectures, increasing scalability often leads to added\ncomplexity, higher losses, reduced stability, and larger footprints. However, our on-chip incoherent\narchitecture, which incorporates compact, high-Q, low-loss MRRs, offers a promising path toward\nlarge-scale integration with minimal complexity. Furthermore, our hybrid photonic processor ad-\ndresses the scalability limits inherent in WDM and MDM systems. Regarding the practical and\nfundamental:\n1. For the number of supported wavelengths: The number of supported wavelengths is limited\nby the FSR of the MRRs, as discussed earlier (please see the response to comment 3.1).\nThe estimated maximum number of wavelengths, and thus the input or weight vector dimension,\nranges from 109 to 148.\n2. Forthenumberofsupportedmodes: Asdiscussedinresponsetocomment3.1,upto10modes\nhavebeenexperimentallydemonstratedinintegratedphotonicsystemsforMDMcommunica-\ntion [R18]. We expect our architecture to support at least a similar number of modes. While\nphysicalarearemainsaconstraint, inverse-designedmultiplexerscanreducethefootprintand\nhelp push this limit [R19].\n3. For the combined number of modes and wavelengths: The practical limit for the total num-\nber of modes m and wavelengths n will depend on the cumulative insertion loss of MRRs,\nchip area requirements, and the electrical interconnects (e.g., heater control lines, biases).\nExcessive loss, and thus lower signal-to-noise ratio (SNR), could drive photodetector currents\ninto the noise floor. However, these challenges can be mitigated through the cointegration\nof electronics and the using of higher optical input power (limited by nonlinear effects like\ntwo-photon absorption in silicon).\nAction taken:\n• We discussed the limit on the number of WDM channels due to the FSR on microring res-\nonator in the introduction, and we also referenced MDM literature demonstrating systems\nwith up to 10 modes. We also discussed that the practical limit on the number of modes\nwill likely come from the required area, but that can be mitigated by techniques such as\ninverse design. Please see lines 66-68 and 72-77 in page 2 and lines 140-145 in page 3 of the\nmanuscript.\n• We discussed that the extended scalability limit on the total number of channels is likely to\nbe set by practical considerations such as chip area, cumulative insertion loss in the MRRs,\n15\nand the number of required MRR drivers. We also discussed how these challenges can be\nmitigated. Please see lines 151-156 in pages 3 and 4 of the manuscript.\nComment 3.3: Furthermore, photonics has the potential of a lower energy consumption, and the\nauthors claim a high energy efficiency due to reduced resistive and capacitive effects. But here for\neach ring a thermal tuning is necessary, which increases the energy consumption and requires more\nspace on the chip to avoid thermal crosstalk. I suggest that the authors elaborate a little bit more\non these issues, and if they claim a high energy efficiency, they must include the thermal tuning,\nor they should propose an alternative.\nResponse: The primary objective of our work is to demonstrate a novel photonic processor archi-\ntecture that enhances scalability through hybrid multiplexing, enables monolithic integration, and\noffers a low latency. While energy efficiency is not the focus, we acknowledge that thermal tuning\nconsumespower(ontheorderofmilliwatts); however, itcouldbeeliminatedbyusingphase-change\nmaterials [R20] or photochromic material [R21] to tune the MRRs. Nevertheless, depending on the\nscale of the system, thermal tuning could be more energy efficient than digital signal processing\n(DSP).Forexample,inarecentstudyphotonicinterferencecancellationsystemsdemonstratedover\n70 times lower power consumption than their electronic counterparts. Specifically, for processing\nfor a digital system [R22]. These advantages stem from the inherently low resistive and capacitive\neffects to photonic systems, which maintain high bandwidth and energy efficiency independent of\nsignal frequency, unlike DSP. As mentioned, energy efficiency can be further improved by adopting\nalternative tuning mechanisms, such as phase change, polymer, or photochromic materials, but\nrequire post-fabrication processing.\nAction taken: We noted that although thermal tuning consumes power (typically in the milliwatt\nrange), it could offer greater energy efficiency than DSP approaches, depending on the scale of the\nsystem. This is due to the low resistive and capacitive effects in photonic circuits, which support\nhigh bandwidth and energy efficiency independent of signal frequency, unlike DSP systems. In\naddition, we mentioned that we can use alternative tuning mechanisms, such as phase change or\nphotochromic materials, to further reduce the power consumption. Please see lines 156-162 in page\n4 of the manuscript.\nComment 3.4: In the title the authors claim a ps latency and for the MIMO unscrambling a\ntotal processing latency of 30 ps is mentioned. How has this been measured and how is it defined?\nAs I got it, the weights are pre-adjusted with the look-up table and thermal tuning of the ring\nresonators. So, until the next pilote tones have measured new weights for the channel, the\nphotonic chip should work real-time, right? So, is the latency the propagation time in the chip?\nI would not call this latency. Is it instead the propagation time in the chip plus the electronics?\nIf the latter, what’s the contribution of both parts? If it’s the electronics, how much is it compared\nto a full electronic system? This number would give more insight.\nerates entirely in the optical domain, enabling real-time operation without additional processing\ndelay. The reported 30 ps latency refers specifically to the optical propagation time which is the\ntime it takes for the optical signal to traverse the photonic circuit. Since the weights are preconfig-\nured based on channel estimation, this latency excludes delays from thermal tuning or electronic\ncontrol. In contrast, electronic processors performing similar matrix-vector multiplication (MVM)\noperationssufferfromclockspeedlimitations,digital-to-analog(DAC)andanalog-to-digital(ADC)\nconversions, memory access latency, computational overhead, and bandwidth constraints, resulting\nin latencies from several nanoseconds to milliseconds, depending on the algorithm and hardware\nplatform. Our photonic processor’s thermal tuning mechanism and control circuitry require ap-\nproximately 1 second to configure the weights. However, since the weights are preconfigured prior\nto processing the real-time signals, the end-to-end optical processing latency remains at 30 ps due\nto the absence of sampling, clock limitations, or conversion delays inherent in digital electronic\nsystems.\nAction taken: We clarified that once the weights are set, the processor operates in real time with\na latency of 30 ps. We explained that this latency refers to the time required for the optical signal\nto propagate through and be processed by the photonic circuit. Please see lines 226-228 in page 6\nof the manuscript.\nComment 3.5: Together with latency, the time required to adjust the chip to new weights would\nbe interesting. This is especially a point for the second application when only minimal information\non the communication link is given. The presented blind source separation is based on a massive\nelectronic post-processing, which defines the weights for the processor. As long as the channel stays\nconstant after the calculation, this might be ok for a while. But how fast does such a channel really\nchange, especially if the interference comes from an unkind jammer signal and how fast can the\nchip be adjusted to the new values?\nResponse: The primary goal of our work is to introduce a novel photonic processor architecture\nthat significantly enhances scalability through hybrid multiplexing, enables monolithic integration,\nand offers a low latency—rather than to optimize the reconfiguration speed of the processor.\nThat said, in our experiment, we performed blind source separation (BSS) and programmed the\nMRR\nweights using a computer interfaced with source-measure units (SMUs). The complete process of\nrunning the BSS algorithm and setting the weights takes less than a second in our setup. Once\nthe weights are configured, the processor operates entirely in the optical domain without any addi-\ntional processing delay, enabling real-time operation. Importantly, this speed is not fundamentally\nlimited by our photonic architecture. In fact, our previous work demonstrated that, with FPGA-\nbased control and integrated monitoring, the entire BSS computation and reprogramming loop can\nbe performed at rates of up to 305 Hz [R6], meaning that the system can adapt on a millisecond\ntimescale. This update rate is sufficient for real-time applications such as 5G tower interference\nmitigationinradaraltimetryandinterferencecancellationinthecrowded2.4GHzband, asdemon-\n17\nstrated in that work. We believe future work can further advance hardware-accelerated control for\nuse in dynamic environments.\nActiontaken: WenotedthatwhileBSSisperformedofflineinourexperiment,itcanbeperformed\ndynamicallyusingaphotonicprocessoratratesupto305HzwithFPGAcontrol,andwereferenced\nademonstrationon5Gtowerinterferencemitigationinradaraltimetryandinterferencecancellation\nin the crowded 2.4 GHz band. Please see line 263 and lines 282-290 in page 7 of the manuscript.\nComment 3.6: How sensitive is the device on environmental changes, or the other way round,\nhow exact must the temperature of the whole chip be controlled?\nResponse: Since our weights are implemented with MRRs, they are sensitive to temperature-\ninduced resonance shifts. To mitigate this, we use a PID feedback loop incorporating a thermistor\nto monitor chip temperature and a Peltier cooler/heater to maintain the target operating tem-\nperature. This system successfully stabilizes the weight values. While we did not measure the\nprecise correlation between temperature control accuracy and resonance frequency shift in this spe-\ncific work, our prior experiments show that a 2°C temperature variation can cause up to a 50%\nchangeintheeffectiveweights. Inourcurrentsetup,westabilizethethermistortemperaturewithin\n0.25°C of the target value using the PID control loop.\n±\nAction taken: We mentioned in the supplementary information that we used a PID loop with a\nthermistor to measure the chip’s temperature and a Peltier cooler/heater to maintain the temper-\nature 0.25°C from the target temperature to stabilize the weights. Please see lines 58-61 in page 4\nof the supplementary information.\nComments 3.7 and 3.8: (3.7) There are athermal ring resonators but normal rings, as used\nhere, are very sensitive. In the presented chip everything depends on the rings and a slight change\nof environmental temperature may completely change the look-up table. Since every single of the\nmxn rings is thermally tuned, I could imagine that this is even more severe, due to a heating up of\nthe chip with operation time and an increased thermal crosstalk between the rings. The authors\nshould elaborate a little more on these issues.\n(3.8) Assuming an increased thermal crosstalk especially for a high number of integrated rings\nand after a longer operation time, is there a possibility to measure and compensate it, or can it\nbe addressed by different look-up tables for different working times, or do the authors have some\nother ideas?\nResponse: We thank the reviewer for highlighting the relevance of athermal MRRs, which are\nindeed well-suited for applications such as frequency comb generation and optical sensing due to\ntheir temperature insensitivity. However, in our current work, dynamic and precise control of res-\nonance is essential to realize reconfigurable weight settings. As proof of concept, the weight bank\narray is reconfigured via thermal tuning of MRRs, and currently athermal MRRs are incompatible\nwith our implementation. As the reviewer correctly noted, standard MRRs are highly sensitive\n18\nto temperature fluctuations, which can affect processor performance. To address this, we imple-\nmented a PID feedback system with a thermistor to measure the chip’s temperature and a Peltier\nelement to maintain the target temperature. This approach effectively stabilizes weight values in\nour experiments.\nTo reduce thermal crosstalk between adjacent weights, we maintained a physical separation of\nat least 100 µm between MRRs, employed high-Q resonators, and operated the thermal heaters at\nlow currents (< 3 mA). These measures significantly reduced thermal conduction between rings.\nWe characterized thermal crosstalk by measuring the impact of tuning one weight (TE ) on the\n0\nneighboring weight (TE ) at different values of this neighboring weight. As shown in Figure S9 (in\n1\nthe supplementary), the tuning curves remain flat, confirming negligible thermal crosstalk between\nweights. This minimal crosstalk enables independent calibration of each ring and allows the use\nof one-dimensional look-up tables, eliminating the need for more complex and time-consuming\nmulti-dimensional calibration, as explained in Section S4 of the supplementary information. In\nour experiments, we efficiently recalibrated and updated the look-up tables for different operating\ntimes, enabled by the simplicity of this one-dimensional calibration scheme.\nInaddition,theneedforcalibrationcanbefurtherreducedoreliminatedthroughmoreadvanced\nweight control strategies. One such method is dithering, in which a low-frequency signal is injected\nto continuously monitor and correct weight values in real time [R23]. Another technique is zero-\ncalibration,demonstratedinphotonicblindinterferencecancellationsystems[R22],whichleverages\nthe near-linear response of the current-to-weight transfer function around the zero-weight point,\nallowing for stable and simplified control in this regime.\nAction taken:\n• We mentioned in the supplementary information that we used a PID loop with a thermistor\nto measure the chip’s temperature and a Peltier cooler/heater to maintain the temperature\n0.25°C from the target temperature to stabilize the weights. Please see lines 58-61 in page 4\nof the supplementary information.\n• Wediscussedthatourexperimentsshownothermalcrosstalkbetweentheweightsofdifferent\nrings, allowing the calibration process to be simple and based on 1D look-up tables. This\nallowed us to generate different 1D look-up tables for different working times. Please see lines\n75-80 in page 5 and crosstalk sweep in Figure S9 of the supplementary information.\n• We also suggested weight control techniques, such as dithering and zero-calibration methods,\nin order to even eliminate the need for calibration. Please see lines 80-86 in page 5 of the\nsupplementary information.\nComment 3.9: In my opinion, the phrase “multimode microring resonators” is misleading. The\nringresonatoritselfonlysupportsasinglemodeandthismodeispre-designedbythebuswaveguide\nwidth. Therefore, for each mode at each wavelength a single ring resonator is needed in the chip.\nSo, they are rather mode-selective microring resonators.\nin our system is both mode-selective and wavelength-selective, determined by the bus waveguide\nwidth and ring radius, the waveguide within each MRR supports only a single mode. Accordingly,\nwe have replaced the term “multimode MRR” with “mode-selective MRR” throughout the revised\nmanuscript to ensure clarity and accuracy.\nAction taken: We replaced the term “multimode MRR” with “mode-selective MRR” throughout\nthe manuscript to avoid confusion.\nComment 3.10: In Fig.2 f there are some second resonance peaks for the drop transmission\nspectrum of the TE3 mode. They are small, but the primary peaks are small as well. Where do\nthey come from and why aren’t they visible in the through spectra?\nResponse: We thank the reviewer for their important observation. We suspect that the observed\nbehavior arises from the ring coupler design, causing a finite modal crosstalk between the TE and\n3 2\nspectrum aligns with the primary peak in the TE spectrum, and vice versa. To address this, we\n3\nhave redesigned the ring couplers to minimize modal crosstalk and taped out a new version of the\nprocessor. The updated design is expected to yield improved through/drop transmission spectra\nand further reduce intermodal crosstalk.\nAction taken: We explained why tiny peaks appear in TE and TE ring transmission spectra.\n2 3\nPlease see lines 166-168 in page 4 of the manuscript.\nComment 3.11 Are the insertion loss and crosstalk numbers in the lines 132 and 133 really linear,\nor in dB? They should be in dB, since Fig.2 b is in dB as well.\nResponse: We thank the reviewer for bringing the typo in the manuscript to our attention. We\nhave corrected the text in the revised manuscript.\nAction taken: We added the missing unit “dB”. Please see line 138 in page 3 of the manuscript.\nReferences\n[R1] Annoni, A., Guglielmi, E., Carminati, M. et al. Unscrambling light—automatically undoing\nstrong mixing between modes. Light: Science & Applications 6, e17110–e17110 (2017).\n[R2] Milanizadeh, M., SeyedinNavadeh, S., Zanetto, F. et al. Separating arbitrary free-space\nbeams with an integrated photonic processor. Light: Science & Applications 11, 197 (2022).\n[R3] Tanomura, R., Tang, R., Soma, G. et al. All-Optical MIMO Demultiplexing Using Silicon-\nPhotonic Dual-Polarization Optical Unitary Processor. Journal of Lightwave Technology 41,\n3791–3796 (2023).\n20\n[R4] Yin, R., Xiao, H., Jiang, Y. et al. Integrated WDM-compatible optical mode division mul-\ntiplexing neural network accelerator. Optica 10, 1709–1718 (2023).\n[R5] Ling, Q., Dong, P., Chu, Y. et al. On-chip optical matrix-vector multiplier based on mode\ndivision multiplexing. Chip 2, 100061 (2023).\n[R6] Zhang,W.,Lederman,J.C.,FerreiradeLima,T.etal. Asystem-on-chipmicrowavephotonic\nprocessorsolvesdynamicRFinterferenceinrealtimewithpicosecondlatency. Light: Science\n& Applications 13, 14 (2024).\n[R7] Tait, A. N., Wu, A. X., de Lima, T. F. et al. Microring Weight Banks. IEEE Journal of\nSelected Topics in Quantum Electronics 22, 312–325 (2016).\n[R8] Fard, M. M. P., Cowan, G. & Liboiron-Ladouceur, O. Responsivity optimization of a high-\nspeed germanium-on-silicon photodetector. Optics Express 24, 27738 (2016).\n[R9] Romero,P.M.-C.,Rausell-Campo,J.R.,P´erez-Galacho,D.etal. IntegratedMicrowavePho-\ntonics Coherent Processor for Massive-MIMO Systems in Wireless Communications. IEEE\nJournal of Selected Topics in Quantum Electronics 29, 1–12 (2023).\n[R10] Doerr, C. R. Proposed Architecture for MIMO Optical Demultiplexing Using Photonic\nIntegration. IEEE Photonics Technology Letters 23, 1573–1575 (2011).\n[R11] Zhao, X., Xu, S., Yi, S. et al. Photonic parallel channel estimation of MIMO-OFDM wireless\ncommunication systems. Optics Express 31, 1394–1408 (2023).\n[R12] Simko, M., Diniz, P. S. R., Wang, Q. et al. New insights in optimal pilot symbol patterns for\nOFDMsystems.2013IEEEWirelessCommunicationsandNetworkingConference(WCNC),\n3737–3741 (2013).\n[R13] Cheng, H., Li, Y., Zhang, F. et al. Pilot-symbols-aided cycle slip mitigation for DP-16QAM\noptical communication systems. Optics Express 21, 22166–22172 (2013).\n[R14] Jadav,N.K.ASurveyonOFDMInterferenceChallengetoimproveitsBER. 2018SecondIn-\nternational Conference on Electronics, Communication and Aerospace Technology (ICECA),\n1052–1058 (2018).\n[R15] Jouppi, N. P., Young, C., Patil, N. et al. In-Datacenter Performance Analysis of a Tensor\nProcessing Unit. Proceedings of the 44th Annual International Symposium on Computer\nArchitecture, ISCA ’17, 1–12 (Association for Computing Machinery, New York, NY, USA,\n2017).\n[R16] Khan, Y., Ali, F. & Ali, A. Impact of Nonlinear Impairments on Power Budget and Trans-\nmission Power Penalties in High Capacity Long Haul Optical Networks. Wireless Personal\nCommunications 106, 1001–1013 (2019).\n21\n[R17] Mizuochi, T. Recent progress in forward error correction and its interplay with transmission\nimpairments. IEEE Journal of Selected Topics in Quantum Electronics 12, 544–554 (2006).\n[R18] Dai, D., Li, C., Wang, S. et al. 10-Channel Mode (de)multiplexer with Dual Polarizations.\nLaser & Photonics Reviews 12, 1700109 (2018).\n[R19] Yang, K. Y., Shirpurkar, C., White, A. D. et al. Multi-dimensional data transmission using\ninverse-designedsiliconphotonicsandmicrocombs. NatureCommunications 13,7862(2022).\n[R20] Kari, S. R., Tamura, M., Guo, Z. et al. High-speed multifunctional photonic memory on a\nfoundry-processed photonic platform. Optica 12, 31–38 (2025).\n[R21] Bilodeau, S., Doris, E. A., Wisch, J. A. et al. All-optical organic photochemical integrated\nnanophotonic memory: low-loss, continuously tunable, non-volatile. Optica 11, 1242–1249\n(2024).\n[R22] Lederman, J. C., Zhang, W., de Lima, T. F. et al. Real-time photonic blind interference\ncancellation. Nature Communications 14, 8197 (2023).\n[R23] Zhang, W., Huang, C., Peng, H.-T. et al. Silicon microring synapses enable photonic deep\nlearning beyond 9-bit precision. Optica 9, 579–584 (2022).\nWesincerelythankthereviewersfortheircarefulreadingofourmanuscriptandtheirthoughtful\nand constructive feedback. Their comments have been instrumental in helping us improve the\nclarity, rigor, and overall quality of our work. We are encouraged that the reviewers found the\nrevised version clear, well motivated, and suitable for publication in its current form.\nReviewer 1\nComment: The authors have addressed my comments and improved the clarity and motivation\nof their work. I support publication of the manuscript in its current form.\nResponse: We thank the reviewer for their appreciation of our responses and for recommending\nour manuscript for publication.\nReviewer 2\nComment: The authors have performed an excellent work to address the reviewer’s concerns,\nincluding appropriate information, modifications and justification where required. Possible accep-\ntance for publication can be recommended in its current form.\nResponse: We thank the reviewer for their careful reading and thoughtful feedback, which have\nsignificantly improved the quality of our manuscript. We also appreciate the reviewer’s recommen-\ndation for publication of our manuscript in its current form.\nReviewer 3\nComment: I would like to thank the authors for their careful consideration of all my comments\nin the revised version of the manuscript.\nResponse: We thank the reviewer for their appreciation of our responses. We are once again\ngratefulfortheircarefulreadingandconstructivefeedback,whichhavegreatlyenhancedthequality\nof our work.\n1"}, {"round": 2, "reviewer_comments": {"reviewer_1": "The authors have addressed my comments and improved the clarity and motivation of their work. I support publication of the manuscript in its current form.", "reviewer_2": "The authors have performed an excellent work to address the reviewer's concerns, including appropriate information, modifications and justification where required. Possible acceptance for publication can be recommended in its current form.", "reviewer_3": "I would like to thank the authors for their careful consideration of all my comments in the revised version of the manuscript.\nThomas Schneider"}, "author_response": ""}]

Decision letter