Characterising the failure mechanisms of error-corrected quantum logic gates

Domain: physics
Published: 2026-04-10
Editorial outcome: accept

Abstract
Mid-circuit measurements used in quantum error correction are essential in the architecture of a fault-tolerant quantum computer, as they read out syndrome data and drive logic gates. Here, we use a heavy-hex code prepared on a superconducting qubit array to investigate how different noise sources impact error-corrected logic. First, we identify that idling errors occurring during readout periods are highly detrimental to a quantum memory. We demonstrate significant improvements to the memory by designing and implementing a low-depth syndrome extraction circuit. Second, we perform a stability experiment to investigate the type of failures that can occur during logic gates due to readout assignment errors. We find that the error rate of the stability experiment improves with additional stabilizer readout cycles, revealing a trade-off as additional stability comes at the expense of time over which the memory can decay. We corroborate our results using holistic device benchmarking and by comparison to numerical simulations. Finally, by varying different parameters in our simulations we identify the key noise sources that impact the fidelity of fault-tolerant logic gates, with measurement noise playing a dominant role in logical gate performance.

Introduction
The logical operations of an error-corrected quantum processor are driven by the outcomes of measurements performed throughout the execution of a quantum circuit. Not only are these mid-circuit measurements used as a syndrome for errors acting on logical qubits stored in memory [1–5], but the outcomes of these measurements are also used to implement logical gates such as lattice surgery operations [6–18]. However, errors may lead to unreliable measurement outcomes that could potentially lead to a corrupted logical gate. To deal with this fact, logic gates are designed to be fault tolerant by adding redundancy such that the error syndrome can be used to identify errors in the measurements themselves.

A straightforward way to include such redundancy is to repeat the measurements we need to complete a logic gate multiple times [19]. Increasing the number of repetitions of mid-circuit measurements can decrease the probability of a logical gate failure. However, this leads to a trade-off since, by increasing the number of rounds of measurements in a logic gate, we increase the period over which a memory must store logical quantum information, and as such there is an increased chance of logical corruption. Ideally, we should optimise our logical operations to minimise the probability of both memory corruption together with logic gate failure with respect to the underlying hardware. Identifying the bottlenecks under this optimisation over logical error rates will show us new pathways to improve hardware towards the development of a fault-tolerant quantum computer.

Here we demonstrate this trade-off through experiments performed by preparing the heavy-hex code on a superconducting quantum processor [20]. First, we conduct a memory experiment [2, 3, 21–23] to quantify the logical error rate for different numbers of syndrome measurement rounds. We significantly improve this logical error rate for the heavy-hex code by decreasing the circuit depth and real-time duration of the stabilizer readout circuit with two innovations. Our first innovation is a new circuit to learn the syndrome data that has significantly smaller circuit depth compared with previous implementations of this code. Our new circuit is able to defer the readout of one type of check such that both the Pauli-X and Pauli-Z type checks are measured in parallel, thereby decreasing the number of sequential rounds of measurements we need to perform to complete a full syndrome readout cycle. Given that mid-circuit measurement times dominate the syndrome extraction circuit cycle, we find this leads to a substantial speed up and corresponding reduction in logical error rate. Our second innovation is to replace the reset operation that follows a measurement with a classical Pauli frame update [24], eliminating the need for reset of ancilla qubits, and yielding a significant speed up and further reduction in the logical error rate. Altogether these improvements result in a logical qubit encoded in a heavy-hex code with a survival probability of 96% per round of syndrome extraction.

We complement our memory experiment with a new stability experiment [25, 26] designed for the heavy-hex code. A stability experiment benchmarks the performance of a fault-tolerant logic gate implemented with lattice surgery. A logical error in the stability experiment is incurred if an unfortunately-located sequence of mid-circuit measurement failures occurs. We measure the logical gate failure rate as a function of measurement rounds. We identify a decay in logical error rate as a function of the number of measurement rounds, indicating below-threshold behaviour. We compare experiments that use resets to experiments that replace post-measurement resets with a Pauli frame update. Notably, in contrast to the error models and simulations used in Ref. [24], we find very little difference in the two experiments. We attribute this to the reset mechanism used in the quantum device. We support this assertion with simulations.

We corroborate our error correction results with supporting benchmarking experiments and numerical simulations. We use benchmarking circuits to learn the noise the device experiences during syndrome readout circuits with mid-circuit measurements to determine the extent to which the device respects a circuit noise model. Our numerical simulations show the dependence of the different parameters quantifying logical performance on the physical device parameters assuming a circuit model, e.g., gate error rate, measurement error rate, and idling errors.

Our experiments and our supporting analysis allow us to critique the performance of current quantum hardware, and how their development should progress in order for future generations of devices to be able to perform large-scale fault-tolerant logic operations. Investigating this trade-off reveal that the logical error rate of a fault-tolerant logic gate in our studied quantum processor is dominated by the logical gate failure rate, rather than the logical memory failure rate. Given that measurement error rates are currently a dominant contributor to the value of sub-threshold performance for all types of logical failures, our results indicate that better mid-circuit measurements, in terms of both their error rates and measurement times, will significantly improve the performance of logic gates.

Results
A. A heavy-hex code on a quantum chip

We consider the heavy-hex code [20], realised on the IBM Quantum 156-qubit Heron class of quantum processor Marrakesh. This device has a heavy-hex layout, displayed in Fig. 1(a). It supports mid-circuit measurements and high fidelity (> 99%) two-qubit gates. This generation of device, with its size, fidelity, and capabilities opens up the possibility for in-depth analysis and characterization of logical operations on error-corrected qubits.

The heavy-hex code (described in Section IVA) is placed on the quantum processor as shown in Fig. 1(a) to maximise performance. Detailed error modelling of the full device, including mid-circuit measurements using simultaneous randomised benchmarking informed our choice of code placement (see Supplementary Methods). Marrakesh supports a sufficiently large patch of high-quality qubits to support a d = 3 logical qubit. We run two experiments—memory and stability—that together help determine the capabilities of the device for executing quantum logic via lattice surgery.

B. Memory experiment

Performing fault-tolerant logic requires keeping logical qubits uncorrupted over many error-correction cycles. A memory experiment quantifies how well logical quantum information can be stored by a code over time, measured in the number of syndrome extraction rounds. Memory experiments exploring logical failure rate as a function of the number of rounds have been detailed previously in superconducting devices for a number of different codes, including the heavy-hex code [1], the surface code on heavy-hex lattices [27], and the surface code on 4-valent lattices [4, 28].

We run two types of memory experiment. The first is based on the standard implementation of the heavy-hex code, wherein Z and X checks are measured in two separate rounds, with measure qubits measured and then reset in each round [20]. This two-round approach results in poor memory performance owing to the time taken to perform resets and measurements, during which idling errors affect all data qubits (see Section IVA).

We redesign the syndrome extraction circuits to allow for all checks (Z and X type) to be measured in the same round (see Section IVA3) and we remove resets from the circuits (see Section IVA4). We present the time savings of these new circuits schematically in Figure 2.

Figure 3 details the results of our memory experiments on Marrakesh, for both original and improved syndrome extraction circuits. We use a standard minimum weight perfect matching decoder (PyMatching) [29], populated with averaged device calibration data, and we do not post-select any data. Using the improved circuits allows us to increase the logical fidelity per syndrome extraction round, from less than 90% using the original syndrome extraction circuit, to 96% and better using the improved circuit. Based on our modelling, the main source of logical infidelity is the relaxation of qubits while mid-circuit measurements are performed (see Supplementary Methods).

C. Stability experiment

Given that we can store logical qubits, our device requires additional functionality to perform logic gates. We focus on an approach to performing fault-tolerant operations via lattice surgery, which is driven by performing additional stabilizer measurements. During lattice surgery, the value of a product of many stabilizer measurements must be readout correctly to successfully complete a logical operation. If errors cause an incorrect stabilizer measurement outcome, the product will also be incorrect, and this will lead to gate failure. This can be mitigated by repeating stabilizer measurements for a number of rounds t, as in Fig. 1(d). A stability experiment [25] tests a device’s ability to successfully measure products of stabilizers, and so serves as a proxy for logic gate performance.

In a stability experiment the code is re-designed with an over-complete set of stabilizer checks such that the product of outcomes of the over-complete checks are constrained to give a fixed +1 outcome. This constraint will only be violated due to undetected measurement errors. In Fig. 1(c) we show how to modify the heavy-hex code to introduce one such constraint.

We detect measurement errors by comparing repetitions of stabilizer measurements. A detection event is defined where two consecutive readings of the same stabilizer do not agree. These detection events are fed to a decoding algorithm to attempt to recover the correct value for logical observables or, in the case of our stability experiment, the stabilizer constraint.

A measurement error produces two concurrent detection events. An undetectable failure of the stability experiment will occur if, say, one specific stabilizer fails at every repeated round of syndrome extraction, such that no detection events are identified. We decrease the likelihood of a logical failure by repeating syndrome extraction over more rounds. An example of such a logical failure in a stability experiment for the heavy-hex code is shown in Fig. 1(e).

We compare the performance of two different syndrome extraction circuits using the stability experiment, wherein one variation we remove the reset from the circuit. As discussed in Ref. [24] and in Section IVA4, this requires forming detectors from stabilizer outcomes not in consecutive measurement rounds, but in rounds separated by two. The net effect of this change is to reduce the time-like distance of the code, but it also reduces the number of potential errors (since there are no reset errors). We discuss the trade-offs associated with including resets in Section IVA4.

Figure 4 shows the results of the stability experiment implemented using the improved circuits (see Section IV for implementation details), with and without resets. The stability experiment failure rate as a function of the number of measurement rounds can be modelled to leading order by a simple exponential P_fail = B(d)Gamma^t where B(d) represents an unknown pre-factor polynomial in the code distance d, and t is the number of syndrome rounds. We fit an exponential to these data in Fig. 4, omitting the initial rounds (the small data points in the figure) from the fit. We observe only a negligible difference between our two syndrome extraction circuits. A likely explanation is that resets in the Marrakesh device are performed via measurements followed by a conditional X-gate. The resets, therefore, have similar error rates to the measurements, and although the circuit with resets has twice the time-like distance, we have also substantially increased the chance of errors – more or less cancelling out the benefit. We note that after more than about 15 rounds the experimental data points in Figure 4 appear to flatten. This does not occur in our simulation and is likely indicative of additional noise processes.

D. Impact of noise parameters on stability and memory

Here we use simulations to examine the impact of varying the noise parameters of various constituents of the quantum processor on the performance of stability and memory circuits. We fit the device noise to a circuit-level noise model involving 1- and 2-qubit depolarising noise, measurement and reset errors and idling noise (see Section IVB). The best-fit parameters for the device are included in Fig. 5. We also vary these parameters individually to examine the effect of each noise parameter on stability and memory performance and present these results in Fig. 5.

As we see in Fig. 5(c), improving measurement noise is predicted from our simulations to have the largest effect on stability performance, and is also predicted to improve memory performance considerably. This suggests that our results are currently limited by measurement noise.

Methods
A. Implementation of the Heavy-Hex Code

1. Introduction to Heavy-Hex Code

The heavy-hex code is a subsystem code defined by a “gauge group”, which is generated by weight-2 Z checks and weight-4/weight-2 X checks. These are shown in red and blue, respectively, in Fig. 1(b). As usual in a subsystem code, the checks we measure directly are not the stabilizers of the code. Rather the stabilizers are those gauge group elements that commute with all measured checks. The product of two vertically opposite Z checks forms such a stabilizer, as does the product of all X checks along a row. To summarize, for the distance-3 code shown in Fig. 1(b) (see also Fig. 6), the gauge and stabilizer groups are given by the following:

G_X = \langle X_1 X_4 := g_X^1, X_1 X_2 X_3 X_5 X_6 := g_X^2, X_4 X_5 X_7 X_8 := g_X^3, X_3 X_6 X_9 := g_X^4 \rangle, (1)
G_Z = \langle Z_1 Z_2 := g_Z^1, Z_1 Z_3 := g_Z^2, Z_2 Z_4 := g_Z^3, Z_5 Z_6 := g_Z^4, Z_7 Z_8 := g_Z^5, Z_8 Z_9 := g_Z^6 \rangle, (2)
S_X = \langle g_X^1 g_X^2, g_X^3 g_X^4 \rangle, (3)
S_Z = \langle g_Z^1 g_Z^3, g_Z^2, g_Z^4 g_Z^6, g_Z^5 \rangle. (4)

These gauge and stabilizer generators are also shown in Fig. 6. Consider the original measurement protocol for the heavy-hex code [20], in which we first measure X-checks, then Z-checks. After each measurement sub-round, we can identify an “instantaneous stabilizer group” (ISG) [31] consisting of those gauge and stabilizer generators that fix the state (up to a sign) at that given point in time. The ISGs after each of the two check measurement sub-rounds are shown in Fig. 6. The gauge operators g_i^{X/Z} indicated appear with a ±1 sign (depending on that operator’s measurement outcome) in the ISG, while (in the absence of errors) each stabilizer operator appears with a +1 sign in the ISGs.

Stabilizer measurement outcomes are used for error-correction – the product of two consecutive stabilizer measurement outcomes of the same stabilizer generator forms a detector in the subsequent decoding problem. The values of these stabilizers are inferred from the measurements of their comprising checks (Equations 3 – 4). In the original formulation of the heavy-hex code, the checks are measured in two rounds [20]. In one round, the X checks are measured with a syndrome measurement circuit that couples the data qubits to the blue ancilla qubits via the grey qubits (that are not marked with a cross), which act as “flag” qubits (see Fig. 6(a)). The blue and grey qubits are measured at this point, with the flag qubits providing extra information on the likelihood of hook errors having occurred, which is fed to the decoder [20]. In the next round, the Z checks are measured using the red qubits shown in Fig. 6(b) as ancillas. We redesign these circuits so that they can be executed in a single round (without flags in the bulk of the patch), thereby reducing the overall time required for syndrome extraction. We introduce this circuit in the next section.

2. Need to redesign the code

A distance-3 heavy-hex code has been previously implemented on an IBM Quantum processor in Ref. [1]. This implementation used the 27-qubit quantum processor Peekskill, which was a fixed qubit, fixed coupler device (like the current Eagle-class processors) and is no longer available. In Ref. [1] the authors achieved logical errors for a logical qubit in the |0⟩/|1⟩ basis of under 6% and in the |+⟩/|−⟩ basis of under 12%. Where they post-selected for leakage error the maximum logical error fell to under 8.6%.

IBM’s current flagship quantum processors are of the Heron class, which are fixed qubit, tunable coupler devices. On the r2 devices, two qubit error rates have improved from a median error rate of approximately 2% on current Eagle-class devices to a median error rate of approximately 0.35% on Heron-class devices, representing nearly an order of magnitude improvement. These error rate improvements appear to come at the cost of slightly shorter T_1/T_2 times, which are on the order of 213/120 µs on the best Heron device. At the same time, the duration of a measurement has increased, from a combined measurement and reset of 768 ns to between 3000 and 4000 ns, depending on which device is used. For mid-circuit measurements, this is a substantial fraction of the T_1/T_2 time, and lead to worse logical qubit performance than that reported on Peekskill, despite the improved two-qubit gate operations. The timing problems are further exacerbated by the fact that the original heavy-hex code extracted Z-type stabilizers and X-type stabilizers in separate syndrome extraction circuits, executed in series (one after the other), requiring an idle time on non-measured qubits of over 8 µs per round of syndrome extraction. We provide details of how we measured the noise impact of performing measurements mid-circuit in the Supplementary Methods.

3. Improved syndrome extraction circuit

Here we introduce a variant of the syndrome extraction circuit for the heavy-hex code, that simultaneously prepares both the X and Z stabilizer ancillas while avoiding the hook errors that would normally require the use of flag qubits. The full circuit used is shown in Fig. 7(f). Let us give some intuition for the theory behind this circuit. Both the heavy-hex code and the surface code make weight-four stabilizer parity measurements in their syndrome extraction circuit. However, the heavy-hex lattice was designed to read out the weight-four checks of the heavy-hex code using flag qubits to mitigate the effect of hook errors. These flag qubits are also used in later rounds of measurements to measure other stabilizer operators. As these qubits are used for two purposes, the complete syndrome readout circuit requires two rounds of measurements. Using intuition from the ‘standard’ surface code readout circuit, we can avoid the need for flag qubits on the heavy-hex lattice, such that we can measure all checks in the same round of measurements.

The surface code realised on the square lattice can avoid the use of flag qubits with an appropriate choice of syndrome readout circuit, see Fig. 7(a). We find that adopting this circuit on the heavy-hex lattice using next-nearest-neighbour CNOT gates gives us a syndrome extraction circuit on the distance-three code that can identify any single error, and measure all types of checks simultaneously. See the circuit in Fig. 7(b). Here we mimic the surface code stabilizer check using next-nearest-neighbour CNOT gates. Figure 7(c) shows the circuit identities used [27], which we can adopt here.

In Fig. 7(d) we show the circuit that measures all the checks for the syndrome extraction circuit including a weight-four Pauli-Z check and two weight-two Pauli-X checks. This circuit is expanded in Fig. 7(e). The total circuit uses ten layers of one- and two-qubit unitary gates in between qubit reset and readout. This circuit is parallelizable overall plaquettes due to the fact that qubits on opposite corners of the plaquette are never used simultaneously. This means adjacent plaquettes that share a corner do not compete to use the same qubit at the same time. For instance, qubit 0 is never addressed at the same time as qubit 6 and likewise qubit 2 is never addressed at the same time as qubit 4.

4. Eliminating the need for reset

An additional improvement we can make to the syndrome extraction circuit of the heavy-hex surface code is to eliminate resets of the measurement qubits. Here we follow the ideas outlined in Ref. [24]. Ordinarily, syndrome extraction circuits measure and then reset qubits. Resetting qubits after measurement serves to decorrelate errors in the measurement outcome and quantum state of the qubits. This otherwise results in time-like correlated errors that serve to reduce the distance of stability experiments [24].

The Marrakesh device employs conditional reset, which consists of a measurement and a Pauli X gate conditioned on the measurement outcome. As this Pauli X gate can be tracked in software, measuring and then resetting qubits is equivalent to simply measuring twice. The device is in the regime in which the measurement dominates the time needed for a round of syndrome extraction and hence, we seek to remove unnecessary measurements from the circuit. We can indeed modify detectors to accommodate syndrome extraction circuits without reset or, equivalently, a second measurement [24]. The only modifications required are to the detectors. During syndrome extraction, detectors must compare measurement outcomes with two rounds prior, rather than the prior round. Initial and final detectors differ from this pattern (final detectors need to take into account the state of the previous detector). PyMatching can decode the resulting experiments with no appreciable loss in decoding power.

This modification halves the time-like code distance for stability experiments, since flipping every second measurement outcome for a single check can result in an undetected logical failure. But when we compare this to a circuit using reset (implemented by measurement), it also halves the number of measurements and the noise associated with these measurements.

B. Using simulation to examine memory/stability tradeoff

We simulate the stability and memory circuits using stim [30] to reconstruct a potential noise model for the observed data from the device, and to predict the effect that improving various aspects of the noise would have on each of these experimental tests.

The noise model we explore is defined as follows. Before each qubit operation on the data qubit, we add a depolarizing channel with parameter p_1Q for single qubit operation and p_2Q for two qubit operation. Inspired by Ref. [24], we separate measurement noise into a quantum and a classical part. The quantum part corresponds to applying a Pauli-X to the measurement qubit before measurement with probability p_q.meas. The classical part accounts for the case where the measurement device outputs a wrong value independently of the state of the measurement qubit. For example, a classical error would lead to a measurement reading 0 even though the measurement qubit is in state |1⟩. We parameterize this classical measurement error with p_c.meas. Finally, we consider idling noise on data qubits when measurement and reset operations take place. An initial estimate of the idling noise can be made following the methodology of Refs. [24, 32] which parametrises idling noise with relaxation time T_1, dephasing time T_2 and measurement time t. On Marrakesh, the quantum device used for our experiments, we find T_1 ≃ T_2 and so consider the same level of noise for each Pauli channels X, Y, and Z. We therefore add a depolarizing channel with parameter p_idle on data qubits during measurement and reset operations.

Finally, we define noise on reset by adding a Pauli-X on the qubits being reset after each reset operation, with probability p_reset. In Table I we report the noise parameters obtained by numerically minimising the mismatch between simulated and experimental data for the memory and stability experiments where we have parametrized the model such that p_q.meas = p_idle. This means the quantum measurement noise is caused by the measurement qubit idling during the time of the measurement. These parameter choices are in agreement with device characterization data presented in the Supplementary Methods.

To examine the effect of these noise sources in both the memory and stability experiments, we vary in simulation the physical error rate of the relevant noise sources; see Fig. 5. Overall this analysis highlights the dominant role of measurement noise in the stability experiment. Classical measurement errors are particularly detrimental for stability experiments, while minimising idling noise is crucial for both the memory and the logical operation on logical qubits. Potentially, the stability experiment could be improved by using resets, but the quality of resets must be high.

Peer review rounds
[{"round": 1, "reviewer_comments": {"reviewer_1": "This manuscript benchmarks an early fault-tolerant superconducting quantum device, aiming to\ncharacterise the failure mechanisms of error‑corrected quantum computing.\nThe authors study the heavy-hex code, and make two incremental improvements to the implementation of the code. Firstly,\nthe authors design novel syndrome extraction circuits for the heavy‑hex code which are shallower, and so can be\nimplemented more quickly, than existing approaches. Secondly, the authors replace resets following measurements with\nclassical Pauli frame update, reducing the number of noisy quantum operations required, and reducing the overall time\ntaken.\nThe authors then conduct two sets of experiments. Firstly the authors conduct a memory experiment, measuring the stability\nof an encoded qubit in time. Memory experiments are a standard practice, and measure the survival probability of a state in\nmemory with increasing numbers of syndrome extraction rounds. They observe that the logical fidelity is improved by their\nnew syndrome extraction circuit.\nSecond, the authors conducted a stability experiment, a proxy for logical gate performance, without explicitly performing\nlogical gates. The authors observe decaying error rates with increasing syndrome extraction rounds. The authors note a\nnegligible difference between using and not using resets.\nFinally the authors construct models of the device of concern and use simulations based on these models to explore\nchanging performance as model parameters change. The authors conclude that mid‑circuit measurement noise is the most\ndetrimental to performance.\nThis work is very thorough and conducted to a high standard. The results are impactful and the experiments are convincing,\nwith sound analysis of the results. All prior work is appropriately cited and the novel aspects are clear. The writing is clear\nand of a high quality.\nThe experiments conducted are largely applications of existing benchmarking methods. However it is nice to have all of the\nabove benchmarks, in addition to extensive simultaneous randomised benchmarking, performed on one device. The paper\nwill be useful as a reference for users and developers of these and similar devices.\nMinor comment: I encourage the authors to consider an alternative presentation of figure 7 as the tiny plots are quite\nimpossible to read.", "reviewer_2": "In the previous round of review, I assess that this manuscript demonstrates benchmarking and noise characterization of\nstate-of-the-art early fault-tolerant quantum computers, which provides valuable insights and toolkits for designing and\noptimizing fault-tolerant quantum devices in the near future. On the other hand, I also mentioned that I do not think their\ncontributions are sufficiently interesting and broadly impactful for the physics community to warrant publication in Nature\nPhysics.\nIn the resubmitted manuscript, the authors have decided to transfer to Nature Communications. They have also satisfyingly\naddressed all of my questions and comments. Based on my previous report, I now believe this manuscript is suitable for\npublication in Nature Communications."}, "author_response": "Response to Reviewer Comments\non the manuscript:\nCharacterising the failure mechanisms of error-corrected quantum logic\ngates\nRobin Harper, Constance Lain`e, Evan Hockings, Campbell McLauchlan, Georgia Nixon, Benjamin\nBrown, Stephen Bartlett\nMarch 2026\nWe appreciate the positive reviews on our manuscript from both reviewers, and their rec-\nommendations to publish.\nBelow is a response to the minor comment of Reviewer #1. We have not made any further\nchanges to the manuscript in response to these reviews.\nReviewer #1\nMinor comment: I encourage the authors to consider an alternative presentation of figure 7\nas the tiny plots are quite impossible to read.\nResponse: InreformattingthemanuscriptforpublicationinNatureCommunications, wehave\nmoved the ’characterisation’ section of the Methods together with Figs. 7-10 into the Supple-\nmentary Material. What was figure 7 is now Supplementary Figure 1. This figure conveys\nthe wealth of data that is captured through simultaneous randomised benchmarking (RB) on\nthese large (> 150 qubit) devices. While the individual RB plots in Supplementary Figure\n1(a) are small, we have included them in the PDF of the Supplementary Material as vector\ngraphics, so it is possible to zoom in on these individual plots and obtain a high-resolution and\nvery readable graph for any and every single qubit. We believe that this presentation is the op-\ntimal way to convey these data – both global and individual-qubit – with no loss of information."}]

Decision letter