Deep neural network inference on an integrated, reconfigurable photonic tensor processor

Domain: neuroscience
Published: 2026-04-09
Editorial outcome: major_revision

Abstract
Artificial neural networks set the pace in machine vision, natural language processing, and scientific discovery, but their performance depends on fast and efficient tensor computations. Analog photonic systems are a promising alternative to digital electronics because they enable ultra-fast, low-latency computing while avoiding capacitive charging losses and electrical crosstalk. Here we present a photonic tensor processor for deep neural network inference, integrated into a standard 19-inch rack unit with a high-speed electronic interface to PyTorch for seamless hardware deployment. The processor implements an all-optical crossbar with nine inputs and three outputs for parallel intensity-based accumulation of weighted signals. Fabricated in imec’s iSiPP50G silicon photonics platform, the chip integrates electro-absorption modulators and photodiodes for scalability and compatibility with high-volume manufacturing. An integrated self-injection-locked microcomb provides stable multi-wavelength carriers. We demonstrate inference on MNIST and CIFAR-10 with 98.1% and 72.0% accuracy, highlighting a compact, reprogrammable platform toward scalable high-speed optical AI accelerators.

Introduction
Artificial intelligence is becoming increasingly central to science, industry, and society. As models grow in size and complexity, they place ever greater demands on computational infrastructure1,2. A major driver of this demand is tensor operations, a fundamental operation underpinning nearly all layers of modern neural networks. At the scale of modern AI models, inference requires hundreds of billions to trillions of multiply-accumulate (MAC) operations, making tensor processing the dominant contributor to latency and energy consumption3–8.

Analog computing is gaining renewed interest for accelerating AI by performing linear algebra operations directly in the physical domain as signals propagate9,10. In the electronic domain, mature crossbar arrays with memory cells which store weights at each junction exemplify this approach11–13, with IBM recently showcasing a 64-core in-memory chip capable of deep network inference14. Alternatively, Lightmatter’s and Lightelligence’s processors employ hybrid photonic–electronic architectures, leveraging light’s intrinsic parallelism and speed to push computational performance beyond conventional limits15,16. By combining optical input modulation with electronic accumulation, these hybrid systems achieve near-digital precision across demanding AI workloads and ultra-low latency in optimization tasks. Photonic approaches bring exciting advantages well-known from telecommunication, such as low latency and low propagation loss. Thus, the possibility to fully leverage these properties through purely optical systems has inspired many different approaches to all-optical computing, including phase-change-material-based in-memory computing17,18, time-wavelength interleaving19, multiplexing across multiple degrees of freedom20–23, diffraction24,25, coherent MZI meshes26,27, and utilizing partial or incoherent light sources28–30. While several demonstrations achieve striking (theoretical) computational powers, many are hard-wired for specific operations, require abstract problem mappings, or face integration and system-level constraints.

Here, we present an integrated photonic tensor processor (PTP) for deep neural network inference, where the linear tensor operations are performed all-optically. The PTP adds optical intensities from incoherent inputs and thus requires only an output photodiode array sized to the output dimension. Electro-absorption modulators provide high-speed input and weight modulation and a one-to-one mapping from model weights to drive levels, enabling arbitrary tensor operations without auxiliary transformations except scaling. Packaged as a rack-mounted system with electronic I/O, calibration procedures, and PyTorch integration, the PTP executes pretrained networks on photonic hardware without chip-specific retraining.

Results
System architecture and operation
Our PTP is based on a silicon on insulator (SOI) photonic integrated circuit (PIC). The PIC is fabricated on imec’s iSiPP50G silicon photonics platform and implements an incoherent optical crossbar array with integrated electro-absorption modulators (EAMs) and photodetectors. The SOI chip contains EAMs to encode input vectors and to set matrix weights through changes in transmission, while on-chip photodiodes convert the results of the optical matrix-vector multiplication into electrical current. A schematic of the PTP architecture is shown in Supplementary Fig. 3.

In order to embed the photonic system within a computer-addressable electronic framework, we employ a ZCU216 RFSoC with a high-speed field programmable gate array (FPGA) to drive and readout the PIC. The integrated on-board RF-DACs run at 4 GS/s for EAM modulation and the RF-ADCs at 2 GS/s for readout. An external host connects over Ethernet to a Jupyter server on the RFSoC’s CPU for interactive control, while the CPU generates the vectors and weight sequences. The CPU then hands these values to the FPGA, which conditions and routes them. High-speed streams are directed to the RF-DACs (EAM inputs) and slower settings to multi-channel DACs that program the crossbar. Reprogramming the full weight array takes 62 ms, whereas streaming inputs and digitizing outputs operate continuously at the RF-DAC/RF-ADC sample rates. Transimpedance amplifiers (TIAs) convert the PIC outputs to voltages, and the RF-ADCs digitize the voltages. The FPGA can decimate the samples before the CPU returns results and metadata to the host. TIAs and weight DACs sit off-board and connect directly to the RFSoC.

We wire-bond the photonic chip to a custom carrier printed circuit board (PCB, Fig. 1a), which we insert into a system board using high-speed RF cables. This allows straightforward physical integration and provides electrical connectivity. The entire system is housed in a standard 19-inch rack. Slow control signals, such as bias voltages ranging from −10 to 10 V, are available via dedicated DAC channels. Figure 1b shows a schematic overview of the system.

In order to optically drive the system, we employ a fully packaged and low-noise self-injection-locked (SIL) microcomb based on a high-Q Si3N4 microresonator31–35 as the input light source. We utilize individual comb lines as input carriers from a single comb source with a fixed spectral spacing, avoiding the need to manually tune and stabilize multiple laser sources. The microcomb provides a 485 GHz free-spectral range (FSR) and delivers about ~11 mW total output, of which we tap 5% for monitoring (Fig. 2c). We demultiplex the comb lines and route the individual carriers to the input grating couplers. EAMs encode vector entries at the inputs onto the different wavelengths using a four-samples-per-symbol scheme with differential DAC drive, and EAMs at each cell store the matrix weights. We compensate for the nonlinear response and wavelength-dependent extinction ratios (Fig. 2d) during weight calibration, which stabilizes effective weight accuracy across carriers. PIC-integrated SiGe photodiodes convert the accumulated optical outputs. We operate the photodiodes at 3 V reverse bias, chosen after observing diminishing responsivity gains beyond 3 V (Fig. 2e). Optical packaging influences the practical power budget. Careful four-axis alignment yields about 2.5 dB insertion loss, and adhesive bonding introduces roughly an additional 1.5 dB along with a wavelength shift (Fig. 2f). We account for these effects in per-channel/per-carrier power allocation and during calibration. Together, carrier power, calibrated EAM nonlinearity, photodiode biasing, and packaging-aware power allocation enable stable, parallel optical multiply-accumulate execution on chip and define the operating envelope for further system scaling.

Weight programming
We employ a dedicated calibration routine to set the system accuracy by mapping target weights to modulator drive voltages using measured transfer functions. We further apply crosstalk compensation and a global output rescale to correct inter-channel coupling and restore a consistent gain. The Supplementary Note 9 details the complete procedures. We realize signed weights with a balanced readout scheme in which each logical weight is the transmission difference between a main row and a reference row. This symmetric encoding centers the operating point and implements signed multiply–accumulate behavior. The primary performance metric is the statistical output error for matrix vector multiplications, ϵMVM, defined as the normalized difference between the optically processed results y'k and ideal digital references yk.

ϵMVM = ||y'k − yk||2 / ||yk||2 (1)

In order to improve overall accuracy, we optionally implement averaged measurements at the cost of decreasing throughput and increasing latency. The MVM error initially decreases with the root of the number of averages, corresponding to a dominantly stochastic error, e.g., from the thermal noise of the transimpedance amplifier. The single-shot, low-latency mode exhibits an error of (19.4 ± 0.5)%, while averaging four times reduces the error to (10.9 ± 0.3)% in a higher-precision mode. Additional averaging yields diminishing returns and approaches a systematic noise floor near 3% as shown in Fig. 3a. This noise floor is mostly attributed to a non-perfect weight programming, also see Supplementary Note 4. Figure 3b compares measured and ideal outputs. The data points cluster tightly around the diagonal, and the error histogram follows the anticipated one over the square root of the averaging factor scaling, indicating that noise is predominantly stochastic. Figure 3c reports absolute weight error versus target weight. We infer effective analog weights with a least-squares fit from measured inputs and outputs. The mean absolute error is below 5%, with larger deviations at higher magnitudes that reflect the asymmetric nonlinear response of the modulators. Finally, we evaluate the system stability over a measurement period of 120 min. For both the low-latency and precision modes, the MVM error stays within 1.1% of the respective mean value, enabling reliable analog computation over long timescales.

Deep neural network inference
To benchmark the system, we develop and evaluate two convolutional neural networks on the photonic tensor processor platform. The first model is a compact baseline network with two convolutional layers followed by a fully connected output layer for 10-class classification. We use this model exclusively for MNIST. The second model is a slightly deeper architecture optimized for CIFAR-10, featuring four convolutional layers before the classification layer. Tables 1 and 2 detail both networks. During inference, the photonic hardware performs the convolution and fully connected layers, and the remaining operations run digitally, translating to 97.5% and 99% optical workload, respectively.

We pretrain both models digitally using PyTorch, employing stochastic gradient descent with momentum for initial training, followed by Adam for hardware-aware fine-tuning. To improve model robustness, we apply cross-entropy loss and data augmentation. After training, we perform fine-tuning over 50 epochs using AIHWKit-Lightning36, incorporating hardware-aware weight noise (fixed at 5%) and output noise (10 and 20%) to reflect the system’s measured behavior. After fine-tuning, we deploy both models on the photonic system for inference. As shown in Fig. 4, the smaller network achieved a classification accuracy of approximately 98% on the full MNIST test dataset in precision mode, and 91% in low-latency mode. For CIFAR-10, we use the more expressive model in precision mode, since CIFAR-10 classification is a much more complex task with less noise tolerance. Photonic inference on a subset of 400 images reaches an accuracy of 72%.

The larger drop in accuracy during photonic inference for CIFAR-10 is mainly driven by the larger layer sizes and, consequently, higher dimensionality of the underlying matrix-vector multiplications. Because the PTP has a finite matrix size, we implement these MVMs via tiling, i.e., we decompose an MVM into K partial MVMs and accumulate their outputs digitally. If the partial outputs are uncorrelated and the MVM error is uncorrelated and stochastic, both the signal and the absolute error scale √K, such that the relative error remains approximately constant. In contrast, correlated, systematic errors scale as K, causing the relative error to increase with the amount of tiling. The PTP system is dominated by stochastic noise, as shown in Fig. 3a, and thus supports tiling. However, a small systematic error component is present and can become dominant for a large amount of tiling. In the CIFAR-10 network, the fully connected classifier has the largest input dimension. Executing only this layer digitally increases the accuracy by 6%, also see Supplementary Note 3.

Methods
Photonic matrix
We encode each input vector element (x1, ..., xM) onto a different wavelength channel using the on-chip modulators. The matrix is implemented as a waveguide crossbar array22 equipped with directional couplers that evenly distribute the optical power to all EAM cells. For an M×N matrix, the horizontal couplers have splitting ratios of 1/(N−j+1) for column index j, and the vertical couplers have splitting ratios of 1/i for row index i. The matrix elements themselves are encoded in the EAM transmission. A frequency comb with a line spacing larger than the electrical bandwidth ensures interference-free detection of the summed optical intensities along the individual columns. The output power at each column photodiode corresponds to the inner product between the input vector and the respective kernel.

Input encoding
We are using a zero-mean, four-sample, return-to-zero, alternating encoding, such that the TIAs see only changes around the optical bias. Our desired input symbol is kn ∈ [−1, 1]. We encode it into 4 DAC samples without a DC part, setting the operation/symbol rate of the system to a quarter of the DACs speed:
sn = (sn, 4n+1, sn, 4n+2, sn, 4n+3, sn, 4n+4) = (kn, 0, −kn, 0) (2)
We drive the ADC at half the speed of the DAC and sample at the non-zero time slots:
ken = C(s4n+1 − s4n+3) (3)
With C being a constant of all involved device parameters (details in the Supplementary Note 7). The two nonzero samples produce opposite-signed fluctuations around the bias, so the AC-coupled output carries a signed value even though the optical power itself is non-negative. Normalizing with 1/2C recovers the encoded symbol:
1/2C * ken = 1/2C * C(s4n+1 − s4n+3) = 1/2C * C(kn − (−kn)) = kn (4)

Weight error
The weight Error is defined as:
ϵΔw = ||w − we||2 / ||w||2 (5)
with Δw = max(w) − min(w)
With w being the desired weight and we the weight set by the PTP. For each target weight value and averaging setting, 1000 random input vectors were processed using the photonic hardware. The photonic output was used to reconstruct the actual implemented weights we via regression. From this, the weight error represents the deviation between the reconstructed and target weights. Repeating this procedure for all weight values and averaging settings yields the datasets of weight errors and reconstructed weights, which is shown in Fig. 3c.

MVM Error
For the MVM vs averaging measurements in Fig. 3a, 20 independent runs were performed to assess how averaging affects the accuracy of photonic matrix–vector multiplications. In each run, 1000 random input vectors of dimension 10 were processed through a 10×10 photonic weight matrix. The averaging parameter was varied over 10 discrete levels. For every run and averaging setting, the photonic MVM outputs were compared with digitally computed reference results to obtain the total MVM error from Eq. 1. All measured and reference output matrices (1000×10 per averaging level) were recorded to enable detailed statistical analysis of accuracy scaling with averaging.
To examine the statistical distribution of individual MVM output errors of Fig. 3b, the complete measured and reference datasets from 100 runs were evaluated at two averaging settings (low-latency and precision). Each run processed 1000 random input vectors of dimension 10 through a 10×10 photonic weight matrix, producing 1000 output vectors with 10 elements each. Every individual value within these output vectors—that is, each input–output product corresponding to one row–column multiplication result of the MVM—was compared to its digitally computed reference. The measured values were plotted against their targets to visualize overall fidelity, and the deviations were analyzed via histograms and Gaussian fits.

Interfacing
Optical: We glue a fiber array to the PIC using the Nanoscribe IP-S photoresin. We align the fiber array with a 4-axis optimization stage before applying the glue. After retracking the array, we apply the glue and re-align for optimal transmission before curing the resin. To prevent the resin from flowing into the coupling region, we print a barrier onto the bottom of the fiber array using a Nanoscirbe QuantumX and the photoresin IP-S.
Electrical: A carrier PCB was designed to establish an electrical connection to the chip. The chip is glued to the bare copper area in the center and connected to the PCB via bond wires. The input modulation voltages from the RF-DACs enter the board differentially via Samtec ARC6 connectors and are transitioned to single-ended signals using local baluns (Mini-Circuits’ TCM2-43X+). All input modulators share a common connection to the bias voltage, which is decoupled with capacitors located directly underneath. The photodiode output currents are routed to SMA connectors at the left edge to be connected to external TIAs. The TIA inputs provide a 50 R path to ground, while the other end of the photodiodes shares a common, locally decoupled bias voltage like the input EAMs. The TIA outputs are connected to a second set of SMA connectors, transitioned to differential signals using the same baluns as for the inputs, and then routed to ARC6 connectors to be connected to the RF-ADCs. Although not high-speed, the bias and weight voltages use the same type of connector. All traces are impedance-matched to 50 R (single-ended) or 100 R (differential) and group wise length-matched.

Peer review rounds
[{"round": 1, "reviewer_comments": {"reviewer_1": "The manuscript \"Deep Neural Network Inference on an Integrated, Reconfigurable Photonic Tensor Processor\" presents a\nphotonic accelerator utilizing Electro-absorption Modulators (EAMs) for matrix operations. While the authors demonstrate a\nsystem capable of executing a high percentage of the computational workload in the optical domain during the \"Deep Neural\nNetwork Inference\" phase, I have identified critical deficiencies regarding the hardware novelty, device characterization,\nand the definition of computing precision.\nConsequently, I do not believe this work represents the significant technological advance required for publication in Nature\nCommunications. My specific concerns are detailed below:\n1. Limited Hardware Innovation:\nThe proposed architecture lacks sufficient hardware novelty. The fundamental design of the incoherent photonic tensor\nprocessor closely resembles architectures that have already been extensively reported in previous literature. Specifically,\nthe hardware concepts presented here do not distinguish themselves significantly from prior works such as [Ref 1:\nhttps://doi.org/10.1038/s41467-024-49768-y] and [Ref 2: https://doi.org/10.1038/s41586-024-07590-y]. Given the established\nstate of the art, the incremental contribution of this specific implementation is limited.\n2. Insufficient Characterization and Utilization of EAMs:\nThere is a notable absence of bandwidth characterization for the Electro-absorption Modulators (EAMs) in the manuscript.\nWhile the authors employ EAMs as weight encoding units, they fail to exploit the primary advantage of these devices: high-\nspeed modulation. The manuscript notes that a full weight-array reprogram takes 62 ms, effectively treating the EAMs as\nslow, quasi-static variable attenuators. In the current landscape of optical computing, performing low-speed weighting on\nsuch small-scale optical matrices (10x10) fails to demonstrate the competitive throughput or latency advantages of optical\ncomputing compared to electronic baselines.\n3. Questionable Definition of Computing Precision:\nThe authors’ reliance on \"multiple averages\" to define the system's accuracy is problematic. The manuscript states that\naveraging four repetitions lowers the error to about 11% (precision mode) and further averaging approaches a noise floor.\nHowever, statistical averaging is a post-processing technique that trades latency for signal-to-noise ratio; it does not\nrepresent the intrinsic, single-shot computational precision of the Photonic Tensor Processor. Presenting\naveraged results as the hardware's native precision capability masks the true limitations of the analog noise floor and quantization effects.\nConclusion:\nAlthough the demonstration of a high optical workload proportion is a positive integration step, the lack of architectural\nnovelty, the underutilization of the EAMs' high-speed capabilities, and the reliance on averaging to boost precision metrics\nlimit the impact of this work. Therefore, I cannot recommend it for publication in Nature Communications.", "reviewer_2": "Please receive my review of the paper titled “Deep Neural Network Inference on an Integrated, Reconfigurable Photonic\nTensor Processor\" authored by L. Meyer et al. The manuscript presents experimental measurement results of a photonic\ntensor processor designed to perform artificial neural network inference. The authors demonstrate an integrated system with\nnine input and three output channels. The system is capable of parallel, intensity-based accumulation of weighted signals\nusing incoherent light.\nThe manuscript shows a good system demonstration with a high degree of integration. This work presents a fully packaged,\nrack-mounted system—complete with a Pytorch software stack. The novelty of the work is further enhanced with the use of\nan optical microcomb as the input light source. The microcomb lends itself to a wavelength-division multiplexed input, where\nthe results of matrix multiplications can be integrated/summed automatically by the output photodetectors. The authors have\nalso included a comprehensive calibration and error analysis of their hardware. Such analysis is useful for other researchers\nwho seek to reproduce the results presented in this manuscript.\nOverall, the manuscript is well written, but there are several important technical concerns that should be addressed.\n1. How do the authors encode data in the different frequencies/wavelengths of the optical frequency comb?\n2. I notice significant input power differences between the different microcomb lines in Figure 2(c). EAMs typically also have\nstrong wavelength dependence where modulation is stronger at lower wavelengths. The authors share some calibration\nprocedure in the supplemental information, but it isn’t clear if the procedure successfully addresses this issue. Given the\nimportance of addressing this power variation, the authors should include this in their discussion section.\n3. To achieve high accuracy (\"precision mode\"), the system requires averaging multiple shots/measurements, which\ninherently reduces the throughput and latency advantages that photonics promises. What is the input/weight/output bit\nprecisions of the system in the single-shot (“low-latency”) mode and in the high-accuracy (“precision”) mode?\n4. The specific implementation described involves nine input and three output channels. This is relatively small compared to\nthe tensor sizes in modern AI models. The authors should address how they would realistically increase the size of photonic\ntensor processor. The authors should also discuss how convolution operations are performed in the hardware. Representing\na convolution operation, even when the kernel is small, can result in large matrix multiplications. When large matrix\nmultiplications are performed by partial smaller multiplications with limited output precision, the resulting precision of the\noverall multiplication can degrade significantly. The authors should discuss whether they have successfully overcome this\nissue with measured data.\n5. The CIFAR-10 accuracy observed at 72% is very low compared to the performance of the digital hardware, why? Is this\ndue to size or bit precision?\n6. The use of the word all-optical: while linear tensor/matrix multiplications are performed optically on chip, the computation\nof the nonlinear functions are still performed digitally. Therefore, I don’t think it’s justified to use the term “all-optical” in this\ncontext. All-optical deep learning hardware typically performs the nonlinear calculations optically either using atom-light\ninteraction or nonlinear optical components.\n7. The paper would benefit heavily from a more direct comparison of energy-per-operation (TOPS/W) against conventional\nelectronics and other optical tensor processors to solidify the \"efficiency\" claims.\nIn summary, the manuscript is well written and is technically sound. The authors, however, should address the shortcomings\nin their manuscript for it to be appropriate for the readership of Nature Communications.", "reviewer_3": "The paper titled \"Deep Neural Network Inference on an Integrated, Reconfigurable Photonic Tensor Processor\"\ndemonstrates a notable system-level integration of optical computing. The engineering work is impressive, and the work\nappears to be within the scope of Nature Communications. However, several key issues require clarification to strengthen\nthe manuscript.\n1. The description of the system as an \"all-optical photonic tensor processor\" may be an overstatement. Even considering\nthe tensor core in isolation, it appears to rely on supporting electronic components for operation.\n2. The micro-architecture of the tensor core is not sufficiently detailed. The description largely relies on the term \"crossbar\"\nwithout providing a clear structural diagram. A dedicated schematic illustrating the core's design would significantly improve\nclarity.\n3. Key system-level specifications are missing. These include:\na) The clock rates for vector input and matrix-vector multiplication (MVM) output.\nb) The system's capability for pipelined operation.\nc) A breakdown of the 63 ms weight loading time, identifying the dominant contributor.\nd) A power consumption breakdown for the entire system.\ne) The measured or theoretical peak computational throughput.\n4. There is an inconsistency regarding numerical precision. The text mentions 4 bits (Line 185), but Fig. 3c shows\napproximately 50 distinct weight levels. A clarification on the effective bit-width for both weights and activations is necessary.\n5. The x-axis label in Fig. 3a is ambiguous. Given the data points, it likely represents the value of 'n', instead of ‘2n’. The\nlabel should be defined explicitly.\n6. The weight error analysis (from Line 396) appears to assume an errorless input vector, which is an unrealistic\nsimplification. The observed photonic output error is likely a function of errors in both the weights and the input vector. This\nanalysis should be detailed to be convincing.\n7. For the MNIST and CIFAR-10 classification tasks, it would be valuable to include baseline results obtained from standard\nelectronic hardware (e.g., CPUs/GPUs) for a more direct performance comparison."}, "author_response": "Response to reviewers:\nWe thank all reviewers for their insightful reviews of our manuscript and their very helpful\nrecommendations on how to improve it. We have followed these recommendations in full, as\ndescribed in detail below.\nReviewer #1:\nThe manuscript \"Deep Neural Network Inference on an Integrated, Reconfigurable Photonic\nTensor Processor\" presents a photonic accelerator utilizing Electro-absorption Modulators\n(EAMs) for matrix operations. While the authors demonstrate a system capable of executing a\nhigh percentage of the computational workload in the optical domain during the \"Deep Neural\nNetwork Inference\" phase, I have identified critical deficiencies regarding the hardware\nnovelty, device characterization, and the definition of computing precision. Consequently, I do\nnot believe this work represents the significant technological advance required for publication\nin Nature Communications. My specific concerns are detailed below:\nOur Response:\nWe thank the reviewer for the careful report and for highlighting key points to strengthen the\nimpact of the manuscript. In the revised version, we added high-speed device measurements,\nclarified and quantified the computing precision, and expanded the discussion of our training\napproach that removes the need for per-chip retraining and thus supports deployment at\nscale.\n1. Limited Hardware Innovation:\nThe proposed architecture lacks sufficient hardware novelty. The fundamental design of the\nincoherent photonic tensor processor closely resembles architectures that have already been\nextensively reported in the literature. Specifically, the hardware concepts presented here\ndo not distinguish themselves significantly from prior works such as [Ref 1:\nhttps://doi.org/10.1038/s41467-024-49768-y] and [Ref 2: https://doi.org/10.1038/s41586-\n024-07590-y]. Given the established state of the art, the incremental contribution of this\nspecific implementation is limited.\nOur Response:\nWe agree that the underlying incoherent crossbar principle has already been reported in the\nliterature. The primary advance of our work is the transition from a component-level tensor-\ncore demonstration to a deployable inference system, including a fully packaged, rack-\nmounted platform with an electronic I/O interface, calibration procedures, and PyTorch\nintegration that allows pretrained networks to be executed on photonic hardware without\nchip-specific retraining. In addition, we explicitly quantify the hardware’s noise statistics and\nuse a Gaussian error abstraction during hardware-aware training, so that training is decoupled\nfrom the individual chip instance. Taken together, the end-to-end inference examples provide\nexperimental evidence that photonic hardware-accelerators are functional on a system level\nand support deployment at scale. Thus, our work differs in scope and demonstrated capability\nfrom both cited references, which focus on “perfect linear optics” and fidelity restoration of\ncoherent meshes/crossbars, rather than an end-to-end DNN inference system, software\nintegration, and measured inference workload execution (Ref. 1), and the usage of partial\ncoherent light sources for convolution processing, requiring passing also the train dataset\nthrough the photonic processor to capture the error properties of the circuits (Ref. 2). We\nadded an additional paragraph to the introduction and discussion section, clearly positioning\nour work with respect to the existing literature and highlighting its novelty.\n2. Insufficient Characterization and Utilization of EAMs:\nThere is a notable absence of bandwidth characterization for the Electro-absorption\nModulators (EAMs) in the manuscript. While the authors employ EAMs as weight encoding\nunits, they fail to exploit the primary advantage of these devices: high-speed modulation. The\nmanuscript notes that a full weight-array reprogram takes 62 ms, effectively treating the EAMs\nas slow, quasi-static variable attenuators. In the current landscape of optical computing,\nperforming low-speed weighting on such small-scale optical matrices (10x10) fails to\ndemonstrate the competitive throughput or latency advantages of optical computing\ncompared to electronic baselines.\nOur Response:\nWe thank the reviewer for pointing out the insufficient differentiation between weight-array\nreprogramming time and input modulation/compute bandwidth. The reported 62 ms\ncorresponds to a full reprogramming of the entire weight array (i.e., updating all weight control\nvoltages, including electronic communication and settling/calibration overhead). During\ninference, weights are held stationary as long as possible, so the weight reprogramming time\nis amortized over many input vectors and is not incurred per MVM. This has the benefit of\nreducing digital data shuffling in the system and thus improves efficiency. In contrast, the input\nactivation modulation in our system is operated at 4 GS/s per channel, while the ADCs sample\nat 2 GS/s per channel, enabling high-rate streaming of input vectors. The current inference-\nrate ceiling is therefore set by system-level I/O. We added characterization measurements of\nthe EAMs up to 8 GBaud to show the further potential of the photonic devices. Even though\nthe EAMs support operation at higher bandwidth, we set the operation speed of the system\nto 4 GS/s and 2 GS/s for DACs and ADCs respectively. While higher sampling rates, e.g. 10-20\nGS/s, do not have a large impact on the energy per conversion step at the DAC, ADC efficiency\ndrops significantly [1–3]. We clarified the programming times in the manuscript and added a\nparagraph about the sampling rates in the discussion section.\n[1] B. Murmann ADC Performance Survey 1997-2025\n[2] Luo L, Chen S, Zhou M, Ye T (2017) A 0.014mm2 10-bit 2GS/s time-interleaved SAR ADC\nwith low-complexity background timing skew calibration. In: 2017 Symposium on VLSI Circuits.\nIEEE, Kyoto, Japan, pp C278–C279\n[3] Li R, Fu J, Ma S, Wu D, Guo X, Wu J (2023) 10GS/s 10bit Time-interleaved SAR ADC in 28nm\nCMOS. In: 2023 8th International Conference on Integrated Circuits and Microsystems (ICICM).\nIEEE, Nanjing, China, pp 16–20\n3. Questionable Definition of Computing Precision:\nThe authors’ reliance on \"multiple averages\" to define the system's accuracy is problematic.\nThe manuscript states that averaging four repetitions lowers the error to about 11% (precision\nmode) and further averaging approaches a noise floor. However, statistical averaging is a post-\nprocessing technique that trades latency for signal-to-noise ratio; it does not represent the\nintrinsic, single-shot computational precision of the Photonic Tensor Processor. Presenting\naveraged results as the hardware's native precision capability masks the true limitations of the\nanalog noise floor and quantization effects.\nOur Response:\nWe agree that the single shot error of (19.4 ± 0.5) % is the intrinsic error of the photonic system\nand not the four times averaged readout with an error of (10.9 ± 0.3) %. The noise in the\nphotonic system is dominantly stochastic and not systematic as shown in Fig 3. a, as MVM\nerror decreases to the (systematic) error floor with additional averaging, enabling a\nperspective for improvement by optimizing the ratio between photonic signal strength and\nelectronic noise from the transimpedance amplifier. We clarified the paragraph in the\nmanuscript, explicitly stating the MVM errors and the throughput/latency penalty induced by\naveraging.\nConclusion:\nAlthough the demonstration of a high optical workload proportion is a positive integration\nstep, the lack of architectural novelty, the underutilization of the EAMs' high-speed\ncapabilities, and the reliance on averaging to boost precision metrics limit the impact of this\nwork. Therefore, I cannot recommend it for publication in Nature Communications.\nOur Response:\nWe hope these additional measurements and clarifications address the reviewer’s concerns.\nReviewer #2:\nPlease receive my review of the paper titled “Deep Neural Network Inference on an Integrated,\nReconfigurable Photonic Tensor Processor\" authored by L. Meyer et al. The manuscript\npresents experimental measurement results of a photonic tensor processor designed to\nperform artificial neural network inference. The authors demonstrate an integrated system\nwith nine input and three output channels. The system is capable of parallel, intensity-based\naccumulation of weighted signals using incoherent light.\nThe manuscript shows a good system demonstration with a high degree of integration. This\nwork presents a fully packaged, rack-mounted system—complete with a Pytorch software\nstack. The novelty of the work is further enhanced with the use of an optical microcomb as the\ninput light source. The microcomb lends itself to a wavelength-division multiplexed input,\nwhere the results of matrix multiplications can be integrated/summed automatically by the\noutput photodetectors. The authors have also included a comprehensive calibration and error\nanalysis of their hardware. Such analysis is useful for other researchers who seek to reproduce\nthe results presented in this manuscript.\nOverall, the manuscript is well written, but there are several important technical concerns that\nshould be addressed.\nOur Response:\nWe thank the reviewer for the positive comments and the detailed technical feedback, which\nhelped improve the manuscript. We revised the manuscript as described in the following:\n1. How do the authors encode data in the different frequencies/wavelengths of the optical\nfrequency comb?\nOur Response:\nWe demultiplex the different carriers of the frequency comb and route the individual carriers\nto the input grating couplers of the SOI PIC. The input EAMs in each arm modulate the data\nonto the carriers. The input encoded and weighted signals are then accumulated along the\ndifferent bus waveguides for each row. We clarified the corresponding paragraph in the\nmanuscript.\n2. I notice significant input power differences between the different microcomb lines in Figure\n2(c). EAMs typically also have strong wavelength dependence where modulation is stronger at\nlower wavelengths. The authors share some calibration procedure in the supplemental\ninformation, but it isn’t clear if the procedure successfully addresses this issue. Given the\nimportance of addressing this power variation, the authors should include this in their\ndiscussion section.\nOur Response:\nWe thank the reviewer for this point. The microcomb line-to-line power variation and\nthe wavelength-dependent electro-absorption response of the EAMs are important\nnonidealities that must be compensated to achieve accurate MVM operation. In our system,\nthese effects appear as channel-dependent, nonlinear weight transfer functions, which we\nexplicitly measure and correct using a per-channel weight-map calibration. Specifically, for\neach channel we sweep the relative range 𝑟 ∈ [−1,1] while holding other channels at zero and\nrecord the corresponding optical response, yielding a measured calibration curve 𝑓:𝑟 ↦ 𝑦 (SI\n𝑐\nFig. 9). These curves capture both the different optical powers of the individual comb lines and\nthe wavelength dependence of the EAM modulation depth. During weight programming,\ndesired weights are mapped into a common feasible target range, and the required drives are\nobtained by numerically inverting the measured per-channel calibration curves via\ninterpolation (𝜌 = 𝑓−1(𝑡 )). Then, the measured crosstalk matrix is applied as an additional\n𝑐 𝑐 𝑐\ncorrection step. We clarified the explanation in the Supplementary Information and expanded\nthe error discussion in the main text.\n3. To achieve high accuracy (\"precision mode\"), the system requires averaging multiple\nshots/measurements, which inherently reduces the throughput and latency advantages that\nphotonics promises. What is the input/weight/output bit precisions of the system in the single-\nshot (“low-latency”) mode and in the high-accuracy (“precision”) mode?\nOur Response:\nWe agree that averaging reduces the throughput and latency of the photonic system. We\nclearly state this penalty in the main text now. We added a new simulation in the\nsupplementary information, computing the MVM error for a digital system when quantizing\nthe inputs to 8 bit and different weight quantization. The MVM error of (19.4 ± 0.5) % is close\nto a digital system with 8 bit input quantization and 3 bit weight quantization, while the MVM\nerror of (10.9 ± 0.3) % is close to 4 bit weight quantization.\n4. The specific implementation described involves nine input and three output channels. This\nis relatively small compared to the tensor sizes in modern AI models. The authors should\naddress how they would realistically increase the size of photonic tensor processor. The\nauthors should also discuss how convolution operations are performed in the hardware.\nRepresenting a convolution operation, even when the kernel is small, can result in large matrix\nmultiplications. When large matrix multiplications are performed by partial smaller\nmultiplications with limited output precision, the resulting precision of the overall\nmultiplication can degrade significantly. The authors should discuss whether they have\nsuccessfully overcome this issue with measured data.\nOur response:\nMatrix tiling is necessary for most modern AI models with the present 9-input/3-output\nimplementation. We added an outlook for scaling the size and throughput of the system in the\nmain text. Also, hardware software codesign is an appealing approach to tackle this problem.\nFor example, by using heavily grouped convolutions, as the depthwise separable ones in\nMobileNet, effectively reducing the matrix size. Composing a large MVM from K partial MVMs\ncan indeed degrade precision. For not correlated stochastic noise, the absolute error of a\ncomposed output obtained by summing K partial MVMs increases approximately as √𝐾. At\nthe same time, the magnitude of the accumulated signal also increases as √𝐾 (for\nuncorrelated inputs), implying that the relative stochastic error remains approximately\nconstant with tiling. However, for correlated / systematic errors the total error of the tiled\nMVM increases like K, eventually leading to an increasing relative error. As the noise in our\nsystem is mostly stochastic, also see Fig 3 a, the tiling is less problematic. However, it can get\na problem for tiling very large matrices as for the CIFAR-10 network. We added a paragraph\nregarding the error in the results and discussion of the main text.\n5. The CIFAR-10 accuracy observed at 72% is very low compared to the performance of the\ndigital hardware, why? Is this due to size or bit precision?\nOur response:\nThe lower accuracy on CIFAR-10 is likely driven by the much larger input-vector dimensions in\nthe network, most notably in the final fully connected layer, where tiling becomes more severe\nand the accumulation of non-stochastic errors can limit performance. The largest convolution\nis a 3×3 layer with 64 channels, corresponding to an input vector of 576, whereas the fully\nconnected layer operates on the flattened 8×8×128 tensor, i.e., an input vector of 8192. To\nisolate this effect, we used the experimentally measured activations from the photonic chip\nup to (and including) the layer preceding the classifier and executed only the final fully\nconnected layer digitally. This increased the accuracy from 72% to 78%, supporting the\nconclusion that tiling and the associated non-stochastic error accumulation are a limiting\nfactor at larger matrix sizes. We thank the reviewer for prompting this discussion.\n6. The use of the word all-optical: while linear tensor/matrix multiplications are performed\noptically on chip, the computation of the nonlinear functions are still performed digitally.\nTherefore, I don’t think it’s justified to use the term “all-optical” in this context. All-optical deep\nlearning hardware typically performs the nonlinear calculations optically either using atom-\nlight interaction or nonlinear optical components.\nOur response:\nWe agree that the system is not “all-optical” in the strict sense. While the linear operations are\nperformed in the optical domain, nonlinear activations, control, and calibration are\nimplemented electronically. We originally used “all-optical” to emphasize that the linear\naccumulation is carried out optically (in contrast to approaches that use optical encoding but\nperform weighting and/or accumulation electronically, e.g. https://doi.org/10.1038/s41586-025-08786-6 and https://doi.org/10.1038/s41586-025-08854-x). To avoid ambiguity, we have\nchanged the phrasing in main text.\n7. The paper would benefit heavily from a more direct comparison of energy-per-operation\n(TOPS/W) against conventional electronics and other optical tensor processors to solidify the\n\"efficiency\" claims.\nOur response:\nWe thank the reviewer for the suggestion and added a complete power consumption\nbreakdown in the Supplementary Information and a paragraph in the discussion of the main\ntext comparing the PTP to other analog processors and state of the art GPUs.\nIn summary, the manuscript is well written and is technically sound. The authors, however,\nshould address the shortcomings in their manuscript for it to be appropriate for the readership\nof Nature Communications.\nOur Response:\nWe thank the reviewer for the positive evaluation and for raising the technical points above.\nWe believe the revisions address these concerns and improve the clarity and completeness of\nthe manuscript\nReviewer #3:\nThe paper titled \"Deep Neural Network Inference on an Integrated, Reconfigurable Photonic\nTensor Processor\" demonstrates a notable system-level integration of optical computing. The\nengineering work is impressive, and the work appears to be within the scope of Nature\nCommunications. However, several key issues require clarification to strengthen the\nmanuscript.\nOur Response:\nWe thank the reviewer for acknowledging our work and for the in-depth, which helped us\nfurther strengthen the manuscript. We revised the manuscript as described in the following:\n1. The description of the system as an \"all-optical photonic tensor processor\" may be an\noverstatement. Even considering the tensor core in isolation, it appears to rely on supporting\nelectronic components for operation.\nOur Response:\nWe thank the reviewer for raising this point. The major difference to other “optical”\nimplementation like https://doi.org/10.1038/s41586-025-08786-6 and\nhttps://doi.org/10.1038/s41586-025-08854-x is that all parts, broadcasting of the inputs,\nweighting and accumulation are implemented in the optical domain. We have changed the\nphrasing in the main text to clarify this point.\n2. The micro-architecture of the tensor core is not sufficiently detailed. The description largely\nrelies on the term \"crossbar\" without providing a clear structural diagram. A dedicated\nschematic illustrating the core's design would significantly improve clarity.\nOur Response:\nWe agree with the reviewer and added a diagram in the supplementary information to explain\nthe crossbar architecture.\n3. Key system-level specifications are missing. These include:\nOur Response:\nWe thank the reviewer for pointing this out. We added the following specifications to the\nmanuscript.\na) The clock rates for vector input and matrix-vector multiplication (MVM) output.\nThe ADCs and DACs run at 4 GSa/s and 2 GSa/s respectively. With the four-samples per input\nencoding and two-sample read out scheme the operation rate of the system is 1 GHz. We\nclarified this in the method part of the main text\nb) The system's capability for pipelined operation.\nOne main advantage of photonic data processing is that the computation itself is implemented\nby the propagation of optical fields within the integrated circuit. In contrast to systolic arrays,\nthe full matrix vector multiplication is implemented in a single symbol period / “clock cycle”\nand no pipelining is required, drastically reducing latency. While the second symbol can in\nprinciple propagate through the photonic circuit before the previous is detected at the\nphotodetector, the propagation time through the circuit is diminishing small in comparison\nthrough the symbol length for the given photonic circuit on a sub 1 mm scale. We added this\ninformation in the discussion part of the main text.\nc) A breakdown of the 63 ms weight loading time, identifying the dominant contributor.\nOur system is operated in a weight-stationary inference regime, where weights are kept fixed\nfor long sequences of input vectors/patches to minimize digital data transfer. The measured\n62 ms corresponds to a full-array update and is dominated by control-path overhead (FPGA\nevaluation-board communication), rather than by the intrinsic response time of the EAMs or\nthe update capability of the DAC controlling the weights. The LTC2668 DACs would support\nmicrosecond-scale update capability.\nd) A power consumption breakdown for the entire system.\nWe added a complete Power consumption breakdown in the Supplementary Information. The\nsystem currently consumes 17.78 W and has a projected power consumption of 2.5 W.\ne) The measured or theoretical peak computational throughput.\nThe computational throughput of the photonic tensor core under continuous streaming\noperation with an effective symbol rate of 1 GHz and a 9×3 MVM per symbol is 27 GMAC/s.\nUsing the standard convention 1 MAC = 2 operations (multiply + accumulate), this corresponds\nto a peak throughput of 0.054 TOPS in the present system configuration (single-shot, weights\nstationary, no averaging). The intrinsic opto-electronic devices (EAMs and photodetectors)\nsupport bandwidths in the tens of GHz, if the system-level electronics and packaging were\nupgraded to operate at 50 GHz symbol rates, the corresponding peak core throughput would\nscale proportionally to ~2.7 TOPS. We added this information, in addition to a general scaling\noutlook, to the discussion part of the main text.\n4. There is an inconsistency regarding numerical precision. The text mentions 4 bits (Line 185),\nbut Fig. 3c shows approximately 50 distinct weight levels. A clarification on the effective bit-\nwidth for both weights and activations is necessary.\nOur Response:\nWe thank the reviewer for raising this point. While the number of distinct weight levels is an\nimportant factor, it is not the only contribution to overall precision. We therefore compare our\nmeasured MVM error to the error of an ideal digital MVM with 8-bit input quantization and\nvarying weight quantization: (19.4 ± 0.5)% is comparable to 3-bit weights and (10.9 ± 0.3)% to\n4-bit weights. We added a new section in the Supplementary Information simulating the\nequivalent digital weight quantization. The DACs and ADCs feature 14-bit and we added new\nmeasurements on the full DAC-EAM-PD-ADC transmission path to the supplementary\ninformation. The systematic transmission error of 0.3 % is small in comparison to the\nsystematic MVM error of the full system, indicating that it’s not constraint by the input/output\ninterface.\n5. The x-axis label in Fig. 3a is ambiguous. Given the data points, it likely represents the value\nof 'n', instead of ‘2n’. The label should be defined explicitly.\nOur Response:\nWe agree with the reviewer and changed the x-axis label of Fig. 3a.\n6. The weight error analysis (from Line 396) appears to assume an errorless input vector, which\nis an unrealistic simplification. The observed photonic output error is likely a function of errors\nin both the weights and the input vector. This analysis should be detailed to be convincing.\nOur Response:\nWe agree that the observed output error can arise from both weight and input errors, and that\nfinite ENOB and residual non-linearities (EAM transfer function, PD/TIA) can contribute. In the\nrevised manuscript/Supplementary Information, we clarify this point and include the\nadditional DAC-EAM-PD-ADC transmission measurement described above. The systematic\ncontribution from the I/O chain is small (systematic transmission error of 0.3 %) compared to\nthe MVM error.\n7. For the MNIST and CIFAR-10 classification tasks, it would be valuable to include baseline\nresults obtained from standard electronic hardware (e.g., CPUs/GPUs) for a more direct\nperformance comparison.\nOur Response:\nThe performance of the network strongly depends on the chosen architecture. For the\nnetworks used in the manuscript and shown in Table 1, the accuracy for MNIST is 98.9 % and\nfor CIFAR 10 89.5 %. Using advanced vision transformer models, accuracies above 99 % are\npossible for both datasets, https://doi.org/10.48550/arXiv.2205.12755 .\nWe thank the editor and reviewers for their time and constructive feedback."}, {"round": 2, "reviewer_comments": {"reviewer_2": "The authors have addressed the technical concerns I previously highlighted in the updated manuscript. I support the\npublication of this manuscript on Nature Communications. The manuscript shows a good system demonstration with a high\ndegree of integration: from hardware to software.\nMinor comments:\nI notice the authors only deleted the word \"all\" from \"all-optical\" because of my original concern #6. However, it leads to\nawkward sentences such as in the abstract: \"Here we present an optical photonic tensor processor ...\" Please revise the\ngrammatical mistakes.", "reviewer_3": "The authors have provided thoughtful and substantive replies to most of the problems raised and made revisions and\nsupplements in response to the review comments, significantly improving the scientific rigor and clarity of the manuscript.\nThe presented work on an integrated photonic tensor processor demonstrates the feasibility and unique value of optical\ncomputing for low-latency, programmable DNN inference. Current limitations, primarily related to engineering maturity (e.g.,\nenergy efficiency), are also discussed candidly. This manuscript is acceptable for publication."}, "author_response": "Response to reviewers:\nWe appreciate the careful revision of our manuscript, and we corrected the grammatical mistake. We\nthank the reviewer for his detailed feedback during the review process and for supporting the\npublication of our work.\nResponse to reviewers:\nWe once again thank the reviewer for the thoughtful feedback, which has significantly improved the\nquality of our work. We also appreciate that the reviewer is satisfied with our previous responses."}]

Decision letter