Two's complement

Two's complement is the most common method of representing signed (positive, negative, and zero) integers on computers, and more generally, fixed point binary values. Two's complement uses the binary digit with the greatest place value as the sign to indicate whether the binary number is positive or negative. When the most significant bit is 1, the number is signed as negative; and when the most significant bit is 0 the number is signed as positive.
Unlike the one's complement scheme, the two's complement scheme has only one representation for zero. Furthermore, arithmetic implementations can be used on signed as well as unsigned integers
and differ only in the integer overflow situations.
Procedure
Two's complement is achieved by:
Step 1: starting with the equivalent positive number.
Step 2: inverting (or flipping) all bits – changing every 0 to 1, and every 1 to 0;
Step 3: adding 1 to the entire inverted number, ignoring any overflow. Accounting for overflow will produce the wrong value for the result.
For example, to calculate the decimal number −6 in binary:
Step 1: +6 in decimal is 0110 in binary; the leftmost significant bit (the first 0) is the sign (just 110 in binary would be -2 in decimal).
Step 2: flip all bits in 0110, giving 1001.
Step 3: add the place value 1 to the flipped number 1001, giving 1010.
To verify that 1010 indeed has a value of −6, add the place values together, but subtract the sign value from the final calculation. Because the most significant value is the sign value, it must be subtracted to produce the correct result: 1010 = −(1×23) + (0×22) + (1×21) + (0×20) = 1×−8 + 0 + 1×2 + 0 = −6.
Theory
Two's complement is an example of a radix complement.
The 'two' in the name refers to the term which, expanded fully in an -bit system, is actually "two to the power of N" - (the only case where exactly 'two' would be produced in this term is , so for a 1-bit system, but these do not have capacity for both a sign and a zero), and it is only this full term in respect to which the complement is calculated. As such, the precise definition of the Two's complement of an -bit number is the complement of that number with respect to .
The defining property of being a complement to a number with respect to is simply that the summation of this number with the original produce . For example, using binary with numbers up to three-bits (so and , where '2' indicates a binary representation), a two's complement for the number 3 is 5, because summed to the original it gives . Where this correspondence is employed for representing negative numbers, it effectively means, using an analogy with decimal digits and a number-space only allowing eight non-negative numbers 0 through 7, dividing the number-space in two sets: the first four of the numbers 0 1 2 3 remain the same, while the remaining four encode negative numbers, maintaining their growing order, so making 4 encode -4, 5 encode -3, 6 encode -2 and 7 encode -1. A binary representation has an additional utility however, because the most significant bit also indicates the group (and the sign): it is 0 for the first group of non-negatives, and 1 for the second group of negatives. The tables at right illustrate this property.
Calculation of the binary two's complement of a positive number essentially means subtracting the number from the . But as can be seen for the three-bit example and the four-bit , the number will not itself be representable in a system limited to bits, as it is just outside the bits space (the number is nevertheless the reference point of the "Two's complement" in an -bit system). Because of this, systems with maximally -bits must break the subtraction into two operations: first subtract from the maximum number in the -bit system, that is (this term in binary is actually a simple number consisting of 'all 1s', and a subtraction from it can be done simply by inverting all bits in the number also known as the bitwise NOT operation) and then adding the one. Coincidentally, that intermediate number before adding the one is also used in computer science as another method of signed number representation and is called a Ones' complement (named that because summing such a number with the original gives the 'all 1s').
Compared to other systems for representing signed numbers (e.g., ones' complement), the two's complement has the advantage that the fundamental arithmetic operations of addition, subtraction, and multiplication are identical to those for unsigned binary numbers (as long as the inputs are represented in the same number of bits as the output, and any overflow beyond those bits is discarded from the result). This property makes the system simpler to implement, especially for higher-precision arithmetic. Additionally, unlike ones' complement systems, two's complement has no representation for negative zero, and thus does not suffer from its associated difficulties. Otherwise, both schemes have the desired property that the sign of integers can be reversed by taking the complement of its binary representation, but two's complement has an exception - the lowest negative, as can be seen in the tables.
History
The method of complements had long been used to perform subtraction in decimal adding machines and mechanical calculators. John von Neumann suggested use of two's complement binary representation in his 1945 First Draft of a Report on the EDVAC proposal for an electronic stored-program digital computer. The 1949 EDSAC, which was inspired by the First Draft, used two's complement representation of negative binary integers.
Many early computers, including the CDC 6600, the LINC, the PDP-1, and the UNIVAC 1107, use ones' complement notation; the descendants of the UNIVAC 1107, the UNIVAC 1100/2200 series, continued to do so. The IBM 700/7000 series scientific machines use sign/magnitude notation, except for the index registers which are two's complement. Early commercial computers storing negative values in two's complement form include the English Electric DEUCE (1955) and the Digital Equipment Corporation PDP-5 (1963) and PDP-6 (1964). The System/360, introduced in 1964 by IBM, then the dominant player in the computer industry, made two's complement the most widely used binary representation in the computer industry. The first minicomputer, the PDP-8 introduced in 1965, uses two's complement arithmetic as do the 1969 Data General Nova, the 1970 PDP-11, and almost all subsequent minicomputers and microcomputers.
Converting from two's complement representation
A two's-complement number system encodes positive and negative numbers in a binary number representation. The weight of each bit is a power of two, except for the most significant bit, whose weight is the negative of the corresponding power of two.
The value of an -bit integer is given by the following formula:
The most significant bit determines the sign of the number and is sometimes called the sign bit. Unlike in sign-and-magnitude representation, the sign bit also has the weight shown above. Using bits, all integers from to can be represented.
Converting to two's complement representation
In two's complement notation, a non-negative number is represented by its ordinary binary representation; in this case, the most significant bit is 0. Though, the range of numbers represented is not the same as with unsigned binary numbers. For example, an 8-bit unsigned number can represent the values 0 to 255 (11111111). However a two's complement 8-bit number can only represent non-negative integers from 0 to 127 (01111111), because the rest of the bit combinations with the most significant bit as '1' represent the negative integers −1 to −128.
The two's complement operation is the additive inverse operation, so negative numbers are represented by the two's complement of the absolute value.
From the ones' complement
To get the two's complement of a negative binary number, all bits are inverted, or "flipped", by using the bitwise NOT operation; the value of 1 is then added to the resulting value, ignoring the overflow which occurs when taking the two's complement of 0.
For example, using 1 byte (=8 bits), the decimal number 5 is represented by
0000 01012
The most significant bit (the leftmost bit in this case) is 0, so the pattern represents a non-negative value. To convert to −5 in two's-complement notation, first, all bits are inverted, that is: 0 becomes 1 and 1 becomes 0:
1111 10102
At this point, the representation is the ones' complement of the decimal value −5. To obtain the two's complement, 1 is added to the result, giving:
1111 10112
The result is a signed binary number representing the decimal value −5 in two's-complement form. The most significant bit is 1, so the value represented is negative.
The two's complement of a negative number is the corresponding positive value, except in the special case of the most negative number. For example, inverting the bits of −5 (above) gives:
0000 01002
And adding one gives the final value:
0000 01012
Likewise, the two's complement of zero is zero: inverting gives all ones, and adding one changes the ones back to zeros (since the overflow is ignored).
The two's complement of the most negative number representable (e.g. a one as the most-significant bit and all other bits zero) is itself. Hence, there is an 'extra' negative number for which two's complement does not give the negation, see below.
Subtraction from 2N
The sum of a number and its ones' complement is an -bit word with all 1 bits, which is (reading as an unsigned binary number) . Then adding a number to its two's complement results in the lowest bits set to 0 and the carry bit 1, where the latter has the weight (reading it as an unsigned binary number) of . Hence, in the unsigned binary arithmetic the value of two's-complement negative number of a positive satisfies the equality .
For example, to find the four-bit representation of −5 (subscripts denote the base of the representation):
therefore
Hence, with :
The calculation can be done entirely in base 10, converting to base 2 at the end:
Working from LSB towards MSB
A shortcut to manually convert a binary number into its two's complement is to start at the least significant bit (LSB), and copy all the zeros, working from LSB toward the most significant bit (MSB) until the first 1 is reached; then copy that 1, and flip all the remaining bits (Leave the MSB as a 1 if the initial number was in sign-and-magnitude representation). This shortcut allows a person to convert a number to its two's complement without first forming its ones' complement. For example: in two's complement representation, the negation of "0011 1100" is "1100 0100", where the underlined digits were unchanged by the copying operation (while the rest of the digits were flipped).
In computer circuitry, this method is no faster than the "complement and add one" method; both methods require working sequentially from right to left, propagating logic changes. The method of complementing and adding one can be sped up by a standard carry look-ahead adder circuit; the LSB towards MSB method can be sped up by a similar logic transformation.
Sign extension
When turning a two's-complement number with a certain number of bits into one with more bits (e.g., when copying from a one-byte variable to a two-byte variable), the most-significant bit must be repeated in all the extra bits. Some processors do this in a single instruction; on other processors, a conditional must be used followed by code to set the relevant bits or bytes.
Similarly, when a number is shifted to the right, the most-significant bit, which contains the sign information, must be maintained. However, when shifted to the left, a bit is shifted out. These rules preserve the common semantics that left shifts multiply the number by two and right shifts divide the number by two. However, if the most-significant bit changes from 0 to 1 (and vice versa), overflow is said to occur in the case that the value represents a signed integer.
Both shifting and doubling the precision are important for some multiplication algorithms. Note that unlike addition and subtraction, width extension and right shifting are done differently for signed and unsigned numbers.
Most negative number
With only one exception, starting with any number in two's-complement representation, if all the bits are flipped and 1 added, the two's-complement representation of the negative of that number is obtained. Positive 12 becomes negative 12, positive 5 becomes negative 5, zero becomes zero(+overflow), etc.
Taking the two's complement (negation) of the minimum number in the range will not have the desired effect of negating the number. For example, the two's complement of in an eight-bit system is as shown in the table to the right. Although the expected result from negating is there is no representation of with an eight bit two's complement system and thus it is in fact impossible to represent the negation. Note that the two's complement being the same number is detected as an overflow condition since there was a carry into but not out of the most-significant bit.
Having a nonzero number equal to its own negation is forced by the fact that zero is its own negation, and that the total number of numbers is even. Proof: there are nonzero numbers (an odd number). Negation would partition the nonzero numbers into sets of size 2, but this would result in the set of nonzero numbers having even cardinality. So at least one of the sets has size 1, i.e., a nonzero number is its own negation.
The presence of the most negative number can lead to unexpected programming bugs where the result has an unexpected sign, or leads to an unexpected overflow exception, or leads to completely strange behaviors. For example,
the unary negation operator may not change the sign of a nonzero number. e.g., (where "" is read as "becomes").
an implementation of absolute value may return a negative number; e.g.,
Likewise, multiplication by may fail to function as expected; e.g.,
Division by may cause an exception (like that caused by dividing by ); even calculating the remainder (or modulo) by can trigger this exception; e.g.,
In the C and C++ programming languages, the above behaviours are undefined and not only may they return strange results, but the compiler is free to assume that the programmer has ensured that undefined numerical operations never happen, and make inferences from that assumption. This enables a number of optimizations, but also leads to a number of strange bugs in programs with these undefined calculations.
This most negative number in two's complement is sometimes called "the weird number", because it is the only exception.
Although the number is an exception, it is a valid number in regular two's complement systems. All arithmetic operations work with it both as an operand and (unless there was an overflow) a result.
Why it works
Given a set of all possible -bit values, we can assign the lower (by the binary value) half to be the integers from 0 to inclusive and the upper half to be to −1 inclusive. The upper half (again, by the binary value) can be used to represent negative integers from to −1 because, under addition modulo they behave the same way as those negative integers. That is to say that because any value in the set can be used in place of .
For example, with eight bits, the unsigned bytes are 0 to 255. Subtracting 256 from the top half (128 to 255) yields the signed bytes −128 to −1.
The relationship to two's complement is realised by noting that , and is the ones' complement of .
Example
In this subsection, decimal numbers are suffixed with a decimal point "."
For example, an 8 bit number can only represent every integer from −128. to 127., inclusive, since . is equivalent to 161. since
−95. + 256.
= −95. + 255. + 1
= 255. − 95. + 1
= 160. + 1.
= 161.
1111 1111 255.
− 0101 1111 − 95.
=========== =====
1010 0000 (ones' complement) 160.
+ 1 + 1
=========== =====
1010 0001 (two's complement) 161.
Fundamentally, the system represents negative integers by counting backward and wrapping around. The boundary between positive and negative numbers is arbitrary, but by convention all negative numbers have a left-most bit (most significant bit) of one. Therefore, the most positive four-bit number is 0111 (7.) and the most negative is 1000 (−8.). Because of the use of the left-most bit as the sign bit, the absolute value of the most negative number (|−8.| = 8.) is too large to represent. Negating a two's complement number is simple: Invert all the bits and add one to the result. For example, negating 1111, we get . Therefore, 1111 in binary must represent −1 in decimal.
The system is useful in simplifying the implementation of arithmetic on computer hardware. Adding 0011 (3.) to 1111 (−1.) at first seems to give the incorrect answer of 10010. However, the hardware can simply ignore the left-most bit to give the correct answer of 0010 (2.). Overflow checks still must exist to catch operations such as summing 0100 and 0100.
The system therefore allows addition of negative operands without a subtraction circuit or a circuit that detects the sign of a number. Moreover, that addition circuit can also perform subtraction by taking the two's complement of a number (see below), which only requires an additional cycle or its own adder circuit. To perform this, the circuit merely operates as if there were an extra left-most bit of 1.
Arithmetic operations
Addition
Adding two's complement numbers requires no special processing even if the operands have opposite signs; the sign of the result is determined automatically. For example, adding 15 and −5:
0000 1111 (15)
+ 1111 1011 (−5)
===========
0000 1010 (10)
Or the computation of 5 − 15 = 5 + (−15):
0000 0101 (5)
+ 1111 0001 (−15)
===========
1111 0110 (−10)
This process depends upon restricting to 8 bits of precision; a carry to the (nonexistent) 9th most significant bit is ignored, resulting in the arithmetically correct result of 1010.
The last two bits of the carry row (reading right-to-left) contain vital information: whether the calculation resulted in an arithmetic overflow, a number too large for the binary system to represent (in this case greater than 8 bits). An overflow condition exists when these last two bits are different from one another. As mentioned above, the sign of the number is encoded in the MSB of the result.
In other terms, if the left two carry bits (the ones on the far left of the top row in these examples) are both 1s or both 0s, the result is valid; if the left two carry bits are "1 0" or "0 1", a sign overflow has occurred. Conveniently, an XOR operation on these two bits can quickly determine if an overflow condition exists. As an example, consider the signed 4-bit addition of 7 and 3:
0111 (carry)
0111 (7)
+ 0011 (3)
======
1010 (−6) invalid!
In this case, the far left two (MSB) carry bits are "01", which means there was a two's-complement addition overflow. That is, 10102 = 1010 is outside the permitted range of −8 to 7. The result would be correct if treated as unsigned integer.
In general, any two -bit numbers may be added without overflow, by first sign-extending both of them to bits, and then adding as above. The bits result is large enough to represent any possible sum (two's complement can represent values in the range −16 to 15) so overflow will never occur. It is then possible, if desired, to 'truncate' the result back to bits while preserving the value if and only if the discarded bit is a proper sign extension of the retained result bits. This provides another method of detecting overflow—which is equivalent to the method of comparing the carry bits—but which may be easier to implement in some situations, because it does not require access to the internals of the addition.
Subtraction
Computers usually use the method of complements to implement subtraction. Using complements for subtraction is closely related to using complements for representing negative numbers, since the combination allows all signs of operands and results; direct subtraction works with two's-complement numbers as well. Like addition, the advantage of using two's complement is the elimination of examining the signs of the operands to determine whether addition or subtraction is needed. For example, subtracting −5 from 15 is really adding 5 to 15, but this is hidden by the two's-complement representation:
11110 000 (borrow)
0000 1111 (15)
− 1111 1011 (−5)
===========
0001 0100 (20)
Overflow is detected the same way as for addition, by examining the two leftmost (most significant) bits of the borrows; overflow has occurred if they are different.
Another example is a subtraction operation where the result is negative: 15 − 35 = −20:
11100 000 (borrow)
0000 1111 (15)
− 0010 0011 (35)
===========
1110 1100 (−20)
As for addition, overflow in subtraction may be avoided (or detected after the operation) by first sign-extending both inputs by an extra bit.
Multiplication
The product of two -bit numbers requires bits to contain all possible values.
If the precision of the two operands using two's complement is doubled before the multiplication, direct multiplication (discarding any excess bits beyond that precision) will provide the correct result. For example, take . First, the precision is extended from four bits to eight. Then the numbers are multiplied, discarding the bits beyond the eighth bit (as shown by ""):
00000110 (6)
* 11111011 (−5)
============
110
1100
00000
110000
1100000
11000000
x10000000
+ xx00000000
============
xx11100010
This is very inefficient; by doubling the precision ahead of time, all additions must be double-precision and at least twice as many partial products are needed than for the more efficient algorithms actually implemented in computers. Some multiplication algorithms are designed for two's complement, notably Booth's multiplication algorithm. Methods for multiplying sign-magnitude numbers do not work with two's-complement numbers without adaptation. There is not usually a problem when the multiplicand (the one being repeatedly added to form the product) is negative; the issue is setting the initial bits of the product correctly when the multiplier is negative. Two methods for adapting algorithms to handle two's-complement numbers are common:
First check to see if the multiplier is negative. If so, negate (i.e., take the two's complement of) both operands before multiplying. The multiplier will then be positive so the algorithm will work. Because both operands are negated, the result will still have the correct sign.
Subtract the partial product resulting from the MSB (pseudo sign bit) instead of adding it like the other partial products. This method requires the multiplicand's sign bit to be extended by one position, being preserved during the shift right actions.
As an example of the second method, take the common add-and-shift algorithm for multiplication. Instead of shifting partial products to the left as is done with pencil and paper, the accumulated product is shifted right, into a second register that will eventually hold the least significant half of the product. Since the least significant bits are not changed once they are calculated, the additions can be single precision, accumulating in the register that will eventually hold the most significant half of the product. In the following example, again multiplying 6 by −5, the two registers and the extended sign bit are separated by "|":
0 0110 (6) (multiplicand with extended sign bit)
× 1011 (−5) (multiplier)
=|====|====
0|0110|0000 (first partial product (rightmost bit is 1))
0|0011|0000 (shift right, preserving extended sign bit)
0|1001|0000 (add second partial product (next bit is 1))
0|0100|1000 (shift right, preserving extended sign bit)
0|0100|1000 (add third partial product: 0 so no change)
0|0010|0100 (shift right, preserving extended sign bit)
1|1100|0100 (subtract last partial product since it's from sign bit)
1|1110|0010 (shift right, preserving extended sign bit)
|1110|0010 (discard extended sign bit, giving the final answer, −30)
Comparison (ordering)
Comparison is often implemented with a dummy subtraction, where the flags in the computer's status register are checked, but the main result is ignored. The zero flag indicates if two values compared equal. If the exclusive-or of the sign and overflow flags is 1, the subtraction result was less than zero, otherwise the result was zero or greater. These checks are often implemented in computers in conditional branch instructions.
Unsigned binary numbers can be ordered by a simple lexicographic ordering, where the bit value 0 is defined as less than the bit value 1. For two's complement values, the meaning of the most significant bit is reversed (i.e. 1 is less than 0).
The following algorithm (for an -bit two's complement architecture) sets the result register R to −1 if A < B, to +1 if A > B, and to 0 if A and B are equal:
// reversed comparison of the sign bit
if A(n-1) == 0 and B(n-1) == 1 then
return +1
else if A(n-1) == 1 and B(n-1) == 0 then
return -1
end
// comparison of remaining bits
for i = n-2...0 do
if A(i) == 0 and B(i) == 1 then
return -1
else if A(i) == 1 and B(i) == 0 then
return +1
end
end
return 0
Two's complement and 2-adic numbers
In a classic HAKMEM published by the MIT AI Lab in 1972, Bill Gosper noted that whether or not a machine's internal representation was two's-complement could be determined by summing the successive powers of two. In a flight of fancy, he noted that the result of doing this algebraically indicated that "algebra is run on a machine (the universe) which is two's-complement."
Gosper's end conclusion is not necessarily meant to be taken seriously, and it is akin to a mathematical joke. The critical step is "...110 = ...111 − 1", i.e., "2X = X − 1", and thus X = ...111 = −1. This presupposes a method by which an infinite string of 1s is considered a number, which requires an extension of the finite place-value concepts in elementary arithmetic. It is meaningful either as part of a two's-complement notation for all integers, as a typical 2-adic number, or even as one of the generalized sums defined for the divergent series of real numbers 1 + 2 + 4 + 8 + ···. Digital arithmetic circuits, idealized to operate with infinite (extending to positive powers of 2) bit strings, produce 2-adic addition and multiplication compatible with two's complement representation. Continuity of binary arithmetical and bitwise operations in 2-adic metric also has some use in cryptography.
Fraction conversion
To convert a number with a fractional part, such as .0101, one must convert starting from right to left the 1s to decimal as in a normal conversion. In this example 0101 is equal to 5 in decimal. Each digit after the floating point represents a fraction where the denominator is a multiplier of 2. So, the first is 1/2, the second is 1/4 and so on. Having already calculated the decimal value as mentioned above, only the denominator of the LSB (LSB = starting from right) is used. The final result of this conversion is 5/16.
For instance, having the floating value of .0110 for this method to work, one should not consider the last 0 from the right. Hence, instead of calculating the decimal value for 0110, we calculate the value 011, which is 3 in decimal (by leaving the 0 in the end, the result would have been 6, together with the denominator 24 = 16, which reduces to 3/8). The denominator is 8, giving a final result of 3/8.
See also
Ones' complement, an alternative binary number convention
Division algorithm, including restoring and non-restoring division in two's-complement representations
Offset binary
p-adic number
Method of complements, generalisation to other number bases, used on mechanical calculators
Notes
References
Further reading
Two's Complement Explanation, (Thomas Finley, 2000)
External links
Two's complement array multiplier JavaScript simulator
Binary arithmetic