Edge.Auto Hardware Reference Manual TIER IV Sep 20, 2024 Contents 1
1 C1 Camera Technical Reference Manual
1.1 Overview
The C1 camera is a GMSL (Gigabit Multimedia Serial Link) camera specifically designed for automo- tive applications. It has a resolution of 2.5 MP at 1920 x 1280 px. Featuring Sony Semiconductor Solutions’ ISX021 back-side illumination stacked CMOS image sen- sor SoC, this camera enables HDR imaging over 120dB, LED flicker mitigation (LFM), and motion artifact-free image capturing at a frame rate of up to 30fps. With a variety of lens options available, the C1 camera can be adapted to many applications.  The lens undergoes a 6-axis active adjustment during installation, allowing it to achieve optimal sharp- ness even in harsh temperature environments. The ISP (Image Signal Processor) built into the C1 camera’s image sensor performs various image processing tasks, including lens distortion correction, to achieve optimal image quality for automo- tive applications.  The C1 camera also supports an external triggering mechanism, which is essential to achieve capture synchronization with other sensor modalities such as LiDAR or RADAR, enabling sensor fusion. Designed for automotive mass production, the C1 camera is ready to use. All key components com- ply with AEC-Q100 (Grade 2), Q101, and Q200 standards, and are designed to pass automotive-grade reliability tests.
1.2  Mechanical specifications
1.2.1  Camera size

1.2.2 Connector
Fakra Z code with metal shielding 1.2.3  Outline diagram
1.2.4  3-dimensional CAD data
3-dimensional CAD data can be downloaded. Refer to the download link

1.3  Lens specifications
1.3.1  Lens Mount Glued, active alignment applied. Attention:   The lens cannot be exchanged. 1.4  Electrical specifications 1.4.1  Power supply method Power over coax cable 1.4.2  Power consumption 1.7W (under room temperature) 1.4.3  Power supply level 9 - 12 [V] 1.5  Key components 1.5.1  Image Sensor Sony Semiconductor Solutions ISX021 1.5.2  Optical format Diagonal 6.99mm, type 1/2.57 1.5.3  Pixel size 3.0um 1.5.4  High dynamic range Available, 120dB equivalent 1.5.5  LED flicker mitigation Available. See also: What is the LED Flicker Mitigation (LFM)? 1.5.6 Serializer Analog Devices MAX9295A 1.5.7 ISP Integrated on the image sensor
1.6  Block diagram
1.7  Camera function
1.7.1  Output interface GMSL2
1.7.2  Output image format
YUV422 8bit. 16bit/pixel bit depth. 1.7.3  Output image size 1920 x 1280
1.7.4  Framerate
Up to 30fps
1.7.5  Shutter type
Rolling Shutter Note:   Shutter type cannot changed
1.7.6  Drive mode
• Master mode: The camera operates based on its framerate setting. • Shutter trigger mode: See below for the details.
1.7.7 Synchronization
C1 camera supports trigger-based synchronization.  The host (e.g., ECU) sends a synchroniza- tion signal (FSYNC) via the GMSL interface to the image sensor.  When the image sensor re- ceives an FSYNC signal, the exposure starts.  After the exposure time which is controlled by the camera or user, the readout will start.  Then, the MIPI packet is transmitted by the camera. In this mode, an FSYNC input is required to output an image frame. Without FSYNC input, the cam- era will not output the image data. The FSYNC pin of the image sensor is connected to the MFP3 GPIO of the serializer. The user needs to configure the deserializer so the synchronization output pin on the ECU is mapped to this pin.
1.7.8  Embedded data output
Supported. New in version camera: driver v1.4.1 Supports embedded data for C1
1.8  ISP function
ISP setting can be controlled by using T4cam-ctrl software. • AE (Auto Exposure) •   AWB (Auto White Balance) •   Basic image-tuning interfaces – Hue - Saturation - Contrast - Brightness - Sharpness
1.9  Quality/Environmental specifications
1.9.1  Operating temperature range • -40° ~ 85° 1.9.2  Storage temperature range •   -40°C ~ 105°C
1.9.3  Product reliability
• Please contact our authorized agency for the details.
1.9.4 Compliances
• CE • RoHS • FCC • Can ICES-3 • UKCA • RCM
1.9.5 Safety
LVD compliant
1.9.6  Ingress protection
The camera has IP69K-grade ingress protection. Note: To To realize IP69K, the user needs to use a water-resistant Fakra cable. distinguish the water-resistant and non-water-resistant cable, please refer below. 2 C2 Camera Technical Reference Manual
2.1 Overview
The C2 camera is a GMSL (Gigabit Multimedia Serial Link) camera specifically designed for automo- tive applications. It has a resolution of 5.4 MP at 2880 x 1860 px. Featuring Sony Semiconductor Solutions’ IMX490 back-side illumination stacked CMOS image sen- sor SoC, this camera enables HDR imaging over 120dB, LED flicker mitigation (LFM), and motion artifact-free image capturing at a frame rate of up to 30fps. The C2 camera is suitable for a variety of applications, such as object recognition and signal recognition, thanks to its simultaneous high sensitivity and high resolution. With a variety of lens options available, the C2 camera can be adapted to many applications.  The lens undergoes a 6-axis active adjustment during installation, allowing it to achieve optimal sharp- ness even in harsh temperature environments. Indie-semiconductor’s GW5300 ISP (Image Signal Processor) built into the C2 camera performs various image processing tasks, including lens distortion correction, to achieve optimal image qual- ity for automotive applications.  The C2 camera also supports an external triggering mechanism, which is essential to achieve capture synchronization with other sensor modalities such as LiDAR or RADAR, enabling sensor fusion. Designed for automotive mass production, the C2 camera is ready-to-use.  All key components com- ply with AEC-Q100 (Grade 2), Q101, and Q200 standards, and are designed to pass automotive-grade reliability tests.
2.2  Mechanical specifications
2.2.1  Camera size

2.2.2 Connector
Fakra Z code with metal shielding
2.2.4  3-dimensional CAD data
3-dimensional CAD data can be downloaded. Refer to the download link
2.3  Lens specifications

2.3.1  Lens Mount
Glued, active alignment applied. Attention:   The lens cannot be exchanged.
2.4  Electrical specifications
2.4.1  Power supply method
Power over coax cable
2.4.2  Power consumption
4.6W (at 30fps operation, under room temperature) 2.4.3  Power supply level 9 - 12 [V]
2.5  Key components
2.5.1  Image Sensor Sony Semiconductor Solutions IMX490 2.5.2  Optical format diagonal 10.36mm, type 1/1.55’’ 2.5.3  Pixel size 3.0um 2.5.4  High dynamic range Available, 120dB equivalent 2.5.5  LED flicker mitigation Available. See also: What is the LED Flicker Mitigation (LFM)? 2.5.6 Serializer Analog Devices MAX9295A 2.5.7 ISP Indie semiconductor GW5300
2.6  Block diagram
Fig. 2.5    Block diagram of C2 camera
2.7  Camera function
2.7.1  Output interface GMSL2 2.7.2  Output image format YUV422 8bit. 16bit/pixel bit depth. 2.7.3  Output image size 2880 x 1860 2.7.4  Framerate Up to 30fps 2.7.5  Shutter type Rolling Shutter Note:   Shutter type cannot changed
2.7.6  Drive mode
• Master mode: The camera operates based on its framerate setting. • Trigger mode: See below for the details.
2.7.7  Synchronization
Please note that the trigger specification differs between the C1 and C2 cameras Attention: due to the different specifications of their image sensors.  When developing a synchronization system using both C1 and C2 cameras, please take this difference into account. Refer to the the specification of C1 camera for the details. C2 camera supports trigger-based synchronization.  The host (e.g., ECU) sends a synchronization signal (FSYNC) via the GMSL interface to the image sensor.  When the image sensor receives an FSYNC signal, the readout starts. More precisely, the camera will adjust its start timing of readout by measuring the time difference between the internal synchronization timing and FSYNC reception timing. This adjustment occurs 2 frames after the FSYNC reception. The exposure will start before the exposure time which is controlled by the camera or user. In trigger mode, in case no FSYNC is inputted to the camera, the camera will output the image data based on its original frame rate setting. The FSYNC pin of the image sensor is connected to the MFP3 GPIO of the serializer. The user needs to configure the deserializer so the synchronization output pin on the ECU is mapped to this pin. Fig. 2.7  Timing adjustment frame
2.7.8  Embedded data output
Not supported yet. To be supported in future driver/FW version.
2.8 ISP function
ISP setting can be controlled by using T4cam-ctrl software. • AE (Auto Exposure) •   AWB (Auto White Balance) •   Basic image tuning interfaces – Hue - Saturation – Contrast - Brightness - Sharpness
2.9  Quality/Environmental specifications
2.9.1  Operating temperature range ・ -40° ~ 85° 2.9.2  Storage temperature range •   -40°C ~ 105°C
2.9.3  Product reliability
• Please contact our authorized agency for the details.
2.9.4 Compliances
・ CE • RoHS • FCC • Can ICES-3 • UKCA • RCM
2.9.5 Safety
LVD compliant
2.9.6  Ingress protection
The camera has IP69K-grade ingress protection. Note: To To realize IP69K, the user needs to use a water-resistant Fakra cable. distinguish the water-resistant and non-water-resistant cable, please refer below.
3

3.1  Overview
The GMSL2-10GbE conversion module is an edge compute platform enabling low-latency data transfer from up to eight Gigabit Multimedia Serial Link™  (GMSL) interfaces to a host system via a 10Gb Ethernet link. The system includes two MAX96724 Quad Tunneling GMSL2/1 to CSI-2 Deserializers, enabling con- nectivity of up to eight GMSL cameras.  The video data from the cameras is fed via the MAX96724 MIPI-CSI2 interfaces to an AMD KV26 System-on-Module which implements the logic to aggregate the video data into a 10Gb Ethernet link to be sent to a central processing unit. The IEEE1588 Precision Time Protocol (PTP) with hardware timestamping is supported, en- abling accurate synchronization with host systems and other edge devices.  The AD9545 Dual DPLL/IEEE1588, 1pps Synchronizer and Jitter Cleaner is used to generate the required clocks for the 10Gb Ethernet interface and the PTP logic. 16 general purpose I/O pins are available with software configurable functionality, operating at 3.3V voltage level. A RS232 dedicated interface can be used to connect UART peripherals such as GNSS devices.
3.2  Mechanical specifications

3.3  Power and thermal
3.4  Input / Output interface
3.4.1  SFP+ Optical 10Gb Ethernet
• 10Gb Ethernet MAC & PHY in FPGA • IEEE 1588 with hardware timestamping • SFP+ cage P/N : 2007194-1 • SFP+ connector P/N : 1888247-1
3.4.2  UART (RS232)
3.3V voltage level with current limit and overvoltage protection. Functionalities: • Camera trigger / Flash signal x8 • PPS output x1 • PPS input x1 • PWM output x1 ・ I2C Connector P/N: 430452023
3.4.3 GPIO
16 port, 3.3V voltage level with current limit and overvoltage protection Functionalities. • Camera trigger / Flash signal x8 • PPS output x1 • PPS input x1 • PWM output x1 ・ I2C Connector P/N: 430452023
3.4.4  GMSL
•   2 x HFM quad type mini-Fakra connector • Conector P/N: 2304168-9
3.4.5  SD Card
•   Micro SD card holder, push to eject
3.4.6  USB2.0
• Console interface for Linux OS
3.4.7 JTAG
•   Kria SoC PL Debug interface
3.5  Processing
3.5.1  AMD Kria K26 SoM
Industrial grade SoM (P/N: SM-K26-XCL2GI). Cooling solution not included
3.6  Firmware & Software
3.6.1 Firmware
• Custom Linux image without desktop UI • Linux image update over Ethernet • Linux image stored in the Xilinx Kria SoM eMMC or on SD card
3.6.2  HTML User interface for system configuration and status
• Accessible over configurable IP address and port • Provides remote control for system configuration and status – RTP Control –  Camera Trigger Settings – Streaming Settings – PTP Settings –  Camera Settings
3.6.3  Remote system configuration and status via ssh
• ssh access into the system via the Ethernet interface • Provides access to all the system' s functions via the Linux standard drivers interfaces and tools
3.7 Synchronization
3.7.1  IEEE1588
• Hardware timestamping • Configurable as slave or master
3.8  Camera control & data format
3.8.1  Camera trigger control
• Each camera independently triggerable internally. – Using FSYNC + GPIO of deserializers for independent triggering of all four cameras on one deserializer • Internal triggering relative to system ToS – Each internal trigger configurable for frequency, phase, and duty cycle: 1Hz to 200Hz • External GPIO configured as output can be controlled in the same way as internal camera triggers • External GPIO configured as input can trigger the individual cameras directly • Trigger jitter at sub ms level • Trigger delay can also be configured (phase setting + delay to compensate for different cam- era triggering and exposure peculiarities)
3.8.2  Data timestamping
• Video packets packets timestamped with PTP-synchronized system time. Timestamp format options: – 32bit NTP –  96bit PTP • Images timestamps generated at trigger (FSYNC), end of frame or start of frame, using FPGA timestamping (PTP -synchronized system time) • Configurable timestamp offset
3.8.3  Video data format
• UDP data output • RTP compliant as per RFC3550 & RFC4175