Teruki Someya¹, Kenichi Matsunaga², Hiroki Morimura², Takayasu Sakurai¹, and Makoto Takamiya¹ ¹ University of Tokyo, Japan ² NTT Device Innovation Center, NTT Corporation, Japan Abstract— A programmable voltage detector (PVD) for the battery management is developed for the first time. In battery management applications, PVD's with fine voltage resolution (<±1% of battery voltage) are required to precisely control the charging and discharging of the battery and to provide a universal voltage detector. The proposed fine voltage-step subtraction (FVS) method in PVD enables the wide detection voltage (V dEtECT) range from 1.88V to 4.67V, fine V DETECT resolution of 50mV, and the 56- linear programmability. Compared level with previous publications, the 50-mV resolution is the smallest and the 56-level programmability is the largest. The programmability of V DETECT enables a V DETECT hopping capability achieving time-varying V DETECT to reduce the number of voltage detectors in the battery management system. PVD fabricated in 5V, 250-nm CMOS process shows the measured power consumption of 13nW at 3.5V and the temperature coefficient of 0.17mV/°C in -20°C to 80°C.
I NTRODUCTION
I.
In the applications of batteries (e.g. lithium-ion batteries), a voltage detector is one of the key building blocks in a battery management system. Fig. 1 shows the definition of the voltage detector in this paper. When the input voltage ( V IN ) is higher than a pre-determined detection voltage ( V DETECT ), the output voltage (Vout) is low. In contrast, when V IN is lower than V DETECT, Vout is high. In the recent battery management system for the lithium- ion batteries, both precise control of V DETECT (e.g. ±1% (= ±42mV) of the battery voltage (4.2V)) and various V DETECT S (e.g. at least 2 V DETECT 's to start charging or discharging, and typically 6 V DETECT ' S [1]) are required. In the conventional voltage detectors [2,7-8], however, have 3 problems: (1) V DETECT is not programmable (= factory-trimmed) and users cannot change V DETECT , (2) V DETECT resolution (e.g. 100mV [2]) is larger than the target resolution of ±42mV, and (3) multiple voltage detectors are required for multiple V DETECT 's, which increases cost and area. Though a programmable voltage detector (PVD) with V DETECT ranging from 0.52V to 0.85V for a RF energy harvesting is reported [3], the PVD cannot be used for the lithium-ion batteries, because the V DETECT range does not fit the voltage range (e.g. 3.0V to 4.2V) of the lithium-ion batteries. Therefore, in this paper, a new PVD with a programmable 56-level V DETECT ranging from 1.88V to 4.67V in steps of 50mV is proposed for the battery management system. The 50-mV step (= ±25mV) programmability satisfies the target resolution of ±42mV for the lithium-ion batteries. Compared with previous publications, the 50-mV step is the smallest and the 56-level programmability is the largest. Thanks to the programmability, the proposed PVD can be a general-purpose component and users can freely change V DETECT. The programmability of (PVD) [3]. MVD is multiple voltage duplicator. V DETECT also enables a V DETECT hopping capability achieving time-varying V DETECT , thereby reducing the number of voltage detectors. In this paper, to achieve PVD with wide V DETECT range, fine V DETECT steps, and linear V DETECT programmability, a fine voltage-step subtraction (FVS) method is proposed. In PVD, a low power operation is also required in battery-operated mobile devices and IoT nodes, because PVD always operates to monitor the battery. In the conventional voltage detectors, however, the power consumption is dominated by the bandgap reference circuits (32nW [4] to 100nW [5]). Though a low power voltage reference (VR) circuit is reported [6], PVD with the VR circuit shows a non-linear V DETECT programmability, because the line sensitivity of the VR is large (= 2.3mV/V). To solve the problem, a  V D  regulated voltage reference (VRVR) circuit with low power (2nW) and low line sensitivity of 50μV/V is proposed.
II.  C ONVENTIONAL P OGRAMMABLE V LTAGE D TECTORS
It is shown that a conventional PVD [3] has 2 problems: (1) linear V DETECT programmability is not available, and (2) both fine V DETECT steps and low temperature coefficient (TC) of V DETECT are not achieved. Fig. 2 shows a circuit schematic of the conventional PVD [3], where a multiple voltage duplicator (MVD) is a multiple-input multiple-output voltage buffer. Fig. 3 shows an operation principle of the conventional PVD. The offset of V REF 1 is varied by m and the gradient of V IN 1 is varied by n. Points at the intersection of Vref i ' s with V iN1 ' s are V DETECT S. As shown in Fig. 3, V DETECT changes non-linearly and non-monotonously with control-bits. A straightforward method to obtain both linear V DETECT programmability and fine V DETECT steps is to change V REF1 at fixed V IN1 with increasing m . Fig. 4, however, shows a simulated m dependence of TC of V DETECT in the conventional PVD at fixed V in , V ref = 0.5V, and I 1 = 200pA. With increasing m , TC also increases and exceeds the design target of 0.2mV/°C (= 20mV across 100°C). When m is increased, the voltage drop per resistor is reduced and the drain- source voltage ( V DS ) of MOSFET’s in MVD is reduced. The reduced VDs degrades the capability of the multiple voltage duplication in MVD and increases TC. Therefore, another method is required to achieve both fine V DETECT steps and low TC of V DETECT.
III.  Proposed Programmable Voltage Detectors
A.  Fine Voltage-Step Subtraction (FVS) Method
Fig. 5 shows a circuit schematic of a proposed PVD with FVS method. The circuit implementation of resistors for voltage divider, MVD, MUX's, and a comparator is similar to [3]. Instead of increasing m in the voltage divider in Fig. 2, a (FVS) method. hierarchy of a coarse voltage divider for V ref 1 and a fine voltage divider for V IN2 is used in Fig. 5. Fig. 6 shows an operation principle of FVS. ΔVref is a coarse voltage step and ΔVref/n is a fine voltage step. In FVS, the fine V DETECT steps are achieved by comparing the coarsely varied V ref 1 and finely varied V in2 , where V IN2 is obtained by subtracting the fine voltage steps of AVREF/n from V IN . The linear V DETECT programmability is achieved, because the fine voltage step is generated from the coarse voltage step. An equation for V DETECT is derived below.
Substituting (2) and (5) into (6),
Substituting (3) into (8)
As shown in (9), by adding coarse voltage steps of V REF /m and of Vref/mn,  both fine voltage steps linear V DETECT programmability and fine V DETECT steps are achieved. Thus, in the proposed PVD with FVS, wide V DETECT range, fine V DETECT steps, linear V DETECT programmability, and TC of V DETECT less than 0.2mV/°C are achieved, because m and n are 8 in our implementation. In FVS, low power voltage subtractors in Fig. 5 are one of the key building blocks. Fig. 7 shows a circuit schematic of the proposed voltage subtractor and its operation principle. M1 and M2 are in subthreshold operation, and I 3 = 0, because the input impedance of MUX is high. As shown in Fig. 7, Vout = Vini – V j , and the voltage subtraction is achieved. The proposed voltage subtractor is low power (1.4nA at 3.5V) because of the subthreshold operation. To reduce the power consumption of the multiple voltage subtractors in PVD, a power gating switch is added as s shown in Fig. 7 and non-selected voltage subtractors are turned off. B. VRVR with low power (2nW) and low line sensitivity of 50μV/V is proposed. Figs. 8 (a) and (b) show circuit schematics of a conventional 2-transistor VR circuit based on [6] and the proposed VRVR, respectively. In Fig. 8 (a), VREF is determined by the threshold voltage difference between M1 and M2. In Fig. 8 (b), power supply voltage ( V DD ) regulator is added to Fig. 8 (a) to improve the line sensitivity (= ΔVref / ΔVdd). The power overhead due to the regulator over Fig. 8 (a) is 10%. When all transistors are in subthreshold operation, V 1 = V 2 ~ 2 V REF , which shows V 2 is regulated. Specifically, when AV 1 / AVDD is 1/a, AVREF / AV2 is also 1/a, and AVREF / AVDD is 1/a2. Fig. 9 shows a simulated V DETECT dependence on digital code of PVD in the conventional VR and the proposed VRVR. In the conventional VR, a non-linear V DETECT programmability is observed, while linear V DETECT programmability is achieved in VRVR. To clarify the reason for the non-linearity, Fig. 10 shows a simulated Vpp dependence of V REF in the conventional VR and the proposed VRVR. In the conventional VR, the line sensitivity is large (=2.3mV/V), which results in the non-linearity of V DETECT in PVD. In contrast, the line sensitivity of VRVR is 50μV/V, which is 1/46 of that of the conventional VR, thereby achieving the linear V DETECT programmability.
M EASURED R SULTS
IV.
Fig. 11 shows a die photo and a layout of the proposed PVD fabricated in 5V, 250-nm CMOS process. The core area is 230μm by 180μm. The measured power consumption is 13nW at 3.5V. Fig. 12 shows a measured V D T E T  dependence on digital code of PVD. PVD with linear 56-level V DETECT ranging from 1.88V to 4.67V in steps of 50mV is achieved. Fig. 13 shows a measured temperature dependence of V DETECT. TC is 0.17mV/°C in -20°C to 80°C, achieving the design target of 0.2mV/°C. The programmability of V DETECT enables a V DETECT hopping capability achieving time-varying V DETECT , thereby reducing the number of voltage detectors. Fig. 14 shows measured waveforms of V DETECT hopping, where V DETECT is VARIED between V DETECT(MAX) and V DETECT(MIN) , and V IN is fixed to 3.3V. The proposed V DETECT hopping is successfully demonstrated. The hopping delay is 3.2ms and 0.16ms for rise and fall edge of Vout, respectively, which is sufficiently fast for the battery management. In Table I, this work is compared with the previously published voltage detectors. This work is first PVD covering the V DETECT range for the lithium-ion batteries. The 56-level programmability is the largest and the 50-mV step is the smallest.
V.
CONCLUSIONS
Thanks to the proposed FVS and VRVR, PVD with linear 56-level V DETECT ranging from 1.88V to 4.67V, covering the range for the lithium-ion batteries, in steps of 50mV (=±25mV) (<±1% of battery voltage) is achieved for the first time. Thanks to the programmability, the proposed PVD can be a general- purpose component and users can freely change V DETECT . The 56-level programmability is the largest and the 50-mV step is the smallest. PVD fabricated in 5V, 250-nm CMOS process shows the measured power consumption of 13nW at 3.5V and TC of 0.17mV/°C in -20°C to 80°C.
R EFERENCES
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