Introduction

Higas-4 ICs operate at extremely low power levels yet still provides sufficient backscatter signal to read tags at extended range. It can also be programmed at low RF power and at high speed using Alien's QuickWrite™ single instruction bank-write capability. Alien’s BlastWrite™ capability can also be used to program multiple tags simultaneously for mass-encoding in high-volume retail applications. Higgs-4 ICs also fully support the latest industry standard serialization schemes. Higgs-4 ICs offer a mass-market optimized but flexible memory architecture that provides for the optimum allocation of EPC and User memory for different use cases such as legacy part numbering systems and service history. User memory can also be read and or write locked on 32-bit boundaries, supporting a variety of public/private usage models. Higgs-4 ICs contains a number of unique advanced features. Alien's Dynamic Authentication™™ feature provides a unique non-reproducible fingerprint that can be used for anti-cloning and anti-counterfeiting. The IC also features factory programmed 64-bit serial number that cannot be altered. In conjunction with the EPC code, this provides a unique identification for the tagged item. This document specifies the operational and parametric requirements for Alien Technology®'s Higgs 4 IC, an EPCglobal Class-1 Generation-2 (V 1.2.0) and ISO/IEC 18000-6C compliant IC. Higgs 4 IC is a self-contained SoC device that when assembled with an antenna completes a passive RFID tag.  The EPCClass-1 Generation-2 specification is referred herein as the “EPCglobal”, and defines and specifies operation of Interrogator-Tag systems. Applications for Higgs 4 IC include: supply chain management (SCM) . . distribution logistics Doc# 8102140-000 V1.3.5 Higgs™ 4 IC Datasheet . . . . . . . . asset inventory and tracking airline baggage handling and identification express parcel ID, tracking and delivery item level tagging remote article identification factory automation brand protection object theft detection
2
Identification
This application note applies to Higgs 4 IC's manufactured by Alien Technology which has the manufacturing code specified below in the TID.  These values may be read using the protocol Read command at the word offsets indicated.  The features described in this application note may vary in other IC’s.

3
Higgs 4 IC Overview and Architecture
3.1  Overview 3.1.1 Device Power The Higgs 4 IC is connected via two terminals to a suitable antenna, together comprising a Tag.  Higgs 4 IC operating power is derived from RF energy transmitted by an Interrogator and coupled through the Tag Antenna into the Device.
3.1.2
Interrogator-to-IC Communication
Interrogators modulate their RF transmission in order to communicate commands and information to the IC.  The Interrogator sends binary information to the IC by modulating the phase and/or amplitude of its RF transmission using pulse interval encoding.  Modulated Interrogator transmissions appear as amplitude modulated RF envelope at the IC terminals, independent of the modulation type allowed by EPCglobal (DSB-ASK, SSB-ASK, or PR-ASK).  After issuing a command, the Interrogator transmits unmodulated RF energy to maintain IC operating power while it awaits a reply from the IC.
3.1.3
IC-to-Interrogator Communication
The IC follows an “Interrogator talks first” (ITF) protocol, and will not execute a command unless it is valid and appropriate for the IC.  The IC will not respond until the Interrogator has completed its command transmission.  The IC replies to Interrogator commands by modulating its input impedance, causing modulation of  the RF amplitude and phase reflected by the Tag antenna. Interrogators detect the variation in reflected RF, demodulate and decode the Tag reply.  An Interrogator may transmit a series of commands in order to access data stored in the IC, to set operating states, or to write information into the tags NVM memory.
3.1.4
Memory
The IC contains a total of 544 bits of memory, of which 320 bits are customer programmable and 448 bits are NVRAM/RAM. These 320 bits include 128 bits of NVM for Electronic Product Code (EPC) data, 128 bits of NVM for User data and 64 bits of NVM for Reserve data (Passwords).  Alien-specific data is also stored in the NVM which is not customer programmable.  Individual NVM bits may be programmed to the logical “0” or “1” states through programming commands.  NVM memory may be locked to prevent tampering or inadvertent data corruption.  The IC may be killed to prevent subsequent use.  A completed kill sequence results in a permanently deactivated tag. 44
Specifications

Table 4.2 – Environmental and physical specifications

4.2 Key Electrical Specifications
Unless otherwise noted, parameters are specified over the temperature range of -30 °C to +70 °C; command input data rate corresponding to a TARI=6.25μs-25μs; data “1” width = 1.5Tari; reply LF = 250 kHz in Miller 4 backscatter modulation mode.

Reference antenna design
5
Figure 2 is an example of a broadband tag such as an Alien Squiggle™™. The lumped elements shown in the figure are a representative model of a possible antenna design. ¹ The radiation resistance of the antenna. ² (a) The flip chip assembly adds 0.05 to 0.15 pF to the capacitance of the IC (e.g. 0.85pF + 0.1pF shown) (b) The strap assembly adds 0.04 pF (in parallel) to the capacitance of the IC (not included above) Figure 1 – Reference equivalent circuit of a broadband antenna such as the Alien Squiggle™". 6
Strap Simulation
The following information allows modelling of the Higgs4 strap. For the purpose of simulation, the following application characteristics should be used: 7
Memory
7.1 Memory Map
The following shows a high-level view of the Higgs-4 memory map.
The following table is the memory map as seen by commands which use bank and offset pointers (logical addressing):
Higgs™ 4 IC Datasheet
Higgs™ 4 IC Datasheet
Higgs™ 4 IC Datasheet
1: The TID bank is only writable using proprietary commands, and is always locked and permalocked
8
Supported Commands
Note that the form of the required and optional commands is specified in the EPCGlobal Gen 2 v 1.2 protocol documentation. All mandatory EPCglobal commands are supported including the following optional and custom commands. For further details on usage of custom commands please reference the “Custom Command Usage Addendum" (available under special legal agreement from Alien Technology). Optional commands as specified in EPCglobal that are supported are BlockWrite: This enables QuickWrite™ feature as detailed earlier. This can write an entire memory bank in 1. one command. Word pointer can be at any word in the bank  and the word count can be to the end of the bank BlockPermaLock: Block lengths are 32 bits and a total of 4 blocks 2. Custom commands BlockReadLock: Allows the blocks of the user memory to be read locked 1. 2. Status: Allows direct reading of chip lock status 3. Ping: Enables the BlastWrite™ feature 9
Physical Attributes
9.1 Physical Dimensions and Bump Map (Flip Chip) This shows the location of the flip-chip bumps and which are to be connected and how. Figure 5 - Top Die View (dimensions in μm) Figure 6 - Cross Section (A) of GND/RF Gold Bump and Wafer (dimensions in μm) Figure 7 - Wafer / Die orientation For 200 mm wafer: 10.886"  x 10.886" x .045" thick steel   (276 mm x 250 mm x 1.22 mm) Equivalent to: Disco model DTF2-8-1 p/n MDTFR200-01, Topline FF-108, Precision Products FF-108 Epak mOP0311
9.2 Physical Dimensions (Strap)
Figure 8- High Level Strap Dimensions (with alignment marks shown as supplied on strap) Note: (1)  This shows the alignment marks used by Alien for chip mounting. These are part of the strap as provided. (2) This diagram does not show the IC mounted in the strap. Figure 10 - Higgs4 Strap Tape Dimensions (JEDEC MO-283 Variant AA)
Table 9.1- Strap Reel Parameters

Table 9.3- Ordering Information

Copyright © 2014 Alien Technology Corporation. All rights reserved. Alien, Alien Technology, the Alien Technology logo, FSA, Higgs, Dynamic Authentication, Quick-Write, Squiggle, and the Squiggle logo are trademarks or registered trademarks the U.S. and other countries. HANDLING PRECAUTIONS Observe standard handling practices to minimize ESD. DISCLAIMER Application recommendations are guidelines only - actual results may vary and should be confirmed. This is a general purpose product not designed or intended for This product is covered by one or more of the following U.S. pateras:  7967204, 7931063, 7968766, 7737825, 7716208, 7716160, 7688206, 7671720, 7699822, 7619531, 7615479, 759 7562083, 7561221, 7559486, 7559131, 7554451, 7551141, 7542301, 7542008, 7522055, 7500610, 7489248, 7453705, 7452748, 7425467, 7417306, 7411503, 7385284, 7377445, 7364084, 73 7324061, 7321159, 7301458, 7295114, 7288432, 7265675, 7262686, 7193504, 7173528, 7172910, 7172789,7141176, 7113250, 7101502, 7080444, 7070851, 7068234, 7046328, 6998644, 698 6970219, 6952157, 6942155, 6933848.  Other patents pending. June 2014