The post K supercomputer of the FLAGSHIP2020 Project under the Ministry of Education, Culture, Sports, Science, and Technology began in 2014 and RIKEN has been appointed as the main organization for development. Our development policies can be summarized as follows: ●  Developing the world’s most advanced supercomputer as the successor to the K computer with the aim for launching operations in 2020 ●  Co-designing the system with the world’s top-level applications in order to solve important social and scientific problems Developing new technologies and promoting international standardization of software and mini-applications through strategic international collaborations Installing the post K machine at AICS in Kobe to enable maximum use of the facilities, technologies, human resources, and applications established with the K
FLAGSHIP 2020 Project
FLAGSHIP 2020 Project
Ministry of Education, Culture, Sports, Science and Technology (MEXT) ercomputer Do t K Supercomp EN Advanced Institute for Computational Science Architecture Development Team ●Application Development Team Co-Design Team "Overview of the Post K Supercompute Project Development Activities
Application Development
Research institutes and universities which in charge of development applications for following social and scientific priority issues n Priority issues (9 issues) ) Exploratory challenges (4 challenges) Social and Scientific Priority Issues to be Tackled by Using Post K Supercomputer Vendor Partner : Fujitsu Ltd.
Hardware / Architecture
node architecture (#core, #SIMD, etc...) ● cache (size and bandwidth) ● network (topologies, latency and bandwidth) memory technologies specialized hardware o #nodes ● storage and file systems system configurations
System Software
operating system for many core architecture communication and file I/O libraries programming model and languages Algorithms and Mathematics Lib dense and sparse solvers eigen solvers ● domain-specific libraries and frameworks Basic Design Design and Implementation Manufacturin Installation. Preparation ➤Research and Study ➤
2nd Phase : Co-design of the compiler, system software, programming environment, and libraries using results obtained from co-design in the 1st Phase. Improve the execution performance
for applications considering the architecture selected in the basic Implementation Continue tuning of the target applications with the aim to improve performance Group I : Applications that impact on the hardware design   Group II : Other applications RIKEN, Advanced Institute for Computational Science Social and Sglentific
Disaster Prevention Development of VIll. Innovative Design and Production Processes that Lead the Way for the Manufacturing Industry in the Near Future Conduct research and development for innovative design techniques, where the product concept is quantitatively assessed at the initial stage and optimization is performed. By implementing innovative manufacturing processes that reduce costs and by performing ultra-high speed
  integration simulations, both of which for the core of the research. added product development car be achieved. Enhancement of Industrial Competitiveness Creation of New Functional Devices VII, and High-Performance Materials to Support Next-Generation Industries Accelerate the development of electronics technologies, structural materials, functional chemical products etc. that have great international competitiveness, through coordination with large-scale  massively
parallel computing and the  analysis of "Big Data" and data from measurement and devices and materials to support next-generation Basic Scieńce Elucidation of the Fundamental Laws and Evolution of the Universe Realize precise calculations of the phenomena over wide range of scales from elementary particles to the universe. Combining with the data from large-scale experiments and obser- vations, they play crucial roles to address the remaining problems in the that extend across Development of New Fundamental Technologies for High- Efficiency Energy Creation, Conversion/Storage and Use Develop new fundamental technologies to resolve energy-related problem, and perform full-system simulations at the molecular level for complicated real-world complex systems to explain the entire process of high-efficiency energy creation,
    conversion/storage and use in coordination with experimentation
Exploratory Challenges (4 Challenges)
★ Frontiers of basic science: challenge to the limits ⭐️Construction of models for interaction among multiple socioeconomic )  Elucidation of the birth of exoplanets (Second Earths) and the environmental variations of planets in the solar system ⭐️Elucidation of how neural networks realize thinking and its application to artificial intelligence and Global Climate Problem III. Development of Antegrated Simulation Systems for Hazard and Disaster Induced by Earthquake and Tsunami Develop an integrated simulation system for hazard and disaster which are induced by earthquake and tsunami and are not estimated based on past experiences, by improving and strengthening a package of , be implemented in disaster management systems of the Cabinet Office and local governments, etc. IV. Advancement of Meteorological and Global Environmental Predictions Utilizing Observational “Big Data Build an infrastructure for a system that employs model calculations incorporating observational "Big Data" to accurately predic
localized torrential rain, tornados, typhoons etc. and that also monitors and projects
impacts of environmental changes due to human activity, in order to contribute to environmental policy, and health The system software development team designs and ddevelops system software for the post-K Supercomputer, focusing broadly on operating systems, high performance communication, I/O and storage
Operating System for Exa-scale and beyond
Development of a hybrid OS stack (called IHK/McKernel) that seamlessly blends Linux with a light-weight kernel (LWK) designed specifically for high performance computing Our kernel infrastructure aims at t he followings: Provide scalable and consistent performance for lange scale bulk synchronous HPC simulations Support the full POSIX/Linux APIs by selectively offloading system calls to Linux Provide efficient memory and device management so that resource contention and data movement are minimized inside the kernel Eliminate OS noise by isolating OS services
Hierarchical Storage
IHK/McKernel Hybrid Lightweight Kernel Architecture
Direct Data Transfer for Workflows
Development of an I/O middleware layer that provides access to and orchestrates data movement across multiple layers of the storage hierarchy Standard POSIX system call interface Transparent access to: Compute node memory buffers SSDs on a subset of compute nodes (i.e., burst buffer) Global parallel file system Asynchronous I/O processing Support direct data transfer among MPI jobs relying on netCDF APIs No (or minimal) changes to application code
International Collaboration
International Collaboration between DOE (USA) and MEXT (Japan) Purpose: Work together where it is mutually beneficial to expand the HPC ecosystem and improve system capability Technical Areas of Cooperation: - Kernel system programming interface - Low-level communication layer - Task and thread management to support massive concurrency Power management and optimization - Data staging and Input/Output (I/O) bottlenecks - File system and I/O management - Improving system and application resilience to chip failures and other faults - Mini-Applications for exascale component-based performance modelling
Low Level Communication Library
The library aims at the followings: Limit memory consumption to support scalable execution Exploit Linux core when using McKernel Exploit connection-less transport to reduce latency Application Development of a unified low- level communication infrastructure Sits below MPI and above HW drivers to support the following use-cases File I/O access In-situ visualization Cross-job communication Adopting OFI and called OFI/LLC Visualization library/driver InfiniBand The system software stack developed at RIKEN is open source and will be contributed to the OpenHPC community
Overview: Co-design the post K supercomputer Co-design is a bi-directional approach, where a system would be designed on demand from applications and applications must be optimized to the system. The architecture development team designs and develops the architecture of the post K supercomputer in cooperation with our partner vendor based on the co–design concept. We also have been developing various co-design tools and parallel programming language. Scamable Network Simlator The trace driven network simulator performs an important role in "co-design". However, sometimes, it is not appropriate for the simulation of large parallel systems since it is difficult to obtain the number of trace files for a target system if the current system is smaller than the target one. We propose SCAMP (SCAlable Mpi Profiler) to tackle the scaling-problem in the trace driven simulator. – creates a large number of pseudo trace files based on the small number of trace files and application analysis – drives the network simulator using the pseudo trace files to estimate the performance of the target system MPI Application Replay  Tool We have been developing libraries to be used to reply MPI applications on a single node and CPU simulator. While some parallel applications behave differently when they run on a single node, we are interested in their behavior when they run in parallel. To investigate the performance of parallel applications on a single node, a library is used to obtain MPI messages on parallel systems (existing supercomputers) and another library is used to replay applications on a single
CPU Simulator
Performance estimation and tuning of applications are difficult without real-systems. So, we focus on the gem5 simulator, which is a modular platform for computer-system architecture research. User can obtain more accurate results by setting parameters of assumed systems to the gem5. These results are expected to help in application developments.
XcalableMP
XcalableMP (XMP) is a directive-based language extension which allows users to develop parallel programs for distributed memory systems easily and to tune the performance by having minimal and simple notations. For the detail of XMP, please visit the web-site http://www.xcalablemp.org int array[YMAX][XMAX]; #pragma xmp nodes p(*) #pragma xmp template t(0:YMAX-1) #pragma xmp distribute t(block) onto p #pragma xmp align array[i][*] with t(i) main(){ #pragma xmp loop on t(i) reduction (+:res) for(i = 0; i < 10; i++){ for(j = 0; j < 10; j++){ array[i][j] = func(i, j); res += array[i][j];}} Compiler for Parallel Programming for Many-Core Architectures For larage scale systems based on many core processor, easy programming model and efficient runtime are required. We have been developing a compilier to exploit intra and inter-node parallelism by combining Omni–XMP compiler developed at RIKEN/AICS and Argobots developed at Argonne National Laboratory. In the compiler, Intra-node parallelism primary using OpenMP – Lightweight threads in OpenMP – Compiler support for intelligent scheduling of lightweight threads Inter-node parallelism primary using XMP PGAS language – Investigating MPI–3 capabilities and its benefits to PGAS RIKEN  Advanced Institute for Computational  Science We are in charge of ``co-design'' of the hardware, the system software, and the application software for the post-K supercomputer.
Why wé need co-design:
Modern processors are complicate system with • Many processor, many cores, long SIMD •Complicated memory & communication structure Hardware makers alone... Programmers alone... find it difficult to make the general-purpose processor that  execute any program optimally. find it difficult to learn details of hardware features to write fast programs. Therefore, we need to design and optimize
Software for co  design
We design and develop application frameworks and domain specific languages (DSLs) to help HPC users implement advanced algorithms.
FDPS
... is a library for massively parallel particle simulations. Users only need to program particle interactions and do not need to parallelize the code with MPI. FDPS generates a parallel code that scales up to the K computer using highly- optimized communicationalgorithms. Now, FDPS supports GPU clusters. FDPS is available at https://github.com/FDPS/FDPS !! (For more detail, see Iwasawa et al., 2016, preprint [arXiv:1601.03138])
Development of Post-K computer
●Initial Phase (2014-2015): Analyse application performance, locate bottleneck → Co-improvement of hardware and application software ●Late Phase (2015-): More improvement on applications
Formura
... Is a domain specific language that provides access to optimized stencil computations. Higher- order integration schemes can be defined using mathematical notations. Formura generates C code with MPI calls, and realizes portable performance via automated tuning. Formura have been applied to magnetohydrodynamics (MHD) and belowground biology simulations. For the latter, scaling up to the full nodes of the K computer, with 1.157 Pflops, 11.06% floating-point operation efficiency, is demonstrated. available at https://github.com/nushio3/formura Toward maximizing outcome with the post K-computer, the Application Development Team conducts research and development with related researchers in architecture, system software and algorithm fields. Its core missions are as follows;
V Co-design based on Target applications
Target Applications are representative applications chosen from nine social and scientific priority issues for the post K supercomputer. The application development team carries out performance analysis and optimization of the target applications to reflect the co-design of applications and the system. The team works in co- operation with the executing agencies of the target applications and other colleague teams of this project.

Development of Fiber Mini-Applications
We develop and maintain "mini-apps" that are designed to represent the same performance characteristics as full applications from major computational science domains. Our aim is to establish a mini-app benchmark suite that is widely and internationally used for system performance evaluation. Collaborative research with universities will be conducted, aiming for establishment of system performance evaluation methodologies. oo simplistic to represent erformance characteristics of Full Application - One nested loop - hundreds of lines - No communication - No file I/O Simplification by confining the calculation condition and reducing the functionality on Full Application The same structure as Full Application Developed by many researchers for a long term - Bulky source lines, 10K+ ~ 100K+
http://fiber-miniapp.github.io/ List of Fiber Mini Applications (as of May 2016 )
Research and Development of Application Infrastructures
We develops general numerical libraries and domain-specific frameworks for improving application programming infrastructure on the post K supercomputer. Furthermore, we also leads the promotional activities to continue the research work started by the Application Working Group of the "Feasibility Study on Future HPC Infrastructures" project, extracting social and scientific challenges to be solved by HPC during the next 5-10 years.