Automatic Retargeting of Binutils and GDB Based Plug-in Method Soichiro TAGA † , Takahiro KUMURA†† , Nagisa ISHIURA† , Yoshinori TAKEUCHI†††, and Masaharu IMAI††† † Kwansei Gakuin University  2-1 Gakuen, Sanda City, Hyogo, 669-1337, Japan †† NEC Corporation  Shimonumabe 1753, Nakahara-ku, Kawasaki City, 216-8666 Japan ††† Osaka University  Yamadaoka 1-5, Suita City, Osaka, 565-0871 Japan This paper proposes a method of automatic retargeting of software development tools based on a plug-in Abstract method. The plug-in method is originally designed to augment a base processor’s toolchain by adding plug-in’s, which are software components that handle extra instructions and registers.  Our method attempts to retarget a toolchain to an arbitrary processor based on the plug-in method, by embedding functions to deal with all its instruc- tions and registers into a framework, which is a toolchain for a processor with no instructions nor registers. GNU Binutils and GDB are autogenerated from a simple XML specification of the target instruction set architecture. An experimental tool based on this method successfully generated, from 1475 lines of architecture description of a 16bit processor MeDIX-I, Binutils and GDB which are capable of assembling, disasembling, linking, simulating, and debugging. Key words   software development tool,retargeting, Binutils, GDB, plug-in method , ASIP 1. (ASIP; application specific instruc- tion set processor) Binutils GDB tt tttt ††††すt 1753 1-5 ( ) XML GDB , 16 , GNU Binutils MeDIX-I , 1475 GNU Binutils GDB , Binutils, GDB, [3]. [4], [14]. ASIP — 1 — ( ) , GNU CoSy [16] Coware LISATek [17]      , . ACE , GNU [9], [12]. . [9], [12] [10], [11], [13].  GNU , . .          , GNU GNU GNU Binutils GNU GDB . . RedHat CGEN, rbinutils, ArchC CGEN [10] , GNU Binutils GDB . CGEN   GNU Binutils , , opcode , [1], [2] . rbinutils [11] . rbinutils Binutils , GNU Binutils .  ArchC . [13] , ArchC CPU GNU Binutils .                , , , 2. MeDIX-I [5], [6] GNU Binutils GDB ," 3. [1], [2] 1 ) ( ( ) , .  Tensilica Xtensa [14], [15] , , Xtensa GNU Binutils, GDB, , Xtensa
, [15]. [1], [2] GNU Binutils, GDB, GCC , ASIP 1: GNU Binutils
,16 ( ) ( ) . . . 2: XML .  XML 33 44 < insn > (10  31    )  MYADDして. , 4 MYADD , C ), REG_write32 (8 ) . REG read32 (3, 4 < insn > .して6, 7 <register_bank> MYGPR false . base 3 2 5, 8 ; 4. 4.1 1:  <Processor> 2:  <nickname>cpu</nickname> <register_type length="32">GPR_type</register_type> 3: <register„bank type="GPR_type" size="32" 4: prefix="R" base="true">GPR</register_bank> 5: 6: <register.bank type="GPR_type" size="8" 7 : prefix="MR" base="false">MYGPR</register_bank> 8: < insn_length>32</insn_length> à: 10: < insn > 11: <mnemonic>MYADD</mnemonic>> 12: <syntax>MYADD %reg1, %reg2, %reg3</syntax> <field type="GPR" length="5">reg1</field> 13: <field type="opcode" value="Ob11_1111" 14: length="4">opc0</field> 15: <field type="GPR" length="5">reg2</field> 16: 17: <field type="opcode" value="0b1111001000" 18: length="11">opc1</field> 19: <field type="GPR" length="5">reg3</field> 20： <input> 21: <operand type="GPR" width="32">reg1</operand> 22: <operand type="GPR" width="32">reg2</operand> 23:  </input> 24: <output> 25: 27 : 28: <operand type="GPR" width="32">reg3</operand> 26:  <<output>> <description> This instruction calculates the sum of the contents of 29: registers reg1 and reg2, and stores the sum to reg3. 30:  </description> 31:  </insn> 32: 33： <behavior>cpu-isa.c</behavior>> 34:  </Processor>
3:
1:  behavior (MYADD) 2:  { 3: :4: 5: int32_t val_reg1 = REG_read32 (GPR,reg1); int32_t val„reg2 = REG„read32 (GPR,reg2); int32„t val„reg3; 6 : 7: val_reg3 = val_reg1 + val_reg2; REG write32 (GPR,reg3,val reg3); 8: 9: } 4: 6 5 , GDB 11 GDB GDB , GDB , (2) , GDB 4.4 16 MeDIX-I [5], [6] XML 7 <nickname> (2 ) <endian>> 3, 4) ( little ) big (4 <bits_per_address>(5 ) <magic_number> (6 ) <insn>,<register_bank> (8 9 <register_type> ), ), <register_alias> (10  13 <register_bank> (14 18 ) <insn_length> (19 . ) <insn> <insn> iss halt insn true (22 ) ), iss break insn . (21 (run) 5. (GDB) [1], [2] OS Cygwin , Linux C++ XML 4.3 gnu gdb 1 2 
 
 1 2 6: 4.2 1 2 (21 34 ) 3 , 44 5 — 4 — 1: 2: <Processor> <nickname>medix1</nickname> 3: 4: <endian>big</endian> <bits_per_address>16</bits_per_address> 5: 6: <magic_number>0x1010</magic_number>> 7: 8: <register type length="16">GENERAL type 9: </register_type> 10: <register_bank type="GENERAL_type" size="16" 11: prefix="r">GPR</register„bank> 12: <register_bank type="GENERAL_type" size="1" 13: prefix="pc">PC</register„bank> 14: <register alias> LR=r3 15: 16: SP=r5 FP=rg 17: 18: 19: </register alias> <insn_length>16</insn_length> 20: 21: 22: 23: 24: 25: 26: 27 : 28: <insn iss halt„insn="false" iss_break_insn="false"> <mnemonic>ADD</mnemonic> <syntax>ADD %rd,%rs</syntax> <field type="opcode" length="4" value="0b1000">opcode0</field> <field type="opcode" length="4" value=""0b000">opcode1</field> <field type="GPR" length="4">rd</field> <field type="GPR" length="4">rs</field> <<description> GPR(rd) = GPR(rd) + GPR(rs); </description> </insn> 29: 30: 31: 32: 33: 34: 35: ...... 36: <behavior>medix1-isa.c</behavior> 37: </Processor> 7: , GNU Binutils-2.16.1, GDB-6.4 , RISC 32bit BrownieSTD32 [7] Binutils-2.16.1, GDB-6.4 , GNU LD [2] , ." VLD2009-120, pp. 127–132 (Mar. 2010). M. Imai, Y. Takeuchi, K. Sakanushi, and N. Ishiura: [3] "Advantage and Possibility of Application-domain Specific Instruction-set Processor (ASIP)," Trans. System LSI De- sign Methodology, Vol. 3, pp. 161–178 (Aug. 2010). Y. Takeuchi, K. Sakanushi, and M. Imai: "Generation of [4] Ubuntu8.04, 1GB 815 , MeDIX-I 660 .  XML 0.8 339.5 . C testgen GCC , [8] MeDIX-I MeDIX-I 2343 ) 1: MeDIX-I
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