＜Dual-In-Line Package Gate Amp Module＞

PRELIMINARY

DIP-GAM

VLA585-01R
DRIVER FOR IGBT MODULESFEATURES

VLA585-01R-Low height, DIP structure-Isolated gate signal by pulse transformer-Corresponding to gate signal ON Duty 100%
-Dual gate drive circuits-Built in isolated DC-DC converter for gate drive-Built in short circuit protection with soft gate shut down
-Adjustable fall time on activity of short circuit protection-Output peak gate current is +/-20A(max)-Isolation voltage is 4000Vrms (for 1 minute)-CMOS compatible input interface (Input low active type)-Low voltage lock out for gate power supply(VCC)

TARGETED IGBT MODULES
VCES = 600V series up to 600A class
VCES = 1200V series up to 1400A class
VCES = 1700V series up to 1400A class

APPLICATIONS

To drive IGBT modules for inverter or AC servo system application

BLOCK DIAGRAM
25 VCC1TIMER&RESET

5V

VIN+1

5Gsig1

4

VIN‐13LATCH

DETECT

27 Detect126Ctrip119 Clamp1

TRANS.
DRIVE
CIRCUIT

INTERFACE

24Vo122 E1GATE SHUT DOWN

21Fo120 Cs123 VEE1VCC1VD

UVL5415VVEE1DC－AC

VCC2Gi53TEST

1UVL

VEE2TIMER&RESET

LATCH

DETECT

VIN+2 505V

Gsig251TRANS.
DRIVECIRCUIT

INTERFACE

VIN-2 52
GATE SHUT DOWN
N.C

230

VCC228Detect229Ctrip236

Clamp231

Vo233

E234

Fo235

Cs232 VEE2

* 1pin:Test pin (Not to be connected electrically to other line

Sep.2016

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＜Dual-In-Line Package Gate Amp Module＞

PRELIMINARY

DIP-GAM

VLA585-01R
DRIVER FOR IGBT MODULESOUTLINE

Unit : mm
MAX 73.0503628151927(50.27)
0.27 +0.17/‐0.1(5.5)

MAX 19MAX 53.054(2.54)0.5±0.1

4.5±1.5

PIN ASSIGNMENT
Output side of channel2

Input side of channel2

5036
Blank pins

28

Clamp2
CS2
Fo2
E2
VEE2
Vo2
VCC2
Ctrip2Detect2

VD
Gi
VIN‐2
Gsig2
VIN+2

54

Primary side
（Input side）

1Blank pins

Clamp1
CS1
Fo1
E1
VEE1
Vo1
VCC1
Ctrip1
Detect1

TESTNC
VIN‐1
Gsig1
VIN+1

Secondary side
（Output side）

195

27

Output side of channel1

Input side of channel12

＜Dual-In-Line Package Gate Amp Module＞

PRELIMINARY

DIP-GAM

VLA585-01R
DRIVER FOR IGBT MODULES

MAXIMUM RATINGS(Unless otherwise noted, Ta=25 ℃)

SymbolItem

Conditions

Ratings

Unit

VD

Supply voltage

Between VD and Gi

16.5

VVIN

Supply voltage
for gate signal

Between VIN+ and VIN-

6V

V_GsigGate signal voltage

Between Gsig and VIN-

6V

Output peak current

Pulse width 3us-20

A20

A

Viso1

Isolation voltage between
primary and secondary

Sine wave voltage, 60Hz, 1minute

4000

Vrms

Viso2

Isolation voltage between
each output

Sine wave voltage, 60Hz, 1minute

4000

VrmsIOHP
IOLP

Tc

Case temperature

Surface temperature of the exterior resin

100℃

Topr

Operating temperature

No condensation allowable-25 ~ 85℃Tstg

Storage temperature

No condensation allowable-40 ~ 90℃

IFoFault output current

Applied Fo pin

20mA

VR_DetInput voltage at Detect pin

Applied Detect pin

80

V

Gate drive current

Gate average current (Total of 2 drive circuits)

200mAIdrive*Keep case temperature less than 100 ℃

ELECTRICAL CHARACTERISTICS (Unless otherwise noted, Ta=25℃,VD=15V,VIN=5V,RG=1.5Ω)Symbol

ItemConditions

VD

Supply voltage

VIN

Supply voltage
for gate signal
Gate signal voltage

V_Gsigf

Switching frequency

LimitsUnitMinTypMax

Recommended range

14.5

15

15.5

V

Recommended range

4.75

55.25

V

Recommended range

4.75

-

VIN

V-

-50

kHz
Ω

Recommended range

Keep total gate average current less than 200mA

RG

Gate resistance

Recommended range

0.5

-

-

VCC

VCC voltage

--

16.4

-

VVEE

VEE voltage

---9-

Vη

Gate supply efficiency

2 circuits total load current betweenVCC and VEE is 200mA

6270-%VOH“H” output voltage

Input ”L” (Low active)

13.5

15.2

16.5

VVOL

“L” output voltage

Input ”H” (Low active)

-6

-8

-11

VtPLH

“L-H” propagation time

RG=1.5Ω, f=10kHz, C_load:0.33uF-

0.36-ustr“L-H” rise time

RG=1.5Ω, f=10kHz, C_load:0.33uF

-0.52

0.65

us

tPHL

“H-L” propagation time

RG=1.5Ω, f=10kHz, C_load:0.33uF-0.3-ustf“H-L” fall time

RG=1.5Ω, f=10kHz, C_load:0.33uF-

0.120.25

usttimerTimer

Between start and cancel of protection(Under input signal is off state)

1-

2

ms

IFo

Fault output current

Applied Fo pin, Pull up resistance 4.7kΩ

-

5-

mA

ttrip1

Masked time detect
short circuit1

Detect pin:over than15V, Ctrip pin:open

-

3-

us

ttrip2Masked time detect
short circuit2 *1

Detect pin:over than15V,
Between Ctrip and E pin:capacitor 47pF

-

3.8-

usVSC

SC detect voltage

Collector voltage of IGBT

15--

V

UVLO+_VCC

Under voltage lock out(Operation start)

VCC voltage-12.6-V

UVLO-_VCC

Under voltage lock out(Operation stop)

VCC voltage-11.7-V*1 Length of wiring of capacitor masked time detect short-circuit is within 5cm from E and Ctrip pins coming and going3

＜Dual-In-Line Package Gate Amp Module＞

PRELIMINARY

DIP-GAM

VLA585-01R
DRIVER FOR IGBT MODULES

DEFFINITION OF CHARACTERISTICSOPERATION OF SHORT CIRCUIT PROTECTION

SWITCHING OPERATION
5V
V_Gsig(pin4,51)

V_Gsig

2.5V
tftr

VOH
12.5V

Vo0V-5V
ttrip1,20VVo(Pin24,31)

ttimer

-5V

VOL
tPHL

tPLH

10V

Fo(pin21,34)

0V*RG=1.5Ω, C_load:0.33uF, f=10kHz, ON Duty=50%

APPLICATION EXAMPLE
VD
(15V)

2153

24
254.7kΩ

D1

R2
RG1

RG3

RG2

RG455022352

C223C5(Ctrip)

D3C1

DZ1C7(CS)26

RC Filter~10usGate signal1

P

192754VIN (5V)

PC1

R120

VLA58510kΩ

D240.1uF

2851

Gate signal210kΩ

31
PC2

PC130

HC04,HC14 etc.

RG5

RG7

RG6

RG8

D4C333
C432
C6(Ctrip)1292353634

PRECAUTION

DZ2C8(CS)R4R3PC2N

D1,2 : FRD, trr:less than 200nsec
RP1H (SanKen) etc.
D3,4 : SBD, 60V, 1A class
M1FS6 (SHINDENGEN)etc.
PC1,2 : TLP785 (TOSHIBA) etc.
DZ1,2 : 30V, 0.5~1W class
C1,2,3,4:Ceramic 100uF,25V(ex. 10parallel of 10uF)
C5,6 : Ceramic, 50V
C7,8 : Ceramic, 50V
R1,2,3,4 : 4.7kΩ

(1) Voltage compensate capacitors are expected to be located as close as possible from the hybrid IC.
(2) D1,2 require approximately the same voltage of IGBT modules.
(3) If reverse recovery time of D1 (2) is long, pin27 (28) is applied high voltage. In that case,counterplan for protection which insert zener diode between pin 27 and 23 (pin 28 and 32)
is necessary like above diagram.
(4) In case pin 26 or 29 are operating, the Ctrip is expected to be wired as close as possible from pin. (Less than 5cm coming and going)
In case of not using, please keep pin 26 or 29 open.
(5) Minimize the area of closed circuit of gate circuit and input gate signal circuit so as not to be affected by induction noise.
(6) When the built in short-circuit protection circuit need not be used, please connect resistance of 4.7k(1/4W) between
pin 27 and 22 (pin 28 and 33). At that time, D1 (D2) and Dz1 (DZ2) are not require, and pin 21 and 34 are not necessary to be connected.
(7) Pin1 is Test pin. Please not to be connected electrically to other line.
(8) Please keep pin19 and 36 open ordinarily. These pins are exclusive to our specific product.
(9) Please keep total gate average current less than maximum rating.
(10) About the IC which drives gate signal on input side, it is not recommended to use the one whose output is open collector oropen drain type.

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＜Dual-In-Line Package Gate Amp Module＞

PRELIMINARY

DIP-GAM

VLA585-01R
DRIVER FOR IGBT MODULES

OPERATION OF PROTECTION CIRCUIT(1) In case the gate voltage is “H” and the collector voltage is high, this hybrid IC will recognize the circuit as shortcircuit and immediately reduce the gate voltage. Besides, put out error signal (”L”) which inform that protection
circuit is operating at the same time from pin 21 or 34.
(2) The protection circuit reset and resort to ordinary condition if input signal is “OFF” when the premised 1~2msec
passed. ( “OFF” period needs 10us or more )(3) When the output rises, the masked time detect short circuit (ttrip) is set up so that on-time of IGBT can besecured properly.
It is possible to adjust that time by connecting the capacitor (Ctrip) between pin26 and 22 (29 and 33).
(4) When the short circuit protection works, the soft gate shut down circuit works to suppress collector surge voltageof IGBT. Furthermore, when it is necessary to be more soft, by adding a capacitor between Cs and VEE terminals,
it is possible to make gate shut down speed more slow.

LATCH & TIMER RESET SYSTEM IN SHORTCIRCUIT PROTECTION CIRCUITOPERATION FLOW ON DETECTING SHORT CIRCUIT

Once the short-circuit protection circuit starts, it shuts down
the gate output and keeps alarm output, causing the latchstatus. This status is canceled if the input signal is OFF when
specific time elapses after the activation of the short-circuit
protection circuit. Then, gate output depending on input
signals becomes possible. If the input signal is ON when
specific time elapses, the latch status is not canceled: it iscanceled when the signal becomes OFF.
As mentioned above, on the latch & timer reset system, thelatch status is resulted after activation of the protection circuitand shutdown of the gate output. Therefore, during thisperiod, gate output is not made no matter how much input
signals are received. For this reason, it is possible to safely
stop the entire equipment by sending error signals to themicrocomputer during this period to stop all gate signals.

STARTDETECTION OF
SHORT CIRCUITGATE SHUTDOWNTIMER STARTOUTPUT FAULT SIGNAL

TIMER
1 ~ 2ms

END OF TIMERINPUT SIGNAL IS
OFF

CLEAR ALARM
ENABLE OUTPUT

TIMING CHART

V_GsigVo

VCE(IGBT)

IC(IGBT)

VSC
Short-circuit
occurrence

Masked time (ttrip)
Timer

Fo

The latch status is canceled.

5＜Dual-In-Line Package Gate Amp Module＞

PRELIMINARY

DIP-GAM

VLA585-01R
DRIVER FOR IGBT MODULESFOR SAFETY USINGGreat detail and careful attention are given to the production activity of Hics, such as the development, the quality ofproduction, and in itʼs reliability. However the reliability of Hics depends not only on their own factors but also intheir condition of usage. When handling Hics, please note the following cautions.

CAUTIONS
Packing

Carrying

The materials used in packing Hics can only withstand normal external conditions.
When exposed to outside shocks, rain and certain environmental contaminators, thepacking materials will deteriorates. Please take care in handling.
1)
2)
3)
4)
5)

Donʼt stack boxes too high. Avoid placing heavy materials on boxes.
Boxes must be positioned correctly during transportation to avoid breakage.
Don't throw or drop boxes.
Keep boxes dry. Avoid rain or snow.
Minimal vibration and shock during transportation is desirable.

Storage

When storing Hics, please observe the following notices or possible deterioration of
their electrical characteristics, risk of solder ability, and external damage may occur.
1)
Devices must be stored where fluctuation of temperature and humidity isminimal, and must not be exposed to direct sunlight. Store at the normal
temperature of 5 to 30 degrees Celsius with humidity at 40 to 60%.
2)
Avoid locations where corrosive gasses are generated or where much dust
accumulates.
3)
Storage cases must be static proof.
4)
Avoid putting weight on boxes.

Extendedstorage

When extended storage is necessary, Hics must be kept non-processed. When using
Hics which have been stored for more than one year or under severe conditions, besure to check that the exterior is free from flaw and other damages.

Maximumratings

To prevent any electrical damages, use Hics within the maximum ratings. Thetemperature, current, voltage, etc. must not exceed these conditions.

Polarity

To protect Hics from destruction and deterioration due to wrong insertion, make sureof polarity in inserting leads into the board holes, conforming to the external view forthe terminal arrangement.

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＜Dual-In-Line Package Gate Amp Module＞

DIP-GAMPRELIMINARY

VLA585-01R
DRIVER FOR IGBT MODULES

Keep safety first in your circuit designs!
·ISAHAYA Electronics Corporation puts the maximum effort into making semiconductor products betterand more reliable, but there is always the possibility that trouble may occur with them. Trouble withsemiconductors may lead to personal injury, fire or property damage. Remember to give due
consideration to safety when making your circuit designs, with appropriate measures such as (1)placement of substitutive, auxiliary circuits, (2) use of non-flammable material or (3) prevention
against any malfunction or mishap.
Notes regarding these materials·These materials are intended as a reference to our customers in the selection of the ISAHAYA products
best suited to the customerʼs application; they don't convey any license under any intellectual property
rights, or any other rights, belonging to ISAHAYA or a third party.
·ISAHAYA Electronics Corporation assumes no responsibility for any damage, or infringement of any
third party's rights, originating in the use of any product data, diagrams, charts or circuit application
examples contained in these materials.
·All information contained in these materials, including product data, diagrams and charts, represent
information on products at the time of publication of these materials, and are subject to change by
ISAHAYA Electronics Corporation without notice due to product improvements or other reasons.
It is therefore recommended that customers contact ISAHAYA Electronics Corporation or an authorized
ISAHAYA products distributor for the latest product information before purchasing product listed herein.
·ISAHAYA Electronics Corporation products are not designed or manufactured for use in a device orsystem that is used under circumstances in which human life is potentially at stake. Please contact
ISAHAYA Electronics Corporation or an authorized ISAHAYA products distributor when considering theuse of a product contained herein for any specific purposes, such as apparatus or systems fortransportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
·The prior written approval of ISAHAYA Electronics Corporation is necessary to reprint or reproduce inwhole or in part these materials.
·If these products or technologies are subject to the Japanese export control restrictions, they must beexported under a license from the Japanese government and cannot be imported into a country otherthan the approved destination.
Any diversion or re-export contrary to the export control laws and regulations of Japan and/or thecountry of destination is prohibited.
·Please contact ISAHAYA Electronics Corporation or authorized ISAHAYA products distributor for further
details on these materials or the products contained therein.

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