Loss Analysis and Design Method forHigh Efficiency Matrix Converter
Kazuhiro Koiwa, Goh Teck Chiang, and Jun-ichi Itoh
Department of Electrical engineering
Nagaoka University of Technology, NUT
Niigata, Japan
newkoiwa@stn.nagaokaut.ac.jp
Abstract— This paper discusses loss analysis formulas toachieve high efficiency and high power density for matrix
converter. In this paper, the conduction loss and theswitching loss of the matrix converter are derived
theoretically based on virtual AC-DC-AC control method.
Then, the validity of the equations is confirmed insimulation and experiment. From the experimental results,
the maximum efficiency is 97.9% with 2-phase modulation
at rated power (Devices: MOSFET R6046FNZ). In addition,
it is confirmed that the total loss error between thecalculation and experimental result is 8.65%. Finally, therelationship between the efficiency and power density is
discussed by a pareto front curve. The power density is
calculated from the volume of the switching device, heatsink, input inductor and filter capacitor. As the result, theefficiency and maximum power density in the matrix
converter are 97.0% and 9.7 kW/dm3 when the switchingfrequency is set to 85 kHz.
Keywords— loss analysis, pareto-front curve, matrix
converter, maximum power density design

I.

INTRODUCTION

Recently, the high efficiency and high power densityof the power converter have been discussed. In order toachieve the maximum power density of the power
converter, the prototype is repeatedly manufactured after
the design and decision of the specification of the power
converter. However, the number of manufacturing theprototype causes high development cost and longdevelopment period. In order to solve this problem, thefront loading design which estimates the loss, volume andEmatrix converter before manufacturing the prototype, isintroduced to the power converter design [1][2].
According to the front loading design, the prototype canbe manufactured by only one time owing to theevaluation of the performance. As a result, thedeveloping cost and process can be reduced.
The matrix converter which can convert an AC power
supply voltage directly into an AC output voltage ofvariable amplitude and frequency without any large
energy storages, such as electrolytic capacitors, has been
actively studied recently [3]-[11]. The following
advantages are found as compared with the back-to-back(BTB) converter, which consist of a PWM rectifier and a
PWM inverter; (i) reduced size, light-weight and long
life-time owing to the absence of the large electrolytic
capacitor in the main circuit; (ii) high efficiency becauseof less switching devices in the turn-on current path; (iii)
The matrix converter can avoid rising of temperature of
the switching devices in the low output frequency
operation. The matrix converter is expected to be appliedin the future to renewable energy field such as hybrid
electric vehicle systems, the wind power generator
systems and others.
Further, high efficiency and high power density of thematrix converter have been discussed [7]-[9] based on
front loading design. In general, it is necessary to
optimize the switching device and the switchingfrequency by analyzing the loss. There are two methods
for loss analysis as follows: (i) the loss is calculated fromthe device current and the drain-source voltage by using acircuit simulator [10]. (ii) the loss is theoreticallyobtained from the derived formulas by using the device
parameters [11]. However, in the method (i), it is difficult
to optimize the converter loss when the loss is analyzed
in a lot of conditions. This is because a lot of simulation
time is needed in order to find the minimum loss
condition by trial-and-error. On the other hand, in themethod (ii), it is easy to optimize the circuit because
analysis time and the trial time can be reduced. For thisreason, loss analysis using formulas for the multi-level
converter has been discussed [12].
Similarly, the loss analysis method for the AC-AC
direct converter has been discussed [13][14]. In themethod of Ref. [14], the conduction loss and switchingloss of the indirect matrix converter have been derived.
However, the loss analysis method for the matrix
converter has not been mentioned in experiment.
In this paper, in order to design high efficiency power
converter easily, the conduction loss and the switchingloss of the matrix converter are derived by formulas. In
addition, the matrix converter is optimized by defining
the loss in terms of high efficiency and high power
density. Concretely, in order to obtain the power density,
the volume of the input filter and the heat-sink arecalculated. Further, a pareto-front curve is mentioned inorder to find the optimization point between theefficiency and power density. The remainder of this paper
is organized as follows. First, the conduction loss and theswitching loss are introduced theoretically. Then, theoperation of the matrix converter will be demonstrated by
the experiment with a 2-kW RL-load. In addition, thevalidity of the conduction and switching loss equations isconfirmed. Finally, the maximum power density design
method of the matrix converter is explained.
II.

CIRCUIT CONFIGURATION AND CONTROLSTRATEGY

Fig. 1-(a) shows the circuit configuration of the matrix
converter. Note that the bi-directional switches in thematrix converter can be used with two IGBTs or
MOSFETs. In addition, in order to suppress the input
filter resonance, the damping resistor is connected to the
input inductor in parallel. In comparison to a BTB system,
the matrix converter owing to the absence of the large
electrolytic capacitor in the main circuit has theadvantages as follows: (i) reduced size, light-weight andlong life-time; (ii) high efficiency because of lessswitching devices in the turn-on current path; (iii) The
matrix converter can avoid rising of temperature of theswitching devices in the low output frequency operation.
Thus, it is easy for the matrix converter to be higher
efficiency and higher power density.
Fig. 1-(b) shows the control diagram of the matrix
converter. In this paper, the virtual indirect control [5][6]is adopted to the matrix converter. Accordingly, theswitching pattern, in which the switching changes
directly from the maximum phase to the minimum phase
is not taken into the consideration. This reason is because
the switching pattern is that the middle phase is certainly
gone through. Note that the maximum, middle andminimum phase depend on the relationship among each
input phase voltage. In order to simplify the loss analysis,
the three phase modulation is adopted. Furthermore, thedead-time and the commutation are not taken into theconsideration. The input current command in the virtual
rectifier is also set to unity power factor.
In order to design high efficiency and high power
density of the matrix converter, it is necessary to
optimize the switching device and the switchingfrequency by analyzing the loss. There are two method toanalyze the loss. (i) the loss is calculated from the device
current and the drain-source voltage by using a circuit
simulator. (ii) the loss is theoretically obtained from thederived formulas by using the device parameters.
Fig. 2 shows the loss analysis method by simulator.
The device voltage vce and current ic are detected. Next,
the conduction loss and switching loss are calculated
from the measurement value and loss data table. In thismethod, it is easy to analyze the loss of the matrix
converter by using the loss model of the switching device.
However, it is difficult to optimize the converter loss
because the loss is analyzed in a lot of conditions. This isbecause a lot of simulation time is needed in order to findthe minimum loss condition by trial-and-error.
III.

DERIVATION OF MATRIX CONVERTER LOSSOn the other hand, in the method by defining the lossof the matrix converter, it is easy to optimize the circuit
because analysis time and the trial time can be reduced.
In this paper, the loss analysis is mentioned by formula to(a) Circuit configuration.

Fig. 1. Circuit configuration and control diagram of the matrix
converter. The virtual indirect control is adopted to the matrix
converter. Accordingly, the switching pattern, in which theswitching changes directly from the maximum phase to theminimum phase is not taken into the consideration.

Fig. 2. Loss analysis method by simulator. The conduction loss
and switching loss are calculated from the measurement value(vce, ic) and loss data table. In this method, it is easy to analyze
the loss of the converter. However, the simulation time is long.
In addition, the loss data table is obtained from the datasheet ofthe switching device or the switching test.

Fig. 3. Equivalent single phase model of the matrix converter.
The matrix converter losses are discussed as the maximum
phase, middle phase and minimum phase switches. As theresult, it is easy to introduce the conduction loss and theswitching loss of the matrix converter.

design the high efficiency and high power density.
Fig. 3 shows the equivalent single-phase model of thematrix converter for derivation of loss. When therelationship among the input phase voltages is R>S>T,the maximum phase switch Smax is the R-phase switch,
the middle phase switch is the S-phase switch and theminimum phase switch Smin is the T-phase switch. In
other words, the matrix converter loss is derived by eachSmax, Smid and Smin.

Input phase voltage
vmax

6

vmid

3

vmin

io

0

ot

o

Conduction loss
The conduction loss of the maximum phase switch inthe matrix converter Pcon_max is expressed by (1).
1   o
Pcon _ max  
D max  v on  i o d o t ......... (1) oNote that Dmax is on-duty of the maximum phaseswitch and o is the output angular frequency. In addition,von, which is the on-state voltage of the device, iscalculated by (2).
v on  k con1io  k con 2 .................................... (2)kcon1 and kcon2 are obtained from the on-state voltage
characteristic in the datasheet. The instantaneous value ofthe load current io is expressed by (3) from the maximum
load current Io and the load angle o.
io  I o sin( o t   o ) ................................. (3)Pcon_max can be calculated from (1). However, it isdifficult to derive the loss because Dmax depends on the
input current command and the output voltage command.
In this paper, the total conduction loss per the output
phase Pcon is derived. Consequently, the on-dutycommand per the output single-phase is expressed as
Dmax  Dmid  Dmin  1 .............................. (4)where Dmid and Dmin are the on-duties of Smid and Smin.
From (4), it can be revealed that only one switch is turnedon and two switches are not on-state at same time.
Assume that the switching devices with samecharacteristics are used. Thus, Pcon is expressed by (5).
1   o
Pcon  v on  i o d o t o..................... (5)122 k con1 I o  k con 2 I o2B.

Switching loss
In this section, the turn-on loss of the maximum phase
Pton_smax is derived. First, the general turn-on loss isexpressed asTf1
Psw _ loss   2 s eon v sw d o t ................... (6)0
T Vs
where T is the cycle of io, fs is the switching frequency, Vs
is the tested voltage when the switching loss wasmeasured, and vsw is the drain-source voltage of thedevice. In addition, the instantaneous turn-on loss eon isexpressed by (7).
eon  k ton1io  k ton 2 ..................................... (7)Similarly, kton1 and kton2 are obtained from the turn-onoo(vmax - vmid)×io

Pton_smax

A.

it

2

0

(vmid - vmin)×io

Pton_smin
Pton_smid

Fig. 4. Integral period of each switching loss of the matrix
converter. The integral period is different among eachswitching devices owing to the polar of the output current. The
turn-on loss of the maximum phase switch Pton_smax occurs
when the polar of the output current io is positive.
Additionally, Pton_smax is calculated from the output current andthe voltage between the maximum phase and medium phase(vmax - vmid).
TABLE 1. DEVICE PARAMETERS AND SIMULATION CONDITION TO
CALCULATE THE MATRIX CONVERTER LOSSES.
Parameters of switching device (SK80GM063)
kcon1 (V/A)
On-state voltage
characteristickcon2 (V)kton1 (mJ/A)
Switching loss
characteristic
kton2
(J)
Input power factor

0.018
0.977
0.05
0.0
1.0

Maximum input line voltage Vin

283 V

Switching frequency fs

10 kHzOutput frequency fo

90 Hz

Input frequency fi

50 Hz

loss characteristic in the datasheet.
Fig. 4 shows the integral period to calculate theswitching loss. The integral period is different among
each switching devices due to the polar of io. In otherwords, Pton_smax occurs when the polar of io is positive.
Furthermore, the drain-source voltage vsw is different
among each switching devices. Assume that theswitching pattern is that the middle phase is certainly
gone through. Accordingly, the drain-source voltage ofSmax is differential voltage (vmax - vmid) between the
maximum phase voltage vmax and the middle phasevoltage vmid. Thus, Pton_smax is expressed by (8).
Pton _ s max   o fs
6eon (ot )  (vmax (i t )  vmid (i t )) di t4 2Vs o 02     eon (ot )  (vmax (i t )  vmid (i t )) di t dot6................................................................... (8)Note that i is the input angular frequency. By
substituting (7) into (8), Pton_smax is calculated by (9).
3f VPton _ s max  s2 in (2k ton1 I o  k ton 2 ) ......... (9)2 V sSimilarly, the middle phase and minimum phase turn-Pton _ smid 

3 f sVin(2kton1 I o  kton 2 ) ............. (10) 2VsPton _ s min 

3 f sVin(2k ton1 I o  k ton 2 ) ........... (11)2 2VsBased on these formulas such as (5) and (9), it is easy
to design the matrix converter in terms of efficiency andreduced size. It is noted that the design method depends
on the priority of the high efficiency or high power
density. When the matrix converter is designed in termsof high power density, the switching frequency is
increased. As the result, the input LC filter becomes
smaller. However, the size of the heat-sink is large
because the switching loss increases. Further, theswitching loss is more dominant than conduction loss.
Thus, the switching device, which has small parameterskton1, kton2, is selected in reference to the datasheets.
Accordingly, high power density is obtained even if theswitching frequency is increased. This is because thevolume of heat-sink can be reduced owing to lower
switching loss. On the other hand, when the matrix
converter is designed in terms of high efficiency, theconduction loss is dominated owing to lower switchingfrequency. For this reason, the switching device, which
has small parameters kcon1, kcon2, is selected from thedatasheet. As the result, high efficiency can be obtained
because conduction loss is low. Besides, the switching
device in the matrix converter can be selected from theefficiency, which is required in an application. First, thecircuit specification such as the rated power, rated
voltage, rated current, and switching frequency isarbitrarily determined. Second, the on-state voltage
parameters kcon1, kcon2 and switching loss parameters kton1,
kton2, that the demanded efficiency is obtained, arecalculated by using (5) and (9). Next, based on thecalculated parameters, the switching device is selectedfrom the datasheet. Finally, the efficiency in experimentagrees with that of the design value when the matrix
converter is manufactured by using the selected device.
Validity of Matrix Converter Loss Equations
In order to validate the conduction and switching loss
equations, the calculation results are compared with theloss simulation results which are obtained by PLECS.
Table 1 lists the calculation parameters. In the loss
simulation, the stray inductance and the stray capacitanceare not taken into consideration.
Fig. 5 shows the conduction and switching losses ofthe matrix converter by the theoretical calculation and thesimulation. As a result, the calculation result of the
conduction loss agrees well with the simulation result.
The error between the calculation and simulation iswithin 0.02%. Thus, the validity of the derived equationsof the conduction loss is confirmed. On the other hand,the error of the switching loss between the calculationand simulation is 2.4% as the load current is 20 A. This iscaused by the switching ripple. It is confirmed that theerror becomes smaller by increasing the switching

Loss (W)on loss are expressed.

Fig. 5. Conduction loss and switching loss - load current
characteristics between calculation and simulation. The errorof the conduction loss between the calculation and simulation
is within 0.02%. The error of the switching loss between thecalculation and simulation is 2.4% as the load current is 20 A.
This is caused by the switching ripple. It is confirmed that theerror becomes smaller by increasing the switching frequency.

(a) Conduction loss and switching loss - output power factor
characteristics between calculation and simulation.

C.

(b) Conduction loss and switching loss - modulation ratio
characteristics between calculation and simulation.

Fig. 6. The matrix converter loss characteristics based on the
output power factor and the modulation index in order toconfirm the validity of the loss equation of the matrix
converter. The conduction loss and switching loss do notdepend on the output power factor and the modulation index.

frequency.
Fig. 6-(a) shows the matrix converter losses based on
the output power factor. In addition, Fig. 6-(b) shows thematrix converter losses based on the modulation ratio. As
the results, the conduction loss and switching loss do notdepend on the output power factor and the modulationindex. Thus, the converter loss is not changed when theTABLE 2. DEVICE PARAMETERS AND EXPERIMENTAL CONDITIONS.
THE NO-LOAD LOSS AND SNUBBER LOSS WERE MEASURED IN
EXPERIMENT.

Fig. 8. Steady operation at rated power by the experiment. As aresult, it is accomplished that unity power factor is obtained
and the input current THD is 7.4%.

Fig. 7. Board of a 2-kW matrix converter. This board consistsof the main circuit, the filter capacitor, the protection circuit
for the surge voltage and the drive circuit. In addition, the sizeof this board is 358 mm×155 mm×40 mm. R6046FNZ is usedas the switching device.

output power factor becomes low. In other words, theefficiency is degraded because the output power becomes
lower. In order to improve the efficiency, the output
power factor and the modulation index are increased.
IV.

EXPERIMENTAL RESULTS

High efficiency matrix converter is made by using thederived equations of the conduction loss and theswitching loss. It is noted that the MOSFET(R6046FNZ)
is used in experiment. Table 2 lists the parameters of the
MOSFET and the experimental conditions. The switchingloss of a MOSFET is twice as high as that of an IGBT.
This reason is because the switching loss of a MOSFET
does not depend on the pole of io.
Fig. 7 shows the matrix converter board by using the
MOSFET. This board consists of the main circuit, thefilter capacitor, the protection circuit for the surge voltage
and the drive circuit. In addition, the size of this board is
358 mm×155 mm×40 mm. IC-0526B (RYOSAN) is usedas the heat-sink.
Fig. 8 shows the operation waveforms by using 2-kW
RL-load. Note that the output line voltage was observed
through a low pass filter (LPF) that the cutoff frequency
is 1.5 kHz. In addition, two phase modulation was
adopted in the virtual inverter control. In addition, thefour-step voltage commutation is adopted as thecommutation method [15]. As a result, it is accomplishedthat unity power factor is obtained and the input current
THD (Total Harmonic Distortion) is 7.4%. Thus,
fundamental operation of the matrix converter can be
confirmed.

Fig. 9. Efficiency and input power factor characteristics. It is
confirmed that the maximum efficiency is 97.9%. In addition,unity power factor is obtained when the output power is over 1
kW.

Fig. 9 shows the efficiency and input power factor
characteristics. As the result, it is confirmed that the
maximum efficiency is 97.9% at 1.5-kW output power. In
addition, unity power factor is obtained when the output
power is over 1 kW. However, in the light-load, the input
power factor is degraded. This is because the input
Fig. 10 shows the loss characteristics for the output
power. It can be confirmed that the maximum error of thetotal loss is 8.65% at 600-W output power. Thus, thecalculation results almost agree to the simulation andexperimental results. In this paper, the recovery loss of
FWD is not taken into consideration. Thus, the error
between the calculation result and the experimental result
is caused by the recovery loss of the diode.
V.

DESIGN OF HIGH EFFICIENCY AND POWERDENSITY

Based on these equations, the maximum power density
design method for the matrix converter is introduced inthis section.
Fig. 11 shows the flow chart to design the matrix
converter for the maximum power density. First, thevolume of the input LC filter is introduced from the loss
analysis results. Note that Table 3 lists the device

Loss (W)Fig. 10. Total loss characteristics comparison among
calculation, simulation and experimental result. It can be
confirmed that the maximum error of the total loss is 8.65% at
600-W output power. The error between the calculation result
and the experimental result is caused by the recovery loss ofthe diode.

parameters to calculate the loss. Concretely, thecapacitance value Cf is calculated from the voltage ripple
Vrip on the filter capacitor. As the result, the volume of
the filter capacitor VolC can be calculated. On the other
hand, the inductance value of the input inductor L isdecided from Cf and the cut-off frequency fc. Moreover,the volume of the input inductor is calculated based on an
Area Product [16]. Second, the volume of the heat-sink
Volheat is calculated. It is noted that the thermal resistanceRth and the cooling system performance index (CSPI),
which is the cooling performance of the heat-sink, areneeded in order to calculate Volheat. After that, the Paretofront curve is mentioned from the volume of the systemand the efficiency. From the Pareto-front curve, fs at the
maximum power density is obtained. In other words, thespecification of the matrix converter is decided. Finally,
the inductor, the capacitor and the heat-sink are selected.
It is noted that Volheat is recalculated when the required
heat-sink is not found.
A.

Input LC filter
First, the volume of the input LC filter in the matrix
converter is calculated. Assume that the cutoff frequency
is one-tenth of the switching frequency and the filter
capacitor voltage ripple Vrip is 3% or less. The
capacitance of the filter capacitor Cf is expressed asIoCf sin D ................................ (12)sVrip
where s is the switching angular frequency and D is onduty of the converter. In the matrix converter, D cannot
be obtained because D varies in the time. In this paper, Cf
is designed in the worst case. Thus, D is set to 0.5.
Accordingly, the volume of the filter capacitor VolC is
obtained from electrostatic energy E as1
12
2
E   0 s k z VolC  C f Vin ................. (13)22where s and kz which are the dielectric constant of thematerial and the breakdown voltage coefficient depend

Fig. 11. Flow chart to design the matrix converter for the
maximum power density based on front loading design.
First, the volume of the input filter and the heat-sink iscalculated. Second, the pareto-front curve is mentioned
from the volume of the input LC filter and the heat-sink.
Next, the switching frequency is selected at maximum
power density point. Thus, the specification of the matrix
converter can be decided.
TABLE 3. DESIGN CONDITIONS TO DESIGN MAXIMUM POWERDENSITY FOR THE MATRIX CONVERTER.

on the material of the capacitor. In addition, 0 is thedielectric constant of the vacuum. On the other hand, thevolume of the inductor is calculated from area product[16] by (14).

3 2W  4
Vol L  K v  .............................. (14)
 K u Bm J 
Note that the core coefficient Kv depends on the typeof the core.
Next, the volumes of the boost-up inductor and the DC
link capacitor in the BTB system are calculated. The DC
link capacitance Cdc is designed when the DC link
voltage variation U is 3% or less [17].
Pn
Cdc 
1

.................... (15)2
 Edc U  U  f s2In addition, the inductance of the boost-up inductor is
calculated when the input current ripple is 5% or less.
Edc
Edc
LB 
sin D ................. (16)s I rips I rip

Similarly, the volumes of the boost-up inductor andthe DC link capacitor are obtained by using (13) and Ref.
[16].
Heat-sink
Finally, the volume of the heat-sink Volheat is
calculated from cooling system per index (CSPI) [18].
Note that the CSPI is set to 14.2 from the datasheet of theheat-sink. As a result, Volheat is expressed as
1
Vol heat ............................... (17)CSPI  Rth
where thermal resistance Rth is expressed from the loss,
maximum junction temperature and ambient temperature.
T j  TaRth ........................................... (18)Ploss
Fig. 12 shows the volume characteristic. As the result,the volume of the input inductor and filter capacitor is
reduced when the switching frequency increases because
the cut-off frequency becomes high. In other words, theinput inductance and filter capacitance are reduced. On
the other hand, the volume of the heat-sink is increased
owing to the switching loss.

B.

C.

Switching frequency
Fig. 13 shows the pareto-front curve of the matrix
converter and the BTB system. Table 3 lists thecalculation condition to decision the specification of thematrix converter at maximum power density point. It isnoted that the conduction loss (PconS, PconD) and switchingloss PtonS of a BTB system are calculated as


 1 

2 1
PconS  k con1 I o  
cos    k con 2 I o  cos  
8
3

2

8




................................................................. (19)


 1 

2 1
PconD  k con1 I o  
cos    k con 2 I o  cos  
 8 3

 2 8................................................................. (20)E f
PtonS  dc s 2k ton1 I o  k ton 2  ................ (21)2Vs

Fig. 12. Volume characteristics for switching frequency. The
volume of the input inductor and filter capacitor is reduced
when the switching frequency increases because the cut-off
frequency becomes high. On the other hand, the volume of theheat-sink is increased owing to the switching loss.
98

f = 10 kHz

97.5

BTB system using
electrolytic capacitor

f = 6 kHz

97
96.5

Experimental result f = 10 kHz
Pout = 2.08 kW

BTB system using
film capacitor

96

f = 100 kHz

MC

85 kHz

95.5
1

3

5
7
9
11
Power density (kW/dm3)
Fig. 13. Pareto front curves of the matrix converter and the
BTB system (Rated power = 2 kW). It can be confirmed thatthe maximum power density in the matrix converter and the
BTB system can be accomplished at 85 kHz and 100 kHz,
respectively. The efficiency and the maximum power density
in the matrix converter are 97.0% and 9.7 kW/dm3,
respectively.

where  is the modulation index, cos is the output
power factor, and Edc is the DC link voltage [17]. Notethat the efficiency characteristic for the power density
was obtained when the switching frequency was varied
from 6 kHz to 100 kHz. In addition, the output power is 2
kW. Moreover, the volume takes the input LC filter, theswitching device and the heat-sink into consideration.
Furthermore, the film capacitor is used as the filter
capacitor in the matrix converter and the DC link
capacitor in the BTB system.
As shown in Fig. 13, it can be confirmed that the
maximum power density in the matrix converter and the
BTB system can be accomplished at 85 kHz and 100 kHz,
respectively. The efficiency and the maximum power
density in the matrix converter are 97.0% and 9.7
kW/dm3, respectively. On the other hand, the efficiency
and the power density in the BTB system are 95.7% and7.4 kW/dm3, respectively. Thus, it is confirmed that theefficiency and the power density in the matrix converter
are higher than that of the BTB system, and the optimized
frequency depends on the converter type. In other words,
it is necessary to determine the switching frequency ofeach converters by using the pareto-front curve.
Furthermore, the experimental result is plotted in Fig. 13
as the switching frequency and the output power are 10

kHz and 2.08 kW. It is noted that the efficiency in theexperiment is almost agree to the calculation result.
However, the power density error between the calculationand the experiment is 10.0%. This is because the input
LC filter in the experiment is not optimized.
Based on these results, it is easy to optimize the highefficiency and high power density of the matrix converterby using the pareto-front curve which takes many trial
times.
VI.

CONCLUSIONSIn this paper, the derivation methods of the conduction
loss and the switching loss in the matrix converter were
proposed. Additionally, the maximum power density forthe matrix converter was discussed.
As the result, it was confirmed that the total loss error
between the calculation and experimental result is 8.65%
at maximum point. Moreover, it was confirmed that the
maximum efficiency is 97.9%. Thus, the validity of thecalculation formulas of the matrix converter loss could be
confirmed. Furthermore, the efficiency and the maximum
power density in the matrix converter are 97.0% and 9.7
kW/dm3, respectively. On the other hand, the efficiency
and the maximum power density in the BTB system are
95.7% and 7.4 kW/dm3. Thus, it is confirmed that theefficiency and the power density in the matrix converter
are higher than that of the BTB system, and the optimized
frequency depends on the converter type. Based on theseresults, it is easy to optimize the high efficiency and highpower density of the matrix converter by using thepareto-front curve which takes many trial times.
In future work, the total loss and power density will becompared between the matrix converter and the BTB
system in experiment.
ACKNOWLEDGMENT
A part of this study was supported by industrial
technology grant program in 2011 from new energy andindustrial technology development organization (NEDO)
of Japan.
REFERENCES[1] U. Badstuebner, J. Miniboeck, J. W. Kolar: "Experimental
verification of the efficiency/power-density (η-ρ) Pareto
Front of single-phase double-boost and TCM PFC rectifiersystems", APEC, pp. 1050-1057 (2013)[2] F. Zare, G. F. Ledwich: "Reduced Layer Planar Busbar for
Voltage Source Inverters", IEEE Transactions, Vol. 17, No.
4, pp. 508-516 (2002)[3] P. W. Wheeler, J. Rodriguez, J. C. Clare, L.
Empringham: ”Matrix Converters: A Technology Review”
IEEE Transactions, Vol. 49, No. 2, pp274-288, 2002.
[4] M. Mengoni, L. Zarri, A. Tani, G. Rini, G. Serra, D.
Casadei: "A Modulation Strategy for Matrix Converterwith Extended Control Range and Reduced Switching
Power Losses", IEEE Energy Conversion Congress andExposition, Vol. , No. , pp. 2721-2728 (2013)[5] J. Itoh, I. Sato, H. Ohguchi, K. Sato, A. Odaka, N. Eguchi:"A Control Method for the Matrix Converter Based on

Virtual AC/DC/AC Conversion Using Carrier Comparison
Method", IEEJ Trans. D, Vol. 124, No. 5, pp. 457-463(2004)[6] J. Itoh, H. Kodachi, A. Odaka, I. Sato, H. Ohguchi, H.
Umida: "A High Performance Control Method for the
Matrix Converter Based on PWM generation of Virtual
AC/DC/AC Conversion", JIASC IEEJ, Vol. , No. , pp. I303-I-308 (2004)[7] Thomas Friedli, Johann W. Kolar, Jose Rodriguez, Patrick
W. Wheeler: "Comparative Evaluation of Three-Phase
AC–AC Matrix Converter and Voltage DC-Link Back-toBack Converter Systems", IEEE Trans., Vol. 59, No. 12,
pp. 4487-4510 (2012)[8] Bo Wen, X. Zhang, Q. Wang, R. Burgos, P. Mattavelli, D.
Boroyevich: "Comparison of Three-Phase AC-AC Matrix
Converter and Voltage DC-Link Back-to-Back Converter
Topologies Based on EMI Filter", ECCE US, Vol. , No. ,pp. 2698-2706 (2013)[9] R. Moghe, R. P. Kandula, A. Iyer, D. Divan: "Losscomparison between SiC, hybrid Si/SiC, and Si devices in
direct AC/AC converters", ECCE, pp. 3848-3855 (2012)[10] J. Itoh, T. Iida, A. Odaka:" Realization of High Efficiency
AC link Converter System based on AC/AC Direct
Conversion Techniques with RB-IGBT" Industrial
Electronics Conference, Paris, PF-012149,2006[11] K. Koiwa, J. Itoh: "Efficiency Evaluation of a Matrix
Converter with a Boost-Up AC Chopper in an Adjustable
Drive System", IEEJ Journal of Industry Applications, Vol.
3, No. 1, pp. 26-34 (2014)[12] Y. Kashihara, J. Itoh: "Parformance Evaluation among
Four types of Five-level Topologies using Pareto Front
Curves ", ECCE US, pp. 1296-1303 (2013)[13] F. Schafmeister, C. Rytz, Johann W. Kolar: "Analytical
calculation of the conduction and switching losses of theconventional matrix converter and the (very) sparse matrix
converter", APEC2005, Vol. 2, No. , pp. 875-881 (2005)[14] R. Lai, F. Wang, R. Burgos, Y. Pei, D. Boroyevich, B.
Wang, T. A. Lipo, V. D. Immanuel, K. J. Karimi: "A
Systematic Topology Evaluation Methodology for HighDensity Three-Phase PWM AC-AC Converters", IEEE
Trans., Vol. 23, No. 6, pp. 2665-2680 (2008)[15] K. Kato, J. Itoh: "Development of a Novel Commutation
Method which Drastically Suppresses Commutation
Failure of a Matrix Converter", IEEJ Trans. D, Vol. 127,
No. 8, pp. 829-836 (2007)[16] Wm. T. mclyman: "Transformer and inductor design
handbook", Marcel Dekker Inc., Vol. , No. , pp. (2004)[17] J. Xu, Y. Sato: "A Method to Determine Minimum DCLink Capacitance in PWM Rectifier-Inverter Systems",
IEEJ Transactions, Vol. 133, No. 8, pp. 804-811 (2013)[18] U. DROFENIK, G. LAIMER, J. W. KOLAR: "Theoretical
Converter Power Density Limits for Forced Convection
Cooling", Proceedings of the International PCIM Europe
Conference, Vol. , No. , pp. 608-619 (2005)