1New SWIC Scanner/Controller System
W. Kissel, B Lublinsky, A. FranckFermi National Accelerator Laboratory*Abstract
Since the early 1970s Segmented Wire Ion Chambers (SWICs) have been used in the Fermilab
Switchyard beam transport lines to measure beam positions, emittances and intensities by generating
horizontal and vertical beam profiles. Each plane utilizes 48 wires positioned in an electric field to collectbeam ionization current. By integrating the current in each wire, two-dimensional beam profiles can begenerated. The Switchyard SWICs as originally engineered are geographically multiplexed. There are 26
physical devices and only 7 scanners/controllers; therefore all profile data cannot be collected in one beamcycle. In the Main Ring era short cycle times (~10 seconds) lessened the impact of this limitation.
Tevatron era operation of Switchyard uses both SWICs and BPMs. SWICs will show profile informationand have a much lower beam intensity threshold as compared to BPMs. This is an advantage during tune-up
at low intensity especially when dealing with cryogenic transport lines. Long Tevatron cycle times (~60seconds) coupled with the need to sequence various SWICs and their gains on a given controller, have been
seen to increase the required startup/tuning time, necessitating the upgrade presented here.

Hardware Implementation.
The new SWIC controller/scanner system (figure 1) has been designed to ease the limitations notedin the current one. Each SWIC has an associated rack-mounted controller chassis which contains an
integrator channel per wire, timing and control circuitry, a dedicated 80186 CPU and an ARCNET
communication coprocessor. The controller is capable of taking and storing successive beam snapshots
under various timing and gain settings. Triggers for data collection are derived from the Tevatron real-timeclock or from direct processor commands. The SWIC position, in or out of beam, and the associated highvoltage supply are interlocked and controlled by the chassis as well. All of the SWIC controllers reside on
an ARCNET LAN and deliver data to a front end processor (68060 residing in the VME chassis). This front
end processor does data organization and statistical processing before the final data is presented to the control
consoles for operator analysis. New cabling combined with a new scanner/processor system will allow
simultaneous data collection from all SWICs. Existing "Automated Tuning" programs will be able to use
either BPM or SWIC position information.

Software Implementation.
Software support for the SWIC system will include programming SWIC scanners to do certain
measurements, store the results of the measurements and calculations performed on them in various buffers,
and provide convenient user access to these buffers. A major problem in this system is that of somehow
tying together multiple various pieces of data belonging to simultaneous measurements.
The most convenient way to do this, in our opinion, is to use the Finite State Machine (FSM)
paradigm. If we apply this paradigm then we can view the VME system as running 26 FSMs (one peractual SWIC processor). These FSMs are comprised of states, each corresponding to one measurement.
Every state is set up independently, defining the type of measurement (fast spill, slow spill, early in spill,late in spill, beam-off background, etc.) it represents, integration time, integration time prescale, gain,
calculations to be performed on the collected data, where this data should be written (associated buffers), etc.
Each FSM is also settable, allowing the user to define which states are to be executed and in which order.
* Operated by the Universities Research Association under contract with the U.S. Department of Energy

2To SWIC
Logic Control
24 channel
SWIC
integrators

24 channel
SWIC
integrators

96 channel
A/D unipolar
single ended

Analog data

Logic Control

2 RS232

2.5 Mbit/sec
ARCNET port
TCLK

Analog data
186EB processor

24 channel
SWIC
integrators

Logic Control
TCLK decoder

H. V. control

Analog data
Dry relay contact
outputs

24 channel
SWIC
integrators

SWIC controller

Logic Control
Logical level I/O

SWIC in/out

Analog data

SWIC controller
main board

SWIC controller
5.25 in. Rack mount chassis
ARCNET
lanOther
SWICcontrollers

Master CPUin VME crate

Ethernet

Fig 1. SWIC control and data retrival system.

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Each FSM can be started or stopped manually, thus starting and stopping data collection at one particularSWIC. Part of the FSM start-up procedure is extracting the measurement table and sending it to the local
SWIC processor, thus providing that processor with the guidelines for setting up actual measurements.
After the FSM is started, it repeatedly runs the same measurement procedure until it is stopped. When theFSM is running, neither the FSM itself nor the states can be altered. State transition occurs on receiving
data from an 80186, collected for this particular state. Additional support for the FSM includes FSM status(running/idle), current state indicator and state history over the last several transitions.
We are planning on two types of buffers, "simple" or linear and circular, allowing storage ofmultiple cycles of data. Software will allow connecting any buffer to any state. Each state can write its data
into up to 4 buffers and each buffer can be connected to any number of states. Each buffer, whether circularor simple, will consist of the same major parts (per measurement):- header, an ASCII string comprised of the following pieces: state, SWIC number, measurement
description, time stamp, etc.;- raw data;- calculated data.
Interrelations between FSM, states and buffers are shown in figure 2.

State 0State 1

Measurement
CircularbufferState 2

Measurement
Circularbuffer...
State 2
Slow Spillcurrent data

Measurement
Circularbuffer

Measurement
CircularbufferSWIC Finite
state mashine

Fast Spillcurrent dataFig 2. SWIC's Finite state machine and buffers

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SWIC software is architecturally similar to that of Tevatron cryogenics [1]. Both are
multiprocessor systems, consisting of a master communication CPU and multiple data collection slaves.
The communications between master and slaves in both systems are based on the ARCNET link. This
allows us to use without any changes that ARCNET protocol created for the cryogenic system. This
protocol provides prioritized task to task communications and has proved to be reliable and easy to use.
Reflective memory support created for the cryogenic control system, the virtual I/O bus (VIOB), can also be
used for support of the bulk of the SWIC devices that are read and set periodically. The only extension for
SWICs is data from the integrators, which is returned from the slaves to the master synchronously andbypasses the VIOB.

Summary and Conclusions.
This project has proved to be an interesting application of the reuse of software. Although theSWIC beam diagnostics discussed here differ markedly from the industrial process control of cryogenics,
nonetheless distributed system operation, at a level below Fermilab ACNET, has been easily ported
between them. The new software required is in the form of device drivers for the integrator boards andmathematical treatment of the profiles.
References
1. B. Lublinsky, J. Firebaugh, J. Smolucha, New Tevatron Cryogenic Control System, "TheProceedings of the 1993 IEEE Particle Accelerator Conference", V3, p1817.
2. B. Lublinsky. Shell software for Smart subsystems with front-end capabilities. Nuclear Instruments
and Methods in Physics Research A 352 (1994) pp403 - 406