Single-pulse Operation for a Matrix Converter
Synchronized with the Output Frequency
Junichi Itoh Koji Maki
Nagaoka University of Technology
1603-1 Kamitomioka-cho Nagaoka City Niigata, 940-2188 Japan
itoh@vos.nagaokaut.ac.jp
Abstract—This paper proposes a single-pulse operation
control for Matrix converters where the single-pulse
operation is controlled to synchronize with the output
frequency. There are two known problems for thesynchronize control; firstly, the beat-frequency components
occurs in the output current, and secondly, the input power
factor should be controlled as unity. To solve these problems,
this paper proposes a beat-less control with unity power
factor control. Additionally, the voltage transfer ratio is
improved to 0.955 in the high-frequency output.
Furthermore, a transfer control, which control from theasynchronous PWM to the proposed single-pulse control, is
proposed. The fundamental operations are confirmed by theexperimental results. The beat current is suppressed from
4% to approximately 1% by using the proposed control.
The experimental results demonstrate sinusoidal input
current waveforms and a unity input power factor.
Additionally, a maximum efficiency of 96.4 % is achieved at
1.34-kW load.
Index Terms—AC-AC power conversion, Beatless control,
Synchronous PWM control, High frequency AC motor
drivesI. INTRODUCTION
Recently, matrix converters that can directly convert
an AC power supply voltage into an AC voltage ofvariable amplitudes and frequencies without large energy
storage have been actively investigated [1-7]. Thesematrix converters have advantages of high efficiency,
long lifetime and downsizing in comparison to a pulse
width modulation (PWM) rectifier and inverter system.
On the other hand, an asynchronous PWM control
method with a triangular carrier or space vector
modulation is used in conventional inverters. Thismethod can control the output voltage easily. However, abeat current occurs when the carrier frequency of the
PWM is lower than the output frequency for a highfrequency output. The beat current, which consists of afrequency component lower than the fundamental output
frequency, causes a large torque ripple, heating and noisein the motor or transformer. The carrier frequency islimited by the switching devices, due to an increase inswitching losses.
A synchronous PWM control method is applied forhigh frequency output applications, such as rail vehicles,
hybrid electric vehicles, micro-gas turbine systems, andso on. In a synchronous PWM control method, a beatcurrent does not occur, because the output waveform
becomes symmetrical. Furthermore, the number ofswitching times in the output period decreases, and as aresult, high efficiency is achieved. The matrix converter
is also suitable for high frequency applications whenusing a generator and a motor; however, a synchronous
PWM control method for a matrix converter has not yet
been studied [8-9].
This paper proposes a new synchronous PWM control
strategy for a matrix converter. The PWM pulse is
synchronized with the output frequency when the output
frequency is higher than the input frequency. The voltage
transfer ratio and the efficiency of the matrix converter
using the proposed control strategy can be improved
toward from the asynchronous PWM control.
Furthermore, the beat current can be eliminated because
the PWM pulse is adjusted according to the input voltage
phase angle [10]. Additionally, the transfer control, whichsmoothly commutes the control method between theasynchronous and the synchronous control, is proposed.
The basic operations and characteristics of the proposed
control strategy are confirmed by the experimental results.
Besides, the maximum efficiency of 96.4 %, which is
improved by approximately 3 % compared with theasynchronous PWM control, is achieved at 1.34-kW load.
II. CONTROL STRATEGY
A. Cause of Beat Current
Fig. 1 illustrates the relations between the voltage andthe current for the symmetric and asymmetric operations.
A cause in low frequency components is that the productof the voltage and the output time (volt-time product) forthe positive and negative periods are not the same. Whena load can assume only to be an inductive component, theload current waveform agrees with the voltage-time
product. In Fig. 1(a), the voltage-time product for the
positive is the same to that for the negative period;
however in Fig. 1 (b), the voltage-time product for the
positive period does not agree with that for the negative
period. Consequently, the final value of the current in thecycle equals to the initial value. However, the error I,
due to the error of volt-time product A, between the
final and the initial values occur in Fig. 1(b). When theerror changes at a constant low frequency, the low
frequency component will occur.
B. Proposed Control Strategy
Fig. 2 shows a circuit diagram of a matrix converterwith nine bidirectional switches. The conduction loss canbe decreased, because the current passes thru twoswitching devices only.
The matrix converter can be regarded as a three-level
inverter with the neutral voltage point fluctuation that
depends on the input voltage phase. Each phase voltageof the input side is defined as maximum vmax, middle vmid,
and minimum vmin phase voltages, respectively. If theconventional synchronous PWM control method of athree-level inverter is applied to a matrix converter, thena beat current occurs, because an unbalanced voltage is
generated by the variation of vmax. vmid and vmin.
Fig. 3 shows the pulse pattern of the proposedsynchronous PWM control method. The switching pulse
smax, smid and smin are controlled by each value of vmax, vmid
and vmin. In addition, the voltage output is selected in theascending order. The phase and shift angles,  and  ofthe proposed control strategy are shown in Fig. 3. The
phase angle  is used to control the fundamental
component of the output voltage, and the shift angle isused to eliminate the beat current.
Fig. 4 shows the output line voltage of the matrix
converter operated using the PWM pulse shown in Fig. 3.
In order to prevent the beat current, the volt-time
products of the positive and negative period should be the(a) Symmetric waveform of voltage (square-wave).

(b) Asymmetric waveform of voltage.
Fig. 1. Relation between the output voltage and current in induction load.

Input filter

vmid > 0

smid
smin

A1  2 vmid  vmin    2   vmax  vmin (1)A2  2 vmax  vmid    2   vmax  vmin (2)
The error between A1 and A2, A1-2, is obtained from(3):
A12  A1  A2  2 2vmid  vmin  vmax   6vmid .
(3)
To obtain the low distortion output voltage, A1 and A2
should be the same. The compensation values of the volttime product, which is adjusted by  in Fig 3(b), aregiven by (4) and (5):A1.comp    vmax  vmin  ,(4)

A2.comp   vm id  vmi n    vmax  vmid   3 vmid ,(5)

where A1.comp is the compensation value for A1 and A2.compis the compensation value for A2. The error A1-2 isremoved by adding A1.comp and A2.comp to A1 and A2,
respectively. Therefore,  is obtained from (6). Likewise,from Fig. 4(c), when vmid is negative,  is calculated using(7).

  3  v mid v mid  v min (6)  3  v mid v max  v mid (7)That is, the shift angle mainly depends on vmid.
Fig. 5 shows the relations between the PWM pulse andthe output current. The shift angle  also affects the input
current waveforms. When the output current is assumed
to be an ideal sinusoidal waveform, as shown in Fig. 5,
the maximum and minimum phase current of the input
side are given by

Fig. 2. Circuit diagram of a matrix converter.

smax

same. That is, when the volt-time product A1 equals A4,
and A2 equals A3, as shown in Fig. 4(a), the beat current
does not occur. However, vmid is not constant during theoutput period, due to the change in the input voltage
angle. In addition, a sinusoidal input current is not
obtained without the use of 
The beatless current control, which eliminates the beatcurrent with  is explained as follows. To prevent beatcurrent, the volt-time products of each 1/4 period are thesame in the proposed beatless current control. When vmid
is positive, the voltage areas A1 and A2 from Fig. 4(a) arecalculated using (1) and (2).

imax 0
1
0
10

Output phase voltage
fundamental wave
02
Fig. 3. PWM pulse for the proposed control method.

(8)

1 2    iout d   I   cos   cos L  , (9)2    
where imax is the maximum phase current, imin is theminimum phase current, I is the amplitude of the output
current and L is the phase angle of the load power factor.
In order to obtain a unity power factor in the input side,
the ratio between the maximum and minimum current
must agree with the voltage ratio [11]. Therefore, thecondition for a unity power factor is described by (10).
imin 

1

1    iout d  I   cos   cos L  ,2    vmax  imin  vmin  imax

v mid v max  v min   tan   tan (10)It should be noted that the input power factor control
does not depend on the load condition, because (10) does
not use L.
The shift angle  is used for beatless current and input
power factor control. Therefore, to achieve beatlesscurrent control and input power factor control at the sametime,  and  should be optimized.
At first, the control range of  for beatless current
control is discussed. The maximum or minimum valuesof  are obtained from (6) and (7). In the case of vmid=vmax,
 becomes maximum. In the case of vmid=vmin,  becomesminimum. Consequently, the control range of  isexpressed as(a) Without compensation of  (vmid>0).

(b) With compensation of  (vmid>0).

     .
(11)That is, when  is controlled within the range asshown in (11), beatless current control is achieved.
Next, in order to obtain a sinusoidal input current, must be controlled. At every /3 of the input phase angle,
vmid agrees with vmax or vmin, and then  is equal to . In
addition, imid also agrees with imax or imin. Thus,  is
calculated using (12) for the case of = and imax=imid.

1
cos 1 1 2   6(12)
2
As a result,  is set to /6 rad and  is adjusted using(10) in order to operate beatless current and input power
control.



C. Voltage Transfer Ratio
The voltage transfer ratio, which is defined as the ratio
between the input and output voltages, is increased by the
proposed control. The maximum voltage transfer ratio of
the conventional matrix converter modulation is 0.866
because the output voltage is constrained by anenvelopment curve of three-phase input voltage. Whenthe output frequency is higher than the input frequency,
the input voltage can assume to be constant during an
output voltage cycle. Then, the voltage ratio of the
proposed control strategy discusses as follows.
The voltage ratio is calculated by dividing the output
voltage by to the input voltage. The fundamental
frequency component Euvf of the output line voltage vline,
in Fig. 4(b) and (c), is calculated by (13) using Fourier
Series Expansion from PWM pulse, in Fig. 3, and the
input voltages.
1 2
Euvf   vline sin  d 0Euvf 


3

2

v
 
0

smax
smid
smin

 smax  vmid  smid  vmin  smin sin  d

 v sind  
 
3

 
0



   2

   (c) With compensation of  (vmid<0).
Fig. 4. Line voltage waveforms.

max   

midvmid sin d  vmid sin d          

vmax sin dvmin sin d Euvf  2 3  vmax  vmid cos   (13) vmid  vmin cos   
When the input phase voltage is given by cosine
function, vmax, vmid and vmin are expressed by (14), (15)and (16) for 0≤in≤/3.

1
0
1
0
1
0

Outputcurrent
Maximum phase current :Middle phase current :Minimum phase current :Iout=I sin( + L)

Fig. 5. Relations between the output current and the PWM pulse
waveforms.

vmax  Vin cos in  ,(14)vmid  Vin cos in  2 3 ,(15)vmin  Vin cos in  2 3 ,(16)
where Vin is the amplitude of the input phase voltage, inis the input phase angle.
Thus, the output voltage is calculated by substituting (12),(14), (15) and (16) into (13). Finally the voltage transfer
ratio hvtr is given by dividing the output voltage by the
amplitude of the input line voltage.
hvtr  2  cos in   cos in  2 3cos    cos in  2 3  cos in  2 3cos   

 hvtr  3  cos     6  ,(17)where  is calculated to substitute (14), (15) and (16) into(10).

vmax vmin   sin  y1  sin  y2  ,(21)
where y1 and y2 are included so that the input power
factor is controlled by the control variables.
The output voltage during the transfer control iscalculated as described in section II C. The fundamental
frequency component Euvf of the output line voltage Vline2,
in Fig. 6, is calculated by (22) using Fourier Series
Expansion from PWM pulse, in Fig 6, and the input
voltages.

cos in  2 3 cos in   cos in  2 3  tan  6  tan 

Euvf 2     6
(18)
As a result, the voltage transfer ratio is obtained by aconstant value of 3/, approximately 0.955, to substitute(18) into (17) in all range. The transfer ratio of the
proposed control strategy is improved by approximately
10%.



III. TRANSFER CONTROL BETWEEN ASYNCHRONOUS
PWM AND THE PROPOSED CONTROLS
A. Basic strategy
The voltage transfer ratio of the proposed control ishigher than the asynchronous PWM control. Thus, thetransfer control, which smoothly links the asynchronous
PWM to the proposed control, is necessary in order toprevent the rush current of the input and output current.
The transfer control adjusts the output voltage by
injecting vmid into vmax or vmin .
Fig. 6 shows the relations among the PWM pattern,with the transfer control, the output current and line
voltage. In the Fig. 6, y1 and y2 are the interrupted widths
for vmid around /2 and 3/2. The values of  and  are
obtained by (10) and (12). Thus, the control variables are
y1 and y2 in order to control the output voltage and the
input power factor. In the line voltage of Fig. 6, the grayarea means the output voltage is decreased by y1 and y2
period.
The input current variations imax and imin, accordingto y1 and y2, are obtained from Fig. 6. The input current
variations imax and imin are obtained from the shadowed
areas of (19) and (20). Equation (19) shows that theamplitudes of imax and imin decrease along of y1 and y2.
imax  I1  2 y1
iout d   cos L   sin  y1 
2  2 y1


(19),

1 3 2 y2Iimin  
iout d  cos L   sin  y 2 (20)2 3 2 y2In order to obtain a unity power factor in the input side,
the ratio between the maximum and current must agreewith the voltage ratio [11]. So, the condition of the input
current is obtained by (21). The input power factor does
not depend on the load condition similar to (10).

 vmax  imin  vmin  imax

3

2

v
 
0

max

 smax  vmid  smid  vmin  smin sin  d

 v sind
 
3

 

0



          

vmin sin d  2   

vmid sin dvmid sin d3vmax  vmid sin d  32  y vmin  vmid sin d 
y

 2
2

vmax sin d        


mid

 y1
1



 y2

2





2

 Euvf 2  Euvf  2 3  vmax  vmid sin  y1 (22)
 vmid  vmin sin  y2 
The output voltage vtrans during the transfer control isexpressed by (23) to use htvr.

vtrans  3Vin hvtr  2 3  v max  v mid sin  y1 (23), v mid  v min sin  y 2 
where the hvtr is the voltage transfer ratio of the proposedsynchronous control, i.e. 0.955. y1 and y2 are included in(23), so the output voltage is controlled by y1 and y2 . The
ranges of y1 and y2 are defined as 0<y1</6 and 0<y2</6from the minimum widths (/3) of smax and smin. When it
is assumed that y1 and y2 are much small in (21) and (23),sin(y1) and sin(y2) are approximated by y1 and y2. Then,
y1 y1

smax
smid
smin

y2 y2

1
0
1
0
1
0

Outputcurrent
Maximum phase current variation :Minimum phase current variation :vmax-vmin
vmid-vmin

Iout=I sin( + L)

fundamental
line-line wave

vmax-vmid

decreased area

Fig. 6. Relationship among the PWM pattern (with the transfer
control) the output current and line voltage.

the equation (22) and (23) can be coordinated to (24) and(25) finally.
v max v min   y1 y 2

(24)





vtrans  3Vin hvtr  2 3  vmax  v mid  y1(25)

y 2   y1  vmin vmax

(26)

 v mid  v min  y 2 That is,y1 and y2 are obtained by (26) and (27).

  3V h  v  v

y1   2 3 

in vtrtrans vmid  vmin vmin vmax max vmid 

1(27)

B. Proposed Control Strategy
Fig. 7 shows the control block diagram of the
proposed control method. In the proposed control, thecomplicated calculations which do not required fast
processed, will use a DSP (Digital Signal Processer), andthe easier and faster calculations will use a FPGA (Field
Programmable Gate Array). Concretely, the switchingangles swN (N=1, 2…, 12) is calculated in the DSP, andthe output phase angle out is calculated in the FPGA.
Thus, the control device of the proposed system is not
expensive because the system does not require a high
DSP

FPGA
Conventional Controller

Input 3
Voltage
fout*
Vout.amp*

PWM
Pulse

Asynchronous
PWM
Control+-

Synchronous Controller

Sorting

sw1, sw2,

Cal.
(Eq. 11)12

sw3, Sw4…, Sw12

Pulse Gen.

Gen.
sw1_trans,y2 Cal. (26)sw2_trans,…

Sorting
12
Pulse Gen.

, sw12_transGen.

y1 Cal. (27)outCountPeakGen.

Thetaout
Gen.

CountPeak

CLK

Control Mode Selecter
Vin.ampCal.

×0.866×3/(40MHz)+-Transon

+
-

Synon

SelecterFig. 7. Control block diagram.

vs>vr>vt

Update data
sw1, sw2,
sw3, Sw4,CountPeakCountPeak
Pulse Gen.
input signal

sw4
out
sw3
sw2

Sorting
Pulse Gen.
output signal output signal

sw1

Su.maxSu.midSu.minSru
Ssu
Stu

Fig. 8. Time chart.

Update data

speed- DSP and a large gate size FPGA.
The PWM mode will change from asynchronous modeto the synchronous mode according to the output voltage
commands. The input voltage is detected to find thephase angle of the input voltage and to implement aswitch commutation sequence [12]. The phase angle
command  is set to /6 according to (12), and the phaseangle command  is given by (10) from the input voltage.
Then, the switching phase angles swN are calculated fromabove equations and the proposed PWM pattern (Fig. 3).
The output phase angle out is simply calculated by the
up-counter in the FPGA. The peak point of the upcounter CountPeak (C.P.) is calculated from fout* in the
DSP. The proposed PWM pattern smax, smid and smin are
generated by comparing swN with out in the block of“Pulse Gen.”. The generated pulses are sorted dependingon the amplitude relation of the input voltage.
Fig. 8 shows the time chart in the part of phase-U as an
example. The waveform of the output phase angle out
becomes a saw-tooth waveform according to the output
frequency command. In addition, switching angle swN is
updated at out=0. The outputs of “Pulse Gen.” are smax,
smid and smin shown in Fig. 3. In Fig. 8, smax, smid and smin
are sorted as vs>vr>vt. Finally, the gate pulses are
generated by the pulse of sru, ssu and stu in the voltage
commutation.
IV. EXPERIMENTAL RESULTS
In order to evaluate the proposed control strategy,
experimental equipment has built. The experimental
circuit conditions were set as follows: the input voltage of
200 V, the input frequency fin of 50 Hz, the output
frequency fout of 1432 Hz, active power of 1.9 kW and theload power factor of 0.8. The cut-off frequency of the
input filter is 1 kHz with the damping factor of 0.2.
Fig. 9 shows the experimental results using thesynchronous PWM control without a consideration ofbeat current. A sinusoidal waveform is not obtained forthe input current because the input current is notcontrolled. The beat current of low frequency
components is included in the output current.
Fig. 9(b) shows the enlarged waveforms of Fig. 9(a).
The negative and positive parts of the output voltage are
not balanced. Thus, the output current is an asymmetricalcurrent. In addition, the output current waveforms in eachperiod are different shapes.
Fig. 9(c) shows the harmonic analysis of the input
current of Fig 9(a). The input current includes the 5th
harmonic component of more than 10 % to thefundamental component, and the 7th, 11th and 13th
harmonics components of more than 3 %. In addition, the
3rd and 6th harmonics components, which are nottheoretically components in three-phase system, areincluded more than 1 % in the input current so that theasymmetrical waveform among three phases will be
generated.

Fig. 9(d) shows the harmonic analysis of the output
current of Fig. 9(a). The beat current components, suchas fout-6fin and fout-12fin are included more than 4 % and
1 %. The harmonics components of 2fout±3fin are included
approximately 10 % in the output current.
Fig. 10(a) shows the operation waveforms with theproposed synchronous method. The experimental circuit
conditions are the same as in Fig. 9. A sinusoidal
waveform and input unity power factor are obtained forthe input current. The input current has some cyclic
distortions, because the pulse pattern is drasticallychanged at every /6. In addition, a beat current is notincluded in the output current.
Fig. 10(b) shows the enlarged waveforms of Fig. 10(a).
The negative and positive parts of the output voltage
waveform are balanced. The sinusoidal waveform isobtained for the output current due to the inductive load.
Fig. 10(c) shows the harmonic analysis of the input
current of Fig. 10(a). Harmonic components, which are
more than 3% of fundamental frequency, such as the 5th,
7th, 11th, 13th harmonics, and so on, are included in the
input current. By improving the pulse pattern at every
/6, the harmonic components will be reduced.
Fig. 10(d) shows the harmonic analysis of the output
current of Fig. 10(a). The beat current component, suchas fout-6fin, is suppressed to less than 1%. Harmonics ofhigher frequency than the fundamental frequency, suchas 2fout±3fin and fout±6fout, are also suppressed toapproximately 1%. The validity of this method forbeatless current and unity power factor control was
confirmed by the experimental results.
Fig. 11 shows the input and output current THD
characteristics against output frequency with and without
the proposed beat-less control method. The experimental
circuit conditions were set as follows: the input voltage
of 200 V, the input frequency fin of 50 Hz, output
frequency of 1432 Hz, active power of 1.6 kW and theload power factor of 0.8. The cut-off frequency of the
input filter is 1 kHz with the damping factor of 0.2. In
Fig. 11, the input current and the low frequency
component are in almost inverse proportion to the output
frequency. The input current and the low frequency
component decrease dramatically when less than 700 Hz.
The input current THD of the proposed control is lower
over 955 Hz. The input current THD of 7.7 % is achieved
at 1432 Hz. The beat component of the proposed control
is lower in all range. The low frequency component isless than 2 % for more than 700 Hz.
Fig. 12 shows the efficiency characteristics with theproposed control and an asynchronous PWM control on
the same prototype [12]. The experimental circuit
conditions were set as follows: the input voltage of 200 V,
the input frequency fin of 50 Hz, R-load of 12.5  and theload power factor of 0.98 to approximately 1. The cut-off
frequency of the input filter is 1 kHz with the damping
factor of 0.2. Output frequency is 477, 572, 716, 955,
1432 Hz. The asynchronous PWM control uses virtual

Input voltage
0250[V/div]
Input current
0
10[A/div]
Output voltage
0500[V/div]
Output current
0
10[A/div]

Time scale 10[msec/div](a) Operation waveforms with the synchronous PWM control
for a 3-level inverter.
Output voltage
0250[V/div]

Output current
0
10[A/div]

Time scale 400[ sec/div](b) Enlarged output voltage and current waveforms of (a).
Fundamental
frequency
100 %

10 %

6th
5th
7th

6th

Horizontal axis
250[Hz/div]

13th
11th

Vertical axis
10[dB/div]

19th
17th

3rd

1%

(c) Harmonic analysis of the input current.
Fundamental
frequency
100 %fout ? 6 fin [Hz]fout ? 12 fin [Hz]Horizontal axis
500[Hz/div]

2 fout ? 3 fin [Hz]2 fout + 3 fin [Hz]fout + 6 fin [Hz]Vertical axis
20[dB/div]

1%(d) Harmonic analysis of the output current.
Fig. 9. Experimental results with synchronous PWM control
for a three-level inverter.

indirect control method [1] with two-phase modulation.
In addition, output frequency of the asynchronous PWM
control is 40 Hz and the carrier frequency is 10 kHz.
The maximum efficiency of the proposed control isreached to 96.4 %, which is improved by 3 % comparedto the maximum efficiency of the asynchronous PWM
control, at active output power 1.34 kW. The efficiencyof the proposed control is improved according incrementof output frequency. In other words, when the output
frequency is lower, the efficiency becomes lower. This
reason is that when the output frequency is much higher
than input frequency in the proposed control, theefficiency is decreased by harmonic components in theInput current THD [%]Input voltage
250[V/div] 0
Input current
10[A/div] 0
Output voltage
500[V/div] 0
Output current
10[A/div] 0Time scale 10[msec/div](a) Operation waveforms with the proposed PWM.
Output voltage
250[V/div] 0(a) Output frequency versus input current THD characteristic.
7

Output current
10[A/div] 0

65Time scale 400[ sec/div](b) Enlarged output voltage and current waveforms of (a).

4Fundamental
frequency
100 %
7th
5th

10 %

3

Horizontal axis
250[Hz/div]

19th
13th
11th
17th

Without beat-lesscontrolWith beat-lesscontrol

2

Vertical axis
10[dB/div]

3rd

1

1%

0
400

Horizontal axis
500[Hz/div]

Fundamental
frequency
2 fout ? 3 fin [Hz]100 %fout ? 6 fin [Hz]fout + 6 fin [Hz]2 fout + 3 fin [Hz]Vertical axis
20[dB/div]

1%

800

1000

1200

1400

1600

Output frequency[Hz](b) Output frequency versus low frequency component of the output
current characteristic.
Fig. 11. Comparison of output frequency characteristics with theproposed control and synchronous PWM control for a three-level
inverter.
Maximum efficiency
96.4 % (1.34 kW)

Efficiency [%](c) Harmonic analysis of the input current.

600

97
fo = 1432 Hz

9695

fo = 955 Hz

94
fo = 716 Hz

93
92

fo = 572 Hz

91(d) Harmonic analysis of the output current.
Fig. 10. Experimental results with the proposed control method.

V. CONCLUSION
A new synchronous PWM control strategy, based on athree-level inverter, has been proposed. The proposed
control strategy consists of beatless current control andinput power factor control. A maximum voltage transfer

fo = 477 Hz

89
88

output current. It is noted that the voltage rating of thepower devices in the main circuit is 1200 V even if theexperimental setup is connected to the power grid of 200
V. Thus, the voltage drop of the power devices is higher.
Therefore, to obtain higher efficiency, the optimization of
main circuit is required. Conclusions

Asynchronous
PWM Control

90

0

0.5

1

1.5

2

2.5

Active output power [kW]Fig. 12. Active output power versus efficiency with the proposed
control and an asynchronous PWM control.
(Output frequency are 477, 572, 716, 955, 1432 Hz)

ratio of 0.955 was obtained in the proposed method
where the conventional one is 0.866. The transfer control,
which smoothly changes the PWM mode from theasynchronous PWM to the proposed synchronous control,
was proposed. The experimental results confirm the basic
operations, characteristics of the proposed control method
and the transfer control as follows.
1) The input current is controlled as a sinusoidal

waveform with a unity power factor for a high frequency
output of more than 1 kHz using the proposed control andthe transfer control.
2) The beat current component, which has lower
frequency than the fundamental frequency, wassuppressed to less than 1% using the beatless current
control, and in addition, a unity power factor was
obtained for the input side.
3) The transfer control suppresses the rush current at
the boundary points of each control. The control change
from an asynchronous PWM control to the proposed
single-pulse control is confirmed by the experimental
results using the transfer control.
4) The maximum efficiency of 96.4 % is achieved at
active output power of 1.34 kW in the experimental
results. Additionally, the efficiency is able to more
improve with an optimization of the main circuit devices.
This study was supported by Industrial Technology
Grant Program in 2009 from New Energy and Industrial
Technology Development Organization (NEDO) of Japan.
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