RS8802

Dual 5A High-Speed, Low-Side Gate Driver
1 FEATURES

3 DESCRIPTIONS Industry-Standard Pinout

The RS8802 dual-channel, high-speed, low-side gate

 Two Independent Gate-Drive Channels

driver device is capable of effectively driving MOSFET

 5A Peak Source and Sink-Drive Current

and IGBT power switches. Using a design that

 TTL and CMOS Compatible Logic Thresholdinherently minimizes shoot-through current, theIndependent of Supply Voltage
 Hysteretic-Logic Thresholds for High Noise

Immunity Inputs Pin-Voltage Levels Not Restricted by

RS8802 is capable of sourcing and sinking high peakcurrent pulses into capacitive loads offering rail-to-rail
drive capability and extremely small propagation delay
typically 13ns.

VDD Pin Bias Supply Voltage

The RS8802 device is capable of handling -4V at input.

 4.5V to 18V Single-Supply Range

In addition, the drivers feature matched internal Outputs Held Low During VDD-UVLO, (Ensures

propagation delays between the two channels, these

Glitch-Free Operation at Power up and Power

delays are very well suited for applications requiring

Down)

dual-gate

driveswith

criticaltiming,suchas Fast Propagation Delays (13ns Typical)

synchronous rectifiers. This also enables connecting

 Fast Rise and Fall Times (7ns and 6ns Typical)

two channels in parallel to effectively increase current- Two Outputs are in Parallel for Higher Drive

drive capability or driving two switches in parallel withCurrent

one input signal.

 Outputs Held Low When Inputs Floating

The RS8802 provides 5A source and 5A sink Operating Temperature Range of –40°C to(symmetrical drive) peak-drive current capability at

140°C
 Micro SIZE PACKAGES: SOP8

VDD = 12V.
The RS8802 is designed to operate over a wide VDD
range of 4.5 V to 18 V and wide temperature range of

2 APPLICATIONS
 Switched-Mode Power Supplies
 DC-DC Converters
 Motor Control, Solar Power Gate Drive for Emerging Wide Band-Gap

Power Devices such as GaN-40°C to 140°C. Internal Undervoltage Lockout(UVLO) circuitry on VDD pin holds output low outside
VDD operating range. The capability to operate at low
voltage levels such as below 5V, along with best-inclass switching characteristics, is especially suited for
driving emerging wide band-gap power-switching
devices as GaN power semiconductor devices.

Device Information (1)PART
NUMBER
RS8802(1)

REV A.1.1

1 / 18PACKAGESOP8

BODY SIZE(NOM)
4.90mm×3.90mm

For all available packages, see the orderable addendum at theend of the data sheet.

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RS8802
4 Typical Application Diagrams
1

INA

NC

NC

2 INA

8

OUTA 7

RS8802
3 GND

Q1

VDD 6

R1
4.5V to 18V

VDD

C1=1uF
INB

4 INB

Q2

OUTB 5R2

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RS8802
Table of Contents
1 FEATURES ............................................................................................................................................................................... 1
2 APPLICATIONS ...................................................................................................................................................................... 1
3 DESCRIPTIONS ...................................................................................................................................................................... 1
4 Typical Application Diagrams ............................................................................................................................................. 2
5 Revision History ..................................................................................................................................................................... 4
6 PACKAGE/ORDERING INFORMATION (1) ..................................................................................................................... 5
7 Pin Configuration and Functions (Top View) .................................................................................................................. 6
8 SPECIFICATIONS ................................................................................................................................................................... 7
8.1 Absolute Maximum Ratings .......................................................................................................................................... 7
8.2 ESD Ratings ...................................................................................................................................................................... 7
8.3 Recommended Operating Conditions ......................................................................................................................... 7
8.4 ELECTRICAL CHARACTERISTICS ............................................................................................................................... 8
8.5 TYPICAL PERFORMANCE CHARACTERISTICS ....................................................................................................10
9 Detailed Description ...........................................................................................................................................................13
9.1 Overview .........................................................................................................................................................................13
9.2 Functional Block Diagram............................................................................................................................................13
9.3 VDD and Undervoltage Lockout ..................................................................................................................................14
9.4 Device Functional Modes ............................................................................................................................................14
10 Power Supply Recommendations ..................................................................................................................................15
11 Layout ...................................................................................................................................................................................15
12 PACKAGE OUTLINE DIMENSIONS .............................................................................................................................16
13 TAPE AND REEL INFORMATION .................................................................................................................................17

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RS8802
5 Revision History
Note: Page numbers for previous revisions may different from page numbers in the current version.
VERSION

Change Date

Change Item

A.1

2023/12/22

Initial version completed

A.1.1

2024/02/23

Modify packaging naming

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RS8802
6 PACKAGE/ORDERING INFORMATION (1)Orderable Device

Package TypeOp Temp(°C)

RS8802HXK

SOP8-40°C ~+140°C

DeviceMarking (2)RS8802

MSL (3)

Package Qty

MSL1

Tape and Reel,4000

NOTE:(1) This information is the most current data available for the designated devices. This data is subject to change without notice and revisionof this document. For browser-based versions of this data sheet, refer to the right-hand navigation.
(2) There may be additional marking, which relates to the lot trace code information (data code and vendor code), the logo or theenvironmental category on the device.
(3) MSL, The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications.

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RS8802
7 Pin Configuration and Functions (Top View)(TOP VIEW)

NC

1

8

NC

INA

2

7

OUTA

GND

3

6

VDD

INB

4

5

OUTB

SOP8

Pin Description
SOP8

DESCRIPTION

I/O (1)NUMBER

NAME

1

NC

--

No connection

2

INA

I

Input to channel A. OUTA held LOW if INA is unbiased or floating.

3

GND

G

Ground4

INB

I

Input to channel B. OUTB held LOW if INB is unbiased or floating.

5

OUTB

O

Output of Channel B

6

VDD

P

Supply input.

7

OUTA

O

Output of Channel A

8

NC

--

No connection(1) I=input, O=output, G= Ground.

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RS8802
8 SPECIFICATIONS
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2) (3)Supply voltage
OUT voltage

MIN

MAX

UNIT

VDD

-0.3

22

V

DC

-0.3

VDD+0.3

Repetitive pulse less than 200ns (4)-2

VDD+0.3

Output continuous current

IOUT_DC(Source/Sink)

Output pulsed current (0.5us)

IOUT_pulsed (Source/Sink)

Input voltage

INA, INB (5)θJA

Package thermal impedance (6)

TJ

A
V

110

°C/W

-40

150

°C

-65

150

°C

260

°C

Lead Temperature (Soldering, 10s)
(1)

(2)
(3)
(4)
(5)
(6)
(7)

A

5
SOP8

Storage Temperature Range

0.4
22

-4

operating virtual junction temperature range (7)VStresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. See
Packaging Section of the datasheet for thermal limitations and considerations of packages.
These devices are sensitive to electrostatic discharge; follow proper device-handling procedures.
Values are verified by characterization on bench.
Maximum voltage on input pins is not restricted by the voltage on the VDD pin.
The package thermal impedance is calculated in accordance with JESD-51.
The maximum power dissipation is a function of TJ(MAX), RθJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (T J(MAX) - TA) / RθJA. All numbers apply for packages soldered directly onto a PCB.

8.2 ESD Ratings
The following ESD information is provided for handling of ESD-sensitive devices in an ESD protected area only.
VALUE
V(ESD)

Electrostatic discharge

Human-Body Model (HBM), MIL-STD-883K METHOD 3015.9±3000

Charged-Device Model (CDM), ANSI/ESDA/JEDEC JS-002-2018

±1000

UNIT
V

ESD SENSITIVITY CAUTION
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its publishedspecifications.

8.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN

TYP

Supply voltage range, VDD

4.5

12

18

V

Operating junction temperature range

-40

140

°C

Input voltage, INA, INB

0

18

V

7 / 18MAX

UNIT

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RS8802
8.4 ELECTRICAL CHARACTERISTICS
VDD=12V, TJ=-40°C to 140°C, 1μF capacitor from VDD to GND. Currents are positive into, negative out of the specified
terminal.
SYMBOLPARAMETERTEST CONDITION

MIN

TYP

MAX

UNIT

INA=VDD, INB=GND

35

47

80

uA

INA = INB = GND

33

45

75

uA

INA=VDD, INB=VDD

40

51

85

uA

INA=VDD, INB=GND

270

310

430

uA

INA = INB = GND

190

220

310

uA

INA=VDD, INB=VDD

350

400

540

uA

BIAS CURRENTS
IDD(OFF)

IDD

Startup current

Startup current

VDD=3.4V

VDD=12V

UNDER VOLTAGE LOCKOUT (UVLO)
VON
VOFF
VDD_H

Supply start threshold
Minimum operating
Voltage after supply start
Supply voltage hysteresis

TA = 25°C

4.3

V

TA = -40°C to 150°C

3.9

4.3

4.5

V

TA = -40°C to 150°C

3.45

4

4.45

V

TA = 25°C

0.3

V

INPUTS(INA,INB)
VIN_H

Input signal high threshold

Output high for INA/B pin

VIN_L

Input signal low threshold

Output low for INA/B pin

1.0

2.8

RIN

Input pull down resistor

VDD=12V,VIN=4V

150

V
V

235

310

kΩ

SOURCE/SINK Current (OUTA,OUTB)
ISRC/SNK (2)Source/ Sink peak current

CLOAD=0.22μF, FSW = 1kHz

±5A

VDD = 12V, IOUT=-10mA

30mV

VDD = 4.5V, IOUT=-10mA

35

mV

VDD = 12V, IOUT=10mA

5.05

mV

VDD = 4.5V, IOUT=10mA

5.15

VDD = 12V, IOUT=10mA

3

VDD = 4.5V, IOUT=10mA

3.5

VDD = 12V, IOUT=10mA

0.5

VDD = 4.5V, IOUT=10mA

0.5

OUTPUTS (OUT)
VOD-VOHHigh output voltage

VOL

Low output voltage

ROH

Output pullup resistance

ROL

Output pulldown resistance

mV
4.7
0.7

Ω
Ω

SWITCHING CHARACTERISTICS
VDD = 12V, CLOAD=1.8nF

7

VDD = 4.5V, CLOAD=1.8nF

15.5

VDD = 12V, CLOAD=1.8nF

6

VDD = 4.5V, CLOAD=1.8nF

5.5

INA to output propagation
delay (1) (2)VDD=12V, 5V input pulse CLOAD =1.8nF

13

VDD=4.5V, 5V input pulse CLOAD =1.8nF

16

INB to output propagation
delay (1) (2)VDD=12V, 5V input pulse CLOAD =1.8nF

13

VDD=4.5V, 5V input pulse CLOAD =1.8nF

16TR

Rise time (1) (2)TF

Fall time (1) (2)

tD1
tD2

ns
ns
ns
ns

(1) See timing diagrams in Figure 1, Figure 2.
(2) This parameter is ensured by design and/or characterization and is not tested in production.

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RS8802
High

High

INA

INA

Low

Low

High

High

INB

INB

Low

Low

High

High

OUTA

OUTB

Low

Low
tD1 trtD2 trtD1 tfFigure 1. PWM Input to INA pin(INB pin tied to GND)tD2 tfFigure 2. PWM Input to INB pin(INA pin tied to GND)

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RS8802
8.5 TYPICAL PERFORMANCE CHARACTERISTICS
NOTE: The graphs and tables provided following this note are a statistical summary based on a limited number of samples
and are provided for informational purposes only.
INA=VDD,INB=GND
INA=INB=GND
INA=INB=VDD

80

700

VDD=3.4V

Operating Supply Current (μA)

Start-Up Current (μA)

100

60
40
20

INA=VDD,INB=GND
INA=INB=GND
INA=INB=VDD

600

500
400
300
200
100

0

0
-50

0

50

Temperature (℃)

100

-50

150

Figure 3. Start-Up Current vs Temperature

50

Temperature (℃)

100

150

500

INA=VDD,INB=GND

Supply Current (μA)

INA=INB=GND

Supply Current (μA)

0

Figure 4. Supply Current vs Temperature (Output
in DCON/OFF Condition)

400

300

200

100

0

400
300
200
100
0

2

6

10

14

18

2

6

Supply Voltage (V)INA=INB=600kHz
INA=600kHz
INB=600kHz

40

14

18

Figure 6. Supply Current vs Supply Voltage
25

VDD=12V
CLoad=1.8nF

Supply Current (μA)

50

10Supply Voltage (V)Figure 5. Supply Current vs Supply Voltage

Supply Current (μA)

VDD=12V

30
20
10
0

VDD=4.5V C =1.8nF
Load
VDD=12V
VDD=18V

20
15
10
5
0

-50

0

50

Temperature (℃)

100

0

100

200

300

400

500

600

Frequency(kHz)

Figure 7. Operating Supply Current vs
Temperature (Output Switching)

Figure 8. Single Channel Operating Supply
Current vs Frequency
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RS8802
TYPICAL PERFORMANCE CHARACTERISTICS
NOTE: The graphs and tables provided following this note are a statistical summary based on a limited number of samples
and are provided for informational purposes only.
4

UVLO Rising
UVLO Falling

4.5

4

3.5

2

1

0
-50

0

50

Temperature (℃)

100

-50

150

Figure 9. UVLO Threshold Voltage vs
Temperature
5

4
3.5
3
2.5
2
-50

0

50

Temperature (℃)

100

150

1

VDD=12V
ROH

4.5

0

Figure 10. Input Threshold vs Temperature

Output Pull−Down Resistance (Ω)

Output Pull-up Resistance (Ω)

VDD=12V

3

3

50

Temperature (℃)

100

VDD=12V
ROL

0.8
0.6
0.4
0.2
0

150

-50

Figure 11. Output Pullup Resistance vs
Temperature

050

Temperature (℃)

100

150

Figure 12. Output Pulldown Resistance vs
Temperature
7

7

VDD=12V
CLoad=1.8nF

VDD=12V
CLoad=1.8nF

6.6

6.6

6.2

Fall Time (ns)

Rise Time (ns)

VINH
VINL

Input Threshold (V)UVLO Threshold Voltage (V)

5

6.2

5.8

5.8
5.4
5

4.6
4.2

5.4
-50

0

50

Temperature (℃)

100

-50

150

Figure 13. Rise Time vs Temperature

050

Temperature (℃)

100

150

Figure 14. Fall Time vs Temperature

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RS8802
TYPICAL PERFORMANCE CHARACTERISTICS
NOTE: The graphs and tables provided following this note are a statistical summary based on a limited number of samples
and are provided for informational purposes only.
Turn-On
Turn-Off30

VDD=12V
CLoad=1.8nF

Propagation Delay (ns)

Propagation Delay (ns)

22

18

14

10

6
-50

0

50

Temperature (℃)

100

Turn-On
Turn-Off26

VDD=12V
CLoad=1.8nF

22
18

14
10
6

150

4

Figure 15. Input to Output Propagation Delayvs Temperature

6

8

10

12

Supply Voltage(V)

14

16

18

Figure 16. Propagation Delay vs Supply Voltage

16

7

14

6.5

Fall Time (ns)

Rise Time (ns)

12
10
8
6

6
5.5
5

4
4.5

2
0

4
4

6

8

10

12

14

16

18

4

Supply Voltage (V)

6

8

10

12

14

16

18

Supply Voltage (V)Figure 17. Rise Time vs Supply Voltage

Figure 18. Fall Time vs Supply Voltage

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RS8802
9 Detailed Description
9.1 Overview
The RS8802 dual-channel, high-speed, low-side gate driver device is capable of effectively driving MOSFET and
IGBT power switches. Using a design that inherently minimizes shoot-through current, the RS8802 is capable ofsourcing and sinking high peak-current pulses into capacitive loads offering rail-to-rail drive capability andextremely small propagation delay typically 13ns.
The RS8802 device is capable of handling -4V at input.
The RS8802 provides 5A source and sink peak-drive current capability at VDD = 12V.
The RS8802 is designed to operate over a wide VDD range of 4.5V to 18V and wide temperature range of -40°C
to 140°C.

9.2 Functional Block Diagram
VDD
6 VDD

INA 2

7

OUTA

5

OUTB

1

NC

8

NC

VDD

INB 4
VDD

UVLO
GND

3

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RS8802
9.3 VDD and Undervoltage Lockout
The RS8802 has internal Undervoltage Lockout (UVLO) protection feature on the VDD-pin supply-circuit blocks.
Whenever the driver is in UVLO condition (for example when VDD voltage is less than VON during power up andwhen VDD voltage is less than VOFF during power down), this circuit holds all outputs LOW, regardless of thestatus of the inputs. The UVLO is typically 4.3V with 300mV typical hysteresis.
Because the driver draws current from the VDD pin to bias all internal circuits, for the best high-speed circuit
performance, two VDD bypass capacitors are recommended to prevent noise problems. The use of surface mountcomponents is highly recommended. A 0.1μF ceramic capacitor should be located as close as possible to the VDD
to GND pins of the gate driver. In addition, a larger capacitor (such as 1μF) with relatively low ESR should beconnected in parallel and close proximity, in order to help deliver the high-current peaks required by the load.
The parallel combination of capacitors should present a low impedance characteristic for the expected current
levels and switching frequencies in the application.

VDD

VDD

VDD Threshold

INB

INA

INA

INB

OUT

OUT

Figure 19. Power-Up (Non-Inverting Drive)

VDD Threshold

Figure20. Power-Up (Inverting Drive)

9.4 Device Functional Modes
In the normal mode the output state is dependent on states of the INA and INB pins. Table 1 below lists theoutput states for different input pin combinations.

Table 1. Device Logic Table
INA PIN

INB PINOUTA PINOUTB PIN

L

L

L

L

L

H

L

H

H

L

H

L

H

H

H

H

Any

Any

L

L

x (1)

x (1)

L

L

(1) x = Floating Condition.

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RS8802
10 Power Supply Recommendations
The bias supply voltage range for which the RS8802 device is rated to operate is from 4.5V to 18V. The lower
end of this range is governed by the internal UVLO protection feature on the VDD pin supply circuit blocks.
Whenever the driver is in UVLO condition when the V DD pin voltage is below the V(ON) supply start threshold,this feature holds the output low, regardless of the status of the inputs. The upper end of this range is driven by
the 22V absolute maximum voltage rating of the VDD pin of the device (which is a stress rating). Keeping a 2V
margin to allow for transient voltage spikes, the maximum recommended voltage for the VDD pin is 18V.

11 Layout
The following circuit layout guidelines are strongly recommended when designing with these high-speed drivers.
• Locate the driver device as close as possible to the power device in order to minimize the length of highcurrent traces between the output pins and the gate of the power device.
• Locate the VDD bypass capacitors between VDD and GND as close as possible to the driver with minimal
trace length to improve the noise filtering. These capacitors support high-peak current being drawn from
VDD during turn on of power MOSFET. The use of low inductance SMD components such as chip resistors
and chip capacitors is highly recommended.

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RS8802
12 PACKAGE OUTLINE DIMENSIONSSOP8 (3)

b

e

5.2
E

E1
2.2
D

1.27

0.6

RECOMMENDED LAND PATTERN (Unit: mm)

A2

c

A

A1

L

θ

Dimensions In Millimeters

Dimensions In Inches

Min

Max

Min

Max

A (1)

1.350

1.750

0.053

0.069

A1

0.100

0.250

0.004

0.010

A2

1.350

1.550

0.053

0.061

b

0.330

0.510

0.013

0.020

c

0.170

0.250

0.007

0.010

D (1)

4.800

5.000

0.189

0.197

Symbol1.270(BSC) (2)e0.050(BSC) (2)

E

5.800

6.200

0.228

0.244

E1 (1)

3.800

4.000

0.150

0.157

L

0.400

1.270

0.016

0.050

θ

0°

8°

0°

8°

NOTE:
1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
2. BSC (Basic Spacing between Centers), "Basic" spacing is nominal.
3. This drawing is subject to change without notice.

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RS880213 TAPE AND REEL INFORMATIONREEL DIMENSIONSTAPE DIMENSION

Reel
DiameterReel Width(W1)

DIRECTION OF FEEDNOTE: The picture is only for reference. Please make the object as the standard.

KEY PARAMETER LIST OF TAPE AND REEL
Package Type
SOP8

Reel
Diameter
13’’

Reel
Width(mm)
12.4

A0
(mm)
6.40

B0
(mm)
5.40

K0
(mm)
2.10

P0
(mm)
4.0

P1
(mm)
8.0

P2
(mm)
2.0

W
(mm)
12.0

Pin1
Quadrant
Q1

NOTE:
1. All dimensions are nominal.
2. Plastic or metal protrusions of 0.15mm maximum per side are not included.

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RS8802
IMPORTANT NOTICE AND DISCLAIMER
Jiangsu RUNIC Technology Co., Ltd. will accurately and reliably provide technical and reliability data (including
data sheets), design resources (including reference designs), application or other design advice, WEB tools, safety
information and other resources, without warranty of any defect, and will not make any express or implied
warranty, including but not limited to the warranty of merchantability Implied warranty that it is suitable for a
specific purpose or does not infringe the intellectual property rights of any third party.
These resources are intended for skilled developers designing with RUNIC products You will be solely
responsible for: (1) Selecting the appropriate products for your application; (2) Designing, validating and testing
your application; (3) Ensuring your application meets applicable standards and any other safety, security or otherrequirements; (4) RUNIC and the RUNIC logo are registered trademarks of RUNIC INCORPORATED. All
trademarks are the property of their respective owners; (5) For change details, review the revision history
included in any revised document. The resources are subject to change without notice. Our company will not beliable for the use of this product and the infringement of patents or third-party intellectual property rights due
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