Evaluation of a Maximum Power Density Design
Method for Matrix Converter using SiC-MOSFET
Kazuhiro Koiwa, and Jun-ichi Itoh
Department of Electrical engineering
Nagaoka University of Technology, NUT
Niigata, Japan
newkoiwa@stn.nagaokaut.ac.jp
Abstract— This paper discusses a maximum power density
design for a matrix converter using SiC device based on frontloading design. In order to design the matrix converter at
maximum power density, the conduction loss and the switchingloss of the matrix converter are derived theoretically. Based onthese equations, the relationship between the efficiency andpower density are discussed by Pareto-front curve in order tosolve the tread-off problem between the power density and theefficiency. From the experimental results, the maximum
efficiency is 98.3% with two phase modulation at 3.9-kW
output power and 25-kHz switching frequency (Devices: SiCMOSFET BSM00003A ROHM). Moreover, the maximum
power density of the matrix converter reaches 2.12 kW/dm3(the design value is 2.22 kW/dm3) with a natural air cooling.
Thus, the design method of a high power density AC-AC
converter using a matrix converter is established according to
the specifications.

I.

INTRODUCTION

The matrix converter which can convert an AC power
supply voltage directly into another AC output voltage ofvariable amplitude and frequency without any large energy
storages, such as electrolytic capacitors, is one of solution toachieve high power density and high efficiency [1]-[5]. The
advantages are found in compared with the back-to-back(BTB) converter, which consists of a PWM rectifier and a
PWM inverter as follows; (i) reduced size, light-weight andlong life-time owing to the absence of the large electrolytic
capacitor in the main circuit; (ii) high efficiency because of
single-stage power converter that reduces switching loss
compared with two-stage power converter; (iii) low current
stress of the switching devices in the low output frequency
operation because of no current concentration. Furthermore,in these applications, in order to install the matrix converterin limited space, high power density is required.
For this reason, the high efficiency and high power
density of the matrix converter have been discussed [4]-[6].
In order to achieve the maximum power density of thematrix converter, the prototype is repeatedly manufactured
after the design and decision of the specification of the

978-1-4799-5776-7/14/$31.00 ©2014 IEEE

power converter. However, the number of manufacturing theprototype causes high development cost and longdevelopment period. In order to solve this problem, the frontloading design which estimates the loss, volume and EMC
before manufacturing the prototype, is introduced to thepower converter design [7]. According to the front loading
design, the prototype can be manufactured by only one timeowing to the evaluation of the performance. As a result, thedeveloping cost and process can be reduced.
The front loading design in terms of the efficiency andpower density requires the estimation technologies of loss
and volume using mathematical equations. There are two
methods for loss analysis as follows: (i) the loss is calculated
from the device current and the drain-source voltage byusing a circuit simulator [8]. (ii) the loss is theoreticallyobtained from the derived formulas by using the device
parameters [9]. However, in the method (i), it is difficult to
optimize the converter loss when the loss is analyzed in a lotof conditions. This is because a lot of simulation time isneeded in order to find the minimum loss condition by trialand-error. On the other hand, in the method (ii), it is easy to
optimize the circuit because analysis time and the trial time
can be reduced.
The derivation methods of the converter loss of an ACAC direct converter have been proposed [10]-[12]. In Ref.
[11], the conduction loss and the switching loss of an indirect
matrix converter is theoretically calculated. Moreover, theconverter loss of the direct matrix converter which iscomposed by nine switches, has been discussed [12].
However, the validity of the loss formulas has not been
confirmed by experiment. Furthermore, the volume of thematrix converter and the BTB system has been quantitatively
compared using the loss formulas [13]. However, theeffectiveness of the design method that the direct matrix
converter is designed at maximum power density point, has
not been discussed by experiment. In particular, when a wideband gap such as SiC and GaN device, is practically used, it
is important that the advantage of the matrix converter can betheoretically revealed for the BTB system in terms of an
optimum design.
This paper proposes the maximum power density design
method for the matrix converter with loss formulas. In
addition, the validity of the proposed design method isrevealed by the experiments. In order to validate the design
method, the prototype of the matrix converter isdemonstrated at maximum power density point using SiCMOSFET. The remainder of this paper is organized asfollows. First, the conduction loss and the switching loss ofthe matrix converter are theoretically derived. Additionally,
the validity of the loss formulas is confirmed by experimentusing 1st prototype which is 2-kW rated power. Second, themaximum power density design method is introduced bythese equations. Next, a Pareto-front curve is drawn by loss
and volume formulas. It is noted that SiC-MOSFET which is1200-V rated voltage and 120-A rated current, is used asswitching device. Based on the Pareto-front curve, the 2nd
prototype of 10-kW rated power, is designed andmanufactured at the maximum power density point. Finally,
the operation of the matrix converter is demonstrated in theexperiments with a 9.5-kW RL-load at 25-kHz switchingfrequency. Based on a result, the validity of the maximum
power density design method for the matrix converter isconfirmed in experiment.
II.

(a) Circuit configuration of a matrix converter.

(b) Control diagram of the matrix converter.
Fig. 1. Circuit configuration and the virtual indirect control
diagram of the matrix converter.

CIRCUIT CONFIGURATION

Fig. 1(a) shows the circuit configuration of the matrix
converter. Note that the bi-directional switches in the matrix
converter can be used with two MOSFETs. In addition, inorder to suppress the input filter resonance, the damping
resistor is connected to the input inductor in parallel.
Fig. 1(b) shows the control diagram of the matrix
converter. In this paper, virtual indirect control [3] is adopted
to the matrix converter. In the virtual indirect control, theinput current and the output voltage can be independently
controlled. For this reason, a conventional control of arectifier and an inverter is easily applied. Moreover, theswitching loss is reduced by arranging the switching pulse
patterns. This is because the fluctuated voltage due to theswitching is decreased. Accordingly, the switching pattern,in which the switching changes directly from the maximum
voltage phase to the minimum voltage phase is not taken into
the consideration. This reason is because the switchingpattern is that the middle phase is certainly gone through.
Note that the maximum, middle and minimum voltage phasedepend on the relationship among each input phase voltage.
In order to simplify the loss analysis, the three phasemodulation is adopted. Furthermore, the dead-time and thecommutation are not taken into the consideration. The input
current command in the virtual rectifier is also set to unity
power factor.
In order to design high efficiency and high power densityof the matrix converter, it is necessary to optimize theswitching device and the switching frequency by analyzing
the loss.

Fig. 2. Loss analysis method by simulator.

III.

LOSS ANALYSIS METHOD FOR MATRIX CONVERTER

Fig. 2 shows the loss analysis method by simulator. The
device voltage vc and current ic are detected. Next, theconduction and switching loss are calculated from themeasurement value and loss data table. In this method, it iseasy to analyze the loss of the matrix converter using the loss
model of switching device. However, it is difficult to
optimize the converter loss because the loss is analyzed in a
lot of conditions. This is because a lot of simulation time isneeded in order to find the minimum loss condition by trialand-error.
Fig. 3 shows the equivalent single-phase model of thematrix converter for derivation of loss. When the relationshipamong the input phase voltages is R>S>T, the maximum
phase switch Smax is the R-phase switch, the middle phaseswitch is the S-phase switch and the minimum phase switch
Smin is the T-phase switch. In other words, the matrix
converter loss is derived by each Smax, Smid and Smin.

A. Conduction loss
The conduction loss in the matrix converter Pcon can be
expressed by (1) [12].
Pcon 

1  o ovon  io do t 12
2
k con1 I o  k con 2 I o2

io  I o sin(ot   o )

Psw _ loss fs
1
eonvsw dot
T  Vs

io

Smid

Smin
Fig. 3. Equivalent single phase model of the matrix converter.



B. Switching loss
In this section, the turn-on loss of maximum phase
Pton_smax is derived. First, general turn-on loss is expressed as
T
2
0

Smax

vmid_minIn this paper, the total conduction loss of each phase Pcon
is derived. Consequently, the on-duty command of eachphase is definitely 1. Thus, it can be revealed that the two
switches are not on-state when the other switch is turned on.
It is assumed that the switching devices with samecharacteristics are used. It is noted that kcon1 and kcon2 are
obtained from the on-state voltage characteristic in thedatasheet. o is the output angular frequency. In addition, von,which is the on-state voltage of the device. The instantaneous
value of the load current io is expressed by (2) from the
maximum load current Io and the load angle o.
vmax_mid

Fig. 4. Integral period of each switching loss of the matrix
converter.

 C. Confirmation of matrix converter loss formulas byexperiment
In this section, the validity of the loss formulas iswhere T is the cycle of io, fs is the switching frequency, Vs is
confirmed with the 1st prototype.
the tested voltage when the switching loss was measured,and vsw is the drain-source voltage of the device. In addition,
Fig. 5 shows the 1st prototype which is the matrix
the instantaneous turn-on loss eon is expressed by (4).
converter board using Si-MOSFET. Table 1 lists theparameters of the MOSFET and the experimental conditions.
 The switching loss of a MOSFET is twice as high as that ofan IGBT. This reason is because the switching loss of a
MOSFET does not depend on the pole of io. This board
Similarly, kton1 and kton2 are obtained from the turn-on
consists of the main circuit, the filter capacitor, theloss characteristic in the datasheet.
protection circuit for the surge voltage and the drive circuit.
Fig. 4 shows the integral period to calculate the switching
In addition, the size of this board is 358 mm×155 mm×40
loss. The integral period is different among each switching
mm. IC-0526B (RYOSAN) is used as the heat-sink.
devices owing to the polarity of io. In other words, Pton_smax
Fig. 6 shows the operation waveforms by using 2-kW
occurs when the polarity of io is positive. Furthermore, theRL-load. Note that the output line voltage was observed
drain-source voltage vsw is different among each switching
through a low pass filter (LPF) that the cutoff frequency isdevices. It is assumed that the switching pattern is that the
1.5 kHz. In addition, two phase modulation was adopted in
middle phase is certainly gone through. Accordingly, thethe virtual inverter control. In addition, the four-step voltage
drain-source voltage of Smax is differential voltage (vmax commutation is adopted as the commutation method [14]. Asvmid) between the maximum phase voltage vmax and thea result, it is accomplished that unity power factor is
middle phase voltage vmid. Thus, Pton_smax is expressed by (5).
obtained and the input current THD (Total Harmonic
Distortion) is 7.4%. Thus, fundamental operation of the
3 f sVin
Pton _ s max ( 2 k ton 1 I o  k ton 2 )2 2V s matrix converter can be confirmed.


eon  k ton1io  k ton 2 

Fig. 7 shows the loss characteristics for the output power.
It can be confirmed that the maximum error of the total loss
is 6.74% at 1.88-A output current. Thus, the calculation
results almost agree to the simulation and experimental

results. Thus, the validity of loss formulas can be confirmed
in experiment.
IV.

DESIGN OF MAXIMUM POWER DENSITY BASED ON
FRONT-LOADING

Based on these formulas, the maximum power density
design method for the matrix converter is introduced in thissection.
Fig. 8 shows the flow chart to design the matrix converter
for the maximum power density. First, the volume of theheat-sink Volheat is calculated. It is noted that the thermal
resistance Rth and the cooling system performance index(CSPI) [15], which is the cooling performance of the heatsink, are needed in order to calculate Volheat. Second, thevolume of the input LC filter is introduced from the loss
analysis results. Concretely, the capacitance value Cf iscalculated from the voltage ripple Vrip on the filter capacitor.
As the result, the volume of the filter capacitor VolC can becalculated. On the other hand, the inductance value of the
input inductor L is decided from Cf and the cut-off frequency
fc. Moreover, the volume of the input inductor is calculated
based on an Area Product [16]. After that, the Pareto-front
curve is mentioned from the volume of the system and theefficiency. From the Pareto-front curve, fs at the maximum
power density is obtained. In other words, the specificationof the matrix converter is decided. Finally, the inductor, thecapacitor and the heat-sink are selected. It is noted that
Volheat is recalculated when the required heat-sink is notfound.

Fig. 5. Board of a 2-kW matrix converter (1st prototype). The
size of this board is 358 mm×155 mm×40 mm.
Table 1. Device parameters and experimental conditions. The
no-load loss and snubber loss were measured in experiment.

A. Heat-sink
Finally, Volheat is calculated from CSPI [15]. Note that
CSPI is decided from the datasheet of the heat-sink. As aresult, Volheat is expressed asVol heat 

1
CSPI  Rth

Fig. 6. Steady operation at rated power by the experiment.

where Rth is expressed from the loss, maximum junction
temperature and ambient temperature.
B. Input LC filter
First, the volume of the input LC filter in the matrix
converter is calculated. It is assumed that fc is one-fifth of fs
and Vrip is 4% or less. Accordingly, Cf is expressed as



Cf 

Io

sVrip

sin D

where s is the switching angular frequency and D is on-dutyof the converter. In the matrix converter, D cannot be
obtained because D varies in the time. In this paper, Cf isdesigned in the worst case. Thus, D is set to 0.5. As the result,
Cf and L are designed to 8.44 F and 110 H. Accordingly,
VolC is obtained from electrostatic energy E as

Fig. 7. Total loss characteristics comparison among
calculation, simulation and experimental result.



E

1
1
 0 s k z 2VolC  C f Vin 222

where s and kz which are the dielectric constant of thematerial and the breakdown voltage coefficient depend on
the material of the capacitor. In addition, 0 is the dielectric
constant of the vacuum. On the other hand, the volume of theinductor is calculated from area product [16].
C. Decision of switching frequency
Fig. 9 shows the Pareto-front curve of the matrix
converter. Table 2 lists the calculation condition to decision
the specification of the matrix converter at maximum power
density point.
As shown in Fig. 9, it can be confirmed that the
maximum power density in the matrix converter can beaccomplished at 85 kHz. The efficiency and the maximum
power density in the matrix converter are 97.0% and 9.7
kW/dm3, respectively. In other words, it is necessary to
determine the switching frequency of each converters byusing the Pareto-front curve. In addition, the experimental
result is plotted in Fig. 10 as the switching frequency and theoutput power are 10 kHz and 2.08 kW. However, the power
density of the 1st prototype is a half of maximum power
density or less. In other words, the 1st prototype is designed
at low power density point. Thus, in order to improve thepower density, it is necessary to design and manufacture the
2nd prototype by the maximum power density design
method.
D. Maximumu power density design of 2nd prototype
Fig. 10 shows the Pareto-front curve of the matrix
converter using SiC. Table 3 lists the design conditions forthe 2nd prototype. Note that SiC-MOSFET (BSM00003A)
which has 1200-V rated voltage and 120-A rated current, isused as the switching device. According to the switching
device, the rated power of the system is set to 40 kW. The
cooling system of the heat-sink and the rated output power
are considered as follows; (i) the natural air cooling system
and 10-kW output power, (ii) the natural air cooling system(40 kW), (iii) the forced air cooling system (40 kW), (iv) thewater cooling system (10 kW) and (v) the water coolingsystem (10 kW). Note that CSPI in (iii) and (iv) are 4.0 and
270, respectively [7]. Additionally, the conduction loss, theswitching loss, no-load loss and the copper loss of the input
inductor are taken into consideration in order to evaluate theefficiency. On the other hand, the volume of the input LC
filter, the heat-sink and the switching device are taken into
consideration in order to evaluate the power density. As theresult, it is confirmed that the power density can be achievedto 30 kW/dm3 when the water cooling system is adopted.
Fig. 11 shows the volume comparison for each switchingfrequency. According to the result, when the switchingfrequency is 25 kHz, the total volume of the 2nd prototype issmaller than other switching frequency. Although thevolume of the heat-sink is less at 10-kHz switchingfrequency, the input LC filter is large. On the other hand, theinput LC filter becomes smaller when the switchingfrequency is 50kHz. However, the volume of the heat-sink isincreased because of the converter loss. Thus, the volume ofthe heat-sink and input LC filter is trade-off.

Start
3. Calculation of MC loss Ploss
4.1 Heat-sink
Calculation of CSPI from datasheet
Calculation of volume of heat-sink Volheat
4.2 Input LC filter
Calculation of capacitance Cf from voltage ripple Vrip
Calculation of volume of filter capacitor VolC
Calculation of inductance Lin from cut-off frequency fc
Calculation of volume of input inductor VolL
4.3 Switching frequency
Output parameter (Efficiency, Power density)& Drawing pareto-front curve
Decision of switching frequency fs
at maximum power density
Selection of heat-sink, capacitor and input inductor
at maximum power density

The heat-sink,capacitor and inductor can be found?

No

Yes
FinishFig. 8. Flow chart to design the matrix converter for the
maximum power density based on front loading design.

Fig. 9. Pareto front curves of the matrix converter and the
BTB system (Rated power = 2 kW).

In this paper, the prototype is manufactured as 10-kW
rated power due to the limitation of the experimental
environment. From the result, it is confirmed that fs at the
maximum power density is 25 kHz. Additionally, theTable 2. Calculation parameters to calculate the power loss
and volume of the matrix converter and BTB system.

Table 3. Design conditions to design maximum power densityfor 2nd order prototype using SiC-MOSFET.

maximum power density is 2.22 kW/dm3. Therefore, theinput LC filter and the heat-sink are selected as the switchingfrequency is 25 kHz. Table 4 lists the specification of 2nd
prototype which is designed at 25-kHz switching frequency.
Fig.12 shows 2nd prototype and the input inductors. In
order to reduce the stray inductance, 2nd prototype ismanufactured by print circuit board (PCB) that the size is
433 mm×233 mm×4 mm. In addition, the switching devices,
fuses, filter capacitors, current sensors and snubber circuit
are connected on PCB.
Fig. 13 shows the property of the volume of the matrix
converter. As the result, it is confirmed that the heat-sink isbulky. Thus, in order to reduce the total volume, the forced
air or water cooling system is adopted. Accordingly, theheat-sink and input LC filter can be reduced because CSPI
and s are increased.
V.

Fig. 10. Pareto-front curve of the matrix converter using SiCMOSFET according to output power and cooling method. (i)natural air(10 kW), (ii) natural air(40 kW), (iii) forced air(40kW), (iv) water (10 kW), (v) water (40 kW).
Table 4. Specification of 2nd-order prototype using SiCMOSFET which is designed at maximum power density.

EXPERIMENTAL RESULTS

Fig. 14(a) shows the operation waveforms using 9.5-kW
RL-load. Note that the switching frequency is 25 kHz. In
addition, 2-phase modulation was adopted in the virtual
inverter control. Moreover, the four step hybrid commutation
which is combined by the voltage and current commutation,
was adopted [14]. As a result, it is accomplished that unity
power factor is obtained.
Fig. 14(b) shows the spectrum of the input current
obtained by a fast fourier transform (FFT). It is noted that the
input current value is normalized to the fundamental current,
which is equal to 28.2 A. Accordingly, large harmonic
distortion does not occur. In particular, the fifth and seventhorder harmonic component is low because the commutation
failure does not occur owing to the hybrid commutation.
Moreover, the input current THD is 2.9%. Thus, thefundamental operation of 2nd prototype is confirmed.
Fig. 15 shows the efficiency characteristics at 10-kHz
and 25-kHz switching frequency. As the result, it isconfirmed that the maximum efficiency is 99.1% at 1.5-kW
output power and 10-kHz switching frequency. However, inlight load, the efficiency becomes low owing to no-load loss.
Furthermore, the total efficiency in experiment is lower thanthe designed efficiency. In this paper, the 2nd prototype wasdesigned as the output power factor is unity in order tovalidate the maximum power density design method. That is,

8
7
6

Heat-sink
Input inductor

Filter capacitor
Switching device(BSM00003A)
4.7 dm3

5
4
3
2
1
0

50 kHz
25 kHzSwitching frequency fs
Fig. 11. Volume comparison for the switching frequency.
10 kHzthe output current is increased because the output power
factor is low in experiment. Thus, it is necessary to take the(a) Input and output waveforms of the 2nd prototype.
Fig. 12. A 10-kW matrix converter using SiC-MOSFET(ROHM: BSM00003A). The size of PCB (print circuit board)is 433 mm×233 mm×4 mm.

100

Input current (%)

10

1

0.1

0.01
0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

Frequency (kHz)(b) Spectrum of the input current.
Fig. 14. Steady operation at 9.5-kW output power in theexperiment. The input current THD is 2.9%.
99.5

Fig. 13. Property of the volume of the MC by natural air
cooling system

output power factor into consideration when the matrix
converter is designed in practical application.

Fig. 17 shows the loss characteristics for the maximum
output current. It is confirmed that the maximum error of thetotal loss is 10.6% at 6.29-A output current. This is because
the harmonic component is included in the output current. As
the result, when the output power is measured with a power
meter, the harmonic component in the output current iseliminated and the measured output power is decreased.
Furthermore, the loss error increases over 36-A output
current. This is caused by the snubber, wire resistor and fuse.
Based on these results, the loss of the matrix converter
can be easily estimated by loss formulas which does notdepend on the kind of switching devices. Moreover, thematrix converter can be easily designed at maximum power
density point with a Pareto-front curve. For this reason, it isexpected that the application of the matrix converter can be
expanded in terms of energy saving and reduced size.

99

Efficiency (%)

Fig. 16 shows the input current THD characteristics at
25-kHz switching frequency. As the result, the input current
THD is less than 5.0% over 1-kW output power. In addition,
the input current THD becomes low when the output power
is increased. This is because the rate of harmonic component
for the fundamental component is degraded by increasing theoutput power.

10-kHz switchingfrequency

25-kHz switchingfrequency

98.5
98
97.5
97

0

1

2

3

4
5
6
7
8
9
10
Output power (kW)Fig. 15. Efficiency characteristics at 10-kHz and 25-kHz switchingfrequency. The efficiency at maximum point is 99.1%.

VI.

CONCLUSION

In this paper, the derivation methods of the conduction
loss and the switching loss in the matrix converter werediscussed in experiment. As the result, it was confirmed thatthe total loss error between the calculation and experimental
result is 6.74% at maximum point with 1st prototype whichis 2-kW rated power. Thus, the loss formulas for the matrix
converter were validated in experiment. However, the powerdensity of 1st prototype was 37.5% of the maximum power
density point.

10
9

The maximum power density design method for thematrix converter was proposed based on front-loading designin order to improve the power density. In order to validate
the maximum power density design method in experiment,
2nd prototype was designed and manufactured by the
maximum power density design method. As the result, thespecification of the 2nd prototype are as follows: theswitching frequency is 25 kHz at maximum power density
point. the input inductance is 110 H, the filter capacitanceis 8.44 F, the size of heat-sink is 147×450×50mm.
Additionally, the power density and efficiency of 2nd
prototype in experiment are 2.12 kW/dm3 and 97.7%,
respectively. Note that the designed value of power density
was 2.22 kW/dm3.

8
7
6
5
4
3
2
1
0

0

1

2

3

4
5
6
7
8
9
10
Output power (kW)Fig. 16. The input current THD characteristic at 25-kHz switchingfrequency.

Based on these results, the loss of the matrix converter
can be easily estimated by loss formulas which does notdepend on the kinds of switching device. Moreover, thematrix converter can be easily designed at maximum power
density point with a Pareto-front curve. For this reason, it isexpected that the application of the matrix converter can be
expanded in terms of energy saving and size reduction.
ACKNOWLEDGMENT
A part of this study was supported by industrial
technology grant program in 2011 from new energy andindustrial technology development organization (NEDO) of
Japan.
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