Novel Control Strategy for Synchronous PWM on a Matrix Converter
Jun-ichi ItohKoji Maki

Member, IEEE
Nagaoka University of Technology
Kamitomioka-cho 1603-1
Nagaoka, 940-2188, Niigata, Japan
itoh@vos.nagaokaut.ac.jp

Student Member, IEEE
Nagaoka University of Technology
Kamitomioka-cho 1603-1
Nagaoka, 940-2188, Niigata, Japan
edil@stn.nagaokaut.ac.jp

Abstract -- A new synchronous PWM control strategy is
proposed for the output frequency of a matrix converter. This
paper shows a single pulse operation for the matrix converter assame as a single pulse operation for an inverter. One of the
problems of the single pulse operation is the beat-frequency
components in the output current. The problem is fixed by thecontrol of beatless current with pulse shift compensation to
PWM pulse, which is adjusted equally between the positive andnegative areas, based on a single-pulse control. The voltage
transfer ratio is improved to 0.955 when the output frequency ismuch higher than the input frequency. Additionally, a transfer
control between an asynchronous and the synchronous control is
proposed. The basic operation of the proposed control isconfirmed by simulation and experimental results.

not yet been studied [8-9].
This paper proposes a new synchronous PWM control
strategy for a matrix converter. The PWM pulse is
synchronized with the output frequency when the output
frequency is higher than the input frequency. The voltage
transfer ratio and the efficiency of the matrix converter using
the proposed control strategy can be improved toward fromthe asynchronous PWM control. Furthermore, the beatcurrent can be eliminated because the PWM pulse is adjusted
according to the input voltage phase angle [10]. Additionally,
the transfer control, which smoothly commutes the control
method between the asynchronous and the synchronous
control, is proposed. The basic operation of the proposed
control strategy is confirmed by the simulation and theexperimental results.

Index Terms—AC-AC power conversion, Beatless control,
Synchronous PWM control, High frequency AC motor drives

I.

INTRODUCTION

Recently, matrix converters that can directly convert an
AC power supply voltage into an AC voltage of variable
amplitudes and frequencies without large energy storage havebeen actively investigated [1-7]. These matrix converters
have advantages of high efficiency, long lifetime anddownsizing in comparison to a pulse width modulation(PWM) rectifier and inverter system.
On the other hand, an asynchronous PWM control methodwith a triangular carrier or space vector modulation is used in
the conventional inverters. This method can control the
output voltage easily. However, a beat current occurs when
the carrier frequency of the PWM is lower than the output
frequency for a high frequency output. The beat current,
which consists of a frequency component lower than thefundamental output frequency, causes a large torque ripple,
heating and noise in the motor or transformer. The carrier
frequency is limited by the switching devices, due to anincrease in switching losses.
A synchronous PWM control method is applied for highfrequency output applications, such as rail vehicles, hybrid
electric vehicles, micro-gas turbine systems, and so on. In asynchronous PWM control method, a beat current does notoccur, because the output waveform becomes symmetrical.
Furthermore, the number of switching times in the output
period decreases, and as a result, high efficiency is achieved.
The matrix converter is also suitable for high frequency
applications when using a generator and a motor; however, a
synchronous PWM control method for a matrix converter has

II.

CONTROL STRATEGY

A.

Cause of Beat Current
Fig. 1 illustrates the relations between the voltage and thecurrent for the symmetric and asymmetric operations. A
cause in low frequency components is that the product of thevoltage and the output time (volt-time product) for the
positive and negative periods are not the same. When a load
can assume only to be an inductive component, the load
current waveform agrees with the voltage-time product. In
Fig. 1(a), the voltage-time product for the positive is the sameto that for the negative period; however in Fig.1 (b), thevoltage-time product for the positive period does not agreewith that for the negative period. Consequently, the final
value of the current in the cycle equals to the initial value.
However, the error ΔI, due to the error of volt-time product
ΔA, between the final and the initial values occur in Fig. 1(b).
When the error changes at a constant low frequency, the low
frequency component will occur.
B.

Proposed Control Strategy
Fig. 2 shows a circuit diagram of a matrix converter withnine bidirectional switches. The conduction loss can be
decreased, because the current passes thru two switching
devices only.
The matrix converter can be regarded as a three-level
inverter with the neutral voltage point fluctuation that
depends on the input voltage phase. Each phase voltage ofthe input side is defined as maximum vmax, middle vmid, andminimum vmin phase voltages, respectively.
If theconventional synchronous PWM control method of a threelevel inverter is applied to a matrix converter, then a beatcurrent occurs, because an unbalanced voltage is generated
by the variation of vmax. vmid and vmin.
Fig. 3 shows the pulse pattern of the proposedsynchronous PWM control method. The switching pulse
smax, smid and smin are controlled by each value of vmax, vmid andvmin. In addition, the voltage output is selected in theascending order. The phase and shift angles, α and β, of the
proposed control strategy are shown in Fig. 3. The phaseangle α is used to control the fundamental component of theoutput voltage, and the shift angle β is used to eliminate thebeat current.
Fig. 4 shows the output line voltage of the matrix
converter operated using the PWM pulse shown in Fig. 3.
In order to prevent the beat current, the volt-time products ofthe positive and negative period should be the same. That is,when the volt-time product A1 equals A4, and A2 equals A3, asshown in Fig. 4(a), the beat current does not occur.
However, vmid is not constant during the output period, due tothe change in the input voltage angle. In addition, asinusoidal input current is not obtained without the use of β.
The beatless current control, which eliminates the beatcurrent with β, is explained as follows. To prevent beatcurrent, the volt-time products of each 1/4 period are thesame in the proposed beatless current control. When vmid ispositive, the voltage areas A1 and A2 from Fig. 4(a) arecalculated using (1) and (2).

A1 = 2α (vmid − vmin ) + (π 2 − α )(vmax − vmin )A2 = 2α (vmax − vmid ) + (π 2 − α )(vmax − vmin )(2)
The error between A1 and A2, ΔA1-2, is obtained from (3):ΔA1−2 = A1 − A2 = 2α (2vmid − vmin − vmax ) = 6αvmid .
(3)
To obtain the low distortion output voltage, A1 and A2
should be the same. The compensation values of the volttime product, which is adjusted by β in Fig 3(b), are given by(4) and (5):A1.comp = − β (vmax − vmin ) ,(a) Symmetric waveform of voltage (square-wave).

(b) Asymmetric waveform of voltage.
Fig. 1. Relation between the output voltage and current in induction load.

(1)

(4)

A2.comp = β (vm id − vmi n ) − β (vmax − vmid ) = 3βvmid ,(5)
where A1.comp is the compensation value for A1 and A2.comp is
the compensation value for A2. The error ΔA1-2 is removed
by adding A1.comp and A2.comp to A1 and A2, respectively.
Therefore, β is obtained from (6). Likewise, from Fig. 4(c),when vmid is negative, β is calculated using (7).

β = 3α ⋅ v mid (v mid − v min )(6)

β = 3α ⋅ v mid (v max − v mid )Input filter(7)
That is, the shift angle mainly depends on vmid.
Fig. 5 shows the relations between the PWM pulse and theoutput current. The shift angle β also affects the input
current waveforms. When the output current is assumed to
be an ideal sinusoidal waveform, as shown in Fig. 5, themaximum and minimum phase current of the input side are
given byFig. 2. Circuit diagram of a matrix converter.
vmid > 0

smax

1

smid

1

smin

1

imax =

1 π −α − βiout dθ = I π ⋅ cos(α + β )cos(θ L ) ,2π ∫α + β

1 2π − α + βiout dθ = − I π ⋅ cos(α − β )cos(θ L ) ,(9)2π ∫π +α − βwhere imax is the maximum phase current, imin is the minimum
phase current, I is the amplitude of the output current and θLis the phase angle of the load power factor. In order toobtain a unity power factor in the input side, the ratio
between the maximum and minimum current must agree withthe voltage ratio [11]. Therefore, the condition for a unity
power factor is described by (10).
imin =

000

Output phase voltage
fundamental wave
02
Fig. 3. PWM pulse for the proposed control method.

(8)∵ vmax ⋅ imin = vmin ⋅ imax

v mid (v max − v min ) = tan α ⋅ tan β(10)It should be noted that the input power factor control does
not depend on the load condition, because (10) does not use
θL.
The shift angle β is used for beatless current and input
power factor control. Therefore, to achieve beatless current
control and input power factor control at the same time, αand β should be optimized.
At first, the control range of β for beatless current control
is discussed. The maximum or minimum values of β are
obtained from (6) and (7). In the case of vmid=vmax, βbecomes maximum. In the case of vmid=vmin, β becomesminimum.
Consequently, the control range of β isexpressed as(11)−α ≤ β ≤ α .
That is, when β is controlled within the range as shown in(11), beatless current control is achieved.
Next, in order to obtain a sinusoidal input current, α must
be controlled. At every π/3 of the input phase angle, vmid
agrees with vmax or vmin, and then α is equal to β. In addition,
imid also agrees with imax or imin. Thus, α is calculated using(12) for the case of α=β and imax=imid.
1cos −1 (1 2) = π 6(12)2
As a result, α is set to π/6 rad and β is adjusted using (10)in order to operate beatless current and input power control.

α=C.

(a) Without compensation of β (vmid>0).
decreased area
vmax-vmin
vmid-vminincreased area

vmax-vmid

fundamental
line-line wave(b) With compensation of β (vmid>0).

(c) With compensation of β (vmid<0).
Fig. 4. Line voltage waveforms.

Voltage Transfer Ratio
The voltage transfer ratio, which is defined as the ratio
between the input and output voltages, is increased by the
proposed control. The maximum voltage transfer ratio of
the conventional matrix converter modulation is 0.866
because the output voltage is constrained by an envelopment
curve of three-phase input voltage. When the output
frequency is higher than the input frequency, the input
voltage can assume to be constant during an output voltage
cycle. Then, the voltage ratio of the proposed control strategy
discusses as follows.
The voltage ratio is calculated to divide the output voltage
according to the input voltage. The fundamental frequency
component Euvf of the output line voltage vline, in Fig. 4(b) and(c), is calculated by (13) from Fourier Series Expansion.
1 2π
Euvf = ∫ vline sin (θ )dθπ 0
π 2+α + β1 π 2−α + β= ⎧⎨∫(vmid − vmin )sin θdθ + ∫π 2−α + β (vmax − vmin )sin θdθ
π⎩ β
π− β

+∫

π 2+α + β+∫

3π 2 +α − β

3π 2−α − β(3π 2 −α − β(vmax − vmid )sin θdθ + ∫π + β(vmax − vmid )sin θdθ(vmax − vmid )sin θdθ + ∫3π 2+α −β (vmax − vmid )sin θdθ ⎫⎬2π − β⎭)∴ Euvf = 2 3 π {(vmax − vmid )cos(α + β )(13)+ (vmid − vmin ) cos(α − β )}When the input phase voltage is given by cosine function,
vmax, vmid and vmin are expressed by (14), (15) and (16) for0≤θin≤π/3.

Fig. 5. Relations between the output current and the PWM pulse
waveforms.

vmax = Vin cos(θ in ) ,(14)

vmid = Vin cos(θ in − 2π 3) ,(15)

vmin = Vin cos(θ in + 2π 3) ,(16)
where Vin is the amplitude of the input phase voltage, θin isthe input phase angle.
Thus, the output voltage is calculated by substituting (12),(14), (15) and (16) into (13). Finally the voltage transfer ratio
hvtr is given by dividing the output voltage by the amplitudeof the input line voltage.
hvtr = (2 π )[{cos(θ in ) − cos(θ in − 2π 3)}cos(α + β )+ (cos(θ in − 2π 3) − cos(θ in + 2π 3))cos(α − β )]∴ hvtr = (3 π )cos(θ − β − π 6) ,(17)
where β is calculated to substitute (14), (15) and (16) into(10).
cos(θ in − 2π 3) {cos(θ in ) − cos(θ in + 2π 3)} = tan (π 6) ⋅ tan β∴β = θ −π 6(18)
As a result, the voltage transfer ratio is obtained by aconstant value of 3/π, approximately 0.955, to substitute (18)
into (17) in all range. The transfer ratio of the proposed
control strategy is improved by approximately 10%.
III. TRANSFER CONTROL BETWEEN ASYNCHRONOUS AND
THE PROPOSED PWM CONTROLS
Basic strategy
The voltage transfer ratio of the proposed control is higher
than the asynchronous PWM control. Thus, the transfer
control, which smoothly links the asynchronous PWM to the
proposed control, is necessary in order to prevent the rushcurrent of the input and output current. The transfer control
adjusts the output voltage by injecting vmid into vmax or vmin .
Fig. 6 shows the relations among the PWM pattern, withthe transfer control, the output current and line voltage. In
the Fig. 6, y1 and y2 are the interrupted widths for vmid around
π/2 and 3π/2. The values of α and β are obtained by (10) and(12). Thus, the control variables are y1 and y2 in order tocontrol the output voltage and the input power factor. In theline voltage of Fig. 6, the gray area means the output voltage
is decreased by y1 and y2 period.
The input current variations Δimax and Δimin, according to
y1 and y2, are obtained from Fig. 6. The input current
variations Δimax and Δimin are obtained from the shadowed
areas of (19) and (20). Equation (19) shows that theamplitudes of imax and imin decrease along of y1 and y2.
A.

Δimax = −1 π 2+ y1
Iiout dθ = − cos(θ L ) ⋅ sin ( y1 )2π ∫π 2− y1π∵ vmax ⋅ Δimin = vmin ⋅ Δimax

vmax vmin = − sin ( y1 ) sin ( y2 ) ,(21)
where y1 and y2 are included so that the input power factor iscontrolled by the control variables.
The output voltage during the transfer control is calculated
as described in section II C. The fundamental frequency
component Euvf of the output line voltage Vline2, in Fig. 6, iscalculated by (22) from Fourier Series Expansion.
Euvf 2 =

=

1

2π

π ∫0

π⎞
⎛
vline 2 sin ⎜θ + ⎟dθ6⎠⎝

π 2 +α + β
1 ⎧ π 2 −α + β(vmid − vmin )sin θdθ + ∫π 2−α +β (vmax − vmin )sin θdθ
⎨∫ β
π⎩
π− β

3π 2 −α − β(vmax − vmid )sin θdθ + ∫π + β
π 2 +α + β+∫(vmax − vmid )sin θdθ + ∫3π 2+α −β (vmax − vmid )sin θdθ ⎫⎬+∫3π 2 +α − β−∫2π 3+ y1−∫

4π 3+ y1

π 3+ y 2

4π 3− y12

3π 2 −α − β

2π 3− y1(vmax − vmid )sin θdθ

2π − β⎭5π 3+ y 2

(vmax − vmid )sin θdθ − ∫5π 3− y (vmid − vmin )sin θdθ
2(vmax − vmid )sin θdθ − ∫π 3− y (vmid − vmin )sin θdθ

(

)

}

∴ Euvf 2 = Euvf − 2 3 π {(vmax − vmid )sin ( y1 )(22)
+ (vmid − vmin )sin ( y2 )}The output voltage vtrans during the transfer control isexpressed by (23) to use htvr.

()

vtrans = 3Vin hvtr − 2 3 π {(vmax − v mid )sin ( y1 )(23),
+ (v mid − vmin )sin ( y 2 )}where the hvtr is the voltage transfer ratio of the proposedsynchronous control, i.e. 0.955. y1 and y2 are included in(19),

1 3π 2+ y2
Iiout dθ = cos(θ L ) ⋅ sin ( y 2 )(20)
2π ∫3π 2− y2π
In order to obtain a unity power factor in the input side,
the ratio between the maximum and current must agree withthe voltage ratio [11]. So, the condition of the input current isobtained by (21). The input power factor does not dependon the load condition similar to (10).
Δimin = −Fig. 6. Relationship among the PWM pattern (with the transfer control)
the output current and line voltage.

(23), so the output voltage is controlled by y1 and y2 . The
ranges of y1 and y2 are defined as 0<y1<π/6 and 0<y2<π/6from the minimum widths (π/3) of smax and smin. When it isassumed that y1 and y2 are much small in (21) and (23),sin(y1) and sin(y2) are approximated by y1 and y2. Then, theequation (22) and (23) can be coordinated to (24) and (25)
finally.
vmax vmin = − y1 y 2

(24)

(

)

vtrans = 3Vin hvtr − 2 3 π {(vmax − vmid ) y1(25)

y 2 = − y1 ⋅ vmin vmax

(26)

+ (vmid − vmin ) y 2 }That is,y1 and y2 are obtained by (26) and (27).

() ( 3V h − h )⋅ {(v − v )y1 = π 2 3 ⋅

max

(27)

mid

− (vmid − vmin )(v min vmax )}−1

Control Block Diagram
Fig. 7 shows the control block diagram of the proposed
DSP
FPGA
Conventional Controller

Input 3
Voltage
fout*
Vout.amp*

Asynchronous
PWM
Control

Sorting

sw1 , sw2 ,Cal.
(Eq. 11)

PWM
Pulse

+
-

Synchronous Controller
12sw3, Sw4…, Sw12Gen.

Pulse Gen.

sw1_trans,y2 Cal. (26)sw2_trans,…

Sorting
12
Pulse Gen.

, sw12_transGen.

y1 Cal. (27)outCountPeakGen.

Thetaout
Gen.

CountPeak

CLK

Control Mode Selecter
Vin.ampCal.

×0.866×3/(40MHz)+-Transon

+
-

Synon

SelecterFig. 7. Control block diagram.

vs>vr>vt

Update data
sw1, sw2 ,sw3 , Sw4,CountPeakCountPeak
Pulse Gen.
input signal

sw4
out
sw3
sw2
sw1

Sorting
Pulse Gen.
output signal output signal

B.

vtr 2

in vtrcontrol method. In the proposed control, the complicatedcalculations which do not required fast processd, will use a
DSP (Digital Signal Processer), and the easier and faster
calculations will use a FPGA (Field Programmable Gate
Array). Concretely, the switching angles θswN (N=1, 2…, 12)
is calculated in the DSP, and the output phase angle θout iscalculated in the FPGA. Thus, the control device of the
proposed system is not expensive because the system does
not require a high speed- DSP and a large gate size FPGA.
The PWM mode will change from asynchronous mode to
the synchronous mode according to the output voltage
commands. The input voltage is detected to find the phaseangle of the input voltage and to implement a switch
commutation sequence [12]. The phase angle command α
is set to π/6 according to (12), and the phase angle command
β is given by (10) from the input voltage. Then, the switchingphase angles θswN are calculated from above equations and the
proposed PWM pattern (Fig. 3). The output phase angle θout
is simply calculated by the up-counter in the FPGA. The
peak point of the up-counter CountPeak (C.P.) is calculated
from fout* in the DSP. The proposed PWM pattern smax, smidand smin are generated by comparing θswN with θout in theblock of “Pulse Gen.”. The generated pulses are sorted
depending on the amplitude relation of the input voltage.
Fig. 8 shows the time chart in the part of phase-U as an
example. The waveform of the output phase angle θout
becomes a saw-tooth waveform according to the output
frequency command. In addition, switching angle θswN is
updated at θout=0. The outputs of “Pulse Gen.” are smax, smidand smin shown in Fig. 3. In Fig. 8, smax, smid and smin are
sorted as vs>vr>vt. Finally, the gate pulses are generated by
the pulse of sru, ssu and stu in the voltage commutation.

Su.maxSu.midSu.minSru
Ssu
Stu

Fig. 8. Time chart.

Update data

IV. SIMULATION RESULTS
Fig. 9 shows the simulation results when the PWM modechanges from the asynchronous PWM to the proposed control.
Figs. 9 (b) and (c) are the enlarged waveform of the output
voltage and current around the change point of each control.
The simulation circuit conditions are as follows: the input
voltage of 200 V, the input frequency fin of 50 Hz, the output
frequency fout of 1432 Hz and an R-L load of 12.5 Ω, 1 mH.
In the asynchronous PWM, the voltage transfer ratio isalways set to 0.8. From 20 ms, the transfer control isapplied. In the link control, the modulation index linearly
increases from 0.8 to 0.955 until 70 ms. At 70 ms, the PWM
mode is completely changed to the proposed synchronous
control.
In Fig. 9 (b), at 20 ms, the input and output current haveno rush current when the PWM mode had changed.
Likewise, in Fig. 9 (c), the output current is smoothly
changing without large distortion at 70 ms. These simulation
results confirm that the transition control smoothly movefrom the asynchronous PWM to the proposed synchronous
control.

V. EXPERIMENTAL RESULTS
In order to evaluate the proposed control strategy, an
experimental equipment has built. The experimental circuit
conditions were set as follows: the input voltage of 200 V, theinput frequency fin of 50 Hz, the output frequency fout of 1432
Hz and the R-L load of 12.5 Ω, 1 mH which is the active
power of 1.9 kW, the load power factor of 0.8. The cut-off
frequency of the input filter is 1 kHz with the damping factorof 0.2.
Fig. 10 shows the experimental results using thesynchronous PWM control without a consideration of beatcurrent. A sinusoidal waveform is not obtained for the input
current because the input current is not controlled. The beatcurrent of low frequency components is included in the
output current.
Fig. 10(b) shows the enlarged waveforms of Fig. 10(a).
The negative and positive parts of the output voltage are notbalanced. Thus, the output current is an asymmetricalcurrent. In addition, the output current waveforms in eachperiod are different shapes.
Fig. 10(c) shows the harmonic analysis of the input currentof Fig 10(a). The input current includes the 5th harmoniccomponent of more than 10 % to the fundamental component,
and the 7th, 11th and 13th harmonics components of morethan 3 %. In addition, the 3rd and 6th harmonics components,
which are not theoretically components in three-phase system,
are included more than 1 % in the input current so that theasymmetrical waveform among three phases will be
generated.

Input voltage
0250[V/div]
Input current
0
10[A/div]
Output voltage
0500[V/div]
Output current
0
10[A/div]

Time scale 10[msec/div](a) Operation waveforms with the synchronous PWM control
for a 3-level inverter.
Output voltage
0250[V/div]

Output current
0
10[A/div]
Asynchronos
20
PWM

The proposed
control

The link control

Input phasevoltage0100 [V/div]
Input line
current
5 [A/div]

Fundamental
frequency
100 %

0

10 %

Output line-line
voltage0100 [V/div]
Output line
current
5 [A/div]

Time scale 400[⎠ sec/div](b) Enlarged output voltage and current waveforms of (a).

6th
5th
7th

6th

Horizontal axis
250[Hz/div]

13th
11th

Vertical axis
10[dB/div]

19th
17th

3rd

1%
0
0

10

30

50

70

[msec](a) Simulated under condition from an asynchronous PWM to the
proposed control.
The link control

Asynchronos PWM(c) Harmonic analysis of the input current.

Output line-line
voltage0100 [V/div]
Output line
current
5 [A/div]

Fundamental
frequency
100 %

0
17.5

fout ? 6 fin [Hz]fout ? 12 fin [Hz]

18

19

20

21

22

[msec](b) Enlarged waveform of the outputs around 20 msec.

Horizontal axis
500[Hz/div]

2 fout ? 3 fin [Hz]2 fout + 3 fin [Hz]fout + 6 fin [Hz]Vertical axis
20[dB/div]

1%

The proposed control

The link control
Output line-line
voltage0100 [V/div]
Output line
current
0
5 [A/div]
67.5

68

69

70

71

72

(c) Enlarged waveform of the outputs around 70 msec.
Fig. 9. Simulation results.

[msec](d) Harmonic analysis of the output current.
Fig. 10. Experimental results with synchronous PWM
for a 3-level inverter.

Input current THD [%]Input current
10[A/div] 0
Output voltage
500[V/div] 0
Output current
10[A/div] 0

4

系列1

60

60

3

3

系列2

Low frequency component

40

40

20

2

2

1

20

1

Input current THD

Low frequency component [%]

4

80

80

Input voltage
250[V/div] 0Time scale 10[msec/div](a) Operation waveforms with the proposed PWM.

0

0

400
400

Output voltage
250[V/div] 0

600
600

800
800

1000
1000

0
1200
1400
1600
Output frequency [Hz]
0

1200

1400

1600

Fig. 12. Output frequency characteristics with the proposed control
method.
(Input current THD and low frequency component of the output
current)

Output current
10[A/div] 0Time scale 400[° sec/div](b)

Enlarged output voltage and current waveforms of (a).
Fundamental
frequency
100 %
7th
5th

10 %

Horizontal axis
250[Hz/div]

19th
13th
11th
17th

Vertical axis
10[dB/div]

3rd1%(c) Harmonic analysis of the input current.
Horizontal axis
500[Hz/div]

Fundamental
frequency
2 fout ? 3 fin [Hz]100 %fout ? 6 fin [Hz]fout + 6 fin [Hz]2 fout + 3 fin [Hz]Vertical axis
20[dB/div]

1%(d) Harmonic analysis of the output current.
Fig. 11. Experimental results with the proposed control method.

Fig. 10(d) shows the harmonic analysis of the output
current of Fig. 10(a). The beat current components, such as
fout-6fin and fout-12fin are included more than 4 % and 1 %.
The harmonics components of 2fout±3fin are included
approximately 10 % in the output current.
Fig. 11(a) shows the operation waveforms with theproposed synchronous method. The experimental circuit
conditions are the same as in Fig. 10. A sinusoidal waveform
and input unity power factor are obtained for the input current.
The input current has some cyclic distortions, because thepulse pattern is drastically changed at every π/6. In addition,a beat current is not included in the output current.
Fig. 11(b) shows the enlarged waveforms of Fig. 11(a).
The negative and positive parts of the output voltage
waveform are balanced.
The sinusoidal waveform isobtained for the output current due to the inductive load.
Fig. 11(c) shows the harmonic analysis of the input currentof Fig. 11(a). Harmonic components, which are more than
3% of fundamental frequency, such as the 5th, 7th, 11th, 13th
harmonics, and so on, are included in the input current. By
improving the pulse pattern at every π/6, the harmoniccomponents will be reduced.
Fig. 11(d) shows the harmonic analysis of the output
current of Fig. 11(a). The beat current component, such as
fout-6fin, is suppressed to less than 1%. Harmonics of higher
frequency than the fundamental frequency, such as 2fout±3fin
and fout±6fout, are also suppressed to approximately 1%. The
validity of this method for beatless current and unity power
factor control was confirmed by the experimental results.
Fig. 12 shows the output frequency characteristics with theproposed control method. In the figure, the left axis is the
input current THD, the right axis is the low frequency
component of the output current. The input current and thelow frequency component are in almost inverse proportion tothe output frequency. The input current and the low
frequency component decrease dramatically when less than
700 Hz. The low frequency component is less than 2 % for
more than 700 Hz. The input current THD of 7.7 % isachieved at 1432 Hz.
VI. CONCLUSIONS
A new synchronous PWM control strategy, based on athree-level inverter, has been proposed. The proposed
control strategy consists of beatless current control and input
power factor control. A maximum voltage transfer ratio of
0.955 was obtained in the proposed method where theconventional one is 0.866. The transfer control, whichsmoothly changes the PWM mode from the asynchronousPWM to the proposed synchronous control, was proposed.
The simulation results confirm that the transfer control
suppress the rush current at the boundary points. Additionally,
the experimental results confirm the basic operation of the
proposed control method as follows.
1) The input current is controlled as a sinusoidal waveformwith a unity power factor for a high frequency output of morethan 1 kHz.
2) The beat current component, which has lower frequency
than the fundamental frequency, was suppressed to less than
1% using the beatless current control, and in addition, a unity
power factor was obtained for the input side.
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