AD6973D Datasheet

Zhuhai Jieli Technology Co.,LTD
Version：2.1
Date：2020.10.12

Copyright © Zhuhai Jieli Technology Co.,LTD. All rights reserved.

1Confidential
The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without
prior written permission of JIELI.

AD6973D Datasheet

AD6973D Features
V5.1+BR+EDR+BLE specification
Meet class1 class2 and class3 transmitting
power requirement
Support GFSK and π/4 DQPSK all packettypes
Provides amaximum+8dbm transmitting
powerreceiver with -94dBm sensitivity
Fast AGC for enhanced dynamic range
Supports
a2dp\avctp\avdtp\avrcp\hfp\spp\smp\att\gap
gatt\rfcomm\sdp\l2cap profile
a2dp 1.3\avctp 1.4\avdtp 1.3\ avrcp 1.5\
hfp 1.5 \spp 1.0\rfcomm 1.2\pnp 1.3\
hid 1.0\sdp core4.2\l2cap core 4.2

CPU
32-bit DSP supports hardware Float PointUnit(FPU)
Up to 160MHz programmable processor
64Vectored interrupts
4 Levels interrupt priority

DSP Audio Processing
SBC, AAC Audio decodes supported for BTaudiomSBC voice codec supported for BT phone
Supports MP2, MP3, WMA, APE, FLAC,AAC, MP4, M4A, WAV, AIF, AIFC audio
decoding
Packet Loss Concealment (PLC) for voiceprocessing
Acoustic echo cancellation/suppression(AEC,AES)
Single/Dual MIC Environmental Noise
Cancellation (ENC)
Multi-band DRC limiter
20-band EQ configuration for voice Effects

Peripherals
One full speed USB 2.0 OTG controller
Six multi-function 32-bit timers, support
capture and PWM mode
Three full-duplex basic UART, support
DMA mode
One hardware IIC interface supports hostand device mode
Two Built-in low power Cap Sense Keys
Built-in Cap Sense Key controller
10-bit ADC for analog samplingExternal wake up/interrupt on all GPIOs

Audio Codec
Two channels 24-bit DAC, SNR >= 101dB
Two channels 24-bit ADC , SNR >= 92dB
Sampling rates of
8KHz/11.025KHz/16KHz/22.05KHz/
24KHz/32KHz/44.1KHz/48KHz aresupported
One analog MIC amplifier, build-in MIC
bias generator
Supports two PDM digital MIC inputs
One channel Stereo analog MUXSupports cap-less, single-ended, anddifferential mode at the DAC path
Supports 16ohm and 32ohm Speakerloading

PMU
Low voltage LDO and DC-DC for internal
digital and analog circuit supply
2uA current consumption in the soft-offmode
Built-in LDO and DC-DC for the core, I/O,
Bluetooth and flash
VBAT is 2.2V to 4.5V
VDDIO is 2.2V to 3.4V

Bluetooth

Packages

Compliant with Bluetooth

QFN20(3mm*3mm)
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The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without
prior written permission of JIELI.

AD6973D Datasheet

Storage temperature: -65℃ to +150℃

Temperature
Operating temperature: -40℃to+85℃

Applications
Bluetooth TWS Headset

2
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prior written permission of JIELI.

AD6973D Datasheet

1、Pin Definition
1.1

Pin Assignment

Figure 1-1 AD6973D Package Diagram

2
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prior written permission of JIELI.

AD6973D Datasheet

1.2

Pin Description
Table 1-1 AD6973D Pin Description

PIN

NameNO.

I/O

DriveType(mA)

Function

Other Function

1VCOM

P/

DAC reference voltage

2

VDDIO

P/

IO Power 3.3v

PB8

I/O

8/24

MIC1：MIC1 Input Channel；
GPIO

UART0RXB：Uart0 Data Input(B)；
CAP4：Timer4 Capture；3

UART1RXA：Uart1 Data Input(A)；
PB6

I/O

8/24

PWM2：Timer2 PWM Output；

GPIO

ADC9：ADC Input Channel 9；
Touch7：Touch Input Channel 7;

4

PGNDP/5SWP/

6VBATP/

DCDC Ground
DCDC output

DCDC switch output, connected to inductor
connect to battery
Charge Power Input;
UART0TXC：Uart0 Data Output(C);7

LDO_INP/

UART0RXC：Uart0 Data Input(C);PWM3：Timer3 PWM Output；
CAP1：Timer1 Capture;

8

BT_AVDDP/

BT Power
UART2RXC：Uart2 Data Input(C);SPI2DOC：SPI2 Data Out(C);

9

PB2

I/O

8/24

GPIO

CAP5：Timer5 Capture;
ADC7：ADC Input Channel 7；
LP_TH1：Low Power Touch Channel 1Long Press Reset；

10PB1

I/O

8/24

SPI2CLKC：SPI2 Clk(C);GPIO

UART2TXC：Uart2 Data Output(C)(pull up)

ADC6：ADC Input Channel 6；
LP_TH0：Low Power Touch Channel 0

11

BT_RF//BT Antenna

12

BT_OSCII/

BTOSC In13

BT_OSCOO/BTOSC OutIIC_SCL_C：IIC SCL(C)；

14

PC2

I/O

8/24

UART0TXD：Uart0 Data Output(D);TMR1：Timer1 Clock Input;

3
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AD6973D Datasheet

UART1RXD：Uart1 Data Input(D)；
USBDM

I/O

4

USB Negative Data

IIC_SDA_A：IIC SDA(A)；ADC11：ADC Input Channel 11；
UART1TXD：Uart1 Data Output(D)；

15

USBDP

I/O

4

USB Positive Data

IIC_SCL_A：IIC SCL(A)；
ADC10：ADC Input Channel 10；

PC0

I/O

8GPIO

PA1

I/O

8/24

GPIO

UART1TXB：Uart1 Data Output(B);
MIC0：MIC0 Input Channel ;16

PWM0：Timer0 PWM Output；
UART1TXC：Uart1 Data Output(C)；17

MIC_LDO

P/MIC Power18

DACRO/DAC Right Channel

19DACLO/

DAC Left Channel

20

DACVSSP/

Analog Ground4Confidential
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AD6973D Datasheet

2、Electrical Characteristics
2.1

Absolute Maximum Ratings
Table 2-1

SymbolParameter

MinMaxUnit

TambAmbient Temperature

-40

+85°C

Tstg

Storage temperature-65+150°C

VBATSupply Voltage

-0.3

4.5

V

LDO_IN

Charger Voltage

-0.3

6V

V3.3IO

3.3V IO Input Voltage

-0.3

3.6

V

Note : The chip can be damaged by any stress in excess of the absolute maximum ratings listed below

2.2

PMU Characteristics
Table 2-2SymbolParameter

Min

TypMaxUnit

Test Conditions

VBAT

Voltage Input

2.2

3.7

4.2

V

Voltage

4.5

5.0

5.5

V

Voltage output

_3.0

_V

VBAT = 4.2V, 10mA loading

Loading current__100mAVDDIO=3V@VBAT = 4.2V

Voltage output

_1.3

_V

VDDIO=3.0V, 10mA loading

Loading current__60mA

BT_AVDD=1.25V@VDDIO=3.0v5mA

VDDIO=3V@VBAT = 4.2V

Charger supply
LDO_IN
Normal modeVDDIOBT_AVDDLP modeVDDIO

2.3Loading current

Battery Charge
Table 2-3Symbol
LDO_IN

Parameter
Charge Input
Voltage

MinTypMax

Unit

Test Conditions

4.5

5

5.5

V

_4.2

4.25

V

_200mA

Charge current at fast charge mode

VCharge

Charge Voltage

4.15

ICharge

Charge Current

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AD6973D Datasheet

Trickle Charge

ITrikl20Current

2.4

4570mA

VBAT<VTrikl

IO Input/Output Electrical Logical Characteristics
Table 2-4

IO input characteristics
SymbolParameter

Min

TypMaxUnit

Test Conditions

VIL

Low-Level Input
Voltage-0.3_0.3* VDDIOV

VDDIO = 3.3V

VIH

High-Level Input
Voltage

0.7*
VDDIO

_VDDIO+0.3

V

VDDIO = 3.3V

IO output characteristics
VOL

Low-Level Output
Voltage__0.33V

VDDIO = 3.3V

VOH

High-Level Output
Voltage

2.7__V

VDDIO = 3.3V2.5

Internal Resistor Characteristics
Table 2-5

PortGeneral
OutputHigh
Drive

Internal
Pull-Up
Resistor

Internal
Pull-Down
Resistor

PA1,
PB1,PB2,PB6,PB8,
PC28mA

24mA

10K

10K

PC08mA

-10K

10K

USBDP

4mA

_1.5K

15K

USBDM

4mA

_180K

15K

2.6

Comment

1、PB1 default pull up
2、USBDM & USBDP default pull
down
3、internal pull-up/pull-downresistance | accuracy ±20%

DAC Characteristics
Table 2-6
Parameter

Min

Typ

Max

Unit

Frequency Response

20

_20K

Hz

THD+N

_-80

_dB

1KHz/0dB

S/N

_101

_dB

10Kohm loading

Crosstalk_-80_dB

With A-Weighted Filter

Output Swing

0.45

Vrms

Dynamic Range

90dB

Test Conditions

1KHz/-60dB
10Kohm loading

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AD6973D Datasheet

With A-Weighted Filter
DAC Output Power

2.7

_4_mW

32ohm loading

MaxUnit

Test Conditions

dB

1KHz/-60dB

ADC Characteristics
Table 2-7Parameter

Min

Typ

Dynamic Range

80S/N_92_dB

THD+N

_-75

_dB

Crosstalk_-80_dB

TypMaxUnit

RF Transmit Power

68dBm

RF Power Control Range

20dB

20dB Bandwidth950

KHz+2MHz-40dBm

Adjacent Channel-2MHz-38

dBm

Transmit Power+3MHz-44

dBm-3MHz-35

dBm

2.8

1KHz/-60dB

BT Characteristics

2.8.1 Transmitter
Basic Data Rate

Table 2-8

Parameter

Min

Enhanced Data Rate

Test Conditions

25℃,
Power Supply
VBAT=5V2441MHz

Table 2-9

Parameter

Min

TypRelative PowerMax

Unit

Test Conditions-1dB

DEVM RMS

6%

DEVM 99%

10%DEVM Peak15%

Power Supply+2MHz-40

dBm

VBAT=5V

Adjacent Channel-2MHz-38

dBm

2441MHzTransmit Power+3MHz-44dBm-3MHz-35dBm

π/4 DQPSK
Modulation Accuracy

25℃,

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AD6973D Datasheet

2.8.2

Receiver
Table 2-10

Basic Data RateParameterMinTypMax

Unit

Test Conditions

Sensitivity

-94

dBm

Co-channel Interference Rejection-13dB+1MHz+5dB-1MHz+2dB

Power Supply

Adjacent Channel+2MHz+37dB

VBAT=5V

Interference Rejection-2MHz+36dB

2441MHz+3MHz+40dB-3MHz+35dB

Enhanced Data Rate25℃,

Table 2-11Parameter

MinTypMax

Unit

Test Conditions

Sensitivity

-94

dBm

Co-channel Interference Rejection-13dB+1MHz+5dB-1MHz+2dB

Power Supply

Adjacent Channel+2MHz+37dB

VBAT=5V

Interference Rejection-2MHz+36dB

2441MHz+3MHz+40dB-3MHz+35dB

25℃,

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The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without
prior written permission of JIELI.

AD6973D Datasheet

3、 Package Information
3.1

QFN20_3.0x3.0

Figure 3-1 AD6973D Package

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The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without
prior written permission of JIELI.

AD6973D Datasheet

4、Revision History
Date

Revision

Description

2020.08.18

V2.0

Initial Release2020.10.12

V2.1

Update PMU characteristics
Add Bluetooth profiles version number10
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The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without
prior written permission of JIELI.