EIAJ ED-5006A
Standard of Japan Electronics & Information Technology Industries Association

1.0V±0.1V (normal range) and 0.7V to 1.1V(wide range)
Power supply voltage and interface standard for
non-terminated digital integrated circuits
1.

Interface Standard

1.1 Purpose
To provide this standard of specification for uniformity, multiplicity of sources, elimination of confusion,and ease of device specification and design by users.
1.2 ScopeThis standard defines power supply voltage ranges, DC interface parameters for a family of
non-terminated digital circuits operating from a power supply of 1.0V and driving/driven by parts of thesame family, or mixed families which comply with the input/output interface specifications.
The specifications in this standard represent a minimum set or "base line" set of interfaces for
CMOS-compatible circuits.
2.

Standard specifications
All voltages listed are referenced to ground except where noted.

2.1 Absolute maximum continuous ratings
Table 1 Absolute maximum continuous ratings
Parameter

SymbolPower supply voltage

VDD

DC input voltage

VIN

Test condition

excluding I/O pins

Note 1Rating

Unit-0.4~1.4

V-0.4~VDD+0.4(£1.4 max)

V

Note 2
DC output voltage

VOUT

including I/O pins

-0.4~VDD+0.4(£1.4 max)

V

Note 2
DC input current

IIN

VIN<0V or V IN>VDD±20mA

DC output current

IOUT

VOUT<0V or VOUT>VDD±20mA

Storage temperature range

TSTG

Note 3°C

Note 1:Absolute maximum ratings indicate the values beyond which damage to the device may occur.
Exposure to these conditions or conditions beyond thereof may adversely affect device reliability.
Even within the ratings above, no functional operation is guaranteed if the device is not operated
under recommended operating conditions.
Note 2:The maximum voltage allowed between any two signal (input, output or input/output) pins or anysignal pin and VDD must be less than 1.6V.
Note 3:To be specified by manufacturers.

EIAJ ED-5006A
2.2 Recommended operating conditions
2.2.1 Normal range
Table 2 Normal range
Parameter

SymbolOperating range

UnitPower supply voltage

VDD

0.9~1.1

V

Operating temperature range

TaNote 4°C

SymbolOperating range

UnitPower supply voltage

VDD

0.7~1.1

VOperating temperature range

Ta

Note 5°C

Note 4:To be specified by manufacturers.
2.2.2

Wide range
Table 3Parameter

Wide range

Note 5:To be specified by manufacturers.
2.3 DC specifications
All specifications in the following tables apply across the operating temperature range.
2.3.1 Normal range
Table 4 Normal range Note 6 and 7
Parameter

SymbolTest condition

MinMax

Unit

0.9

1.1

V

Power supply voltage

VDD

High-level input voltage

VIH

VOUT³VOH (min)0.65 VDD

VDD +0.2

V

Low-level input voltage

VIL

VOUT£V OL (max)-0.20.35 VDD

VHigh-level output voltage

VOH

IOH=-2mA

0.75VDD

Low-level output voltage

VOL

IOL= 2mA

V
0.25 VDD

V

Note 6:VDD of the sending and receiving devices must track within 0.1V to maintain adequate
DC margins.
Note 7:For VIH and V IL, VDD refers to the receiving device. For VOH and VOL, VDD refers to thesending device.
2.3.2

Wide range
Table 5Parameter

Wide range Note 8 and 9Symbol

Test condition

MinMax

Unit

0.7

1.1

VPower supply voltage

VDD

High-level input voltage

VIH

VOUT³VOH (min)0.7 VDD

VDD+0.2

V

Low-level input voltage

VIL

VOUT£VOL (max)-0.2

0.3 VDDV

High-level output voltage

VOH

IOH=-100μA

VDD-0.1

Low-level output voltage

VOL

IOL= 100μA

V
0.1

V

Note 8:VDD of the sending and receiving devices must track within 0.1V to maintain adequate DCmargins.
Note 9:For VIH and V IL, VDD refers to the receiving device. For VOH and VOL, VDD refers to thesending device.

EIAJ ED-5006A

2.4 Optional DC electrical characteristics for Schmitt trigger operation
All specifications in the following tables apply across the operating temperature range.

2.4.1 Optional Schmitt trigger operation - Normal range
Table 6 Normal range

Note 10 and 11SymbolParameter

Test Condition

MIN

MAX

Unit

VDD

Supply Voltage---0.9

1.1

V

VOUT≧VOH (min)0.4VDD

0.7VDDV

VOUT≦VOL (max)

0.3VDD

0.6VDDV

Ｖｔ+ （Ｖｐ ）Ｖｔ- （Ｖn ）Positive Going Threshold
Voltage
Negative Going Threshold
Voltage

VH (⊿Ｖｔ)

Hysteresis Voltage

Vt+ - Vt-

0.1VDD

0.4VDDV

VOH

Output High Voltage

I OH= -2mA

0.75VDD―VVOL

Output Low Voltage

IOL=―

0.25VDD

V

2mA

Note 10: VDD of the sending and receiving devices must track within 0.1 V to maintain adequate dc margins.
Note 11: For Vt+ (Vp) and Vt- (Vn), VDD refers to the receiving device. For VOH and VOL, VDD refers to thesending device.

2.4.2 Optional Schmitt trigger operation - Wide range
Table 7 Wide range

Note 12 and 13

SymbolParameter

Test Condition

MINMAX

Unit

VDD

Supply Voltage---0.7

1.1V

VOUT≧VOH (min)0.35VD

0.75VDDV

VOUT≦VOL (max)

0.25VDD

0.65VDDVＶｔ+ （Ｖｐ ）Ｖｔ- （Ｖn ）Positive Going Threshold
Voltage
Negative Going Threshold
Voltage

VH (⊿Ｖｔ)

Hysteresis Voltage

Vt+ - Vt-0.1VDD

0.5VDDV

VOH

Output High Voltage

IOH= -100μA

VDD-0.1―VVOL

Output Low Voltage

I OL= 100μA

―0.1

V

Note 12: VDD of the sending and receiving devices must track within 0.1 V to maintain adequate dc margins.
Note 13: For Vt+ (Vp) and Vt- (Vn), VDD refers to the receiving device. For VOH and VOL, VDD refers to thesending device.

EIAJ ED-5006A3 Test conditions
3.1 Positive Going Threshold Voltage : Vt+ (Vp)
Input signal is raised from a grand level in the measurement circuit shown in Fig. 1 , and the input
voltage value of which output logic changed is determined as Vt+ (Vp).
3.2 Negative Going Threshold Voltage : Vt- (Vn)
Input signal is dropped from a power supply voltage level in the measurement circuit shown in Fig.
1 , and the input voltage value of which output logic changed is determined as Vt- (Vn).

Fig. 1 DC characteristic measurement circuit of Schmitt-trigger input

EIAJ ED-5006A

Explanatory note1.

Purpose of establishment
This standard is established to achieve a high speed and a low voltage operation of digital integratedcircuits. This standard defines power supply voltage ranges, DC interface parameters for a family of
non-terminated digital circuits operating from a power supply of 1.0V and driving/driven by parts of thesame family, or mixed families which comply with the input/output interface specifications.

2.

Review of discussion history
Discussion on 1.0V standard was started by Low Voltage IC Operation Sub-committee of JEITA(JapanElectronics & Information Technology Industries Association), hereinafter called JEITA/LVSC, in August
2000. JEITA/LVSC submitted its proposed 1.0V standard to JEDEC JC-16 (Low Voltage & High Speed
Interface Sub-committee) in U.S.A, hereinafter called JEDEC, in December 2000, for the first time.
JEDEC’s discussion on 1.0V standard was begun by this proposal. The 1.0V task-group was organized
by JEITA/LVSC and JEDEC at the JEDEC meeting in June 2001. It made the proposal of unified 1.0V
standard that reflected the proposal of JEITA/LVSC and JEDEC, respectively and submitted to JEDEC.
Finally, the proposal of unified 1.0V standard was approved at the JEDEC meeting in September 2001.
Based on the result of JEDEC meeting, JEITA’s standard of 1.0V power supply voltage was finalized inFebruary 2002. This standard consists of normal range for high speed operation and wide range for low
power consumption operation, taking in consideration of 0.1μm class IC. Figures of these standards
shall be identical to those of JEDEC in order to deliver unified symbols for all the existing JEITAstandards.
After standardizing the dc standard, discussion on Schmitt trigger input standard was started by JEITA /LVSC in February 2003. JEITA/LVSC submitted its proposed Schmitt trigger input standard to JEDEC
in March 2004, for the first time. JEDEC’s discussion on Schmitt trigger input standard was begun bythis proposal. The task-group was organized by JEITA / LVSC and JEDEC at the JEDEC meeting inJune 2004. It has decided that the proposal of Schmitt trigger standard to be added into existing dcstandard. Finally, the proposal of Schmitt trigger input standard was approved at the JEDEC meeting inDecember 2004. Based on the result of JEDEC meeting, JEITA’s revised standard of 1.0V power
supply voltage was revised as ED-5006A in May 2005.

3.

History of JEITA’s standard of power supply voltage
JEDEC JC-16 in U.S.A, has committed to establish international standard of power supply voltage fordigital integrated circuits as a leader of the industry. Low Voltage IC Operation Sub-committee, which
was founded in 1992 as one of sub-committees of EIAJ (Electronic Industries Association of Japan) andpresently belongs to JEITA, has cooperated with JEDEC and communicated mutually since its
foundation.
Power supply voltage of digital integrated circuits that had been related to the technology trend ofequipment using IC and of circuits design and process technology, was changed twice, big so far.
First big change was occurred in early 90’s and power supply voltage was transferred from 5V that had
been kept for a long time, to 3V. In 90’s, high speed and low power consumption IC was required basedon the background that performance of desktop and portable equipment of the information andcommunication field had been growing rapidly. To reduce the power supply voltage was necessary toEIAJ ED-5006A
satisfy both reliability and high-performance of IC. From 3.3V standard in 1994 to 1.2V standard in 2001,
many power supply voltage standards that consist of normal range for regulated operation and wide
range for battery operation were established.
Second big change was occurred at the begging of 21 century simultaneously and generation of sub-1V
power supply voltage started by the begging of a more highly speed and capacity equipment according
to broadband and of sub-0.1μm process technology. In this sub-1V power supply voltage IC, a breakthrough of issue for small amplitude interface between IC and for Vt fluctuation control of small transistor
is very important. New concept for the standard of power supply voltage will be required which different
from the generation of the first big change.
4.

Members of discussion
This standard was discussed and determined by the IC Low Voltage Operation Sub-committee, which
belongs to the Group on Integrated Circuits of Technical Standardization Committee on Semiconductor
Devices.
The members are as listed below.

＜Technical Standardization Committee on Semiconductor Devices＞
ChairmanHisao Kasuga

NEC Corp.

＜Group on Integrated Circuits＞
ChairmanHisao Kasuga

NEC Corp.

＜IC Low Voltage Operation Sub-Committee＞
Chairman

Haruyoshi Takaoka

Fujitsu Ltd.

Vice-chairman

Kohji Hosokawa

IBM Japan, Ltd.

MemberMasahiro Kurimoto

Oki Electric Industry Co.,Ltd.

Hidemitsu Baba

SANYO Electric Co.,Ltd.

Koji Inoue

Sharp Corp.

Akira Nakada

Seiko Epson Corp.

Mitsuo Soneta

Sony Corp.

Masanori Kinugasa

Toshiba Corp.

Takashi Akioka

Renesas Corp.

Takefumi Yoshikawa

Matsushita Electric Industrial Co.,Ltd.

Akitoshi Watanabe

Rohm Co.,Ltd.

Kazuo Yamaguchi

TOSHIBA LSI System Support Corp.

Osamu Uno

Fujitsu VLSI Ltd.

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