QSFP28 Series
HDLR4-QSF-LC.S10
Single-Mode 100GBASE-LR4 QSFP28 Transceiver
Single-Mode OTU4 4I1-9D1F QSFP28 Transceiver
RoHS CompliantFeatures
Supports 103Gbps and 112Gbps

Single 3.3V Power Supply and Power dissipation< 4WUp to 10km over SMF

RoHS-6 compliant (lead-free)Commercial case temperature range of

0°C to 70°C

Four 25Gbps/28Gbps DML LAN-WDM channels

Applications
100GBASE-LR4 100G Ethernet
OTU4 4I1-9D1F

on transmitter side

PIN and TIA array on the receiver side



4x25G/28G electrical interface

Duplex LC receptacles

I2C interface with integrated Digital DiagnosticMonitoringSafety Certification: TUV/UL/FDA*Note*RoHS CompliantOrdering Information
Part No.

DataRate

Fiber

HDLR4-QSF-LC.S10 *(note1) 112Gbps

SMFDistance*(note2)
10kmInterface

Temp.

DDMILC

0℃~+70℃

Yes

Note*: For the latest certification information, please check with Data
Controls Inc.. Note1: also support 103Gbps
Note2: Over SMF*The product image only for reference purpose.
Data Control Inc.
Page 1 of 8V1.dQSFP28 Series
Product Description
Data Controls Inc.’s HDLR4-QSF-LC.S10 QSFP28 transceiver module is designed for 112
Gigabit Ethernet links over 10Km single mode fiber. It is compliant with IEEE 802.3ba
100GBASE-LR4 and OTU4. Digital diagnostics functions are available via an I2C interface, as
specified by the QSFP+ MSA.

Absolute Maximum Ratings
Parameter

Symbol

Min.

Max.

Unit

Storage Temperature

Ts-40

+85°C

Supply Voltage

Vcc

-0.5

3.6V

Operating Relative Humidity

RH585%

Receiver Damage Threshold, per Lane

Rxdmg

5.5dBm*Exceeding any one of these values may destroy the device immediately.

Recommended Operating Conditions
Parameter

SymbolMin.

Operating Case Temperature

Tc0Power Supply Voltage

Vcc

3.135

Power DissipationPD

Typical
3.3

Electrical Characteristics
Parameter

SymbolMin. Typ.
Transmitter

Differential data input swing
per lane
Input Impedance(Differential)

ZinMax

Unit

900

mvp-p

10%

Notes

Stressed input parameters

Eye width

0.46

UI

IEEE 802.3bm Table

Applied pk-pk sinusoidal jitter

88-13

Eye height95

DC common mode voltage-350

mv2850

mv

900

mvp-p

10%

ReceiverDifferential output amplitude

200

Output Impedance(Differential)

Zout

Output Rise/Fall Time

tr/tf

12ps

Eye width

0.57

UI

Eye height differential

228mv

Vertical eye closure

5.5
Data Control Inc.
Page 2 of 8

20%~80%db
V1.dMax.

Unit

70°C

3.465

V4W

QSFP28 Series
Optical Characteristics
100GBASE-LR4 Operation
Parameter

SymbolMin.

TypicalMax.

Unit

Transmitter
Signaling Speed per Lane

BRAVE

Data Rate Variation

25.78
-100

Gbps
+100ppm

Lane_0 Center Wavelength

λC01294.531295.56

1296.59nm

Lane_1 Center Wavelength

λC11299.021300.051301.09nm

Lane_2 Center Wavelength

λC21303.541304.581305.63

nm

Lane_3 Center Wavelength

λC31308.09

1309.141310.19nm

Total Average Output PowerPo10.5dBm

Average Launch Power eachLane*(Note3)

Peach-4.3

4.5

dBm

Optical Modulation Amplitude(OMA) each Lane

TxOMA

-1.3

4.5

dBm

5dB

Difference in launch power
between any two lanes (OMA)
Launch power in OMA minus
TDP, each lane

-2.3

dBm

Transmitter and dispersion
penalty (TDP), each lane

2.2

dB

Extinction Ratio

ER4dB

Side-mode Suppression ratio

SMSRmin

30dB

Average launch power of OFF
transmitter per lane-30dBm

-130

dB/hz

Transmitter Reflectance-12dB

Optical Return Loss Tolerance

20dB

Transmitter eye mask
definition {X1, X2, X3, Y1, Y2,Y3}*(Note4){0.25, 0.4, 0.45, 0.25, 0.28, 0.4}

Relative Intensity Noise

RIN

ReceiverSignaling Speed per Lane

BRAVE

Data Rate Variation

25.78
-100

Gbps
+100ppm

Damage threshold

Rdam

4.5

Lane_0 Center Wavelength

λC01294.531295.56

1296.59nm

Lane_1 Center Wavelength

λC11299.021300.051301.09nm

Lane_2 Center Wavelength

λC21303.54

1304.581305.63nm

Lane_3 Center Wavelength

λC31308.09

1309.141310.19nm

Average Receive Power perLane*(Note5)

Rxpow

-10.6

4.5

dBm

Receive Power (OMA) perRxOMA

4.5dBmData Control Inc.
Page 3 of 8dBm

V1.dQSFP28 Series
Lane
Receive Sensitivity in OMA
per LaneRxsens

Receiver 3 dB electrical upper
cutoff frequency, per lane

-8.6dBm

31

GHz

Stressed Receiver Sensitivity(OMA) per Lane*(Note6)

RXSRS

-6.8

dBm

Optical Return Loss

ORL-26dB

LOS Assert

LOSA

LOS De-Assert

LOSD-25dBm-12

LOS HysteresisdBm

0.5dBConditions of stressed receiver sensitivity test
Vertical eye closure
penalty*(Note7)

VECP

1.8dB

Stressed eye J2 Jitter*(Note7)

J2

0.3

UI

Stressed eye J9 Jitter*(Note7)

J90.47UI

Note3: Average launch power, each lane (min) is informative and not the principal indicator of signal strength. A
transmitter with launch power below this value cannot be compliant; however, a value above this does not ensurecompliance.
Note4: Hit ratio 5x10-5.
Note5: Average receive power, each lane (min) is informative and not the principal indicator of signal strength. A
received power below this value cannot be compliant; however, a value above this does not ensure compliance.
Note6: Measured with conformance test signal at TP3 for BER = 10–12.
Note7: Vertical eye closure penalty, stressed eye J2 Jitter, and stressed eye J9 Jitter are test conditions formeasuring stressed receiver sensitivity. They are not characteristics of the receiver.

OTU4 4I1-9D1F Operation
Parameter

SymbolMin.

TypicalMax.

UnitTransmitter
Signaling Speed per Lane

BRAVE

Data Rate Variation

27.95-20Gbps+20ppmLane_0 Center Wavelength

λC01294.53

1295.56

1296.59nm

Lane_1 Center Wavelength

λC11299.02

1300.051301.09nm

Lane_2 Center Wavelength

λC21303.54

1304.581305.63nm

Lane_3 Center Wavelength

λC31308.09

1309.141310.19nm

Total Average Output PowerPo10dBm

Average Launch Power per Lane

Peach4dBm

5dB

-0.6

Maximum channel power difference
Channel spacing

800

Maximum spectral excursion
Side Mode Suppression Ratio

-184
SMSR
ER
Data Control Inc.
Page 4 of 8184

GHz30

Optical Return Loss Tolerance
Extinction Ratio

GHz4dB
20dB

6.5dB
V1.dQSFP28 Series
Transmitter eye mask definition {X1,X2, X3, Y1, Y2, Y3}{0.25, 0.4, 0.45, 0.25, 0.28, 0.4}
ReceiverSignaling Speed per Lane

BRAVE

Data Rate Variation

27.95
-20

Gbps
+20ppmdBm

Damage threshold（per lane）

Rdam

4.5

Lane_0 Center Wavelength

λC01294.531295.56

1296.59nm

Lane_1 Center Wavelength

λC11299.021300.051301.09nm

Lane_2 Center Wavelength

λC21303.541304.581305.63nm

Lane_3 Center Wavelength

λC31308.091309.141310.19nm

Average Receive Power per Lane

Rpow-6.94dBm

Equivalent Receive Sensitivity per
Lane*(Note8)

Pmin

-8.4

dBm

Maximum channel power difference

5.5

dB

Maximum optical path penalty

1.5

dB

-26

dB

Optical Return LossORL

LOS Assert

LOSA

LOS De-Assert

LOSD

LOS Hysteresis

-25

dBm
-11.6

dBm

0.5

dB

Note8: Specified at a BER of 1E-6, with a 231-1 PRBS.

QSFP28 Transceiver Electrical Pad Layout

Data Control Inc.
Page 5 of 8

V1.d

QSFP28 Series
Pin Arrangement and Definition
PinLogic

1

SymbolDescription

Plug
Sequence

Notes
1GND

Ground12

CML-I

Tx2nTransmitter Inverted Data Input

33CML-I

Tx2p

Transmitter Non-Inverted Data Input

3GNDGround

145CML-I

Tx4nTransmitter Inverted Data Input

36CML-I

Tx4p

Transmitter Non-Inverted Data Input

3GND

Ground178

LVTTL-I

ModSelL

Module Select39

LVTTL-I

ResetL

Module Reset

3VccRx+3.3V Power Supply Receiver

21011

LVCMOS- I/O

SCL

2-wire serial interface clock

312LVCMOS- I/O

SDA

2-wire serial interface data

3GND

Ground11314CML-O

Rx3p

Receiver Non-Inverted Data Output

315CML-O

Rx3n

Receiver Inverted Data Output

3GND

Ground1161121117CML-O

Rx1p

Receiver Non-Inverted Data Output

318CML-O

Rx1n

Receiver Inverted Data Output

319

GND

Ground1120

GND

Ground

1121

CML-O

Rx2n

Receiver Inverted Data Output

322

CML-O

Rx2p

Receiver Non-Inverted Data Output

3GND

Ground

12324

CML-O

Rx4n

Receiver Inverted Data Output

325

CML-O

Rx4p

Receiver Non-Inverted Data Output

3GND

Ground1261127

LVTTL-OModPrsL

Module Present

328

LVTTL-OIntLInterrupt

329VccTx+3.3V Power supply transmitter

2230

Vcc1+3.3V Power supply

22LPModeLow Power Mode

3GND

Ground131

LVTTL-I

3233

CML-I

Tx3p

Transmitter Non-Inverted Data Input

334

CML-I

Tx3n

Transmitter Inverted Data Input

3GND

Ground

13536

CML-I

Tx1p

Transmitter Non-Inverted Data Input

337

CML-I

Tx1n

Transmitter Inverted Data Input

3GND

Ground138

Data Control Inc.
Page 6 of 8111V1.dQSFP28 Series
1: GND is the symbol for signal and supply (power) common for the QSFP28 module. All are common
within the QSFP28 module and all module voltages are referenced to this potential unless otherwise
noted. Connect these directly to the host board signal-common ground plane.
2: Vcc Rx, Vcc1 and Vcc Tx are the receiver and transmitter power supplies and shall be applied
concurrently. Requirements defined for the host side of the Host Edge Card Connector are listed inTable 6. Recommended host board power supply filtering is shown in Figures 3 and 4. Vcc Rx Vcc1and Vcc Tx may be internally connected within the QSFP28 Module in any combination. The
connector pins are each rated for a maximum current of 500mA.

Mechanical Specifications*This 2D drawing only for reference, please check with Data Controls Inc. before ordering.

Obtaining Document
You can visit our website: http://www.dci.jp
Or contact Data Controls Inc. Listed at the end of the documentation to get the latest documents.

Revision History
Revision

Revision History

Release Date

V1.aPreliminary.

June 24, 2016

V1.b

Update OTU4 4I1-9D1F Operation

Oct 26, 2017

V1.c

Update regulatory compliance and mechanical specifications.

V1.d

Update power dissipation description and features.

Data Control Inc.
Page 7 of 8

August 27, 2018
Dec 14, 2018

V1.d

QSFP28 Series
Notice:Data Controls Inc. reserves the right to make changes or discontinue any optical link product orservice identified in this publication, without notice, in order to improve design and/orperformance. Applications that are described herein for any of the optical link products are forillustrative purposes only. Data Controls Inc. makes no representation or warranty that suchapplications will be suitable for the specified use without further testing or modification.

Contact:
Data Controls Inc.
E-mail:info@dci.jp URL: http://www.dci.jp

Data Control Inc.
Page 8 of 8V1.d