Power semiconductor device: Basics
Ichiro Omura
Kyushu Institute of Technology
Japan
IEEE EDS
Webinar Dec. 2, 2015
Since
1909
Ichiro Omura Kyushu Inst. Tech.

Outline• Introduction– History– Power electronics circuit• Power semiconductor devices– Power MOSFET / Super-junction MOSFET– IGBT– Thyristors– Lateral devices• Future possibility• Related technology
Ichiro Omura Kyushu Inst. Tech.

1965 - "Moore's Law"
Silicon Engine to drive ICT
Manufacturing cost percomponent

Gordon E. Moore

CMOS

Number of components
per integrated circuit

Integrated circuit patent in 1959

Robert Noyce

To digital cost free => ICT for everybody
Ichiro Omura Kyushu Inst. Tech.

AC power distribution systemtransm.web.fc2.com
www.cz-toshiba.com

AC to AC
Constant frequency
No active control function
Ichiro Omura Kyushu Inst. Tech.

100 years of power device development (High voltage)
1940

1960

Rotary converter

Mercury arc rectifier(AC-DC)

Thyristor/GTO(AC-DC/DC-AC)

Electronics(Vacum Tubes)

Neutron doped FZ wafer

Carrier Injection Enhancement

Carrier lifetime control

Edge termination technology(AC-DC)Electric Machine

mm

1980

2000

R&D

Semiconductor
Technology

R&D

Chip Parallel operation
Cosmic ray SEU
Thin wafer technology

Advanced LSI Tech.
(CMOS, DRAM)

0.1mm
Photos:Nippon inst. tech, Museum
NikkeiTokyu Museum
JR Kyushu
Nagahama Railway Museum
Toshiba

IGBT(AC-DC/DC-AC, MOS gate)

10-100um
IGBT
Insulated Gate
Bipolar Transistor

Ichiro Omura Kyushu Inst. Tech.

<1-10umPWM: Pulse Width Modulation
Modulation wave

Carrier wave

PWM

Modulated signal to Power
Semiconductor switch (ON/OFF)
IGBT

Motor

AC

PDS: Power Drive System

1. PWM signal control power semiconductors switch (ON / OFF)
2. Motor current follows the modulation wave
Ichiro Omura Kyushu Inst. Tech.

Hybrid electric vehicle propulsion system
Half-bridge boost~500V
converter

Inverter for motor

Inverter for generator

Battery

~200V

IGBT
Power Diode
Motor

Total chip area for IGBT
and power diode is morethan 40 cm2 of siliconwafer for Toyota Prius[*].
Z. Shen and I. Omura. Proceeding of the IEEE, Vol.
95 No. 4, 2007.(Figure)*A. Kawahashi et al., Proc. of ISPSD 2004, pp. 23-29,
2004.
Ichiro Omura Kyushu Inst. Tech.

RC

Generator
S

C
R

ICE
to Wheels

Ring gear
Carrier/Planetary gear
Sun gearPower Semiconductor Devices

Ichiro Omura Kyushu Inst. Tech.

Power Semiconductor Devices
Vertical device
High

LTT

GCT/GTOGTO

GCT

MOS-gate

Bipolar gate

System Power

Opt- turn-on

LTT

1GW

IGBT

IGBT
1kW

Power
MOSFETPower MOS

IGBT: Insulated Gate Bipolar Transistor
GTO: Gate Turn-off Thyristor
GCT: Gate Commutated Turn-off Thyristor
LTT: Light Triggered Thyrisotor (optical fiber coupled)

Low• MOS gate devices cover wide-power range.
• Bipolar gate devices cover very high power applications(>10MW).
Ichiro Omura Kyushu Inst. Tech.

Photos:InfineonToshiba
ABB
TMEIC

Types of power semiconductors(Switch)
IGBT

Power MOSFET
N-source

SourcePN

P-wellMOS control+
UnipolarN-drift

N-sub

N-source

Gate

Gate

P

P-baseN-

MOS control+
BipolarN-

N-baseP

P-emitter

N+

EmitterCollector

Drain

Thyristors (GTO,GCT)
Gate
P-base

IGBT: Insulated Gate Bipolar Transistor
GTO: Gate Turn-off Thyristor
GCT: Gate Commutated Turn-off Thyristor

CathodeN

N-emitterP

N-baseN-

Current control+
BipolarP

P-emitter
Anode

1. MOS-gate (voltage) control or bipolar gate (current) control
2. Unipolar conduction or bipolar conduction in high resistive layer(N-)
Ichiro Omura Kyushu Inst. Tech.

Electric Current

Voltage

Remark: Vertical Device Structure
Cross section of active area

Top view
Activearea

Edge termination area
Cell

Ichiro Omura Kyushu Inst. Tech.

Power MOSFET
Opt- turn-on

High

LTT
GCT/GTOGTO

GCT

MOS-gate

Bipolar gate

System Power

LTT

1GW

IGBT

IGBT
1kW

Power
MOSFETPower MOS

Low

Ichiro Omura Kyushu Inst. Tech.

Photos:InfineonToshiba
ABB
TMEIC

Power MOSFET
N-source

SourceGate

SourceP-wellGate

N-drift

Current

Drain
DC to DC Converter

N-sub

CPU=LoadHigh Side MOSFET

Drain

Inductor
Imput Voltate
CPU-chipSync. Rect. MOSFET
Output Capacitor

Conduction carrier…… Electron or hole
Switching control ……. MOS-gate
Switching Freq. ………. High
Ichiro Omura Kyushu Inst. Tech.

De-coupling Capacitor

Function of N-drift layern+Function of N-drift layer:
1. Voltage blocking (higher breakdown voltage)
2. Current conduction (lower resistivity)

Voltage Blocking

p

S

G

n-drift

Conduction
D

SourceSourcedonor

electron

Ey

Ey

LdriftChargeneutrality

Ed

Drain
(VB)
Blocking state (Poisson eq.)

dE y

Ed
qN D   dy
LdriftIchiro Omura Kyushu Inst. Tech.

Drain

Econd

Conduction state (current eq.)

Vcond
J n  q n N D Econd  q n N D
Ldriftn: electron mobility

Drift layer doping, length and drift layer resistance
LdriftyEcrit

Ichiro Omura Kyushu Inst. Tech.

1
VB  Ecrit  Ldrift
2
EcritqN D   
LdriftEcrit: critical E-field strength

Drift layer doping

Drift layer length2
Ecrit
ND   
2qVB

Ldrift 

Critical Electric Field for Silicon (Ecrit)

Ey

X105 V/cm
3.0
2.5
2.0
1.5
ｐ

1.0
Ecrit

5.0
0.0

1012
1013
1014
1015
N-drift Donor Concentration (/cm3)

2VB
Ecrit

Vcond
J n  q n N D
Ldrift2
4
V
B
Drift layer resistance R

drift
3
[Wcm2]
 n Ecritｎ-

1000mW

100mW
RON

10mW

1mW
0.1mW
10V

100V

1kV

10kV

Low Voltage MOSFET (Vertical)
Gate

SourceFig from Lecture Slide by
W. Saito, Toshiba

N-source
P-wellN-drift layer

1000

RonA (mWcm2）

Si-limit
1997

100

2002
10
1

2007
2012
Drain

0.1
10

100
1000
Breakdown voltage (V)

1. Cell size reduction for channel density
2. Trench gate for channel density and JFET resistance removal
3. Charge compensate (Vertical Field Plate) technology for drift
resistance reduction.
Ichiro Omura Kyushu Inst. Tech.

Super Junction MOSFET
1000

Fig from Lecture Slide by
W. Saito, Toshiba

DMOSFET

1997

100

2002
10
1
0.1
10

2007
2012

SJ-MOSFET
100
1000
Breakdown voltage (V)P/N column drift layer
Easy to deplete for high impurity concentration
Low Ron + High Breakdown Voltage

Charge compensate (Super Junction) technology
for drift resistance reduction.

On-resistance RonA(mWcm2)

RonA (mWcm2）

Si-limit

25

g

in

20

m

15

r

he

n

p
do

lu
co

ig

10

H

5
VB=700V
00

Ichiro Omura Kyushu Inst. Tech.

5

10

15

20

25

P/N column pitch (m)30

Column doping(ND) and Breakdown Voltage(VB)
1. Horizontal field for P/N column depletiondE x
2 EholqN D   dx
Wcolumn

Ex

Ehol
Ey

SourceEx
VB

Wcolumn

Ey

3. A half area of drift layer contributecurrent conductionJn 1q n N D Econd2

Wcolumn
Drain

Vertical
field

Evert
VB  Evert  Ldrift
2.Vertical field for voltage blocking
between drain and source

Electric field in SuperJunction structure  high drift layer donor doping
1. Horizontal electric field for depletion of PN junction in narrow columns
Ichiro Omura Kyushu Inst. Tech.
2. Vertical electric field for sustain
blocking voltage across drift layer

Drift layer doping, length and drift layer resistance
2 EholqN D   
Wcolumn

Ehol 

VB  Evert  Ldrift

Evert 

Ecrit
2

Ehol

2

Ecrit
2

Drift N-column
doping2 EcritND   
qWcolumn

Drift layer length

2 VB
Ldrif 
Ecrit

Ecrit

|E|<Ecrit

Ecrit

2

Evert
Horizontal field

Ex

Ehol
Ey

sourceVcond
11
J n  q n N D Econd  q n N D
2
2
LdriftDrift layer resistance[Wcm2]

2VB  Wcolomn
Rdrift 2 n Ecrit

Assumption: N-column and P-column
aresameKyushu
width Inst. Tech.
IchiroOmura

VB

Wcolumn
Drain

Evert
VB

IGBT
Insulated Gate Bipolar Transistor
Opt- turn-on

High

LTT
GCT/GTOGTO

GCT

MOS-gate

Bipolar gate

System Power

LTT

1GW

IGBT

IGBT
1kW

Power
MOSFETPower MOS

Low

Ichiro Omura Kyushu Inst. Tech.

Photos:InfineonToshiba
ABB
TMEIC

IGBT
Emitter

Ic

Rated Current Density(A/cm2)

500
Gate

Collector

Shen, Omura, “Power Semiconductor Devices for Hybrid,
Electric, and Fuel Cell Vehicles” Proc. Of the IEEE, Issue 4, 2007

300 Carrier enhancement effect200

Non latch-up IGBT

Vce

Protection
Thermal management
Thin wafer PT

Noise control

100
IPM

Trench gate

NPT-IGBT

50
1985

0.8V

High Temp.

Thin wafer NPT

1990

1995

2000

2005

Year

1. Bipolar Transistor + MOSFET (before IE-effect)
2. High current capability
3. ~0.8V collector-emitter threshold voltage for conduction
4. Medium switching speed (15kHz for motor drive, 100kHz for ICT
current supply and FPDIchiro
driverOmura )Kyushu Inst. Tech.

2010

2015

Operation mechanism of IGBT
Conduction modulation in N-baseIonized impurity (donor)

E0

Unipolarpositive negatived E q ( N D  n)  0dx

pn  ni2 p  n

Electron

Conduction
modulation

E0

Hole

E0

d E
 q ( N D  p  n)  0dx

E0pn  ni2 e
N D  p, n

N-source

Gate

EmitterP

P-baseN-baseN
N-baseP-emitter

P
Collector

ni  p  n

PN-junction built-in
potential

Conduction modulation
1. Both hole and electron contribute to current
conduction
2. High stored carrier density in N-base (>1016cm-3)
3. Built-in voltage with the stored carrier
Ichiro Omura Kyushu Inst. Tech.

q( p n )
kT

IGBT

Ic

MOSFET

0.8V

Vce

Punch-through IGBT (PT-IGBT)
N-source
P-baseEpitaxial layer
with carrier
lifetime control

Emitter

Electric field at Stored Carrier
blocking state during on-state

Gate
N-baseN-buffer
P-emitter

High minority carrier(hole) injection efficiency

Low resistanceP-type Substrate

Collector

1. Epi grown N-buffer (field stop) andshort / lightly doped N-base
2. High minority (hole) carrier
injection from P-emitter
3. Low-conduction loss and large
switching loss
4. Carrier lifetime control (high energy
electron irradiation etc.) required

Ichiro Omura Kyushu Inst. Tech.

Non-Punch-through IGBT (NPT-IGBT)
N-source
P-baseEmitter

Electric Field at Stored Carrier
blocking state
during on-state

Gate

Neutrontransmutation
doped wafer

N-baseLow minority carrier(hole) injection efficiency
Shallow P-emitter

Collector

Neutron transmutation doping
M. Tanenbaum and A. D. Mills J. Electrochem. Soc., vol. 108, pp.171 1961
J. Cornu and R. Sittig IEEE Trans. Electron Devices, vol. ED-22, pp.108 1975
IAEA-TECDOC-1681, Neutron Transmutation Doping of Silicon at Research Reactors,
2012
Ichiro Omura Kyushu Inst. Tech.

1. NTD wafer without N-buffer
2. Low minority (hole) carrier
injection from P-emitter
3. Higher-conduction loss andlower switching loss
4. No carrier lifetime control
requiredThin wafer IGBT technology
EmitterN-source
P-baseElectric field at Stored Carrier
blocking state during on-state

Gate

NTD waferetc.

N-baseN-buffer

Shallow P-emitter

Collector
PT

NPT

Thin-wafer-PT

N-base length

Short

Long

Short

P-emitter hole
injection
Carrier lifetimein N-base

High

Low

Low

Short

Long

Long

Thin Wafer Technology-Reduction of turn-off tail current with short N-base-Reduction of conduction loss with short N-base

Low Hole Injection P-emitter with long carrier lifetime-Reduction of turn-off tail current with low hole injection-Better thermal coefficient without carrier lifetime control
Ichiro Omura Kyushu Inst. Tech.

=FS-IGBTProblem in High Voltage IGBT Device Design
Gate

N-source

EmitterP-baseStored Carrier during
on-state

Electroncurrent

High conduction resistancefor high voltage IGBT

Hole current

Carrier storage

N-basePemitterN-buffer

Collector

Ichiro Omura Kyushu Inst. Tech.

Electron Injection Enhancement Effect
Gate

EmitterN-source

P-baseStored Carrier
during on-stateElectroncurrent
Hole current

PemitterN-buffer

Carrier storage

N-baseKitagawa et al. “A 4500 V injection enhanced insulated gate bipolartransistor (IEGT) operating in a mode similar to a thyristor,” IEDM’93,
1993.
Omura et al. “Carrier injection enhancement effect of high voltage MOS
devices-device physics and design concept,” ISPSD 97, pp. 217-220,
1997.
Omura, “High Voltage MOS Device Design: Injection Enhancement and
Negative Gate Capacitance, (ETH thesis 2000), Series in
Microelectronics Vol. 150, Hartung-Gorre Verlag, 2005.

Collector

Trench gate technology with special structure enhances majority carrier (electron)
Ichiro Omura
Kyushu Inst.
injection in N-base  Low conduction
loss underhighTech.
current density

Summary of IGBT Technology•Trench Gate
–Conduction loss reduction with electron injection enhancement–Channel resistance, JFET resistance reduction•Low Injection P-emitter + Long Carrier
Lifetime– Turn-off loss reduction with low hole storagein N-base– Better thermal coefficient without carrier
lifetime control•Thin Wafer Technology– Both conduction and turn-off loss reduction with
with short N-base
Ichiro Omura Kyushu Inst. Tech.

N-baseP-emitter

Gate

Conduction and Breakdown Voltage
Voltage blocking
GateE-field

Emitter(flat carrier distribution is assumed)

Electron

Ey

Floating P

hole

n

E-fieldp

HoleElectroncurrent current

PemitterN-bufferp  n  nstored

Collector

N-base lengthStored Carrier
densityN-base conduction
resistance

VB
VB
2 Ln base 
Ecrit
Ecrit

nstoredEy
Charge neutrality

N-baseConduction

PN-junction built-in
potential

kT nstroed
Vbuilt in  2
ln
q
ni
IGBT

1 ~ 2 VB
RN base q(  n   p )  nstored  Ecrit
Ichiro Omura Kyushu Inst. Tech.

Ic
MOSFET

0.8V

Vce

DMOSFET.

SJ-MOSFET

IGBT
Gate

Emitter

Floating P

N-baseDevice Structure

HoleElectroncurrent current

PemitterN-buffer

Collector

Drift Layer Doping(Stored carrier density)

Drift Layer Length(N-base length)2
Ecrit
ND   
2qVB

Ldrif 2VB
Ecrit

Drift Layer Resistance
4VB2(N-base conduction
Rdrift 
3resistance) n Ecrit

PN-junction
built-in potential

600V class device

2 EcritND   
qWcolumn

Ldrif 

2 VB
Ecrit

nstored(>1016cm-3)

Ln base 1 ~ 2VBEcrit

1 ~ 2 VB
2VB Wcolomn R
Rdrift N base2q (  n   p )  nstored  Ecrit n Ecritnone
80-100 mWcm2

none<10 mWcm2
Assumption: N-column and Pcolumn are same width

Vbuilt in  2

kT nstoredlnqni~1.5V at 200A/cm2(flat carrier stored carrier
distribution is assumed

Ichiroof
Omura
Kyushu Inst.
Tech. 2007. IWPSD 2007, pp. 781 – 786, 2007
Omura et. al, International Workshop on Physics
Semiconductor
Devices,DMOSFET.

SJ-MOSFET

IGBT
Gate

Emitter

Floating P

Device Structure

N-baseHole
Electroncurrent current

PemitterN-buffer

Collector

V-I
characteristics

ID

RON  Rdrift
VDS

RN baseID

RON  Rdrift
VDS

Ic

Vbuilt inVce

Switching
charge (turn-off
charge)Charge in main-junction
capacitancePN-column depletion
chargeStored carrier sweep out

Ichiroof
Omura
Kyushu Inst.
Tech. 2007. IWPSD 2007, pp. 781 – 786, 2007
Omura et. al, International Workshop on Physics
Semiconductor
Devices,

Types of Power Semiconductors
Opt- turn-on

High

LTT
GCT/GTOGTO

GCT

MOS-gate

Bipolar gate

System Power

LTT

1GW

IGBT

IGBT
1kW

Power
MOSFETPower MOS

Low

Ichiro Omura Kyushu Inst. Tech.

Photos:InfineonToshiba
ABB
TMEIC

Light Triggered Thyristor(LTT)
Photos: http://dbnst.nii.ac.jp/

N-emitter

P-emitter
P-baseCathodeAnodeImpurity
concentration

N-baseStored carrier concentration
under current conduction

1.4GW system by Toshiba

Forward Conduction
blocking

Reverseblocking

1.
2.
3.
4.
5.
6.

PNPN structureLight triggered turn-on
Cannot turn-off by gate
One wafer per one device
Pressure contact package
Highest power per single semiconductor

Trigger pulse
Ichiro Omura Kyushu Inst. Tech.

GCT: Gate Commutated Turn-off Thyristor
Gate drive current

1.
2.
3.
4.
5.

PNPN structure
One wafer per one device> 100um cell size
Pressure contact package
Very low stray inductance
integrated gate driver forcouple of kA gate current
6. Highest power per single
semiconductor turn-off device
ABB GTO(GCT)ABB
5.5kV, 5kA HPT IGCT
Integrated gate circuit

ABB

Ichiro Omura Kyushu Inst. Tech.

Lateral Devices
Control and Power = Power IC
Motor DriverCollector

Emitter
Oxide

BOX

~1kV
Substrate

Toshiba
SourceAudio Speaker Driver<100V

Trypath datasheet

Ichiro Omura Kyushu Inst. Tech.

P n+

Gate
n-driftDrainn+

RESURF principle for breakdown voltage design
Breakdown at verticalPN-junction

Low dose N-drift
Drain

Gate

N+

N+

N-driftP

N+

PGND
Electric
field

Figure J. A. Appels
High dose N-drift
et al. IEDM1979, pp.
238- 241, 1979 Source
Drain

Breakdown voltage

SourceGate
N+
N-drift
P
P-

Breakdownnear N+Ex

Medium dose N-drift
SourceN+

Breakdownnear P

GND
Electricfield

ExN-drift Dose

Drain

Gate

Ey

N-driftP

N+

P-

N-drift dose (atm/cm2) is the key parameterfor breakdown voltage design (~1e12/cm2)

GND
Electricfield

Ex

Ichiro Omura Kyushu Inst. Tech.

EyLateral “Super Junction” MOSFET
SourceGate

X2 amount ofconduction carriers

Drain

Gate

Oxide

P-buried

Oxide

P-buriedNP-buriedP-substrateN
D. Disney et al. A new 600V lateral PMOS device witha buried conduction layer, pp.41-44, ISPSD’ 03

P-substrate

SOI IGBT
Nbase

Emitter

Ey

Oxide

BOX

Substrate

GND
Ichiro Omura Kyushu Inst. Tech.

Future Power ICs
Power IC VBK in ISPSD papers

Future HV Power IC will be …

Digital Rich
Power IC
Transmissions
High power motor
drives

10000

er s
ic
w PI
m
Po / Prahce o r
ig
H
th t
a
i
w ul
er
M Ins
w
IP
po iP
d S
de er
ol w
m Po Ber / Csf e s Pnan vic o
B
Tr de
PC
on

DIP IPMHEV IPM
Industrial IPM

100

er

On board Power SupplysIC

Max(Vin, Vout)

Appliancesw
Po

Voltage（V）

es
ul
od

1000

M

High power
Industrial Drives
EV/HEVSOI single chip inverter

Vicor VIChip

10

Kilowatt
Power ICCPU Power Supply
(POL)

w
Po

Mobile Power Supply

erSingle chip power supply

So
C

1
0.1

1

10

100

1000

Current（A）

Omura, ECPE workshop Jan. 2012

Max(Iin, Iout)

Ichiro Omura Kyushu Inst. Tech.

Omura, CIPS 2010

Future Possibility

Ichiro Omura Kyushu Inst. Tech.

Advanced power devices Road map
DiamondWide band-gap semiconductor
Platform (SiC::2010 ～、GaN::2015 ～Diamond::2025～）

FET/ BJT/PiN/Field
emitter

SiC

Hybrid pair platform of Si-switching
device and SiC diode (2013～2035）

SiC

IGBT/PiN

MOS/SIT/SBD

Silicon platform (～2030）

GaN
HEMT/MOS/SBD
GaAs-FET
Si-IGBT

SiC-SBD, SiC-PiN
Power
Power
Integrated
Si-MOS(SJ)
Integrated
Circuit area SiC-SBD
Circuit area
Silicon
IGBT, Thyristor/PiN

Silicon
CMOS, MOSFET (SJ)/SBD, PiN
1

10

100

1k

Blocking voltage [v]10k

H. Ohashi et al. “Role of Simulation Technology for the Progress in Power Devices and Their Applications,” IEEE
Ichiro Omura Kyushu Inst. Tech.
T-ED, Vol. 60, issue 2, 2013.

Future possibility• 1) Si-power devices still have much room for development toward ultimate
MOSFETs and IGBTs.
• 2) The combination of Si-switching devices and SiC freewheeling diodes will
be a significant step not only for strengthening the SiC market but also for Sidevice development.
• 3) Si-IGBT will be replaced by SiC MOSFET in the voltage range of more than
1000 V in some applications, and SiC-IGBT has the potential to be used for
applications of more than 10 kV. (Si-IGBT for volume market, SiC for high end
market)• 4) GaN power devices will replace some of Si-power ICs and will be used forfaster switching applications.
• 5) The unique properties of diamond have potential for new power devices
particularly in high-voltage applications.
• 6) The ultimate CMOS has the potential to be used for power integrated
devices in ICT applications.
H Ohashi, I Omura - IEEE transactions on electron devices, 2013
Ichiro Omura Kyushu Inst. Tech.

Related Technology

Ichiro Omura Kyushu Inst. Tech.

Examples of High Power IGBT Package

42 Chips

125mm
15mm

Ichiro Omura Kyushu Inst. Tech.
Shen, Omura, “Power Semiconductor Devices for Hybrid, Electric, and Fuel Cell Vehicles” Proc. Of the IEEE, Issue 4, 2007

Wafer technology(Silicon)
Productivity
300mm, CZ, MCZ
1200V IGBT
1200V PiN diodeLarge Market, Short time to market

Low voltage commodity

Material (wafer) engineering will share the major
Lowfabrication
voltage highand
specpart of total power device design,
PE application
High voltage power MOS

6500V PiN diode6500V IGBT
Thyrisotrs

Special Power Devices

Quality
Smaller Market, Long termLong carrier lifetime
150-200mm FZ

Functionality
Integration, Game change

Ichiro Omura Kyushu Inst. Tech.

Epi, SOI, SJ-structure etc(Pre-structured wafer)Power electronics and micro electronics
forming Cyber-Physical System
GeneratingHigh speed
Service
Actuatingcommunication
Lighting
Cloud
Heating
Internet
DigitalEnergyCooling
SNS
E-Storage network
network IoT, Industrie 4.0

Powerelectronics
Legacy PowerElectronics

Power
Circuit,Control
Power
Semi.

Software,Sensing,
Protocol
LSI,
Adv. CMOS

Microelectronics

Networking

Clustering

Legacy MicroElectronics

Integrating
Integration

Hardware Electron devices are the key technology for future energy networking
 New phase of electronics has started with close link between power
and micro electronics for future sustainable society
I. Omura, SIIQ report, Oct. 2012, in Japanese

Ichiro Omura Kyushu Inst. Tech.

See also
Z. John Shen, Ichiro Omura
Article Power Semiconductor Devices for Hybrid, Electric, and Fuel
Cell Vehicles
Proceedings of the IEEE 05/2007; 95(4-95):778 - 789.
H. Ohashi and I. Omura “Role of Simulation Technology for the
Progress in Power Devices and Their Applications,” IEEE T-ED, Vol.
60, issue 2, 2013.

Ichiro Omura Kyushu Inst. Tech.