Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT5110-KMC
DC-40Gbps D-Type Flip-Flop

88% clock phase margin for retiming of data input eyeFully differential CML input interfaces

Fully differential CML output interface with 400mV single-ended swingSingle +3.3V or -3.3V power supplyPower consumption: 300mW

Fabricated in SiGe for high performance, yield, and reliability

Custom CQFP 24-pin packagevee

4ps set-up/hold time capability

vcc

vcc

Exhibits low jitter and limited temperature variation over industrial temperature range

vcc

vcc

High speed broadband D-Type Flip-Flop for data retiming with full rate clock

vcc

vee

vcc

vcc

dp

qp

ASNT5110
ASNT5111

vcc

vcc

dn

qnvcc

vcc

Rev. 3.0.2

1vcc

cn

vcc

cp

vcc

vee

vee

July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

DESCRIPTION

5050DFFcoredp
dnqpqn50505050cpcnFig. 1. Functional Block Diagram

The temperature stable ASNT5110-KMC SiGe IC provides broadband data retiming functionality and isintended for use in high-speed measurement / test equipment. The IC shown in Fig. 1 can sample a highspeed data signal dp/dn with a full-rate external clock cp/cn to create a full-rate retimed NRZ data output
qp/qn.
The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be useddifferentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLYCONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply
with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, theinput termination provides the required common mode voltage automatically. The differential DC
signaling mode is recommended for optimal performance.

POWER SUPPLY CONFIGURATION
The part can operate with either negative supply (vcc = 0.0V = ground and vee = −3.3V), or positivesupply (vcc = +3.3V and vee = 0.0V = ground). In case of the positive supply, all I/Os need ACtermination when connected to any devices with 50Ohm termination to ground. Different PCB layouts
will be needed for each different power supply combination.

All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V.
Rev. 3.0.2

2July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ABSOLUTE MAXIMUM RATINGS
Caution: Exceeding the absolute maximum ratings shown in Table 1 may cause damage to this productand/or lead to reduced reliability. Functional performance is specified over the recommended operating
conditions for power supply and temperature only. AC and DC device characteristics at or beyond theabsolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced toground.
Table 1. Absolute Maximum Ratings

Parameter
Supply Voltage (vee)Power Consumption
RF Input Voltage Swing (SE)
Case Temperature
Storage Temperature
Operational Humidity
Storage Humidity

Min-401010Max-3.60.33
1.0+90+1009898Units
VW
VºC
ºC%%

TERMINAL FUNCTIONSTERMINAL
NameNo.
Typedpdncp
cpqpqnHigh-Speed I/Os
Differential high-speed data inputs with internal SE 50Ohm
termination to vcc.
Differential high-speed clock inputs with internal SE 50Ohm
termination to vcc.
Differential high-speed data outputs with internal SE 50Ohm
termination to vcc. Require external SE 50Ohm termination to vcc.
Supply and Termination Voltages
Description
Pin Number
Positive power supply.
2, 4, 6, 8, 10, 12, 14, 15, 16, 17, 18, 20, 22, 24(+3.3V or 0)2123
35119Namevcc
veeRev. 3.0.2

DESCRIPTION

CMLinput
CML
input
CML
outputNegative power supply. (0Vor -3.3V)

1, 7, 13, 193July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ELECTRICAL CHARACTERISTICSPARAMETERMIN

TYP MAX UNIT
COMMENTS
General Parametersvee-3.1-3.3-3.5
V
±6%
vcc
0.0V
External ground
Ivee
90mA
Power consumption
300mWJunction temperature -40
25125°C
HS Input Data (dp/dn)
Data Rate
DC40Gbps
Swing
0.050.8
V
Differential or SE, p-p
CM Voltage Level
vcc-0.8
vcc
VMust match for both inputs
HS Input Clock (cp/cn)
Frequency
DC40
GHz
Swing
0.050.8
V
Differential or SE, p-p
CM Voltage Level
vcc-0.8
vcc
VMust match for both inputs
Clock Phase Margin
86
8890%
HS Output Data (qp/qn)
Data Rate
DC40 Gbps
Logic “1” level
Vvcc
Logic “0” levelvcc-0.4
VWith external 50Ohm DC terminationRise/Fall times
12
ps
20%-80%
Output Jitter
2.5
ps
Peak-to-peak

PACKAGE INFORMATIONThe chip die is housed in a custom 24-pin CQFP package shown in Fig. 2. Even though the package
provides a center heat slug located on the back side of the package to be used for heat dissipation,
ADSANTEC does NOT recommend for this section to be soldered to the board. If the customer wishes
to solder it, it should be connected to the vcc plain that is ground for the negative supply or power for thepositive supply.
The part’s identification label is ASNT5110-KMC. The first 8 characters of the name before the dashidentify the bare die including general circuit family, fabrication technology, specific circuit type, and partversion while the 3 characters after the dash represent the package’s manufacturer, type, and pin outcount.
The IC complies with the Restriction of Hazardous Substances (RoHS) per EU 2002/95/EC for all 6substances.
Rev. 3.0.2

4July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

Fig. 2. CQFP 24-Pin Package Drawing (All Dimensions in mm)

Rev. 3.0.2

5July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

REVISION HISTORY
Revision
3.0.2
3.0.1

Date
07-2019
02-20132.0
1.003-2009
02-2008

Rev. 3.0.2

Changes
Updated Letterhead
Revised title
Added package pin out drawing
Revised functional block diagram
Revised description
Added power supply configuration
Added absolute maximum ratings
Revised terminal functions
Revised electrical characteristics
Added package information and mechanical drawing
Format correction
Revised electrical characteristics
First release

6

July 2019