Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT6162-KMM
DC-17GHz Linear Non-Blocking Cross-Switch 2x2

Temperature-stabilized differential gain of approximately 0dB

1dB compression point of 0dBm

DC-to-1GHz broadband channel selector ports

Low jitter and limited temperature variation over industrial temperature range

Single +4.5V or -4.5V power supplyPower consumption: 1260mW

Fabricated in SiGe for high performance, yield, and reliabilityCustom CQFP 44-pin package

vcc
vee
vcc
n/c
vcc
sel1
vcc

vcc
q0p
vcc
q0n

ASNT6162-KMM

sel0
vcc
n/c
vcc

vcc
q1p
vcc

1

gncrl0vcc
gncrl1
vcc

vcc
d1n
vcc

q1n
vcc
n/c
vcc

vcc
vee
vcc
d1p
Rev. 1.3.2

veevccTwo differential CML-type input ports and two differential CML-type output ports

vcc
gncrl2
vcc

d0n
vcc
d0p
vcc
vn1p3

DC to 17GHz broadband operationvcc

July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

DESCRIPTION
gncrl
0/1/250d0pd0n505050

q0pq0n5050
d1pd1n50

q1pq1n50

sel0
sel10Fig. 1. Functional Block Diagram

The temperature stable ASNT6162-KMM linear non-blocking cross-switch 2x2 is intended for use inhigh-speed systems. The IC shown in Fig. 1 can deliver two different broad-band analog differential
signals d0p/d0n and d1p/d1n to two differential outputs q0p/q0n and q1p/q1n with a nominal gain of0dB. The gain can be fine-tuned using the 3-pin control port gncrl0/1/2 with accuracy of 0.5dB as shownin Table 1.
Table 1. Gain Control

gncrl2 gncrl1 gncrl0 Gain, dB Comments
000-1.000
1-0.5
010-0.501
10default state
1000.5
10
1
0.5
1
10
1.0
1111.0
The assignment of inputs to outputs is performed through the external high-speed dual port sel1/sel2 thatis referenced to vcc. The assignment logic is shown in Table 2.
Table 2. Channel Selection

sel1 sel0 Input connected to q0 Input connected to q1 Comments00d0d0default state01d1d0
10d0d111d1d1
Rev. 1.3.22July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

The part’s I/Os support the CML-type interface with on chip 50Ohm termination to vcc, and may be useddifferentially, AC/DC coupled, single-ended, or in any combination (also see POWER SUPPLYCONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply
with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, theinput termination provides the required common mode voltage automatically. The differential DC
signaling mode is recommended for optimal performance. In particular, the specified output commonmode voltage level is guaranteed only in case of external single-ended 50Ohm DC termination to vcc.

POWER SUPPLY CONFIGURATIONThe part can operate with either a negative supply (vcc = 0.0V = ground), or a positive supply (vee =0.0V = ground). In case of a positive supply, all I/Os need AC termination when connected to any devices
with 50Ohm termination to ground. In any case, the input common mode voltage level is shifted downfrom vcc by a certain voltage of ΔVICM as specified in ELECTRICAL CHARACTERISTICS. To have theinput common mode voltage equal to ground, a floating negative supply scheme detailed in Fig. 2 should
be used.
For the best performance, the external 50Ohm terminations for the outputs should be connected to vcc,
but not to ground!
The part features an additional internal supply voltage vn1p3 that is also accessible through thecorresponding pin. This pin is recommended to be left not connected but can be also used for adjustmentof the output eye by applying an external voltage source within the range specified in ELECTRICAL
CHARACTERISTICS. The external supply should be able to both source and sink a current of about
1mA.
Different PCB layouts will be needed for each different power supply combination.
PSU1ΔVICM

PSU2vcc

GND
Value specified
in Electrical
Characteristics

veea.

PSU1- G +PSU2- G +GND vccveeb.

Fig. 2. Floating Negative Supply Scheme: Potential Diagram (a) and Schematic (b)All the characteristics detailed below assume vcc = 0.0V = ground.

ABSOLUTE MAXIMUM RATINGS
Caution: Exceeding the absolute maximum ratings shown in Table 3 may cause damage to this productand/or lead to reduced reliability. Functional performance is specified over the recommended operating
conditions for power supply and temperature only. AC and DC device characteristics at or beyond theRev. 1.3.2
3July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

absolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced toground (assumed vcc).
Table 3. Absolute Maximum Ratings

Parameter
Supply Voltage (vee)Power Consumption
RF Input Voltage Swing (SE)
Case Temperature
Storage Temperature
Operational Humidity
Storage Humidity

Min-401010Max-5.5
1.5
1.0+90+1009898UnitsVW
VºCºC%%TERMINAL FUNCTIONTERMINALName No.
Typed0pd0nd1pd1nq0pq0nq1pq1n30
324621191715

CML type
CML type
CML type
CML type

DESCRIPTION
High-speed Signals
Differential high speed data inputs with internal SE 67Ohm
termination to vcc and SE 50Ohm termination to virtual ground

Differential high speed data outputs with internal SE 50Ohm
termination to vcc. Require external SE 50Ohm termination to vcc

veeControl Signals
SEHigh-speed input with selectable logic levels, (active: high; default:low). For the selection logic see Table 2
SE
CMOS Low-speed input with internal 10KOhm termination to vcc. For theCMOS control logic see Table 1
CMOS Low-speed input with internal 10KOhm termination to vee. For thecontrol logic see Table 1
Supply and Termination Voltages
Description
Pin Number
Positive power supply rail
1, 3, 5, 7, 9, 11, 12, 14, 16, 18, 20, 22,23, 25, 27, 29, 31, 33, 34, 36, 38, 40,42, 44
Negative power supply rail
2, 24, 35

vn1p3

Internal supply vcc-1.3V28n/c

Not connected pins

13, 37, 43

sel0
sel1
gncrl0gncrl1
gncrl2

Namevcc

Rev. 1.3.2

4139810264July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ELECTRICAL CHARACTERISTICSPARAMETERveevcc
Ivee
Power consumption
Junction temperature
Bandwidth
Common mode level
Input Noise Density
S11

Bandwidth
Common mode level
S22
Small Signal Differential Gain
Output referred 1dB
Compression Point
2nd harmonic
3rd harmonic

High logic level
Low logic level
BandwidthHigh logic level
Low logic level
Input current
Nominal voltage value
Adjustment range
Current

Rev. 1.3.2

MIN
TYP MAXUNITGeneral Parameters-4.7-4.5-4.3
V0.0
V
280mA
1260
mW
-25
50
125°C
Input Analog (d0p/d0n, d1p/d1n)
DC17GHz
vcc-0.6 vcc-0.5 vcc-0.4mV
1.5nV/sqrt(Hz)-30dB-8dB
Output Analog (q0p/q0n, q1p/q1n)
DC17GHz
vcc-0.55
V-1.0-270.0+1.00dBdBdBm-55dBc-35dBc
-55
dBc
-40
dBc
Low-Speed Controls (gncrl 0/1/2)
Vvcc
Vvee
High-Speed Control (sel0, sel1)
1GHzVvcc
vcc-3.3
V10uA
Additional Internal Supply (vn1p3)
vcc-1.3
V
vcc-1.6
vcc-1.0V
1mA

5COMMENTS±4.5%
External ground-3dB

at 1GHz
at 20GHz-3dB
With external 50Ohm
DC termination to vcc
at 1GHz
Single-Ended, 20GHz
at 1GHz
at 20GHz
at 1GHz
at 20GHz-2.4V default statesink or source
when not connectedwith external supplysource or sink

July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

PACKAGE INFORMATIONThe chip die is housed in a custom 44-pin CQFP package shown in Fig. 3. The package provides a center
heat slug located on its back side to be used for heat dissipation. ADSANTEC recommends for thissection to be soldered to the vcc plain, which is ground for a negative supply, or power for a positivesupply.
The part’s identification label is ASNT6162-KMM. The first 8 characters of the name before the dashidentify the bare die including general circuit family, fabrication technology, specific circuit type, and partversion while the 3 digits after the underscore represent the package’s manufacturer, type, and pin outcount.
This device complies with the Restriction of Hazardous Substances (RoHS) per EU 2002/95/EC for all six
substances.

Fig. 3. CQFP 44-Pin Package Drawing (All Dimensions in mm)

Rev. 1.3.2

6July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

REVISION HISTORY
Revision
1.3.2
1.3.1
1.2.1

Date
07-2019
05-2018
04-2018

1.1.1
1.0.1

08-201708-2017

0.2.1

08-2017

0.1.1

07-20170.0.1

08-2016

Rev. 1.3.2

Changes
Updated Letterhead
Corrected the maximum frequency of operation
Added description of the vn1p3 pin (updated description, Terminal Functions,and Electrical characteristics)
Corrected power supply valueFirst release
Corrected description
Corrected pin out diagram
Removed lvlcrl pin and its description
Corrected bandwidth
Pin name sel2 was changed to sel0 in description tables and in the block
diagram. Channel selection table was corrected.
Preliminary release

7

July 2019