Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT6170-KMC
DC-20GHz Analog Signal Adjustable Delay

Utilizes internal peaking control for bandwidth adjustment



Fully differential CML-type input interface

Fully differential CML-type output interfaceSingle +3.3V or -3.3V power supplyPower consumption: 560mWFabricated in SiGe for high performance, yield, and reliability

Custom CQFP 24-pin packagevee

Combined delay adjustment range of 12psvcc

n/c

Utilizes discrete and continuous phase adjustment mechanisms

vcc

pkcrlBroadband (DC-20GHz) tunable analog signal delayvcc

veevccvcc

inpoutp

ASNT6170

vcc

vcc

innoutn

vcc

vcc

Rev. 1.1.2

1vcc

tlcrl

vcc

phcrl

vcc

veeveeJuly 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

DESCRIPTION
pkcrl
5050TLinp

TunablePhase Shiftinnnoutp

TLSELTLoutnTL5050phcrl

tlcrl

Fig. 1. Functional Block Diagram (Negative Power Supply Mode)

ASNT6170-KMC is a variable delay line for analog signals fabricated in SiGe technology. The IC shownin Fig. 1 provides an adjustable delay of its differential output signal outp/outn in relation to its
broadband input signal inp/inn. The delay is controlled through a DC control switch tlcrl and a DC tuning
port phcrl for fine adjustment. The DC tuning port pkcrl may be used to increase the part’s bandwidth at
the cost of its delay range. The ports phcrl and pkcrl should be always connected to external voltage
sources!
The part’s I/Os support the CML logic interface with on chip 50Ohm termination to vcc and may be useddifferentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLYCONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply
with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, theinput termination provides the required common mode voltage automatically. The differential DCsignaling mode is recommended for optimal performance.

Delay Control Ports
The delay is controlled through a DCswitch
tlcrl Voltage
and a "phcrl"
DC tuning port phcrl. The delay control
6170control
Phase Shiftvs. Control
diagram at pkcrl=vcc-2V is shown in Fig. 2. All voltage values are relative to vcc.
1412

Phase Shift (ps)10864
20-1.4

-1.2

-1

-0.8

-0.6

-0.4

-0.2

00.2

0.4

0.6

0.8

phcrl (V)tlcrl=-3.3V

tlcrl=-0.8V

Fig. 2. Delay Control Diagram

Rev. 1.1.22July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

Peak Control PortThe bandwidth (at -3dB) may be adjusted through a DC tuning tlcrl and a DC tuning port pkcrl. The
bandwidth control diagram is shown Bandwidthin Fig. 3. vs. Control Voltage pkcrl
212019Bandwidth (GHz)

1817161514
13-3.3 -3.2 -3.1-3-2.9 -2.8 -2.7 -2.6-2.5 -2.4 -2.3 -2.2 -2.1-2-1.9 -1.8 -1.7 -1.6-1.5

12-1.4 -1.3 -1.2

Control Votage (V relative to vcc)

Fig. 3. Bandwidth vs. Control Voltage pkcrl

Linearity
Linearity of 6170 depends on the input signal’s amplitude and frequency. Fig. 4 and Fig. 5 show worstcase simulated values of the second harmonic distortion (SHD) and the third harmonic distortion (THD)
respectively on the input amplitude for 1GHz, 10GHz, and 15GHz. The graphs should be used forillustration purposes only. Preliminary test results demonstrate a better performance of SHD and THDless than -50dBc at 100mV input amplitude (200mV swing p-p) and 15GHz input frequency, as reflectedin ELECTRICAL CHARACTERISTICS.
Second Harmonic Distortion vs. Input Amplitude

-30
-35

507090110

130150170

190-40SHD (dB)-45-50

SHD at 1G-55

SHD at 10G
SHD at 15G-60
-65
-70
-75
-80
Input Amplitude (mV)Fig. 4. Simulated SHD vs. Input Amplitude for 1 GHZ, 10 GHz , and 15 GHz Signals

Rev. 1.1.2

3July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

Third Harmonic Distortion vs. Input Amplitude-20507090

110130150170190-25

THD (dB)-30-35

THD at 1G
THD at 10G-40

THD at 15G-45-50-55
Input Amplitude (mV)Fig. 5. Simulated THD vs. Input Amplitude for 1GHZ, 10GHz , and 15GHz Signals

POWER SUPPLY CONFIGURATION
The part can operate with either a negative supply (vcc = 0.0V=ground and vee = -3.3V), or a positivesupply (vcc = +3.3V and vee = 0.0V=ground). In case of the positive supply, all I/Os need ACtermination when connected to any devices with 50Ohm termination to ground. Different PCB layouts
will be needed for each different power supply combination.

All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V.

ABSOLUTE MAXIMUM RATINGS
Caution: Exceeding the absolute maximum ratings shown in Table 1 may cause damage to this productand/or lead to reduced reliability. Functional performance is specified over the recommended operating
conditions for power supply and temperature only. AC and DC device characteristics at or beyond theabsolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced toground (assumed vcc).
Table 1. Absolute Maximum Ratings

Parameter
Supply Voltage (vee)Power Consumption
RF Input Voltage Swing (SE)
Case Temperature
Storage Temperature
Operational Humidity
Storage Humidity

Rev. 1.1.2

Min-4010104

Max-3.6620
1.0+90+100
9898

Units
VmWVºCºC%%

July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

TERMINAL FUNCTIONSPin PinPinPinTermination# nametypefunction
or connection
1vee supply voltage negative power supply
GND2
vcc supply voltage positive power supply
3phcrl analog voltage
phase shift control
High impedance1)
4
vcc supply voltage positive power supply
5
tlcrl
CMOS input
additional delay on/off
1MOhm to vee
6vcc supply voltage positive power supply
7
vee supply voltage negative power supply
GND8vcc supply voltage positive power supply
9outn analog output HS output data, inverted
50Ohm to vcc
10vcc supply voltage positive power supply
11 outp analog output
HS output data, direct
50Ohm to vcc
12vcc supply voltage positive power supply
13
vee supply voltage negative power supply
GND
14
vcc supply voltage positive power supply
15
n/c
not used16
vcc supply voltage positive power supply
17 pkcrl analog voltage
bandwidth control
High impedance1)
18
vcc supply voltage positive power supply
19
vee supply voltage negative power supply
GND20
vcc supply voltage positive power supply
21
inpanalog input
HS input data, direct
50Ohm to vcc
22vcc supply voltage positive power supply
23
innanalog input
HS input data, inverted
50Ohm to vcc
24vcc supply voltage positive power supply1) – This port should be always connected to an external voltage source

Rev. 1.1.2

5July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ELECTRICAL CHARACTERISTICSPARAMETERveevcc
Ivee
Power consumptionJunction temperature
Frequency
Swing
CM Voltage Level
Frequency
Gain
Harmonic distortions
Logic “1” level
Logic “0” level
Voltage level

Phase shift
Voltage level

MIN

TYP

MAX UNITCOMMENTS
General Parameters-3.1-3.3-3.5
V
±6%
0.0
V
External ground
170mA
560mW
-25
50
125°C
HS Input (inp/inn)
DC
20
GHz
0.025
0.5
V
Differential or SE, p-p
vcc-0.8vcc
VMust match for both inputs
HS Output (outp/outn)
DC20
GHz0dB
Differential input to differential output
nd-50dBc
2 and 3rd harmonics at 15GHz/200mVp-p
DC Input Switch Control (tlcrl)
vee+2.5
VSwitches between short and longtransmission line pathsveeV
Tuning port (phcrl)
vcc-1.4
vcc+0.8
VAnalog control for continuous delay
adjustment
Output-to-Input Delay
For the full range of phcrl and both012
ps
positions of tlcrl control switch
Tuning port (pkcrl)
vcc-3.3
vcc-1.3
V
Peak control for BW adjustment, vee=-3.3V

PACKAGE INFORMATIONThe chip die is housed in a custom 24-pin CQFP package shown in Fig. 6. The package provides a center
heat slug located on its back side to be used for heat dissipation. ADSANTEC recommends for thissection to be soldered to the vcc plain, which is ground for a negative supply, or power for a positive
supply.
The part’s identification label is ASNT6170-KMC. The first 8 characters of the name before the dashidentify the bare die including general circuit family, fabrication technology, specific circuit type, and partversion while the 3 characters after the dash represent the package’s manufacturer, type, and pin outcount.
This device complies with the Restriction of Hazardous Substances (RoHS) per EU 2002/95/EC for all sixsubstances.

Rev. 1.1.2

6July 2019

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

Fig. 6. CQFP 24-Pin Package Drawing (All Dimensions in mm)

REVISION HISTORY
Revision
1.1.2
1.1.1
1.0.1
Rev. 1.1.2

Date
07-2019
02-201605-2015

Changes
Updated Letterhead
Corrected Peak Control Port section
Initial release
7July 2019