Hybrid Computing forHigh-Throughput Bioinformatics

THE WORLD’S FIRST HYBRID-CORE COMPUTER.

Hybrid-core Computing

Performanceof applicationspecifichardware
Heterogenous solutions• can be much more efficient• still hard to program

Programmability anddeployment ease ofan x86 server
Multicore solutions• don’t always scale well
• parallel programming ishard

Low

Application Performance/
Power efficiency

HighConvey HC-1

Difficult
2/23/2011

Ease of Deployment
2Easy

SYSTEM ARCHITECTURE

HC-1 Hardware
PCI I/OFPGAIntel
ChipsetFPGA

Personalities
FPGAFPGA8 GB/sMemory

80 GB/sMemory

Cache Coherent, Shared Virtual Memory
2/23/20114

Memory Subsystem• Optimized for 64-bit accesses; 80 GB/sec peak
• Automatically maintains coherency without impacting AE performance

2/23/20115

HC-1 Hardware
Coprocessor
Assembly

Host memory DIMMs
x16 PCI-E
slot

FSB
Mezzanine
Card• 2U enclosure:– Top half of 2U platform
contains the coprocessor– Bottom half contains Intelmotherboard

2/23/2011

6

Host x86
Server Assembly3 x 3½” Disk Drives

Using Personalities• Personalities arereloadable
instruction sets
• Compiler
generates x86
and coprocessorinstructions• ANSI standard
C/C++ & Fortran• Executable runs
on x86 nodes orConvey HybridCore nodes
2/23/2011

7C/C++

FortranConvey Software
Development Suite

Hybrid-Core Executable
x86-64 and Coprocessor
Instructions

Convey HC-1
Intel x86

Coprocessor

user specifies
personality atcompile time
instruction
descriptions

PPersonalities

FPGA
bitfilespersonality loaded
at runtime by OS

Personalities:
Application Specific Architectures
Common Infrastructure•Base scalar instruction set•Coprocessor dispatch & debug interfaces•Coherent shared virtual memory•High bandwidth word-oriented memory•x86/Linux ecosystem

CustomerDeveloped
Personalities

ConveyPersonalities

FinancialAnalytics
SPvector

SP Finite
Difference

Proteomics

SpeechRecognition

DPvector

Architecture
Simulation

Graph Theory

Data Reduction

Security

Convey Math Libs
2/23/20118

Personality
Libraries

Smith-Waterman
Search/Index
BioInformatics

SEQUENCING AND ALIGNMENT SUITESequencing and Alignment Suite• Smith-Waterman• On the Roadmap– Velvet– BLAST (p, n, x, ...)• Likely future applications(customer prioritized)– HMMER3– BWA– RAxML

2/23/2011

Smith-Waterman
VelvetBLAST (p, n, x, …)
HMMER3BWARAxML

10Library Interface– Nucleotides and Proteins– Linear scoring now– Soon table & affineConvey Smith-Waterman Personality Library• BasicRead FASTA Input– single function call
– handles all memory access,dispatch, cleanup

ssearch(….)

cny_ssearch(….)
Pack Data• Synchronous Configurable– several functions– myriad options to configure
sequence searches– pack multiple searches intosearch streams• Asynchronous Configurable:– in order to gain maximal
performance

Transfer to Coproc
Sequence Kernel

Sequence Kernel

Max Scores

Max Scores
Transfer to HostUnpack Data
TracebackWrite Results
2/23/201111

Smith-Waterman Personality• 18 tiles of S-W on each AE• Each tile
– Systolic array unrolled in HW– 64 input cells / clock cycle– Clock @ 150Mhz– Generates 64 results / clock• Join two tiles for input
sequences length 128• Database > 1 B characters• Data is packed– 8 elements in each 64bit
LOAD and STORE
2/23/2011

12Application Engine
DISPATCH LOGIC

Core Clock Logic

MEMORY CROSSBAR LOGIC

Smith-Waterman Tile

Aggregate Performance
DISPATCH LOGICDISPATCH LOGICDISPATCH LOGICDISPATCH LOGIC

Core Clock Logic

Core Clock Logic

Core Clock Logic

Core Clock Logic

MEMORY CROSSBAR LOGICMEMORY CROSSBAR LOGICMEMORY CROSSBAR LOGICMEMORY CROSSBAR LOGIC

Peak Performance is 691 GCUPs*
4 AEs x 18 tiles x 64 input cells x 150Mhz

Measured Performance is 688 GCUPs*
Core kernel 99.6% efficient
2/23/201113*GCUPs = billions of cell updates per secondSmith-Waterman Performance
688
700

600

500

400

300

200

100320.4

150Naïve Implementation

2/23/2011

14Farrar/SSE2
CUDASW++
8 core Nehalim-EP 2.66 GHz NVIDIA Dual GTX295

Convey HC-1

Smith-Waterman ExampleHC-1• Smith-Waterman
Linear Search– Algorithm is “tiled”
across each applicationengine– HC-1: 72 tiles– HC-1ex: 168 tiles

DISPATCH LOGIC

Core Clock Logic

MEMORY CROSSBAR LOGIC

HC-1exDISPATCH LOGIC

Core Clock Logic• Kernel 99.5% efficient
MEMORY CROSSBAR LOGICOct 2010

15

Embargoed until Nov 9 2010

Extreme Performance
Billions of Cell Updates Per Second (GCUPS)
1603

1600
1400
1200
1000
688

800
600
4002000

Oct 2010

415

Farrar/SIMD SSE2: 1
core Nehalem-EP 2.66
GHz16

CUDASW++: NVIDIA
Dual GTX295

32Farrar/SIMD SSE2: 8
core Nehalem-EP 2.66
GHzEmbargoed until Nov 9 2010

Convey HC-1

ConveyHC-1ex
ConveyHC-1ex

Exceptional Energy Efficiency

2“Convey Computer™ Corporation Ships to First Customer: University of California, San Diego,” June 23, 2009.
3Based on University of California, San Diego analysis and internal Convey benchmarks

Oct 2010

17

Embargoed until Nov 9 2010