Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT8130-KMC
36GHz Divider by 2 and by 4veevcc

veevccvee

Wide frequency range from DC to 36GHz
Divided-by-2 and divided-by-4 outputs
50% duty cycle of the divided clock signal
Fully differential CML input interface
Fully differential CML output interface
Single +3.3V or -3.3V power supply
Industrial temperature range
Power consumption of 260mW at full operational speed
Custom CQFP 24-pin packagevcc

veevcc

vcc

cnc4p

ASNT8130vccvcccpc4nvcc

vcc

Rev. 2.5.21vcc

c2p

vcc

c2nvccveeveeFebruary 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

DESCRIPTION

5050

cp

c4p

cn

c4n50

5050

c2pc2n50

Fig. 1. Functional Block Diagram

ASNT8130-KMC is a high-speed, low-power divider by-2 and by-4. The part shown in Fig. 1 accepts aCML input clock signal (cp/cn) with the speed from DC to maximum operational frequency and provides
clean 50% duty cycle output signals with divided-by-2 (c2p/c2n) and divided-by-4 (c4p/c4n) frequency.
The part’s I/Os support the CML logic interface with on chip 50Ohm termination to vcc and may be useddifferentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLYCONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should complywith the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, theinput termination provides the required common mode voltage automatically. The differential DC
signaling mode is recommended for optimal performance.

POWER SUPPLY CONFIGURATIONThe ASNT8130-KMC can operate with either negative supply (vcc = 0.0V =ground and vee = -3.3V), orpositive supply (vcc = +3.3V and vee = 0.0V = ground). In case of the positive supply, all I/Os need ACtermination when connected to any devices with 50Ohm termination to ground. Different PCB layouts
will be needed for each different power supply combination.

All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V.
Rev. 2.5.2

2February 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ABSOLUTE MAXIMUM RATINGS
Caution: Exceeding the absolute maximum ratings shown in Table 1 may cause damage to this productand/or lead to reduced reliability. Functional performance is specified over the recommended operatingconditions for power supply and temperature only. AC and DC device characteristics at or beyond theabsolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced toground (assumed vcc).
Table 1. Absolute Maximum Ratings

Parameter
Supply Voltage (vee)Power Consumption
RF Input Voltage Swing (SE)
Case Temperature
Storage Temperature
Operational Humidity
Storage Humidity

Min-401010Max
-3.6
0.29
1.0
+90
+100
9898Units
VW
V°C°C
%%

TERMINAL FUNCTIONSTERMINAL
NameNo.
TypeDESCRIPTION

High-Speed I/Os
CML Differential clock input with internal SE 50Ohm termination toinput vcc
CML Differential divided clock outputs with internal SE 50Ohmoutput termination to vcc. Require external SE 50Ohm termination tovcc

cpcn
c2p
c2n
c4p
c4n

23
21
53
11
9Namevcc
veeSupply and Termination Voltages
Description
Pin Number
Positive power supply (+3.3V or 0V)2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24
Negative power supply (0V or -3.3V)
1, 7, 13, 15, 17, 19

Rev. 2.5.23February 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ELECTRICAL CHARACTERISTICSPARAMETERMIN

TYP MAX UNIT
COMMENTS
General Parameters
-3.1
-3.3
-3.5
V
±6%
vee
0.0
V
External
ground
vcc
Ivee
79mA
Power consumption
260mW
Junction temperature -25
50
125°C
HS Input Clock (cp/cn)
Frequency
036
GHz
Swing
60
800mV
Differential or SE, p-p
CM Voltage Level
vcc-0.8 vcc-0.2 vcc
mVMust match for both inputs
Output Divided Clock (c2p/c2n, c4p/c4n)Frequency f/2018GHzFor c2 out signal
Frequency f/409GHzFor c4 out signal
Logic “1” level
Vvcc
Logic “0” levelvcc-0.35
VWith external 50Ohm DC termination
Duty cycle
455055%Additive Jitter
TBD
ps
Peak-to-peak

PACKAGE INFORMATIONThe chip die is housed in a custom 24-pin CQFP package shown in Fig. 2. The package provides a center
heat slug located on its back side to be used for heat dissipation. ADSANTEC recommends for thissection to be soldered to the vcc plain, which is ground for a negative supply, or power for a positivesupply.
The part’s identification label is ASNT8130-KMC. The first 8 characters of the name before the dashidentify the bare die including general circuit family, fabrication technology, specific circuit type, and partversion while the 3 characters after the dash represent the package’s manufacturer, type, and pin out
count.
This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten
substances.

Rev. 2.5.2

4February 2020Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

Fig. 2. CQFP 24-Pin Package Drawing (All Dimensions in mm)

Rev. 2.5.2

5February 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

REVISION HISTORY
Revision
2.5.2
2.4.2
2.4.1

Date
02-2020
07-2019
12-2016

2.3.1
2.2.1

08-201401-2013

2.1.1

01-2013

2.0.1

06-20121.009-2011

Rev. 2.5.2

Changes
Updated Package Information
Updated Letterhead
Corrected description
Corrected specification of the output swing
Corrected operating frequency range
Correction: output Diff Swing instead of SE
Format correction
Added package drawing
Corrected Absolute Maximum Ratings
Corrected current and power consumption
Corrected format
Added pin out drawing
Added Power Supply Configuration text
Added Absolute Maximum Ratings table
Revised Electrical Characteristics section
Added Package Information section
Added Revision History
First release

6February 2020