Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT5151-KMC
DC-64Gbps Broadband Digital 2:1 Multiplexer/Selector

Ideal for use as a high isolation selector switch or as a high speed 2-to-1 serializer

Ideal for high speed proof-of-concept prototyping

Fully differential CML input interface

Fully differential CML output interface with 600mV single-ended swing

Analog input clock common mode voltage control

Single +3.3V or -3.3V power supplyPower consumption: 415mWFabricated in SiGe for high performance, yield, and reliability

Custom CQFP 24-pin packagevcc

veevcc

Exhibits low jitter and limited temperature variation over industrial temperature range

d1n

d1p

High speed broadband 2:1 Multiplexer/Selector (MUX)

vcc



dcp

vcc

vcc

d0p

qp

ASNT5151

vcc

vcc

d0n

qn

vcc

vcc

Rev. 1.4.2

1vcc

cn

vcc

cp

vcc

vee

dcn

May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

DESCRIPTION
d1pd1n50505050d0pqp

2:1 MUXCored0n50

qn50

1K1Kdcpdcn
5050cpcnFig. 1. Functional Block Diagram

The temperature stable and broadband ASNT5151-KMC SiGe IC can be utilized as either a high isolation
selector switch or a high speed 2:1 serializer and is intended for use in high-speed measurement / test
equipment. When employed as a selector switch, the IC can route one of its differential data input signals
d0p/d0n or d1p/d1n to its differential output qp/qn while effectively blocking the other data input.
Selection of a specific data input is achieved through appropriate external DC biasing of the selector
signal inputs cp/cn. The logic is shown in Table 1.
Table 1. Truth Tablec d0 d1 out0 X 000 X 111 0 X 01 1 X 1
As a 2:1 serializer, the IC can receive high speed input data signals into d0p/d0n and d1p/d1n andeffectively multiplex them into a double frequency rate NRZ output data signal by using a high speed
input clock signal on its selector signal inputs cp/cn. The signals should be aligned as shown in Fig. 2. To
ensure both maximum timing margins and low output signal jitter, limit the amount of jitter on the input
signals (D0, D1, and C) to only a few picoseconds.

Rev. 1.4.2

2May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

Fig. 2. Input Signal Timing Diagram

The common-mode voltage levels of the input clock signals can be adjusted using the analog control
inputs dcp/dcn.
The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be useddifferentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLYCONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply
with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, theinput termination provides the required common mode voltage automatically. The differential DCsignaling mode is recommended for optimal performance.

POWER SUPPLY CONFIGURATION
The part can operate with either negative supply (vcc = 0.0V = ground and vee = −3.3V), or positivesupply (vcc = +3.3V and vee = 0.0V = ground). In case of the positive supply, all I/Os need AC
termination when connected to any devices with 50Ohm termination to ground.

All the characteristics detailed below assume vcc = 0.0V and vee = -3.3V.

ABSOLUTE MAXIMUM RATINGS
Caution: Exceeding the absolute maximum ratings shown in Table 2 may cause damage to this productand/or lead to reduced reliability. Functional performance is specified over the recommended operating
conditions for power supply and temperature only. AC and DC device characteristics at or beyond theabsolute maximum ratings are not assumed or implied. All max voltage limits are referenced to ground.
Rev. 1.4.2

3May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

Table 2. Absolute Maximum Ratings

Parameter
Supply Voltage (vee)Power Consumption
RF Input Voltage Swing (SE)
Case Temperature
Storage Temperature
Operational Humidity
Storage Humidity

Min-401010Max-3.60.45
1.0+90+1009898UnitsVW
VºCºC%%TERMINAL FUNCTIONSTERMINAL
Name
No.
Typed0p
d0n
d1p
d1n
cp
cn
dcp
dcn
qp
qn
Name
vcc
vee

Rev. 1.4.2

DESCRIPTION

High-Speed I/Os
21
CML Differential data input signals with internal SE 50Ohm termination toinput vcc
23
17
CML Differential data input signals with internal SE 50Ohm termination toinput vcc153CML Differential clock input signals with internal SE 50Ohm termination
input to vcc
519
Analog cp common mode control voltage
inputs cn common mode control voltage
711
CML Differential data output signals with internal SE 50Ohm termination
output to vcc. Also require external SE 50Ohm termination to vcc
9Supply and Termination Voltages
Description
Pin Number
Positive power supply
2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24(+3.3V or 0)
Negative power supply
1, 13(0V or -3.3V)

4May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ELECTRICAL CHARACTERISTICSPARAMETERveevcc
Ivee
Power consumption
Junction temperature
Data rate
Frequency
Data rate
Swing
CM Voltage Level
Frequency
Swing
CM Voltage Level
Duty cycle
Data rate
Frequency
Data rate
Logic “1” level
Logic “0” level
Rise/Fall times
Output Jitter
Input Signal Range

MIN

TYP

MAX
UNIT
COMMENTS
General Parameters-3.1-3.3-3.5
V
±6%
0.0V
External ground
125mA
415mW
-2550125°C
HS Input Data (d0p/d0n, d1p/d1n)
DC50Gbps
When used as a selector
DC25GHz
When used as a selector
DC32Gbps
When used as a multiplexer
50800mV
Differential or SE, p-p
vcc-0.8vcc
VMust match for both inputs
HS Input Clock (cp/cn)
DC32GHz50800mV
Differential or SE, p-p
vcc-0.8vcc
VMust match for both inputs
455055%
HS Output Data (qp/qn)
DC50Gbps
When used as a selector
DC25GHz
When used as a selector
DC64Gbps
When used as a multiplexer
Vvccvcc-0.6
VWith external 50Ohm DC termination579
ps
20%-80%1ps
Peak-to-peakCommon Mode Control Ports (dcp/dcn)
-3.3
0.0
V

PACKAGE INFORMATIONThe chip die is housed in a custom 24-pin CQFP package shown in Fig. 3. The package provides a center
heat slug located on its back side to be used for heat dissipation. ADSANTEC recommends for thissection to be soldered to the vcc plain, which is ground for a negative supply, or power for a positivesupply.
The part’s identification label is ASNT5151-KMC. The first 8 characters of the name before the dashidentify the bare die including general circuit family, fabrication technology, specific circuit type, and partversion while the 3 characters after the dash represent the package’s manufacturer, type, and pin outcount.

Rev. 1.4.2

5May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten
substances.

Fig. 3. CQFP 24-Pin Package Drawing (All Dimensions in mm)

Rev. 1.4.2

6May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

REVISION HISTORY
Revision
1.4.2
1.3.2
1.3.1

Date
05-2020
07-2019
02-2019

1.2.1
1.1.1

04-2014
11-2013

1.0.1

11-2013

Rev. 1.4.2

Changes
Updated Package Information
Updated Letterhead
Added truth table
Revised package information section
Added Required Input Signal Alignment section
Included CM level shifting knobs on the clock input pins
Revised characteristics and pin diagram
Revised functional block diagram and description
Revised terminal functions
Revised electrical characteristics
First release

7May 2020