A d v a n c e d
S c ie n c ea n d
N o v e l
T e c h n o lo g y

A D S A N T E C

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

ASNT5074-PQC
14GHz Clock, 17Gbps Data Phase Shifter

Fully differential input and output buffers with on-chip 50Ω termination.

CML output interface with 600mV single-ended swing.

Single ±3.3V power supply.

Power consumption: 0.9W.

Fabricated in SiGe for high performance, yield, and reliability.

Standard MLF/QFN 24-pin package.

VCC

NC

Ideal for high speed proof-of-concept prototyping.

VCC

NC

100MHz of bandwidth for the phase adjustment tuning port.

VCC

VEE



Broadband (10MHz-14GHz/20Mbps-17Gbps) tunable clock/data phase shifter with 140psof delay variation.
Exhibits low jitter and limited temperature variation over industrial temperature range.

18 17 16 15 14 13Rev.: 4,VCC

1912VEE

INP

2011VCC

VCC

2110OUTP

INN

229VCCVCC

238OUTNVEE

247VCC

October 2008.

123456VCC

ICNTP

VCC

ICNTN

VCC

VEE

ASNT5074

ASNT5074-PQC

A d v a n c e d
S c ie n c ea n d
N o v e l
T e c h n o lo g y

A D S A N T E C

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

DESCRIPTION
The temperature stable ASNT5074-PQC SiGe IC provides extremely low jitter broadband signal
phase shifting capability between its input and output signal ports and is intended for use in highspeed measurement / test equipment. ASNT5074-PQC can process an up to 14GHz-17Gbps
clock/data signal and deliver 0-140ps of adjustable phase delay through the up to 100MHz
external adjustment of its differential tuning port. The part’s I/Os support the CML logic
interface with on chip 50Ω termination and may be used differentially, AC/DC coupled, singleended, or in any combination. It operates from a single ±3.3V power supply.

FUNCTIONAL BLOCK DIAGRAM
5050140ps
TunablePhase Shift

Inputp
InputnOutpOutn5050100100
Icntp IcntnTERMINAL FUNCTIONSTERMINAL
NAME(NO.)vcc
1,3,5,7,9,11
13,15,17,19,21,23
vee
6,12,18,24
inp
20inn22outp
10outn8icntp2icntn4
nc
14,16

Rev.: 4,TYPE

DESCRIPTION

PS

Power Supply: 3.3V / 0V

PS
Input

Power Supply: 0V / -3.3V
Differential CML high-speed signal inputs

OutputDifferential CML high-speed signal outputs

Input

Differential low-speed phase adjustment tuning inputs

October 2008.

Not connected (NC)ASNT5074-PQC

A D S A N T E C

A d v a n c e d
S c ie n c ea n d
N o v e l
T e c h n o lo g y

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

ELECTRICAL CHARACTERISTICSPARAMETERMIN TYP MAX
UNIT
-3.1
0.0 / -3.3-3.5
VVEE
3.1
3.3 / 0.0
3.5
V
VCC
260
275
290mA
IEE
0.9mW
Power-2550
125°C
Junction Temp.
Input (in)Data rate/Clock frequency
0.0
17/14
Gbps/GHzCM Level
Vcc-0.8 Vcc-0.2 Vcc
V
Swing (Diff or SE)
504001000mV
Output (out)Data rate/Clock frequency 0.0
17/14
Gbps/GHzCM Level
Vcc-0.35 Vcc-0.3 Vcc-0.25
VSE Swing
570 600
630
mV
Rise/Fall Times
151719ps
Additive Jitter
TBD
ps
Duty Cycle
45% 50% 55%
Tuning Port (icnt)
Diff. Swing
-500
500mV
CM Level
Vcc-0.5 Vcc-0.25 Vcc
VPhase Shift Control
0260
ps
Shift Stability-1212ps
Bandwidth0.0
100
MHz

COMMENTS±6%±6%

Peak-to-peakPeak-to-peak
20%-80%Peak-to-peak
For clock signal
Peak-to-peak
0-125°C

PACKAGE INFORMATIONThe chip is packaged in a standard 24-pin QFN package. The package’s mechanical information
is available on the company’s website.

Rev.: 4,

October 2008.

ASNT5074-PQC