Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT5131-PQC
DC-17Gbps Limiting Amplifier

Broadband (DC-17Gbps) limiting amplifierExhibits low jitter and limited temperature variation over industrial temperature range



100MHz of bandwidth for the amplitude adjustment tuning port

Ideal for high speed proof-of-concept prototyping

Fully differential CML input interfaces

Fully differential CML output interface with adjustable SE amplitude from 0V to 1.0V

Single +5.0V or -5.0V power supplyPower consumption: 500mW

Fabricated in SiGe for high performance, yield, and reliability

Standard MLF/QFN 24-pin package

Rev. 5.1.2

1April 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

DESCRIPTION

2K

tn

5050

dp

qp

dn

qn50502Ktp
Fig. 1. Functional Block Diagram

The temperature stable ASNT5131-PQC SiGe IC provides extremely low jitter broadband signal
amplitude control capability, and is intended for use in high-speed measurement / test equipment. The IC
shown in Fig. 1 can process a high-speed data signal dp/dn and deliver a high-speed data output signal
qp/qn with its output signal amplitude controlled by tuning ports tp/tn.
The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be useddifferentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLYCONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply
with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, theinput termination provides the required common mode voltage automatically. The differential DC
signaling mode is recommended for optimal performance.

POWER SUPPLY CONFIGURATION
The part can operate with either negative supply (vcc = 0.0V = ground and vee = −5.0V), or positive
supply (vcc = +5.0V and vee = 0.0V = ground). In case of the positive supply, all I/Os need ACtermination when connected to any devices with 50Ohm termination to ground. Different PCB layouts
will be needed for each different power supply combination.

All the characteristics detailed below assume vcc = 0.0V and vee = -5.0V.

Rev. 5.1.2

2April 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ABSOLUTE MAXIMUM RATINGS
Caution: Exceeding the absolute maximum ratings shown in Table 1 may cause damage to this productand/or lead to reduced reliability. Functional performance is specified over the recommended operating
conditions for power supply and temperature only. AC and DC device characteristics at or beyond theabsolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced toground.
Table 1. Absolute Maximum Ratings

Parameter
Supply Voltage (vee)Power Consumption
RF Input Voltage Swing (SE)
Case Temperature
Storage Temperature
Operational Humidity
Storage Humidity

Min-401010Max
-5.5
0.55
1.0
+90
+100
98
98UnitsVW
VºCºC%%TERMINAL FUNCTIONSTERMINAL
NameNo.
TypedpdnqpqntptnNamevcc
veeRev. 5.1.2

DESCRIPTION

High-Speed I/Os
Differential high-speed signal inputs with internal SE 50Ohm
termination to vcc.
Differential high-speed signal outputs with internal SE 50Ohm
termination to vcc. Require external SE 50Ohm termination to vcc.
Differential output amplitude control signal with internal 2KOhm
termination to vcc.
Supply and Termination Voltages
Description
Pin Number
Positive power supply (+5.0V or 0)
1, 2, 3, 5, 7, 9, 11, 13, 15, 16, 17, 19, 21,23
Negative power supply (0V or -5.0V)
6, 12, 18, 24
2022108414

CML
input
CML
outputCML
input

3April 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ELECTRICAL CHARACTERISTICSPARAMETER
veevccIvee
Power consumption
Junction temperature
Frequency
Swing
CM Voltage Level
Frequency
Logic “1” level
Logic “0” level
Rise/Fall times
Output Jitter
Duty cycle
BandwidthSwing
CM Voltage Level

MIN

TYP

MAX UNITCOMMENTS
General Parameters-4.7-5.0-5.3
V±6%
0.0V
External ground
100mA
500mW
-4025125°C
HS Input Data (dp/dn)
DC
17Gbps0.05
1.0V
Differential or SE, p-p
vcc-0.8vcc
VMust match for both inputs
HS Output Data (qp/qn)
DC
17GbpsVvcc
vcc-1.0 vcc-0.5 vcc
V
With external 50Ohm DC termination,and full range of tp/tn control signal
151719ps
20%-80%1ps
Peak-to-peak
455055%
Tuning port (tp/tn)
DC100MHzvcc-0.5
VDifferential
vcc-0.5vcc
VMust match for both inputs

PACKAGE INFORMATIONThe chip die is housed in a standard 24-pin QFN package shown in Fig. 2. It is recommended that thecenter heat slug located on the back side of the package is soldered to the vee plain that is ground for thepositive supply or power for the negative supply.
The part’s identification label is ASNT5131-PQC. The first 8 characters of the name before the dashidentify the bare die including general circuit family, fabrication technology, specific circuit type, and partversion while the 3 characters after the dash represent the package’s manufacturer, type, and pin outcount.
This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all tensubstances.

Rev. 5.1.2

4April 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT5131
Fig. 2. QFN 24-Pin Package Drawing (All Dimensions in mm)

Rev. 5.1.2

5April 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

REVISION HISTORY
Revision
5.1.2
5.0.2
5.0.1

Date04-2020
07-2019
03-2013

4.002-2008

3.02.01.006-2007
04-2007
01-2007

Rev. 5.1.2

Changes
Updated Package Information
Updated Letterhead
Corrected title
Revised package pin out drawing
Revised functional block diagram
Revised description
Added power supply configuration
Added absolute maximum ratings
Revised terminal functions
Revised electrical characteristics
Added package information and mechanical drawing
Format correction
Revised electrical characteristics section
Revised packaging information section
Revised electrical characteristics section
Revised terminal functions section
First release

6April 2020