A D S A N T E C

A d v a n c e d
S c ie n c ea n dN o v e l
T e c h n o lo g y

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

ASNT5172-PQC
15GHz Clock Phase Shifter

Ideal for high speed proof-of-concept prototyping.



Fully differential input and output buffers with on-chip 50Ω termination.

CML output interface with 400mV single-ended swing.

Single -3.3V power supply.

Power consumption: 430mW.

Fabricated in SiGe for high performance, yield, and reliability.

Standard MLF/QFN 24-pin package.

VCC

100MHz of bandwidth for the phase adjustment tuning port.

VCC

VCC

Exhibits low jitter and limited temperature variation over industrial temperature range.

VCC

VCC

Narrowband (11GHz-15GHz) tunable clock phase shifter with 120ps of delay variation.

VEE

18 17 16 15 14 13Rev.: 4.1,VCC

1912VEE

INP

20

11VCC

VCC

2110OUTP

INN

229VCCVCC

238OUTNVEE

247VCC

August 2009

123456VCC

ICNTPVCC

ICNTN

VCC

VEE

ASNT5172

ASNT5172-PQC

A d v a n c e d
S c ie n c ea n d
N o v e l
T e c h n o lo g y

A D S A N T E C

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

DESCRIPTION
The temperature stable ASNT5172-PQC SiGe IC provides extremely low jitter narrowband
signal phase shifting capability between its input and output signal ports and is intended for use
in high-speed measurement / test equipment. ASNT5172-PQC can process an up to 15GHz RFclock signal and deliver 0-120ps of adjustable phase delay through the up to 100MHz external
adjustment of its differential tuning port. The part’s I/Os support the CML logic interface with onchip 50Ω termination and may be used differentially, AC/DC coupled, single-ended, or in any
combination. It operates from a single -3.3V power supply.

FUNCTIONAL BLOCK DIAGRAM

Icntp
1005050

120ps
TunablePhase Shift

Inputp
Input n50OutpOutn50100Icntn

TERMINAL FUNCTIONSTERMINALNAME(NO.)
vcc
1,3,5,7,9,11
13-17,19,21,23
vee
6,12,18,24
inp
20
inn
22
outp
10outn
8
icntp
2
icntn
4

Rev.: 4.1,TYPE

DESCRIPTION

PS

Power Supply: 0VPS
Input

Power Supply: -3.3V
Differential CML high-speed signal inputs

OutputDifferential CML high-speed signal outputs

Input

Differential low-speed phase adjustment tuning inputs

August 2009

ASNT5172-PQC

A D S A N T E C

A d v a n c e dS c ie n c ea n d
N o v e l
T e c h n o lo g y

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

ELECTRICAL CHARACTERISTICSPARAMETER
VEE
VCC
IEE
Power
Junction Temp.
Input (in)Frequency
CM Level
Swing (Diff or SE)
Output (out)Frequency
CM Level
SE Swing
Rise/Fall Times
Additive Jitter
Duty Cycle
Tuning Port (icnt)
Diff. Swing
CM Level
Phase Shift
Shift Stability
BandwidthMIN-3.1-25

TYP
-3.3
0.0
130
430
50

MAX-3.5

125

UNIT
VVmAmW°C

1115
Vcc-0.8 Vcc-0.2 Vcc
50
400
1000GHzVmV

1115
Vcc-0.25 Vcc-0.2 Vcc-0.15
380 400
420GHzV
mV

1315

45%

50%

17
<155%

-500
500
Vcc-0.5 Vcc-0.25
Vcc0120-220.0
100

ps
ps

mV
V
ps
ps
MHz

COMMENTS±6%

Peak-to-peakPeak-to-peak
20%-80%Peak-to-peakPeak-to-peak
0-125°C

PACKAGE INFORMATIONThe chip is packaged in a standard 24-pin QFN package. The package’s mechanical information
is available on the company’s website.

Rev.: 4.1,August 2009

ASNT5172-PQC