Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT6122-BD
50Gbps Linear/Limiting TIA
Broadband transimpedance amplifier (TIA) for low noise receiver-side applications



Automatic DC offset adjustment

Input peak detector

On-chip temperature detector



Exhibits low jitter and limited temperature variation over industrial temperature range

Fully differential output buffer with on-chip 50Ohm termination

Single +3.3V or -3.3V power supply

Low current consumption of 100mA at nominal conditions

Fabricated in SiGe for high performance, yield, and reliability

1319ASNT6122

71Rev. 2.5.2

1May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

DESCRIPTION

pkdet

PkD
inp
inncfilt

TIA

LA

OA

dcoutpoutp
outn
dcoutnOSC
Fig. 1. Functional Block Diagram

The ASNT6122-BD IC is a temperature stable SiGe transimpedance amplifier that provides low-jitter
broadband conversion of current signals at its input port inp into differential voltage signals at the output
ports outp/outn. The part shown in Fig. 1 is a serial combination of transimpedance (TIA), limiting (LA),and linearized output (OA) amplification stages. The part operates as a linear amplifier for low input
currents and moves to limiting mode above the specified maximum Non-Limiting Current Swing (seeELECTRICAL CHARACTERISTICS). The input signal should be single-ended with the current flowing
into the inp pin. It is recommended to decouple the inn pin to ground with a 10nF capacitor. The part
incorporates an automatic DC offset control (OSC) that effectively eliminates any difference between thecommon-mode voltages of direct and inverted output signals. The offset compensation function requires
utilization of an external 100nF capacitor attached to the cfilt pad. The output common mode voltages onoutput pins outp/outn can be adjusted using analog ports dcoutp/dcoutn respectively.
The on-chip peak detector (PkD) provides an output signal pkdet proportional to the value of the inputsignal.
The on-chip temperature sensor is a diode with its anode connected to the dtemp port.
The part’s outputs support a CML-type interface with on-chip 50Ohm termination and may be used as adifferential or single-ended connection with AC or DC-coupling (see also POWER SUPPLYCONFIGURATION). The input and output termination resistors in both channels are respectively
connected to separate internal positive supply plains vcca and vccd. The input and output negative
supply nets are also created as separate metal plains veea and veed, which are partly shorted through thecommon substrate.

POWER SUPPLY CONFIGURATION
The part can operate with either negative supply (vcc = 0.0V = ground and vee = −3.3V), or positivesupply (vcc = +3.3V and vee = 0.0V = ground). In case of the positive supply, all I/Os need AC
termination when connected to any devices with 50Ohm termination to ground.
The chip substrate should be connected to vee or completely isolated. DO NOT connect substrate to vcc!
Rev. 2.5.2
May 20202

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

All the characteristics detailed below assume vcc = 3.3V and vee = 0.0V.

ABSOLUTE MAXIMUM RATINGS
Caution: Exceeding the absolute maximum ratings shown in Table 1 may cause damage to this productand/or lead to reduced reliability. Functional performance is specified over the recommended operating
conditions for power supply and temperature only. AC and DC device characteristics at or beyond theabsolute maximum ratings are not assumed or implied. All min and max voltage limits are referenced toground (assumed vee).
Table 1. Absolute Maximum Ratings

Parameter
Supply Voltage (vcc)
Power Consumption
RF Input Current Swing (SE)
Junction Temperature
Storage Temperature
Operational Humidity
Storage Humidity

Min-401010Max
3.6
0.36
4+125+10098
98

Units
VW
mAºC
ºC
%%

TERMINAL FUNCTIONSTERMINAL
Name
No.
Type
inp
inn
outp
outn
dcoutpdcoutn
pkdet
cfilt
dtemp
Name
vccd
vcca
veedveea

Rev. 2.5.2

DESCRIPTION

High-Speed I/Os
20Current Single-ended current-sensing data input
input Additional input. 10nF decoupling to ground is recommended
22
10CML Differential data outputs. Require external SE 50Ohm
output termination to vcc
8Controls
14Input Analog control ports with internal 1K terminations tocorresponding data outputs outp/outn
415
Output Analog voltage port with internal 2.8KOhm termination to vcc
2100nF off-chip capacitor connection
16
Output Temperature sensor output (sink current)
Supply and Termination Voltages
Description
Pin Number
Positive power supply (+3.3V or 0V)6, 12
Quiet positive power supply for TIA (+3.3V or 0V)
18, 24
Negative power supply (0V or -3.3V)
3, 5, 7, 9, 11, 13
Quiet negative power supply for TIA (0V or -3.3V)
1, 17, 19, 21, 23

3May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ELECTRICAL CHARACTERISTICSPARAMETERTYP MAX UNIT
COMMENTS
General Parameters
3.1
3.3
3.5
V
±6%
vccd
3.1
3.3
3.5
V
±6%
vcca
0.0V
External groundveed0.0V
External groundveeaIvee
100mA
Power consumption
330mW
Junction temperature
-2550
125°C
HS Input Data (inp/inn)
Data Rate
50GbpsBandwidth283236GHz-3dB level
Low Cutoff
1.0KHz-3dB level
Non-limiting Current Swing
1200uA
pk-pk, positive (into the pin)
Input Overload Current
3.2mA
CM Voltage Level
990
1100mVDefined by OSC
Output Common Mode Controls (dcoutp, dcoutn)
Voltage range
VFor linear DC offset control
veevccHS Output Data (outp/outn)
Data Rate
50GbpsTransimpedance
0.60.8KOhm
Non-saturated output
SE Swing
0.3
V
Peak-to-peak, saturated
CM Levelvcc-(Swing)/2V
External 50Ohm DC termination
Group Delay Variation±5ps
100MHz - 36GHz
1/2Input Referred Noise Density
23pA/Hz0 - 36GHz
Additive Jitter1
ps
Peak-to-peak, PRBS7 input
Peak Detector (pkdet)
Output Voltage range
vcc-1.0vcc
V
For input current of 80-2000μA

Rev. 2.5.2

MIN

4May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

SIMULATED CHARACTERISTICS

Fig. 2. Typical Output Eye at 1mA Input Current Swing and 43Gbps Data Rate

Fig. 3. Typical Output Eye at 1mA Input Current Swing and 50Gbps Data Rate

Rev. 2.5.2

5May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

Fig. 4. Typical S21 Characteristic

Fig. 5. Typical Group Delay

Rev. 2.5.2

6May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

DIE INFORMATION
The main dimensions of the die are given in Table 2.
Table 2. Important Die Dimensions

Pad metal dimensions
80µm x 80µm
Pad opening dimensions
74µm x74µm
Die dimensions
1200µm x 1200µm
The part’s die incorporates wire bonding pads with the coordinates of their centers given in Table 3.
Table 3. Die Pad Coordinates

PinNumber
1
3
5
7
9
11
13
15
17
19
21
23

X Coordinate,
µm
300
600
900
11421142
1142
900
600
300
585858

Y Coordinate,
µm
5858
58
300
6009001142
1142
1142
900600300

Pin
Number24681012141618202224

X Coordinate,
µm
450
750
1065
1142
1142
1065
750
450
135
5858
135

Y Coordinate,
µm
58
58
135
450
750
1065
1142
1142
1065
750
450
135

The part’s identification label is ASNT6122-BD. The first 8 characters of the name before the dashidentify the bare die including general circuit family, fabrication technology, specific circuit type, and partversion while the 2 characters after the dash indicate that the die is not packaged.
This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten
substances.

Rev. 2.5.2

7May 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505
Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

REVISION HISTORY
Revision
2.5.2
2.4.2
2.4.1
2.3.1
2.2.1

Date
05-2020
07-2019
01-2018
01-2018
04-2017

2.1.1

04-2017

2.0.1

02-2017

1.1.1
1.0.1

02-201701-2010

Rev. 2.5.2

Changes
Updated Die Information
Updated Letterhead
Corrected pad frame drawing
Removed description of BW control that is not present in the chip
Modified title
Corrected description of liner/limiting operational modes
Added description of substrate connection
Corrected Electrical Characteristics section
Added Peak Detector parameters
Corrected transimpedance value
Added 50Gbps eye diagram
Added power supply configuration
Added absolute maximum ratings
Added simulated characteristics
Added die information
Updated format
Fully revised description
Preliminary release

8May 2020