A d v a n c e d
S c ie n c ea n d
N o v e l
T e c h n o lo g y

A D S A N T E C

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

ASNT5121/5120/5021-PQD
26Gbps-13GHz Data/Clock Distributor•

13GHz analog input bandwidth.

•One input signal port and three amplified output signal ports.

•On-chip matched phase delays for all three outputs.

•Fully differential input and output buffers with on-chip 50Ω termination.

•

CML output interface with 400mV single-ended swing.

•Single ±3.3V power supply.

•Power consumption: 580mW.

•Fabricated in SiGe for high performance, yield, and reliability.

•Standard MLF/QFN 16-pin package.

VCC

Exhibits low jitter and limited temperature variation over industrial temperature range.

CO1N

•

CO1P

High-speed broadband Data/Clock Amplifier and Splitter for signal distribution.

VEE•

12 11 10 9Rev.: 2,VCC

138

VEECIP

147

CO2PCIN

156

CO2NVEE

165VCC

December 2008.

123

4VCC

CO3PCO3NVEE

ASNT5121

ASNT5121-PQD (Old # 5120/5021)

A d v a n c e d
S c ie n c ea n d
N o v e lT e c h n o lo g y

A D S A N T E C

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

DESCRIPTION
The temperature stable ASNT5120-PQD SiGe IC provides active broadband data/clock signal
splitting and is intended for use in high-speed measurement / test equipment. ASNT5120-PQD
can receive an up to 26Gbps-13GHz data/clock signal and effectively distribute it to three
separate phase matched outputs. The part’s I/Os support the CML logic interface with on chip50Ω termination and may be used differentially, AC/DC coupled, single-ended, or in any
combination. It operates from a single ±3.3V power supply.

CO1N

CO1P

FUNCTIONAL BLOCK DIAGRAM

50505050

CIP

CO2PCIN

CO2N5050

CO3N50
CO3P50TERMINAL FUNCTIONSTERMINAL
NAME(NO.)vcc
1, 5, 9, 13vee
4, 8, 12, 16cip14cin
15
co1p
11
co1n
10
co2p7co2n6
co3p2
co3n3

Rev.: 2,TYPE

DESCRIPTIONPSPSInput

Power Supply: 3.3V / 0V
Power Supply: 0V / -3.3V
Differential CML high-speed signal inputs

OutputDifferential CML high-speed signal outputs

OutputDifferential CML high-speed signal outputs

OutputDifferential CML high-speed signal outputs

December 2008.

ASNT5121-PQD (Old # 5120/5021)

A D S A N T E C

A d v a n c e d
S c ie n c ea n d
N o v e l
T e c h n o lo g y

27 Via Porto Grande, Rancho Palos Verdes, CA, 90275.

Ph. # 1-310-377-6029.

Fax # 1-310-377-9940.

ELECTRICAL CHARACTERISTICSPARAMETER
VEE
VCC
IEE
Power
Junction Temp.
Input Data-Clock
Data rate/Frequency
CM Level
Swing (Diff or SE)
Duty Cycle
Out Data-Clock
Data rate/Frequency
CM Level
SE Swing
Rise/Fall Times
Additive Jitter
Duty Cycle

MIN TYP MAX-3.1
0.0 / -3.3-3.5
3.1
3.3 / 0.0
3.5
175
560-2550
125UNIT
VVmA
mW°C

0.026/13
Vcc-0.8 Vcc-0.2 Vcc
50400
1000
40% 50% 60%

Gbps-GHzVmV0.026/13
Gbps-GHz
Vcc-0.25 Vcc-0.2 Vcc-0.15
V
380 400
420
mV131517ps
5ps
45% 50% 55%

COMMENTS±6%±6%

Peak-to-peak
For clock signal

Peak-to-peak
20%-80%Peak-to-peak
For clock signal

PACKAGE INFORMATIONThe chip is packaged in a standard 16-pin QFN package. The package’s mechanical information
is available on the company’s website.

Rev.: 2,December 2008.

ASNT5121-PQD (Old # 5120/5021)