Impact Objectives• Study the design tool development and combinatorial optimisation algorithms• Develop a methodology to change the way code is generated and adapted forprocessing applications• Support automatic mapping of systems and software modules to hardware
modulesIntelligent collaboration for
intelligent systems

Working in parallel
Researchers in Japan have formed a partnership between academic and industry players to develop
a breakthrough methodology that may change the way in which code is generated and adapted forprocessing applications

The pace of technology’s advancements isMasaki Gondo, of software company eSOL, and Professor Masato Edahiro, from Nagoya University,discuss their collaboration on the eMBP (Model Based Parallelizer) project to develop a tool which
automatically generates parallel codes for multi- and many-core systems

Masaki Gondo

Professor Masato
EdahiroCan you talk a little about your own researchand development background?
ME: In the 1980s, one of the largest
application areas for graph theory was
Electronic design automation (EDA) for
semiconductors, so I got a job with asemiconductor vendor after studying inthis area at graduate school. I researched
EDA design tool development andcombinatorial optimisation algorithm, thenmoved to multi-core processor researchand development. I found that the mostimportant factor in improving system
performance on a multi-core processor issystem and software division and mappingto the processor and this led me to returnto the study of design tool development andcombinatorial optimisation algorithms.
MG: I am Chief Technology Officer andHead of the Technology Headquarters
division at eSOL, an independent software
vendor that provides POSIX/AUTOSAR/
TRON RTOS, and various embedded
software development tools and engineering
services. I have worked for more than 20
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years in Operating System (OS) architecture
and related technologies for use in a wide
range of embedded system applications
including automotive, industrial andelectronic appliances. For the last decadeor so, the specific items I have beenworking on include a scalable heterogenous
multi- and many-core OS, application
parallelisation tools, domain-knowledgebased machine-learned driver models,
Scrum development and functional safety.

that the hardware description can be written
once and then used by different tools,
forming an ecosystem while avoiding theneed for different vendors to adapt theirtools to new hardware. The result is thateveryone wins – hardware vendors with agood tool ecosystem, tool vendors with lowcost and shorter time-to-market to support
various hardware and system designers
with a choice of options to fit their specificneeds.

What are some of the challenges you haveexperienced with this latest collaborative
research project?

ME: In our research, it is necessary
to match various types of system andsoftware modules with various types of
hardware modules while acknowledging
their respective hierarchies and creating
an optimal mapping plan. We also needto estimate the performance of eachsystem and software module on eachhardware module, so we are promoting theinternational standardisation of SHIM.

MG: From eSOL’s perspective, one of thebiggest challenges is to get system andsoftware developer communities to see
the problem of software parallelisationand to learn about emerging technologies
like eMBP that are capable of solving
this. Without technologies like eMCOS
and eMBP, the challenge of developing
and producing game-changing intelligent
systems like autonomous driving will bevery hard. Another challenge involves theefficient exchange of useful information
between hardware and software designers.
One avenue we are investing in is the open
standard specification SHIM (SoftwareHardware Interface for Multi-manycore),a standard XML schema used to describe
hardware architecture with performance
information for software tools. The idea is

What is the ultimate impact of this work?
MG: Intelligent systems like automateddriving require an unprecedented level ofperformance. This needs to be achievedin a very power-efficient way. This requires
the use of heterogeneous multi-manycore
computing. Our OS technology and MBP
will be essential parts of the whole equation
to realise this intelligent system. l

ever-increasing and intelligent systems, suchas those found in robots and vehicles, havebecome larger and more complex. These
intelligent systems have a heterogeneousstructure, comprising a mixture of modules
such as artificial intelligence (AI) andpowertrain control modules that facilitate
large-scale numerical calculation andreal-time periodic processing functions.
Information technology expert Professor
Masato Edahiro, from the Graduate Schoolof Informatics at the Nagoya University inJapan, explains that concurrent advancesin semiconductor research have led to theminiaturisation of semiconductors, allowing agreater number of processors to be mounted
on a single chip, increasing potential
processing power. ‘In addition to generalpurpose processors such as CPUs, a mixtureof multiple types of accelerators such as
GPGPU and FPGA has evolved, producing amore complex and heterogeneous computerarchitecture,’ he says.
Edahiro and his partners have been working
on the eMBP, a model-based parallelizer(MBP) that offers a mapping system as anefficient way of automatically generating
parallel code for multi- and many-coresystems. This ensures that once the hardware
description is written, eMBP can bridge
the gap between software and hardware
to ensure that not only is an efficient
ecosystem achieved for hardware vendors,
but the need for different software vendors
to adapt code for their particular platforms
is also eliminated. This benefits all major
stakeholders, with tool vendors achieving
lower costs and quicker development timeand hardware and system designers gaining

a wider choice of options for their individualneeds. ‘The eMBP concerns mapping systemand software function modules to hardware
function modules for the purpose ofoperating a system in parallel and executing
it efficiently,’ elaborates Edahiro. ‘We aim tofacilitate the design of large-scale complex
systems in the future by using MBP as thecore and combining it with various upstream
design and implementation support tools.’
The progress of this invaluable tool has been
dependant on a solid collaboration between
academic and industrial interests. Nagoya
University has partnered with eSOL Co.,
Ltd., and Renesas Electronics in this project.
‘Our results are effective only in association
with basic software on a high-performancesemiconductor with low power consumption.
Therefore, our collaboration with eSOL,
as the basic software vendor, and Renesas
Electronics, as the semiconductor vendor, isextremely important to our research,’ says
Edahiro. The results achieved by Edahiro’s
team are being commercialised by eSOL andhave so far been used in the developmentof energy-saving, high-performance systemdesign, and development tools that the grouphopes will benefit many users worldwide.
THE IMPORTANCE OF PARALLELIZATION
Edahiro leads the Parallel and Distributed
Systems Lab (PDSL) at Nagoya University,driving research that focuses on modelbased parallelization. Parallelization is aprocess that is divisible into three key areas:
automatic generation; verification; andthe parallelized algorithm. It is a processthat allows solutions to be reached much
more quickly. ‘This is achieved by breaking
problems down into chunks and using

existing resources on more than one chunkat the same time,’ outlines Edahiro. ‘Assuch, parallelization plays a critical partin the effective use of larger numbers ofprocessors in high-performance processing.’
Consideration of the key features demandedof the resulting system and softwaremodules must be factored into the design
process and mapped to the hardware
modules to produce an efficient hierarchicalheterogeneous system. This enables it toexecute the software modules in parallelusing appropriate hardware. ‘The mapping
is not easy to accomplish because the logicalhierarchy of systems and software, and thephysical hierarchy of hardware generally
evolve in completely different ways,’ states
Edahiro.
Tackling the most efficient methodof parallelizing programme code forhomogenous processors, such as
supercomputers, is an area in which a great
deal of research has been conducted. No
single method has so far been developed
to address where applications include
large matrix calculations as well as systems
with complex hierarchical heterogeneousstructures. ‘Where the system structure
is a factor to consider in the realisation ofan efficient system, once the programme
code has been implemented, subsequent
restructuring becomes complicated,’
Edahiro highlights. ‘By contrast, MBP,
which parallelizes systems using models
that are abstractions of system softwareand hardware, facilitates such restructuring
because the models hold the structures ofthe system, software and hardware withinthemselves.’
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Industry expectations for MBP are
increasing as they offer better solutions forheterogeneous structures. This approachallows optimal mapping to be carried out at
the model level, making it possible to detectany mismatch between the hierarchicalheterogeneous structure of the hardware withthat of the systems and software at a muchearlier stage. This means that any necessary
system restructuring can be carried out at an
early stage of the process, thus significantly
reducing design time. The project teamhopes that this will prove to become amajor paradigm shift in system design
methodology.
DELIVERING PERFORMANCE
Using parallelization can help deliver
faster performance with lower energy
requirements than operating on a serial
processing basis. ‘Power consumption is
proportional to the square or the cube of
the operating frequency,’ Edahiro notes.
‘Therefore, if the process is divided into
four parts and executed on four separate 2.5
GHz processors, it can be executed in thesame processing time and with lower power
consumption than is necessary when it isexecuted on a single 10 GHz processor.’ In an
application such as automated driving, whereboth the processing and kinetic needs ofthe vehicle must be catered to, it is vital thatboth functions are able to operate energyefficiently. Masaki Gondo, Chief Technology
Officer of eSOL, one of the industrial partners
in this project, explains this means that
benefits can be realised on a global scale bythose utilising digital information. ‘Our OS
technology and MBP will be essential partsof the whole equation to realise such an
intelligent system,’ he confirms.
The team further hopes to showcase theirwork as a new design methodology anddevelopment process based on MBP andseek to share it with the world at large. ‘For
MBP to be accepted in relevant design fields,
it is necessary that design methodology anddevelopment processes that use MBP as well
as model level estimation methods that use
SHIM are widely accepted,’ says Edahiro.
The group is also collaborating with theMulticore Association and the Institute ofElectrical and Electronics Engineers (IEEE)
to international standardisation of SHIM to
facilitate estimation of system and module
performance.
TOWARDS THE FUTURE
While widespread use of MBP in thesupercomputing industry is yet to come, thegroup has fielded considerable interest in thework so far, with ongoing trials in progressin partnership with multiple manufacturersof intelligent systems. This collaboration
has led to a number of additional side
projects, including their efforts on developing
international standards for SHIM. ‘Without
MBP, we may not even have come up with
the idea of standardising the hardware
description, and we believe the standard will
be a foundation to the proliferation of thiskind of technology,’ Gondo says.
Edahiro and his colleagues continue to drive

the development of the eMBPs, streamlining
the process of parallelization in processing
technology. They hope to extend theircollaboration further to include groups inother areas of the world, especially in Europe,
perhaps extending the philosophy behindthe processing of technology to their own
research workflows. l

Project Insights
BACKGROUNDThis article is based on results obtained
from a project commissioned by theNew Energy and Industrial Technology
Development Organization (NEDO).
COLLABORATORS
Embedded Multicore Consortium
W: https://www.embeddedmulticore.org/
CONTACTProfessor Masato Edahiro
T: +81 52 789 2795
E: eda@ertl.jp
W: https://www.pdsl.jp/BIOS
Professor Masato Edahiro is a professorof the Department of Computing andSoftware Systems, the Graduate Schoolof Informatics, Nagoya University, where
he focuses on combinatorial optimisationin graph and network algorithms andsoftware and development tools for multiand many-core processors.
Masaki Gondo is CTO at eSOL Co., Ltd.
He also acts as an architect of AUTOSAR
Adaptive Platform specification, IEEE
C/DA/SHIM WG Chair, Multicore
Association SHIM Working Group chair, Vicechair of Embedded Multicore Consortium,Chief Architect for AUBASS and a visitingresearch fellow at Advanced Multicore
Processor Research Institute at Waseda
University, among other roles and positions.

More detail on what the eMBP does and what this connection means is provided in the article itself.

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