CMOS IC Application Note

S-8209B Series

Usage Guidelines Rev.1.5_02© ABLIC Inc., 2008-2015

The S-8209B Series is a battery protection IC with the cell-balance function.
This application note is a guideline on the typical connection examples when using the S-8209B Series for applications.
Refer to the datasheet for details and spec of this IC.
It is possible to configure the following applications with the S-8209B Series.
 A protection circuit with series multi-cell; 2 cells or more
 A battery protection circuit with cell-balance function

 Protection circuit with S-8209B Series for series multi-cells

S-8209B

S-8209B

S-8209B

1

S-8209B Series

CMOS IC Application Note
Rev.1.5_02

Usage Guidelines

Contents

1. Protection circuit with S-8209B Series (without discharge cell-balance function)
for series multi-cells ................................................................................................................................ 3
1. 1 Connection example of battery protection IC .................................................................................................... 3
1. 2 Operation .......................................................................................................................................................... 4
1. 2. 1 Normal status ............................................................................................................................................ 4
1. 2. 2 Status to inhibit charge.............................................................................................................................. 5
1. 2. 3 Status to inhibit discharge ......................................................................................................................... 6
1. 2. 4 Charge cell-balance function ..................................................................................................................... 7
1. 2. 5 Delay circuit .............................................................................................................................................. 7
1. 3 Timing chart ...................................................................................................................................................... 8
1. 3. 1 Overcharge detection ................................................................................................................................ 8
1. 3. 2 Overdischarge detection ........................................................................................................................... 9
1. 4 Demonstration data of charge cell-balance detection ..................................................................................... 10
1. 4. 1 High ratio of bypass current to charge current ........................................................................................ 10
1. 4. 2 Low ratio of bypass current to charge current ......................................................................................... 11

2. Protection circuit with S-8209B Series (with discharge cell-balance function)
for series multi-cells .......................................................................................................................................... 12
2. 1 Connection example of battery protection IC .................................................................................................. 12
2. 2 Operation ........................................................................................................................................................ 13
2. 3 Timing chart of overdischarge detection ......................................................................................................... 14
2. 4 Demonstration data of discharge cell-balance detection ................................................................................. 15

3. Example of application circuit .............................................................................................................. 16
4. External Components list...................................................................................................................... 17
5. Precaution .............................................................................................................................................. 18
6. Related source ....................................................................................................................................... 18

2

CMOS IC Application Note
Rev.1.5_02

S-8209B Series

Usage Guidelines

1. Protection circuit with S-8209B Series (without discharge cell-balance function)
for series multi-cells
In the connection of the S-8209B Series, connecting the CTLC, CTLD pins to the CO, DO pins allows to configure a
protection circuit for series-connected batteries.

1. 1

Connection example of battery protection IC
Figure 1 shows the example of protection circuit with S-8209B for series multi-cells.

CFET

DFET

P
RCO4

RDO4

RDO5

RDO8
P2

P1

RCTLD0

RCTLC

CO1
VDD
CVSS RPASS
CDT
DO1
CBFET1
S-8209B(1)
CB1
BAT1
CTLC1
VSS1
CTLD1
RCB RVSS

RCTLD
RDO1

RDO7

RCTLC

RDO6

RCO2
QCO

QDO
RCO3

P

RemarkRDO2

Refer to “4.

RCTLC0

RCTLD

CO2

VDD

CO3

VDD

CVSS RPASS
CDTDO2
CBFET2
S-8209B(2)
CB2
BAT2
CTLC2
VSS2
CTLD2
RCB RVSS
CCDT CVSS
RPASS
CDT
DO3
CBFET3
S-8209B(3)
CB3
BAT3
CTLC3
VSS3
CTLD3
RCB RVSS

RDO3External components list” for constants of external components.
Figure 1

Caution 1. The above constants may be changed without notice.
2. The example of connection shown above and the constant do not guarantee proper operation.
Perform thorough evaluation using the actual application to set the constant.

3

S-8209B Series

1. 2

CMOS IC Application Note
Rev.1.5_02

Usage Guidelines

Operation

Following is about the operation of protection circuit with S-8209B for series multi-cell shown in Figure 1.
1. 2. 1

Normal status

Following is about the operation of S-8209B Series in the normal status.
The S-8209B goes in the normal status;
In the S-8209B (1), The CTLC1, CTLD1 pins are pulled up to the level of VDD1 pin, BAT1 is more than theoverdischarge detection voltage (VDL) and less than the overcharge detection voltage (VCU). The CO1, DO1 pins
get the level of VDD1 pin.
In the S-8209B (2), The CTLC2, CTLD2 pins are pulled up to the level of VDD1 pin by the CO1, DO1 pins, BAT2
is more than VDL and less than VCU. The CO2, DO2 pins get the level of VDD2 pin.
In the S-8209B (3), The CTLC3, CTLD3 pins are pulled up to the level of VDD2 pin by the CO2, DO2 pins, BAT3
is more than VDL and less than VCU. The CO3, DO3 pins get the level of VDD3 pin.
The status of each pin in the normal status is shown in Table 1.
Table 1
CTLC pin
CTLC1 = VDD1
CTLC2 = VDD1
CTLC3 = VDD2CTLD pin
CTLD1 = VDD1
CTLD2 = VDD1
CTLD3 = VDD2

Status of battery
VDL  BAT1  VCU
VDL  BAT2  VCU
VDL  BAT3  VCU

CO pinCO1 = VDD1
CO2 = VDD2
CO3 = VDD3

DO pinDO1 = VDD1
DO2 = VDD2
DO3 = VDD3The S-8209B (3) in the normal status turns on the charge control FET (CFET) and the discharge control FET(DFET) via transistors (QCO, QDO, P1, P2) externally set to each CO3 and DO3 pin.
Therefore it is possible to charge/discharge by a charger or a load connected between P and P.

4

CMOS IC Application Note
Rev.1.5_02

1. 2. 2

S-8209B Series

Usage Guidelines

Status to inhibit charge

Following is about the status to inhibit charge, for example, the S-8209B (1) detects overcharge, the S-8209B (2)and (3) are in the normal status.
The S-8209B (1) goes in the overcharge status when BAT1 gets VCU or more by charging. The CO1 pin is set inhigh impedance.
The CTLC2 pin of the S-8209B (2) is pulled down to the level of VSS2 pin by the CTLC pin sink current (ICTLCL).
The CTLC2 pin gets the level of VSS2 pin by the high impedance CO1 pin. Thus the S-8209B (2) goes in theovercharge status after the level of CTLC2 pin gets the CTLC pin L voltage (VCTLCL) or less. The CO2 pin is set
in high impedance.
The CTLC3 pin of the S-8209B (3) is pulled down to the level of VSS3 pin by ICTLCL as well. The CTLC3 pin getsthe level of VSS3 pin by the high impedance CO2 pin. The S-8209B (3) also goes in the overcharge status after
the level of CTLC3 pin gets VCTLCL or less.
The status of each pin in this case is shown in Table 2.
Table 2
CTLC pin
CTLC1 = VDD1
CTLC2 = VSS2
CTLC3 = VSS3CTLD pin
CTLD1 = VDD1
CTLD2 = VDD1
CTLD3 = VDD2

Status of battery
VCU  BAT1
VDL  BAT2  VCU
VDL  BAT3  VCU

CO pinCO1 = High-Z
CO2 = High-Z
CO3 = High-Z

DO pinDO1 = VDD1
DO2 = VDD2
DO3 = VDD3The S-8209B (3) in the overcharge status turns off the CFET via a bipolar transistor (QCO) set externally to theCO3 pin. In this case, charging via a charger connected between P and P is inhibited.
By this operation the overcharge status is transmitted from the top (S-8209B (1)) to the bottom (S-8209B (3)),
from the CO pin to the CTLC pin.
Charging is also inhibited; BAT2 or BAT3 gets VCU or more.

5

S-8209B Series

1. 2. 3

CMOS IC Application Note
Rev.1.5_02

Usage Guidelines

Status to inhibit discharge

Following is the status to inhibit discharge, for example, the S-8209B (1) detects overdischarge, the S-8209B (2)and (3) are in the normal status.
The S-8209B (1) goes in the overdischarge status when BAT1 gets VDL or less by discharging. The DO1 pin is
set in high impedance.
The CTLD2 pin of the S-8209B (2) is pulled down to the level of VSS2 pin by the CTLD pin sink current (ICTLDL).
The CTLD2 pin gets the level of VSS2 pin by the high impedance DO1 pin. Thus the S-8209B (2) goes in theoverdischarge status after the level of CTLD2 pin gets the CTLD pin L voltage (VCTLDL) or less. The DO2 pin is
set in high impedance.
The CTLD3 pin of the S-8209B (3) is pulled down to the level of VSS3 pin by ICTLDL as well. The CTLD3 pin getsthe level of VSS3 pin by the high impedance DO2 pin. The S-8209B (3) also goes in the overdischarge status
after the level of CTLD3 pin gets VCTLDL or less.
The status of each pin in this case is shown in Table 3.
Table 3
CTLC pin
CTLC1 = VDD1
CTLC2 = VDD1
CTLC3 = VDD2CTLD pin
CTLD1 = VDD1
CTLD2 = VSS2
CTLD3 = VSS3

Status of battery
BAT1  VDL
VDL  BAT2  VCU
VDL  BAT3  VCU

CO pinCO1 = VDD1
CO2 = VDD2
CO3 = VDD3

DO pinDO1 = High-Z
DO2 = High-Z
DO3 = High-Z

The S-8209B (3) in the overdischarge status turns off the DFET via transistors (QDO, P1, P2) externally set to theDO3 pin. In this case, discharging to a load connected between P and P is inhibited.
By this operation the overdischarge status is transmitted from the top (S-8209B (1)) to the bottom (S-8209B (3)),
from the DO pin to the CTLD pin.
Charging is also inhibited; BAT2 or BAT3 gets VDL or less.

6

CMOS IC Application Note
Rev.1.5_02

1. 2. 4

S-8209B Series

Usage Guidelines

Charge cell-balance function

In Figure 1, The S-8209B (1) sets the CB1 pin at the level of VDD1 pin when BAT1 gets the cell-balance
detection voltage (VBU) or more by charging. By this operation, the cell-balance control FET (CBFET1) is turned
on so that the cell-balance control FET bypasses the charge current which flows into BAT1.
At this point, if BAT2, BAT3 are less than VBU, the speed to charge BAT1 gets slower than to charge BAT2,
BAT3. This is the charge cell-balance function. Even if any of battery voltages reaches VBU, the cell-balance
control FET which corresponds to each battery turns on and the cell-balance is adjusted.
The S-8209B Series turns off the cell-balance control FET when the battery voltage decreases to thecell-balance release voltage (VBL) or less by discharging again.
Caution If a battery having the voltage VBL or more is included among batteries when composing aprotection circuit shown in Figure 1, the cell-balance control FET may turn on immediately
after connecting the batteries.
1. 2. 5

Delay circuit

Connecting a delay capacitor only to the CDT3 pin of the S-8209B (3), as seen in Figure 1, allows to gain thedetection delay time (tDET) and the release delay time (tREL). In detecting by any of batteries, each delay time isthe same length.
(1) Detection delay time (tDET)
BAT1 gets VCU or more by charging, the CTLC2 pin gets the level of VSS2 pin because a capacitor is notconnected to the CDT1 pin so that the CO1 pin is set in high impedance after delay of several hundred s.
After that in the S-8209B (2), the level of CTLC2 pin gets VCTLCL or less, after delay of several hundred s theCO2 pin is set in high impedance.
In the S-8209B (3), after delay of 10.0 [M] (Typ.)  0.01 [F] = 0.1 [s] (Typ.), the CO3 pin is set in highimpedance because CCDT is connected to the CDT3 pin.
Even if any of batteries detects, by this operation, users are able to gain the detection delay time almost thesame to delay time of the S-8209B (3), because it defines the whole delay time in the S-8209B Series.
(2) Release delay time (tREL)The S-8209B Series also has the release delay time (tREL), and this delay time is set its length as approx. 1/10of the detection delay time. Connecting a delay capacitor only to the CDT3 pin of the S-8209B (3) allows
having the same release delay time, as well as in the detection delay time.

7S-8209B Series

1. 3

CMOS IC Application Note
Rev.1.5_02

Usage Guidelines

Timing chart

1. 3. 1

Overcharge detection

VCU (1)VBU (1)
VBL (1)
VCL (1)

VDD1

VDD1

CB1

CB1
VSS (1)VCU (2)
VBU (2)
VBL (2)
VCL (2)
VDD2

VDD2

CB2

CB2

VSS (2)

tDET

tDET

VCU (3)

tREL

tREL

VBU (3)
VBL (3)
VCL (3)
VDD3

CB3

CB3

VDD3
VSS (3)

P
VDD1
VDD2
VDD3

CO1
CFET gate voltage

CO2
CO3

VSS3
*1

Charger connection
Load connection
Normal status*1.

Status to inhibit charge

In this period, the discharge current flows via a parasitic diode in the CFET.
Figure 28Normal status

CMOS IC Application Note
Rev.1.5_02

1. 3. 2

S-8209B Series

Usage Guidelines

Overdischarge detection

VDU (1)
VDL (1)VDD1VSS (1)VDD2
VDU (2)
VDL (2)

VSS (2)

tREL

tDET

VDD3
VDU (3)
VDL (3)

VSS (3)
VDD1
VDD2

DO1

VDD3

DO2

DFET gate voltage

DO3
VSS3
*1

Charger connection
Load connection
Normal status*1.

Status to inhibit discharge

Normal status

In this period, the charge current flows via a parasitic diode in the DFET.
Figure 39S-8209B Series

1. 4

CMOS IC Application Note
Rev.1.5_02

Usage Guidelines

Demonstration data of charge cell-balance detection

The demonstration data shows cell-balance for 3-series lithium ion rechargeable battery using the S-8209BAA.
1. 4. 1 High ratio of bypass current to charge current
Charger: a constant current charger (0.05 C = 145 mA)
S-8209BAA charge cell-balance, 0.05 C constant current charger
Absolute value of battery voltage [V]4.2
Overcharge detection

Cell-balance detection

VCU

4.1

VBU
BAT3

4.0

VBL = VCL

BAT2
BAT1
3.9

3.8
0

60

120

180

240

300

360

420

480

Time [min.]Charger connection
CB1
CBFET1 on
CB2
CBFET2 on
CB3CBFET3 on
CFET Gate

Figure 4
Test conditions
Test circuit: Figure 1
IC: S-8209BAA (VCU = 4.100 V, VCL = 4.000 V, VBU = 4.050 V, VBL = 4.000 V, VDL = 2.500 V, VDU = 2.700 V)
Battery: 3-series cell lithium ion rechargeable battery, Nominal capacitance: 2.9 Ah, Size: 18650
RPASS: 51  (1 W)  Bypass current = 4.1 V / 51  = 80 mA

10

CMOS IC Application Note
Rev.1.5_02

1. 4. 2

S-8209B Series

Usage Guidelines

Low ratio of bypass current to charge current

When the ratio of bypass current to charge current is low, repeating cell-balance cycle enables to adjustcell-balance.
Charger: a constant current charger (0.1 C = 290 mA)
S-8209BAA charge cell-balance, 0.1 C constant current charger
Absolute value of battery voltage [V]

4.2
VCU

4.1
BAT3

VBU
VBL = VCL

4.0
BAT2
BAT1

3.9

3.8
0

60

120

180

240

300

360

420

480

Time [min.]Charger connection

Figure 5
Test conditions
Test circuit: Figure 1
IC: S-8209BAA (VCU = 4.100 V, VCL = 4.000 V, VBU = 4.050 V, VBL = 4.000 V, VDL = 2.500 V, VDU = 2.700 V)
Battery: 3-series cell lithium ion rechargeable battery, Nominal capacitance: 2.9 Ah, Size: 18650
RPASS: 51  (1 W)  bypass current = 4.1 V / 51  = 80 mA

11

S-8209B Series
2.

CMOS IC Application Note
Rev.1.5_02

Usage Guidelines

Protection circuit with S-8209B Series (with discharge cell-balance function) for
series multi-cells
2. 1Connection example of battery protection IC

Setting bipolar transistors (QCTLD1, QCTLD2) allows adding the function to transmit the overdischarge status from thebottom (S-8209B (3)) to the top (S-8209B (1)).

DFET

CFET

RDO8

P
RCO4

RDO5 RCTLD1RDO4QCTLD1P2

P1

RCTLD4QCTLD2

RCTLD2

RCTLC0

RCTLC
RCTLD

CO1
RCTLD0RCTLD3
RDO1

RDO7

VDD1
CDT1
DO1
S-8209B(1)
CB1
CTLC1
CTLD1 VSS1 R

CB

RCTLC
RDO6

RCO2
RCO3

P

Remark

RDO2
QDO

QCO

Refer to “4.

RCTLD

CVSS
CBFET1

RPASS
BAT1

RVSS

CO2
VDD2
CVSS
CDT2
DO2
CBFET2
S-8209B(2)
CB2
CTLC2
VSS2
CTLD2
RCB RVSS

RPASS
BAT2

VDD3
CO3
CCDT CVSS
CDT3
DO3
CBFET3
S-8209B(3)
RPASS
CB3
BAT3
CTLC3
VSS3
CTLD3
RCB RVSS

RDO3External components list” for constants of external components.
Figure 6

Caution 1. The above constants may be changed without notice.
2. The example of connection shown above and the constant do not guarantee proper operation.
Perform thorough evaluation using the actual application to set the constant.

12

CMOS IC Application Note
Rev.1.5_02

2. 2

S-8209B Series

Usage Guidelines

Operation

Following is about the operation of protection circuit with S-8209B for series multi-cell shown in Figure 6.
Setting bipolar transistors (QCTLD1, QCTLD2) to the circuit in Figure 6 allows adding the function to transmit theoverdischarge status from the bottom (S-8209B (3)) to the top (S-8209B (1)). By this, even if any IC among theS-8209B (1) to (3) first goes in the overdischarge status, it is possible to turn on all other cell-balance control FETs
(CBFET) of the S-8209B Series. Thus cell-balance is certainly adjusted.
Following is about the operation in the status to inhibit discharge, when the S-8209B (2) detects overdischarge,
and the S-8209B (1), (3) are in the normal status.
1. The S-8209B (2) goes in the overdischarge status when BAT2 decreases to VDL or less by discharging. The
DO2 pin is set in high impedance.
2. The S-8209B (3) also goes in the overdischarge status via the DO2 pin to the CTLD3 pin.
3. The S-8209B (3) turns on the cell-balance control FET (CBFET3) by the discharge cell-balance function.
4. The S-8209B (3) in the overdischarge status turns off DFET via a transistor (QDO, P1, P2) and inhibits
discharging to a load connected between P and P.
5. The Ppin is pulled down by a load connected between P and P.
6. QCTLD1, QCTLD2 are turned off and the CTLD1 pin of the S-8209B (1) is set in high impedance.
7. The S-8209B (1) also goes in the overdischarge status. The cell-balance control FET (CBFET1) turns on by thedischarge cell-balance function.
As mentioned above, even in case that the S-8209B (2) first detects overdischarge by voltage drop in BAT2, theoverdischarge status is transmitted from the S-8209B (3) to S-8209B (1) via QCTLD1, QCTLD2. As a result all (1) to (3)of the S-8209B go in the overdischarge status so that cell-balance is adjusted by the discharge cell-balance
function, when each BAT is more than VDL. The cell-balance FET which corresponds to each battery turns off by
the voltages of BAT1 to 3 that decreased to VDL or less.
And QCTLD1, QCTLD2 are turned on by connecting a charger between P and P after inhibit discharging, and the
CTLD1 pin is pulled up to the level of VDD1 pin. In this case, the cell-balance control FET (CBFET1) turns off
although the voltage of BAT1 does not reach VDL or less.
CautionIf a battery having the voltage VBL or more, or a battery having the voltage overdischarge releasevoltage (VDU) or less is not included among batteries when composing a protection circuit shown in
Figure 6, the cell-balance control FET may turn on immediately after connecting the battery. To turnoff the cell-balance control FET, connect a charger between P and P.

13

S-8209B Series

2. 3

CMOS IC Application Note
Rev.1.5_02

Usage Guidelines

Timing chart of overdischarge detection

VDD1
VDU (1)
VDL (1)CB1

CB1

VSS (1)

VDU (2)
VDL (2)VDD2VSS (2)

tREL

tDET

tREL

VDD3
VDU (3)
VDL (3)CB3

CB3

VSS (3)VDD1
DO1

DFET gate voltage

VDD2
DO2
VDD3
DO3
VSS3
*1

Charger connection
Load connection
Normal status*1.

Status to inhibit discharge

In this period, the charge current flows via a parasitic diode in the DFET.
Figure 714

Normal status

CMOS IC Application Note
Rev.1.5_02

2. 4

S-8209B Series

Usage Guidelines

Demonstration data of overdischarge cell-balance detection

The demonstration data shows cell-balance for 3-series lithium ion rechargeable battery using the S-8209BAA.
S-8209BAA discharge cell-balance

Absolute value of battery voltage [V]

3.5
3.4

BAT2

3.3
3.2
3.1
3.0

BAT3

2.9

BAT1

2.8

VDU

2.7
2.6

VDL

2.5
2.4
0

200

400

600

800

1000

1200

1400

1600

1800

2000

Time [min.]Load connection
DFET Gate

Figure 8
Test conditions
Test circuit: Figure 6
IC: S-8209BAA (VCU = 4.100 V, VCL = 4.000 V, VBU = 4.050 V, VBL = 4.000 V, VDL = 2.500 V, VDU = 2.700 V)
Battery: 3-series cell lithium ion rechargeable battery, Nominal capacitance: 2.9 Ah, Size: 18650
RPASS: 51  (1 W)  bypass current = 2.5 V / 51  = 49 mA
Load: 100 Battery voltage’s oscillation
1. The cell-balance control FET turns off when the battery voltage decrease to the overdischarge detection voltage(VDL) or less.
2. Discharge via the cell-balance control FET stops so that the battery voltage rises.
3. The cell-balance control FET turns on when the battery voltage increases to the overdischarge release voltage(VDU) or more.
4. Discharge via the cell-balance control FET starts so that the battery voltage falls.
Repeating the procedures 1 to 4 enables to adjust cell-balance.

15

S-8209B Series

3.

CMOS IC Application Note
Rev.1.5_02

Usage Guidelines

Example of application circuit
In the application that intermediate pins are connected by connectors as seen in the application circuit below, safety isenhanced since both charge and discharge stop even if the intermediate pins are disconnected.

RCO4

RCTLC0

RDO4
P2

P1

RCTLD2

RCTLD4RCTLD

RCTLD3
RDO1 RDO7

VDD1

RDO6

CTLD1 VSS1

RCTLD

RCTLC

CO2

VDD2

DO2 CDT2
S-8209B(2)
CB2
CTLC2
CTLD2 VSS2
CO3

VDD3

DO3 CDT3
S-8209B(3)
CB3
CTLC3

RCTLD

RCTLC

CTLD3 VSS3

RCTLD

CO4
RCTLC

CVSS

DO1 CDT1
S-8209B(1)
CB1
CTLC1

RCTLD0RCTLC

CO1QCTLD2

RCO1

Welding or
Soldering

RCTLD1QCTLD1

P

RDO5

DFET
RDO8

CFET

VDD4

DO4 CDT4
S-8209B(4)
CB4
CTLC4
CTLD4 VSS4
CO5

RCB

BAT1

RVSS
CVSS

RPASS

BAT2

CBFET2
RCB

RVSS

CVSS

RPASS

BAT3
CBFET3
RCB

RVSS

CVSS

RPASS

BAT4
CBFET4
RCB

RVSS
CVSS

DO5 CDT5
S-8209B(5)
CB5
CTLC5
RCO2

Connector

CBFET1

VDD5

CTLD5 VSS5

RPASS

RPASS

CCDT
BAT5

CBFET5
RCB

RVSS

RDO2
QDO

QCO
P

RemarkRCO3

Refer to “4.

Welding or
Soldering

RDO3

External components list” for constants of external components.
Figure 916

CMOS IC Application Note
Rev.1.5_02
4.

S-8209B Series

Usage Guidelines

External components list
Table 4 shows external components in the connection examples in Figure 1, Figure 6 and Figure 9.
Table 4
SymbolTypicalUnit

Components
name

Maker

Remark－User setting

CBFET1 to
CBFET5
CFET
DFET
CCDT
CVSS
P1
P2
QCTLD1QCTLD2
QCO
QDO
RCB
RCO1
RCO2
RCO3
RCO4
RCTLC*1
RCTLC0RCTLD*1
RCTLD0RCTLD1RCTLD2
RCTLD3
RCTLD4
RDO1
RDO2
RDO3
RDO4
RDO5
RDO6
RDO7

－

－

－

－
－
－
0.1
－
－
－
－
－
－
10
1
510
1
1
1
1
1
1
1
4.7
1
4.7
1
510
1
1
1
1
1

－
－
－
F
－
－
－
－
－
－
M
M
k
M
M
k
k
k
k
M
M
M
M
M
k
M
M
M
M
M

－
－
－
GRM188
2SJ210C
2SJ210C
2SA1037AK
2SC2412K
2SC2412K
2SC2412K
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03

RDO8
RPASS*2
RVSS

1
－
470

M
－


MCR03
－
MCR03

－
－
－
Murata Manufacturing Co., Ltd.
Renesas Electronics Corporation
Renesas Electronics Corporation
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
ROHM CO., LTD.
－
ROHM CO., LTD.

User setting
User setting
User setting
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
Recommended
User setting
Recommended*1.

In order to prevent from damage when an overvoltage is applied to the IC, select RCTLC and RCTLD from 0to100 k.

*2.

Pay attention to the rated electric powers.

Caution 1.
2.

The above constants may be changed without notice.
The example of connection shown above and the constant do not guarantee proper operation.
Perform thorough evaluation using the actual application to set the constant.

3.

Select external components considering its pressure when configuring a series protection cellwith 5 cells or more.

17

S-8209B Series
5.

Usage Guidelines

CMOS IC Application Note
Rev.1.5_02

Precaution
 The usage described in this application note is typical example with our IC.
Perform evaluation fully before use.
 When designing for mass production using an application circuit described herein, the product deviation andtemperature characteristics of the external components should be taken into consideration. ABLIC Inc. shall notbear any responsibility for patent infringements related to products using the circuits described herein.
 ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement byproducts including this IC of patents owned by a third party.

6.

Related source
Refer to the following datasheet for details of the S-8209B Series.
S-8209B Series

Datasheet

The information described herein is subject to change without notice.
Contact our sales office for details.
Regarding the newest version, select product category and product name on our website, and download the PDF file.
www.ablic.com

18

ABLIC Inc. website

Disclaimers (Handling Precautions)1.

All the information described herein (product data, specifications, figures, tables, programs, algorithms andapplication circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.

2.

The circuit examples and the usages described herein are for reference only, and do not guarantee the success ofany specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any otherright due to the use of the information described herein.

3.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information describedherein.

4.

Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due tothe use of the products outside their specified ranges.

5.

Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.

6.

When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-relatedlaws, and follow the required procedures.

7.

The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,biological or chemical weapons or missiles, or use any other military purposes.

8.

The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.

9.

In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products areallowed to apply for the system on customer's own responsibility.

10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of thisdocument described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07

www.ablic.com