S-5743 A Series
www.ablic.com

125°C OPERATIONHIGH-WITHSTAND VOLTAGE HIGH-SPEEDBIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00© ABLIC Inc., 2015-2019

This IC, developed by CMOS technology, is a high-accuracy hall effect latch IC that operates with high temperature andhigh-withstand voltage.
The output voltage changes when this IC detects the intensity level of magnetic flux density and a polarity change. Using
this IC with a magnet makes it possible to detect the rotation status in various devices.
This IC includes an output current limit circuit.
High-density mounting is possible by using the small SOT-23-3S package.
Due to its high-accuracy magnetic characteristics, this IC enables the user to reduce the operational variation in the system.
ABLIC Inc. offers a "magnetic simulation service" that provides the ideal combination of magnets and our Hall effect ICs forcustomer systems. Our magnetic simulation service will reduce prototype production, development period and development
costs. In addition, it will contribute to optimization of parts to realize high cost performance.
For more information regarding our magnetic simulation service, contact our sales office.

 Features• Pole detection:• Output logic*1:• Output form:• Magnetic sensitivity*1:• Chopping frequency:• Output delay time:• Power supply voltage range:• Built-in regulator• Built-in output current limit circuit• Operation temperature range:• Lead-free (Sn 100%), halogen-free

Bipolar latch
VOUT = "L" at S pole detection
VOUT = "H" at S pole detection
Nch open-drain output
BOP = 0.5 mT typ.
BOP = 1.5 mT typ.
BOP = 2.2 mT typ.
BOP = 3.0 mT typ.
fC = 500 kHz typ.
tD = 8.0 μs typ.
VDD = 2.7 V to 26.0 V

Ta = −40°C to +125°C*1. The option can be selected.

 Applications• Power tool
• Home appliance• DC brushless motor• Housing equipment• Industrial equipment

 Package• SOT-23-3S

1

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
 Block Diagram
VDD

OUT
Regulator
Chopping
stabilized
amplifierOutput current limit circuit

VSS*1. Parasitic diodeFigure 12*1

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
 Product Name Structure
1.

Product nameS-5743

N

B

x

x

A -

M3T4

U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Package name (abbreviation) and IC packing specifications*1
M3T4: SOT-23-3S, Tape
Operation temperature
A: Ta = −40°C to +125°C
Magnetic sensitivity
9: BOP = 0.5 mT typ.
0: BOP = 1.5 mT typ.
8: BOP = 2.2 mT typ.
1: BOP = 3.0 mT typ.
Output logic
L: VOUT = "L" at S pole detection
H: VOUT = "H" at S pole detection
Pole detection
B: Bipolar latch
Output form
N: Nch open-drain output*1. Refer to the tape drawing.

2.

Package
Table 1

Package Name
SOT-23-3S

3.

Package Drawing Codes

Dimension
MP003-D-P-SD

Tape
MP003-D-C-SD

Reel
MP003-D-R-SD

Product name list
Table 2
Product Name

Output Form

Pole Detection

Output Logic

S-5743NBL9A-M3T4U Nch open-drain output Bipolar latch
VOUT = "L" at S pole detection
S-5743NBL0A-M3T4U Nch open-drain output Bipolar latch
VOUT = "L" at S pole detection
S-5743NBL8A-M3T4U Nch open-drain output Bipolar latch
VOUT = "L" at S pole detection
S-5743NBL1A-M3T4U Nch open-drain output Bipolar latch
VOUT = "L" at S pole detection
S-5743NBH9A-M3T4U Nch open-drain output Bipolar latch
VOUT = "H" at S pole detection
S-5743NBH1A-M3T4U Nch open-drain output Bipolar latch
VOUT = "H" at S pole detection
Remark Please contact our sales office for products other than the above.

Magnetic
Sensitivity (BOP)
0.5 mT typ.
1.5 mT typ.
2.2 mT typ.
3.0 mT typ.
0.5 mT typ.
3.0 mT typ.

3

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
 Pin Configuration
1.

SOT-23-3S
Table 3Top view

Pin No.

1

2

SymbolDescription

1

VSS

GND pin2

VDD

Power supply pin

3

OUT

Output pin

3

Figure 2

 Absolute Maximum Ratings
Table 4
Item

Symbol(Ta = +25°C unless otherwise specified)Absolute Maximum Rating
Unit

Output current

IOUT

VSS − 0.3 to VSS + 28.0
20Output voltage

VOUT

VSS − 0.3 to VSS + 28.0

V

Operation ambient temperatureTopr−40 to +125

°C

Storage temperature

Tstg−40 to +150

°CPower supply voltage

VDD

V
mA

Caution The absolute maximum ratings are rated values exceeding which the product could suffer physicaldamage. These values must therefore not be exceeded under any conditions.

 Thermal Resistance Value
Table 5
Item

SymbolCondition

Board A
Board B
*1
Junction-to-ambient thermal resistanceSOT-23-3S
θJA
Board C
Board D
Board E
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark4

Refer to " Power Dissipation" and "Test Board" for details.

Min.

Typ.

Max.

Unit

−
−
−
−
−

200
165
−
−
−

−
−
−
−
−

°C/W
°C/W
°C/W
°C/W
°C/W

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series Electrical Characteristics
Table 6Item

(Ta = +25°C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
TestCondition
Min.
Typ. Max.
Unit
Circuit

SymbolPower supply voltage
Current consumption
Output voltage
Leakage current
Output limit current
Output delay time
Chopping frequency
Start up time
Output rise time
Output fall time

VDD
IDD
VOUT
ILEAK
IOM
tD
fC
tPON
tR
tF

−
Average value
IOUT = 10 mA
Output transistor Nch, VOUT = 26.0 V
VOUT = 12.0 V−−−
C = 20 pF, R = 820 Ω
C = 20 pF, R = 820 Ω

2.7
−
−
−
22
−
−
−
−
−

12.0
3.0
−
−
−
8.0
500
20
−
−

26.0
4.0
0.4
1
70
−
−
−
2.0
2.0

V
mA
V
μA
mA
μs
kHz
μs
μs
μs

−
1
2
3
3
−
−
4
5
5

S poleMagnetic flux density
applied to this IC (B)

BOP
0
BRP
N poletD

tD
tF

Output voltage (VOUT)(Product with VOUT = "L"at S pole detection)

tR

90%

10%
tD

tD
tR

tF

90%
Output voltage (VOUT)(Product with VOUT = "H"at S pole detection)
10%

Figure 3

Operation Timing5125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series Magnetic Characteristics
1.

Product with BOP = 0.5 mT typ.
Table 7
(Ta = +25°C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
Item
Operation point*1
Release point*2
Hysteresis width*3

2.

SymbolS poleN pole

BOP
BRP
BHYS

Condition−−
BHYS = BOP − BRP

Min.
−0.5
−1.5
−

Typ.
0.5
−0.5
1.0

Max.
1.5
0.5
−

Unit
mT
mT
mT

Test Circuit
4
4
4

Product with BOP = 1.5 mT typ.
Table 8(Ta = +25°C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
Item
Operation point*1
Release point*2
Hysteresis width*3

3.

SymbolS poleN pole

BOP
BRP
BHYS

Condition−−
BHYS = BOP − BRP

Min.
0.5
−2.5
−

Typ.
1.5
−1.5
3.0

Max.
2.5
−0.5
−

Unit
mT
mT
mT

Test Circuit
4
4
4

Product with BOP = 2.2 mT typ.
Table 9(Ta = +25°C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
Item
Operation point*1
Release point*2
Hysteresis width*3

4.

SymbolS poleN pole

BOP
BRP
BHYS

Condition−−
BHYS = BOP − BRP

Min.
1.2
−3.2
−

Typ.
2.2
−2.2
4.4

Max.
3.2
−1.2
−

Unit
mT
mT
mT

Test Circuit
4
4
4

Product with BOP = 3.0 mT typ.
Table 10
(Ta = +25°C, VDD = 12.0 V, VSS = 0 V unless otherwise specified)
Item
Operation point*1
Release point*2
Hysteresis width*3

SymbolS poleN pole

BOP
BRP
BHYS

Condition−−
BHYS = BOP − BRP

Min.
2.0
−4.0
−

Typ.
3.0
−3.0
6.0

Max.
4.0
−2.0
−

Unit
mT
mT
mT

Test Circuit
44
4*1. BOP: Operation point
BOP is the value of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux density
applied to this IC by the magnet (S pole) is increased (by moving the magnet closer).
VOUT retains the status until a magnetic flux density of the N pole higher than BRP is applied.
*2. BRP: Release point
BRP is the value of magnetic flux density when the output voltage (VOUT) changes after the magnetic flux density
applied to this IC by the magnet (N pole) is increased (by moving the magnet closer).
VOUT retains the status until a magnetic flux density of the S pole higher than BOP is applied.
*3. BHYS: Hysteresis width
BHYS is the difference of magnetic flux density between BOP and BRP.
Remark6

The unit of magnetic density mT can be converted by using the formula 1 mT = 10 Gauss.

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
 Test Circuits
A
R
820 Ω

VDD

VDD
S-5743 OUT
A Series
VSS

S-5743 OUT
A Series
VSS

Figure 4

Figure 5

Test Circuit 1

S-5743 OUT
A Series
VSS

Figure 6

V

Test Circuit 3

VDD
S-5743 OUT
A Series
VSS

Figure 8

S-5743 OUT
A Series
VSS

A

Figure 7

V

Test Circuit 2

VDD

VDD

A

R
820 Ω

V

Test Circuit 4

R
820 Ω

C
20 pF

V

Test Circuit 57

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
 Standard Circuit

VDD
CIN
0.1 μFR
820 Ω

S-5743
A Series OUT
VSS

Figure 9
Caution The above connection diagram and constants will not guarantee successful operation. Perform
thorough evaluation using the actual application to set the constants.

8

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
 Operation
1.

Direction of applied magnetic flux
This IC detects the magnetic flux density which is vertical to the marking surface.
Figure 10 shows the direction in which magnetic flux is being applied.

N
S
Marking surface

Figure 10

2.

Position of Hall sensor

Figure 11 shows the position of Hall sensor.
The center of this Hall sensor is located in the area indicated by a circle, which is in the center of a package as
described below.
The following also shows the distance (typ. value) between the marking surface and the chip surface of a package.
Top view
The center of Hall sensor,
in this φ0.3 mm

1

2

3

0.315 mm (typ.)Figure 119125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
3.

Basic operation
This IC changes the output voltage (VOUT) according to the level of the magnetic flux density (N pole or S pole) and apolarity change applied by a magnet.
3. 1

Product with VOUT = "L" at S pole detection
When the magnetic flux density of the S pole perpendicular to the marking surface exceeds the operation point(BOP) after the S pole of a magnet is moved closer to the marking surface of this IC, VOUT changes from "H" to "L".
When the N pole of a magnet is moved closer to the marking surface of this IC and the magnetic flux density of the
N pole is higher than the release point (BRP), VOUT changes from "L" to "H". In case of BRP < B < BOP, VOUT retains
the status. Figure 12 shows the relationship between the magnetic flux density and VOUT.
VOUT

BHYS
H

L
N pole

0

BRP

BOP

S poleMagnetic flux density (B)Figure 12
3. 2

Product with VOUT = "H" at S pole detection
When the magnetic flux density of the S pole perpendicular to the marking surface exceeds BOP after the S pole of amagnet is moved closer to the marking surface of this IC, V OUT changes from "L" to "H". When the
N pole of a magnet is moved closer to the marking surface of this IC and the magnetic flux density of the N pole ishigher than BRP, VOUT changes from "H" to "L". In case of BRP < B < BOP, VOUT retains the status.
Figure 13 shows the relationship between the magnetic flux density and VOUT.
VOUT

BHYS
H

L
N pole

BRP

0

BOP

Magnetic flux density (B)Figure 13

10

S pole125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
4.

Timing chart
Figure 14 shows the timing chart at power-on for product with VOUT = "L" at S pole detection.
The initial output voltage at rising of power supply voltage (VDD) is "H".
In case of B > BOP at the time when the start up time (tPON) is passed after rising of VDD, this IC outputs "L".
In case of B < BOP at the time when tPON is passed after rising of VDD, this IC maintains "H".

Power supply voltage
(VDD)

tPON

Output voltage (VOUT)(B > BOP)"H"

Output voltage (VOUT)(B < BOP)

"H"

"L"

Latching

Figure 1411125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
 Precautions• If the impedance of the power supply is high, the IC may malfunction due to a supply voltage drop caused by feedthrough current. Take care with the pattern wiring to ensure that the impedance of the power supply is low.
• Note that the IC may malfunction if the power supply voltage rapidly changes. When the IC is used under theenvironment where the power supply voltage rapidly changes, it is recommended to judge the output voltage of the IC
by reading it multiple times.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• Although this IC has a built-in output current limit circuit, it may suffer physical damage such as product deterioration
under the environment where the absolute maximum ratings are exceeded.
• The application conditions for the power supply voltage, the pull-up voltage, and the pull-up resistor should not exceed
the power dissipation.
• Large stress on this IC may affect the magnetic characteristics. Avoid large stress which is caused by the handlingduring or after mounting the IC on a board.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.

12125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series
 Characteristics (Typical Data)
Operation point, release point (BOP, BRP) vs. Temperature (Ta)S-5743NBx9A
1.5
VDD = 12.0 V
1.0
BOP
0.5

0.0
−0.5
−1.0

BRP

BOP, BRP [mT]

−2.0

0

25

VDD = 26.0 V

5075
Ta [°C]

100

125

1. 4

VDD = 12.0 V

VDD = 2.7 V

VDD = 26.0 V

VDD = 2.7 V

VDD = 26.0 V

BRP

−4.0
−40 −25

2.

VDD = 2.7 V

VDD = 12.0 V

S-5743NBx8A
4.0
BOP
2.0

0.0

VDD = 26.0 V

VDD = 2.7 V−1.5−40 −25

1. 3

1. 2

BOP, BRP [mT]

BOP, BRP [mT]1. 1

BOP, BRP [mT]

1.

25

50
75
Ta [°C]

100

1.0
0.0
−1.0

VDD = 12.0 V
VDD = 12.0 V

−2.0

BRP
−3.0
−40 −25125

VDD = 26.0 V
VDD = 26.0 V

VDD = 2.7 V
0

25

50
75
Ta [°C]100

125

S-5743NBx1A
6.0
VDD = 12.0 V
BOP
4.0

2.0
0.0
−2.0

VDD = 2.7 V
VDD = 2.7 V

−4.0

BRP
−6.0
−40 −25

VDD = 12.0 V
0S-5743NBx0A
3.0
VDD = 2.7 V
BOP
2.0

VDD = 26.0 V
VDD = 26.0 V

VDD = 12.0 V
0

25

50
75
Ta [°C]

100

125

Operation point, release point (BOP, BRP) vs. Power supply voltage (VDD)
2. 1

S-5743NBx9A

2. 2

S-5743NBx0A

2. 3

S-5743NBx8A

2. 4

S-5743NBx1A

13

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series

3.

Current consumption (IDD)vs. Temperature (Ta)4.

Current consumption (IDD)vs. Power supply voltage (VDD)

6.

Output delay time (tD)vs. Power supply voltage (VDD)

8.

Output voltage (VOUT)
vs. Power supply voltage (VDD)

6.0

IDD [mA]

5.0

VDD = 12.0 V

4.0

VDD = 26.0 V

3.0
2.0

VDD = 2.7 V

1.0
0.0−40 −25

5.

0

25

50
75
Ta [°C]

100

125

Output delay time (tD) vs. Temperature (Ta)20tD [μs]15
10

VDD = 12.0 V

VDD = 26.0 V

VDD = 2.7 V
50−40 −25

7.

0

25

50
75
Ta [°C]

100

125

Output voltage (VOUT) vs. Temperature (Ta)IOUT = 10 mA

14

IOUT = 10 mA

125°C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC
Rev.1.4_00
S-5743 A Series Power Dissipation
SOT-23-3S
Tj = +150°C max.

Power dissipation (PD) [W]

1.0
0.8 B
A
0.6
0.4
0.2
0.0

0

25

50

75

100

125

150

175

Ambient temperature (Ta) [°C]
BoardPower Dissipation (PD)

A
B
C
D
E

0.63 W
0.76 W−−−

15

SOT-23-3/3S/5/6 Test Board
IC Mount Area

(1) Board A
Item
Size [mm]Material
Number of copper foil layer

Copper foil layer [mm]

1
2
3
4

Thermal via

Specification
114.3 x 76.2 x t1.6
FR-4
2Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.070-(2) Board B
Item
Size [mm]Material
Number of copper foil layer

Copper foil layer [mm]Thermal via

1
2
3
4

Specification
114.3 x 76.2 x t1.6
FR-4
4Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070-

No. SOT23x-A-Board-SD-2.0

ABLIC Inc.

2.9±0.2
1

2

3

+0.1

0.16 -0.06

0.95±0.1
1.9±0.2

0.4±0.1

No. MP003-D-P-SD-1.1

TITLE

SOT233S-A-PKG Dimensions

No.

MP003-D-P-SD-1.1

ANGLE
UNIT

mm

ABLIC Inc.

+0.1

ø1.5 -0

4.0±0.1

2.0±0.1+0.25

ø1.0 -00.23±0.1
4.0±0.1

1.4±0.2

3.2±0.2

1

2

3

Feed direction

No. MP003-D-C-SD-1.0

TITLE

SOT233S-A-Carrier Tape

No.

MP003-D-C-SD-1.0

ANGLE
UNIT

mm

ABLIC Inc.

+1.0

9.0 - 0.0
11.4±1.0

Enlarged drawing in the central part

ø13±0.2

(60°)

(60°)

No. MP003-D-R-SD-1.0

TITLE

SOT233S-A-Reel

No.

MP003-D-R-SD-1.0

ANGLE

QTY.

UNIT

mm

ABLIC Inc.

3,000

Disclaimers (Handling Precautions)1.

All the information described herein (product data, specifications, figures, tables, programs, algorithms andapplication circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.

2.

The circuit examples and the usages described herein are for reference only, and do not guarantee the success ofany specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any otherright due to the use of the information described herein.

3.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information describedherein.

4.

Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due tothe use of the products outside their specified ranges.

5.

Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.

6.

When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-relatedlaws, and follow the required procedures.

7.

The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,biological or chemical weapons or missiles, or use any other military purposes.

8.

The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.

9.

In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products areallowed to apply for the system on customer's own responsibility.

10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
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described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of thisdocument described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07

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