S-82B4A/5A Series
www.ablic.com

BATTERY PROTECTION IC
FOR 4-SERIAL OR 5-SERIAL CELL PACK© ABLIC Inc., 2022

Rev.1.0_00

This IC is a protection IC for lithium-ion rechargeable batteries, which includes high-accuracy voltage detection circuits anddelay circuits. It is suitable for protecting 4-serial or 5-serial cell lithium-ion rechargeable battery packs from overcharge,
overdischarge, and overcurrent.

 Features• High-accuracy voltage detection for each cell
Overcharge detection voltage n
3.900 V to 4.500 V (25 mV step) Accuracy ±20 mV
Accuracy ±50 mV
Overcharge release voltage n
3.500 V to 4.500 V*1
Overdischarge detection voltage n
2.000 V to 3.200 V (100 mV step) Accuracy ±50 mV
Accuracy ±100 mV
Overdischarge release voltage n
2.000 V to 3.400 V*2• Three-level discharge overcurrent detection
Discharge overcurrent 1 detection voltage
10 mV to 200 mV (5 mV step)
Accuracy ±5 mVDischarge overcurrent 2 detection voltage
20 mV to 300 mV (5 mV step)
Accuracy ±10 mV
Load short-circuiting detection voltage
50 mV to 400 mV (10 mV step)
Accuracy ±20 mV• Charge overcurrent detection
Charge overcurrent detection voltage−200 mV to −10 mV (5 mV step) Accuracy ±5 mV• Discharge overcurrent 1 detection delay time is settable by an external capacitor (The other delay time are internally
fixed)• Power saving control by a control pin• 0 V battery charge:
Enabled, inhibited• Power-down function:
Available, unavailable• Release condition of discharge overcurrent status:
Load disconnection, charger connection• Output voltage of CO and DO pin is limited to VC2 pin voltage. (S-82B5A Series)• High-withstand voltage:
Absolute maximum rating 28.0 V• Wide operating voltage range:
5.0 V to 24.0 V• Wide operation temperature range:
Ta = −40°C to +85°C• Low current consumption
During operation:
4.0 μA typ., 8.0 μA max. (Ta = +25°C)
During power-down:
0.1 μA max. (Ta = +25°C)
During power-saving:
0.1 μA max. (Ta = +25°C)• Lead-free (Sn 100%), halogen-free*1. Overcharge release voltage = Overcharge detection voltage – Overcharge hysteresis voltage(Overcharge hysteresis voltage n can be selected from a range of 0 V to 0.4 V in 50 mV steps.)*2. Overdischarge release voltage = Overdischarge detection voltage + Overdischarge hysteresis voltage(Overdischarge hysteresis voltage n can be selected from a range of 0 V to 0.7 V in 100 mV steps.)
Remarkn = 1, 2, 3, 4, 5Applications• Lithium-ion rechargeable battery packs

 Package• 16-Pin TSSOP

1

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

 Block Diagram
1.

S-82B4A Series

VDD
PSI
VC1
−
+
+
−
VC2
−
+
+
−
VC3
−
+
+
−
VC4
−
+
+
−

Overcharge 1
detection comparator

CIT

Overdischarge 1
detection comparator

Overcharge 2
detection comparator
Overdischarge 2
detection comparator
CO
Overcharge 3
detection comparator

RVMD

Overdischarge 3
detection comparator

RVMS

Overcharge 4
detection comparator

VM

Control circuit

Overdischarge 4
detection comparator
DO

VC5

TEST1
VSS
+
−
+
−
+
−
VINI

Remark+−Discharge overcurrent 1
detection comparator
Discharge overcurrent 2
detection comparator
Load short-circuiting
detection comparator
Charge overcurrent
detection comparator

Diodes in the figure are parasitic diodes.
Figure 12

Rev.1.0_00
2.

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

S-82B5A Series

VDD
PSI
VC1
−
+
+
−
VC2
−
+
+
−
VC3
−
+
+
−
VC4
−
+
+
−

Overcharge 1
detection comparator

CIT

Overdischarge 1
detection comparator

CO pin output voltage
limit circuit

Overcharge 2
detection comparator
Overdischarge 2
detection comparator

CO
Overcharge 3
detection comparator

RVMD

Overdischarge 3
detection comparator

RVMS

Overcharge 4
detection comparator

VM

Control circuit

DO pin output voltage
limit circuit

Overdischarge 4
detection comparator
DO

VC5
−
+
+
−

Overcharge 5
detection comparator
Overdischarge 5
detection comparator
TEST1

VSS
+
−
+
−
+
−
VINI

Remark+−Discharge overcurrent 1
detection comparator
Discharge overcurrent 2
detection comparator
Load short-circuiting
detection comparator
Charge overcurrent
detection comparator

Diodes in the figure are parasitic diodes.
Figure 2

3

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series
 Product Name Structure
1.

Product name
S-82B xA

xx

- TCT1

U

7
Environmental codeU:
Lead-free (Sn 100%), halogen-free

Package abbreviation and IC packing specifications*1
TCT1: 16-Pin TSSOP, Tape
Serial code*2
Sequentially set from AA to ZZ
Number of cells in series
4:4-serial cell
5:5-serial cell
*1.
*2.

2.

Refer to the tape drawing.
Refer to "3. Product name list".

Package
Table 1
Package Name
16-Pin TSSOP

4

Package Drawing Codes

Dimension

Tape

Reel

FT016-A-P-SD

FT016-A-C-SD

FT016-A-R-S1

Rev.1.0_00

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00
3.

Product name list
3. 1

S-82B5A Series
Table 2 (1 / 2)

Product Name

S-82B5AAA-TCT1U7

Discharge
Discharge
Load
ChargeOvercharge Overcharge Overdischarge Overdischarge
Overcurrent 1 Overcurrent 2 Short-circuiting Overcurrent
Detection
Release
Detection
Release
Detection
Detection
Detection
Detection
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
[VCU]
[VCL]
[VDL]
[VDU]
[VDIOV1][VDIOV2][VSHORT][VCIOV]
4.225 V4.025 V

2.500 V

2.500 V

50 mV

100 mV

400 mV−50 mV

Table 2 (2 / 2)
Product Name

Delay Time Combination*1

0 V Battery Charge

Power-down Function

Release Condition ofDischarge Overcurrent
Status*2

S-82B5AAA-TCT1U7(1)Inhibited

Available

Load disconnection

*1.
*2.

Refer to Table 3 about the details of the delay time combinations.
Release condition of discharge overcurrent status: Load disconnection, charger connection

RemarkPlease contact our sales representatives for products other than the above.

Delay Time
Combination

Table 3
Overcharge Detection Overdischarge Detection Discharge Overcurrent 2
Delay Time
Detection Delay Time
Delay Time
[tCU]
[tDL]
[tDIOV2]

(1)

1.0 s

128 ms

16 ms

Charge Overcurrent
Detection Delay Time[tCIOV]
16 ms

Remark The delay times can be changed within the range listed in Table 4. For details, please contact our sales
representatives.

Delay Time

Table 4
Selection Range

SymbolOvercharge detection delay time

tCU

256 ms 512 ms 1.0 s

Overdischarge detection delay time

tDL

2.0 s

–

Remark––Select a value from the left.

32 ms 64 ms 128 ms 256 ms 512 ms 1.0 s–

Select a value from the left.

Discharge overcurrent 2 detection delay time tDIOV2

4 ms

8 ms 16 ms 32 ms 64 ms–

Select a value from the left.

Charge overcurrent detection delay time

4 ms

8 ms 16 ms 32 ms 64 ms 128 ms 256 ms Select a value from the left.

tCIOV

–

5

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

 Pin Configuration
1.

16-Pin TSSOP
Table 5

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9
Figure 3

*1.
*2.

6

Pin No.

Symbol

1

VC1

2

VC2

3

VC3

4

VC4

5

VC5

6

VSS

7

VINI

8

CIT

9

NC*1

10

TEST1

11

PSI

12

DO
*1

13

NC

14

CO

15

VM

16

VDD

Description
Connection pin for battery 1's positive voltage
Connection pin for battery 1's negative voltage,
Connection pin for battery 2's positive voltage
Connection pin for battery 2's negative voltage,
Connection pin for battery 3's positive voltage
Connection pin for battery 3's negative voltage,
Connection pin for battery 4's positive voltage
Connection pin for battery 4's negative voltage,
Connection pin for battery 5's positive voltage
Input pin for negative power supply,
Connection pin for battery 5's negative voltage
Voltage detection pin between VSS pin and VINI pin
Capacitor connection pin for discharge overcurrent
1 detection delay time
No connection*2

Test pin
Control pin for power-saving
Connection pin of discharge control FET gate
(CMOS output)
No connection
Connection pin of charge control FET gate
(CMOS output)
Voltage detection pin between VSS pin and VM pin
Input pin for positive power supply,
Connection pin for battery 1's positive voltage

The NC pin is electrically open. The NC pin can be connected to the VDD pin or the VSS pin.
Set the TEST1 pin open in use.

Rev.1.0_00

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

 Absolute Maximum Ratings
Table 6
(Ta = +25°C unless otherwise specified)
Item
Input voltage between VDD pin and
VSS pin
Input pin voltage 1

SymbolVDS

VIN1Applied Pin

Absolute Maximum Rating

Unit

VDD

VSS − 0.3 to VSS + 28.0

V

VC1

VVC2 − 0.3 to VVC2 + 6.0

V

VC3

VVC4 − 0.3 to VDD + 0.3 ≤ VVC4 + 6.0

V

VC4

VVC5 − 0.3 to VDD + 0.3 ≤ VVC5 + 6.0

VInput pin voltage 2

VIN2

VC2

VDD − 6.0 ≤ VVC3 − 0.3 to VDD + 0.3 ≤ VVC3 + 6.0

VInput pin voltage 3

VIN3

VC5

VSS − 0.3 to VDD + 0.3 ≤ VSS + 6.0

VInput pin voltage 4

VIN4

TEST1, CIT

VSS − 0.3 to VSS + 6.0

VInput pin voltage 5

VIN5

PSI, VM, VINI

VDD − 28.0 to VDD + 0.3

VOutput pin voltage 1

VOUT1

DO

VSS − 0.3 to VDD + 0.3 ≤ VSS + 28.0

V

Output pin voltage 2

VOUT2

CO

VDD − 28.0 ≤ VVM − 0.3 to VDD + 0.3

VOperation ambient temperature

Topr

−

−40 to +85°C

Storage temperature

Tstg

−

−55 to +125

°C

Caution The absolute maximum ratings are rated values exceeding which the product could suffer physicaldamage. These values must therefore not be exceeded under any conditions.

 Thermal Resistance Value
Table 7
Item

Junction-to-ambient thermal resistance*1

SymbolθJA

Condition

16-Pin TSSOP

Min.

Typ.

Max.

Unit

Board A

−

88

−

°C/W

Board B

−

74

−

°C/W

Board C

−

−

−

°C/W

Board D

−

−

−

°C/W

Board E

−

−

−

°C/W

*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
RemarkRefer to " Power Dissipation" and "Test Board" for details.

7

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

 Electrical Characteristics
Table 8 (1 / 2)
(V1 = V2 = V3 = V4 = V5 = 3.5 V, Ta = +25°C unless otherwise specified)
Item

Unit

Test
Circuit

SymbolCondition

Min.

Typ.

Max.

Detection Voltage
Overcharge detection voltage n

VCUn

−

VCU − 0.020

VCU

VCU + 0.020

V1

Overcharge release voltage n

VCLn

−

VCL − 0.050

VCL

VCL + 0.050

V

1

Overdischarge detection voltage n

VDLn

−

VDL − 0.050

VDL

VDL + 0.050

V

1

Overdischarge release voltage n

VDUn

−

VDU − 0.100

VDU

VDU + 0.100

V

1Discharge overcurrent 1 detection voltage

VDIOV1−

VDIO1V − 5

VDIOV1VDIOV1 + 5

mV

1Discharge overcurrent 2 detection voltage

VDIOV2−VDIOV2 − 10

VDIOV2VDIOV2 + 10

mV

1

Load short-circuiting detection voltage

VSHORT−VSHORT − 20

VSHORTVSHORT + 20

mV

1

Charge overcurrent detection voltage

VCIOV

−

VCIOV − 5VCIOVVCIOV + 5

mV

1

CIT pin charge current

ICIT

−

80

120

170

nA

1

CIT pin detection voltage

VCIT

−

1.1

1.2

1.3

V

1

−
−
−
Internally fixed
delay time−−

tCU × 0.7
tDL × 0.7
tDIOV2 × 0.7

tCU
tDL
tDIOV2tCU × 1.3
tDL × 1.3
tDIOV2 × 1.3

−
−
−

1
1
1

100

300

600

μs

1

tCIOV × 0.7
1.4

tCIOV
2.0

tCIOV × 1.3
2.6

−
ms

1
1

−

0.8

1.5

V

1

1.0

1.2

1.5

V

1

Delay Time

Overcharge detection delay time
tCU
Overdischarge detection delay time
tDL
Discharge overcurrent 2 detection delay time tDIOV2
Load short-circuiting detection delay timetSHORT

Charge overcurrent detection delay time
PSI pin response time
0 V Battery Charge

tCIOV
tPSI

0 V battery charge starting charger voltage

V0CHA

0 V battery charge inhibition battery voltage n

V0INH

Remark n = 1, 2, 3, 4, 5

8

0 V battery
charge enabled
0 V battery
charge inhibited

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

Table 8 (2 / 2)
(V1 = V2 = V3 = V4 = V5 = 3.5 V, Ta = +25°C unless otherwise specified)
Item

SymbolInternal ResistanceResistance between VDD pin and VM pin RVMD
Resistance between VM pin and VSS pin RVMS
Input Voltage
Operation voltage between VDD pin and
VDSOP
VSS pin
External control input pin
PSI pin reverse voltage "H"
PSI pin reverse voltage "L"
Input Current
Current consumption during operation
Current consumption during power-downCurrent consumption during
power-saving
VC1 pin current

Condition

Min.

Typ.

Max.

Unit

Test
Circuit

−
−

0.5
7.5

1
15

1.5
30

MΩ
kΩ

1
1

5.0

−

24.0

V

1

Fixed output voltage of DO
pin and CO pin

VPSIH
VPSIL

−
−

0.8
0.5

1.0
0.8

1.3
1.0

V
V

1
1

IOPE
IPDN

−
−

−
−

4
−

8
0.1

μA
μA

1
1

IPSV

−

−

−

0.1

μA

1

IVC1

−

−

0.25

0.4

μA

1

VC2 pin current

IVC2

−

−0.4

0.05

0.4

μA

1

VC3 pin current

IVC3

−

−0.4

−0.1

0.4

μA

1

VC4 pin current

IVC4

−

−0.4

−0.1

0.4

μA

1

VC5 pin current

IVC5

−

−0.4

−0.1

0.4

μA

1

PSI pin current "H"

IPSIH

−

−400

−200

−100

nA

1

PSI pin current "L"

IPSIL

−

100

200

400

nA

1

Output pin
4-serial cell

−

−

VDD

V

1

5-serial cell−

VVC2 − 0.5

VVC2

V

1

4-serial cell

−

−

VDD

V

1

5-serial cell−

VVC2 − 0.5

VVC2

V

1

−

10

−

−

μA

1

ICOL

−

180

200

−

μA

1

IDOH

−

10

−

−

μA

1

IDOL

−

1700

2000

−

μA

1

CO pin voltage "H"

VCOH

DO pin voltage "H"

VDOH

CO pin source current

ICOH

CO pin sink current
DO pin source current
DO pin sink current

9

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

 Test Circuits
CautionUnless otherwise specified, the output voltage levels "H" and "L" at CO pin (VCO) and DO pin (VDO) are
judged as follows.
L: [VCO, VDO] ≤ VDS × 0.1 V
H: [VCO, VDO] > VDS × 0.1 V

Remark

VDS: Input voltage between VDD pin and VSS pin (V1 + V2 + V3 + V4 + V5)

V1
V2
V3
V4
V5

A

VC1

VDD

A

VC2

VM

A

A

VC3

CO

A

A

VC4

A

VC5

DO

A

A

VSS

PSI

A

VINI

TEST1

A

CIT

A

SW2

SW3

SW1
V6

V7

V8

Figure 4V

V9V

V10 V11

Test circuit 1

This section provides explanations of Test items using Test circuit 1.
Perform each test after setting as shown in Table 9.
Table 9Symbol

V2

V3

V4

V5

V6

V7

V8

V9

V10

V11

SW1

SW2

SW3

Setting 3.5 V 3.5 V

3.5 V

3.5 V

3.5 V

0V

0V

VDS

−

−

0V

ON

OFF

OFF

1.

V1

Initial Setting of Test Circuit 1 (1 / 2)

Overcharge detection voltage n (VCUn), overcharge release voltage n (VCLn)
Overcharge detection voltage 1 (VCU1) is defined as the voltage V1 at which VCO goes from "H" to "L" when the voltage
V1 is gradually increased after setting V1 = V2 = V3 = V4 = V5 = VCUn − 0.05 V. Overcharge release voltage 1 (VCL1) isdefined as the voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is then gradually decreased after
setting V2 = V3 = V4 = V5 = VCLn – 0.05 V, V11 = 0.2 V.
Overcharge detection voltage n (VCUn) and overcharge release voltage n (VCLn) (n = 2 to 5) can be determined in thesame way as when n = 1.

2.

Overdischarge detection voltage n (VDLn), overdischarge release voltage n (VDUn)
Overdischarge detection voltage 1 (VDL1) is defined as the voltage V1 at which VDO goes from "H" to "L" when thevoltage V1 is gradually decreased. Overdischarge release voltage 1 (VDU1) is defined as the voltage V1 at which VDO
goes from "L" to "H" when the voltage V1 is then gradually increased after setting V11 = 0.2 V. Overdischarge
detection voltage n (VDLn) and overdischarge release voltage n (VDUn) (n = 2 to 5) can be determined in the same way
as when n = 1.

10Rev.1.0_00
3.

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Discharge overcurrent 1 detection voltage (VDIOV1)Discharge overcurrent 1 detection voltage (VDIOV1) is defined as the voltage V6 at which CIT pin current changes fromthe direction of flowing into the IC to the direction of flowing out from the IC when the voltage V6 is gradually increased
after setting V7 = 0.01 V.

4.

Discharge overcurrent 2 detection voltage (VDIOV2)Discharge overcurrent 2 detection voltage (VDIOV2) is defined as the voltage V6 at which VDO goes from "H" to "L" whenthe voltage V6 is gradually increased after setting V11 = 0.5 V.

5.

Load short-circuiting detection voltage (VSHORT)
Load short-circuiting detection voltage (VSHORT) is defined as the voltage V6 at which delay time from when V6 isincreased after setting V11 = 0.5 V to when VDO goes from "H" to "L" is load short-circuiting detection delay time
(tSHORT).

6.

Charge overcurrent detection voltage (VCIOV)
Charge overcurrent detection voltage (VCIOV) is defined as the voltage V6 at which VCO goes from "H" to "L" when thevoltage V6 is gradually decreased after setting V11 = −0.1 V.

7.

CIT pin charge current (ICIT), CIT pin detection voltage (VCIT)
CIT pin charge current (ICIT) is defined as the CIT pin current when setting V6 = (VDIOV1 + VDIOV2) / 2.
CIT pin detection voltage (VCIT) is defined as the voltage V7 at which VDO goes from "H" to "L" when the voltage V7 isthen gradually increased.

8.

Overcharge detection delay time (tCU)
Overcharge detection delay time (tCU) is the time period from when the voltage V1 exceeds VCU1 after setting V1 = V2
= V3 = V4 = V5 = 3.5 V till when VCO goes from "H" to "L".

9.

Overdischarge detection delay time (tDL)
Overdischarge detection delay time (tDL) is the time period from when the voltage V1 falls below VDL1 after setting V1 =V2 = V3 = V4 = V5 = 3.5 V till when VDO goes from "H" to "L".

10. Discharge overcurrent 2 detection delay time (tDIOV2)Discharge overcurrent 2 detection delay time (tDIOV2) is the time period from when the voltage V6 exceeds VDIOV2 after
setting V11 = 0.5 V till when VDO changes from "H" to "L".

11. Load short-circuiting detection delay time (tSHORT)
Load short-circuiting detection delay time (tSHORT) is the time period from when the voltage V6 exceeds VSHORT after
setting V11 = 0.5 V till when VDO changes from "H" to "L".

12. Charge overcurrent detection delay time (tCIOV)
Charge overcurrent detection delay time (tCIOV) is the time period from when the voltage V6 falls below VCIOV after
setting V11 = −0.1 V till when VCO changes from "H" to "L".

13. PSI pin response time (tPSI)PSI pin response time (tPSI) is the time period from when the voltage V8 is changed to 0 V till when VDO changes from
"H" to "L".

11

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

14. 0 V battery charge starting charger voltage (V0CHA) (0 V battery charge enabled)
This IC reaches the overdischarge status after setting V1 = VDL1 − 0.1 V. Then set V1 = V2 = V3 = V4 = V5 = 0 V. 0 V
battery charge starting charger voltage (V0CHA) is defined as the absolute value of voltage V11 at which ICO exceeds
1.0 μA when the voltage V11 is then gradually decreased after setting SW3 ON and V10 = V11 = −0.5 V.

15. 0 V battery charge inhibition battery voltage n (V0INHn) (0 V battery charge inhibited)
0 V battery charge inhibition battery voltage 1 (V0INH1) is defined as the voltage V1 at which VCO goes from "H" to "L"when the voltage V1 is gradually decreased after setting V1 = V2 = V3 = V4 = V5 = VDLn – 0.1 V.
0 V battery charge inhibition battery voltage n (V0INHn) (n = 2 to 5) can be determined in the same way as when n = 1.

16. Resistance between VM pin and VDD pin (RVMD)
Resistance between VM pin and VDD pin (RVMD) is defined by RVMD = (VDS + 0.1) / IVM using IVM when setting V1 = V2 =V3 = V4 = V5 = 1.5 V and V11= −0.1 V.

17. Resistance between VM pin and VSS pin (RVMS)
Resistance between VM pin and VSS pin (RVMS) is defined by RVMS = V11 / IVM using IVM when setting V6 = 1.0 V and
V11 = 2.0 V.

18. PSI pin reverse voltage "H" (VPSIH)
PSI pin reverse voltage "H" (VPSIH) is defined as the voltage V8 at which VDO goes from "L" to "H" when the voltage V8
is gradually increased after setting V8 = 0 V.

19. PSI pin reverse voltage "L" (VPSIL)
PSI pin reverse voltage "L" (VPSIL) is defined as the voltage V8 at which VDO goes from "H" to "L" when the voltage V8
is gradually decreased.

20. Current consumption during operation (IOPE)
Current consumption during operation (IOPE) is defined as the sum of VSS pin current, VM pin current and VINI pin
current after setting SW1 OFF.

21. Current consumption during power-down (IPDN)
Current consumption during power-down (IPDN) is defined as IVSS under the setting conditions of V1 = V2 = V3 = V4 =V5 = 1.5 V and V11 = VDS.

22. Current consumption during power-saving (IPSV)Current consumption during power-saving (IPSV) is defined as IVSS under the setting conditions of V8 = 0 V and V11 =VDS.

23. PSI pin current "H" (IPSIH), PSI pin current "L" (IPSIL)
PSI pin current "H" (IPSIH) is defined as IPSI when setting V8 = VDS − 1 V after setting V8 = VDS.
PSI pin current "L" (IPSIL) is defined as IPSI when setting V8 = (VPSIH + VPSIL) / 2 after setting V8 = 0 V.

24. CO pin voltage "H" (VCOH), CO pin source current (ICOH)
CO pin voltage "H" (VCOH) is defined as CO pin voltage (VCO) in the settings shown in Table 9. CO pin source current(ICOH) is defined as ICO when setting V10 = VCOH − 0.5 V and SW3 ON.

25. CO pin sink current (ICOL)
CO pin sink current (ICOL) is defined as ICO when setting V1 = VCU1 + 0.1 V, V10 = 0.5 V and SW3 ON.

12

Rev.1.0_00

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

26. DO pin voltage "H" (VDOH), DO pin source current (IDOH)
DO pin voltage "H" (VDOH) is defined as DO pin voltage (VDO) in the settings shown in Table 9. DO pin source current(IDOH) is defined as IDO when setting V9 = VDOH − 0.5 V and SW2 ON.

27. DO pin sink current (IDOL)
DO pin sink current (IDOL) is defined as IDO when setting V1 = VDL1 – 0.1 V, V9 = 0.5 V and SW2 ON.

13

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

 Operation
Remark1.

Refer to " Battery Protection IC Connection Example".

Normal status
The status when the CO pin output voltage (VCO) = "H" and DO pin output voltage (VDO) = "H" is the normal status.
CO pin voltage "H" (VCOH) is the voltage VCO when the VCO is "H". DO pin voltage "H" (VDOH) is the voltage VDO when
the VDO is "H".
All the conditions mentioned below should be satisfied for returning to the normal status.
• The voltage of each of the batteries is in the range from the overcharge detection voltage n (VCUn) to
overdischarge detection voltage n (VDLn).
• The VINI pin voltage is in the range of the charge overcurrent detection voltage (VCIOV) to discharge overcurrent 1
detection voltage (VDIOV1).
• The PSI pin voltage is higher than the PSI pin reverse voltage "H" (VPSIH).
Caution After a battery is connected, there may be cases when discharging cannot be performed. In thiscase, this IC returns to the normal status when any of the following conditions is satisfied.
(1) Connecting a charger(2) Shorting between the VM pin and the VSS pin(3) Changing the PSI pin voltage to be VDS → 0 V → VDS

2.

Overcharge status
When the voltage of any of the batteries exceeds the overcharge detection voltage n (VCUn) and the status continues
for the overcharge detection delay time (tCU)*1 or longer, the CO pin changes to VM pin voltage. This is theovercharge status. In this case, the charge control FET is turned off and charging is stopped.
The overcharge status is released if either condition mentioned below is satisfied.
(1) VVM < 0.3 V typ., and voltage of all batteries ≤ VCLn
(2) VVM ≥ 0.3 V typ., and voltage of all batteries ≤ VCUn

14

*1. Refer to "6.

Delay time setting" for details.

Remark

VM pin voltage
Overcharge detection voltage n (n = 1, 2, 3, 4, 5)
Overcharge release voltage n (n = 1, 2, 3, 4, 5)

VVM:
VCUn:
VCLn:

Rev.1.0_00
3.

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Overdischarge status
When the voltage of any of the batteries decreases to the overdischarge detection voltage n (VDLn) or lower and thestatus continues for the overdischarge detection delay time (tDL)*1 or longer, the DO pin changes to the VSS level. Thisis the overdischarge status. The discharge control FET is turned off and discharging is stopped.
The overdischarge status is released if either condition mentioned below is satisfied.
(1) VVM ≤ 0 V typ., and voltage of all batteries ≥ VDLn
(2) VVM > 0 V typ., and voltage of all battery ≥ VDUn
*1. Refer to "6.
Remark

3. 1

VVM:
VDLn:
VDUn:

Delay time setting" for details.
VM pin voltage
Overdischarge detection voltage n (n = 1, 2, 3, 4, 5)
Overdischarge release voltage n (n = 1, 2, 3, 4, 5)

With power-down function

When this IC reaches the overdischarge status, the VM pin is pulled up to the VDD level by a resistance between VM
pin and VDD pin (RVMD). If the VM pin voltage changes to 0.7 V typ. or higher, the power-down function starts tooperate and most operations in this IC halt. The CO pin changes to VM pin voltage. In this case, the charge control
FET is turned off and charging is stopped.
By connecting a battery charger, the power-down function is released when the VM pin voltage is 0.7 V typ. or lower.

4.

Discharge overcurrent status
When the discharge current increases to a certain value or more, the VINI pin voltage increases to the level ofdischarge overcurrent 1 detection voltage (VDIOV1) or higher. If the condition continues for the discharge overcurrent 1
detection delay time (tDIOV1)*1 or longer, the DO pin changes to the VSS level. This is the discharge overcurrent status.
The discharge control FET is turned off and discharging is stopped.
Discharge overcurrent is detected at the following three levels: VDIOV1, VDIOV2, and VSHORT. When discharge
overcurrent 2 detection voltage (VDIOV2) and load short-circuiting detection voltage (VSHORT) are detected, the same
operations as VDIOV1 detection are performed.
4. 1

Release condition of discharge overcurrent status "Load disconnection"

Under the discharge overcurrent status, VM pin and VSS pin are shorted by RVMS in this IC. However, the VM pin
voltage is the VDD level due to the load as long as the load is connected. When the load is disconnected, the VM pin
voltage returns to the Vss level. When the VM pin voltage returns to VDS / 3 or lower, this IC releases the discharge
overcurrent status.
RVMD is not connected in the discharge overcurrent status.
4. 2

Release condition of discharge overcurrent status "Charger connection"

Under the discharge overcurrent status, VDD pin and VM pin are shorted by RVMD in this IC. When a battery isconnected to a charger and VM pin voltage returns to VDIOV1 or lower, this IC releases the discharge overcurrent
status.
RVMS is not connected in the discharge overcurrent status.

15

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series
5.

Rev.1.0_00

Charge overcurrent status
When the charge current increases to a certain value or more, the VINI pin voltage decreases to the level of charge
overcurrent detection voltage (VCIOV) or lower. If the status continues for the charge overcurrent detection delay time
(tCIOV)*1 or longer, the CO pin voltage changes to the VM pin voltage. This is the charge overcurrent status. In this case,the charge control FET is turned off and charging is stopped. The VM pin is pulled up to the VDD level by a resistance
between VM pin and VDD pin (RVMD).
The charge overcurrent status is released if the VM pin voltage increases 0.3 V typ. or higher.
*1. Refer to "6.

6.

Delay time setting" for details.

Delay time setting
Users are able to set delay time for the period from when this IC detects change in the voltage of any of the batteries
or the VINI pin until when it outputs to the CO pin or DO pin. The discharge overcurrent 1 detection delay time (tDIOV1)
is determined by constant current in this IC and an external capacitor. The other detection delay times are fixedinternally.
6. 1

Other than discharge overcurrent 1 detection delay time (tDIOV1)

The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter.
Remark tDIOV2 and tSHORT start when VDIOV2 is detected. When VSHORT is detected over tSHORT after the detection of
VDIOV2, this IC turns the discharge control FET off within tDIOV2 or tSHORT of each detection.

VDOH
DO pin voltagetD
VSStSHORT0 ≤ tD ≤ tSHORT
Time

VDD
VSHORT
VINI pin voltage
VDIOV2VSS
Time

Figure 5
6. 2

Discharge overcurrent 1 detection delay time (tDIOV1)In the discharge overcurrent 1 detection, when the VINI pin voltage increases to discharge overcurrent 1 detection
voltage (VDIOV1) or higher, the internal circuit of this IC starts charging to an external capacitor connected to the CIT
pin via the CIT pin current (ICIT) = 120 nA typ. When the CIT pin voltage increases to the CIT pin detection voltage(VCIT) or higher, the DO pin voltage changes to Vss level. This period is discharge overcurrent 1 detection delay time
(tDIOV1).
tDIOV1 is calculated by the following formula.
tDIOV1 [s] = CCIT [F] × VCIT [V] / ICIT [A]
If CCIT = 0.01 μF, tDIOV1 is calculated as follows:
tDIOV1 [s] = 0.01 μF × 1.2 V typ. / 120 nA typ. = 100 ms typ.

16

Rev.1.0_00
7.

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

0 V Battery charge function
Regarding how to charge a self-discharged battery (0 V battery), users are able to select either function mentioned
below.
(1) 0 V battery charge enabled
A 0 V battery is charged when charger voltage is higher than the 0 V battery charge starting charger voltage(V0CHA).
(2) 0 V battery charge inhibited
A 0 V battery is not charged when the voltage of any of the batteries is the 0 V battery charge inhibition battery
voltage n (V0INHn) or lower.
Caution When the VDD pin voltage is lower than the minimum value of operation voltage between the VDD
pin and VSS pin (VDSOP), this IC's operation is not assured.
Remark n = 1, 2, 3, 4, 5

8.

PSI pin
When the PSI pin is activated, the power-saving function starts to operate, and most operations halt. In this case, theCO pin changes to the VM pin level, and DO pin changes to the VSS level.
Table 10
PSI pin
VPSIH ≤ PSI pin voltage ≤ VDD level
VPSIL < PSI pin voltage < VPSIH
VSS level ≤ PSI pin voltage ≤ VPSIL

Status Set by PSI Pin
CO pin"H"
Maintains the status
VM pin level

DO pin"H"
Maintains the status
VSS level

This IC is initialized and becomes the normal status by deactivating the PSI pin after activating PSI pin and enabling
the power-saving function. As a result, each detection operation is carried out after returning to the normal status.

17

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

 Timing Charts
1.

Overcharge detection, overdischarge detection

VCUn
VCLn
Battery voltage
VDUn
VDLn
(n = 1, 2, 3, 4, 5)
VDD
DO pin voltage

VDOH

VSS
VDD
VCOH
CO pin voltage
VSS
VEB-

VDD
VM pin voltage
VSS + 0.3 V typ.
VSS
VEBCharger connection
Load connection
Overcharge detection delay time (tCU)
Status*1(With power-down function)

(1)

(2)

(1)

18

(4)
(3)

Figure 6*1. (1) : Normal status(2) : Overcharge status(3) : Overdischarge status(4) : Power-down status

Overdischarge detection delay time (tDL)(1)

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00
2.

Discharge overcurrent detection
VHC

VCUn
VCLn
Battery voltage
VDUn
VDLn

VHD

(n = 1, 2, 3, 4, 5)
VDD
VDOH
DO pin voltage
VSS
VDD
VCOH
CO pin voltage
VEBVDDVM pin voltage
VSS
VDD
VSHORT
VINI pin voltage VDIOV2VDIOV1VSS
Load connection

Status*1

Discharge overcurrent 1
detection delay time (tDIOV1)(1)

Discharge overcurrent 2
detection delay time (tDIOV2)
(2)

(1)

(2)

Load short-circuiting
detection delay time (tSHORT)
(1)

(2)

(1)

Figure 7*1. (1) : Normal status(2) : Discharge overcurrent status

19

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series
3.

Rev.1.0_00

Charge overcurrent detection

VHC

VCUn
VCLn
Battery voltage

VHD
VDUn
VDLn

(n = 1, 2, 3, 4, 5)

VDD
VDOH

DO pin voltage

VSS
VDD
VCOH

CO pin voltage

VSS
VEBVDDVM pin voltage
VSS
VEB-

VINI pin voltage

VDD

VSS
VCIOV

Charger connection
Load connection

Status*1(With power-down function)

Charge overcurrent
detection delay time (tCIOV)

Charge overcurrent
detection delay time (tCIOV)

(4)

(1)

(3)

(1)

(2)

Figure 8*1. (1) : Normal status(2) : Charge overcurrent status(3) : Overdischarge status(4) : Power-down status

20

(2)

(1)

Rev.1.0_00

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

 Connection Examples of Battery Protection IC
1.

S-82B4A Series (4-serial cell)

EB+

RVDD

CVDD

RVC1

CVC1
CVC2

RVC2
RVC3

CVC3

VDD

VC2

VM

VC3

CO

VC4

CVC4

RVC4

VC1

RVC5

S-82B4A

VC5

DO

VSS

PSI

VINI

TEST1

PSI*1

RPSI

CIT
RCO

CCIT

RVM
EB−

RSENSE

Discharging
FET

Charging
FET

Figure 9*1. If you do not use the power-saving function, connect the PSI pin to the VDD pin.
Remark Regarding the recommended values for external components, refer to "Table 11 Constants for External
Components".

2.

S-82B5A Series (5-serial cell)

EB+

RVDD

CVDD

RVC1

RVC1
RVC2

RVC2
RVC3

RVC3

RVC5

RVC5

VDD

VC2

VM

VC3

CO

VC4

RVC4

RVC4

VC1

S-82B5A

VC5

DO

VSS

PSI

VINI

TEST1

PSI*1

RPSI

CIT
RCO

CCIT

RVM
EB−

RSENSE

Discharging
FET

Charging
FET

Figure 10*1. If you do not use the power-saving function, connect the PSI pin to the VDD pin.
Remark Regarding the recommended values for external components, refer to "Table 11 Constants for External
Components".
21

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Table 11

Constants for External Components

Symbol
RVDD

3.

22

Unit

100

Ω

1

kΩ

RPSI

1

kΩ

RCO

1

kΩ

RVM

1

kΩ

RSENSE

–

mΩ

CVDD

1

μF

0.1

μF

0.01 or more

μF

CVCn (n = 1, 2, 3, 4, 5)

Caution 1.
2.

Typ.

RVCn (n = 1, 2, 3, 4, 5)

CCIT

Rev.1.0_00

The constants may be changed without notice.
Sufficient evaluation of transient power supply fluctuation and overcurrent protection function
with the actual application is needed to determine the proper constants when setting the filter
constants between the VDD pin and VSS pin. Contact our sales representatives if setting theconstants between the VDD pin and VSS pin to anything other than the recommended values.
It has not been confirmed whether the operation is normal or not in circuits other than theconnection examples. In addition, the connection examples and the constants do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the constants.

Rev.1.0_00

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

 Precautions• The application conditions for the input voltage, output voltage, and load current should not exceed the power
dissipation.
• Batteries can be connected in any order; however, there may be cases when discharging cannot be performed after abattery is connected. In this case, this IC returns to the normal status when any of the following conditions is satisfied.
(1) Connecting a charger(2) Shorting between the VM pin and the VSS pin(3) Changing the PSI pin voltage to be VDS → 0 V → VDS• If an overcharged battery and an overdischarged battery intermix, this IC will change to the overcharge andoverdischarge statuses. Therefore, in this case, both charging and discharging are impossible.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.

23

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00

 Characteristics (Typical Data)
1. Current consumption
1. 1

IOPE vs. VDS

1. 2
Ta = +25°C

20

IOPE [µA]

IOPE [µA]

15

10
5
0
5

10

15
20
VDS [V]25-40 -25

1. 4
Ta = +25°C

25Ta [°C]

50

75 85

IPDN vs. Ta
VDS = 7.5 V

0.4

IPDN [µA]

IPDN [µA]

0

0.5

0.4
0.3
0.2

0.3
0.2
0.1

0.1

0.0

0.0
0

5

10

15
20
VDS [V]

25

30

IPSV vs. VDS-40 -25

1. 6
Ta = +25°C

0.5

0

25
Ta [°C]

50

75 85

IPSV vs. Ta
VDS = 17.5 V

0.5
0.4

IPSV [µA]

0.4

IPSV [µA]530

IPDN vs. VDS

0.5

0.3
0.2

0.3
0.2
0.1

0.1

0.0

0.0
0

24

10

0
0

1. 5

VDS = 17.5 V

20

15

1. 3

IOPE vs. Ta

5

10

15
20
VDS [V]25

30-40 -25025Ta [°C]50

75 85

Rev.1.0_00

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

2. Detection voltage, release voltage
VCU vs. Ta

2. 2

4.250

4.410

4.225

4.400
4.390

4.150
-40 -25

2. 3

4.200
4.175

4.380
0

25
Ta [°C]50

75 85

VDL vs. Ta-40 -25

2. 4

3.10

2.525

3.05

2.500
2.475

25
Ta [°C]

50

75 85

0

25
Ta [°C]

50

75 85

3.00
2.95

2.450

2.90
-40 -25

2. 5

0

VDU vs. Ta

2.550

VDU [V]

VDL [V]VCL vs. Ta

4.420

VCL [V]VCU [V]

2. 1

0

25
Ta [°C]

50

75 85

VDIOV1 vs. Ta-40 -25

2. 6

VDIOV2 vs. Ta
VDS = 17.5 V

30.0

12.5

25.0

VDIOV2 [mV]VDIOV1 [mV]VDS = 17.5 V

15.0

10.0
7.5
5.0

15.0
10.0

-40 -25

2. 7

20.0

0

25
Ta [°C]

50

75 85

VSHORT vs. Ta-40 -25

2. 8

0

25
Ta [°C]VDS = 17.5 V

-5.0

60.0

-7.5

VCIOV [mV]VSHORT [mV]VDS = 17.5 V

40.0
30.0

75 85

VCIOV vs. Ta

70.0

50.0

50

-10.0
-12.5
-15.0

-40 -25025Ta [°C]50

75 85-40 -25025Ta [°C]

50

75 85

25

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series
Delay time functiontCU [s]

3. 1

tCU vs. Ta

3. 2

250

1.5

200

1.0
0.5
0

25
Ta [°C]

50

75 85

ICIT vs. Ta-40 -25

3. 4
VDS = 17.5 V

140

VCIT [V]ICIT [nA]

120

75 85

VCIT vs. Ta
VDS = 17.5 V

1.20

1.10
-40 -25025Ta [°C]50-40 -2575 85

tDIOV2 vs. Ta

3. 6

0

25
Ta [°C]

50

75 85

tSHORT vs. Ta

VDS = 17.5 V

30

VDS = 17.5 V
600

25

500
tSHORT [µs]tDIOV2 [ms]

50

1.15

100

20
15
10
5

400
300
200
100

0

0

-40 -25025Ta [°C]50

75 85

tCIOV vs. Ta
VDS = 17.5 V

30
25tCIOV [ms]25
Ta [°C]

1.25

110

20
15
10
5
0
-40 -25

26

0

1.30

130

3. 7

100

0
-40 -25

3. 5

150

50

0

3. 3

tDL vs. Ta

2.0

tDL [ms]3.

Rev.1.0_00

025Ta [°C]50

75 85-40 -25025Ta [°C]

50

75 85

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series

Rev.1.0_00
4.

Output pin
4. 1

ICOH vs. VDS

4. 2

ICOL vs. VDS
Ta = +25°C

300

40

250
200

ICOL [µA]

ICOH [µA]

Ta = +25°C

50

30
20

150
100

10

50

0

0
0

4. 3

5

10

15
20
VDS [V]

25

30

IDOH vs. VDS

0

4. 4

5

10

20
15
VDS [V]

50
40

2500

IDOL [µA]

IDOH [µA]

Ta = +25°C

3000

20
10

30

IDOL vs. VDS

Ta = +25°C

30

25

2000
1500
1000
500
0

0
0

5

10

15
20
VDS [V]

25

30

0

5

10

15
20
VDS [V]

25

30

27

BATTERY PROTECTION IC FOR 4-SERIAL OR 5-SERIAL-CELL PACK
S-82B4A/5A Series Power Dissipation
16-Pin TSSOP
Tj = +125°C max.

Power dissipation (PD) [W]

2.0

1.5 B

1.0 A

0.5

0.0

0

25

50

75

100

125

150

Ambient temperature (Ta) [°C]

28

Board

Power Dissipation (PD)A

1.14 WB

1.35 W

C

−

D

−

E

−

175

Rev.1.0_00

16-Pin TSSOP Test Board(1) Board A

IC Mount Area
Item
Size [mm]Material
Number of copper foil layer

Copper foil layer [mm]

1
2
3
4

Thermal via

Specification
114.3 x 76.2 x t1.6
FR-4
2Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.070-(2) Board B
Item
Size [mm]Material
Number of copper foil layer

Copper foil layer [mm]Thermal via

1
2
3
4

Specification
114.3 x 76.2 x t1.6
FR-4
4Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070-

No. TSSOP16-A-Board-SD-1.0

ABLIC Inc.

5.1±0.2

0.65

16

9

1

8

0.17±0.05

0.22±0.08

No. FT016-A-P-SD-1.2

TITLE

TSSOP16-A-PKG Dimensions

No.

FT016-A-P-SD-1.2

ANGLE
UNIT

mm

ABLIC Inc.

+0.1

4.0±0.1

ø1.5 -0

0.3±0.05

2.0±0.1

8.0±0.1
1.5±0.1

ø1.6±0.1(7.2)
4.2±0.2+0.4

6.5 -0.2

1

16

8

9

Feed direction

No. FT016-A-C-SD-1.1

TITLE

TSSOP16-A-Carrier TapeNo.

FT016-A-C-SD-1.1

ANGLE
UNIT

mm

ABLIC Inc.

17.4±1.0
21.4±1.0

Enlarged drawing in the central part2±0.5
ø21±0.8ø13±0.2

No. FT016-A-R-S1-2.0

TITLE

TSSOP16-A- ReelNo.

FT016-A-R-S1-2.0

ANGLE

QTY.

UNIT

mm

ABLIC Inc.

4,000

Disclaimers (Handling Precautions)1.

All the information described herein (product data, specifications, figures, tables, programs, algorithms andapplication circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.

2.

The circuit examples and the usages described herein are for reference only, and do not guarantee the success ofany specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any otherright due to the use of the information described herein.

3.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information describedherein.

4.

Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due tothe use of the products outside their specified ranges.

5.

Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.

6.

When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-relatedlaws, and follow the required procedures.

7.

The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,biological or chemical weapons or missiles, or use any other military purposes.

8.

The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.

9.

In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products areallowed to apply for the system on customer's own responsibility.

10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of thisdocument described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07

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