Dead-time Compensation with DC Offset Current
Elimination Method using Three-level Operation for
Dual Active Bridge DC-DC Converter
Jun-ichi Itoh, Kengo Kawauchi, Hayato Higa
Dept. of Energy and Environment Science Engineering
Nagaoka University of Technology
Nagaoka, Niigata, Japan
itoh@vos.nagaokaut.ac.jp, k_kawauchi@stn.nagaokaut.ac.jp, hhiga@stn.nagaokaut.ac.jp
Abstract—This paper proposes a compensation method ofa non-liner transmission power error caused by a dead-time
for a dual active bridge (DAB) converter with three-level
operation. This power error is compensated by the zero-voltage
period longer than the dead-time in three-level mode. In
addition, the mode change sequence between two-level andthree-level is also proposed to suppress a dc offsets on thetransformer current. The validity of the proposed method is
confirmed by a 2.5-kW prototype. As the experimental results,
the transmission-power error is reduced by 80.7%. In addition,
the peak value of the magnetizing current at the transient stateis reduced by 56% because the dc offset is eliminated.
Moreover, the mode changing is achieved within two switching
periods.

light-load efficiency with achieving ZVS against the voltage
fluctuation at the DC bus [13-16]. In [16], the power range ofthe converter operation with high efficiency is extended
using three-level operation. However, the mode changing
between the two-level operation and the three-level operationinduces a dc offset in an inductor current and a magnetizing
current. This is because the inductor current and themagnetizing current is not accurately estimated to alternate
the operation due to the transmission power error owing to
the dead-time. Moreover, the dc offset in the magnetizing
current is not eliminated in spite of matching voltage time
product around the changing mode points because
waveforms of the magnetizing current are different, i.e.
triangular waveform and trapezoidal waveform.

Keywords—DC-DC converter, Dual Active Bridge, Deadtime, Three-level operation, DC offset

This paper proposes a dead-time compensation method inorder to accomplish the following objectives; the reductionof the transmission-power error at light load, and the modechanging between the two-level operation and the three-level
operation without inducing the dc offsets. In particular, thevoltage-polarity-reversal phenomenon is eliminated byadjusting the phase difference of the three-level operation atlight load. Consequently, the dc offset in the magnetizing
current is eliminated by estimating the magnetizing current,
whereas the dc offset in the inductor current is eliminated byequaling the voltage time product around the changing mode
points.

I.

INTRODUCTION

In recent years, energy storage systems for DC microgrid systems and electric vehicles have been actively
researched [1-6]. In order to satisfy the requirements ofenergy storage systems such as, e.g. a bidirectional operation
and a galvanic isolation, a bi-directional isolated DC-DC
converter is necessary. A dual active bridge (DAB) converter
is generally employed for these application [7-9], and thetransmission power and a power flow are controlled by asingle phase shift (SPS) control [10]. In addition, the DAB
converter obtains high efficiency because of achieving zerovoltage switching (ZVS) without additional component.
However, the transmission power error occurs due to thedead-time at light load, although the DAB converter isrequired wide operating range between light and heavy loadcondition [11-12]. In order to reduce the error of thetransmission power, the dead-time compensation method has
been proposed [12]. In this paper, the dead-time error iscompensated by the feedforward compensation that subtracts
the dead-time phase from the reference of phase difference.
However, this conventional method is only applied when thetransmission-power error is liner. Moreover, the inverteroutput-voltage polarity is reversed, which is called a voltagepolarity-reversal phenomenon, inducing a strong nonlinear
behavior when inductor current becomes zero during thedead-time. Consequently, the non-liner transmission power
error due to the dead-time is not compensated by theconventional compensation method [11]. Meanwhile, athree-level operation has been proposed in order to improveThis paper is organized as follows; firstly, proposed
three-level operation modes and non-liner dead-timecompensation method are proposed. Secondly, theelimination method of the dc offset in the inductor current
and magnetizing current is introduced. Finally, experiments
are conducted in order to verify the compensation method of
non-liner dead-time error and the elimination method of dc
offset in the inductor current and the magnetizing current
when the operation mode is changes.
II.

CONVENTINAL CONTROL METHOD

Fig. 1 shows the circuit configuration of the DAB
converter. The DAB converter consists of two H-bridge
inverters, an additional inductor, and a high frequency
transformer. The primary and the secondary inverters
generate the square-wave voltage, and transmission power iscontrolled by a phase difference between each inverter
output voltage using the SPS control. The transferred poweris expressed by (1) [12].

P=

δ 
NV inVout δ 1 −
ωL
π 


(1)

where, ω is switching angular frequency, L is additional
inductor. N and δ are turn ratio and phase difference between
primary inverter output voltage vpr and secondary inverter
output voltage vse.

Fig.3 shows the influence of the voltage-polarity-reversal
phenomenon for the transmission power at the condition of
Vin = NVout. The transmission power error caused by thevoltage-polarity-reversal phenomenon is not compensated by
the conventional feedforward method because thetransmission power error due to the dead-time varies
depending on the width of the voltage-polarity-reversal.
Meanwhile, the period of the voltage-polarity reversal
depends on the relationship between the inductor current andthe dead-time period [12]. At the period between 2δdt and δdt,
the transmission power error is varied in according with thewidth of the voltage-polarity-reversal. After δdt, thetransmission-power error becomes constant value of thedead-time without the voltage-polarity reversal. In the area
where the phase difference δ is smaller than the dead-timeδdt, power is not transferred because the phase difference iscanceled by the dead-time.
III.

PROPOSED DEAD-TIME CONPENSATION METHOD

Fig. 2. Operation waveform with conventional two-level operation.

Fig. 3. Influence of the dead-time for the transmission power.
Base point

Basecarrier0A-phasecarrierA

0Fig. 4 shows the operation principle of controlling thephase difference and the zero voltage phases. The three-level
mode is operated by the phase difference and the zerovoltage phases with controlling switches of each leg
independently [8]. In order to control switching devices
independently, phase-shift carriers for each leg arecontrolled. The phase difference and zero-voltage phases are
generated as follows. First, the phase difference is controlled
by advancing the phase-shift carriers of the primary inverter
by a half of the phase difference and delaying the phase-shift
carriers of the secondary inverter by a half of the phasedifference. Next, phase-shift carriers of each inverter are
shifted by zero-voltage phases of primary and secondaryside. Amounts of the phase-shift of each carrier on the basisof the top of the base carrier are expressed by (2).

θ A = 0.25δ + 0.75ε − 0.25γ
θ B = 0.25δ − 0.25ε − 0.25γ
θ R = 0.25δ − 0.25ε − 0.25γ
θ S = 0.25δ − 0.25ε + 0.75γ

Fig. 1. Dual active bridge converter.

Transmission power P

Fig. 2 shows the conventional operation waveform withand without the dead-time. In the case of taking no accountof the dead-time, the transmission power is controlled by thephase difference without the transmission power error.
However, in an actual system, the dead-time is needed inorder to prevent two switching devices to avoid the shortcircuit. In this case, the transmission-power error occurs atlight load when the inductor current becomes zero during thedead-time. The inductor current is clamped to zero because
current does not conduct primary inverter during the deadtime. As the result, polarity of primary inverter output
voltage is reversed by the clamped inductor current.
Consequently, the transmission-power error occurs because
the voltage-polarity-reversal phenomenon occurs due to thedead-time [12].

(2)BB-phasecarrier0R-phasecarrier0RS-phasecarrierS
0Fig. 4. Operation principle of controlling phase-shift and zero voltage
phases.

where, ε and γ are the zero voltage phase of primary inverter
output voltage and secondary inverter output voltage.

Fig. 5 shows operation waveforms of the proposed threelevel mode. In the proposed operation method, the zerovoltage phases of each inverter are controlled identicallywith the phase difference δ as a constant. In order to transfer
the power over wide load range, the three-level operation isfurther divided into the three-level mode I for very light load
operation and the three-level mode II for light load operation.
The specification of three-level modes under the condition of
Vin = NVout and ε = γ as follows. Note that the parasitic
capacitance and the magnetizing current are not consideredin this calculations.
1) Three-level mode I for very light load
Under the steady state condition, the inductor current iLI
at the switching moment as follows, Vin(0 ≤ θ ≤ δ − ε ) ωL (θ − δ + ε )0(δ − ε ≤ θ ≤ ε ) ViLI (θ ) =  in (θ − ε )(ε ≤ θ ≤ π − ε )
(3)
 ωL
 Vin
(π − ε ≤ θ ≤ δ + ε ) ωL (π − 2ε ) Vin (π − θ − ε + δ ) (δ + ε ≤ θ ≤ π ) ωL
According to (3), the transmission power PI is calculatedby (4),
PI =

2 π
Vin2
v
(
θ
)
i
(
θ
)
d
θ
=
(π − 2ε )2
pr
LI
2π 0
2πω L

(4)

In order to be operated by the three-level mode I, PWM
pulses of each inverter output voltage need to be overlapped.
The condition of the three-level mode I is expressed by (5),2ε ≥ π − δ(a) Three-level mode I.

(b) Three-level mode II.
Fig. 5. Operation waveforms of proposed mode.

(5)2) Three-level mode II for light load
Under the steady state condition, the inductor current iLII
at the switching moment as follows,

Fig. 6. Dead-time influence of three-level mode.

B. Non-liner Dead-time Error Compensation

1) Dead-time influence and compensation of three-level
mode
0
0
(
)
≤
θ
≤
ε

Fig. 6 shows the dead-time influence of the primary Vininverter output voltage and the inductor current of the three(ε ≤ θ ≤ ε + δ ) ωL (θ − ε )level mode. The voltage-polarity-reversal phenomenon iseliminated by designing the clamped phase λ to become
V
iLII (θ ) =  in δ
(ε + δ ≤ θ ≤ π − ε )(6) longer than the dead-time because the voltage-polarity ωLreversal phenomenon occurs when the inductor current
 Vinbecomes zero during the dead-time. The condition that the
(
)
(
)
π
−
ε
+
δ
−
θ
π
−
ε
≤
θ
≤
π
−
ε
+
δ
 ωL
clamped phase is longer than the dead-time is given by (9),0(π − ε + δ ≤ θ ≤ π )(9)
2 ε ≥ δ dt + δThen, the transmission power PII is given by (7) using (6),However, the duty of the primary inverter output voltage
is reduced by the dead-time because diodes of the B-phase
2 πVin2(7) leg is not conducted during the dead-time instead of
PII =v pr (θ )iLII (θ ) dθ =δ (2π − 4 ε − δ )
2π 0
2πω L
designing clamped phase to be longer than the dead-time.
In order to be operated by the three-level mode II, pulses
Therefore, the duty of primary inverter output voltage isof each inverter output voltage are not overlapped. The
needed to be compensated.
condition of the three-level mode II is expressed by (8),2ε < π − δ(8)Fig. 7 shows the dead-time compensation for the threelevel mode. The duty error by the dead-time is compensatedby (10) because the decrease of the duty affects the phasedifference δ and the zero voltage phase ε,δref = δ + δdt / 2εref = ε − δdt / 2γref = ε(10)where, δref, εref and γref are reference of the phase difference,reference of zero voltage phase of the primary inverter, andzero voltage phase of the secondary inverter.
2) Decision of phase difference δ
In this chapter, the phase difference δ is chosen astransferring maximum power in order to compensate wide
load range.
a) Three-level mode I for very light load
According to (4), the maximum transmission power isgiven by minimizing the zero voltage phase ε. Therefore, thephase difference of maximum transmission power δmax_I isgiven by (11) under the condition: right-hand side of (5) and(9) are equal.

Fig. 7. Dead-time compensation mehod for three-level.

Fig. 8. Distinguishment of operation modes.

1(11)(π − δdt )2
Therefore, the range of the zero voltage phase ε and thetransmission power of mode I PI are expressed by (12) and(13) using (4), (5) and (9).
δ max I =1
(π + δdt ) ≤ ε ≤ 1 π
4
2

0 ≤ PI ≤

(12)

Vin2
(π − δdt )2
4πω L

(13)

b) Three-level mode II for light load
The transmission power becomes maximum when (13)holds equation because the zero current phase is the shortest.
Thus, the transmission power PII is expressed by (14) from
(7) and (9),
2
in

{

}

V
(14)
− δ 2 + (− δdt + 2π )δ
2πω L
According to (14), the phase difference δ of transferring
the maximum power is derived by finding the minimal valueof the phase differenceδ. The minimal value of the phasedifferenceδ is introduced by (15),PII =Fig. 9. Flowchart of determinaiton of operation mode.

1(π + 2δdt ) ≤ ε ≤ 1 (2π + δdt )
6
6

(17)

2
Vin2
(π − δdt )2 ≤ PII ≤ Vin (π − δdt )218πω L6πω L(18)3) Determination of operation modes
Fig .8 shows the operation range of the proposed methods.
d(15) The two-level mode is applied at the linear region of the{− δ 2 + (− δdt + 2π )δ }= 0dδtransferred power. The three-level mode I is adopted when
the load is very light with the dead-time influence. In
Hence, the phase difference δmax_II of the maximum
addition, the three-level mode II is applied between the twotransmission power of mode II is given by (16),level mode and the three-level mode I.
1Fig. 9 shows the flowchart for the determination of(16)
δmax II = (π − δdt )3
operation modes. the operation mode is determined asfollows; the phase difference δ is calculated with the
Therefore, the range of the zero voltage phase ε and thetransmission power Pref by (19) from (1).
transmission power of the mode II PII are expressed by (17)and (18) using (8) and (9).

δ=4πω LPref 1 
π − π2 −

Vin2
2 


The operation mode is decided by the reference of thephase difference δref and the dead-time δdt. Under thecondition of δref > 2δdt as Fig. 3, the two-level operation isapplied. In contrast, the three-level operation is used in thecondition of δref ≤ 2δdt. The three-level operation with mode
II is applied when the zero-voltage period ε satisfies (20),1ε ≥ (2π + δdt )6(20)

In the three-level mode II, the zero-voltage period ε isgiven by (7) in order to transfer the power Pref.

ε=2πωLPref 1
 2π − δ −δVin2 4(21)

If the condition (20) is not established, the DAB
converter is operated by the three-level operation with mode
I. In this mode, the zero-voltage phase ε is calculated by (22)from (4) in order to transfer the power Pref.
ε=2πωLPref 
1 
π−
2


2
Vin


Three-level
mode

(19)

(22)

By applying the proposed three-level operation, the nonlinear transmission error due to the dead-time iscompensated.

Basecarrier1

Updating point
0 of A and U phase
A-phase 1
carrier 0.5
0B-phase 1
carrier 0.5
0R-phase 1
carrier 0.5
0S-phase 1
carrier 0.5
0
S1
S3
S5

ON
0
ON
0
ON
0

S7

0

vpr

0
0

iL

0

im

0

Fig. 11 shows the flowchart of the mode changing
between three-level mode and two-level mode with dc offset
elimination. The first phase is started at the top of the base

Step 2

Step 1
Step 2Z
pr

Y

Inserted zero voltage phase

V out(π − 2 γ )2ωLAssumed phase

X

−

Vout
π
2ωL

Fig. 10. Relationship between each inverter output voltage and phase-shift
carriers of proposed method.
Mode changing start
Increment base carrier counterNo

DC OFFSET ELIMINATION METHOD WITH OPERATION
MODE CHANING

A. Mode-change from three-level mode to two-level mode
Fig. 10 shows relationship among each inverter output
voltage, phase-shift carriers and switching signals of
proposed method. The operation mode changing is divided
into two phases, where the length of each step equals to aswitching period. The dc offset in the inductor current iseliminated in first phase, whereas the dc offset in themagnetizing current is eliminated in second step. The carrierof each leg shown in Fig. 1 is adjusted in order to achieve theoperation mode changing. In the first phase, the modechanging is implemented such that the voltage-time productaround the mode changing points becomes equal, as shownin the shaded green and blue areas of Fig. 10, resulting no dc
offset occurring in the inductor current [12]. However, the dc
offset in the magnetizing current occurs during the firstphase. In order to eliminate the dc offset in the magnetizing
current, zero voltage phases are inserted into the inverter
output voltage in the second phase in order to adjust themagnetizing current peak. The elimination of the dc offset in
the magnetizing current is conducted by two steps. In thefirst step, the zero-voltage phase is inserted into each output
voltage in order to keep peak value of two-level magnetizing
current by controlling phase-shift carriers. Then, phase-shift
carriers are modified in the second step in order to preventthe error of the phase difference due to carrier-control.

Step 1Same area
vse

Two-level
mode

Updating point of B and V phase

ON

Phase 1IV.

Elimination of Elimination of
dc offset in
dc offset in
inductormagnetizing
current
current

Base carrier = 1
Yes
Regular carrier update
at top and bottom carrier

Set counter

pr_cnt for primary side

Set counter

Decrement primary side
zero voltage period counter
No

Decrement secondary side
zero voltage period counter
No

Counter = 0

for secondary side

Counter = 0

Yes
Save difference Acnt
between A-phase value and 0.5

Yes
Save difference Rcnt
between R-phase value and 0.5

Replace A-phase counter value with 0.5

Replace R-phase counter value with 0.5

Increment A-phase carrier counter

Increment R-phase carrier counter

Phase 2No

A-phase carrier count = 0.5

Yes
Subtract A-phase carrier count from Acnt

No

R-phase carrier count = 0.5

Yes
Subtract R-phase carrier from Rcnt

Mode changing end

Fig. 11. Flowchart of dc offset elimination for mode changing.

carrier in order to make the voltage-time product around themode changing points becomes equal, i.e. the elimination of
the dc offset in the inductor current. At the end of the firstphase, the magnetizing current is estimated by theoreticalequation. The peak of the magnetizing current in the second
phase needs to be adjusted in order to eliminate the dc offset
in the magnetizing current. The adjustment of the increase in
the magnetizing current is accomplished by inserting the zerovoltage phase into the inverter output voltage. Assuming thatthe peak value of the magnetizing current at the end of thefirst step is an initial value, the transient magnetizing current
im_tran is estimated by (23).

im _ tran = −VVoutθ + out (π − 2ε )
2ωLm
ωLm

(23)

where, Lm is the magnetizing inductance. The peak valueof the two-level magnetizing current im_2Lv is given by (24).

im _ 2 Lv = −

Vout
π
2ωLm

(24)

According to (23) and (24), the assumed period α when
the transient magnetizing current reaches the two-level peakis expressed by (25).
−

Vout
V
V
π = − out α + out (π − 2 ε )2 ω Lmω Lm
2 ω Lm

Vout
π
ωL

Vout
(π − 2ε )ωLV− out (π −δ2 Lv + δ3Lv + δdt − 2ε)2ωLFig. 12. Assumption of the peak value of three-level magnetizing current.

(25) returning the manipulated amount of carrier count of the firststep. Manipulated amounts of A and U phase-carrier counter
α =π−εΔAcnt and ΔRcnt are expressed as (28),
By inserting the zero voltage into secondary inverter
output voltage at the timing of the two-level peak using (25),
Δ Acnt = Acnt _ step 1 − 0 .5
(28)
the magnetizing current keeps up the two-level peak. In
Δ R cnt = Rcnt _ step 1 − 0 . 5
addition, the zero voltage is inserted into the primary inverter
output voltage in order to fit the phase difference to thewhere Acnt_step1 and Rcnt_step1 are the value of phase-shiftsecondary inverter output voltage. In the primary output
carrier counter when the zero voltage counter αcnt and αpr_cnt
voltage, the voltage-polarity-reversal phenomenon occurs at
become zero. In addition, ΔRcnt and ΔAcnt are the difference
the inserted zero voltage phase because the phase difference
between 0.5 and Acnt and Rcnt. According to (28), each carrieris small due to the inserted zero voltage phase. Hence, thecounter is adjusted as (29),dead-time error due to the voltage-polarity-reversal
phenomenon is compensated by adjusting the zero-voltage
Acnt _ step 2 = Acnt _ step 1 − Δ Acntphase. Thus, the assumed period of primary side αpr is(29)
Rcnt _ step 2 = R cnt _ step 1 − Δ Rcnt
calculated as (26),where, Acnt_step2 and Rcnt_step2 are the value of the counter of A
α pr = π − ε − δdt(26) and U phase-shift carrier at the second step. The error ofphase difference due to first step is avoided by calculating as
In order to insert the zero voltage phase at the assumed(29) when the carrier counters reach 0.5. Consequently, thephase αpr and α, the on-timing of switch S1 and S5 arethree-level operation is changed to the two-level operation
controlled by the A-phase carrier and the R-phase carrier. In
without introducing any dc offsets into both the inductor
the digital controller, a carrier is generated by up-down count.
current and the magnetizing current.
Therefore, on timing of S1 and S5 is controlled by changing
the value of the A-phase carrier counter and R-phase carrier
B. Mode-change from three-level mode to two-level mode
counter. In order to insert the zero-voltage phase using the
Fig. 12 shows the assumption of the peak value of the
up-down count of carrier, the assumed phase α and αpr are
three-level magnetizing current in order to eliminate the dc
needed to be converted to carrier count as (27),
offset in the magnetizing current when the operation mode ischanged from the three-level to the two-level mode. Unlikeα cnt = α π × c
the mode-change from the two level operation, the dc offset(27) in the inductor current is eliminated by utilizing the clamping

α
=
α
π
×
c
pr
 pr _ cntof the inductor current. In addition, the carrier count value iswhere, αcnt and αpr_cnt are converted value to carrier countnot needed to adjust carrier value in the second step in theform angle. c is the peak value of carrier counter in thechanging mode from two-level to three-level. Therefore, thedigital controller. The base point of counters are set at thedc offset in the magnetizing current is eliminated in apoint of Y and Z in Fig.10, i.e. just after the dc offset in theswitching period. The current value of the point B in Fig. 12
inductor current is eliminated. Next, zero-voltage periods areis needed to assume the timing of inserting the zero voltage
inserted when the zero-voltage-insert counter αcnt and αpr_cnt
phase. The value of the point B is determined by the zero
becomes zero with the countdown by a clock. In the first
voltage phase β that depends on the amounts of the phasestep, the A phase-carrier counter Acnt and R phase-carrier
shift of R-phase carrier between the mode-change. The zero
counter Rcnt are changed into 0.5 in order to insert zerovoltage phase β is given by (30) using (2) and considering
voltage phases by turned on S1 and S5. Thus, the transient
the lagging due to dead-time influence[12],magnetizing current keeps up that of the two-level peak, i.e.
the adjustment of the magnetizing current peak. After theβ = 0.5(δ2 Lv − δ3 Lv ) + ε − 0.5δdt(30)
first step, A and U phase-carrier counter Acnt and Rcnt are
where, δ2Lv, δ3Lv and ε are the phase difference of the twoadjusted in order to prevent the error of the phase difference.
level mode, the phase difference of the three-level mode and
The phase difference error due to first step is avoided byTable I. Experimental condition.

the zero voltage phase of the three level mode. According to(30), the current value of the point B is expressed by (31),im _ B = −Vout[π − {0.5(δ2 Lv − δ3Lv ) + ε − δdt }] + Vout π
2ωLm
ωLm

(31)
Vout
(π − δ2 Lv + δ3Lv + δdt − 2ε )2ωLm
From (31), the transient magnetizing current im_CD
between the point C and D is introduced by (32),=−im _ CD =VoutVθ − out (π − δ2 Lv + δ3 Lv + δdt − 2ε )
ωLm
2ωLm

(32)

Therefore, the assuming angle φ is given by (33) using(32) and the peak value of the three-level mode,Vout(π − 2ε ) = Vout φ − Vout (π − δ2 Lv + δ3 Lv + δdt − 2ε )
2ωLm
ω Lm
2ωLm
(33)

Fig. 13. Experimental waveform of two-level operationand three-level operation.

The dc offset in the magnetizing current is eliminated byinserting the zero voltage phase same as the three-level totwo-level mode using assumed angle φ.
V.

EXPERIMENTAL RESULTS

Table I shows the experimental parameters. A 2.5-kW
prototype of the DAB converter is tested in order to confirm
the validity of the proposed method for the transmissionpower error with the dc offset elimination. In thisexperimental parameters, the three-level mode I is applied
when the reference transmission power is between 0p.u and0.2p.u. The three-level mode II is also applied when thetransmission power is between 0.2p.u and 0.6p.u.
Fig. 13 shows the operation waveforms with the twolevel operation and the three-level operation. The voltagepolarity-reversal phenomenon occurs with the 47.6% error of
the transmission power when conventional two level mode isapplied. In contrast, by applying the proposed method, thetransmission power error is reduced by 45.6% without
voltage-polarity-reversal phenomenon.
Fig. 14 shows the characteristics of the transmission
power against the reference-transmission power. The
transmission power at light load becomes 0 W because theTransferred power P [p.u.]

φ = 0.5(2π − 4ε − δ2 Lv + δ3 Lv + δdt )Fig. 14. Characteristics of transferred power.

phase reference δ is smaller than the dead-time-induced
phase error δdt when using only two-level operation. By
applying the three-level operation, the transmission-power
error at light load is significantly reduced compared to that of
the two-level operation. This benefits both the transient
response of the power control and the elimination of the dc
offset when the operation mode alternates.
Fig. 15 shows the transient response of changing theoperation mode from the three-level mode to the two-level
mode. This changing mode is conducted when thetransmission power is changed from 1.0 kW to 2.5 kW by astep change. Note that the steady state dc offset is included in
the magnetizing current before the step change because ofantisymmetric in the gate signals. No dc offset occurs in theFig.15 Transient response of changing operation mode from three-level mode to two level mode.

Transientstate

Two-level mode
P=2.5kW

Three-level mode
P=1kW

Two-level mode
P=2.5kWTransient
state

Three-level mode
P=1kW

Output voltage of primary invertervpr 1kV/div0
Output voltage of secondary inverter vse 1kV/div
0
Inductor current of primary inverter iL 20A/div
0
Reduced by 56%

0.96A

0

Steady-state offset:0.96A

0.42A

Magnetizing current im 1A/div(a) Without proposed method

40 s/div(b) With proposed method

Fig. 16 Transient response of changing operation mode from two-level mode to three-level mode.
A General Approach Toward Standardization", IEEE Trans. on
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power is changed form 2.5 kW to 1.0 kW. Without theContactless Electric Vehicle Battery Charger", IEEE Trans. on
proposed method, the peak value of -0.96 A occurs in the
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magnetizing current at the transient state due to the dc offset.
[7] K. Aoyama, N. Motoi, Y. Tsuruta, A. Kawamura: "High Efficiency
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On the other hand, by applying the proposed method, theTerminal Voltage", IEEJ Journal of Industry Applications, Vol. 5, No.
peak value of the magnetizing current is reduced by 56%. In
1, pp.12-19, 2016.
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inductor current. Nevertheless, in the magnetizing current,
the peak value of -1.3 A occurs due to the dc offset. In
contrast, by applying the proposed method, the peak value ofthe magnetizing current is reduced by 34%. Furthermore, thisdc offset is eliminated just after two switching periods.