Isolated Single-phase Matrix Converter using
Center-tapped Transformer for Power Decoupling Capability
Nagisa Takaoka, Hiroki Takahashi and Jun-ichi ItohStudent member, IEEE, Member, IEEE, Senior Member, IEEE,
Nagaoka University of Technology, Japan
1603-1, Kamitomioka-machi
Nagaoka, Niigata, Japanntakaoka@stn.nagaokaut.ac.jp; thiroki@stn.nagaokaut.ac.jp; itoh@vos.nagaokaut.ac.jp Abstract -- This paper proposes a bi-directional isolated singlephase matrix converter with a center-tapped transformer, which
is used in a battery storage system connecting to a single-phase
AC load. The proposed converter consists of a full bridge inverter,a high-frequency center-tapped transformer, and a matrix
converter. The matrix converter is employed with a pulse density
modulation in order to achieve zero-voltage switching (ZVS). On
the other hand, a common mode voltage of the center-tapped
transformer and a small capacitor are utilized in order to absorb
the power ripple of the single-phase AC load without additionalswitches. Furthermore, the switches in the full bridge inverter
partially achieve ZVS in order to reduce the switching loss. These
characteristics result in a high-power-density converter. As theexperimental results with a 1kW-prototype, the proposed
converter reduces the DC current ripple generated by a singlephase AC load by 80.2% in the discharging mode, and 76.8% in
the charge mode. Besides, the low AC side voltage THD in the
discharge are below 3.0% over entire the AC power range.
Index Terms-- Matrix converters, DC-AC power converters,
Bidirectional power flow, Delta-sigma modulation;I.

INTRODUCTION

Recently, photovoltaic (PV) and wind turbine systems havebeen actively researched for renewable energy [1-6]. Energy
storage systems using batteries are required for power levelingin the renewable energy system due to the power fluctuation
caused by weather condition. In these systems, bi-directional
isolated DC-to-single-phase-AC converters are employed inorder to provide a safe connection between the battery and theAC equipment. Downsizing and long life-time are desiredfeatures for such converters. A conventional converter
constructed by a full bridge inverter as a primary converter, ahigh frequency transformer, and a secondary converter
composed of a diode rectifier and an inverter, has been
proposed in [7]. However, a bulky electrolytic capacitor isrequired in the secondary converter to smooth DC-link voltage.
A bulky electrolytic capacitors limit converters to a short lifetime. Therefore, this circuit topology restricts high power
density and long life-time.
In last few years, several circuit topologies with the power
decoupling capability have been proposed in order to eliminate
the bulky capacitor [8-15]. However, these papers employ not

only passive components but also additional switching devices
for the power decoupling capability. It is limited theminimization and decreases the efficiency. In addition, an
isolated type of DC to single-phase AC converter iscompulsory in order to achieve the safety requirement. In order
to avoid the additional switching devices, a power decoupling
method using a center-tapped transformer and a small
capacitor has been presented [16]. This topology does not needadditional switches and can suppress significantly the ripple
component in the input current caused by the single-phase AC
load. However, this circuit topology cannot achieve the bidirectional power conversion because the authors in [16]constructs the isolated DC-to-single-phase-AC converter byusing a diode bridge rectifier and a PWM inverter at thesecondary side of the transformer. Thus, the application for theenergy storage system in [16] is limited.
On the other hand, a matrix converter has attracted many
attentions because no energy buffer stage is required, i.e. theelimination of the bulky electrolytic capacitor [17]. Thus, thematrix converter is expected to achieve smaller size and longer
life-time compared to the conventional rectifier-inverter
topology. Furthermore, the matrix converter can achieve thebi-directional power conversion. Therefore, the employmentof the matrix converter together with the center-tapped
transformer and the small capacitor can achieve for therequirements of the energy storage system, i.e. downsizing,
long life-time, and bi-directional power conversion.
This paper proposes a bi-directional isolated DC-to-singlephase -AC converter, where a matrix converter and a centertapped transformer are employed. The proposed converter
does not require additional switching devices for the power
decoupling capability, owing to the employment of the centertapped transformer. In particular, a common mode voltage ofthe center-tapped transformer is generated to compensate thepower ripple [18]. Furthermore, by applying a pulse density
modulation (PDM) into the matrix converter, zero-voltage
switching (ZVS) is achieved for all switches of the matrix
converter. Besides, the switches of the full bridge inverter
partially achieve ZVS, which further reduces the switchingloss. This paper is organized as follows; in section II
conventional and proposed topologies for the DC-to-single-

phase AC converter are introduced. In section III, the principleof the power decoupling in both direction, i.e. the charge anddischarge mode of the battery, is explained. In section IV, themodulation methods of the converters in the primary andsecondary side of the transformer are explained together withthe mechanism of the ZVS achievement. Finally, in section V,
the fundamental operation waveforms of the proposed systemwith discharging/charging operation modes are confirmed bysimulations and experiments.
II.

CIRCUIT TOPOLOGY

Conventional Circuit
Fig. 1 shows the conventional isolated DC-to-single-phase
AC converter. The conventional circuit is comprised of a fullbridge inverter, a high-frequency transformer and a rectifierinverter topology. The full-bridge inverter at the primary sideof the transformer outputs a high-frequency square voltage inorder to reduce the volume of the transformer. The secondaryside rectifier converts the high frequency voltage to a DC
voltage and the voltage-source inverter generates the gridcurrent. When the grid current igrid is sinusoidal waveform andthe unity power factor is achieved, an instantaneous grid power
pgrid is expressed by

Idc
LLPF

igrid
N1 N 2
Lload

Vdc

Cdc

CLPF

vgrid

vout

BTB converter
Full bridge Inverter
Fig.1. Conventional isolated DC-to-single-phase-AC converter. The
conventional converter employs a bulky electrolytic capacitor Cdc toabsorb the power ripple caused by the single-phase load.

A.

p grid 

2Vgrid sin ot   2 I grid sin o t  Vgrid I grid 1  cos2ot (1),

 Pgrid  Pgrid cos2o t 

where Vgrid is the root-mean-square values of the grid voltage,
Igrid is the RMS value of grid current, Pgrid is the average grid
power and ωo is the grid side angular frequency. A ripple
component shown as the second term on the right side of (1)should be eliminated in order to obtain a constant DC current
in the DC bus. Other topologies to absorb the power ripple, forexample C-L-C topology, are not effective to reduce thevolume of the conventional circuit [19]. Hence, this converter
has to adopt a bulky electrolytic capacitor Cdc to absorb thepower ripple. However, a bulky electrolytic capacitors limit
converters to a short life-time.
B.

Proposed Circuit
Fig. 2 shows the isolated DC-to-single-phase matrix
converter using a smaller buffer capacitor. The matrix
converter is employed as a secondary-side converter in order
to eliminate the DC-link capacitor. In addition, the proposed
circuit employs a center-tapped transformer, the role of which
is not only to link the full bridge inverter to the matrix
converter for isolation, but also to realize the power decoupling
capability. In the buffer circuit, a buffer capacitor Cbuf and an
inductor Lbuf is used to absorb the power ripple. In particular,
the charge and the discharge of Cbuf compensate the power
ripple, whereas the inductor Lbuf is used to control a buffer
current ibuf which fluctuates the buffer capacitor voltage. The
inductance of the buffer circuit is designed based on anallowable ripple current of the buffer current. Thus a higher

Power Flow ofDischarging Mode
idc

power Flow ofCharging Mode

A-phase B-phase

LLPF
vap
S1ap
Vdc C
LPF

Cds
S1bp

Cds
vbp
ia

iinv

vinv

ib

Cds

ibuf
Lbuf

van
S1an

S2ap

S1bn

Cds
vbn

Cbuf

N1

S2bp

igrid

N2
Lload
vout

vbuf

S2an

vgrid

S2bn

Matrix converter
Full bridge Inverter
Buffer circuit
Fig.2. Proposed isolated DC-to-single-phase-AC converter. The
secondary converter consists of the matrix converter in order to eliminate
the DC-link smoothing capacitor.

inductance is not needed for the buffer circuit because
capacitors for an active power decoupling typically accept
large current ripple. In addition, the inductance of the buffer
circuit can be small by using high switching frequency.
If the power ripple is absorbed by electric capacitors at a
DC-link in the conventional system, the required capacitancein order to absorb the power ripple is decided by the rippleenergy. Thus, the capacitor voltage ripple is presented by
E 

1 
Vc 2
Vc 2 C (Vave )  (Vave 
) 
2 
2
2


(2),

where E is a ripple energy caused by the single-phase AC side,
C is a smoothing capacitor, Vave is an average of a buffer
capacitor voltage and ΔVc is a fluctuation voltage of C. In theconventional method with a bulky electrolytic capacitor, andΔVc is designed to be small for a stable operation of an inverter.
Therefore, in the power decoupling method using the bulky
electrolytic capacitor, the large capacitance is required.
Assuming the 1.5-kW conventional converter, theconventional converter needs an electrolytic capacitor of 2650
μF with a voltage ripple of 5% at the DC-link. In contrast, thesame energy compensation capability is ensured by thefluctuated buffer capacitor voltage ΔVc in the proposed method.
Thus, the capacitance in the proposed system can be reduced.
Note that in the center-taped transformer, the main power fromthe battery to the grid is controlled by the differential-mode

Idc

ibuf

(3)

  Pgrid cos2o d
t0

by using (1) and the voltage–current equation of the capacitor.
Where t0 is the start time of the operation. Then, the buffer
capacitor voltage vCbuf which absorbs the power ripple
completely, is derived as
2
Pgrid
Vdc

sin 2ot 4
oCbuf(4)

from (3), where Vdc/2 is an initial voltage of Cbuf. Finally, ibuf*
is derived asibuf  Cbuf*

dvCbufdt

Pgrid cos20t *chargedischarge

＝
t

0

t

pgrid

Buffer powerpbuf [W]Input power
Pdc [W]t0

Output power
pgrid [W]Fig.3. Principle of power decoupling capability with buffer capacitor
in discharging mode. The buffer power to compensate the power ripple ischarged or discharged at Cbuf. Consequently, the DC input current without
the ripple component is obtained.

pdc

pbuf
t

0

t

0

＋ charge
Input power
Pdc [W]

pgrid

discharget0＝

Buffer powerpbuf [W]Output power
pgrid [W]Fig.4.
Principle of power decoupling with buffer capacitor in
charging mode.

tvCbuf * 

pbuf

＝

t
t
dvCbuf d
WCbuf   vCbuf ibuf d   vCbuf  Cbuf
t0
t0
d 


t

0

＝

0

＝

III. POWER DECOUPLING CAPABILITY

Battery Discharging mode
Fig. 3 shows the relationship among the DC power, theinstantaneous grid power pout and the power decoupling with
Cbuf in the discharged mode. The buffer current ibuf is controlled
to fluctuate the buffer capacitor voltage vCbuf, which thenabsorbs the power ripple caused by the single-phase AC load.
First, the buffer capacitor energy WCbuf is derived as

igrid= 2Igrid sin(ωot)

discharge
pdc

A.

igrid
t

0

t

t

0

charge0(4)where ΔiL is the allowable current ripple ratio, ibuf_ripple is thepeak to peak value of the inductor current ibuf, Vdc is an average
DC voltage and fsw is the switching frequency of the AC link.

2

(5)

Pgrid

Vdc

sin 2ot 4
oCbufby using an grid power reference Pgrid*.
The power ripple in the discharging mode is compensatedby regulate the buffer current into the current reference ibuf* asshown in (5).
B.

t

0

I buf _ max

When the battery is grid connected to the single-phase AC
side, the DC input current idc includes a ripple component at
twice of the grid frequency. In this section, the principle of thepower decoupling for the bi-directional power flow, i.e. thecharge and discharge modes of the battery, are explained.

vgrid= 2Vgrid sin(ωot)＋

ibuf _ ripple / 2

t

0

vgrid

＋

Δi L 

vCbuf
VCmax
VCmin

Vdc

＋

voltage, whereas the power ripple is absorbed by controllingthe common-mode voltage in order to fluctuate the buffer
capacitor voltage [18]. The inductance of the buffer circuit in
the worst case is calculated by
Vdc
Vdc  vCbuf vCbuf  2
Lbuf 
(3)
2 Δi L f sw
Vin

Battery Charging Mode
Fig. 4 shows the relationship among the DC power, theinstantaneous grid power pgrid and the power decoupling in the
charging mode. Similarly, the buffer current regulation
fluctuates the voltage of buffer capacitor vCbuf, which absorbs
the power ripple caused by the single-phase load. However, thepower flow is reverse compared to the discharging mode as
described previously. Therefore, the buffer power pbuf which
compensates the power ripple of the charging mode is derivedby(6),
pgrid  pin  pbuf
pbuf  Pgrid cos2ot (7)corresponding to the power flow direction as shown in Fig. 2.
Where the DC power pin is equal the grid power Pgrid. Thus, thebuffer capacitor voltage vCbuf is derived fromvCbuf * 

2
Pgrid
Vdc

sin 2ot 4
oCbuf(8).

In summary, the buffer capacitor voltage vCbuf which absorbs
the power ripple in both mode is decided by the power ripple

and the power flow. Hence, the buffer capacitor voltage can becontrolled according to the power flow direction by detecting
the polar of the grid power as shown in Fig. 3 and Fig. 4.
IV. MODULATION METHODA.

Full Bridge Inverter
The modulation for the full bridge inverter at the primaryside of the transformer in the proposed converter is explainedin this section. In the proposed converter, if the transformer
current discharges completely the drain-to-source capacitor
Cds during dead time, the switching becomes ZVS. Note that if
the buffer current flowing in the buffer circuit discharges Cds
during dead time, the switching also becomes ZVS. The ZVS
achievement of the primary-side inverter depends on theoperation mode of the secondary-side converter. When PDM
is applied for the secondary-side converter, there are intervals
when the secondary-side converter outputs the zero voltage
and makes p-n line become open. In summary, two modes
occur at the secondary side of the transformer; conduction
mode and zero-voltage mode.
1) Conduction mode at secondary side of transformer
In this mode, the secondary-side converter does not
generate the zero voltage. Therefore, the transformer current isflown continuously to the grid. In order to achieve ZVS in the
primary-side inverter, the relationship among the buffer
current ibuf, the output current of MC, i.e. the grid current igrid,and the currents in each arm of the full-bridge current ia, ib isrequired.
In the conventional DC-to-AC converter without the buffer
circuit, the grid current igrid equals to the transformer current,
i.e. iinv or ia, assuming that the exciting current is small enoughto be neglected. Therefore, the switching devices achieving the
ZVS are determined by the pole of the transformer current ia.
The relationship between the pole of the transformer current ia
and the ZVS-achieving switching devices is as follows.
ia > 0 : San, Sbp achieve ZVS
ia < 0 : Sap, Sbn achieve ZVS
On the other hand, in the proposed converter, thetransformer current overlaps with the common current. Thus,
the currents ia, ib in each arm are presented by1
ia (t )  idif (t )  ibuf (t )
2

(9),

1
ib (t )  idif (t )  ibuf (t )
2

(10),

where idif (t) is the transformer current which changes
according to the output current of MC, and ibuf (t) is the buffer
current in the buffer circuit, which changes according to thegrid power. If the current ia, ib in each phase is below the lower
limit value ilim the charges in the drain-to-source capacitanceCds cannot be discharged completely during dead time Tdead.
The lower limit value ilim which achieves ZVS in the primaryside is presented by

Output voltage of primary-side inverter [V]
400
0
-400
A-phase current [A]100(a) (b) (a)-10(b)
Transformer current at secondary-side[A]100-10Grid current [A]
10
0
-10
0.04
0.05
0.06
0.07
[ms]
Fig. 5. Relationship between the phase current of the primary-side andthe grid current. The phase current of the primary-side has two current
mode; first, the condition mode (a) which the both of the buffer current
and the grid current flow. Other is the zero-voltage mode which the buffer
current flows to the primary-side of the transformer.

2CdsVdc(11).
Tdead
Fig. 5 shows the relationship among the grid current, thetransformer current and the voltage at the primary-side in one
carrier period without the proposed power decoupling. The
phase current of the primary-side has a two mode; first, thecondition mode which the matrix converter does not generate
the zero voltage, the transformer current and the buffer current
are flowed to the primary-side of the transformer as shown the(a) range of Fig. 5. Other, the zero-voltage mode which thematrix converter generates the zero voltage, the buffer current
is flowed to the primary-side of the transformer as shown the(b) of Fig.5. Thus, the current peak of the transformer without
the buffer current component equal to the peak value of thegrid current when m equals to the turn ratios of the transformer
N1/N2. The condition which achieves ZVS at the primary-side
inverter is presented byilim 

ia  ilim(12),

ib  ilim(13).

In the (a) range of Fig.5, let the grid current be igrid by (11)(13), (9)-(10) are rewritten asi a (t )  m

N1
N2

2 I grid sin( o t ) 

1
2

Pout cos2 0 t 
2

Vdc
Pout

sin 2 o t 4 o C buf
(14),

ib (t )  m

N1
N2

2 I grid sin( o t ) 

1
2

Pout cos2 0 t 
2

Vdc
Pout

sin 2 o t 4 o C buf

(15).
The current in each arm of the primary-side inverter is the sumof the buffer current and the output current in this mode asshown the range (b) of Fig.5. Therefore, both the ZVSachieving switching devices and the ZVS range are determinedby the pole of transformer current, the buffer current and thephase  =ωot.
In order to achieve ZVS in the primary-side inverter, thecurrent ia, ib in each arm are required to be higher than the limit
value, which enables. The limit current ilim which achieves
ZVS in the primary-side inverter is expressed as ini grid v grid  Pout  4vCbuf

C ds
Vdc
Tdead

(17)
using the grid current igrid and (5).
Fig.7 shows the relationship between the phase current at
the primary-side converter and the grid waveform. Note thatthe definition of the current flow is shown as in Fig. 2, theenvelope curves of the each arm current do not include the
idc

Cds
Vdc  Pout
Tdead
(16).
igrid N
2vCbuf m 1  v gridN22) Zero-voltage mode at secondary side of transformer
Fig. 6 shows the current path-way of the proposed converter
when the matrix converter generates the zero voltage. In theconventional circuit without the buffer circuit, the secondarytransformer current becomes zero. Therefore, the primary-side
inverter cannot flow the transformer current in order to meet
the ZVS achieving condition as in (16). On the other hand, inthe proposed converter, by applying the center-tapped
transformer and the buffer circuit as shown in chapter III thetransformer current can still flow into the buffer circuit evenduring the zero-voltage mode at the secondary side of thetransformer as shown the range of Fig.5. During this mode, thetransformer current depends on the buffer current. Thus, theZVS-achieving switching devices are decided by the gridcurrent and the phase  because the buffer current are
dependent on the grid current igrid (t). Note that, the ZVS
condition of the ZVS-achieving switching devices which
varies dependently on the grid current igrid (t) and the phase are discussed by the simulation.
The current to discharge completely the drain-to-source
capacitor Cds has to meet (16). Therefore, the boundary
condition of the buffer current to achieve ZVS at the primaryside inverter is expressed as in
2vCbuf

S2ap

PI

Fbuf (s)PI

FiltervCbuf
Average voltage control for
buffer capacitor
vgrid

PLL

ib

sinθ
2

2

sgn(x)
2
Igrid* Ibuf*

igrid*

iout

vs

vout

S2bn

S1bn

Fig. 6. Relationship between switching operation and current path in
the proposed circuit when the matrix converter outputs zero voltage.

20

A-phase current [A]
100 kHz

1 buffere current [A]2

100 Hz|ia| |ilim|

0-20B-phase current [A]20

Range which achieve ZVS|ib| |ilim|

0-20Grid voltage [V]200
0-200 Grid current [A]
20
0
-20
0.45

0.50
0.55
[ms]
Fig. 7. Relationship between phase current at primary-side inverter andgrid waveform. The limitation current ilim and the range which achieves
ZVS at the primary-side inverter is decided by igrid and the phase  asshown in (11)-(12).
vdif*

vbuf*

1
Vbus

Modulation offull bridge
inverter

vcom*
*

S1ap
S1an
S1bp
S1bn

2 |vcom |
1

N2

θ

S2bp

is

S2an
S1an

Buffer current control

ibuf*|Ibuf*||Igrid*|

ibuf

N1:N2

ia

Vdc

Normalization of buffer voltage reference
vCbuf_ave*

S1bp

S1ap

Vbus

Compensation of
secondary voltage
fluctuation of transformer

N1
Current control of Fig.9.
Concept
x of PDM employed in matrix converter. The PDM
output filter inductor treats a half cycle ofS2ap as a pulse
1/x the secondary voltage of the transformer
and synthesizes
the output voltage
witha density of the secondary voltage*
Modulation
*
**
vLout
S2an
vout
vout
pulses.
of matrix
PI
S2bp
converter
S2bn
vgrid
igrid

Fig.8. Control block diagram of proposed converter. The buffer current is controlled for the power decoupling. By PLL, the power flow direction isdetermined and the phase which is assigned to the grid current reference and the buffer current reference is calculated.

excited current. It is observed from Fig.7 that, if the current ineach arm satisfies the condition of the ZVS achievement as in(16)-(17), the switching devices at the primary-side inverter
can achieves ZVS. As a conclusion, this proposed converter
can achieve both ZVS in the primary-side inverter and thepower decoupling capability

Constant width
Outputvoltage

B.

V.

SIMULATION AND EXPERIMENTAL RESULTS

Table I shows the simulation condition in order to verify thefundamental operation of the proposed converter with thepower decoupling capability. When the ripple current ratio of
the buffer circuit is less than 30% with the conditions shown

High
Low

PDM signal

Fig.9.

Concept of PDM method applied in matrix converter.

S modulator
Quantizer
ABS



ZOH

1

MUX1

vout**

0
z

-1

S2ap
S2an

MUX1

Matrix Converter
Fig. 8 shows the control block diagram of the proposed
converter. The current and voltage controls in the proposed
method are realized with PI controllers. The full bridge
inverter provides a differential-mode voltage to excite thetransformer and a common-mode voltage to compensate thepower ripple [18]. As shown in Fig. 8, the buffer current
control for the power decoupling capability is employed inorder to regulate the voltage of the buffer capacitor vCbuf which
is used to absorb the power ripple caused by the single-phase
AC load. The buffer current reference ibuf* and the grid current
reference igrid* are decided by the direction of the power flowin order to achieve the bi-directional power flow operation.
Fig. 9 shows the concept of the PDM method applied in thematrix converter as the secondary-side converter. The PDM
generates the output voltage with the density and the polarityof the input voltage pulses. In Fig. 9, a half cycle of the input
voltage pulses are used as the minimum unit of the output
voltage waveform. All switching devices in the matrix
converter are switched at the zero voltage interval of thesecondary voltage of the transformer. Consequently, thematrix converter achieves ZVS which results in the decreasein the switching loss.
Fig. 10 shows the block diagram of the PDM based on thedelta--sigma conversion [20]-[21]. A delta-sigma conversion
is basically similar to an analog-digital conversion, whichconverts an analog signal into a digital signal of one bit. First,
in the PDM, the quantization error is integrated by comparing
the quantized grid voltage reference vout* holding by Zero
Order Hold (ZOH) and the quantizer output at one clock before.
Note that the timing of the ZOH is synchronized to the peak ofcarrier in the matrix converter. The output signal of thequantizer changes when this integrated quantization error
exceeds a threshold, which results in a switching. Because theswitching signals do not depend on the carrier frequency of thematrix converter, the pulse density of the grid voltage changes
continuously, which results in distributed pulses.
Consequently, comparing to the conventional PDM methodthat outputs concentrated pulses, the grid voltage ripple
becomes lower because the pulse is generated continuously in
one carrier period [20].

Secondaryvoltage of thetransformer

0

S2bp
S2bn

Polarity detection

S1bn

DELAY
(2CLK)

Fig.10.
Block diagram of PDM based on delta-sigma conversion.
This PDM reduces the quantization error and improves the output voltage
distortion. The MUX consists AND and EXNOR. This MUX selects theswitching phase of the matrix converter and synchronizes the on-off
timing with the gate signal S1bn.

DC bus voltage

TABLE ISIMULATION CONDITION
380 Vdc
Grid voltage

100 Vrms

Rated power

1kW

Grid frequency

50 Hz

Buffer L (Lbuf)

2.0 mH

Buffer C (Cbuf)

200 mF

Grid connectedinductor (Lout)

2.0 mH(6.3%)

Turn ratio oftransformer N2/N1

1.0

Natural angularfrequency of buffer 4000 rad/s
current control
Carrier frequency of
100 kHzfull bridge inverter

Natural angularfrequency of gridcurrent control

4000 rad/sin table 1, the inductance of Lbuf at 2.0 mH for convenience ofthe experiment.
A.

Simulation results in discharging mode
Fig. 11 shows the input and grid waveforms in the
discharging mode of at steady state. Fig. 11 (a) and (b) show
results without/with the power decoupling, respectively. The
DC input current is filtered by a LPF with a cut-off frequencyof 1 kHz in order to remove a switching ripple. As shown in
Fig.11 (a), the DC input current has a ripple component at 100
Hz caused by the single-phase load. The current ripple
component at 100 Hz is 101% of the average current. In
contrast, the current ripple component is reduced in Fig.10 (b)when the power decoupling capability is realized. As a result,
the ripple of the DC input current is suppressed by 95.7%.

B.

Simulation results in charging mode
1) Steady stateFig. 12 shows the input and grid side waveforms in the
charging mode at steady state. Fig. 12 (a) and (b) show results
without/with the proposed power decoupling respectively. As
shown in Fig. 12 (a), in the charging mode, the DC input
current has a ripple component at 100 Hz caused by the singlephase load in the opposite direction compared with thedischarging mode as shown in Fig. 12 (a). As a result, without
the power decoupling in the charging mode, the current ripple
component at 100 Hz is 102% of the average current. In
contrast, the proposed power decoupling reduces the DC input
current ripple by 82.3% as shown in Fig.12 (b). The
effectiveness of the power decoupling is different between the
discharging/charging modes because of the phase error of thegrid current caused by PDM.
2) Charge and discharge mode transition
Fig. 13 shows the input and output waveforms in the modetransition when the charge and discharge mode alternates. The
proposed power decoupling method can achieve the power
decoupling capability even when the proposed system changes
in the discharge or charge mode. Besides, the surge current
which is generated at the moment of the power flow direction
alternation can be absorbed by an input LC filter. In the other
word, the proposed power decoupling always maintain the DC
input current without the ripple for the battery.
C.

Experimental results in discharging mode
Fig. 14 shows the experimental waveforms of the proposed
converter with Vdc of 350 V, vgrid of 100 Vrms and an R-L loadof 402 W. Fig. 14 (a) and (b) show results without/with thepower decoupling, respectively. As shown in Fig. 14 (a), thebuffer capacitor voltage does not vary because the full bridge
inverter does not generate the common-mode voltage in thetransformer. As a result, the DC input current has a high ripple
component at 100 Hz. In contrast, the proposed power
decoupling provides the common-mode voltage to fluctuate
the buffer capacitor voltage. Consequently, the power ripple
component in the DC current is suppressed greatly.
Furthermore, the low grid voltage THD of 2.0% as shown in
Fig.14 (b) is achieved by the PDM based on the delta-sigma
conversion.
Fig. 15 shows the harmonic analysis of the DC bus current.
Note that the fundamental harmonic is based on the output
frequency of 50 Hz. From the result of Fig. 15, it is observedthat without the power decoupling, the ripple component at
100 Hz is 59.1% of the average current, whereas the proposed
power decoupling reduces the DC input current ripple by
80.2%. Therefore, these experimental results verified theeffectiveness of the proposed power decoupling in the
discharging mode.
Fig.16 shows the harmonic component of the DC input
current and the grid voltage THD of the matrix converter. Notethat the fundamental harmonic of the DC input current is 100
Hz, i.e. twice of the grid frequency, and the harmonic

DC input voltage Vdc [V]
400
200
0

400
200
0

DC input current filtered with LPF idc [A]
6
4
2
0

6
4
2
0

Grid voltage vgrid [V]
100
0
-100

100
0
-100

Grid current igrid [A]
20
0
-20

20
0
-20
10ms/div.

(a) Without power decoupling method.

(b) With power decoupling method.

Fig.11
Input and output waveforms in discharging mode at steadystate. The proposed power decoupling reduces DC input current ripple by
95.7% in discharging mode.

DC input voltage Vdc [V]
400
200
0

400
200
0

DC input current filtered with LPF idc [A]
0
-2
-4
-6

0
-2
-4
-6

Grid voltage vgrid [V]
100
0
-100

100
0
-100

Grid current igrid [A]
20
0
-20

20
0
-20

10ms/div.
(a) Without power decoupling method.

(b) With power decoupling method.

Fig.12.
DC and AC side waveforms in charging mode at steadystate. The proposed power decoupling reduces DC input current ripple by
82.3% in charging mode.

DC input voltage Vdc [V]
400
200
0
5
0
-5

DC input current filtered with LPF idc [A]Grid voltage vgrid [V]
100
0
-100

Grid current igrid [A]200-2020ms/div.
Power flow is changed fromPower flow is changed fromdischarging mode to charging mode charging mode to discharging mode

Fig.13.
DC and AC side waveforms during charge and discharge
mode transition.

amplitude is normalized by the DC component. It is observed
from Fig. 15 that, the proposed power decoupling reduces the
DC input current harmonic to 8.1% in maximum. In addition,
when the proposed PDM based on delta-sigma conversion isapplied for the secondary-side matrix converter, the output
voltage THD of below 3.0% is achieved over entire the output
power range.

DC input current Ibus 5 A/div
00

Buffer capacitor voltage VCbuf 100 V/div

D. Zero voltage switching operation in primary-side
inverterFig. 17 shows the experimental waveforms of the gatesource voltage of Sbn, the drain-source voltage of Sbn, theinverter voltage Vinv and the grid current igrid. Note that theoperation condition of the circuit is as following; Vdc of 350 V,
vgrid of 100 Vrms, Tdead of 500 ns and an R-L load of 500 W(50% rated power). It is observed from Fig. 17 that, the gatesource voltage of Sbn rises after the drain-source voltage drops
in Sbn to zero due to the resonance between the drain-source
capacitor of Sbn and the buffer inductor. In addition, theswitching devices achieve ZVS when the condition of theoutput current value calculated by (16)-(17) is satisfied.

0

4 ms/div

Output voltage (LPF) vout of matrix converter 100 V/div(a) Without power decoupling method.

DC input current Ibus 5 A/div
Buffer current ibuf 5 A/div
00

Buffer capacitor voltage VCbuf 100 V/div

E.

0

4 ms/div

Output voltage (LPF) vout of matrix converter 100 V/div(b) With power decoupling method.
Fig. 14.
Experimental waveforms in steady state. DC current withproposed power decoupling method do not have little harmoniccomponent.

Harmonic component[%](100%: DC current component)

Experimental results in charging mode
Fig. 18 shows the experimental waveforms in the charge
mode at the condition as following; Vdc of 350 V, vgrid of 100
Vrms and an R-L load of 500 W (50% rated power). As shownin Fig.18, the DC input current with very small ripple isachieved even in the charge mode. From the harmonic analysis
result of Fig.18, the current ripple component at 100 Hz
without the power decoupling method is 63.0% of the anaverage current. In contrast, with the power decoupling
method in charging mode, the current ripple component at 100
Hz is reduced to 14.6%. Therefore, the bi-directional operationof the proposed converter is confirmed in experiments.

Buffer current ibuf 5 A/div

VI. CONCLUSION
This paper proposed a bi-directional isolated single-phasematrix converter with a center-tapped transformer, which
provided the power decoupling capability for the batteryenergy storage systems. In the proposed converter, the bulky
electrolytic capacitor was eliminated because the matrix
converter was employed as the secondary-side converter. The
power decoupling employed the center-tapped transformer andthe small buffer capacitor without any additional switches. In
this paper, the effectiveness of the power decoupling capability
was confirmed in both the charge and discharge modes of thebattery by simulations as first step. In simulation results, thepropose d power decoupling reduced the DC input current
ripple by 82.3% in the charge mode. In addition, the power
decoupling reduced the DC input current ripple generated by
the single-phase load to 80.2% in the discharge mode. Finally,
the validity of the proposed power decoupling and the PDM
based on delta-sigma conversion method for the matrix
converter were also confirmed in experiments. In the future,
the evaluation of the efficiency and the volume will be

100

Without the power decoupling method
Reduced by 80.2%

10With the power decoupling method
1

0.1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Harmonic number

Fig.15.
Experimental harmonic analysis of DC input current. It
should be noted that harmonic number is based on output frequency of 50
Hz. Power decoupling method reduces DC input current ripple by 80.2%.

considered.
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DC input current ripple

Output voltage THD of matrix converter

Output voltage THD of
matrix converter [%]Harmonic component[%](100%: DC current component)[5]

Output power [W]Fig.16.
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0

Gate-source voltage of
Sbn 10 V/div
Drain-source voltage of
Sbn 250 V/div

0

Inverter voltage Vinv 500 V/div00

Grid current igrid 10 A/div

400 ns/div

Fig.17. Experimental waveforms of gate-source voltage of Sbn, drainsource voltage of Sbn, inverter voltage Vinv and grid current igrid. The gatesource voltage of Sbn rises after the drain-source voltage Sbn dropped tozero due to the resonance between the drain-source capacitor of Sbn andthe buffer inductor.

0

DC input current idc 2 A/div
Buffer current ibuf 5 A/div

0

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4 ms/div

Output voltage (LPF) vout of matrix converter 100 V/div
Fig.18. Experimental waveforms in charging mode.

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