CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

100Gb/s QSFP28 PSM4 2km Optical Transceiver Module
CAQM-SPO101-IR4CFeatures♦

4 channels full-duplex transceiver modules♦

Transmission data rate up to 26Gbps per channel♦

4 channels 1310nm DFB♦

4 channels PIN photo detector array♦

Internal CDR circuits on both receiver andtransmitter channels♦Support CDR bypass♦

Low power consumption<3.5W♦

Hot Pluggable QSFP form factor♦

Up to 2km reach for G.652 SMF♦Single male MPO(APC 8-degree) connector
receptacle♦Operating case temperature 0℃ to +70℃

♦3.3V power supply voltage♦RoHS compliant(lead free)

Applications♦100G Ethernet links♦Infiniband DDR/EDR♦Datacenter and Enterprise networking

Description
CA OPTRONICS GROUP CAQM-SPO101-IR4C is a Four-Channel, Pluggable, Parallel, Fiber-Optic QSFP 28
PSM4 for 100 or 40 Gigabit Ethernet , Infiniband DDR/EDR Applications. This transceiver is a high performance
module for data communication and interconnect applications. It integrates four data lanes in each direction with104 Gbps bandwidth. Each lane can operate at 26Gbps up to 2km over G.652 SMF.These modules are designed
to operate over singlemode fiber systems using a nominal wavelength of 1310nm. The electrical interface uses a38 contact edge type connector. The optical interface uses an 12 fiber MTP (MPO) connector. This module
incorporates CA OPTRONICS GROUP proven circuit and Optical technology to provide reliable long life, highperformance, and consistent service.

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

Figure1.Module Block Diagram
100Gb/s QSFP28 PSM4 is one kind of parallel transceiver. DFB and PIN array package is key technique,through I2C system can contact with module.

Absolute Maximum Ratings
ParameterSymbolMinMax

Unit

Supply Voltage

Vcc

-0.3

3.6

V

Input Voltage

Vin-0.3

Vcc+0.3

VStorage TemperatureTst-2085℃

Case Operating Temperature

Top

070℃

Humidity(non-condensing)

Rh

595%

Recommended Operating Conditions
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Parameter

SymbolMin

TypicalMax

Unit

Supply Voltage

Vcc

3.13

3.3

3.47

V

Operating Case temperature

Tca

070℃

Data Rate Per Lane

fdHumidity

Rh

Power Dissipation

Pm

Supply Current

Icc

Link Distance with G.652

D0.002

Parameter

SymbolMin

Differential input impedance

Zin

Differential Output impedanceDifferential input voltage amplitude
Differential output voltage

25.78125

Gbps

585%

3.5

W

1.1

A

2km

TypicalMax

Unit

90

100110ohm

Zout

90100110ohm

ΔVin

190

700

mVp-p

ΔVout

300

850

mVp-p

Input Logic Level HighVIH

2.0

VCC

V

Input Logic Level Low

VIL

00.8

V

Output Logic Level HighVOH

VCC-0.5

VCC

V

Output Logic Level Low

VOL00.4

V

2Electrical Specifications

Note：
1.
2.

Differential input voltage amplitude is measured between TxnP and TxnN.
Differential output voltage amplitude is measured between RxnP and RxnN.

Optical Characteristics
Table 3 - Optical Characteristics
Parameter

SymbolMin

TypicalMax

Unit

Notes

1325

nm-dB-2dBm-2.2dBm

1

2.9dB-dB

Transmitter
Centre Wavelengthλc12951310

Side Mode Suppression Ratio

SMSR

30-

Average launch power, each lane

PAVG-6-

Optical Modulation Amplitude(OMA),each lane

POMA-5.0

TDP,each lane

TDP

Extinction Ratio

ER

Relative Intensity Noise

RIN

-128

dB/Hz

Optical Return Loss Tolerance

TOL

20dB

Transmitter Reflectance

RT-12dB

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

Average launch power of OFF
transmitter, each lane
Eye Mask coordinates:
X1, X2, X3, Y1, Y2, Y3

POFF-30

dBm

Hit Ratio =5x10-5{0.31,0.4,0.45,0.34,0.38.0.4}

ReceiverCentre Wavelength

λc

1295

Damage Threshold,each lane

THd

3.0

Average Receive Power,
each lane

1310-12.66

Receive power, each lane (OMA)
(max)

1325

nm

-dBm

2

2.0dBm

2.2dBmReceiver Reflectance

RR-26

dBm

Receiver Sensitivity (OMA),
each lane

SEN-11.35dBm

3LOS Assert

LOSA

-18

dBm

-LOS De-Assert – OMA

LOSD-15dBm-LOS Hysteresis

LOSHdB-0.5

3

Note：
1. Even if the TDP<1dB,the OMA min must exceed the minimum value specified here.
2. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having thispower level on one lane. The receiver does not have to operate correctly at this input power.
3. Sensitivity is specified at 5x10^-5 BER at 25.78125Gb/s.

Pin Descriptions
PinLogic

SymbolName/Description

Ref.

GND

Module Ground

112

CML-I

Tx2-

Transmitter inverted data input

3CML-I

Tx2+

Transmitter non-inverted data input

4GND

Module Ground5CML-I

Tx4-

Transmitter inverted data input

6CML-I

Tx4+

Transmitter non-inverted data input

GND

Module Ground

1718

LVTTL-I

MODSEIL

Module Select29

LVTTL-I

ResetL

Module Reset210

VCCRx+3.3v Receiver Power Supply

11

LVCMOS-I

SCL

2-wire Serial interface clock212

LVCMOS-I/O

SDA

2-wire Serial interface data

2

GND

Module Ground

1

1314

CML-O

RX3+

Receiver non-inverted data output

15

CML-O

RX3-

Receiver inverted data output

GND

Module Ground16

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PinLogicSymbol

Name/Description

17

CML-O

RX1+

Receiver non-inverted data output

18

CML-O

RX1-

Receiver inverted data output

19

GND

Module Ground

120

GND

Module Ground

1

21

CML-O

RX2-

Receiver inverted data output

22

CML-O

RX2+

Receiver non-inverted data output

GND

Module Ground

23
24

CML-O

RX4-

Receiver inverted data output

25

CML-O

RX4+

Receiver non-inverted data output

GND

Module Ground

26

Ref.

1

127

LVTTL-OModPrsL

Module Present, internal pulled down to GND

28

LVTTL-O

IntL

Interrupt output, should be pulled up on host board

VCCTx+3.3v Transmitter Power Supply

2930
31

LVTTL-I

VCC1+3.3v Power Supply

LPModeLow Power Mode2

GND

Module Ground

1

32
33

CML-I

Tx3+

Transmitter non-inverted data input

34

CML-I

Tx3-

Transmitter inverted data input

GND

Module Ground

Tx1+

Transmitter non-inverted data input

Tx1-

Transmitter inverted data input

GND

Module Ground

35
36

CML-I

37

CML-I

238

11Notes:
1. Module circuit ground is isolated from module chassis ground within the module.
2. Open collector; should be pulled up with 4.7k – 10k ohms on host board to a voltage between 3.15Vand 3.6V.

Figure2. Electrical Pin-out Details

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

ModSelL Pin
The ModSelL is an input pin. When held low by the host, the module responds to 2-wire serial communicationcommands. The ModSelL allows the use of multiple QSFP modules on a single 2-wire interface bus. Whenthe ModSelL is “High”, the module will not respond to any 2-wire interface communication from the host.
ModSelL has an internal pull-up in the module.

ResetL PinReset. LPMode_Reset has an internal pull-up in the module. A low level on the ResetL pin for longer than theminimum pulse length (t_Reset_init) initiates a complete module reset, returning all user module settings totheir default state. Module Reset Assert Time (t_init) starts on the rising edge after the low level on theResetL pin is released. During the execution of a reset (t_init) the host shall disregard all status bits until themodule indicates a completion of the reset interrupt. The module indicates this by posting an IntL signal with
the Data_Not_Ready bit negated. Note that on power up (including hot insertion) the module will post thiscompletion of reset interrupt without requiring a reset.

LPMode Pin
CA OPTRONICS GROUP QSFP28 PSM4operate in the low power mode (less than 1.5 W power
consumption)This pin active high will decrease power consumption to less than 1W.

ModPrsL Pin
ModPrsL is pulled up to Vcc on the host board and grounded in the module. The ModPrsL is asserted “Low”
when the module is inserted and deasserted “High” when the module is physically absent from the hostconnector.

IntL Pin
IntL is an output pin. When “Low”, it indicates a possible module operational fault or a status critical to thehost system. The host identifies the source of the interrupt by using the 2-wire serial interface. The IntL pin is
an open collector output and must be pulled up to Vcc on the host board.

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

Power Supply Filtering
The host board should use the power supply filtering shown in Figure3.

Figure3.Host Board Power Supply Filtering
Optical Interface Lanes and Assignment
The 12 fiber MPO optical lane assignments are shown in Figure 4. The four transmit and four
receive optical lanes of PSM4 shall occupy the positions depicted in Figure 8 with looking intothe MDI receptacle with the connector keyway feature on top. The interface contains eightactive lanes within twelve total positions. The central 4 fibers may be physically present.

Figure 4. Optical Receptacle and Channel Orientation

DIAGNOSTIC MONITORING INTERFACE (OPTIONAL)
Digital diagnostics monitoring function is available on all CA OPTRONICS GROUP QSFP28 PSM4. A 2wire serialinterface provides user to contact with module.
The structure of the memory is shown in Figure 5. The memory space is arranged into a lower, single
page, address space of 128 bytes and multiple upper address space pages. This structure permits timely

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

access to addresses in the lower page, such as Interrupt Flags and Monitors. Less time critical time entries,
such as serial ID information and threshold settings, are available with the Page Select function.
The interface address used is A0xh and is mainly used for time critical data like interrupt handling in orderto enable a one-time-read for all data related to an interrupt situation. After an interrupt, IntL, has beenasserted, the host can read out the flag field to determine the affected channel and type of flag.

Figure5.QSFP Memory Map

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

Figure6.Low Memory Map

Figure7.Page 03 Memory Map

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

Figure8.Page 00 Memory Map
Page02 is User EEPROM and its format decided by user.
The detail description of low memory and page00.page03 upper memory please see SFF-8436 andSFF8636 document.

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

SFF-8636 definiens
TX AND RX CDR LOL indicator (Byte 5)

TX AND RX CDR BYPASS CONTROL (Byte 98)

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

Timing for Soft Control and Status Functions
Parameter

SymbolMaxUnit

Conditions

Initialization Timet_init2000

ms

Time from power on1, hot plug or rising edge ofReset until the module is fully functional2

Reset Init Assert Timet_reset_init

2μst_serial

2000

ms

t_data2000

ms

Reset Assert Timet_reset2000

ms

LPMode Assert Time

ton_LPMode

100

μs

IntL Assert Time

ton_IntL200ms

IntL Deassert Time

toff_IntL500

μsRx LOS Assert Time

ton_los100msTx Fault Assert Time

ton_Txfault

200

ms

Flag Assert Time

ton_flag200

msTime from occurrence of condition triggering flagto associated flag bit set and IntL asserted

Mask Assert Time

ton_mask

100

ms

Time from mask bit set4 until associated IntL
assertion is inhibited

Serial Bus Hardware
Ready Time
Monitor Data ReadyTime

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A Reset is generated by a low level longer thanthe minimum reset pulse time present on theResetL pin.
Time from power on1 until module responds todata transmission over the 2-wire serial bus
Time from power on1 to data not ready, bit 0 of
Byte 2, deasserted and IntL asserted
Time from rising edge on the ResetL pin until themodule is fully functional2
Time from assertion of LPMode (Vin:LPMode =Vih) until module power consumption enterslower Power Level
Time from occurrence of condition triggering IntL
until Vout:IntL = Vol
Time from clear on read3 operation of associatedflag until Vout:IntL = Voh. This includes deassert
times for Rx LOS, Tx Fault and other flag bits.
Time from Rx LOS state to Rx LOS bit set andIntL asserted
Time from Tx Fault state to Tx Fault bit set andIntL asserted

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

Mask Deassert Time

toff_mask

100ms

ModSelL Assert Time

ton_ModSelL

100μs

100μs

ModSelL Deassert Time

toff_ModSelLTime from mask bit cleared4 until associated IntlL
operation resumes
Time from assertion of ModSelL until module
responds to data transmission over the 2-wire serialbusTime from deassertion of ModSelL until the module
does not respond to data transmission over the 2-wireserial busPower_over-ride orPower-set Assert Time

ton_Pdown

100

ms

Time from P_Down bit set 4 until module power
consumption enters lower Power Level

Power_over-ride orPower-set Deassert
Time

toff_Pdown

300

ms

Time from P_Down bit cleared4 until the module
is fully functional3

Note：
1. Power on is defined as the instant when supply voltages reach and remain at or above the minimum specified value.
2. Fully functional is defined as IntL asserted due to data not ready bit, bit 0 byte 2 deasserted.
3. Measured from falling clock edge after stop bit of read transaction.
4. Measured from falling clock edge after stop bit of write transaction.

Figure9.Timing Specifications
Mechanical Dimensions

Figure10.Mechanical Specifications

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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

FemaleMPO(APC 8-degree) connector for this module

Regulatory Compliance
CA OPTRONICS GROUP CAQM-SPO101-IR4C transceivers are Class 1 Laser Products. They meetthe requirements ofthe following standards.
FeatureStandard
IEC 60825-1:2014 (3rd Edition)
IEC 60825-2:2004/AMD2:2010
EN 60825-1-2014
EN 60825-2:2004+A1+A2

Laser Safety

EN 62368-1: 2014
IEC 62368-1:2014
UL 62368-1:2014

Electrical Safety

Environmental protection

CE EMCFCC

CA OPTRONICS GROUP INC

Directive 2011/65/EU with amendment(EU)2015/863
EN55032：2015
EN55035：2017
EN61000-3-2:2014
EN61000-3-3:2013
FCC Part 15, Subpart B
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CAQM-SPO101-IR4C 100Gb/s QSFP28 PSM4 2km Optical Transceiver Module R01

References
1. SFF-8436 QSFP+
2. 100G PSM4 MSA

Ordering information
Part Number
CAQM-SPO101-IR4CProductDescription
100Gb/s QSFP28 PSM4, MPO Connector, reach 2km on G.652

Important Notice
Performance figures, data and any illustrative material provided in this data sheet are typical and must be
specifically confirmed in writing by CA OPTRONICS GROUP before they become applicable to any particularorder or contract. In accordance with the CA OPTRONICS GROUP policy of continuous improvement
specifications may change without notice.
The publication of information in this data sheet does not imply freedom from patent or other protective rightsof CA OPTRONICS GROUP or others. Further details are available from any CA OPTRONICS GROUP
sales representative.
sales@caoptronicsgroup.com
http://www.caoptronicsgroup.com

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