Voltage THD Reduction with Discontinuous Current Mode Control for
Islanded-mode Operation in Single-phase Grid-tied Inverter
Jun-ichi Itoh, Tetsunori Kinoshita, Hoai Nam Le
Nagaoka University of Technology
1603-1 Kamitomioka-cho
Nagaoka city Niigata, Japan
Tel., Fax: +81 / (258) – 47.9533.
E-Mail: itoh@vos.nagaokaut.ac.jp, kinoshita_t@stn.nagaokaut.ac.jp,
lehoainam@stn.nagaokaut.ac.jp
URL: http:// itohserver01.nagaokaut.ac.jp/itohlab/index.html

Keywords«Renewable energy systems», «Power conditioning», «Non-linear control», «High power density
systems», «Silicon Carbide (SiC)», «Single phase system», «Uninterruptible Power Supply (UPS)»

Abstract
This paper proposes a filter capacitor design for a single-phase grid-tied inverter operating underislanded-mode with discontinuous current mode current control to reduce an inverter-side inductanceand a filter capacitance without worsening output voltage distortion. The design considers the worst caseof load, which is the non-linear load. A voltage source is applied to the circuit model of the load to
obtain the harmonics of the current. By using these harmonics and the disturbance transfer function, theoutput voltage amplitude of the each harmonic components are obtained to calculate the output voltage
total harmonic distortion (THD). Then, the filter capacitor satisfying the output voltage THD isdetermined by the theoretical output voltage THD calculation formula. The simulated output voltage
THD agrees with the calculation value with the error of below 10%. As experimental results with 1.5kVA prototype, the output voltage THD with the CCM/DCM control method and the current
feedforward is reduced by 88.8% compared to that of the continuous current mode control method evenwith the minimized inductor impedance of 0.19% and minimized capacitor admittance of 6.7%.

Introduction
In recent year, photovoltaic (PV) systems have attracted many attentions due to an increasing demandof renewable resources [1]-[5].
In general, an islanded-mode operation is required for the grid-tied inverters to supply the power tothe load during a black out [2], [4], [10]-[12]. In the islanded-mode operation, the grid-tied inverter
needs to regulate the load voltage regardless of the load characteristic, i.e. the achievement of thesinusoidal voltage regulation even with the nonlinear or low-power-factor load. The non-linear effectdue to the dead-time is small when the inductance of the inverter-side inductor is large. Therefore, theregulation of the output voltage total harmonic distortion (THD) can be satisfied even with a small
capacitance of the filter capacitor. However, the disturbance characteristics of the current control
induced by the dead-time decays in the reduction of the inverter-side inductance for the achievement ofhigh power density. Consequently, the inductance reduction leads to the increase in the grid current
THD when the inverter is operated in continuous current mode (CCM) [12]. In the islanded-mode
operation, this current distortion acts as a disturbance of a voltage control, and the small capacitance ofthe filter capacitor cannot compensate for such disturbance. As typical solution, it is necessary to satisfy
the regulation with output voltage THD by increasing the filter capacitance. Consequently, it is difficult
to miniaturize both the inverter-side inductor and the filter capacitor.
Meanwhile, many dead-time error compensation methods have been proposed for the purpose of
improving the disturbance characteristics of the current control system [5]-[9]. However, theconventional dead-time error compensations either cannot compensate completely the nonlinearity

induced by the dead-time, or become dependent on the inductance. In order to solve these problems, acurrent control method for both CCM and discontinuous current mode (DCM) is proposed for the singlephase grid-tied inverter [9]. In this method, the duty ratio at the previous computation period is utilized
to compensate the DCM nonlinearity induced by the dead-time. In the CCM/DCM feedback current
control method, the low output current THD can be achieved in any load condition even with a small
inductance. However, the island mode operation for the single grid-tied inverter operating in both CCM
and DCM, and the design of the filter capacitor with small LC filters have not been considered.
This paper proposes a filter capacitor design for the single-phase grid-tied inverter operating underislanded-mode with a CCM/DCM current control to reduce the inverter-side inductance and the filter
capacitance without worsening the output voltage distortion. The islanded-mode operation with the
CCM/DCM feedback current control are compared to that with the CCM feedback current control underconditions of the same voltage controller and same current controller. The new contribution of this paper
is the filter capacitor design satisfying the
SW1
SW2
L
L
output voltage distortion constrains even withiiithe small inverter-side inductance and filter
R
v
v
Load
V
capacitance. The filter capacitor design basedCC
on the disturbance characteristics of the control
SW2
SW1
system can satisfy the desired output voltage
THD with the smallest reducible filter Fig. 1. Single-phase grid-connected inverter with LCL filter.
capacitance. In particular, by using the output
With dead-time
W/o dead-time
voltage control method with CCM/DCM
control, the reduction of the filter capacitor
0
voltage THD is confirmed with a 1.5-kVA 100- 0
TimekHz prototype.
Inverter Output Current
f

c

out

d

c

dc

g

d

f

(10 ms/div)load

Distortion

iout (10 A/div)

Continuous and Discontinuous
Current Mode Control(a) Inverter output current w/o dead-time and with dead-time

Fig. 1 indicates the circuit configuration ofa single-phase grid-tied inverter with a LCL
filter. In this paper, a single-phase H-bridge
inverter is applied due to its simplicity. The
LCL filter with shunt RC connecting theinverter to the grid smooths the output current
and reduces the current resonance [3].
Fig. 2 shows the zero-crossing current
distortion during the grid-tied operation. As
shown in Fig. 2(a) and Fig. 2(b), when thedead-time is not applied, the inverter output
current flows continuously over entire theswitching period; hence, a sinusoidal current
waveform is obtained. However, the zerocurrent clamping occurs during the dead-time
interval due to the influence of the period when
all switches are turned off as shown in Fig. 2(a)and 2(c). The circuit mode changes from CCM
to DCM due to the zero-current clamping.
Fig. 3 depicts the duty to current gain in
CCM and DCM. The duty to current gain of
DCM has a strong nonlinearity compared the
duty to current gain of CCM. This worsens thecurrent response in DCM if the same controller
in CCM is employed in DCM.
Fig. 4(a) and Fig. 4(b) show the CCM
feedback current control system and the0

Inverter Output Current iout (3 A/div)

Time (5 ms/div)

W/o dead-time

1
SW1
SW2
0
(b) Zoomed-in current and switching signals w/o dead-timeWith dead-time0

Gain [dB]

Inverter Output Current iout (3 A/div) Zero-current interval in DCM
Time (5 ms/div)
Dead time
1
SW1
SW2
0
(c) Zoomed-in current and switching signals with dead-time
Fig. 2. Zero-crossing current distortion.

120
100
80
60
40
20
0
-20
-40

CCM

DCM D

1_s = 0.3

Inductor L:160 mH
Dc-link Voltage Vdc:350 V
Switching frequency fsw: 100 kHz
vc = 20 V

D1_s = 0.05

10

100

vc = 200 V

1k
10k
100k
Frequency f [Hz]Fig. 3. Duty to current gain in CCM and DCM.

1M

10M

1
Vdc

PI

iavg*

vc

iavg

0.5

Duty

1

(a) CCM feedback current control.
Conventional CCM controller
PI

iavg*

DCM duty generationaa/b
Vdc+vcsign(iavg*)
2Vdc[Vdc-vcsign(iavg*)]b

2Vdc2[Vdc+vcsign(iavg*)]2

iavg

vc

z-1
z

vc

|x|

z-1
0.5

Duty
NOT

|x|
x2

1
Vdc

DDCM

+
|x|
DCCM
Current mode determination

sign(iavg*)
CCM duty generation(b) CCM/DCM feedback current control.
Fig. 4. CCM feedback current control and CCM/DCM feedback current control.

CCM/DCM feedback current control system, respectively [9]. The same PI controller which is designedin CCM is applied in the feedback current control for both the CCM operation and the CCM/DCM
operation, because the DCM nonlinear factors are completely compensated in the CCM/DCM control
method. Furthermore, the important characteristic of the CCM/DCM control method is that the DCM
duty generation is independent from the inductance.

Islanded-mode Operation and Filter Capacitor Design
Fig. 5 describes the filter capacitor design algorithm base on the output voltage THD. The filter
capacitor design starts with the initialization of the following parameters: the current control cutoff
frequency fc_i, the current control damping factor i, the voltage control cutoff frequency fc_v, the voltage
control damping factor v, the output voltage vc, the cutoff frequency of disturbance observer fdob, theoutput frequency fg, the filter capacitance Cf, the damping capacitance Cd, the damping resistor Rd. First,
the desired output voltage THD is selected based on the regulation of IEC 62040-3. In step 1, theharmonic components of the load current when connecting an ideal voltage source is obtained fromsimulator such as PLECS (Plexim Inc.). Next, in step 2, the transfer function of the voltage control loop
is derived to calculate the compensation gain Kt. Finally, in step 3, the filter capacitor Cf satisfying theoutput voltage THD is determined by the theoretical output voltage THD calculation formula.

Step 1: Harmonic analysis of load current
Fig. 6 shows the non-linear load configuration connecting with an ideal voltage source. In this paper,
the non-linear load with crest factor of 2.3 is considered as the worst case of the load. The non-linear
load contains a diode-bridge rectifier connecting a capacitor and a load resistor in parallel at the output,
i.e. the rectifier load. The disturbance current harmonic component at the maximum load is required todesign the filter capacitor that satisfies the output voltage THD at the worst condition of load. The
disturbance current harmonic component of non-linear load is obtained by connecting the ideal voltage
source as shown in Fig. 6. The disturbance current of the non-linear load with the harmonic analysis up
to 40th-order are obtained to calculate the output voltage THD.
Fig. 7 shows the harmonic analysis of the non-linear load current with the output frequency of 50 Hz
as the fundamental component. The harmonic components of the non-linear load current are dominatedby the odd-order harmonic components. Therefore, the calculation of the output voltage THD uses only
the load current value of the fundamental wave components is A1, and the load current harmoniccomponents of A2n+1, where n is a natural number from 1 to 20.

Step 2: Derivation of transfer function and calculation of compensation gain Kt
Fig. 8 shows the block diagram of the voltage feedback control for islanded-mode operation. Notethat subscript M indicates a nominal model value. The filter capacitor voltage control and the current
control are designed based on the 2nd-order transfer function. The bandwidth of the current control islimited by the sampling rate of the hardware,
which is considered to be low in this paper,
leading to the low bandwidth of the filter
capacitor voltage control. Therefore, thecompensation gain Kt is introduced to adjust
the amplitude of the voltage reference. The
output of the PI controller in the filter
capacitor voltage control is the filter capacitor
current command ic*. Hence, the voltage PI
controller requires the feed-forward of the load
current iload to eliminate the disturbance fromthe load current. As another approach, it ispossible to apply a disturbance observer(DOB) that estimates and compensates thedisturbance from the load current iload in thevoltage control system. As shown in Fig. 8, theresponse transfer function of current control
G(s) is expressed byG( s) 



s

iload

Step 1FFTAnalyzer

Get load current
value : A2n+1(n = 0,1,2,3,…20)

Step 2

Calc. of Kt : Eq.(12)Step 3N
THD Eq.(15) < THDref

Increase Cf

Y
Output: Filter Capacitor Cf

Fig. 5. Filter capacitor design algorithm.

iload

Rs
C

vg

R VR

K pi

L
Tii L
K
K
s 2  pi s  pi
L
Tii L

4 i f c _ i s   2 f c _ i Parameters: Rs=3.3 , C=2040 mF, R=63 Crest factor is 2.3.)
Fig. 6. Non-linear load configuration connected to ideal voltage source.
2s 2  4 i f c _ i s   2 f c _ i (1),
2

Load current [A]K pi

Input: i, fc_i, v, fc_v, fdob, vc, fg, Rd, Cd, Cf

8
7
6
5
4
3
2
1
0

A1
A3

Nominal Apparent Power Sn = 1.5 kVA
Grid Voltage vg = 200 Vrms
Grid frequency fg = 50 Hz
Rs = 3.3 
C = 2040 mF
R = 63 Load current value : A2n+1(n = 0,1,2,3,…20)
A7
A9
A11
A13 A15 … A39

where L is the inverter-side inductance, Kpi andA5
Tii are gains calculated from L, fc_i and i. By
the employment of the CCM/DCM control
method,theDCMnonlinearity
iscompensated, and the response transfer
0 1
3
5
7
9 11 13 15 … 3940
Harmonic orderfunction of the current control is the 2nd-ordersystem. Meanwhile, in the case of the CCM Fig. 7. Harmonic component of non-linear load current.
control method, the response transfer functionof the current control changes due to the DCM nonlinearity induced by the dead-time.
The plant model for the voltage control and the nominal plant model for the voltage control are
expressed by
Rd Cd s  1(2)
P ( s)  P ( s) CCMRd Cd C f s 2   Cd  C f  s

The voltage controller Gpi(s) and the reference filter F(s) are expressed by, respectively 2 f c _ v 1 
G pi ( s )  K pv 1 
  4 v f c _ v  C f  Cd  1 

2 v s  Tiv s F ( s) Kt
Tiv s  1

Kt

(3),
(4),

2 v
s 1
2 f c _ v

where Kpv and Tiv are gains calculated from Cf, Cd, fc_v and v. Note that the cutoff frequency of thevoltage controller and the cutoff frequency of the current controller are designed to be separated by 5times or more. The feedback transfer function of DOB is expressed by2 f dob(5),
GDOB ( s) s  2 f dob

where fdob is the cutoff frequency of DOB. The disturbance estimation value idis is expressed byiˆdis  GDOB ( s) iout  PCM 1 ( s)vc (6)Fig. 9 shows the transfer functions of the disturbance and the response. The response transfer function
Gref(s) of the voltage control is the transfer function from the output voltage command to the output

Additional current sensors lead to cost increase.
Control System Circuit
Voltage control
vC*

K pi


1  icK pv 1  Tiv s 

Kt
Tiv s  1

iavg*
iˆdis

iload

K pi

s
L
Tii L
K pi
K
2
s 
s  pi
L
Tii L

iC

iout

Rd Cd s  1
Rd Cd C f s 2   Cd  C f  svCDisturbance observer

RdM CdM C fM s 2   CdM  C fM  s

2 f dobs  2 f dob

RdM CdM s  1

Fig. 8. Control block diagram for islanded-mode operation.
iload

PC(s)[1-GDOB(s)G(s)]1+Gpi(s)G(s)PC(s)-GDOB(s)G(s)[1-PCM-1(s)PC(s)]vC*

F(s)Gpi(s)G(s)PC(s)1+Gpi(s)G(s)PC(s)-GDOB(s)G(s)[1-PCM-1(s)PC(s)]

vdis
vCres

vC

Fig. 9. Transfer functions of disturbance and response.

voltage. The disturbance transfer function Gdis(s) of the voltage control is the transfer function from theload current to the output voltage. The response transfer function Gref(s) of the voltage control and the
disturbance transfer function Gdis(s) of the voltage control are expressed by, respectively
F ( s)G pi ( s)G( s) PC ( s)(7),
G ( s) refGdis ( s) 

1  G pi ( s)G( s) PC ( s)  GDOB ( s)G( s) 1  PCM 1 ( s) PC ( s) PC ( s) 1  GDOB ( s)G( s)

(8)

1  G pi ( s)G( s) PC ( s)  GDOB (s)G(s) 1  PCM 1 (s) PC (s) 

The transfer functions of the disturbance and the response include the voltage controller, the responsetransfer function of the current control, the plant model for the voltage control and the transfer functionof DOB. Therefore, the transfer function of disturbance and response are mutually dependent on eachother. In the proposed filter capacitor design method, the disturbance transfer function satisfying theoutput voltage THD is designed by selecting the filter capacitance design, whereas the low-bandwidth
response transfer function is compensated using the compensation gain Kt. As shown in Fig. 9 and (7)(8), the output voltage is expressed by(9)vC  Gref ( s )vC *  Gdis ( s )iload
If the transfer functions and input parameters on the right equation are known, the output voltage can be
estimated. The output voltage command is expressed by(10),vC *  VC sin  2 f g t 
where Vc is the output maximum voltage. In the islanded-mode operation, the fixed output voltage andfixed output frequency are used as command values. In addition, according to (7), the voltage control
system is a two degree of freedom system. Thus, the gain of the output frequency of (7) can be set at
0dB by the compensation gain Kt of (4). The calculation for the gain compensation at the output
frequency of (7) is expressed by(11)
Gref ( j 2 f g )  1
Then, the compensation gain Kt satisfying (11) is expressed by
2

2
2
K
T
Kt  iv  pv   C f  Cd  2 f g     K pv  2 f g  
K pv  Tiv

22
  f 2  
f 
1   g     2 v g 
f c _ v   f c _ v   



(12)

The current control interference is ignored as being sufficiently separated from the voltage control interm of the control bandwidth.

Step 3: Determination of filter capacitor satisfying output voltage THD
By using the result of the harmonic components analysis of the load current in Fig. 7 and the
disturbance transfer function of (8), the output voltage amplitude of the fundamental component V1 andthe output voltage amplitude of the odd-order harmonic components V2n+1 are expressed by, respectivelyV1  VC Gref ( j 2 f g )  A1 Gdis ( j 2 f g )  VC  A1 Gdis ( j 2 f g )V2 n1  A2n1 Gdis ( j 2 (2n  1) f g )(13)

Next, THD of the output voltage is calculated as
THD 

V2 2  V32    V2 n12
V1

(14)

Substituting (13) into (14), the theoretical output voltage THD is expressed by
20

THDvc (C f ) 

V
n 1

20

2
2 n 1V1  An 1

2 n 1

Gdis ( j 2 (2n  1) f ) 

2

(15)

Vc  A1 Gdis ( j 2 f )

Yb

%Y 

Zb
2 f g C

Sim.：CCM + Current feedforwardwith dead-timeCut. Freq. fc_i = 1.5 kHz
Cut. Freq. fc_v = 0.1 kHz

20
15
10

Calculated THDvc Eq.(15)Sim.：CCM + Current feedforward
w/o dead-timeError rate is less than 10%

5
0
4

(18)

Yb

where C is the filter capacitance.
As shown in Fig. 10(a), the voltage
THD of the CCM control method without
dead-time agrees to the calculated value
with the error of less than 10%. Thus, thevalidity of (15) can be confirmed.
Meanwhile, in the CCM control methodwith dead-time, the simulated value does
not match the calculated value. This isbecause the nonlinearity of the DCM
cannot be compensated.
As shown in Fig. 10(b), the voltage
THD of the CCM control method without
dead-time and the voltage THD of theCCM/DCM control method with deadtime agree to the calculated value with theerror of less than 10% even when the
cutoff frequencies are different. This isbecause the CCM/DCM control method
compensates the DCM nonlinearity,
hence, the current control response is assame as that in CCM.
As shown in Fig. 10(c), the voltage
THD of the CCM control method without
dead-time matches that of the CCM/DCM
control method with dead-time. However,

16
20
24
28
32
36
40
44
Percentage admittance %Y [%](a) CCM control method w/o or with dead-time, and voltage control disturbancecompensation method with current feedforward
5

8

12

Upper line condition:
Cut. Freq. fc_i = 1.5 kHz
Sim.：CCM + Current
Cut. Freq. fc_v = 0.1 kHz
feedforward w/o dead-time Lower line condition:
Sim.：CCM/DCM + Current Cut. Freq. fc_i = 2.25 kHz
feedforward with dead-time Cut. Freq. fc_v = 0.15 kHz

Calculated THDvc Eq.(15)

Output voltage THDvc [%]Pnwhrer Pn is the rated active power atconnected to linear load power factor of
1.0. The percentage impedance %Z andthe percentage admittance %Y is expressedby2 f g L
(17)
%Z 

4
3
2

Error rate is less than 10%

1
0
4

16
20
24
28
32
36
40
44
Percentage admittance %Y [%](b) CCM control method w/o dead-time value, CCM/DCM control method withdead-time, and voltage control disturbance compensation method with current
feedforward

Output voltage THDvc [%]b

Output voltage THDvc [%]Thus, the output voltage THDvc is a function of the filter capacitor Cf.
Fig. 10 depicts the comparison between simulated and calculated results of voltage THD whilevarying the filter capacitance. The simulated results of the CCM control method without dead-time, theCCM control method with dead-time and the CCM/DCM control method with dead-time are compared.
The disturbance of the voltage control is compensated by the current feedforward in Fig. 10(a) and Fig.
10(b), whereas the disturbance of the voltage control is compensated by DOB in Fig. 10(c). Note thatthe base impedance Zb and the base admittance Yb is expressed by
v2 1
(16)
Z  c 25

8

12

Sim.：CCM + DOB with dead time
Calculated THDvc Eq.(15) Cut. Freq. fc_i = 1.8 kHz
Cut. Freq. fdob = 1.5 kHz
Cut. Freq. fc_v = 0.3 kHz

25
20
15
10

Sim.：CCM + DOB w/o dead time5
Sim.：CCM/DCM + DOB with dead time

0
0

1

2
3
4
5
6
7
8
Percentage admittance %Y [%](c) CCM control method w/o or with dead-time, CCM/DCM control method withdead-time, and voltage control disturbance compensation method with DOB
Fig. 10. Comparison between simulated and calculated results of voltage THD.

the voltage THD of the CCM/DCM control method with dead-time does not match the calculated value.
This is because the output voltage THD is so high that it causes an error with the assumption of the useof the ideal voltage source as shown in Fig. 6. Thus, it is necessary to increase the cutoff frequency of
DOB, the cutoff frequency of voltage controller and the cutoff frequency of current controller. By
employing the CCM/DCM control method and using the proposed filter capacitor design method of Fig.
5, it is possible to design a minimized filter capacitance that satisfies the desired output voltage THD.

Experimental Results

TABLE I System Parameters.
Circuit Parameter
DC link Voltage
Output Voltage
Nominal Apparent Power
Switching Device
fg
Grid Frequency
Zb
Base Impedance
Yb
Base AdmittanceInductor (%Z = 0.19%)
L1
L2
Inductor (%Z = 0.68%)
Lf
Filter Inductor
Cf_1
Filter Capacitor (%Y = 1.7%)
Filter Capacitor (%Y = 3.4%)
Cf_2
Cf_3
Filter Capacitor (%Y = 6.7%)
Filter Capacitor (%Y = 20%)
Cf_4
Filter Capacitor (%Y = 41%)
Cf_5
RC Damping Capacitor
Cd
RC Damping Resistor
Rd
fsw
Switching Frequency
Tdead
Dead-Time
Non-linear load crest factor
Controller Parameter
fsamp
Sampling Frequency
fc_i
Cutoff Freq. of Current
Damping Factor of Current
ifdob
Cutoff Freq. of DOB
fc_v
Cutoff Freq. of Voltage
Damping Factor of Voltage
v

Table I shows the system parameters for theexperiments. The impedance %Z of the inverterside inductor is minimized to 0.19%. In theislanded-mode, the inverter regulates the output
voltage, whose frequency is 50 Hz, andamplitude is 200 Vrms.
Fig. 11 shows the prototypes of inverter-side
inductor. The inductor volume is reduced by
53% thank to the reduction of the inverter-side
inductor impedance %Z from 0.68% to 0.19%.

VDC
vc
Sn

Inverter Operation with Linear Load

25 kHz1.8 kHz
1.2
1.5 kHz0.3 kHz
1.0

L=160 mH (%ZL=0.19%)
VolL=401 cm3(0.47 p.u.)h = 134 mm

L=580 mH (%ZL=0.68%)
VolL=856 cm3(1.0 p.u.)h = 134 mm

Fig. 12 shows the output voltage, the load
current and the inverter output current when the
CCM
controlmethodwith
DOB
at %Z=0.68%, %Y=6.7%, and linear load power
factor of 1.0. The zero-crossing distortion isobserved with the CCM control method evenwith the relatively large inductor impedance of
0.68%.
Fig. 13 shows experimental waveforms of theCCM control method and the CCM/DCM
control method with DOB at the linear loads
under the power factors of 1.0 and 0.85,
respectively.
As shown in Fig. 13(a) and 13(c), the zerocrossing distortion is observed with the CCM
control method. Furthermore, the output voltage
THD is over 5.6% under the power factor of 1.0
and 0.85, respectively. On the other hand, as
shown in Fig. 13(b) and 13(d), the CCM/DCM
operation can be observed clearly from theinverter output current. In the CCM/DCM
control method, the DCM nonlinear factors are
effectively compensated, resulting in the
reduction of the output voltage THD.
Fig. 14 depicts the comparison of output
voltage THD characteristics between the CCM
control and the CCM/DCM control underconstant effective power condition. As shown in
Fig. 14, the output voltage THD of the CCM
control method is higher than 3.0% over output
power range from 0.2 to 1.0p.u.. According tostandard such as IEC 62040-3, the output voltage
THD with the linear load must be lower than 3%;
hence, the islanded-mode operation with the

350 V
200 Vrms
1.5 kVASCT3030AL
50 Hz
26.7 
0.0375 S
160 mH
580 mH
20 mH
2 mF
4 mF
8 mF
24 mF
49 mF
4 mF
4.7 
100 kHz500 ns
2.3

w = 65 mm

w = 71 mm

l = 46 mm
l = 90 mm
Fig. 11. Prototypes of inverter-side inductor.

Output voltage: 200 Vrms

Output voltage vc (250 V/div)

0V
THDvc:2.0%

0A

Load current
iload (10 A/div)
Zero-crossing distortion

0A
Inverter output current iout (10 A/div)

Time (4 ms/div)

Fig. 12. Inverter operation waveforms with CCM control method and
DOB at %Z=0.68%, %Y = 6.7, and linear load power factor of 1.0.

Output voltage: 203 Vrms

Output voltage vc (250 V/div)

0V

Output voltage: 199 Vrms

Output voltage vc (250 V/div)

0V
THDvc:4.2%

THDvc:0.6%
Load current
iload (10 A/div)

0A

Load current
iload (10 A/div)

0A

CCM DCM
0A

0A
Time (4 ms/div)
Inverter output current iout (10 A/div)(a) CCM control method with DOB at power factor of 1.0
Output voltage: 201 Vrms

Time (4 ms/div)
Inverter output current iout (10 A/div)(b) CCM/DCM control method with DOB at power factor of 1.0

Output voltage vc (250 V/div)

0V

Output voltage: 198 Vrms
0V

THDvc:5.0%

0A

Output voltage vc (250 V/div)

THDvc:0.6%
Load current
iload (10 A/div)

Load current
iload (10 A/div)

0A

CCM DCM

0A

0A

Time (4 ms/div)
Time (4 ms/div)
Inverter output current iout (10 A/div)
Inverter output current iout (10 A/div)(c) CCM control method with DOB at power factor of 0.85(d) CCM/DCM control method with DOB at power factor of 0.85
Fig. 13. Inverter operation waveforms with CCM control method and CCM/DCM control method at %Z = 0.19, %Y = 6.7 and different linear
load power factor.

Inverter Operation with Non-linear Load5
Output voltage THDvc [%]CCM control method, of which the output voltage
THD at the linear load is 4.2%, does not satisfy the
harmonic constrains. On the other hand, the output
voltage THD of the CCM/DCM control method ismaintained below 3.0% over the output power range
from 0.2 to 1.0p.u.. In particular, at the rated power,
the output voltage THD with the CCM/DCM control
method is reduced by 84.6% from 4.2% to 0.6%
compared to the CCM control method.

4

CCM control method with %Z = 0.19%

3

Voltage THD constraint in IEC 62040-3(Requirement at linear load: THD < 3%)
Voltage distortion
reduced by 84.6%

2

CCM/DCM control method with %Z = 0.19%

1
1p.u. equals to 1.5 kW.

00

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

1Fig. 15 shows the experimental waveforms of the
Output power Pout [p.u.]
CCM control method and the CCM/DCM control Fig. 14. Comparison of output voltage THD.
method with current feedforward and DOB at the nonlinear load. Note that additional current sensors lead to cost increase if the current feedforward is applied.
Fig. 15(a) and 15(b) depict the CCM control method with current feedforward and DOB, respectively.
Meanwhile, Fig. 15(c) and 15(d) depicts the CCM/DCM control method with current feedforward and
DOB, respectively. The zero-crossing distortion is observed with the CCM control method as shown in
Fig. 15(a) and 15(b), whereas the smooth current control is confirmed with the CCM/DCM control
method in Fig. 15(c) and 15(d). The CCM/DCM control method can be observed clearly from theinverter output current. It is possible to compensate the DCM nonlinear factors with the CCM/DCM
control method even with non-sinusoidal current such as the non-linear load current.
As shown in 15(d), the voltage THD is lower with the current feedforward than that with DOB
compared to Fig. 15(c). This is because with the low cutoff frequency of DOB, the phase delay of theestimated disturbance current and the circuit parameter errors occur, leading to the insufficient
disturbance compensation. Note that the control system becomes sensitive to noise when the high cutoff
frequency of DOB is applied. As shown Fig. 15(a), the output voltage distortion is observed with theCCM control method even with the current feedforward. It is difficult to improve the output voltage

Output voltage: 216 Vrms
0V

Output voltage vc (250 V/div)

Output voltage: 201 Vrms
0V

THDvc:18.7%

THDvc:10.8%

Load current
iload (10 A/div)
0A

0A

0A

0A

Inverter output current iout (10 A/div) Time (4 ms/div)(a) CCM control method and current feedforward
Output voltage: 197 Vrms
0V

Load current
iload (10 A/div)

Inverter output current iout (10 A/div) Time (4 ms/div)(b) CCM control method and DOB

Output voltage vc (250 V/div)

Output voltage: 199 Vrms
0V

THDvc:2.1%

Load current
iload (10 A/div)

0A

0A

Output voltage vc (250 V/div)

THDvc:5.3%

Load current
iload (10 A/div)0A

Output voltage vc (250 V/div)

0A

Inverter output current iout (10 A/div) Time (4 ms/div)

22
20
18
16
14
12
10
8
6
4
2
0

CCM control method
Error rates are-1.4% with %Y = 6.7%.
-13.7% with %Y = 20%.
THDvc
-8.0% with %Y = 41%.
Reducedby 88.8%
Voltage THD constraint in IEC 62040-3(Requirement at non-linear load: THD < 8%)Capacitance reduced by 83.7%
CCM/DCM control method
Calculated THDvc Eq.(15)

4

8

12

16 20 24 28 32 36
Percentage admittance %Y [%](a) Output voltage THD with current feedforward
Fig. 16. Comparison of output voltage THD.

40

44

Output voltage THDvc [%]Output voltage THDvc [%]Inverter output current iout (10 A/div) Time (4 ms/div)(c) CCM/DCM control method and current feedforward(d) CCM/DCM control method and DOB
Fig. 15. Inverter operation waveforms with CCM control method and CCM/DCM control method at %Z=0.19%, %Y=6.7% and non-linear
load with crest factor of 2.3.

20
18
16
14
12
10
8
6
4
2
0

CCM control method
Error rates are
10.8% with %Y = 1.7%.
8.0% with %Y = 3.4%.
5.3% with %Y = 6.7%.
Calculated THDvc Eq.(15)
THDvc
Reducedby 51.2%
CCM/DCM control method
Voltage THD constraint in IEC 62040-3(Requirement at non-linear load: THD < 8%)

0

1

2
3
4
5
6
Percentage admittance %Y [%](b) Output voltage THD with DOB

78

THD due to the DCM nonlinearity even if the disturbance current is compensated by the current
feedforward.
Fig. 16 depicts the output voltage THD versus the filter capacitance between the CCM control andthe CCM/DCM control and the calculated output voltage THD with current feedforward and DOB under
the non-linear load condition. As shown in Fig 16(a), the output voltage THD with the CCM/DCM
control method is reduced by 88.8% from 18.7% to 2.1% compared to the CCM control method. The
percentage admittance %Y with the CCM/DCM control method is reduced by 83.7% from 41% to 6.7%
compared to the CCM control method. Moreover, the output voltage THD of CCM/DCM control
method with current feedforward agrees to the calculated voltage THD in (15) with a maximum error of-13.7% at the percentage admittance %Y of 20%. As shown in Fig 16(b), the output voltage THD with
the CCM/DCM control method is reduced by 51.2% from 10.8% to 5.3% compared to the CCM control
method. However, the output voltage THD of CCM/DCM control method does not match the calculated
voltage THD in (15). This is because the output voltage THD is so high that it causes an error with theassumption of the use of the ideal voltage source as shown in Fig. 6. Thus, it is necessary to increase thecutoff frequency of DOB, the cutoff frequency of voltage controller and the cutoff frequency of current
controller.

Conclusion
This paper proposed the filter capacitor design for the single-phase grid-tied inverter operating underislanded-mode with discontinuous current mode current control to reduce the inverter-side inductanceand the filter capacitance without worsening output voltage distortion. The design considered the worst
case of load, which is the non-linear load. The voltage source was applied to the circuit model of theload to obtain the harmonics of the current. Then, these harmonics were inputted to the equation
calculated from the transfer function of the control system to calculate the required capacitor. The
simulated output voltage THD agreed to the calculation value with the error of below 10%. As
experimental results, the CCM/DCM control method achieved the low voltage distortion even with theminimized inverter-side inductance, whose impedance %Z was 0.19%. At the non-linear load, the output
voltage THD with the CCM/DCM control method and the current feedforward is reduced by 88.8%
compared to that of the CCM control method even with the minimized inductor impedance of 0.19%
and minimized capacitor admittance of 6.7%. The output voltage THD of CCM/DCM control methodwith the current feedforward agreed to the calculated voltage THD in (15) with a maximum error of 13.7% at the percentage admittance %Y of 20%.

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