CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

200GBASE-FR4 QSFP56 Optical Transceiver Module P/N:
CAQS-SPO201-FR4CZB DSP VersionFeaturesHot-pluggable QSFP56 form factor

Built-in 200G PAM4 DSP

Supports 212.5Gb/s aggregate bit rates (PAM4)



Low power dissipation < 5.5W

RoHS-6 compliant (lead-free)Commercial case temperature range of 0°C to 70°C

Single 3.3V power supplyExtended Link length of 10km over SMF Note1

Standard Link length of 2km over SMF

Uncooled 4 channels CWDM DFB-EML

4 channels CWDM PIN-TIA ROSA

Non-Hermetic Optics

Duplex LC receptacle

I2C management interface

Support optical-electrical analog parameters monitoringApplications
IEEE 802.3bs



Data Center

200GBASE-FR4 Ethernet (PAM4)

Description
CA OPTRONICS GROUP CAQS-SPO201-FR4CZB 200GE QSFP56 Optical Transceiver modules aredesigned for using in 200 Gigabit Ethernet links over 10km single mode fiber. They are compliant with theQSFP MSA and with 200GBASE-FR4 specification of IEEE 802.3bs. Digital diagnostics functionsNote2 areavailable via the I2C interface as specified by SFF-8636. The transceiver is RoHS 2.0 compliant and lead-free
per Directive2011/65/EU.

Note:
Note1: Contact CA OPTRONICS GROUP for more details.
Note2: ACMIS reporting is not supported now, but plan to update it once ACMIS will be finalized.
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CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

Figure 1. Module Block Diagram
Absolute Maximum Ratings
Parameter

SymbolMinMaxUnit

Supply Voltage

Vcc-0.3

3.6VInput Voltage

Vin-0.3Vcc+0.3V

Storage Temperature

Ts-2085ºC

Case Operating Temperature

Tc

070ºC

Humidity (non-condensing)

Rh

595%

Recommended Operating Conditions
Parameter

SymbolMin

TypicalMax

Unit

Supply Voltage

Vcc

3.13

3.3

3.47

V

Operating Case Temperature

Tc

070ºC

Baud Rate per Lane (PAM4)

fd

Humidity

Rh

Power DissipationPm

26.5625

GBaud/s

54.5

85%

5.5

W

Electrical Specifications
Parameter
Differential Input Impedance
CA OPTRONICS GROUP INC

SymbolMin

TypicalMax

Unit

Zin

90100110ohm

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Differential Output Impedance

Zout

90

Differential Input Voltage AmplitudeNote3ΔVinDifferential Output Voltage Amplitude

ΔVout

Bit Error Rate Note4

BER

Input Logic Level HighVIH

2.0VccV

Input Logic Level Low

VIL

00.8

V

Output Logic Level High

VOH

Vcc-0.5

Vcc

V

Output Logic Level Low

VOL00.4

VMax

Unit

100

110ohm

300

900mVpp300900mVpp

2.4E-4

Note:
Note3. Suggested < 700mVpp input differential signal for better BER performance.
Note4. Compliant with 200GBASE-FR4 electrical specification via IEEE802.3bs standard.

Optical Characteristics
ParameterSymbolMin

TypicalTransmitter
Modulation format-Four lane Wavelength Range

PAM4-

λ1

1264.5

1271

1277.5nm

λ21284.51291

1297.5nm

λ31304.51311

1317.5nm

λ41324.51331

1337.5

nm

10.7

dBm

Total average launch power

PtotalAverage launch power (each lane)

Pavg

-4.2

4.7dBmOuter Optical Modulation Amplitude (each lane)

OMAoutt

-1.2

4.5

dBm

Transmitter and dispersion eye closure (each lane)TDECQ

3.3

dB

Average launch power of off transmitter(each lane)

Poff-30dBm

Outer Extinction Ratio

ER

3.5

dB

Side-mode suppression ratio (each lane)

SMSR

30dB

Optical Return Loss Tolerance

ORLT

16.5

dB

ReceiverModulation format
Four lane Wavelength Range

CA OPTRONICS GROUP INC-PAM4-

λ11264.5

1271

1277.5nm

λ21284.5

1291

1297.5

nm

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3CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

λ31304.5

1311

1317.5nm

λ41324.5

1331

1337.5nmDamage threshold
Average Receive Power (each lane)
Input (each lane)

Rdam

5.7

Pin-8.2

Receiver Power (OMAouter) (each lane)

dBm
4.7

dBm

OMAoutr

4.5

dBm

Difference in receive power between any two lanes

OMAdif

4.1

dBm

Receiver reflectancePref-26

dB

Stressed Receiver Sensitivity (OMAouter) (each lane)

Sens

-3.6

dBm

Receiver Sensitivity (OMAouter) (each lane) Note5

Sen-6

dBm

Note:
Note5. Measured with conformance test signal at TP3 for the BER specified in 122.1.1 of IEEE 802.3bs.

Pin Description
PinLogic

1Symbol

Name/Description

GND

Module GroundNote62

CML-I

Tx2-

Transmitter inverted data input

3CML-I

Tx2+

Transmitter non-inverted data input

GND

Module Ground Note645CML-I

Tx4-

Transmitter inverted data input

6CML-I

Tx4+

Transmitter non-inverted data input

GND

Module GroundNote678

LVTTL-I

MODSEIL

Module SelectNote79

LVTTL-I

ResetL

Module ResetNote7

VCCRx+3.3V Receiver Power Supply

1011

LVCMOS-I

SCL

2-wire Serial interface clockNote712

LVCMOS-I/OSDA

2-wire Serial interface dataNote7

GND

Module GroundNote61314CML-O

RX3+

Receiver non-inverted data output

15CML-O

RX3-

Receiver inverted data output

GND

Module GroundNote6

1617

CML-O

RX1+

Receiver non-inverted data output

18

CML-O

RX1-

Receiver inverted data output

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CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

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GND

Module GroundNote620

GND

Module GroundNote621

CML-O

RX2-

Receiver inverted data output

22

CML-O

RX2+

Receiver non-inverted data output

GND

Module GroundNote62324

CML-O

RX4-

Receiver inverted data output

25

CML-O

RX4+

Receiver non-inverted data output

GND

Module GroundNote62627

LVTTL-O

ModPrsL

28

LVTTL-O

IntL

Module Present, internal pulled down to GND
Interrupt output, should be pulled up on host board2

29

VCCTx+3.3V Transmitter Power Supply

30

VCC1+3.3V Power Supply

LPModeLow Power ModeNote7

GND

Module GroundNote631

LVTTL-I

32
33

CML-I

Tx3+

Transmitter non-inverted data input

34

CML-I

Tx3-

Transmitter inverted data input

GND

Module GroundNote63536CML-I

Tx1+

Transmitter non-inverted data input

37CML-I

Tx1-Transmitter inverted data input

GND

Module GroundNote6

38

Note:
Note6. Module circuit ground is isolated from module chassis ground within the module.
Note7. Open collector should be pulled up with 4.7K to 10K ohms on host board to a voltage between 3.15V and3.6V.

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CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

Figure 2. Electrical Pin-out Details
ModSelL Pin
The ModSelL is an input pin. When held low by the host, the module responds to 2-wire serial communicationcommands. The ModSelL allows the use of multiple QSFP modules on a single 2-wire interface bus. When theModSelL is "High", the module will not respond to any 2-wire interface communication from the host. ModSelL
has an internal pull-up in the module.

ResetL PinReset. LPMode_Reset has an internal pull-up in the module. A low level on the ResetL pin for longer than theminimum pulse length (t_Reset_init) initiates a complete module reset, returning all user module settings to theirdefault state. Module Reset Assert Time (t_init) starts on the rising edge after the low level on the ResetL pin isreleased. During the execution of a reset (t_init) the host shall disregard all status bits until the module indicatesa completion of the reset interrupt. The module indicates this by posting an IntL signal with the Data_Not_Readybit negated. Note that on power up (including hot insertion) the module will post this completion of reset interrupt
without requiring a reset.

LPMode Pin
CA OPTRONICS GROUP QSFP28 modules operate in the low power mode (less than 1.5 W power
consumption). This pin active high will decrease power consumption to less than 1W.

ModPrsL Pin
ModPrsL is pulled up to Vcc on the host board and grounded in the module. The ModPrsL is asserted "Low"when the module is inserted and deasserted "High" when the module is physically absent from the hostconnector.

IntL Pin
IntL is an output pin. When "Low", it indicates a possible module operational fault or a status critical to the hostsystem. The host identifies the source of the interrupt by using the 2-wire serial interface. The IntL pin is an open
collector output and must be pulled up to Vcc on the host board.

Power Supply Filtering
The host board should use the power supply filtering shown in Figure 3.

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CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

Figure 3. Host Board Power Supply Filtering

DIAGNOSTIC MONITORING INTERFACE
Digital diagnostics functions are available via the I2C interface as specified by SFF-8636.
The structure of the memory is shown in Figure 4. The memory space is arranged into a lower, single page,address space of 128 bytes and multiple upper address space pages. This structure permits timely access toaddresses in the lower page, such as Interrupt Flags and Monitors. Less time critical time entries, such as serial
ID information and threshold settings, are available with the Page Select function.
The interface address used is A0xh and is mainly used for time critical data like interrupt handling in order toenable a one-time-read for all data related to an interrupt situation. After an interrupt, IntL, has been asserted,
the host can read out the flag field to determine the affected channel and type of flag.

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CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

Figure 4. QSFP28 Memory Map

Figure 5. Low Memory Map
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CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

Figure 6. Page 03 Memory Map

Figure 7. Page 00 Memory Map
Page02 is User EEPROM and its format decided by user.

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The detail description of low memory and Page 00. Page 03 upper memory please see SFF-8636 document.

Timing for Soft Control and Status Functions
Parameter

SymbolMaxUnitt_init2000

ms

t_reset_init

2μst_serial

2000

ms

t_data2000

ms

Reset Assert Timet_reset2000

ms

LPMode Assert Time

ton_LPMode

100μs

IntL Assert Time

ton_IntL200ms

IntL Deassert Time

toff_IntL

500μs

Rx LOS Assert Time

ton_los100

ms

Tx Fault Assert Time

ton_Txfault

200

ms

Flag Assert Time

ton_flag200

ms

Mask Assert Time

ton_mask

100

ms

Mask Deassert Time

toff_mask

100

ms

ModSelL Assert Time

ton_ModSelL

100

μs

ModSelL Deassert Time

toff_ModSelL

100

μs

ton_Pdown

100

ms

toff_Pdown

300

ms

Initialization Time
Reset Init Assert Time
Serial Bus Hardware
Ready Time
Monitor Data ReadyTime

Power_over-ride orPower-set Assert TimePower_over-ride orPower-set Deassert
TimeConditions
Time from power onNote8, hot plug or rising edge ofReset until the module is fully functionalNote9
A Reset is generated by a low level longer thanthe minimum reset pulse time present on theResetL pin.
Time from power onNote8 until module responds todata transmission over the 2-wire serial bus
Time from power onNote8 to data not ready, bit 0 of
Byte 2, de-asserted and IntL asserted
Time from rising edge on the ResetL pin until themodule is fully functionalNote9
Time from assertion of LPMode (Vin: LPMode=VIH)
until module power consumption enters lower
Power Level
Time from occurrence of condition triggering IntL
until Vout: IntL=VOL
Time from clear on readNote10 operation ofassociated flag until Vout: IntL=VOH. This includes
deassert times for Rx LOS, Tx Fault and other flagbits.
Time from Rx LOS state to Rx LOS bit set and IntLasserted
Time from Tx Fault state to Tx Fault bit set andIntL asserted
Time from occurrence of condition triggering flagto associated flag bit set and IntL asserted
Time from mask bit setNote11 until associated IntL
assertion is inhibited
Time from mask bit clearedNote11 until associatedIntlL operation resumes
Time from assertion of ModSelL until module
responds to data transmission over the 2-wireserial bus
Time from deassertion of ModSelL until themodule does not respond to data transmission
over the 2-wire serial bus
Time from P_Down bit setNote11 until module power
consumption enters lower Power Level
Time from P_Down bit clearedNote11 until themodule is fully functionalNote10

Note：
Note8.

Power on is defined as the instant when supply voltages reach and remain at or above the minimum

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CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01specified value.
Note9.

Fully functional is defined as IntL asserted due to data not ready bit, bit 0 byte 2 de-asserted.

Note10. Measured from falling clock edge after stop bit of read transaction.
Note11. Measured from falling clock edge after stop bit of write transaction.

Mechanical Dimensions

Figure 8. Mechanical Specifications
Regulatory Compliance
CA OPTRONICS GROUP CAQS-SPO201-FR4CZB QSFP56 transceivers meet the requirements of thefollowing standards:
FeatureLaser Safety
Electrical Safety
Environmental protection

CE EMCCA OPTRONICS GROUP INC

Standard
IEC 60825-1:2014 (Third Edition)
EN 60825-2：2004+A1+A2
EN 62368-1：2014
IEC 62368-1：2014
UL 62368-1：2014
2011/65/EU
2015/863/EU
EN55032：2015
EN55035：2017
EN61000-3-2：2014
EN61000-3-3：2013
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CAQS-SPO201-FR4CZB 200GBASE-FR4 QSFP56 Optical Transceiver Module R01

FCC

FCC Part 15, Subpart B; ANSI C63.4-2014

References
1. QSFP MSA
2. SFF-8636
3. IEEE 802.3bs 200GBASE-FR4 specification

CAUTION:Use of controls or adjustment or performance of procedures other than those specified herein may result inhazardous radiation exposure.

Ordering Information
Part Number

Product Description

CAQS-SPO201-FR4CZBQSFP56, 200GBASE-FR4 Transceiver, 2km, DSP version, uncooled DFB.

Important Notice
Performance figures, data and any illustrative material provided in this data sheet are typical and must be
specifically confirmed in writing by CA OPTRONICS GROUP before they become applicable to any particularorder or contract. In accordance with the CA OPTRONICS GROUP policy of continuous improvement
specifications may change without notice.

The publication of information in this data sheet does not imply freedom from patent or other protective rights ofCA OPTRONICS GROUP or others. Further details are available from any CA OPTRONICS GROUP sales
representative.

E-mail:sales@caoptronicsgroup.com
Official Site:www.caoptronicsgroup.com

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