IAM-20380HTHigh Performance Automotive Grade2 3-axis Gyroscope
GENERAL DESCRIPTIONAPPLICATIONSThe IAM-20380HT is a grade2 3-axis gyroscope
MotionTracking device for Automotive non-safety
applications in a thin 3x3x0.75mm3 (16-pin LGA) package.
It also features a 4096-byte FIFO that can lower the
traffic on the serial bus interface and reduce power
consumption by allowing the system processor to burst
read sensor data and then go into a low-power mode.
IAM-20380HT, with its 3-axis integration, enables
manufacturers to eliminate the costly and complex
selection, qualification, and system level integration of
discrete devices, guaranteeing optimal motion
performance.

IAM-20380HT address a wide range of Automotive
applications, including but not limited to:• Navigation Systems Aids for Dead Reckoning• Lift Gate Motion Detection• Accurate Location for Vehicle to Vehicle andInfrastructure• View Camera Stabilization and Vision Systems• Head-up display (HUD) and augmented reality HUD• Car Alarm• Telematics• Insurance Vehicle Tracking

The gyroscope has a programmable full-scale range of±250 dps, ±500 dps, ±1000 dps and ±2000 dps. Factorycalibrated initial sensitivity of both sensors reduces
production-line calibration requirements.
Other industry-leading features include on-chip 16-bit
ADCs, programmable digital filters, an embedded
temperature sensor, and two programmable interrupts.
The device features I2C and SPI serial interfaces, a VDD
operating range of 1.71V to 3.6V, and a separate digital
IO supply, VDDIO from 1.71V to 3.6V.

BLOCK DIAGRAM

ORDERING INFORMATION
PART
IAM-20380HT†

AXES
X, Y, ZTEMP RANGE-40°C to +105°C†Denotes RoHS and Green-compliant package* Moisture sensitivity level of the package

FEATURES• Digital-output X-, Y-, and Z-axis angular rate sensors(gyroscopes) with a user-programmable full-scale
range of ±250dps, ±500dps, ±1000dps, and±2000dps, integrated 16-bit ADCs.
• User-programmable digital filters for gyroscope andtemperature sensor• Embedded Self-test• Two interrupt lines• Reliability testing performed according to
AEC–Q100: PPAP and qualification report available
upon request• Final test at -40°C, 25°C, and +105°C

TYPICAL OPERATING CIRCUITLONGEVITY COMMITMENT
To provide the best service for customers developing products with a long-life cycle we have designed and engineered products withlongevity in mind. These products are designed for harsher environments and are tested and manufactured to higher accuracy andstability. https://invensense.tdk.com/longevity/
InvenSense, Inc. reserves the right to change
specifications and information herein without notice
unless the product is in mass production and thedatasheet has been designated by InvenSense inwriting as subject to a specified Product / Process
Change Notification Method regulation.

PACKAGE
16-Pin LGA

InvenSense, Inc.
1745 Technology Drive, San Jose, CA 95110 U.S.A+1(408) 988–7339
www.invensense.com

Document Number: DS-000521
Revision: 1.0
Rev. Date: 09/14/2022

MSL*
3

IAM-20380HTTABLE OF CONTENTS
General Description ............................................................................................................................................. 1
Block Diagram ...................................................................................................................................................... 1
Applications ......................................................................................................................................................... 1
Ordering Information........................................................................................................................................... 1
Features ............................................................................................................................................................... 1
Typical Operating Circuit ..................................................................................................................................... 1
1

Introduction ......................................................................................................................................................... 7
Purpose and Scope.................................................................................................................................... 7
Product Overview ..................................................................................................................................... 7
Applications .............................................................................................................................................. 7

2

Features ............................................................................................................................................................... 8
Gyroscope Features .................................................................................................................................. 8
Additional Features ................................................................................................................................... 8

3

Electrical Characteristics ...................................................................................................................................... 9
Gyroscope Specifications .......................................................................................................................... 9Electrical Specifications ........................................................................................................................... 10
I2C Timing Characterization ..................................................................................................................... 13
SPI Timing Characterization .................................................................................................................... 14
Absolute Maximum Ratings .................................................................................................................... 15
Thermal Information ............................................................................................................................... 15

4

Applications Information ................................................................................................................................... 16
Pin Out Diagram and Signal Description ................................................................................................. 16
Typical Operating Circuit ......................................................................................................................... 17
Bill of Materials for External Components .............................................................................................. 17
Block Diagram ......................................................................................................................................... 18
Overview ................................................................................................................................................. 18
Three-Axis MEMS Gyroscope with 16-bit ADCs and Signal Conditioning ............................................... 19
I2C and SPI Serial Communications Interfaces ........................................................................................ 19
Self-Test .................................................................................................................................................. 20
Clocking ................................................................................................................................................... 20
Sensor Data Registers ............................................................................................................................. 20
FIFO ......................................................................................................................................................... 21
Interrupts ................................................................................................................................................ 21
Digital-Output Temperature Sensor ....................................................................................................... 21
Bias and LDOs.......................................................................................................................................... 21
Charge Pump ........................................................................................................................................... 21

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IAM-20380HTStandard Power Modes .......................................................................................................................... 21
Sensor Initialization and Basic Configuration .......................................................................................... 21
5

Programmable Interrupts .................................................................................................................................. 23

6

Digital Interface ................................................................................................................................................. 24
I2C and SPI Serial Interfaces .................................................................................................................... 24
I2C Interface ............................................................................................................................................ 24
IC Communications Protocol................................................................................................................... 24
I2C Terms ................................................................................................................................................. 26
SPI Interface ............................................................................................................................................ 27

7

Serial Interface Considerations .......................................................................................................................... 28
IAM-20380HT Supported Interfaces ....................................................................................................... 28

8

Register Map ...................................................................................................................................................... 29

9

Register Descriptions ......................................................................................................................................... 31
Registers 0 to 2 – Gyroscope Self-Test Registers .................................................................................... 31
Register 19 – Gyro Offset Adjustment Register ...................................................................................... 31
Register 20 – Gyro Offset Adjustment Register ...................................................................................... 31
Register 21 – Gyro Offset Adjustment Register ...................................................................................... 32
Register 22 – Gyro Offset Adjustment Register ...................................................................................... 32
Register 23 – Gyro Offset Adjustment Register ...................................................................................... 32
Register 24 – Gyro Offset Adjustment Register ...................................................................................... 32
Register 25 – Sample Rate Divider .......................................................................................................... 33
Register 26 – Configuration .................................................................................................................... 33
Register 27 – Gyroscope Configuration .................................................................................................. 34
Register 29 – FIFO SIZE Configuration ..................................................................................................... 34
Register 30 – Low Power Mode Configuration ....................................................................................... 35
Register 35 – FIFO Enable ....................................................................................................................... 36
Register 54 – FSYNC Interrupt Status ...................................................................................................... 36
Register 55 – INT/INT2 Pin / Bypass Enable Configuration ..................................................................... 37
Register 56 – Interrupt Enable ................................................................................................................ 37
Register 58 – Interrupt Status ................................................................................................................. 38
Registers 65 and 66 – Temperature Measurement ................................................................................ 38
Registers 67 to 72 – Gyroscope Measurements ..................................................................................... 38
Register 104 – Signal Path Reset ............................................................................................................. 39
Register 106 – User Control .................................................................................................................... 40
Register 107 – Power Management 1 ..................................................................................................... 40
Register 108 – Power Management 2 ..................................................................................................... 40
Registers 114 and 115 – FIFO Count Registers........................................................................................ 41

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IAM-20380HT
Register 116 – FIFO Read Write .............................................................................................................. 41
Register 117 – Who Am I ........................................................................................................................ 42
10

Assembly ............................................................................................................................................................ 43
Orientation of Axes ................................................................................................................................. 43
Package Dimensions ............................................................................................................................... 4411Part Number Package Marking .......................................................................................................................... 46

12

Reference........................................................................................................................................................... 47

13

Revision History ................................................................................................................................................. 48

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Revision: 1.0

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IAM-20380HT
LIST OF FIGURES
Figure 1. I2C Bus Timing Diagram ............................................................................................................................................... 13
Figure 2. SPI Bus Timing Diagram .............................................................................................................................................. 14
Figure 3. Pin out Diagram for IAM-20380HT 3.0x3.0x0.75mm3 LGA ......................................................................................... 16
Figure 4. IAM-20380HT LGA Application Schematic .................................................................................................................. 17
Figure 5. IAM-20380HT Block Diagram ...................................................................................................................................... 18
Figure 6. IAM-20380HT Solution Using I2C Interface ................................................................................................................. 19
Figure 7. IAM-20380HT Solution Using SPI Interface ................................................................................................................. 20
Figure 8. START and STOP Conditions ........................................................................................................................................ 24
Figure 9. Acknowledge on the I2C Bus ....................................................................................................................................... 25
Figure 10. Complete I2C Data Transfer ...................................................................................................................................... 25
Figure 11. Typical SPI Master/Slave Configuration .................................................................................................................... 27
Figure 12. I/O Levels and Connections ...................................................................................................................................... 28
Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation ...................................................................................... 43
Figure 14. Package Dimensions ................................................................................................................................................. 44
Figure 15. Part Number Package Marking ................................................................................................................................. 46

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IAM-20380HT
LIST OF TABLES
Table 1. Gyroscope Specifications ............................................................................................................................................... 9
Table 2. D.C. Electrical Characteristics ....................................................................................................................................... 10
Table 3. A.C. Electrical Characteristics ....................................................................................................................................... 12
Table 4. Other Electrical Specifications...................................................................................................................................... 12
Table 5. I2C Timing Characteristics ............................................................................................................................................. 13
Table 6. SPI Timing Characteristics (8 MHz Operation) ............................................................................................................. 14
Table 7. Absolute Maximum Ratings ......................................................................................................................................... 15
Table 8. Thermal Information .................................................................................................................................................... 15
Table 9. Signal Descriptions ....................................................................................................................................................... 16
Table 10. Bill of Materials .......................................................................................................................................................... 17
Table 11. Standard Power Modes for IAM-20380HT ................................................................................................................. 21
Table 12. Table of Interrupt Sources ......................................................................................................................................... 23
Table 13. Serial Interface ........................................................................................................................................................... 24
Table 14. I2C Terms .................................................................................................................................................................... 26
Table 15. Register Map .............................................................................................................................................................. 29
Table 16. Gyroscope and Temperature Sensor Data Rates and Bandwidths (Low-Noise Mode) .............................................. 34
Table 17. Example Configurations for Gyroscope when GYRO_CYCLE = 1 ................................................................................ 35
Table 18. Package Dimensions ................................................................................................................................................... 45
Table 19. Part Number Package Marking .................................................................................................................................. 46

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IAM-20380HT
1

INTRODUCTIONPURPOSE AND SCOPE

This document is a product specification, providing description, specifications, and design related information on the IAM20380HT Automotive MotionTracking device. The device is housed in a thin 3x3x0.75 mm3 16-pin LGA package.

PRODUCT OVERVIEWThe IAM-20380HT is a 3-axis MotionTracking device for Automotive non-safety applications, that features a 3-axis
gyroscope in a thin 3x3x0.75 mm3 (16-pin LGA) package. It also features a 4096-byte FIFO that can lower the traffic on theserial bus interface and reduce power consumption by allowing the system processor to burst read sensor data and then go
into a low-power mode. IAM-20380HT, with its 3-axis integration, enables manufacturers to eliminate the costly andcomplex selection, qualification, and system level integration of discrete devices, guaranteeing optimal motion
performance.
The gyroscope has a programmable full-scale range of ±250 dps, ±500 dps, ±1000 dps, and ±2000 dps. Factory-calibrated
initial sensitivity of both sensors reduces production-line calibration requirements.
Other industry-leading features include on-chip 16-bit ADCs, programmable digital filters, an embedded temperature
sensor, and programmable interrupts. The device features I2C and SPI serial interfaces, a VDD operating range of 1.71V to
3.6V, and a separate digital IO supply, VDDIO from 1.71V to 3.6V.
Communication with all registers of the device is performed using either I 2C at 400 kHz or SPI at 8 MHz.
By leveraging its patented and volume-proven CMOS-MEMS fabrication platform, which integrates MEMS wafers withcompanion CMOS electronics through wafer-level bonding, TDK-InvenSense has driven the package size down to a footprint
and thickness of 3x3x0.75 mm3 (16-pin LGA), to provide a very small yet high-performance. The device provides highrobustness by supporting 10,000g shock reliability.

APPLICATIONS
•
•
•
•
•
•
•
•

Navigation Systems Aids for Dead Reckoning
Lift Gate Motion Detections
Accurate Location for Vehicle to Vehicle and Infrastructure
View Camera Stabilization and Vision Systems
Head-up display (HUD) and augmented reality HUD
Car Alarm
Telematics
Insurance Vehicle Tracking

Document Number: DS-000521
Revision: 1.0

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IAM-20380HT
2

FEATURESGYROSCOPE FEATURES

The triple-axis MEMS gyroscope in the IAM-20380HT includes a wide range of features:••••

Digital-output X-, Y-, and Z-axis angular rate sensors (gyroscopes) with a user-programmable full-scale range of±250 dps, ±500 dps, ±1000 dps and ±2000 dps and integrated 16-bit ADCs
Digitally-programmable low-pass filter
Factory calibrated sensitivity scale factor
Self-test

ADDITIONAL FEATURESThe IAM-20380HT includes the following additional features:
•
•
•
•
•
•
•
•
•

Thinnest LGA package for automotive applications: 3x3x0.75 mm3 (16-pin LGA)
4096-byte FIFO buffer enables the applications processor to read the data in bursts
Digital-output temperature sensor
User-programmable digital filters for gyroscope and temperature sensor
10,000g shock tolerant
400 kHz Fast Mode I2C for communicating with all registers
8 MHz SPI serial interface for communicating with all registers
MEMS structure hermetically sealed and bonded at wafer level
RoHS and Green compliant

Document Number: DS-000521
Revision: 1.0

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IAM-20380HT
3ELECTRICAL CHARACTERISTICSGYROSCOPE SPECIFICATIONS

Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, Full Scale = 2000dps, Low-Noise Mode enabled
unless otherwise noted.
All Zero-rate output, sensitivity, and noise specifications include board soldering effects, unless otherwise noted.
PARAMETER

Full-Scale Range

CONDITIONSGYROSCOPE SENSITIVITYMIN

FS_SEL=0
FS_SEL=1
FS_SEL=2
FS_SEL=3

Gyroscope ADC Word Length
Sensitivity Scale Factor
Nonlinearity
Cross-Axis Sensitivity
ZRO Tolerance
ZRO Variation Over Temperature
Rate Noise Spectral Density
Gyroscope Mechanical Frequencies
Low Pass Filter Response
Gyroscope Start Up Time
Output Data Rate

FS_SEL=0
FS_SEL=1
FS_SEL=2
FS_SEL=3
Best fit straight line; 25°C
25°C
ZERO-RATE OUTPUT (ZRO)
All axes, 25°C
All axes, -40°C to +105°C
GYROSCOPE NOISE PERFORMANCE
25°C, initial, Noise BW = 306 Hz,
VDD = VDDIO = 1.8V

TYP

UNITS

NOTES

±250
±500
±1000
±2000
16
131
65.5
32.8
16.4
±0.1
±1

dps
dps
dps
dps
bits
LSB/(dps)
LSB/(dps)
LSB/(dps)
LSB/(dps)
%
%

3
3
3
3
3
3
3
3
3
1
1

±0.8
±1.0

dps
dps

1,2
1,2

0.005

dps/√Hz

1,4

250
50

KHz
Hz
ms

2
3
1

8000

Hz

1

27
Programmable Range
From Sleep mode, 25°C
Programmable, Normal (Filtered)
mode

5
35
4

Table 1. Gyroscope Specifications
Notes:
1.
2.
3.
4.

Based on characterization data on a limited number of parts.
Tested in production at component level. Over temperature tests are performed at 25°C, 105°C, and/or -40°C.
Guaranteed by design.
Calculated from Total RMS Noise.

Document Number: DS-000521
Revision: 1.0

MAX

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IAM-20380HTELECTRICAL SPECIFICATIONS
D.C. Electrical Characteristics
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, Low-Noise Mode enabled unless otherwise
noted.
PARAMETERCONDITIONSSUPPLY VOLTAGES

VDD
VDDIO
Normal Mode
Full-Chip Sleep Mode
Specified Temperature Range

MIN

TYP

MAX

UNITS

NOTES

1.71
1.71

1.8
1.8

3.6
3.6

V
V

1
1

mA
µA

1
1

°C

1,2

SUPPLY CURRENTS & BOOT TIME
3-axis Gyroscope
TEMPERATURE RANGE
Performance parameters are not applicablebeyond Specified Temperature Range

2.6
6
-40

Table 2. D.C. Electrical Characteristics
Notes:
1.
2.

Based on characterization data on a limited number of parts.
Based on qualification.

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IAM-20380HT
A.C. Electrical Characteristics
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted.
PARAMETERCONDITIONS

MIN

TYP

MAX

UNITS

NOTES

100

ms

1

105

°C
°C
LSB/°C

1
1
1

100
100
5

ms
ms
ms

1
1
1

0.3*VDDIO

V
V
pF

1

SUPPLIES
Supply Ramp Time (TRAMP)

Operating Range
Room Temperature Offset
Sensitivity
Supply Ramp Time (TRAMP)
Start-up time for register read/write
I2C ADDRESS
VIH, High Level Input Voltage
VIL, Low Level Input Voltage
CI, Input Capacitance
VOH, High Level Output Voltage
VOL1, LOW-Level Output Voltage
VOL.INT, INT Low-Level Output Voltage
Output Leakage Current
tINT, INT Pulse Width
VIL, LOW Level Input Voltage
VIH, HIGH-Level Input Voltage
Vhys, Hysteresis
VOL, LOW-Level Output Voltage
IOL, LOW-Level Output Current
Output Leakage Current
tof, Output Fall Time from VIHmax to
VILmaxDocument Number: DS-000521
Revision: 1.0

Monotonic ramp. Ramp
0.01
rate is 10% to 90% of the
final value
TEMPERATURE SENSOR
Ambient-40
25°C
0Untrimmed
326.8
POWER-ON RESET
Valid power-on RESET
0.01
From power-up
11
From sleep
SA0 = 01101000
SA0 = 11101001
DIGITAL INPUTS (FSYNC, SA0, SPC, SDI, CS)
0.7*VDDIO< 10
DIGITAL OUTPUT (SDO, INT)RLOAD=1 MΩ;
0.9*VDDIORLOAD=1 MΩ;
OPEN=1, 0.3 mA sink
Current
OPEN=1LATCH_INT_EN=0
I2C I/O (SCL, SDA)
-0.5V
0.7*VDDIO

0.1*VDDIO
0.1
100
50
0.3*VDDIOVDDIO + 0.5V

0

0.4
3
6
100

Cb bus capacitance in pf

Page 11 of 49

20+0.1Cb

1nAµs

0.1*VDDIO
3 mA sink current
VOL=0.4V
VOL=0.6V

V
V
V

300

V
V
V
V
mA
mA
nA
ns

1

IAM-20380HT

Sample Rate

Clock Frequency Initial Tolerance

Frequency Variation over
Temperature

INTERNAL CLOCK SOURCEFCHOICE_B=1,2,3
SMPLRT_DIV=0FCHOICE_B=0;
DLPFCFG=0 or 7
SMPLRT_DIV=0FCHOICE_B=0;
DLPFCFG=1,2,3,4,5,6;
SMPLRT_DIV=0
CLK_SEL=0, 6 or gyro
-5
inactive; 25°C
CLK_SEL=1,2,3,4,5 and gyro-1
active; 25°C
CLK_SEL=0,6 or gyro
-10
inactive
CLK_SEL=1,2,3,4,5 and gyro-1
active

32

kHz

2

8

kHz

2

1

kHz

2

+5

%

1

+1

%

1

+10

%

1

+1

%

1

Table 3. A.C. Electrical Characteristics
Notes:
1.
2.

Based on characterization data on a limited number of parts.
Guaranteed by design.

Other Electrical Specifications
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted.
PARAMETERSPI Operating Frequency, All
Registers Read/Write

CONDITIONSSERIAL INTERFACEMIN

Low Speed Characterization
High Speed Characterization

SPI Modes
I2C Operating Frequency

All registers, Fast-mode
All registers, Standard-mode
Table 4. Other Electrical Specifications

Notes:
1.
2.

Based on characterization data on a limited number of parts.
SPI clock duty cycle between 45% and 55% should be used for 8-MHz operation.

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TYP
100
±10%
1
Modes 0
and 3

MAX

UNITS

NOTES

kHz

1

8

MHz

1, 2

400
100

kHz
kHz

1
1

IAM-20380HTI2C TIMING CHARACTERIZATION
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted.
PARAMETERSI2C TIMINGfSCL, SCL Clock Frequency
tHD.STA, (Repeated) START Condition Hold TimetLOW, SCL Low PeriodtHIGH, SCL High PeriodtSU.STA, Repeated START Condition Setup Time
tHD.DAT, SDA Data Hold TimetSU.DAT, SDA Data Setup Timetr, SDA and SCL Rise Timetf, SDA and SCL Fall Time
tSU.STO, STOP Condition Setup Time

CONDITIONSI2C FAST-MODEMIN

Cb bus cap. from 10 to 400 pF
Cb bus cap. from 10 to 400 pF

MAX

UNITS

NOTES

400
0.6

kHz
µs

1
1

1.3
0.6
0.6
0
100
20+0.1Cb
20+0.1Cb
0.6

µs
µs
µs
µs
ns
ns
ns
µs

1
1
1
1
1
1
1
1

µs

1

pF
µs
µs

1
1
1

continued below at

AtBUF, Bus Free Time Between STOP and START
Condition
Cb, Capacitive Load for each Bus LinetVD.DAT, Data Valid Time
tVD.ACK, Data Valid Acknowledge Time

TYP

300
300

1.3
< 400
0.9
0.9
Table 5. I2C Timing Characteristics

Notes:

1.

Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets.

tf
SDA

tSU.DAT

tr

70%
30%

70%
30%

tf
SCL

tr
70%
30%

S

tHD.STA

tVD.DAT
70%
30%

tHD.DAT
1/fSCLtLOW

1st clock cycle

9th clock cycle

tHIGH

tBUF
SDA

70%
30%

A

tSU.STA

tHD.STA

SCL

70%
30%

Sr

tSU.STO

tVD.ACK
9th clock cycle

Figure 1. I2C Bus Timing Diagram

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PSIAM-20380HTSPI TIMING CHARACTERIZATION
Typical Operating Circuit of section 4.2, VDD = 1.8V, VDDIO = 1.8V, TA = 25°C, unless otherwise noted.
PARAMETERSSPI TIMING
fSPC, SPC Clock Frequency

CONDITIONS

MIN

TYP

MAX

UNITS

NOTES

8

MHz

1

tLOW, SPC Low Period

56

ns

1

tHIGH, SPC High Period

56

ns

1

tSU.CS, CS Setup Time

2

ns

1

tHD.CS, CS Hold Time

63

ns

1

tSU.SDI, SDI Setup Time

3

ns

1

tHD.SDI, SDI Hold Time

7

ns

1

ns

1

tVD.SDO, SDO Valid Time

Cload = 20 pF

tHD.SDO, SDO Hold Time

Cload = 20 pF

40

ns

1

tDIS.SDO, SDO Output Disable Time

6
20

ns

1

tFall, SCLK Fall Time

6.5

ns

2

tRise, SCLK Rise Time

6.5

ns

2

Table 6. SPI Timing Characteristics (8 MHz Operation)
Notes:
1.
2.

Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets.
Based on other parameter values.

CS

70%
30%

tFall

tSU;CS
SCLK

tHIGH

tRise

1/fCLK

tHD;CS

70%
30%

tSU;SDI
SDI

70%
30%

tHD;SDItLOW
LSB INMSB INtVD;SDOSDOMSB OUT

70%
30%

Figure 2. SPI Bus Timing Diagram

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tDIS;SDO

tHD;SDOLSB OUTIAM-20380HT
ABSOLUTE MAXIMUM RATINGS
Stress above those listed as “Absolute Maximum Ratings” may cause permanent damage to the device. These are stressratings only and functional operation of the device at these conditions is not implied. Exposure to the absolute maximum
ratings conditions for extended periods may affect device reliability.
PARAMETER
Supply Voltage, VDD
Supply Voltage, VDDIOREGOUT
Input Voltage Level (SA0, FSYNC, SCL, SDA)
Acceleration (Any Axis, unpowered)Temperature Range
Storage Temperature Range

RATING-0.5V to 4V-0.5V to 4V-0.5V to 2V-0.5V to VDDIO + 0.5V
10,000g for 0.2ms-40°C to 105°C-40°C to 125°C
2 kV (HBM);
750V (CDM corner pins)
500V (CDM all other pins)
JEDEC Class II (2),125°C±100 mA
Not allowed

Electrostatic Discharge (ESD) Protection
Latch-up
Ultrasonic excitation (cleaning/welding/…)
Table 7. Absolute Maximum Ratings

THERMAL INFORMATIONTHERMAL METRICθJAψJT

DESCRIPTION
Junction-to-ambient thermal resistanceJunction-to-top characterization parameter
Table 8. Thermal Information

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Revision: 1.0

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VALUE
84.58 °C/W
7 °C/WIAM-20380HT
4APPLICATIONS INFORMATIONPIN OUT DIAGRAM AND SIGNAL DESCRIPTIONPIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

PIN NAME
VDDIO
SCL/SPC
SDA/SDI
SA0/SDO
CS
INT
INT2
FSYNC
RESV
RESV
RESV
RESV
GND
REGOUT
RESV

16

VDD

PIN DESCRIPTION
Digital I/O supply voltage
I2C serial clock (SCL); SPI serial clock (SPC)
I2C serial data (SDA); SPI serial data input (SDI)
I2C slave address LSB (SA0); SPI serial data output (SDO)
Chip select (0 = SPI mode; 1 = I2C mode)
Interrupt digital output (push-pull or open-drain)
Second Interrupt digital output (push-pull or open-drain)
Synchronization digital input (optional). Connect to GND if unused
Reserved. Connect to GND
Reserved. Connect to GND
Reserved. Connect to GND
Reserved. Connect to GND
Connect to GND
Regulator filter capacitor connection
Reserved. Connect to GND
Power Supply
Table 9. Signal Descriptions

Note: VDD, VDDIO, SCL/SPC and CS pins must be correctly managed at power-up to guarantee proper IAM-20380HT start-up. Please refer to sections
4.17.1 and 4.17.2 for detailed power-up instructions.

Figure 3. Pin out Diagram for IAM-20380HT 3.0x3.0x0.75mm3 LGA

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IAM-20380HTTYPICAL OPERATING CIRCUIT

Figure 4. IAM-20380HT LGA Application Schematic
Note: I2C lines are open drain and pullup resistors (e.g. 10 kΩ) are required.

BILL OF MATERIALS FOR EXTERNAL COMPONENTSCOMPONENTREGOUT Capacitor
VDD Bypass Capacitors
VDDIO Bypass Capacitor

LABEL

SPECIFICATION

C1

X7R, 0.47 µF ±10%

1

C2

X7R, 0.1 µF ±10%

1

C4

X7R, 2.2 µF ±10%

1

C3

X7R, 10 nF ±10%

1Table 10. Bill of Materials

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QUANTITY

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IAM-20380HTBLOCK DIAGRAM

Figure 5. IAM-20380HT Block Diagram

OVERVIEWThe IAM-20380HT is comprised of the following key blocks and functions:
•
•
•
•
•
•
•
•
•
•
•

Three-axis MEMS rate gyroscope sensor with 16-bit ADCs and signal conditioning
Primary I2C and SPI serial communications interfaces
Self-Test
Clocking
Sensor Data Registers
FIFO
Two independent Interrupts
Digital-Output Temperature Sensor
Bias and LDOs
Charge Pump
Standard Power Modes

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IAM-20380HT
THREE-AXIS MEMS GYROSCOPE WITH 16-BIT ADCS AND SIGNAL CONDITIONINGThe IAM-20380HT consists of three independent vibratory MEMS rate gyroscopes, which detect rotation about the X-, Y-,
and Z- Axes. When the gyros are rotated about any of the sense axes, the Coriolis Effect causes a vibration that is detectedby a capacitive pickoff. The resulting signal is amplified, demodulated, and filtered to produce a voltage that is proportional
to the angular rate. This voltage is digitized using individual on-chip 16-bit Analog-to-Digital Converters (ADCs) to sample
each axis. The full-scale range of the gyro sensors may be digitally programmed to ±250, ±500, ±1000, or ±2000 degrees per
second (dps). The ADC sample rate is programmable from 8,000 samples per second, down to 3.9 samples per second, anduser-selectable low-pass filters enable a wide range of cut-off frequencies.

I2C AND SPI SERIAL COMMUNICATIONS INTERFACESThe IAM-20380HT communicates to a system processor using either a SPI or an I2C serial interface. The IAM-20380HT
always acts as a slave when communicating to the system processor. The LSB of the I2C slave address is set by pin 4 (SA0).
IAM-20380HT Solution Using I2C Interface
In Figure 6, the system processor is an I2C master to the IAM-20380HT.

Figure 6. IAM-20380HT Solution Using I2C Interface

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IAM-20380HT
IAM-20380HT Solution Using SPI Interface
In Figure 7, the system processor is an SPI master to the IAM-20380HT. Pins 2, 3, 4, and 5 are used to support the SPC, SDI,
SDO, and CS signals for SPI communications.

Figure 7. IAM-20380HT Solution Using SPI Interface

SELF-TEST
Self-test allows for the testing of the mechanical and electrical portions of the sensors. The self-test for each measurement
axis can be activated by means of the gyroscope self-test registers (registers 27).
When the self-test is activated, the electronics cause the sensors to be actuated and produce an output signal. The output
signal is used to observe the self-test response.
The self-test response is defined as follows:
SELF-TEST RESPONSE = SENSOR OUTPUT WITH SELF-TEST ENABLED – SENSOR OUTPUT WITH SELF-TEST DISABLED
When the value of the self-test response is within the specified min/max limits of the product specification, the part has
passed self-test. When the self-test response exceeds the min/max values, the part is deemed to have failed self-test.

CLOCKING
The IAM-20380HT has a flexible clocking scheme, allowing a variety of internal clock sources to be used for the internal
synchronous circuitry. This synchronous circuitry includes the signal conditioning and ADCs, and various control circuits andregisters. An on-chip PLL provides flexibility in the allowable inputs for generating this clock.
Allowable internal sources for generating the internal clock are:a) An internal relaxation oscillatorb) Auto-select between internal relaxation oscillator and gyroscope MEMS oscillator to use the best available source
The only setting supporting specified performance in all modes is option b). It is recommended that option b) be used.

SENSOR DATA REGISTERS
The sensor data registers contain the latest gyroscope and temperature measurement data. They are read-only registers
and are accessed via the serial interface. Data from these registers may be read anytime.

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IAM-20380HTFIFOThe IAM-20380HT contains a 4096-byte FIFO register that is accessible via the Serial Interface. The FIFO configuration
register determines which data are written into the FIFO. Possible choices include gyro data, temperature readings, andFSYNC input. A FIFO counter keeps track of how many bytes of valid data are contained in the FIFO. The FIFO register
supports burst reads. The interrupt function may be used to determine when new data are available.

INTERRUPTS
Interrupt functionality is configured via the Interrupt Configuration register. Items that are configurable include the INT pin
configuration, the interrupt latching and clearing method, and triggers for the interrupt. Items that can trigger an interrupt
are new data are available to be read (from the FIFO and Data registers), FIFO overflow. The interrupt status can be readfrom the Interrupt Status register.

DIGITAL-OUTPUT TEMPERATURE SENSOR
An on-chip temperature sensor and ADC are used to measure the IAM-20380HT die temperature. The readings from the
ADC can be read from the FIFO or the Sensor Data registers.

BIAS AND LDOS
The bias and LDO section generates the internal supply and the reference voltages and currents required by the IAM20380HT. Its two inputs are an unregulated VDD and a VDDIO logic reference supply voltage. The LDO output is bypassed bya capacitor at REGOUT. For further details on the capacitor, please refer to the Bill of Materials for External Components.

CHARGE PUMP
An on-chip charge pump generates the high voltage required for the MEMS oscillator.

STANDARD POWER MODES
Table 11 lists the user-accessible power modes for IAM-20380HT.
MODE
1
2
3
4

NAME

GYRO
Off
Drive OnOn
Duty-Cycled

Sleep Mode
Standby Mode
Low-Noise Mode
Low-Power Mode

Table 11. Standard Power Modes for IAM-20380HT
Notes:
1.

Power consumption for individual modes can be found in section 3.2.1.

SENSOR INITIALIZATION AND BASIC CONFIGURATIONThe basic configuration of the IAM-20380HT includes the following steps:• Power-up sequence• Sensor initialization and clock source selection• Digital interface access test
• Output data rate (i.e. sampling frequency) selection• Full scale range selection• Filter frequency selection• Power mode selection
Power-up sequence
When applying VDD, the power voltage ramp is detected and a power-on-reset sequence is triggered inside thecomponent. During this phase the device starts operating and internal logic levels are defined. For proper component
initialization the power-up should be performed with both CS and SCL/SPC low, ensuring that CS and SCL pins are not in anDocument Number: DS-000521
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IAM-20380HT
undetermined state during the VDD ramp. If starting in I2C mode (CS at logic high), power-up should be performed with
SCL/SPC low. Power-up with SCL/SPC high is not a supported case and must be avoided.
It is worth noting that if the I/O pins (e.g. CS, SCL/SPC) are between VIL and VIH when the power-on-reset sequence istriggered, their value is undetermined and the internal logic levels may not be properly defined. It should also be noted that
VIL and VIH are related to VDDIO and their value changes at power-up according to the applied VDDIO voltage ramp.
Power-up sequences that do not respect the conditions above may not lead to proper digital interface initialization. In thiscase a preliminary soft reset operation (PWR_MGMT_1 register set 0x81) must be performed to reset the digital interface,
as soon as both VDD and VDDIO are stable at their final voltage. Since the digital interface may not be properly initialized, thedevice may not provide the acknowledge signal if the I2C protocol is used.
Sensor Initialization and Clock Source Selection
When power-up sequence is completed (as per section 4.17.1), a soft reset is required to initialize the sensor and let theIAM-20380HT select the best clock source. The soft reset must be performed by setting the register PWR_MGMT_1(address 0x6B) to 0x81 (see section 9.22), prior to registers initialization.
Soft reset must be performed as first operation after the power-up sequence to ensure the proper component registers
setting.
Correct WHO_AM_I value is ensured only after the soft reset has been completed.
Digital interface access test
When soft reset is completed, make sure the component registers access can be done as expected. WHO_AM_I (address0x75) register can be used for this purpose to verify the identity of the device.
Output Data Rate Selection
To set the output data rate (ODR) to the desired frequency, select the sample rate divider by setting the register SMPLRT_DIV(address 0x19) to the desired value (see section 0). For instance, to set the output data rate to 100 Hz, write 0x09 into
SMPLRT_DIV.
Full-Scale Range Selection
To set the FSR of the gyroscope, set the register GYRO_CONFIG (address 0x1B) to the desired value (see section 9.10). For
instance, to set the FSR of the gyroscope to 250 dps, write 0x00 into GYRO_CONFIG.
Filter Selection
To set the corner frequency of the DLPF of the gyroscope, set the register CONFIG (address 0x1A) to the desired value (seesection 0). For instance, to set the corner frequency of the DLPF of the gyroscope to 10 Hz, write 0x05 into CONFIG.
Power mode selection
To set desired power modes for IAM-20380HT (see section 4.16).

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IAM-20380HT
5PROGRAMMABLE INTERRUPTS

The IAM-20380HT has a programmable interrupt system which can generate an interrupt signal on the INT pin. Status flags
indicate the source of an interrupt. Interrupt sources may be enabled and disabled individually.
INTERRUPT NAMEFIFO Overflow
Data Ready

MODULE
FIFO
Sensor Registers

Table 12. Table of Interrupt Sources

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IAM-20380HT
6

DIGITAL INTERFACEI2C AND SPI SERIAL INTERFACES

The internal registers and memory of the IAM-20380HT can be accessed using either I2C at 400 kHz or SPI at 8 MHz. SPI
operates in four-wire mode.
PIN NUMBER
1

PIN NAME
VDDIOPIN DESCRIPTION
Digital I/O supply voltage.

4
2
3

SA0 / SDO
SCL / SPCSDA / SDII2C Slave Address LSB (SA0); SPI serial data output (SDO)
I2C serial clock (SCL); SPI serial clock (SPC)
I2C serial data (SDA); SPI serial data input (SDI)
Table 13. Serial Interface

Note: To prevent switching into I2C mode when using SPI, the I2C interface should be disabled by setting the I2C_IF_DIS configuration bit. Setting this bit
should be performed immediately after waiting for the time specified by the “Start-Up Time for Register Read/Write” in section 3.2.2.

For further information regarding the I2C_IF_DIS bit, please refer to sections 8 and 9 of this document.

I2C INTERFACEI2C is a two-wire interface comprised of the signals serial data (SDA) and serial clock (SCL). In general, the lines are opendrain and bi-directional. In a generalized I2C interface implementation, attached devices can be a master or a slave. The
master device puts the slave address on the bus, and the slave device with the matching address acknowledges the master.
The IAM-20380HT always operates as a slave device when communicating to the system processor, which acts as themaster. SDA and SCL lines typically need pull-up resistors to VDD. The maximum bus speed is 400 kHz.
The slave address of the IAM-20380HT is b110100X which is 7 bits long. The LSB bit of the 7-bit address is determined by
the logic level on pin SA0. This allows two IAM-20380HTs to be connected to the same I2C bus. When used in thisconfiguration, the address of one of the devices should be b1101000 (pin SA0 is logic low) and the address of the othershould be b1101001 (pin SA0 is logic high).

IC COMMUNICATIONS PROTOCOLSTART (S) and STOP (P) Conditions
Communication on the I2C bus starts when the master puts the START condition (S) on the bus, which is defined as a HIGHto-LOW transition of the SDA line while SCL line is HIGH (see figure below). The bus is considered busy until the master puts
a STOP condition (P) on the bus, which is defined as a LOW to HIGH transition on the SDA line while SCL is HIGH (see Figure
8).
Additionally, the bus remains busy if a repeated START (Sr) is generated instead of a STOP condition.

SDA

SCL
S

P

START condition

STOP condition

Figure 8. START and STOP Conditions

Data Format / Acknowledge

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IAM-20380HT
I2C data bytes are defined to be 8-bits long. There is no restriction to the number of bytes transmitted per data transfer.
Each byte transferred must be followed by an acknowledge (ACK) signal. The clock for the acknowledge signal is generated
by the master, while the receiver generates the actual acknowledge signal by pulling down SDA and holding it low during
the HIGH portion of the acknowledge clock pulse.
If a slave is busy and cannot transmit or receive another byte of data until some other task has been performed, it can hold
SCL LOW, thus forcing the master into a wait state. Normal data transfer resumes when the slave is ready, and releases theclock line (refer to Figure 9).

DATA OUTPUT BY
TRANSMITTER (SDA)
not acknowledge
DATA OUTPUT BYRECEIVER (SDA)
acknowledge
SCL FROM
MASTER

1

2

8

9

clock pulse for
acknowledgement

START
condition

Figure 9. Acknowledge on the I2C Bus

Communications
After beginning communications with the START condition (S), the master sends a 7-bit slave address followed by an 8th bit,the read/write bit. The read/write bit indicates whether the master is receiving data from or is writing to the slave device.
Then, the master releases the SDA line and waits for the acknowledge signal (ACK) from the slave device. Each byte
transferred must be followed by an acknowledge bit. To acknowledge, the slave device pulls the SDA line LOW and keeps it
LOW for the high period of the SCL line. Data transmission is always terminated by the master with a STOP condition (P),thus freeing the communications line. However, the master can generate a repeated START condition (Sr), and address
another slave without first generating a STOP condition (P). A LOW to HIGH transition on the SDA line while SCL is HIGH
defines the stop condition. All SDA changes should take place when SCL is low, with the exception of start and stop
conditions.

SDA

SCL

1–7

8

9

1–7

8

9

1–7

8

9

S
START ADDRESS
condition

P
R/W

ACK

DATA

ACK

DATA

ACK

STOP
condition

Figure 10. Complete I2C Data Transfer

To write the internal IAM-20380HT registers, the master transmits the start condition (S), followed by the I 2C address andthe write bit (0). At the 9th clock cycle (when the clock is high), the IAM-20380HT acknowledges the transfer. Then themaster puts the register address (RA) on the bus. After the IAM-20380HT acknowledges the reception of the register
address, the master puts the register data onto the bus. This is followed by the ACK signal, and data transfer may be

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IAM-20380HT
concluded by the stop condition (P). To write multiple bytes after the last ACK signal, the master can continue outputting
data rather than transmitting a stop signal. In this case, the IAM-20380HT automatically increments the register address
and loads the data to the appropriate register. The following figures show single and two-byte write sequences.
Single-Byte Write Sequence
Master

S

AD+W

RA

Slave

ACK

DATA
ACK

P
ACK

Burst Write Sequence
Master

S

AD+W

RA

Slave

ACK

DATA
ACK

DATA
ACK

P
ACK

To read the internal IAM-20380HT registers, the master sends a start condition, followed by the I 2C address and a write bit,and then the register address that is going to be read. Upon receiving the ACK signal from the IAM-20380HT, the mastertransmits a start signal followed by the slave address and read bit. As a result, the IAM-20380HT sends an ACK signal andthe data. The communication ends with a not acknowledge (NACK) signal and a stop bit from master. The NACK condition isdefined such that the SDA line remains high at the 9th clock cycle. The following figures show single and two-byte readsequences.
Single-Byte Read Sequence
Master

S

AD+W

Slave

RA
ACK

S

AD+R

ACK

NACK
ACK

P

DATA

Burst Read Sequence
Master

S

AD+W

Slave

RA
ACK

S
ACK

AD+R

ACK
ACK

DATA

NACK
DATA

I2C TERMS
SIGNAL
S
AD
W
R
ACK
NACK
RA
DATA
P

DESCRIPTION
Start Condition: SDA goes from high to low while SCL is highSlave I2C address
Write bit (0)Read bit (1)Acknowledge: SDA line is low while the SCL line is high at the 9th clock cycle
Not-Acknowledge: SDA line stays high at the 9th clock cycle
IAM-20380HT internal register address
Transmit or received data
Stop condition: SDA going from low to high while SCL is highTable 14. I2C Terms

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PIAM-20380HTSPI INTERFACESPI is a 4-wire synchronous serial interface that uses two control lines and two data lines. The IAM-20380HT always
operates as a Slave device during standard Master-Slave SPI operation.
With respect to the Master, the Serial Clock output (SPC), the Serial Data Output (SDO) and the Serial Data Input (SDI) areshared among the Slave devices. Each SPI slave device requires its own Chip Select (CS) line from the master.
CS goes low (active) at the start of transmission and goes back high (inactive) at the end. Only one CS line is active at a time,ensuring that only one slave is selected at any given time. The CS lines of the non-selected slave devices are held high,causing their SDO lines to remain in a high-impedance (high-z) state so that they do not interfere with any active devices.
SPI Operational Features
1.
2.
3.
4.
5.

Data are delivered MSB first and LSB last
Data are latched on the rising edge of SPC
Data should be transitioned on the falling edge of SPC
The maximum frequency of SPC is 8 MHz
SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The first byte
contains the SPI Address, and the following byte(s) contain(s) the SPI data. The first bit of the first byte contains
the Read/Write bit and indicates the Read (1) or Write (0) operation. The following 7 bits contain the Register
Address. In cases of multiple-byte Read/Writes, data are two or more bytes:
SPI Address format
MSB
R/W

A6

A5

A4

A3

A2

A1

LSB
A0

D5

D4

D3

D2

D1

LSB
D0

SPI Data format
MSB
D7

6.

D6

Supports Single or Burst Read/Writes.
SPC
SDI
SDO

SPI MasterCS1

SPI Slave 1

CS

CS2

SPC
SDI
SDO
CS

SPI Slave 2

Figure 11. Typical SPI Master/Slave Configuration

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IAM-20380HT
7SERIAL INTERFACE CONSIDERATIONS
IAM-20380HT SUPPORTED INTERFACESThe IAM-20380HT supports I2C communications on its serial interface.
The IAM-20380HT’s I/O logic levels are set to be VDDIO.
Figure 12 depicts a sample circuit of IAM-20380HT. It shows the relevant logic levels and voltage connections.

Figure 12. I/O Levels and Connections

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IAM-20380HT
8REGISTER MAP

The following table lists the register map for the IAM-20380HT.
Addr
(Hex)

Addr
(Dec.)

Register Name

SerialI/F

Accessible(writable)
in Sleep
Mode

00

00

SELF_TEST_X_GYRO

R/WN

XG_ST_DATA[7:0]01

01

SELF_TEST_Y_GYRO

R/WN

YG_ST_DATA[7:0]02

02

SELF_TEST_Z_GYRO

R/WN

ZG_ST_DATA[7:0]13

19

XG_OFFS_USRH

R/W

N

X_OFFS_USR [15:8]

14

20

XG_OFFS_USRL

R/WN

X_OFFS_USR [7:0]1521

YG_OFFS_USRH

R/W

N

Y_OFFS_USR [15:8]

16

22

YG_OFFS_USRL

R/WN

Y_OFFS_USR [7:0]1723

ZG_OFFS_USRH

R/W

N

Z_OFFS_USR [15:8]

18

24

ZG_OFFS_USRL

R/WN

Z_OFFS_USR [7:0]1925

SMPLRT_DIV

R/W

N

1A

26

CONFIG

R/W

N-

FIFO_MODE

1B

27

GYRO_CONFIG

R/W

N

XG_ST

YG_ST

1D

29

FIFO_SIZE_CONFIG

R/W

N

1E

30

LP_MODE_CFG

R/W

N

GYRO_CYC
LE

23

35

FIFO_EN

R/W

N

TEMP_FIFO
_EN

36

54

FSYNC_INT

R/CN

FSYNC_INT

37

55

INT_PIN_CFG

R/WY

INT_LEVEL

38

56

INT_ENABLE

R/W

Y

3A

58

INT_STATUS

R/C

N

41

65

TEMP_OUT_H

R

N

42

66

TEMP_OUT_L

R

N

TEMP_OUT[7:0]4367GYRO_XOUT_H

R

N

GYRO_XOUT[15:8]

44

68

GYRO_XOUT_L

R

N

GYRO_XOUT[7:0]4569

GYRO_YOUT_H

R

N

GYRO_YOUT[15:8]

4670

GYRO_YOUT_L

R

N

GYRO_YOUT[7:0]4771

GYRO_ZOUT_H

R

N

GYRO_ZOUT[15:8]

48

72

GYRO_ZOUT_L

R

N

68

104

SIGNAL_PATH_RESET

R/W

N

6A

106

USER_CTRL

R/W

N

-

FIFO_EN-

I2C_IF
_DIS

-

6B

107

PWR_MGMT_1

R/W

Y

DEVICE_RE
SET

SLEEP

-

GYRO_
STANDBY

TEMP_DIS

6C

108

PWR_MGMT_2

R/W

Y

FIFO_LP_E
N

-

-

-

-

72

114

FIFO_COUNTH

R

N

73

115

FIFO_COUNTLRNFIFO_COUNT[7:0]

74

116

FIFO_R_W

R/W

N

FIFO_DATA[7:0]

75

117

WHO_AM_I

R

N

WHOAMI[7:0]

Bit7

Bit6

Bit5

Bit4

Bit3

Bit1

Bit0

SMPLRT_DIV[7:0]
EXT_SYNC_SET[2:0]
ZG_ST

DLPF_CFG[2:0]

FS_SEL [1:0]-

FIFO_SIZE[1:0]

FCHOICE_B[1:0]

G_AVGCFG[2:0]

XG_FIFO_EN

YG_FIFO_EN

ZG_FIFO_EN-

INT_RD_CLEARFSYNC_INT_L
EVEL

FSYNC
_INT_MODE_EN-

INT2_EN-

FIFO_OFLOW_EN-GDRIVE_INT_EN-

DATA_RDY_I
NT_EN

-

FIFO
_OFLOW_INT-GDRIVE_INT-

DATA_RDY_INT

INT_OPEN

LATCH_INT_EN

TEMP_OUT[15:8]

GYRO_ZOUT[7:0]
TEMP
_RST

-

-

Note: Register Names ending in _H and _L contain the high and low bytes, respectively, of an internal register value.

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FIFO
_RST

-

SIG_COND_RST

CLKSEL[2:0]
STBY_XGFIFO_COUNT[12:8]

Table 15. Register Map

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Bit2

STBY_YG

STBY_ZG

IAM-20380HTIn the detailed register tables, register names are in capital letters, while register values are in capital letters and italicized.
For example, the GYRO_XOUT_H register (Register 67) contains the 8 most significant bits, GYRO_XOUT[15:8], of the 16-bit
X-Axis gyroscope measurement, GYRO_XOUT.
The reset value is 0x00 for all registers other than the registers below:•••

Self-test registers 0, 1, 2, contain pre-programmed values
Register 107, PWR_MGMT_1 = 0x01
Register 117, WHO_AM_I: (default value is reported in section 9.26)

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IAM-20380HT
9REGISTER DESCRIPTIONSThis section describes the function and contents of each register within the IAM-20380HT.
Note: The device will come up in 3-axis Low-Noise Mode upon power-up.

REGISTERS 0 TO 2 – GYROSCOPE SELF-TEST REGISTERS
Register Name: SELF_TEST_X_GYRO, SELF_TEST_Y_GYRO, SELF_TEST_Z_GYRO
Type: READ/WRITE
Register Address: 00, 01, 02 (Decimal); 00, 01, 02 (Hex)REGISTER

BIT

NAME

SELF_TEST_X_GYRO[7:0]

XG_ST_DATA[7:0]

SELF_TEST_Y_GYRO[7:0]

YG_ST_DATA[7:0]

SELF_TEST_Z_GYRO[7:0]

ZG_ST_DATA[7:0]

FUNCTION
The value in this register indicates the self-test output generated
during manufacturing tests. This value is to be used to checkagainst subsequent self-test outputs performed by the end user.
The value in this register indicates the self-test output generated
during manufacturing tests. This value is to be used to checkagainst subsequent self-test outputs performed by the end user.
The value in this register indicates the self-test output generated
during manufacturing tests. This value is to be used to checkagainst subsequent self-test outputs performed by the end user.

The equation to convert self-test codes in OTP to factory self-test measurement is:

ST _ OTP = ( 2620 / 2 FS ) * 1.01( ST _ code−1) (lsb)
where ST_OTP is the value that is stored in OTP of the device, FS is the Full Scale value, and ST_code is based on the SelfTest value (ST_ FAC) determined in InvenSense’s factory final test and calculated based on the following equation:

ST _ code = round (log( ST _ FAC /( 2620 / 2 FS ))) +1
log(1.01)

REGISTER 19 – GYRO OFFSET ADJUSTMENT REGISTER
Register Name: XG_OFFS_USRH
Register Type: READ/WRITE
Register Address: 19 (Decimal); 13 (Hex)
BIT
[7:0]

NAME
X_OFFS_USR[15:8]

FUNCTION
Bits 15 to 8 of the 16-bit offset of X gyroscope (2’s complement). This register isused to remove DC bias from the sensor output. The value in this register isadded to the gyroscope sensor value before going into the sensor register.

REGISTER 20 – GYRO OFFSET ADJUSTMENT REGISTER
Register Name: XG_OFFS_USRLRegister Type: READ/WRITE
Register Address: 20 (Decimal); 14 (Hex)
BIT

NAME

[7:0]

X_OFFS_USR[7:0]

Document Number: DS-000521
Revision: 1.0

FUNCTION
Bits 7 to 0 of the 16-bit offset of X gyroscope (2’s complement). This register isused to remove DC bias from the sensor output. The value in this register isadded to the gyroscope sensor value before going into the sensor register.

Page 31 of 49

IAM-20380HTREGISTER 21 – GYRO OFFSET ADJUSTMENT REGISTER
Register Name: YG_OFFS_USRH
Register Type: READ/WRITE
Register Address: 21 (Decimal); 15 (Hex)
BIT
[7:0]

NAME
Y_OFFS_USR[15:8]

FUNCTION
Bits 15 to 8 of the 16-bit offset of Y gyroscope (2’s complement). This register isused to remove DC bias from the sensor output. The value in this register isadded to the gyroscope sensor value before going into the sensor register.

REGISTER 22 – GYRO OFFSET ADJUSTMENT REGISTER
Register Name: YG_OFFS_USRLRegister Type: READ/WRITE
Register Address: 22 (Decimal); 16 (Hex)
BIT

NAME

[7:0]

Y_OFFS_USR[7:0]

FUNCTION
Bits 7 to 0 of the 16-bit offset of Y gyroscope (2’s complement). This register isused to remove DC bias from the sensor output. The value in this register isadded to the gyroscope sensor value before going into the sensor register.

REGISTER 23 – GYRO OFFSET ADJUSTMENT REGISTER
Register Name: ZG_OFFS_USRH
Register Type: READ/WRITE
Register Address: 23 (Decimal); 17 (Hex)
BIT
[7:0]

NAME
Z_OFFS_USR[15:8]

FUNCTION
Bits 15 to 8 of the 16-bit offset of Z gyroscope (2’s complement). This register isused to remove DC bias from the sensor output. The value in this register isadded to the gyroscope sensor value before going into the sensor register.

REGISTER 24 – GYRO OFFSET ADJUSTMENT REGISTER
Register Name: ZG_OFFS_USRLRegister Type: READ/WRITE
Register Address: 24 (Decimal); 18 (Hex)
BIT

NAME

[7:0]

Z_OFFS_USR[7:0]

Document Number: DS-000521
Revision: 1.0

FUNCTION
Bits 7 to 0 of the 16-bit offset of Z gyroscope (2’s complement). This register isused to remove DC bias from the sensor output. The value in this register isadded to the gyroscope sensor value before going into the sensor register.

Page 32 of 49

IAM-20380HTREGISTER 25 – SAMPLE RATE DIVIDER
Register Name: SMPLRT_DIV
Register Type: READ/WRITE
Register Address: 25 (Decimal); 19 (Hex)
BIT
[7:0]

NAME
SMPLRT_DIV[7:0]

FUNCTION
Divides the internal sample rate (see register CONFIG) to generate the sample rate that
controls sensor data output rate, FIFO sample rate.
Note: This register is only effective when FCHOICE_B register bits are 2’b00, and (0 < DLPF_CFG < 7).

This is the update rate of the sensor register:
SAMPLE_RATE = INTERNAL_SAMPLE_RATE / (1 + SMPLRT_DIV)
Where INTERNAL_SAMPLE_RATE = 1 kHz

REGISTER 26 – CONFIGURATION
Register Name: CONFIG
Register Type: READ/WRITE
Register Address: 26 (Decimal); 1A (Hex)
BIT
[7]
[6]

NAME
FIFO_MODE[5:3]

EXT_SYNC_SET[2:0]

FUNCTION
Always set to 0
When set to ‘1’, when the FIFO is full, additional writes will not be written to FIFO.
When set to ‘0’, when the FIFO is full, additional writes will be written to the FIFO, replacing
the oldest data.
Enables the FSYNC pin data to be sampled.
EXT_SYNC_SET
0
1
2
3
4
5
6
7

[2:0]

DLPF_CFG[2:0]

FSYNC bit location
function disabled
TEMP_OUT_L[0]GYRO_XOUT_L[0]GYRO_YOUT_L[0]GYRO_ZOUT_L[0]
RESERVEDRESERVEDRESERVEDFSYNC will be latched to capture short strobes. This will be done such that if FSYNC toggles,
the latched value toggles, but won’t toggle again until the new latched value is captured by
the sample rate strobe.
For the DLPF to be used, FCHOICE_B[1:0] is 2’b00.
See Table 16.

The DLPF is configured by DLPF_CFG, when FCHOICE_B [1:0] = 2b’00. The gyroscope and temperature sensor are filteredaccording to the value of DLPF_CFG and FCHOICE_B as shown in Table 16.

Document Number: DS-000521
Revision: 1.0

Page 33 of 49

IAM-20380HTFCHOICE_B

Temperature
SensorGyroscope
DLPF_CFG

<1>

<0>

X
1
0
0
0
0
0
0
0
0

1
0
0
0
0
0
0
0
0
0

X
X
0
1
2
3
4
5
6
7

3-dB BW(Hz)

Noise BW
(Hz)

Rate
(kHz)

8173
3281
250
176
92
41
20
10
5
3281

8595.132

3451.0
306.6
177.0
108.6
59.0
30.5
15.6
8.0
3451.0

32
8
1
1
1
1
1
1
8

3-dB BW (Hz)
4000
4000
4000
188
98
42
20
10
5
4000

Table 16. Gyroscope and Temperature Sensor Data Rates and Bandwidths (Low-Noise Mode)

REGISTER 27 – GYROSCOPE CONFIGURATION
Register Name: GYRO_CONFIG
Register Type: READ/WRITE
Register Address: 27 (Decimal); 1B (Hex)
BIT
[7]
[6]
[5]

XG_ST
YG_ST
ZG_ST

NAME

[4:3]

FS_SEL[1:0]

[2]
[1:0]

FCHOICE_B[1:0]

FUNCTIONX Gyro self-test
Y Gyro self-test
Z Gyro self-test
Gyro Full Scale Select:
00 = ±250 dps
01= ±500 dps
10 = ±1000 dps
11 = ±2000 dps
Reserved
Used to bypass DLPF as shown in Table 16 above.

REGISTER 29 – FIFO SIZE CONFIGURATION
Register Name: FIFO_SIZE_CONFIG
Register Type: READ/WRITE
Register Address: 29 (Decimal); 1D (Hex)
BIT

NAME

[7:6]

FIFO_SIZE[1:0]

[5:0]

-

Document Number: DS-000521
Revision: 1.0

FUNCTION
Specifies FIFO size according to the following:
0 = 512 Byte
1 = 1 kByte
2 = 2 kByte
3 = 4 kByte
RESERVED

Page 34 of 49

IAM-20380HTREGISTER 30 – LOW POWER MODE CONFIGURATION
Register Name: LP_MODE_CFG
Register Type: READ/WRITE
Register Address: 30 (Decimal); 1E (Hex)
BIT

NAME

[7]

GYRO_CYCLE 1[6:4]

G_AVGCFG[2:0]

[3:0]

-

FUNCTION
When set to ‘1’ gyroscope or 3-axis are duty-cycled. Default setting is‘0’
Gyroscope averaging filter settings when GYRO_CYCLE is set to ‘1’.
Default setting is ‘000’

RESERVED

To reduce gyroscope power consumption, GYRO_CYCLE should be set to ‘1'. When GYRO_CYCLE is set to '1' gyroscope isduty-cycled and performance are reduced compared to Low-Noise mode. When GYRO_CYCLE is set to '1' gyroscope filter
configuration is determined by G_AVGCFG[2:0] that sets the averaging filter configuration, gyroscope filter is notdependent on DLPF_CFG[2:0]. Table 17 shows some example configurations when GYRO_CYCLE is set to '1'.
FCHOICE_B
G_AVGCFG
AveragesTon (ms)
Noise BW (Hz)Noise (dps rms) TYP 1
Based on 0.008 dps/Hz
SMPLRT_DIVODR (Hz)
255
3.9
99
10.0
64
15.4
32
30.3
19
50.0
9
100.0
7
125.0
4
200.0
3
250.0
2
333.3
1
500.0

0
0
1x
1.73
650.8

0
1
2x
2.23
407.1

0
2
4x
3.23
224.2

0
3
8x
5.23
117.4

0
4
16x
9.23
60.2

0
5
32x
17.23
30.6

0
6
64x
33.23
15.6

0
7
128x
65.23
8.0

0.20

0.16

0.12

0.09

0.06

0.04

0.03

0.02

1.3
1.3
1.4
1.4
1.5
1.7
1.8
2.1
2.3
2.6

Current Consumption (mA) TYP 1
1.3
1.3
1.4
1.4
1.4
1.4
1.5
1.6
1.4
1.5
1.6
1.8
1.5
1.6
1.8
2.2
1.6
1.8
2.1
2.8
1.9
2.2
3.0
2.0
2.5
2.5
N/A
2.7
N/A
N/A

1.5
1.9
2.2

1.8
2.5
N/A

1.3
1.3
1.4
1.4
1.5
1.6
1.7
1.9
2.1
2.3
2.9

Table 17. Example Configurations for Gyroscope when GYRO_CYCLE = 1
Notes:
1.

Not tested in production, not guaranteed

Document Number: DS-000521
Revision: 1.0

Page 35 of 49

N/A
N/A
N/A

IAM-20380HTREGISTER 35 – FIFO ENABLE
Register Name: FIFO_EN
Register Type: READ/WRITE
Register Address: 35 (Decimal); 23 (Hex)
BIT

NAME

[7]

TEMP_FIFO_EN[6]

XG_FIFO_EN[5]

YG_FIFO_EN

FUNCTION
1 – Write TEMP_OUT_H and TEMP_OUT_L to the FIFO at the sample rate; If enabled,buffering of data occurs even if data path is in standby.
0 – Function is disabled.
1 – Write GYRO_XOUT_H and GYRO_XOUT_L to the FIFO at the sample rate; If enabled,buffering of data occurs even if data path is in standby.
0 – Function is disabled.
1 – Write GYRO_YOUT_H and GYRO_YOUT_L to the FIFO at the sample rate; If enabled,buffering of data occurs even if data path is in standby.
0 – Function is disabled.
Note: Enabling any one of the bits corresponding to the Gyros or Temp data paths, data are buffered into
the FIFO even though that data path is not enabled.

[4]

ZG_FIFO_EN

[3:0]

-

1 – Write GYRO_ZOUT_H and GYRO_ZOUT_L to the FIFO at the sample rate; If enabled,buffering of data occurs even if data path is in standby.
0 – Function is disabled
Reserved.

REGISTER 54 – FSYNC INTERRUPT STATUS
Register Name: FSYNC_INTRegister Type: READ to CLEAR
Register Address: 54 (Decimal); 36 (Hex)
BIT
[7]

NAME
FSYNC_INTDocument Number: DS-000521
Revision: 1.0

FUNCTION
This bit automatically sets to 1 when a FSYNC interrupt has been generated. The bit
clears to 0 after the register has been read.

Page 36 of 49

IAM-20380HTREGISTER 55 – INT/INT2 PIN / BYPASS ENABLE CONFIGURATION
Register Name: INT_PIN_CFG
Register Type: READ/WRITE
Register Address: 55 (Decimal); 37 (Hex)
BIT

NAME

[7]

INT_LEVEL[6]

INT_OPEN[5]LATCH_INT_EN[4]

INT_RD_CLEAR[3]FSYNC_INT_LEVEL[2]

FSYNC_INT_MODE_EN

[1]

-

[0]

INT2_ENFUNCTION
1 – The logic level for INT/INT2 pin is active low.
0 – The logic level for INT/INT2 pin is active high.
1 – INT/INT2 pin is configured as open drain.
0 – INT/INT2 pin is configured as push-pull.
1 – INT/INT2 pin level held until interrupt status is cleared.
0 – INT/INT2 pin indicates interrupt pulse’s width is 50 µs.
1 – Interrupt status is cleared if any read operation is performed.
0 – Interrupt status is cleared only by reading INT_STATUS register
1 – The logic level for the FSYNC pin as an interrupt is active low.
0 – The logic level for the FSYNC pin as an interrupt is active high.
When this bit is equal to 1, the FSYNC pin will trigger an interrupt when it transitions to
the level specified by FSYNC_INT_LEVEL. When this bit is equal to 0, the FSYNC pin isdisabled from causing an interrupt.
Reserved.
When INT2_EN = 0, all of the interrupts appear on the INT pin, and INT2 interrupt pin isunused. When INT2_EN = 1, all interrupts except for data ready appear on the INT2 pin,and data ready interrupt appears on the INT interrupt pin.

REGISTER 56 – INTERRUPT ENABLE
Register Name: INT_ENABLE
Register Type: READ/WRITE
Register Address: 56 (Decimal); 38 (Hex)
BIT

NAME

[7:5]

-

[4]

FIFO_OFLOW_EN

[3]
[2]
[1]
[0]

GDRIVE_INT_EN
DATA_RDY_INT_EN

FUNCTION
Reserved
1 – Enables a FIFO buffer overflow to generate an interrupt.
0 – Function is disabled.
Reserved.
Gyroscope Drive System Ready interrupt enable.
Reserved.
Data ready interrupt enable.

Data ready interrupt is always generated on INT pin. All the other interrupts signals are generated on INT pin if INT2_EN bit
is set to 0 or on INT2 pin if INT2_EN bit is set to 1.

Document Number: DS-000521
Revision: 1.0

Page 37 of 49

IAM-20380HTREGISTER 58 – INTERRUPT STATUS
Register Name: INT_STATUS
Register Type: READ to CLEAR
Register Address: 58 (Decimal); 3A (Hex)
BIT
[7:5]

NAME
-

[4]

FIFO_OFLOW_INT

[3]
[2]
[1]

GDRIVE_INT-[0]

DATA_RDY_INT

FUNCTION
Reserved
This bit automatically sets to 1 when a FIFO buffer overflow has been generated. The bit
clears to 0 after the register has been read.
Reserved.
Gyroscope Drive System Ready interrupt
Reserved.
This bit automatically sets to 1 when a Data Ready interrupt is generated. The bit clears
to 0 after the register has been read.

REGISTERS 65 AND 66 – TEMPERATURE MEASUREMENT
Register Name: TEMP_OUT_H
Register Type: READ only
Register Address: 65 (Decimal); 41 (Hex)
BIT
[7:0]

NAME
TEMP_OUT[15:8]

FUNCTION
High byte of the temperature sensor output.

Register Name: TEMP_OUT_L
Register Type: READ only
Register Address: 66 (Decimal); 42 (Hex)
BIT

NAME

[7:0]

TEMP_OUT[7:0]

FUNCTION
Low byte of the temperature sensor output
TEMP_degC= ((TEMP_OUT –RoomTemp_Offset)/Temp_Sensitivity) + 25degC

REGISTERS 67 TO 72 – GYROSCOPE MEASUREMENTS
Register Name: GYRO_XOUT_H
Register Type: READ only
Register Address: 67 (Decimal); 43 (Hex)
BIT
[7:0]

NAME
GYRO_XOUT[15:8]

FUNCTION
High byte of the X-Axis gyroscope output.

Register Name: GYRO_XOUT_L
Register Type: READ only
Register Address: 68 (Decimal); 44 (Hex)
BIT

NAME

[7:0]

GYRO_XOUT[7:0]

FUNCTION
Low byte of the X-Axis gyroscope output.
GYRO_XOUT =NominalConditions

Gyro_Sensitivity * X_angular_rate
FS_SEL = 0
Gyro_Sensitivity = 131 LSB/(dps)Register Name: GYRO_YOUT_H
Register Type: READ only
Register Address: 69 (Decimal); 45 (Hex)Document Number: DS-000521
Revision: 1.0

Page 38 of 49

IAM-20380HT
BIT
[7:0]

NAME
GYRO_YOUT[15:8]

FUNCTION
High byte of the Y-Axis gyroscope output.

Register Name: GYRO_YOUT_L
Register Type: READ only
Register Address: 70 (Decimal); 46 (Hex)
BIT

NAME

[7:0]

GYRO_YOUT[7:0]

FUNCTION
Low byte of the Y-Axis gyroscope output.
GYRO_YOUT =NominalConditions

Gyro_Sensitivity * Y_angular_rate
FS_SEL = 0
Gyro_Sensitivity = 131 LSB/(dps)Register Name: GYRO_ZOUT_H
Register Type: READ only
Register Address: 71 (Decimal); 47 (Hex)
BIT

NAME

[7:0]

GYRO_ZOUT[15:8]

FUNCTION
High byte of the Z-Axis gyroscope output.

Register Name: GYRO_ZOUT_L
Register Type: READ only
Register Address: 72 (Decimal); 48 (Hex)
BIT

NAME

[7:0]

GYRO_ZOUT[7:0]

FUNCTION
Low byte of the Z-Axis gyroscope output.
GYRO_ZOUT =Gyro_Sensitivity * Z_angular_rate

NominalConditions

FS_SEL = 0
Gyro_Sensitivity = 131 LSB/(dps)

REGISTER 104 – SIGNAL PATH RESETRegister Name: SIGNAL_PATH_RESETRegister Type: READ/WRITE
Register Address: 104 (Decimal); 68 (Hex)
BIT
[7:1]

NAME

-

[0]

TEMP_RST

Document Number: DS-000521
Revision: 1.0

FUNCTION
Reserved.
Reset temp digital signal path.
Note: Sensor registers are not cleared. Use SIG_COND_RST to clear sensor registers.

Page 39 of 49

IAM-20380HTREGISTER 106 – USER CONTROL
Register Name: USER_CTRL
Register Type: READ/WRITE
Register Address: 106 (Decimal); 6A (Hex)
BIT
[7]

NAME

-

[6]

FIFO_EN

[5]
[4]
[3]

I2C_IF_DIS[2]

FIFO_RST

[1]

-

[0]

SIG_COND_RST-

FUNCTION
Reserved.
1 – Enable FIFO operation mode.
0 – Disable FIFO access from serial interface. To disable FIFO writes by DMA, use FIFO_EN
register.
Reserved.
1 – Disable I2C Slave module and put the serial interface in SPI mode only.
Reserved.
1 – Reset FIFO module. Reset is asynchronous. This bit auto clears after one clock cycle of theinternal 20 MHz clock.
Reserved.
1 – Reset all gyro digital signal path and temp digital signal path. This bit also clears all the
sensor registers.

REGISTER 107 – POWER MANAGEMENT 1
Register Name: PWR_MGMT_1
Register Type: READ/WRITE
Register Address: 107 (Decimal); 6B (Hex)
BIT

NAME

[7]

DEVICE_RESET

[6]
[5]

SLEEP
-

[4]

GYRO_STANDBY[3]

TEMP_DIS[2:0]

FUNCTION
1 – Reset the internal registers and restores the default settings. The bit automatically clears
to 0 once the reset is done.
When set to 1, the chip is set to sleep mode. Default setting is 0.
Reserved
When set, the gyro drive and PLL circuitry are enabled, but the sense paths are disabled. Thisis a power mode that allows quick enabling of the gyros.
When set to 1, this bit disables the temperature sensor.
Code
0
1
2
3
4
5
6
7

CLKSEL[2:0]

Clock Source
Internal 20 MHz oscillator.
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Auto selects the best available clock source – PLL if ready, else use the Internal oscillator
Internal 20 MHz oscillator.
Stops the clock and keeps timing generator in reset.

Note: The default value of CLKSEL[2:0] is 001.

REGISTER 108 – POWER MANAGEMENT 2
Register Name: PWR_MGMT_2
Register Type: READ/WRITE
Register Address: 108 (Decimal); 6C (Hex)
BIT
[7:3]

-

NAME

[2]

STBY_XG

Document Number: DS-000521
Revision: 1.0

FUNCTION
Reserved
1 – X gyro is disabled.
0 – X gyro is on.

Page 40 of 49

IAM-20380HT
BIT

NAME

[1]

STBY_YG[0]

STBY_ZGFUNCTION
1 – Y gyro is disabled.
0 – Y gyro is on.
1 – Z gyro is disabled.
0 – Z gyro is on.

REGISTERS 114 AND 115 – FIFO COUNT REGISTERS
Register Name: FIFO_COUNTH
Register Type: READ Only
Register Address: 114 (Decimal); 72 (Hex)
BIT
[7:5]

-

NAME

[4:0]

FIFO_COUNT[12:8]

FUNCTION
Reserved.
High Bits; count indicates the number of written bytes in the FIFO.
Reading this byte latches the data for both FIFO_COUNTH, and FIFO_COUNTL.

Register Name: FIFO_COUNTL
Register Type: READ Only
Register Address: 115 (Decimal); 73 (Hex)
BIT

NAME

[7:0]

FIFO_COUNT[7:0]

FUNCTION
Low Bits; count indicates the number of written bytes in the FIFO.
Note: Must read FIFO_COUNTH to latch new data for both FIFO_COUNTH and FIFO_COUNTL.

REGISTER 116 – FIFO READ WRITE
Register Name: FIFO_R_W
Register Type: READ/WRITE
Register Address: 116 (Decimal); 74 (Hex)
BIT
[7:0]

NAME
FIFO_DATA[7:0]

FUNCTION
Read/Write command provides Read or Write operation for the FIFO.

Description:
This register is used to read and write data from the FIFO buffer.
Data are written to the FIFO in order of register number (from lowest to highest). If all the FIFO enable flags (see below) areenabled, the contents of registers 59 through 72 will be written in order at the Sample Rate.
The contents of the sensor data registers (Registers 59 to 72) are written into the FIFO buffer when their corresponding
FIFO enable flags are set to 1 in FIFO_EN (Register 35).
If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is automatically set to 1. This bit is located in INT_STATUS(Register 58). When the FIFO buffer has overflowed, the oldest data will be lost and new data will be written to the FIFO
unless register 26 CONFIG, bit[6] FIFO_MODE = 1.
If the FIFO buffer is empty, reading register FIFO_DATA will return a unique value of 0xFF until new data are available.
Normal data are precluded from ever indicating 0xFF, so 0xFF gives a trustworthy indication of FIFO empty.

Document Number: DS-000521
Revision: 1.0

Page 41 of 49

IAM-20380HTREGISTER 117 – WHO AM I
Register Name: WHO_AM_I
Register Type: READ only
Register Address: 117 (Decimal); 75 (Hex)
BIT
[7:0]

NAME
WHOAMIFUNCTION
Register to indicate to user which device is being accessed.

This register is used to verify the identity of the device. The contents of WHOAMI is an 8-bit device ID. The default value ofthe register is 0xFD. This is different from the I2C address of the device as seen on the slave I2C controller by the applications
processor. The I2C address of the IAM-20380HT is 0x68 or 0x69 depending upon the value driven on AD0 pin.

Document Number: DS-000521
Revision: 1.0

Page 42 of 49

IAM-20380HT
10 ASSEMBLY
This section provides general guidelines for assembling TDK-InvenSense Micro Electro-Mechanical Systems (MEMS) gyros
packaged in LGA package.

ORIENTATION OF AXES
Figure 13 below shows the orientation of the axes of sensitivity and the polarity of rotation. Note the pin 1 identifier (•) inthe figure.

Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation

Document Number: DS-000521
Revision: 1.0

Page 43 of 49

IAM-20380HT
PACKAGE DIMENSIONS
16 Lead LGA 3x3x0.75 mm3 NiAu pad finish.

Figure 14. Package Dimensions

Document Number: DS-000521
Revision: 1.0

Page 44 of 49

IAM-20380HTDIMENSIONS IN MILLIMETERS
Total Thickness
Mold Thickness
Body Size
Lead Width
Lead Length
Lead Pitch
Lead Count
Edge Ball Center to Center
Body Center to Contact Ball
Ball Width
Ball Diameter
Ball Opening
Ball Pitch
Ball Count
Pre-Solder
Package Edge Tolerance
Mold Flatness
Coplanarity
Ball Offset (Package)
Ball Offset (Ball)
Lead Edge to Package Edge

SYMBOLS
A
A2
D
E
W
L
e
n
D1
E1
SD
SE
b

MIN
0.7
2.9
2.9
0.2
0.3

---

e1
n1
--aaa
bbb
ddd
eee
fff
M

0.05

Table 18. Package Dimensions

Document Number: DS-000521
Revision: 1.0

Page 45 of 49

NOM
0.75
0.63
3
3
0.25
0.35
0.5
16
2
1
----------------0.1
0.2
0.08----0.1

MAX
0.8
REF
3.1
3.1
0.3
0.4
BSC
BSC
BSC
BSC
BSC
---

---

0.15

IAM-20380HT
11 PART NUMBER PACKAGE MARKINGThe part number package marking for IAM-20380HT devices is summarized below:
PART NUMBER
IAM-20380HTPART NUMBER PACKAGE MARKING
IA238HT
Table 19. Part Number Package Marking

Figure 15. Part Number Package Marking

Samples with Part Number Package Marking “IA238HT E” are engineering samples and may have deviations in respect tothe specifications and functions reported in the datasheet. Engineering samples are not production-intent parts.

Document Number: DS-000521
Revision: 1.0

Page 46 of 49

IAM-20380HT
12 REFERENCE
Please refer to “InvenSense MEMS Motion Handling and Assembly Guide (AN-IVS-0002A-00)” for the following information:••

Manufacturing Recommendationso Assembly Guidelines and Recommendationso PCB Design Guidelines and Recommendationso MEMS Handling Instructionso ESD Considerations
o Reflow Specificationo Storage Specificationso Package Marking Specificationo Tape & Reel Specificationo Reel & Pizza Box Labelo Packaging
o Representative Shipping Carton Label
Complianceo Environmental Complianceo DRC Complianceo Compliance Declaration Disclaimer

Document Number: DS-000521
Revision: 1.0

Page 47 of 49

IAM-20380HT
13 REVISION HISTORYREVISION DATEREVISION

09/14/2022

Document Number: DS-000521
Revision: 1.0

1.0

DESCRIPTIONFirst release

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IAM-20380HT

https://invensense.tdk.com/longevity/

This information furnished by InvenSense, Inc. (“InvenSense”) is believed to be accurate and reliable. However, no responsibility is assumed by InvenSense
for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications are subject to change without notice.
InvenSense reserves the right to make changes to this product, including its circuits and software, in order to improve its design and/or performance, without
prior notice. InvenSense makes no warranties, neither expressed nor implied, regarding the information and specifications contained in this document.
InvenSense assumes no responsibility for any claims or damages arising from information contained in this document, or from the use of products andservices detailed therein. This includes, but is not limited to, claims or damages based on the infringement of patents, copyrights, mask work and/or otherintellectual property rights.
Certain intellectual property owned by InvenSense and described in this document is patent protected. No license is granted by implication or otherwise
under any patent or patent rights of InvenSense. This publication supersedes and replaces all information previously supplied. Trademarks that are registeredtrademarks are the property of their respective companies. InvenSense sensors should not be used or sold in the development, storage, production or
utilization of any conventional or mass-destructive weapons or for any other weapons or life threatening applications, as well as in any other life criticalapplications such as medical equipment, transportation, aerospace and nuclear instruments, undersea equipment, power plant equipment, disasterprevention and crime prevention equipment.
©2022 InvenSense. All rights reserved. InvenSense, SmartMotion, MotionProcessing, MotionProcessor, SensorStudio, UltraPrint, MotionTracking, CHIRP
Microsystems, SmartBug, SonicLink, Digital Motion Processor, AAR, and the InvenSense logo are registered trademarks of InvenSense, Inc. The TDK logo isa trademark of TDK Corporation. Other company and product names may be trademarks of the respective companies with which they are associated.

©2022 InvenSense. All rights reserved.

Document Number: DS-000521
Revision: 1.0

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