電気学会論文誌●（●●●●●●●部門誌）
IEEJ Transactions on ●●●●●●●●●●●●●●●
Vol.●● No.● pp.●-●
DOI: ●.●●/ieejeiss.●●.●

Paper
Development of AC–DC Converter with
10-V and 10,000-A Output for Sintering
Koji Orikawa＊, Student member,

Jun-ichi Itoh＊, Member(Manuscript received Jan. 00, 20XX, revised May 00, 20XX)
This paper discusses a high-efficiency AC–DC converter developed for implementation under low-voltage and high-current
conditions for sintering applications. First, the circuit configuration and the control principle for the proposed low-voltage,high-current AC–DC converter are described. The proposed system consists of four 2,500-A units of the AC–DC converter
connected in parallel. The input current harmonics are suppressed by using multiple transformers on the input side. Further,
imbalance issues in the transformer parameters and the output wiring are discussed. The proposed system demonstrates that eachindividual circuit yields a balanced 2,500-A output. In addition, loss analysis shows that the power loss on the secondary rectifieris 49% and is dominated by semiconductor loss. Furthermore, it is shown that by implementing a MOSFET synchronous rectifier,instead of a Schottky barrier diode, the loss reduces by 35%. Finally, the input current harmonics are reduced by using multiple
transformers, and the validity of this result is demonstrated.
Keywords: Sintering, low-voltage high-current, synchronous rectifier1.

not indicated.
This paper proposes a system topology wherein a 10,000-A
output current power converter, consisting of four unit outputs of
2,500 A, is connected in parallel. Each of the converters is
controlled by a full digital controller using a general purpose
microcomputer. In the proposed system, the input current
harmonics are suppressed by multiple transformers with a dioderectifier. A passive rectifier using multiple transformers has highstability and low EMI compared to an active rectifier such as a
PWM rectifier. In addition, the effect of the transformer parameter
imbalance and output wiring will be discussed. As a result, it iseasy to increase the output current by increasing the number ofparallel units.
First, the circuit configuration of the proposed system and thefundamental operation for the low-voltage high-current AC-DC
converter are described in this paper. Second, the response of the
feedback output current control with different output-side wiring
inductances is investigated. Next, the balance effect of the current
in the parallel output transformer is investigated. Then, theoperation characteristics are confirmed though experiments. In
addition, in order to increase the efficiency, the reduction of thepower loss on the secondary side rectifier by implementing a
MOSFET synchronous rectifier is investigated. Finally, the effectof multiple transformers is discussed using simulation based on
experimental results.

Introduction

Sintering is a technique that creates contacts and bonds between
particles by heating molded powder material below its melting
point. One of the sintering methods used for powder materials isknown as the “pulse method”. In this method, a pulse voltage isdirectly applied to the molded powder material and the surface ofthe powder is excited. Then, the heating and sintering is repeated.
In this process, the pulse voltage requires a low-voltage andhigh-current DC power supply. However, a conventional circuitcomposed of a thyristor rectifier has low efficiency and input
power factor of approximately 60% and 40%, respectively [1].
Therefore, the power capacity and the weight of the system areincreased.
On the other hand, AC-DC power converters using high-speed
power semiconductors, such as IGBT and MOSFET, have been
proposed for application in sintering power systems in order toimprove the efficiency and also reduce the size [2-5]. In Ref [5], aprototype model with an output of 5,000 A with low power has
been verified. The prototype model consists of two unit outputs of
2,500 A connected in parallel. The operation characteristics, theinput power factor, the efficiency, and the loss distribution havebeen evaluated. However, the circuit was controlled using fullanalog control circuits. In analog control, it is difficult to extend
the existing parallel connection in order to obtain higher current
because the circuit parameters in one unit do not agree with thecircuit parameters in the other unit. That is, an imbalance occurs ineach unit. Also, the operation sequence and protection
management in analog control become complicated in parallelsystems. In addition, in past work, there has been no discussion on
the imbalance of transformer parameters and inductance wiring on
the output side. The input current harmonic reduction methods are

2.

2.1 Features
Fig. 1 shows the circuit configuration of
the proposed system. This circuit can output 10,000 A due to thefour 2,500 A units connected in parallel. The grid three-phasevoltage of 200 V is converted into the input voltage of the inverterby using a diode rectifier, a DC reactor, and smoothing capacitors.
In addition, multiple transformers are connected to the input of thediode rectifier in order to reduce the harmonic components fromthe input grid current and also to improve the power factor of the＊

Nagaoka University of Technology
1603-1 Kamitomioka-machi, Nagaoka, Niigata 940-2188, Japan© 200● The Institute of Electrical Engineers of Japan.

Circuit configuration of the proposed system1

AC–DC Converter with 10-V and 10,000-A Output (Koji Orikawa et al.)Fig. 1.

Circuit configuration of the low-voltage, high-current circuit for sintering.

grid. The connection of the secondary side of the multiple
transformers is different in each unit. In unit 1 and unit 3, eachphase winding in the secondary side is composed of two windings
x and y in series. The phase of winding y has a lead or a lag of 120
degrees with respect to the x winding. In unit 2, the secondary side
has a star-connection. In unit 4, the secondary side is adelta-connection. By designing the turn ratios of the transformers
x and y using (1) and (2), the phase of the secondary voltage in themultiple transformers is shifted by 15 degrees among each of themultiple transformers. As a result, the grid current becomes aclosed sinusoidal waveform.
x

sin15
.................................................................... (1)sin120y

sin 45................................................................... (2)sin120Fig. 2.

It should be noted that it is more effective to reduce the input
current harmonics when the number of parallel units is increased
for the multiple transformer. However, if too many units areconnected to one multiple transformer, then fabricating themultiple transformer becomes difficult because many windings are
required. That is, the multiple transformer becomes large in sizeand expensive. Between 3 to 6 parallel units are recommended forone multiple transformer.
For the inverter, 600 V/150 A IGBTs are used. The inverter isoperated by phase shift control. The high frequency transformer isconnected to the output of the inverter.
The switching frequency of the inverter was set to 15 kHz inorder to reduce the size of the transformer. Note that a long

Control diagram of the circuit.

overlapping period will occur in the switching commutation whena large leakage inductance is applied. In the prototype circuit, twotransformers with 1250 A rated current are connected in parallel toreduce the copper loss of the transformers. The output current is
controlled by operating the output voltage of the inverter. The
secondary side of the transformer is a rectifier with Schottky
barrier diodes where the reverse recovery is very small. Two diodemodules that consist of 32 diodes are connected in parallelbecause the output current is high. In addition, an RCD snubber
circuit is applied to the diodes in order to suppress a voltage surge
in the diodes due to the leakage inductance of the transformer andthe output wiring inductance.
2.2 Control strategy
Fig. 2 shows a control diagram of
2

IEEJ Trans. ●●, Vol.●●, No.●, ●●●AC–DC Converter with 10-V and 10,000-A Output (Koji Orikawa et al.)the circuit. The carrier is a 15-kHz sawtooth waveform. The gate
signals of the U-phase are always operated with a 50% duty cycle.
The gate signals of the V-phase are operated by phase shift control
and duty control. Command of the phase shift Dps is operated by
the difference between the output current command and thedetected output current. When DC magnetizing occurs in thetransformer due to the variability of the dead-time and thesaturation voltage of the switch of the inverter, the duty cycle of
the gate signals of the V-phase is controlled in order to suppress
the dc component of the transformer current. The dc component of
the transformer current is detected by the low-pass filter andcompared to zero, which is the command of the DC component of
the transformer current. Then, command of the DC magnetizing
compensation Dmc is decided by the PI controller. The control
method is calculated using a general purpose microcomputer.
2.3 Implementation of phase shift control by a general
purpose microcomputer
The conventional circuit with IGBT
has been controlled by using analog circuits, as described in Ref[5]. In this paper, full digital control is implemented by using ageneral purpose microcomputer, due to simplicity of the structureand high reliability. By introducing full digital control, detectionof the imbalance of the output current and the failure in each unit
can be easily achieved. The model of the general purpose
microcomputer used is SH7216 from Renesas, usually commence
in PWM.
Fig. 3 shows the relationship between the commands and thecarrier. In the general purpose microcomputer, one up-counter isused as the carrier. It is difficult to implement two counters withdifferent phase in the microcomputer. Therefore, instead of using
two counters, the rise and fall of the gate signal are individually bycomparing the command of the duty cycle and the command of
the dead-times Dd, Dps, and Dmc to the counter. The maximum
value of the carrier is 1. The gate signal of the U-phase is decided
by 50% of the command of the duty cycle and Dd. On the other
hand, the gate signal of the V-phase is decided also using Dps andDmc.
2.4 Design method of parameters in PI controller
Fig.
4 shows the control diagram of output current control. Feedbackof output current control can be required for each prototype circuit,if the parameters are varied for each of the prototype circuits. The
low-pass filter is used to design the parameters of the PI control,
such as proportional gain and an integral time constant. The
transfer function of the output current is described by (3). By
inserting the low-pass filter, it becomes a second-order element.

Fig. 3.

Fig. 4.

s2 

LoutTiK p  RoutLoutn
2 ....... (3)2s  2 n s   n
2

s

Kp



LoutTiwhere Kp is the proportional gain, Ti is the integral time constant,
Rout is a load resistance, Lout is an output side wiring inductance, 
is a damping factor, and n is a natural angular frequency for
output current control. Then, Kp and Ti are given by (4) and (5)K p  2 n Lout  Rout ....................................................... (4)

Ti 

Kp

n Lout
2

Control diagram of parallel operation.

Imbalance of transformer parameters andwiring inductance in output side

3.1 Variability of the wiring inductance on output side
When the units are connected in parallel, the output current
response for each of the units is different due to the variability ofthe output-side wiring inductance. In this section, using Fig. 4, theoutput current response is investigated when the circuit is operated
with two units in parallel.
Fig. 5 shows the control diagram when two units are operated inparallel. In this control diagram, Lsmall represents the small
inductance and kLsmall represents the large inductance. The
constant k is greater than 1. It is complicated to design thedamping factor of the PI controller by measuring each of theoutput-side wiring inductances. However, it is easier to designusing just one of the output-side wiring inductances than
measuring all the wiring inductances one by one. In this section,
the design method of the damping factor is clarified.
Fig. 6(a) shows the simulation results using the parameters
designed using (4) and (5) where the output inductance Lout is
Lsmall. In this section, the natural angular frequency n used is
4,000 rad/s. Note that the natural angular frequency is set based on
the specifications of the powder material. In addition, the damping
factor is set to 0.7 in order to suppress overshoot of the current
response. In Fig. 6(a), the designed value of the overshoot, which
is normalized with the output current, indicates the overshoot

Kp
I out

*
I out

Control diagram of the output current control.

Fig. 5.

3.

Relation between commands and carrier.

.................................................................... (5)3

IEEJ Trans. ●●, Vol.●●, No.●, ●●●AC–DC Converter with 10-V and 10,000-A Output (Koji Orikawa et al.)value of the response. The smallest inductance Lsmall in each unit isused to calculate the designed value. From Fig. 6(a), it isconfirmed that the overshoot of the output current of the unit witha larger inductance become larger than one using a smaller
inductance. Then, the damping factor and the overshootnormalized to the output current can be expressed by (6) and (7).

 L kLout

I out _ max
I out
s mallK p  2 Rout
2

Ti
1

 L  L .... (6)outs mallK p kLsmallk  L L
outs mall exp  
 .................................. (7)2k   L Louts mall(a)  designed with smaller inductance Lsmall.

From Eq. (6), the damping factor of the output current responsewith a larger inductance becomes k to the power of minus one halfof that with a smaller inductance. In the case wherein the damping
factor of the unit that uses Lsmall is 0.7, the damping factor ofthe unit that uses kLsmall becomes 0.495. Therefore, the overshootof the output current of the unit that uses kLsmall is increased. The
parameters of the PI control should consequently be designed
based on the largest inductance.
Fig. 6(b) shows the simulation results obtained using theparameters that were designed by a larger inductance kLsmall.
Here, k is 2. Therefore, the damping factor of the unit that uses
Lsmall is 0.99, and the damping factor of the unit that uses kLsmall
becomes 0.7. From the simulation results, it is confirmed that boththe output current responses with the smaller inductance and withthe larger inductance are within the designed value. Therefore, thedesign method of the PI control parameters should use the largest
inductance because the output side wiring inductance could be
imbalanced depending on the layout of the prototype.
3.2
Exciting inductance and the transformer current
In the prototype circuit, two transformers are connected in parallelin order to increase the output power and reduce the volume of thetransformers. If the parameters, such as the winding resistance andthe exciting inductance, are different between each transformer,
the current of the transformer can be imbalanced. The current
imbalance causes magnetic saturation and overheating of thetransformer. Therefore, in this section, the relation between the
exciting inductance and the current in the transformer is clarified.
The effective values of the exciting current and the current of
the transformer are expressed by (8) and (9), respectively. In thissection, the leakage inductance and the winding resistance of thetransformers are neglected. In addition, it is assumed that theoutput current is DC current that does not have a ripple current.

(b)  designed with larger inductance k*Lsmall.

Fig. 6.

Output current response waveforms.

Table 1.

I m _ rms
I trans _ rms

Experimental parameters.

n 2 Rout
T ....................................................... (10)4 Lm

Eq. (10) becomes 0.4% and 0.08% in the cases where Lm is 1
mH and 5 mH, respectively, under the conditions shown in Table 1.
The reason for this is high output current occurs due to the small
resistance connected in the load. As a result, the ratio of theexciting current with respect to the transformer current is verysmall. Therefore, the variability of the exciting inductance does
not cause an imbalance in the transformer current.





1 Vdc
1 Vdc  I out Rout T 
I m _ rms 
ton ......................... (8)2 Lm
2 Lm  Vdc 2 


 n


4
I
I trans _ rms  out ................................................................. (9)nExperimental verifications

4.1
Operation waveforms
Table 1 shows theexperimental conditions used. The exciting inductance of the
prototype transformers have a specific value. The rated output
voltage of the prototype circuit is 10 V. Note that metal wires areused as the test load for the prototype. The metal wire can accept
10,000 A, but the resistance is smaller than that of the actual
material in sintering. Therefore, the tested output power andvoltage are smaller than the rated power and voltage.
Fig. 7 shows the operation waveforms of two units that output

where Vdc is the input voltage of the inverter, Lm is the exciting
inductance, ton is the time of applying Vdc to the transformer, Iout isthe output current of the unit, Rout is the load resistance, n is theturn ratio of the transformer, and T is the period of the switchingfrequency. Therefore, from (8) and (9), the ratio of the exciting
current with respect to the transformer current is expressed by(10).
4

IEEJ Trans. ●●, Vol.●●, No.●, ●●●AC–DC Converter with 10-V and 10,000-A Output (Koji Orikawa et al.)2,500 A. From Fig. 7, it is confirmed that the current in eachtransformer connected in parallel is balanced even when each of
the exciting inductances is different in this experiment. Note thatthe output current was measured by the current sensor.
Fig. 8(a) shows the voltage waveforms of the inverter andSchottky barrier diode, respectively. A short pulse is confirmed
from Fig. 8(a). This short pulse is generated by the leakage
inductance of the transformer. The width of the short pulse isdecided by the discharge time of the leakage inductance.
Fig. 8(b) shows the operation waveforms when the circuit
outputs 10,000 A. Fig. 8(b) confirms that each unit outputs 2,500
A equally.
4.2 Power loss evaluation
Fig. 9 shows theexperimental results for the efficiency. The efficiency is measured
from the input power of the diode rectifier to the power of the load.
Note that the power consumption of the control circuit is notincluded. A maximum efficiency of 69.0% (Output current =10,000 A) was obtained in the experiment. The reason for this low
efficiency in the experiment is that the load uses a very small
resistance. When a small resistance is used, the output voltage
becomes small because the output current is controlled to beconstant. On the other hand, the power loss of the secondary side
rectifier, which mainly dominates the total power loss, is
proportional to the output current. Therefore, it is expected that theefficiency will be increased when the actual material is usedbecause the output voltage becomes higher than that of theexperimental condition.
Fig. 10 shows the loss analysis using the circuit simulator
Piece-wise Linear Electrical Circuit Simulation (PLECS, PleximGmbH). In particular, the power loss is calculated from theinstantaneous voltage and the instantaneous current in thesimulation circuit, based on the table of switching devices data in
the appropriate datasheet. The validity of this simulation method is
described in Ref. [8]. The simulation results agree well with theexperimental results. In the prototype, the power loss in each main
circuit cannot be measured because wiring between the converters
is short and close in order to reduce the volume. Therefore, thepower loss is discussed based on the simulation results. In thissection, the power losses include that of the diode rectifier,inverter, and Schottky barrier diodes only. The power losses of thetransformer are not considered. From the loss analysis, it isconfirmed that the power loss of the diodes in the secondary side
is 49% dominated by semiconductor loss.
In order to reduce the power losses, a synchronous MOSFET
rectifier was implemented. MOSFETs with low on-resistance wereselected and connected in parallel to reduce the conduction loss ofthe secondary side rectifier.
Fig. 11 shows the circuit configuration of the synchronousrectifier with the MOSFET and a simplified diagram of the gate
signal. The gate signals of switches S5 and S7 are synchronizedwith the gate signal Gate1 of the inverter. On the other hand, thegate signals of switches S6 and S8 are synchronized with the gate
signal Gate3 of the inverter.
Fig. 12 shows the calculation results of the loss reduction by
adopting the synchronous rectifier composed of the MOSFET(IXTZ550N055T2, 55V, 550A IXYS). The number of MOSFETs
was 12 in one device, while the number of Schottky barrier diodes
was 32 in one device. From Fig. 12, it is confirmed that the power
losses of the secondary side rectifier can be reduced by 35%
compared to the ones with the Schottky barrier diodes when theFig. 7.

Experimental waveform of the transformer
current and output current.

(a) Waveform of the inverter output voltage and the Schottky barrier
diode voltage.

(b) Waveform of the output current of each unit.

Fig. 8.

Experimental voltage and current waveform.

output current per unit is 2,500 A. As a result, the maximum
efficiency is improved to 70%. In the case of a larger resistance inthe load, the maximum efficiency will be greatly improved.
4.3
Input current evaluation and power factor
correction
The proposed system uses multiple transformers
to reduce the input current harmonics. Unfortunately, it wasdifficult to prepare multiple transformers for experiments inlaboratory tests. Instead, the effect of multiple transformers wasevaluated in simulations based on the input current waveform
obtained from experimental results.
Fig. 13 shows the voltage and current waveforms of the grid
5

IEEJ Trans. ●●, Vol.●●, No.●, ●●●AC–DC Converter with 10-V and 10,000-A Output (Koji Orikawa et al.)Fig. 9.

Fig. 10.

Experimental results for the efficiency as afunction of output current.

Fig. 12.

Loss distribution as a function of the output
current.

Loss reduction with the synchronous rectifierof MOSFET.

Fig. 13. Voltage and current waveforms of the
prototype circuit without multiple transformers.

(a) Circuit configuration of the synchronous rectifier with the MOSFET.

Fig. 14.
(b) Simplified diagram of the gate signal of the MOSFET.

Fig. 11. Circuit configuration of the synchronousrectifier and simplified diagram of the gate signal of the
MOSFET.

Simulation waveforms of the prototype circuitwith multiple transformers.

and the input of the diode bridge rectifier without connecting
multiple transformers in the experiment. From Fig. 13, it isconfirmed that the input current of the diode rectifier has a large
6

IEEJ Trans. ●●, Vol.●●, No.●, ●●●AC–DC Converter with 10-V and 10,000-A Output (Koji Orikawa et al.)distortion. Therefore, in order to suppress this large distortion of
the input current, a power factor correction circuit, such as
multiple transformers, is required in the prototype circuit.
Fig. 14 shows the simulation results with improved input power
factor. From the simulation results, it is confirmed that the input
current distortion of each unit is large. On the other hand, the input
current for the multiple transformers has low distortion. Therefore,
the simulation results confirm that multiple transformers are valid
to reduce the harmonic components in the input current. As aresult, the current in the grid has almost a sinusoidal waveform.
Fig. 15 shows the measurement and simulation results of thetotal harmonic distortion (THD) in the input current. From Fig. 15,
it is confirmed that the THD without connecting multiple
transformers is over 60%. On the other hand, the THD afterconnecting multiple transformers is improved by 90% comparedto the case without connecting multiple transformers.
Fig. 16 shows the measurement and simulation results of the
input power factor. From Fig. 16, it is confirmed that the power
factor is 0.85 when the output current of each unit is 2,300 A in theexperiment without connecting multiple transformers. On theother hand, in the region of low output current, the power factor
becomes less than 0.7 in the experiment. This is because the ratioof the reactive output power with respect to the active output
power is low. In the case of the simulation, the characteristic of thepower factor is similar to the measurement result. On the other
hand, the input power factor with multiple transformers exceeds
0.98 in the simulation. Therefore, the simulation results confirm
that multiple transformers are valid and effective to obtain a highinput power factor.

5.

(6)

(7)

(8)

(3)

(4)

(5)

Fig. 16.

Input power factor as a function of output
current.

Coupling Applied to Electric Furnace”, Power Electronics and Drives
Systems, pp.1474-1479 (2005)
Ting Qian; Wei Song; Lehman, B : “Self-Driven Synchronous Rectification
Scheme for Wide Range Application of DC/DC Converters with
Symmetrically Driven Transformers”, Power Electronics Specialists
Conference, pp.1-6 (2006)
Rodriguez, M.; Lamar, D.G.; de Azpeitia, M.A.; Prieto, R.; Sebastian, J. :“A Novel Adaptive Synchronous Rectification System for Low Output
Voltage Isolated Converters”, IEEE transaction on Industrial Electronics,
Vol. 58, No. 8, pp.3511-3520 (2011)
Y. Ohnuma, J. Itoh : “Comparison of Boost Chopper and Active Buffer as
Single to Three Phase Converter”, Energy Conversion Congress andExposition (ECCE) 2011, pp.515 -521 (2011)

Koji Orikawa(Student member) received his B.S. and M.S.
degrees in electrical, electronics and informationengineering from Nagaoka University of Technology,
Nagaoka, Japan in 2008 and 2010, respectively.
Since 2010, he has been with Nagaoka University ofTechnology as a PhD degree student in electrical andelectronics engineering. His research interests
include DC-DC converters for hybrid power source
circuits and low-voltage large-current power supplies. He is a student
member of the Institute of Electrical Engineers of Japan.

References(2)

Input current THD as a function of output
current.

Conclusions

In this study, a prototype model was developed with output of
10,000 A in order to apply middle-large power for application insintering. The prototype model consists of four units with output
of 2,500 A in parallel. The response of the feedback output current
control with different output side wiring inductances isinvestigated. It was confirmed that the damping factor should bedesigned with the largest inductance in order to suppress theovershoot current within the designed value. The experimental
results confirmed that the circuit outputs 10,000 A. The loss
analysis by simulation confirmed that the power losses of thesecondary side rectifier with a MOSFET synchronous rectifier canbe reduced by 35% compared to those with Schottky barrier
diodes. In addition, the simulation results confirmed that multiple
transformers are valid to obtain low-distortion input current.

(1)

Fig. 15.

Galloway, James H. : “Power Factor and Load Characteristics for Thyristor
Electrochemical Rectifier”, IEEE transaction on Industrial Electronics, Vol.
IA-13, No. 6, pp.607-611 (1977)
R. Nakanishi, T. Noguchi, I. Takahashi and M.Tanaka : “Development of
Parallel Operation of Low-Voltage Large-Current DC Power Supply”,
Proceedings of IEEJ National Convention, Vol.4, pp.1439 (2000)
R. Nakanishi, T. Noguchi, I. Takahashi and M.Tanaka : “Development of
Low-Voltage and High-Current DC Power Supply Featured Small-Size andHigh-efficiency”, SPC-00-61, pp.37 (2000)
K. Ishida and T. Noguchi : “Development of Low-Voltage andLarge-Current DC Power Supply with High-Frequency Transformer
Coupling”, Proceedings of IEEJ Industry Applications Society Annual
Conference, Vol.1, pp.493 (2003)
T. Noguchi, K. Nishiyama, Y. Asai and T. Matsubara : “Development of
13-V, 5000-A DC Power Supply with High-Frequency Transformer

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IEEJ Trans. ●●, Vol.●●, No.●, ●●●AC–DC Converter with 10-V and 10,000-A Output (Koji Orikawa et al.)Jun-ichi Itoh

(Member) received his M.S. and PhD degrees inelectrical and electronic systems engineering from
Nagaoka University of Technology, Nagaoka, Japan
in 1996 and 2000, respectively. From 1996 to 2004,
he was with Fuji Electric Corporate Research andDevelopment Ltd., Tokyo, Japan. Since 2004, he has
been with Nagaoka University of Technology as an
associate professor. He received the IEEJ Academic
Promotion Award (IEEJ Technical Development
Award) in 2007. His research interests include matrix converters, DC/DC
converters, power factor correction techniques and motor drives. He is amember of the Institute of Electrical Engineers of Japan.

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IEEJ Trans. ●●, Vol.●●, No.●, ●●●