CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

400G QSFP-DD PSM8 2km Optical Transceiver ModuleFeatures♦

8 channels full-duplex transceiver modules♦

Transmission data rate up to 53Gbps per channel♦

8x53Gbps PAM4 transmitter and PAM4 receiver♦

8 channels1310nm uncooled EML♦

8 channels PIN photo detector array♦

Internal CDR circuits on both receiver and transmitter channels♦

Power consumption <11W♦

Hot Pluggable QSFP DD form factor and Compliant with CMIS 4.0♦

Maximum link length of 2km G.652 SMF with KP-FEC♦

MPO16 APC connector receptacle♦

Built-in digital diagnostic functions♦

Operating case temperature 20℃ to +60℃♦

3.3V power supply voltage♦

RoHS compliant(lead free)

Applications♦IEEE 802.3bs 200GBASE-DR4Description
CA OPTRONICS GROUP CADM-SPO401-FR8C is an Eight-Channel, Pluggable, Parallel,
Fiber-Optic QSFP Double Density for 2x200 Gigabit Ethernet Applications. This transceiver is ahigh performance module for short-range multi-lane data communication and interconnection
applications. It integrates eight data lanes in each direction with 8x26.5625GBd. Each lane canoperate at 53.125Gbps up to 2km using G.652 SMF with KP-FEC. These modules are designed tooperate over single mode fiber systems using a nominal wavelength of 1310nm. The electricalinterface uses a 76 contact edge type connector. The optical interface uses a MPO16/MTP16 APC
connector. The Common Management Interface Specification (CMIS) for QSFP DD modules. This
module incorporates CA OPTRONICS GROUP proven circuit and EML technology to provide
reliable long life, high performance, and consistent service.
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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

Figure1. Module Block Diagram
2x200GBASE-DR4 QSFP DD is one kind of parallel transceiver. EML and PIN array package are
key technique, through I2C system can contact with module.

Absolute Maximum Ratings
Parameter

Symbol

Min

Max

Unit

Supply Voltage

Vcc

-0.3

3.6

V

Input Voltage

Vin-0.3

Vcc+0.3

V

Storage TemperatureTst-2085℃

Case Operating Temperature

Top2060℃

Humidity(non-condensing)

Rh

595%

Recommended Operating Conditions
Parameter

SymbolMin

TypicalMax

Unit

Supply Voltage

Vcc3.13

3.3

3.47

V

Operating Case temperature

Tca

2060℃

Data Rate Per Lane

fdHumidity

Rh

Power Dissipation

Pm

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26.5625
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GBd
85%

11W

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

Electrical Specifications
Parameter

SymbolMin

TypicalMax

Unit

Differential input impedance

Zin

90

100110ohm

Differential Output impedance

Zout

90

100110ohm

Differential input voltage amplitude

ΔVin900

mVp-p

Differential output voltage
amplitude

ΔVout900mVp-pSkew

Sw300

ps

Bit Error Rate

BER

2.4E-4-Near-end Eye Width at 10^-6probability(EW6)
Near-end Eye Height at 10^-6probability(EH6)
Far-end Eye Width at 10^-6probability(EW6)
Far-end Eye Height at 10^-6probability(EH6)
Near-end Eye Linearity

0.265

UI70

mV

0.20

UI30

mV

0.85

-Note：
1. BER=2.4E-4; PRBS31Q@26.5625GBd. Pre-FEC
2.

Differential input voltage amplitude is measured between TxnP and TxnN.

3.

Differential output voltage amplitude is measured between RxnP and RxnN.

Optical Characteristics
Table 3 - Optical Characteristics
Parameter

SymbolMin

TypicalMax

Unit

Notes

Transmitter
Centre Wavelength

λc1304.5--1317.5nm-Side-mode suppression
ratio

SMSR

30---dB-

Average launch power,
each lane

Pout-5.1

-

3dBm

-

Optical Modulation
Amplitude(OMA outer), each lane

OMA-3

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

Parameter

SymbolTransmitter and dispersion
eye closure(TDEC),eachlane

TDEC

Extinction Ratio

ERMin

3.5

TypicalMax

Unit

3.4

dB-dB--30dB-

1317.5nm--

Average launch power ofOFF
transmitter, each lane

NotesReceiverCentre WavelengthλcReceiver Sensitivity inOMA outer

RXsen

-6.6

dBm

1

Stressed Receiver
Sensitivity in OMA outer

SRS

-4.1

dBm

1

Average power atreceiver , each lane
input, each lane

Pin3dBm

-

-12

dB-

dBm

-dBm

-dB-

1304.5---8.1

Receiver Reflectance
LOS Assert-10

LOS De-Assert – OMA
LOS Hysteresis

-7.5
0.5

Note：1． Measured with conformance test signal at TP3 for BER = 2.4E-4 Pre-FEC

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

Pin Description

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

Figure2. Electrical Pin-out Details
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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

ModSelL Pin
The ModSelL is an input signal that shall be pulled to Vcc in the QSFP-DD module. When held low by
the host, the module responds to 2-wire serial communication commands. The ModSelL allows the useof multiple QSFP-DD modules on a single 2-wire interface bus. When ModSelL is “High”, the module
shall not respond to or acknowledge any 2-wire interface communication from the host.
In order to avoid conflicts, the host system shall not attempt 2-wire interface communications within theModSelL de-assert time after any QSFP-DD modules are deselected. Similarly, the host must wait atleast for the period of the ModSelL assert time before communicating with the newly selected module.
The assertion and de-asserting periods of different modules may overlap as long as the above timing
requirements are met.

ResetL Pin
The ResetL signal shall be pulled to Vcc in the module. A low level on the ResetL signal for longer thanthe minimum pulse length (t_Reset_init) initiates a complete module reset, returning all user module
settings to their default state.

LPMode Pin
LPMode is an input signal. The LPMode signal shall be pulled up to Vcc in the QSFP-DD module.
LPMode is used in the control of the module power mode. See CMIS Section 6.3.1.3.

ModPrsL Pin
ModPrsL shall be pulled up to Vcc Host on the host board and pulled low in the module. The ModPrsL isasserted “Low” when the module is inserted. The ModPrsL is deasserted “High” when the module isphysically absent from the host connector due to the pull-up resistor on the host board.

IntL Pin
IntL is an output signal. The IntL signal is an open collector output and shall be pulled to Vcc Host on thehost board. When the IntL signal is asserted Low it indicates a change in module state, a possible
module operational fault or a status critical to the host system. The host identifies the source of theinterrupt using the 2-wire serial interface. The IntL signal is deasserted “High” after all set interrupt flags
are read.

Power Supply Filtering

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

The host board should use the power supply filtering shown in Figure3.

Figure3. Host Board Power Supply Filtering

Optical Interface Lanes and Assignment
The optical interface port is a male MPO16(MTP16) APC connector.

Figure 4. Optical Receptacle and Channel Orientation

DIAGNOSTIC MONITORING INTERFACE
Digital diagnostics monitoring function is available on all CA OPTRONICS GROUP QSFP DD
products. A 2-wire serial interface provides user to contact with module.

Memory Structure and MappingThis limits the management memory that can be directly accessed by the host to 256 bytes, which is
divided in Lower Memory (addresses 00h through 7Fh) and Upper Memory (addresses 80h throughFFh).

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

A larger addressable management memory is required for all but the most basic modules. This is
supported by a structure of 128-byte pages, together with a mechanism for dynamically mapping any ofthe 128-byte pages from a larger internal management memory space into Upper Memory the hostaddressable space.
The addressing structure of the additional internal management memory2 is shown in Figure 8-2. The
management memory inside the module is arranged as a unique and always host accessible address
space of 128 bytes (Lower Memory) and as multiple upper address subspaces of 128 bytes each(Pages), only one of which is selected as host visible in Upper Memory. A second level of Page selection
is possible for Pages for which several instances exist (e.g. where a bank of pages with the same Page
number exists).
This structure supports a flat 256 byte memory for passive copper modules and permits timely access toaddresses in the Lower Memory, e.g. Flags and Monitors. Less time critical entries, e.g. serial ID
information and threshold settings, are available with the Page Select function in the Lower Page. For
more complex modules which require a larger amount of management memory the host needs to use
dynamic mapping of the various Pages into the host addressable Upper Memory address space,whenever needed.
Note: The management memory map has been designed largely after the QSFP memory map. This memory
map has been changed in order to accommodate 8 electrical lanes and to limit the required memory space.
The single address approach is used as found in QSFP. Paging is used in order to enable time criticalinteractions between host and module.

Supported Pages
A basic 256 byte subset of the Management Memory Map is mandatory for all CMIS compliant devices.
Other parts are only available for paged memory modules, or when advertised by the module. See CMIS
V4.0 for details regarding the advertisement of supported management memory spaces.
In particular, support of the Lower Memory and of Page 00h is required for all modules, including passive
copper cables. These pages are therefore always implemented. Additional support for Pages 01h, 02hand bank 0 of Pages 10h and 11h is required for all paged memory modules.
Bank 0 of pages 10h-1Fh, provides lane-specific registers for the first 8 lanes, and each additional bankprovides support for additional 8 lanes. Note, however, that the allocation of information over the banks
may be page specific and may not to be related to grouping data for 8 lanes.
The structure allows address space expansion for certain types of modules by allocating additional
Pages. Moreover, additional banks of pages

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R01

Figure5. QSFP DD Memory Map

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R01

Mechanical Dimension

Figure6. Mechanical Specifications

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CADM-SPO401-FR8C 400G QSFP-DD PSM8 2km Optical Transceiver Module R02

Regulatory Compliance
CA OPTRONICS GROUP CADM-SPO401-FR8C transceivers are Class 1 Laser Products. They
are certified per the following standards
FeatureLaser Safety
Environmental protection

CE EMC

FCC
Product Safety

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Standard
IEC 60825-1:2014 (Third Edition)
EN60825-2:2004+A1+A2
2011/65/EU
EN55032：2015
EN55035：2017
EN61000-3-2:2014
EN61000-3-3:2013
FCC Part 15, Subpart B; ANSI C63.4-2014
IEC 62368-1:2014
UL 62368-1:2014EN 62368-1:2014

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References
1. QSFP DD MAS Rev5.0
2. CMIS V4.0
3. IEEE802.3bs 200GBASE-DR4
4. OIF CEI-56G-VSR-PAM4

CAUTION:Use of controls or adjustment or performance of procedures other than those specified herein may resultin hazardous radiation exposure.

Ordering information
Part Number

Product Description

CADM-SPO401-FR8C

QSFP DD, 2x200GBASE-DR4, 2km on Single mode Fiber (SMF),with DSP
Power consumption <11W, MPO16(MTP16) APC connector.

Important Notice
Performance figures, data and any illustrative material provided in this data sheet are typical and mustbe specifically confirmed in writing by CA OPTRONICS GROUP before they become applicable to any
particular order or contract. In accordance with the CA OPTRONICS GROUP policy of continuous
improvement specifications may change without notice.
The publication of information in this data sheet does not imply freedom from patent or other protective
rights of CA OPTRONICS GROUP or others. Further details are available from any CA OPTRONICSGROUP sales representative.

Email:
sales@caoptronicsgroup.com
Official Site:www.caoptronicsgroup.com

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