電気学会論文誌●（●●●●●●●部門誌）
IEEJ Transactions on ●●●●●●●●●●●●●●●
Vol.●● No.● pp.●-●
DOI: ●.●●/ieejeiss.●●.●

Paper
Discontinuous Current Mode Control for Minimization ofThree-phase Grid-Tied Inverters in Photovoltaic System
Hoai Nam Le＊ Student member, Jun-ichi Itoh＊a) Senior Member(Manuscript received Jan. 00, 20XX, revised May 00, 20XX)
In this paper, a current control method for discontinuous current mode (DCM) is proposed for a three-phase grid-tied inverter
to minimize inductors without worsening current total harmonic distortion (THD). In conventional continuous current mode
(CCM) control, current THD increases as an inductor value is reduced because a zero-clamping phenomenon occurs due todead-time. In the proposed DCM current control, a zero-current interval is intentionally controlled and a dead-time-induced error
voltage is simply compensated with conventional dead-time feedforward compensation. The validation of the control method is
confirmed by simulations and a 700-W prototype. Compared to conventional CCM current control, the current THD is reducedby 97.6% with the proposed DCM current control, whereas the inductor volume is reduced by 70%. In the experiments, thecurrent THD is maintained below 5% over load range from 0.3 p.u. to 1.0 p.u. even when the inductance impedance is reduced to
0.5% of the inverter total impedance.
Keywords : three-phase grid-tied inverter, continuous current mode, discontinuous current mode

1.

application. Adjustment mechanism parameters for the adaptivedead-time compensation must be properly tuned for eachindividual system (9). Meanwhile, accurate device parameters, e.g.
parasitic capacitances, are required for the turn-off transitioncompensation method (10).
On the other hand, a single-stage multiphase inverter is
proposed with the discontinuous current mode (DCM) control inorder to generate multiphase currents with only one inductor (11),leading to a significant inductance reduction without worsening
the current total harmonic distortion (THD). However, this method
requires at least one bidirectional switching device for each phase;
consequently, high conduction loss of the switching devices
results in low efficiency. Meanwhile, the DCM control has been
also proposed for two-stage three-phase grid-tied inverters (12)-(13).
The notable drawback with these DCM control methods is that theDCM control in one phase is interfered with other phases; leading
to the complexity of the controller due to the requirement of theinterference decoupling. Different from continuous current mode
(CCM) control, the interference decoupling in the DCM operationis complicate due to the DCM nonlinearity (14) and requires many
calculation efforts of the hardware (12)-(13). Hence, the applicationof the conventional DCM control methods is limited.
In this paper, a current control for the three-phase grid-tied
inverter operated in discontinuous current mode is proposed inorder to minimize the grid filter without worsening the current
distortion. In order to deal with the zero-current clamping effect,
the inverter is intentionally operated in DCM instead of CCM. In
other words, the zero-current interval with the DCM operation iscontrolled, enabling a proper compensation for the nonlinear
behavior. Consequently, the conventional dead-time feedforward
compensation, i.e. two-level ACM, can be employed simply inorder to compensate the dead-time-induced error voltage andreduce the current distortion. The novelty of the proposed DCM
control method is that the control of each phase current isseparated into individual intervals in order to avoid theinterference between the phase currents. Therefore, the proposed

Introduction

In the last decade, researches on photovoltaic system (PV) haveaccelerated due to an increasing demand of renewable andsustainable energy sources (1)-(4). In the PV system, H-bridge
three-phase grid-tied inverters are generally employed as aninterface between solar panels and three-phase grid. In suchgrid-tied inverters, a grid filter is required to connect between an
output of the inverter and the grid in order to filter out the current
harmonics and to meet grid current harmonic constraints as
defined by standards such as IEEE-1547 (5)-(6). Due to theobservation that inductors in the grid filter occupy a major volumeof the inverter, an inductor value of the grid filter is necessarily
reduced in order to minimize the grid filter as well as the inverter.
However, this reduction of the inductor value implies a design of ahigh switching current ripple due to a high dc-link voltage toinductance ratio. This high current ripple results in a current
distortion phenomenon called zero-current clamping, where acurrent distortion increases notably as the switching current rippleincreases (7).
Due to the zero-current clamping effect, the dead-time-induced
error voltage exhibits a strong nonlinear behavior aroundzero-current crossing points. Hence, a conventional dead-time
feedforward compensation method such as, e.g. two-levelapproximation compensation method (ACM) (8), cannot
compensate for this nonlinear behavior of the dead-time-induced
error voltage. Several compensation methods for the nonlinearityof the dead-time-induced error voltage such as an adaptivedead-time compensation method and a turn-off transitioncompensation method have been proposed to deal with thisnonlinearity behavior and to reduce the zero-crossing current
distortion (9)-(10). Nevertheless, both methods exhibit therequirements which restrict the employment over a wide range ofa) Correspondence to: Jun-ichi Itoh. E-mail: itoh@vos.nagaokaut.ac.jp＊
Nagaoka University of Technology.
1603-1, Kamitomioka-machi, Nagaoka, Niigata, Japan 940-2188© 20●● The Institute of Electrical Engineers of Japan.

1Discontinuous Current Mode Control for Minimization of Three-phase Grid-Tied Inverter in Photovoltaic System (Hoai Nam Le et al.)v to N

P
up

vp

wp

L iu

Lf ig_u

vuo

iv

ig_v

vvo

ig_w

vwo

w to Nu phaseVdc

Oiw

u to Pv to Pu to Nw to Pv phasew phase

0

Cf
un

vn

wn

N

0o

Fig. 1. H-bridge grid-tied three-phase inverter. This topology is
employed due to its simple control and construction.
iv

iu

u-phase current
peak ipeak_u

iw

iu

0A

iv

D1Tsw

(a) Zero-crossing distortions in inverter output currents
Current (0.5 A/div)
Time (15 ms/div)

240o

300o

360o

w-phase current
peak ipeak_w
u-phase averageiwcurrent iavg_u

w-phase average
current iavg_w

iu

Switching signals up

D2Tsw

D3Tsw

D4Tsw

D5Tsw

(b) Inverter output current waveform in one switching period
during 0o-60o region
Fig. 3. Six 60-degree time regions of DPWM and inverter output
current in DCM. In order to simplifying the DCM control, DPWM
is employed, controlling only two phase currents at the same time.

Zero-current clamping
due to dead timeunZero-current
interval

v-phase average
current iavg_v

Tsw

0A
Dead time

discontinuous pulse width modulation (DPWM), and the inverter
output current waveform in one switching period during 0o-60o
region. In order to simplify the control of DCM, only two phasecurrents should be controlled, whereas the current of the third
phase is the summation of the currents of the first two phases.
Hence, DPWM is employed in order to satisfy this control
condition. During each 60-degree time region in DPWM, one
phase is clamped to P or N polarity of dc-link voltage as shown in
Fig. 3(a), whereas the other two phases are modulated to control
separately two inverter output currents as shown in Fig. 3(b). The
separation of the controlled currents into each individual intervals
result in the elimination of the interference decoupling, which is
required many calculation efforts due to the nonlinearity in DCM(14). Hence, the proposed DCM control method leads to a simple
current control and can be applied into numerous application.
2.3 Circuit modelling
The circuit model in DCM isderived in order to generate the duty ratios. Average small signal
modeling technique is used to model the inverter for the current
control loop design (14).
First, considering the u-phase current in Fig. 3(b), D1 and D2
indicate the duty ratios of the first and the second intervals of theu-phase current, whereas D3 and D4 indicate the duty ratios of thefirst and the second intervals of the w-phase current, and D5
depicts the duty ratio of the zero-current intervals. The u-phaseinductor voltage in D1Tsw, D2Tsw and (D3+D4+D5)Tsw is given by(1)-(3), respectively,(b) Zero-current clamping effect due to dead-time
Fig. 2. Zero-current distortion phenomenon. The current distortion
increases with the high current ripple due to the dead-time.
DCM control method without the interference decoupling simply
achieves the sinusoidal current regulation in numerous
applications. The effectiveness of the proposed current control isconfirmed by simulations and experiments.

2.

180o

0A

Current (3 A/div)
Zero-crossing distortion
Time (5 ms/div)

0

120o

(a) Phase clamping selection in six cycles of DPWM

Magnified into Fig. 2(b)160oDiscontinuous-current-mode current control

2.1 Zero-crossing distortion
Figure 1 depicts theH-bridge three-phase grid-tied inverter with a LCL-based grid
filter. The minimization of the LCL filter generates a current witha high ripple in the inductors L. The filter stage with Lf and Cf
can suppress the high-order current harmonics in order to meetgrid current harmonic constraints as defined by standards such as
IEEE-1547 (5)-(6).
Figure 2 describes the zero-crossing current distortion
phenomenon. As the current ripple increases with the minimized
LCL filter, the current distortion increases notably around thezero-crossing points due to the zero-current clamping effect,
making the dead-time-induced error voltage become nonlinear.
Therefore, the employment of the conventional two-level ACM
just further increases the current distortion.
2.2 Discontinuous-current-mode operation
Figure 3indicates the phase clamping selection in six cycles of traditional
2

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Discontinuous Current Mode Control for Minimization of Three-phase Grid-Tied Inverter in Photovoltaic System (Hoai Nam Le et al.)vLu _1  Vdc  vuo  vvo ............................................... (1)vuv

vLu _ 2   vuo  vvo  .................................................. (2)

D1
[0~1]

vuv
D0

where Vdc is the dc-link voltage and vuo and vvo are the phasevoltages. Then, the inductor voltage during a switching period isexpressed by (4),4L

i peak _ u 2( D1  D2 ) ...................................... (5)D4 

Vdc  (vuo  vvo )D1Tsw .............................. (6)2L

4 Liavg _ u
D1Tsw (Vdc  vuo  vvo ) D1 ........................... (7)Substituting (7) into (4) in order to remove the duty ratio D2 andrepresenting (4) as a function of only the duty ratio D1, (8) is
obtained.

4 Liavg _ u vLu  D1Vdc  vuv  vuv 1 

dt
D
T
(
V

v
)
1 sw
dc
uv 

............................................................................. (8)Ldiavg _ uThen, the circuit model in DCM is established based on (8) (14)-(15).
Fig. 4 illustrates the circuit model of the inverter operating in
DCM. The dash line part does not exist when the inverter operates
in CCM because the average current iavg equals to the half current
peak ipeak/2; in other words, the CCM operation makes thezero-current interval D3Tsw shown in Fig. 3 disappear.
Consequently, the zero-current interval D3Tsw induces thenonlinearity into the transfer functions when the inverter operates
in DCM, which implies that the duty ratio in DCM is a function of
the current at steady-state points. Substituting the u-phase inductor
voltage vLu in (8) as zero and the duty ratio D1 is expressed as,

D1  2

iavg _ u Lf sw (vuo  vvo )Vdc (Vdc  vuo  vvo )D2 Vdc (Vdc  v1  v2 )................................. (13)

D1 (Vdc  v1  v2 )........................................ (14)v1  v2

D3  2D4 

i2 _ ref Lf sw (v3  v2 )Vdc (Vdc  v3  v2 )................................ (15)

D4 (Vdc  v3  v2 )....................................... (16)v3  v2

D5  1  D1  D2  D3  D4 ................................. (17)Similarly, the duty ratios D3 and D4 of the w-phase current shownin Fig. 3(b) can be expressed as in (11)-(12),Vdc (Vdc  vwo  vvo )i1_ ref Lf sw (v1  v2 )................................ (9)D (V  v  v )D2  1 dc uo vo ...................................... (10)vuo  vvo

iavg _ w Lf sw (vwo  vvo )iavg

D3 (Vdc  vwo  vvo )..................................... (12)vwo  vvo

D1  2where fsw is the switching frequency. Then, substituting theu-phase inductor voltage vLu in (4) as zero and the duty ratio D2 isexpressed as in (10),

D3  20.5ipeak

Do not exist
in CCM
because1
iavg equals to
0.5ipeak

2.4
DCM control system
Figure 5 shows the control
system and the control operation flowchart of the three-phasegrid-tied inverter operating completely in DCM, whereas Table 1
depicts the look-up table for the duty calculation and the switching
signal output in each 60-degree time region. When the grid
operates normally, the inverter only has to regulate the grid current
following the sinusoidal waveform.
First, the new switching period is detected by using the carrier.
In the start of new switching period, the 60-degree time section isdetected by detected values of the grid phase voltage vuo, vvo, andvwo. Then, the phase current references and the phase voltages are
distributed to input values of a duty calculation based on thedetected 60-degree time section as shown in Table 1. In the DCM
operation, the duty ratio can be directly calculated from thecurrent reference. Therefore, feed-forward control method is
employed for the DCM operation in this paper. In the duty
calculation step, the duty ratios D1-D5 are expressed as follows.
Note that the calculation of the duty ratios D1-D5 is similar to thatof the duty ratios D1-D4 shown in Figure 3.

Substituting (6) into (5), and solving the equation for the duty
ratios D2, then the duty ratio D2 is expressed by (7),

D2 

iavg

Fig. 4. Circuit model of inverter operating in DCM. The current
control loop gain in DCM depends on the average current, i.e. thenonlinearities occurring in the duty-ratio-to-current transfer
function.

where D0 is the sum of D3, D4 and D5. The average current iavg_u
and the current peak ipeak_u shown in Figure 3 is expressed as,i peak _ u

iavg
0.5ipeak(Vdc - vuv)Tsw.................... (4) D1 Vdc  vvuo  vvo   D2  vuo  vvo iavg _ u 1sL

Nonlinear factor

vLu _ 3  0 ................................................................ (3)vLu  D1vLu _1  D2 vLu _ 2  D0 vLu _ 3

vLu

Vdc

where i1_ref and i2_ref are the first and second controlled currents ineach 60-degree time region, and v1, v2 and v3 are the voltages
corresponding to the controlled currents. For instance, during the
0o-60o time region, the controlled currents are iu and iw as shownin Fig. 3. Therefore, the input values to i1, i2, v1, v2, and v3 are iu_ref,.............................. (11)3

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Discontinuous Current Mode Control for Minimization of Three-phase Grid-Tied Inverter in Photovoltaic System (Hoai Nam Le et al.)Table 1. Look-up table for duty calculation and PWM output.

Voltage Section Detection
vuo Detection of 60Value Input
Region1-6
Duty Calculation
vvo
degree time
i1_refiu_refvwo region in DPWM
D1iiv_ref Look-up 2_ref
v1 Equations D2Table 1
iw_reffor eachv2 (13)-(16) D3
vu
regionD4
v3
vv
vw

RegionVariable
i1_refi2_ref
v1
v2
v3
up
un
vp
vn
wp
wn

PWM Generation
Dead Time Compensation

Dead Time Generation Value Output
pwm1

D1
Ddeadtimepwm2

Look-up
Table 1
pwm3 for eachregion

D1+D2
D1+D2+D3
Ddeadtime

pwm4

up
un
vp
vn
wp
wn

0o-60oiu_refiw_ref
vu
vv
vw
pwm1
pwm2
0
1
pwm3
pwm4

iw_refiv_ref
-vw
-vu
-vv
1
0
pwm4
pwm3
pwm2
pwm1

iv_refiu_ref
vv
vw
vu
pwm3
pwm4
pwm1
pwm2
0
1

iu_refiw_ref
-vu
-vv
-vw
pwm2
pwm1
1
0
pwm4
pwm3

iw_refiv_ref
vw
vu
vv
0
1
pwm3
pwm4
pwm1
pwm2

iv_refiu_ref
-vv
-vw
-vu
pwm4
pwm3
pwm2
pwm1
1
0

Table 2. Simulation parameters.
VDC
vg
Pn
fg
Zb
fsw

D1+D2+D3+D4
1

Tdeadtime
L1
L2
L3

0

(a) Control system

z

Start

fc

Circuit Parameter
DC link Voltage
500 V
Line-to-line Voltage
200 Vrms
Nominal Power
3 kW
Grid Frequency
50 Hz
Total Impedance
13.3 W
Switching Frequency 40 kHz
Dead-time
500 ns
1st Inductor Value
1061 mH (2.5%)
2nd Inductor Value
254.6 mH (0.6%)
31.8 mH (0.075%)
3rd Inductor Value
Current Controller Parameter
Damping Factor
0.7
1 kHz
Cutoff Frequency

N

Inverter-side Inductor Volume [cm3]

New switching period detected(based on carrier)60o-120o 120o-180o 180o-240o 240o-300o 300o-360o

YSection detection (based on detected voltages)
Input value selection (cf. Table 1)
Duty calculation (cf. equations (13)-(16))
Dead time compensation
Switching signal generation (cf. Table 1)

350

VolL

300
%ZL=2.5%
(P1)

250
200
150

%ZL=0.6%
(P2)

100
50
0

Inverter-side inductor L
volume reduced by 70%

10%ZL=0.075%
(P3)
1.0
0.1
0.01
Impedance of Inverter-side Inductor %ZL [%]Fig. 6. Relationship between filter volume and inductor impedanceat switching frequency of 40 kHz. The inductor volume can be
minimized greatly when reducing the inductor impedance.

End(b) Control operation flowchart
Fig. 5. Control system of the three-phase grid-tied inverter
operating completely in DCM. The dead-time-induced error
voltage is compensated simply when the inverter is intentionallyoperated in DCM because the zero-current interval is controlled.

to the switching devices corresponding to each 60-degree time
region of DPWM based on Table 1. Note that if the outputs pwm2
and pwm4 are utilized as shown in Table 1, the inverter is operated
under synchronous switching; otherwise, if the outputs pwm2 andpwm4 are set to zero, the inverter is operated under asynchronous
switching.

iw_ref, vuo, vvo and vwo, respectively, as shown in Table 1.
Next, the dead-time compensation is introduced at the first stepof PWM generation. The duty ratio which compensates for thedead-time-induced error voltage, is expressed as follow,

3. Simulation results

Ddeadtime  f swTdeadtime ........................................... (19)Table 2 shows the circuit parameters to evaluate the operationof the inverters, whereas Figure 6 depicts the inductor volume
against the inductor impedance. The inverter-side inductors L in
Fig. 1 occupy a majority of the inverter volume. Therefore, theminimization of L is mainly focused in this paper. Generally, theinductor value is expressed as a grid filter impedance scaled to theinverter total impedance %ZL (16). In particular, three designs of thegrid filter impedance are evaluated. As shown in Fig. 6, theinverter-side inductor L volume is minimized by 70% when thewhere Tdeadtime is the dead-time. The dead-time-induced error
voltage is simply compensated as shown in Fig. 4 because when
the inverter is intentionally operated in DCM, the zero-current
interval is under control. The compensated duty ratios are thencompared with the sawtooth waveform to generate the PWM
signals. In order to avoid the simultaneous turn-on of bothswitching devices in one leg, the typical dead-time generation isused to delay the turn on. Finally, the PWM signals are distributed
4

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Discontinuous Current Mode Control for Minimization of Three-phase Grid-Tied Inverter in Photovoltaic System (Hoai Nam Le et al.)iw

Inverter output current (20 A/div)

iavg_w

Average current (7.5 A/div)
Time (10 ms/div)

iv

iu

iu

0A

Inverter output current (20 A/div)
iv
iw

0A

iavg_v

iavg_uTHD=1.5%
0A
0A
iavg_uiavg_v

iavg_w

Average current (7.5 A/div)
Time (10 ms/div)(a) Conventional CCM control with %ZL = 2.5% at rated load

iu

iv

iw

Inverter output current (20 A/div)

iavg_uiavg_v

iavg_w

Average current (7.5 A/div)
Time (10 ms/div)

Fig. 8. Load step response between load of 0.1 p.u. and load of 1.0
p.u.. The stable inverter operation is confirmed even at load stepchange. Moreover, the balanced phase currents are also confirmed.

0A

Average Current Distortion THDiavg [%]THD=3.9%0A(b) Conventional CCM control with %ZL = 0.6% at rated load
Inverter output current (20 A/div)
iu

iv

iw

0A

16.0
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0.0

Average current (7.5 A/div)
Time (10 ms/div)
iavg_v

iavg_w

THD=9.8%(c) Conventional CCM control with %ZL = 0.075% at rated load
iu

iv

iw

Inverter output current (20 A/div)

0A

Average current (7.5 A/div)
Time (10 ms/div)0A
iavg_uiavg_v

iavg_w

0

0.1

0.2

0.3 0.4 0.5 0.6 0.7 0.8
Output Power Pout [p.u.]

0.9

1.0 1.1

Fig. 9. Current THD characteristics of conventional CCM current
control and proposed DCM current control with three different
inductor designs. With the proposed DCM current control, thecurrent THD is maintained below 5% over entire load range from
0.1 p.u. to 1.0 p.u..
currents of the conventional CCM current control and the
proposed DCM current control at rated load with three inductor
designs from Fig. 6. As the current ripple increases, i.e. thedecrease in the inductor impedance, the current with theconventional CCM current control distorts notably around thezero-crossing points. Consequently, the current THD increases
from 1.5% to 9.8% when the inductor impedance %ZL is reduced
from 2.5% to 0.075%. On the other hand, when the inverter isoperated in DCM, the zero-current interval can be controlled andthe dead-time-induced error voltage can be compensated simply as
shown in Fig. 5. Therefore, even with the minimized inductor
impedance of 0.075%, the low current THD of 0.3% is achieved
with the proposed DCM current control.
Figure 8 depicts the load step response of the proposed DCM
current control. Even under the sudden load step between the loadof 0.1 p.u. and the load of 1.0 p.u., the stable inverter operationand the balanced three-phase currents are still achieved with theproposed control.
Figure 9 shows the current THD characteristics of theconventional CCM current control and the proposed DCM current
control with three inductor designs from Fig. 6. At rated load

0A
iavg_uConventional CCM control with
%ZL=0.075%%ZL=0.6%%ZL=2.5%
Proposed DCM control with
%ZL=0.075%
Current distortion reduced by 97.6%
1 p.u. equals to 3 kW.

18.0

THD=0.3%(d) Proposed DCM control with %ZL = 0.075% at rated load
Fig. 7. Inverter output currents and average currents of
conventional CCM current control and proposed DCM current
control at rated load. The current THD of the conventional CCM
current control increases with the reduction of the grid filter
inductor impedance
reducedTHD
from of
2.5%
0.075%. current
L iscurrent
impedance,
whereas%Z
thethetoproposed
Figure7 shows
control
is still
low. the inverter output currents and the average
5

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Discontinuous Current Mode Control for Minimization of Three-phase Grid-Tied Inverter in Photovoltaic System (Hoai Nam Le et al.)Grid phase voltage (100 V/div)

Table 3. Experimental parameters.

vuo

Circuit Parameter
VDC

DC link VoltagevgLine-to-line Voltage

100 Vrms

Pn

Nominal Power

700 W

fg

Grid Frequency

50 Hz

Zb

Total Impedance

4.8 W

fsw

Switching Frequency

20 kHzTdeadtime

Dead-time

500 nsL

Inductor Value

0V

300 V
Grid current (5 A/div)
THD = 2.4%

ig_u
0A

iu
0A

80 mH (0.5%)

Inverter
outputcurrent(10 A/div)(a) Grid phase voltage, grid current,
and inverter output current of u phaseh = 60 mm

vuo

0V
Grid phasevoltage (100 V/div)

w = 80 mm

Fig. 10(c)

iu

iv

iw

l = 260 mm

0A

Fig. 10. Prototype of miniature three-phase grid-tied inverter.
with the inductor impedance of 0.075%, the current distortion of
the proposed DCM current control is reduced by 97.6% comparedto the conventional CCM current control. Note that the current
THD of the conventional CCM current control with the inductor
impedance of 0.075% or 0.6% has a tendency to decrease at lightload. The reason is when the average current is significantly
smaller than the current ripple, the current mode is no longer CCM
but triangular current mode (TCM) (17). In TCM, all the turn on of
the switching devices is zero voltage switching. On other words,
the dead-time-induced error voltage does not occur in TCM.
Hence, the current distortion due to the zero-clamping
phenomenon disappears at light load.

Inverter output current (5 A/div)

Time (4 ms/div)(b) Grid phase voltage of u phase,and three-phase inverter output currents

iu

iw

0A

4. Laboratory setup

iv

Table 3 shows the experimental parameters, whereas figure 10
depicts the prototype of the miniature three-phase grid-tied
inverter. In order to operate the inverter under DCM over entire
load range with the switching frequency of 20 kHz, theinverter-side inductor value is designed at 80 mH, whose
impedance is 0.5% of the total inverter impedance.
4.1 Discontinuous-current-mode operation
Figure 11
depicts the three-phase grid-tied inverter DCM operation
waveform at rated load. In Figure 11(a), the phase difference
between the grid current of u phase and the grid u-phase voltage isalmost zero, i.e. the unity-power-factor operation. Furthermore,even with the small inverter-side inductor impedance of 0.5%, thelow current THD of 2.4% is still achieved. As shown in Figure11(b)-(c), the three-phase inverter output currents are similar to
those shown in Figure 7(c), i.e. the operation of the proposed
DCM control is confirmed.

Inverter output current (5 A/div)

Time (10 ms/div)(c) Zoom-in three-phase grid current from Fig. 10(b)Fig. 11. Three-phase grid-tied inverter DCM operation waveform
at rated load. The three-phase inverter output currents shown in
Fig. 10(b) are similar to those shown in Fig. 6(c). This confirms
the operation of the proposed DCM control.
Figure 12 shows the grid phase voltages and the grid currents ofu phase and w phase at the normal operation and at step-up loadchange. At the normal operation, the three-phase grid current iswell balance and the low current THD of 2.4% is achieved for all
three-phase grid current. At the step-up load change from 0.1 p.u.
to 1.0 p.u., the stable current response is confirmed. Note that thethree-phase grid currents are still balance both before and after the
step-up load change.
Figure 13 depicts the current THD characteristics of the
6

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Discontinuous Current Mode Control for Minimization of Three-phase Grid-Tied Inverter in Photovoltaic System (Hoai Nam Le et al.)14.0

Proposed DCM control with %ZL=0.5%

Grid phase voltage (50 V/div)

12.0

vuo

Gird Current THDig [%]

vwo

0V

Grid current (5 A/div)

ig_w

ig_u

THD = 2.4%

10.0
8.0

4.0
2.0
0.0

0A

Current THD constraint in IEEE-1547(Requirement: THD<5%)

6.0

0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Output Power Pout [p.u.]

1

1.1

Fig. 13. Current THD characteristics of proposed DCM current
control. The current THD is maintained below 5% over load range
from 0.3 p.u. to 1.0 p.u., which satisfies the current THD
constraint in IEEE-1547, even when the inductance impedance isreduced to 0.5% of the inverter impedance.

Time (10 ms/div)(a) Grid phase voltages and grid currents of u phase and w phaseat normal operation
vuo

Figure 15 depicts the efficiency comparison between
asynchronous switching and synchronous switching in DCM. The
application of the DCM synchronous switching reduces theconversion loss by 33% compared to the DCM asynchronous
switching at rated load. Furthermore, the maximum efficiency of
97.8% is achieved at rated load.

0V
Grid phase voltage (100 V/div)
ig_u

ig_w
Grid current (5 A/div)
0A

5. Conclusion
Inverter output current (10 A/div)

In this paper, the DCM current control was proposed to thegrid-tied three-phase inverter in order to minimize the grid filter
volume without worsening the current THD. The DCM control
separated the control of each current in individual intervals inorder to avoid the control interference of current into each other.
Therefore, the interference decoupling control for DCM operation
was not required for the proposed control, leading to the simple
control system. The effectiveness of the proposed DCM control
method was confirmed by both simulations and experiments. In
particular, the low current THD of 2.4% was achieved even when
the inductance impedance was reduced to 0.5% of the inverter
total impedance.
In future works, DCM current feedback controls will beconsidered in order to eliminate the circuit-parameter dependency.

iu

0A

Time (10 ms/div)(b) Current response of step-up load change
Fig. 12. Grid phase voltages and grid currents of u phase and w
phase at normal operation and at step-up load change.
proposed DCM current control. The current THD is maintained
below 5% over load range from 0.3 p.u. to 1.0 p.u., which satisfies
the current THD constraint in IEEE-1547, even when the
inductance impedance is reduced to 0.5% of the inverter
impedance. The increase of the current THD at light load can be
explained due to the high occupation of the reactive current
flowing through the filter capacitor. Therefore, in order to reducethe current THD at light load, the DCM control should also
consider the effect of the reactive current in the filter capacitor.
4.2
Efficiency comparison between asynchronous
switching and synchronous switching in DCM
Figure 14
shows the asynchronous switching and synchronous switching in
DCM. In the asynchronous switching, the corresponding switches
are turned after the period D1Tsw and D3Tsw finish. Therefore, thecurrent has to flow through the diode. In the next generation
switching devices such as SiC or GaN, the forward voltage of theinverse diode in such devices is generally higher than that of theconventional MOS-FET devices. Consequently, the conduction
loss with the asynchronous switching is higher that of thesynchronous switching, where the current flows through the FET
part. As shown in Figure 14, the synchronous switching can also
be applied into DCM in the same manner as the conventional
CCM. Consequently, the conduction loss of the switching device
is reduced.

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IEEJ Trans. ●●, Vol.●●, No.●, ●●●Discontinuous Current Mode Control for Minimization of Three-phase Grid-Tied Inverter in Photovoltaic System (Hoai Nam Le et al.)Conversion Efficiency h [%]Inverter output current (5 A/div)
iw

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iv

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Hoai Nam Le(Student member) received his B.S. and M.S.
degrees in electrical, electronics and informationengineering from Nagaoka University of Technology,
Niigata, Japan in 2014 and 2016, respectively.
Presently, he is a Ph.D. candidate at Nagaoka
University of Technology, Niigata, Japan. He is thestudent member of IEEJ and IEEE. His main
research interests include multilevel converters. His
current research interests include control techniques, design andoptimization of power electronic systems employing latest power
semiconductor technology (SiC and GaN).

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Jun-ichi Itoh

(Senior Member) received his M.S. and Ph.D.
degrees in electrical and electronic systems
engineering from Nagaoka University ofTechnology, Niigata, Japan in 1996 and 2000,
respectively. From 1996 to 2004, he was with Fuji
Electric corporate Research and Development Ltd.,Tokyo, Japan. Since 2004, He has been with
Nagaoka University of Technology as an associate
professor. He received the IEEJ academic promotion award (IEEJ
Technical Development Award) in 2007 and the Isao Takahashi powerelectronics award in 2010. His research interests include matrix converters,
DC/DC converters, power factor correction techniques and motor drives.
He is a member of the Institute of Electrical Engineers of Japan and theSociety of Automotive Engineers of Japan.

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