Current Source Gate Drive Circuits with
Low Power Consumption for High Frequency
Power Converters
Ayato Sagehashi1, Keisuke Kusaka1, Koji Orikawa1, and Jun-ichi Itoh1
1

Nagaoka University of Technology, 1603-1 Kamitomioka-cho Nagaoka City, Niigata, Japan

Abstract-- In this paper, three types of the gate drive
circuits; voltage source, current source with continuous
current and current source with discontinuous current gate
drive circuits are compared from the view point of power
consumption of the three types of the gate drive circuits andthe switching loss of the main MOSFET. It is confirmed thatthe power consumption of the gate drive circuit is reducedby 56.4% using the current source gate drive circuit withdiscontinuous current source compared with that of thevoltage source gate drive circuit by a switching test at theswitching frequency of 1 MHz. Secondary, the switching lossof the main MOSFET is evaluated by experiment. The turnon and the turn off losses are 1.34 W and 1.76 W when theconventional voltage source gate drive circuit. On the other
hand, the turn on and the turn off losses are 1.4W and
1.54W. The turn on loss and the turn off loss are almost
same value because the input peak current of theconventional voltage source gate drive circuit and the input
reactor peak current of the current source gate drive circuitwith discontinuous current are same. Therefore, the current
source gate drive circuit with discontinuous current can beused without increasing the switching loss of the main
MOSFET similar to the conventional voltage source gate
drive circuit. That is because the rise time and the fall timeof the gate voltage on main MOSFET is same time.
Index Terms—voltage source, current source, highfrequency switching, gate drive circuit

I. INTRODUCTION
SiC-MOSFETs have especially advantages which are
performances of the high frequency switching and thelow loss compared with conventional Si-MOSFETs. In
consequence, the minimization of the power converter
using SiC-MOSFETs has been studied [1]-[5]. However,the capacitance of the SiC-MOSFET between a gate anda source is larger than that of the Si-MOSFET [6].
Furthermore, the power consumption of the gate drive
circuit is increased at the high frequency because the all
charge of the capacitance between the gate and the source
become the power consumption in a gate resistance of thevoltage source gate drive circuit. As a result, the highfrequency switching cannot be applied to theconventional voltage source gate drive circuit.
Therefore, the gate drive circuit for the fast and low
loss charging of the capacitance of the MOSFET between
the gate and the source has been actively studied [7]-[9].
In the reference [7], the switching of the MOSFET isachieved using the resonance which a reactor isconnected to the gate in series. For this reason, the power
consumption is reduced because the charging power ofthe capacitance between the gate and the source isregenerated to a power supply of the gate drive circuit.
However, the duty ratio is limited at 50% in order toachieve the resonance.
On the other hand, in the reference [8], the highfrequency switching is realized using an reactor. In thismethod, the energy is charged for the reactor using
auxiliary MOSFETs for the gate driving which is notcontributed to the discharge and charge of the capacitance
between the gate and the source in a push-pull gate drive
circuit. Then, the switching is achieved in order tosuppress the surge voltage of the reactor on the gate
voltage when the current to the reactor is blocked at theswitching. However, the circuit configuration becomescomplex because many additional components are
required in this method. Moreover, in the reference [9],the high frequency switching is achieved by connecting
an auxiliary switch on the main circuit side. Therefore,
the reconstruction of the main circuit configuration isnecessary.
In this paper, the current source gate drive circuit withdiscontinuous current is proposed in order to solve theproblems mentioned above. In order to reduce the power
consumption of the gate resistor, an input reactor isconnected to the power supply of the proposed current
source gate drive circuit in series instead of the gate
resistance. In addition, in the current source gate drive
circuit, the high frequency switching is possible tocompare with the conventional voltage gate drive circuit
because the gate current caused by the gate resistance is
not limited. First, the operating principles of conventional
voltage source gate drive circuit and the current sourcegate drive circuit are explained. Additionally, the design
method of the current source gate drive circuit is shown.
Secondly, the operation of three current source gate drive
circuits is confirmed by simulation. In the simulation, thepower consumption of three gate drive circuit isconcurrently compared. Thirdly, the conventional voltage
source gate drive circuit and the current source with dis
continuous current gate drive circuit are experimentallytested using a prototype. In addition, the power
consumption of the gate drive circuit and the switchinglosses of the main MOSFET are measured when theswitching frequency is from 100 kHz to 1 MHz. Finally,
the power consumption and the switching losses of themain MOSFET are compared between the voltage sourcegate drive circuit and the current source gate drive circuitwith discontinuous current by experimental results.

Iin
S1

S3
FET
RG

Vin

Rg

II. OPERATING PRINCIPLE OF GATE DRIVE CIRCUIT

Cgs

The three gate drive circuits are described in thischapter. First, the conventional voltage source gate drive
circuit is introduced. After that, the current source gate
drive circuit with continuous current and the current
source gate drive circuit with discontinuous current are
explained.
A. Voltage source gate drive circuit
Fig. 1 shows the circuit configuration of theconventional voltage source gate drive circuit. This
circuit is equivalent to a discharge and a charge of a RC
circuit which is composed of a gate resistance RG,
internal gate resistance Rg and a capacitance between thegate and the source Cgs. The switching speed is adjusted
by the gate resistance. However, all power of charging to
the capacitance between the gate and the source becomesa loss. In addition, the current capacity of the auxiliary
MOSFET for gate drive circuit is increased because thegate current is increased when the gate resistance RG issmall for achieving high dv/dt of the gate voltage. Hence,the switching speed is limited when the capacitance
between the gate and the source Cgs is large similar to thecapacitance between the gate and source of SiCMOSFETs. Furthermore, the conventional voltage sourcegate drive circuit is similar to the full bridge inverter
because the gate voltage is achieved from -12 V to +12 V.
B. Current source gate drive circuit (Continuous current
mode)
Fig. 2 shows the circuit configuration of the current
source circuit. Transistors can use in the current source
circuit because the gate voltage and the input voltage ofthe gate drive circuit is low value compared with that of
the conventional voltage source gate drive circuit. In thiscase, the input current Iin is controlled at constant by suchas a chopper circuit which is connected the input side of
the gate drive circuit. In this circuit, a reverse blocking
diode is not needed because the transistor has a reverse
blocking capability when the gate voltage is low voltage.
Therefore, the gate drive circuit can be simply realized by
the construction of Fig. 2.
Fig. 3 shows the switching patterns of the current
source gate drive circuit with continuous current. The
overlap time is needed when the switching mode ischanged. There are four switching modes in a switching
period in Fig. 3.
1) MODE I[0 ≤ t ≤Ti] : The input current is flew as thecirculating current at turning-on the switches S1 andS2 because the capacitance between the gate andsource Cgs do not discharge and charge. After that,the operation mode is moved from MODE I to
MODE II when the switch S2 is turned off and the

S2

S4

Fig. 1. Conventional voltage source gate
drive circuit.
Iin
S3

S1

FET
Rg

ICgs

Iin

Cgs
S4

S2

Fig. 2. Current source gate drive circuitwith continuous current.
S1

S3

S1

FET

S3
FET

Rg
Iin

-Vgs
S2

Rg
Iin

Cgs

S4

MODE I

S1

Cgs
S2

S4

MODE II

S3

S1

FET

S3

Iin

+Vgs
S2

FET
Rg

Rg
Iin

Cgs

Cgs

S4

S2

S4

D4
MODE III

MODE IV(a) Current paths.
Mode
S1
S2

I
ON

III

IV

I

OFF

ON OFFS3
S4IIOFF ON
OFF

ON
+Vgs

Vgs 0
-Vgs

Ti

Tii

Tiii

Tiv

(b) Switching patterns
Fig. 3. Switching patterns and operation modes of thecurrent source gate drive circuit (Continuous currentmode).
switch S4 is turned on.
2) MODE II [Ti ≤ t ≤ Tii] : The capacitance between
the gate and the source Cgs is charged by input
current. After that, the gate voltage is increased
from -Vgs to +Vgs.

3) MODE III [Tii ≤ t ≤ Tiii] : The input current
circulates by the switches S3 and S4 which areturned on because the capacitance between the gate
and the source Cgs do not discharge and charge as
MODE I.
4) MODE IV [Tiii ≤ t ≤ Tiv] : The capacitance between
the gate and the source Cgs is discharged by theswitches S2 and S3 which are turned on.
As mentioned above, the high frequency switching of themain circuit devices are achieved by repeating the MODE
I to IV.
Fig. 4 shows the design procedure of the proposedcurrent source gate drive circuit. First, the change ratio of
the gate voltage dVgs/dt is decided by the switching
characteristics of the main MOSFET which depends onthe main circuit. Next, the input current Iin of the gate
drive circuit is calculated by Eq. (1).

I in  C gs

dVgs
dt

 C gs

2Vgs
Tii

L

C. Current source gate drive circuit (Discontinuous
current mode)
Fig. 5 shows the current source gate drive circuit withdiscontinuous current. The conduction losses of theauxiliary MOSFET are increased in the current sourcegate drive circuit of Fig. 2. It is because the circulating
current always flows by shorting the upper and lower
arms except for the period of the discharge and the chargeof the capacitance between the gate and the source C gs.
Therefore, the power consumption is reduced by using-SpecificationsDec. dVgs/dt
Eq. (1)

Select: MOSFETs
Calc. Tii and Tiv
2Tii << Tsw
Yes
End

FET
Rg

ICgs

Vin

Cgs
S4

S2

Fig. 5. Current source gate drive circuit withdiscontinuous current.
L

L
S1

L

S3

S1

S1

S3

FET
Vin

Vin

S4

S2

MODE I

L

S1

S1

S2

S4

MODE III
L

S3

FET

S1

S3

FET

FET

Vin

+Vgs
S2

+Vgs

S4

L MODE II

S3

Vin

FET

Vin

-Vgs
S2

S3

FET

Vin

S4

S2

MODE IV

-Vgs

S4

S2

MODE VS4

MODE VI(a) Current paths.
Mode

I

II

III

IV

V

VI

S1

ON

OFF

OFF

S2

ON

OFF

ON OFF

S3

OFF

ON

OFF

S4

ON OFF

ON

OFF
+Vgs

Vgs
0
-Vgs
IL

0
Ti

Tii

Tiii

Tiv TvTvi(b) Switching patterns.
Fig. 6. Switching patterns and operation modes of thecurrent source gate drive circuit with discontinuous
current.

Start

Calc. Iin

S3

S1......................................... (1)where Tii is the period of MODE II, the current of thecapacitance between the gate and the source Cgs isconstant. Consequently, dVgs/dt = 2Vgs/Tii because theincreasing of the gate voltage is linear.
The auxiliary MOSFET for the gate driving which cantolerate the calculated current by equation (1) is selected.
In a similar way, the charging time Tii and Tiv for thecapacitance between the gate and the source C gs arecalculated using the equation (1). However, thesedischarge and charge time are needed to be within theswitching period Tsw of the main MOSFET. If thiscondition is not satisfied, these parameters are redesigned
from dVgs/dt.

Gate-source capacitance
Cgs
Gate-source voltage
Vgs

IL

No

Fig. 4. Flowchart for design of the current source gate
drive circuit.

discontinuous current. In Fig. 5, the voltage source andthe small reactor L are used instead of the current source.
Fig. 6 shows the operation mode of the current sourcegate drive circuit with discontinuous current. In Fig. 5,
the current source is replaced into a voltage source and athe small reactor L. Therefore, the reactor current IL canbe operated in the discontinuous due to the input reactor
L and the on period of the MOSFET for the gate driving
is properly designed in regard to the capacitance between
the gate and the source Cgs. Consequently, the current isIII. ANALYSIS OF POWER CONSUMPTION
BY SIMULATIONThe current source is difficult to actualize. In thissimulation, the operation of the current source gate drive
circuit with continuous current by using the ideal current
source. In addition,The power consumption of three types
gate drive circuits are analyzed by simulation.
Fig. 7 (a) shows the operation result of the continuous
current, Fig. 7 (b) shows the operation result of the
discontinuous current when the switching frequency is 1
MHz. The gate voltage of the MOSFET is realized from 12 V to +12 V in Fig. 7 (a) and (b). However, in thecontinuous current, the input current is constant value
because this mode is used the current source.
Consequently, the power consumption of the gate drive
circuit with continuous current is high because
conduction losses are increased due to the high input
current. On the other hand, in the discontinuous current,
the reactor current IL is zero when the all MOSFET areturned off. As a result, the power consumption of the gate
drive circuit with discontinuous current is lower thancontinuous current.
Fig. 8 shows the comparison results of the power
consumption of each gate drive circuit. Table. 1 shows
the condition of the simulation. The same main MOSFET
is used in this simulation.. Besides, when the current
source gate drive circuit is evaluated, the discharge andcharge times of the capacitance between the gate andsource Tii and Tiv are one tenth in regard of the switching
period Tsw.
From the results, the power consumption of the current
source gate drive circuit with the continuous current islarge because the current for the gate drive is always flew,
since the conduction loss is increased. On the other hand,the difference of power consumption between the voltage

FET gate voltage Vgs [V]100-10
FET gate current Igs [A]10-1
Input current Iin [A]1.00.5Time 1 [msec]

0(a) Continuous current mode
FET gate voltage Vgs [V]100-10
FET gate current Igs [A]10-1
Input reactor current IL [A]
1.0
0.5
0
Time 1 [msec](b) Discontinuous current mode
Fig. 7. Simulation waveforms.

Power consumptionof the gate drive circuit [mW]

not flew to the input reactor L excepted for the charging
time of input reactor L (MODE I, IV) and the discharge
and charge time of the capacitance between the gate andthe source Cgs (MODE II, V). As a result, the power
consumption can be reduced than that of the current
source gate drive circuit when the current is continuance.
1) MODE I [0 ≤ t ≤Ti] : The energy is charged to the
input reactor L by turning on the S1 and S2.
2) MODE II [Ti ≤ t ≤ Tii] : The energy of the input
reactor is added to the DC power source by turning
off the S2 and turning on the S4. Then, thecapacitance between the gate and the source Cgs ischarged to the positive voltage. In this operationmode, the input reactor current IL becomessinusoidal waveform. When the input reactor
current is cross the zero point, the mode is changed
to MODE III after the S2 is turned off.
3) MODE III [Tii ≤ t ≤ Tiii] : The gate voltage is heldby turning off the all MOSFET for driving.
MODE IV- VI of the operations is similar to MODE IIII although the voltage polarity of the capacitance
between the gate and the source Cgs is opposite.

2000
Current source(continuous current)

1500
1000
500

Voltage source
Current source(discontinuous current)

0
100

200
500
1000
2000
Switching frequency fsw [kHz]Fig. 8. Comparison of power consumption among
the gate drive circuits by simulation results.
Table. 1. Conditions for loss comparison by simulation.
±12 V
85 nH
1180 pF
MOSFET:IRFML8244TRPbF(IR)On resistance RDS
0.024W

Gate source voltage Vgs
Input reactor L
FET Gate capacitance Cgs
Switching device

source and the current source becomes small when thecurrent source gate drive circuit with discontinuous
current at the switching frequency of 100 kHz. It isbecause the input reactor is used in the current sourcegate drive circuit with discontinuous current As a results
the decreasing effect of the driving loss is dominantly
appeared in the switching frequency is beyond 1 MHz.
For example, the power consumption can be reduced 42%
compared with the voltage source gate drive circuit
because the power consumption in the gate driveresistance RG disappears. As a result, when the proposedcurrent source gate drive circuit is used, the power
consumption can be significantly reduced at over 1 MHz.
IV. EXPERIMENTAL RESULTS
The conventional voltage gate drive circuit and thecurrent source gate drive circuit with discontinuous
current are experimentally verified by the switching test
in order to investigate the availability of the current
source gate drive circuit with discontinuous current. In
this chapter, the current source gate drive circuit with
continuous current is not tested because it is obvious thatthe power consumption is higher than that of the current
source gate drive circuit with discontinuous current by
simulation results. It is because the conduction loss of theauxiliary MOSFET is large due to long time of
circulation current.

A. Confirmation of the operation by prototype
Fig. 9 shows the circuit configuration of the switching
test. Table. 2 shows the parameter of each elements. The
conventional voltage source gate drive circuit and thecurrent source gate drive circuit with discontinuous mode
are used to drive the main MOSFET on the switching test.
In addition, the switching frequency is changed from 100
kHz to 1 MHz
Fig. 10 and Fig. 11 shows the gate voltage Vgs and the
input current Iin or input reactor IL current when theconventional voltage source gate drive circuit and thecurrent source gate driver circuit are used. These gate

FET gate voltage Vgs [10 V/div]0

L
Input reactor current IL [1 A/div]

D

R

0Time 200 [nsec]

Vin

C
Vgs

Fig. 11. The gate voltage and the input current of
the gate drive circuit using the current source gate
drive circuit.

VDS

Gate voltage Vgs (20 V/div)

ID FET

Fig. 9. The circuit diagram of the switching test.

0

Table. 2. Condition for switching test.
Input voltage Vin
Input capacitance C
Lode reactor L
Lode resistance R

Main
circuit

48 V
4500 mF
45 mH
2.5 W

Gate
Gate voltage Vgs
±12 V
drive
Gate resistance RG
9.4 W
circuit
MOSFET:IRFML8244TRPbF(IR)
Switching device
for gate drive
0.024 WOn resistance RDS
Switching device
for main circuit
Diode

MOSFET:IRFB4020PbF(IR)1180 pF
FET Gate capacitance Cgs
SCS220KG (Rohm)

Drain-Source
Voltage VDS(50 V/div)0

Drain Current Id (5 A/div)0Time (2 ms/div)

Fig. 12. Measurement waveform of switching test
using the voltage source gate drive circuit.
(fsw = 100 kHz)
Gate voltage Vgs (20 V/div)0

FET gate voltage Vgs [10 V/div]0

Drain-Source
Voltage VDS(50 V/div)0

Input current Iin [1 A/div]

Drain Current Id (5 A/div)0Time 200 [nsec]

Fig. 10. The gate voltage and the input current of thegate drive circuit using the conventional voltage
source gate drive circuit.

0Time (2 ms/div)

Fig. 13. Measurement waveform of switching test
using the current source gate drive circuit.
(fsw = 100 kHz)B. Compare the power consumption
Fig. 16 shows the power consumption of themeasurement results of the conventional voltage sourcegate drive circuit and the current source gate drive circuit

Gate voltage Vgs (20 V/div)0

Drain-Source
Voltage VDS(50 V/div)0

Drain Current Id (5 A/div)0Time (200 ns/div)

Fig. 14. Measurement waveform of switching test
using the voltage source gate drive circuit.
(fsw = 1 MHz)
Gate voltage Vgs (20 V/div)0

Drain-Source
Voltage VDS(50 V/div)0

Drain Current Id (5 A/div)0Time (200 ns/div)

Fig. 15. Measurement waveform of switching test
using the current source gate drive circuit.
(fsw = 1 MHz)
1500

Power consumptionof the gate drive circuit [mW]

voltage Vgs are achieved from -12 V to +12 V in Fig. 10
and Fig. 11. In addition, the maximum input current andthe maximum input reactor current are same value inorder to fairly compare the power consumption and theswitching losses of the two gate drive circuits. On theother hand, the input voltage of two gate drive circuits isdifferent. The input voltage of the conventional voltage
gate drive circuit is 12 V. However the input voltage ofthe current source gate drive circuit is lower than anotherone. The low input voltage becomes an advantage for
reduction of the power consumption of the gate drive
circuit.
Fig. 12 and Fig. 13 shows the experimental results ofthe switching test when the conventional voltage sourcegate drive circuit and the current source gate drive circuit
are used at the switching frequency is 100 kHz. It is
confirmed that the MOSFET is operated at the switchingfrequency of 100 kHz in Fig. 12 and Fig. 13. However,
the gate voltage of the waveforms is vibrated when twogate drive circuit are used. This reason is resonancebetween the capacitance Cgs and the parasitic inductanceof the wiring from the main MOSFET to the gate drive
circuit after the charging of the capacitance between thegate and the source is finished. However, it is not a
problem because the voltage of the vibration in the gate
voltage is the outside range which is higher and lower
than the threshold voltage of the main MOSFET.
Fig. 14 and Fig. 15 show the experimental results ofthe switching test when the conventional voltage sourcegate drive circuit and the current source gate drive circuit
are used at the switching frequency of 1 MHz, Fig. 12shows the experimental results of the switching test using
the current source gate drive circuit at the same switchingfrequency of the conventional voltage source gate drive
circuit. It is confirmed the MOSFET is operated at theswitching frequency of 1 MHz in Fig. 14 and Fig. 15.
However, the gate voltage of the MOSFET is vibrated
similar to the experimental result at the switchingfrequency of 100 kHz. Furthermore, in the current sourcegate drive circuit, the gate voltage is rising during thefalling of the gate voltage when the gate voltage ischanged from positive to negative. This voltage rising is
caused due to setting of the overlap time for the switchingpattern of the gate drive circuit. The MODE I and II (orIV and V) simultaneously occurs in the switching patternwhen the gate signal has the overlap time. As a result, thegate voltage is changed during the overlap time. However,
the temporary falling and rising of the gate voltage aresmall if the overlap time is short. In the experimental
results, the voltage falling and raising is does not affect tothe erroneous ignition of the main MOSFET because thisphenomenon occurs under the threshold voltage of themain MOSFET.

1000
Voltage source

500

0
100

Current source

200
500
Switching frequency fsw [kHz]1000

Fig. 16. Comparison of power consumption between
two gate drive circuits.
when the main MOSFET is operated. The power
consumption of two gate drive circuits is measured when
the switching frequency is changed from 100 kHz to 1
MHz. The maximum input current and the maximum
input reactor current are constant value of 1.3 A in thetwo gate drive circuits. In addition, the power
consumption of the two gate drive circuits is measured at
the switching test.
The switching frequency is 100 kHz in Fig. 16, thepower consumption of the current source gate drive
circuit is 0.056 W, the power consumption of theconventional voltage source gate drive circuit is 0.082 W.
It is considered the power consumption can be reduced by31.7% using the current source gate drive circuit.
Moreover, the switching frequency is 1 MHz in Fig. 16,
the power consumption of the current source gate drive
circuit is 0.48 W, the power consumption of theconventional voltage source gate drive circuit is 1.1 W.
As a result, it is confirmed the power consumption of thegate drive circuit is reduced by 56.4 % when the current
source gate drive circuit is used. Therefore, the gate drive
circuit of the current source gate drive circuit can greatly
reduce the power consumption when the switchingfrequency is high. It is due to the charging energy of thecapacitance between the gate and the source isregenerated to the power supply when the reverse polarity
voltage is input at the MODE II and MODE V of thecurrent source gate drive circuit. In consequently, lowloss gate drive circuit is achieved by the current sourcegate drive circuit at the high frequency.
C. Compare the switching loss
The switching loss is calculated by measuring thevoltage VDS between the drain and the source, and thedrain current ID is obtained from the switching test.
Fig. 17 and Fig. 18 show the waveform of the voltage
Drain Current
ID (2 A/div)

Drain-Source
Voltage VDS(10 V/div)

between the drain and the source VDS and the draincurrent ID using the conventional gate drive circuit andthe current source gate drive circuit. It is confirmed the
MOSFET is operated in the same way between at both of
the two gate drive circuits when the switching frequency
is 100 kHz. The maximum surge voltage between thedrain and the source is 183 V when the conventional
voltage source gate drive circuit is used. On the other
hand, the maximum surge voltage between the drain andthe source voltage is 153 V when the current source gate
drive circuit is used. The maximum surge voltage is small
when the current source gate drive circuit is used.
Fig. 19 and Fig. 20 shows the waveform of the voltage
between the drain and the source VDS and the draincurrent ID using the conventional gate drive circuit andthe current source gate drive circuit. It is considered the
MOSFET is same switching using the two gate drive
circuits when the switching frequency is 1 MHz. It is
confirmed that the MOSFET can be operated similar tooperate at the 100 kHz when the switching frequency is 1
MHz in Fig. 19 and Fit. 20. However, the maximum
surge voltage between the drain and the source VDS using

Drain Current
ID (2 A/div)

Drain-Source
Voltage VDS(10 V/div)

183 V

153 V

0

0
Drain Current ID(2 A/div)

Time (5 ns/div)

Drain-Source
Voltage VDS(30 V/div)

Drain Current ID(2 A/div)

Time (5 ns/div)

Drain-Source
Voltage VDS(30 V/div)

Time (5 ns/div)

Time (5 ns/div)(a) Turn on(b)Turn off
Fig. 17. Measurement waveform of switching test
using the conventional voltage source gate drive
circuit(fsw = 100 kHz).

(a) Turn on(b)Turn off
Fig. 18. Measurement wave form of the switching
test using the current source gate drive circuit(fsw = 100 kHz).

Drain-Source
Voltage VDS(10 V/div)

Drain Current
ID (2 A/div)

Drain-Source
Voltage VDS(10 V/div)

189 V

Drain Current
ID (2 A/div)

161 V

0

0
Drain Current ID(2 A/div)

Time (5 ns/div)

Drain-Source
Voltage VDS(30 V/div)

Drain Current ID(2 A/div)

Time (5 ns/div)

Drain-Source
Voltage VDS(30 V/div)

Time (5 ns/div)

Time (5 ns/div)(a) Turn on(b)Turn off
Fig. 19. Measurement waveform of switching test
using the conventional voltage source gate drive
circuit (fsw = 1 MHz).

(a) Turn on(b)Turn off
Fig. 20. Measurement wave form of the switching
test using the current source gate drive circuit(fsw = 1 MHz).

V. CONCLUSION
In this paper, three types of the gate drive circuits;
voltage source, current source with continuous current
and current source with discontinuous current gate drive
circuits are compared from the view point of power
consumption and the switching losses of the MOSFET.
The power consumption of the gate drive circuit isreduced by 56.4% compared with the voltage source gate
drive circuit by switching test at 1 MHz when the current
source gate drive circuit with discontinuous current isused. Secondary, the switching losses are evaluatedexperimental results. The turn on loss and the turn off
loss are almost same value because the input peak currentof the conventional voltage source gate drive circuit andthe input reactor peak current of the current source gate
drive circuit with discontinuous current are same.
Therefore, the current source gate drive circuit withdiscontinuous current can be used without increasing theswitching loss of the main MOSFET similar to theconventional voltage source gate drive circuit. That is
because the rise time and the fall time of the gate voltage
on main MOSFET is same time.

2.0

Switching loss Psw [W]

the current source gate drive circuit is 161 V. In contrast,
the maximum surge voltage between the drain and thesource VDS is 189 V when the conventional voltage
source gate drive circuit. Consequently, the maximum
surge voltage between the drain and the source VDS of thecurrent source gate drive circuit is lower than themeasurement results using the conventional voltage
source gate drive circuit. This is due to the difference ofthe falling waveform between the gate voltage using thecurrent source gate drive circuit and the conventional
voltage source gate drive circuit.
Fig. 21 shows the turn on and the turn off switchinglosses of the MOSFET when two gate drive circuit areused. The turn on and the turn off switching losses using
each gate drive circuit are increased when the draincurrent ID is increased. The turn on loss is 1.34 W when
the conventional voltage source gate drive circuit is used,
the turn on loss is 1.4 W when the current source gate
drive circuit is used at the switching frequency of 1 MHz
and the drain current of 9 A. As a result, the turn on loss
when the current source gate drive circuit is similar tothat when the conventional voltage source gate drive
circuit is used. That is because the input peak current iinof the conventional voltage source gate drive circuit andthe input reactor current iL of the current source gate drive
circuit is same value which is 1.3 A.
Similarly, the turn off loss is little different between
the conventional current source gate drive circuit and thecurrent source gate drive circuit. The turn off loss is 1.76
W using the conventional voltage source gate drive
circuit. Additionally, the turn off loss is 1.54 W at thedrain current of 9 A when the current source gate drive
circuit is used. That is because same reason of the turn on
loss.

:Voltage source:Current source

Turn off

1.5
1.0

Turn on

0.5
0

0

2

4
6
8
Drain current ID [A]10

Fig. 21. Comparison of each switching loss between
two gate drive circuits.
REFERENCES[1] S. Safari, A. Castellazzi, P. Wheeler:” Experimental andAnalytical Performance Evaluation of SiC Power Devices
in the Matrix Converter” ， IEEE Trans. On PowerElectronics，Vol. 29，No. 5，pp. 2584-2596(2014).
[2] Di Han, J. Noppakunkajorn, B. Sarlioglu:” Comprehensive
Efficiency, Weight, and Volume Comparison of SiC- and
Si-Based Bidirectional DC–DC Converters for HybridElectric Vehicles”, IEEE Trans. On Vehicular Technology,
Vol. 63，No. 7，pp. 3001-3010(2014)[3] G. Calderon-Lopez, A.J. Forsyth, L. Gordon, J.R.
McIntosh:” Evaluation of SiC BJTs for High-Power DC–
DC Converters”，IEEE Trans. On Power Electronics，Vol. 29，No. 5，pp. 2474-2481(2014)[4] F. Filsecker, R. Alvarez, S.Bernet:” Evaluation of 6.5-kV SiC
p-i-n Diodes in a Medium-Voltage, High-Power 3L-NPC
Converter”，IEEE Trans. On Power Electronics，Vol. 29，
No. 10，pp. 5148-5156(2014)[5] P. Ransted, H.P. Nee, J. Linner, D. Peftitsis:” AnExperimental Evaluation of SiC Switches in SoftSwitching Converters” ， IEEE Trans. On PowerElectronics，Vol. 29，No. 5，pp. 2527-2538(2014)[6] J. Jordan, V. Esteve, E. Sanchis-Kilders, E.J. Dede, E.
Maset, J.B. Ejea, A. Ferreres: “A Comparative
Performance Study of a 1200 V Si and SiC MOSFET
Intrinsic Diode on an Induction Heating Inverter”, IEEE
Trans. On Power Electronics, Vol. 29, No. 5, pp. 25502562 (2014)[7] H. Fujita: “A Resonant Gate-Drive Circuit Capable ofHigh-Frequency and High-Efficiency Operation”, IEEE
Trans. On Power Electronics, Vol. 25, No. 4, pp. 962-969(2010)[8] T. Noguchi, S. Yajima, H. Komatsu: “Development ofGate Drive Circuit for Next-Generation Ultra High – Speed
Switching Dvices”, IEEJ Trans. On Industry Applications,Vol. 129, No. 1, pp. 46-52(2009)[9] T. Noguchi, M. Mizuno: “ High-Speed Switching
Operation of MOSFETs Using Auxiliary Circuit Shorting
Load”, International Conf. Renewable Energy Researchand Applications, pp. 1-6(2012).