CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

200Gb/s QSFP DD PSM8 2km Optical Transceiver
CADM-SPO201-FR8CFeatures

8 channels full-duplex transceiver modules

Supports 8×25Gb/s aggregate bit rates



Supports 8×10Gb/s aggregate bit rates if required

8 channels 1310nm DFB



8 channels PIN photo detector arrayInternal CDR circuits on both receiver and transmitter channels

Support CDR bypass

Low power consumption <6W



Hot Pluggable QSFP DD form factorUp to 2km reach for G.652 SMFSingle male MPO(APC 8-degree) connector receptacle



Operating case temperature 0℃ to +70℃

3.3V power supply voltage

RoHS 2.0 compliant (lead free)Applications
2×100G Ethernet links

Infiniband DDR/EDR



Datacenter and Enterprise networking

Description
CA OPTRONICS GROUP Technologies CADM-SPO201-FR8C is a Eight-Channel, Pluggable, Parallel, Fiber-Optic
QSFP DD PSM8 for 2×100 Gigabit Ethernet , Infiniband DDR/EDR Applications. This transceiver is a highperformance module for data communication and interconnect applications. It integrates eight data lanes in eachdirection with 208 Gbps bandwidth. Each lane can operate at 26Gbps up to 2km over G.652 SMF. These modules
are designed to operate over singlemode fiber systems using a nominal wavelength of 1310nm. The electricalinterface uses a 76 contact edge type connector. The optical interface uses an 24 fiber MTP (MPO) connector. This
module incorporates CA OPTRONICS GROUP proven circuit and Optical technology to provide reliable long life,high performance, and consistent service.

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1CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Figure 1. Module Block Diagram

The 200Gb/s QSFP DD PSM8 is one kind of parallel transceiver. DFB and PIN array package is key technique,through I2C system can contact with module.

Absolute Maximum Ratings
Parameter

Symbol

Min

Max

Unit

Supply Voltage

Vcc

-0.3

3.6

V

Input Voltage

Vin-0.3

Vcc+0.3

V

Storage Temperature

Ts-20

85℃

Case Operating Temperature

Tc

070℃

Humidity (non-condensing)

Rh

595%

Recommended Operating Conditions
Parameter

SymbolMin

TypicalMax

Unit

Supply Voltage

Vcc

3.13

3.33.47

V

Operating Case Temperature

Tc

070℃

Data Rate Per Lanefd

10.3125

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2CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Parameter

SymbolMin

HumidityRh

5Power Dissipation

Pm

Fiber Bend Radius

Rb

TypicalMax

Unit

85%

6W

2km

5.28
0.002

Electrical Specifications
Parameter

SymbolMin

TypicalMax

Unit

Differential Input Impedance

Zin

90

100110ohm

Differential Output ImpedanceZout

90100110ohm

Differential Input Voltage Amplitude1ΔVin

190

700

mVp-p

Differential Output Voltage Amplitude2

ΔVout

300850mVp-p

Input Logic Level HighVIH

2.0VccV

Input Logic Level Low

VIL00.8

V

Output Logic Level High

VOH

Vcc-0.5

Vcc

V

Output Logic Level Low

VOL00.4

V

Note:
1. Differential input voltage amplitude is measured between TxnP and TxnN.
2. Differential output voltage amplitude is measured between RxnP and RxnN.

Optical Characteristics
Parameter

SymbolMin

TypicalMax

Unit

λc1295

1310

1325

nm

Side Mode Suppression Ratio

SMSR30-

Average Launch Power (each lane)

PAVG

-6-

Transmitter
Center Wavelength

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dBm
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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Parameter

Symbol

Min

Optical Modulation Amplitude (each lane)

POMA-5.0

TypicalMax

Unit

2.2dBm

2.9dB

TDP,each lane

TDP

Extinction Ratio

ER

Relative Intensity Noise

RIN

-128

dB/Hz

Optical Return Loss Tolerance

TOL

20dB

Transmitter Reflectance

RT-12dB

Average Launch Power of OFF Transmitter (eachlane)

POFF-30dB

Eye Mask Coordinates1: X1, X2, X3, Y1, Y2, Y3{0.31,0.4,0.45,0.34,0.38.0.4}

3.5

dB

Hit Ratio = 5x10-5

ReceiverCenter Wavelength

λc

1295

Damage Threshold,each lane

THd

3.0

Average Receive Power,

each lane

1310

2.0

dBm

2.2

dBm

RR-26

dBm

SEN

-11.35dBm

Receive power, each lane (OMA) (max)Receiver Sensitivity (OMA),

each lane

nmdBm-12.66

Receiver Reflectance1325

LOS Assert

LOSA

-18

dBm

LOS De-Assert – OMA

LOSD

-15

dBm

LOS Hysteresis

LOSH

0.53dBNote:
1. Even if the TDP<1dB,the OMA min must exceed the minimum value specified here.
2. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input
signal having this power level on one lane. The receiver does not have to operate correctly at this input power.
3. Sensitivity is specified at 5x10^-5 BER at 25.78125Gb/s.

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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Pin Description

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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Figure 2. Electrical Pin-out Details

ModSelL Pin
The ModSelL is an input signal that must be pulled to Vcc in the QSFP-DD module. When held low by the host, themodule responds to 2-wire serial communication commands. The ModSelL allows the use of multiple QSFP-DDmodules on a single 2-wire interface bus. When ModSelL is “High”, the module shall not respond to or acknowledge
any 2-wire interface communication from the host.

In order to avoid conflicts, the host system shall not attempt 2-wire interface communications within the ModSelL
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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

de-assert time after any QSFP-DD modules are deselected. Similarly, the host must wait at least for the period of theModSelL assert time before communicating with the newly selected module. The assertion and de-asserting periodsof different modules may overlap as long as the above timing requirements are met.

ResetL Pin
The ResetL signal shall be pulled to Vcc in the module. A low level on the ResetL signal for longer than the minimum
pulse length (t_Reset_init) (See Table 13 ) initiates a complete module reset, returning all user module settings totheir default state.

InitMode Pin
InitMode is an input signal. The InitMode signal must be pulled up to Vcc in the QSFP-DD module. The InitModesignal allows the host to define whether the QSFP-DD module will initialize under host software control (InitModeasserted High) or module hardware control (InitMode deasserted Low). Under host software control, the module shallremain in Low Power Mode until software enables the transition to High Power Mode, as defined in Section 7.5.
Under hardware control (InitMode de-asserted Low), the module may immediately transition to High Power Modeafter the management interface is initialized. The host shall not change the state of this signal while the module ispresent. In legacy QSFP applications, this signal is named LPMode. See SFF-8679 for signal description.

ModPrsL Pin
ModPrsL must be pulled up to Vcc Host on the host board and grounded in the module. The ModPrsL is asserted“Low” when the module is inserted and deasserted “High” when the module is physically absent from the hostconnector.

IntL Pin
IntL is an output signal. The IntL signal is an open collector output and must be pulled to Vcc Host on the host board.
When the IntL signal is asserted Low it indicates a change in module state, a possible module operational fault or astatus critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. TheIntL signal is deasserted “High” after all set interrupt flags are read.

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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Power Supply Filtering
The host board should use the power supply filtering shown in Figure 3.

Figure 3. Host Board Power Supply Filtering

Optical Interface Lanes and Assignment
The optical interface port is a male MPO24 connector .

Figure 4. Optical Receptacle and Channel Orientation

DIAGNOSTIC MONITORING INTERFACE
Digital diagnostics monitoring function is available on all CA OPTRONICS GROUP QSFP DD products. A 2-wireserial interface provides user to contact with module.

The structure of the memory is shown in Figure 5. The memory space is arranged into a lower, single page, address
space of 128 bytes and multiple upper address space pages. This structure permits timely access to addresses in thelower page, e.g. Interrupt Flags and Monitors. Less time critical entries, e.g. serial ID information and thresholdsettings, are available with the Page Select function. The structure also provides address expansion by adding
additional upper pages as needed.

The interface address used is A0xh and is mainly used for time critical data like interrupt handling in order to enable a
one-time-read for all data related to an interrupt situation. After an interrupt, IntL, has been asserted, the host canread out the flag field to determine the affected channel and type of flag.
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9CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Figure 5. QSFP28 Memory Map

Figure 6. Low Memory Map

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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Figure 7. Page 00 Memory Map

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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Timing for Soft Control and Status Functions

Figure8. Timing Specifications

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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

Mechanical Dimensions

Figure10. Mechanical Specifications

Regulatory Compliance
CA OPTRONICS GROUP CADM-SPO201-FR8C transceiver are Class 1 Laser Products. They are compliant
with the followingstandards:
FeatureLaser Safety

Electrical Safety

Environmental protection

CE EMCFCC

CA OPTRONICS GROUP INC

Standard
IEC 60825-1:2014 (3rd Edition)
IEC 60825-2:2004/AMD2:2010
EN 60825-1-2014
EN 60825-2:2004+A1+A2
EN 62368-1: 2014
IEC 62368-1:2014
UL 62368-1:2014
Directive 2011/65/EU with amendment(EU)2015/863
EN55032：2015
EN55035：2017
EN61000-3-2:2014
EN61000-3-3:2013
FCC Part 15, Subpart B
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CADM-SPO201-FR8C 200Gb/s QSFP DD PSM8 2km Optical Transceiver R01

References
1. QSFP DD MAS Rev4.0
2. Ethernet 100GBASE-PSM4 IEEE802.3bm

CAUTION:Use of controls or adjustment or performance of procedures other than those specified herein may result inhazardous radiation exposure.

Ordering Information
Part Number

Product Description

CADM-SPO201-FR8CQSFP DD, 2x100GBASE-PSM4, MPO Connector, reach 2km on G.652

Important Notice
Performance figures,data and any illustrative material provided in this data sheet are typical and must be specificallyconfirmed in writing by C A OP TRO N IC S GR O U P before they become applicable to any particular order orcontract. In accordance with the CA OPTRONICS GROUP policy of continuous improvement specifications maychange without notice.

The publication of information in this data sheet does not imply freedom from patent or other protective rights of CA
OPTRONICS GROUP or others. Further details are available from any CA OPTRONICS GROUP sales
representative.

E-mail:sales@caoptronicsgroup.com
Official Site:www.caoptronicsgroup.com

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