Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT3114-PQC
DC-6Gbps/7GHz LVDS-to-3PCML Converter

Optional activation/deactivation of ports 1 and 3

Matched phase delays for all outputs

Single +3.3V power supplyPower consumption: 150mW with one port activated or 350mW with all ports activatedFabricated in SiGe for high performance, yield, and reliability

Standard QFN 24-pin package.

Rev. 1.0.21817vcc

One LVDS input signal port and three differential PCML output signal ports

out1nvcc

Exhibits low jitter and limited temperature variation over industrial temperature range

out1p

vcc

Medium-speed broadband Interface converter and Distributorvee

vcc

21

10inn

22

ASNT3114 9

out2pvcc

23

8

out2nvee

247vcc

12

3

4

5

6
off_1_3vcc

vcc

11

out3p

20

nc

inp

out3n

19vcc

vcc

16 15 14 13
121veevcc

January 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

out1n

out1p

DESCRIPTION

5050

off_1_350
inp

out2p100

out2ninn50
50

out3p

out3n50

Fig. 1. Functional Block Diagram

The temperature stable ASNT3114-PQC SiGe IC provides interface conversion from LVDS to positive
CML and active broadband data/clock signal splitting. It is intended for use in measurement / test
equipment. The IC shown in Fig. 1 accepts a medium-speed data/clock signal at its LVDS input port
inp/inn and provides three matched copies of this signal at its PCML output ports out1p/out1n,out2p/out2n, out3p/out3n. The ports 1 and 3 can be activated, or deactivated through the external
control port off_1_3.
The part’s input is a true LVDS logic interface with on chip 100Ohm differential termination and hightolerance to common-mode voltage variation. The output ports support the CML logic interface with onchip 50Ohm termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any
combination. The differential DC signaling mode is recommended for optimal performance.

POWER SUPPLY CONFIGURATION
The part operates with a positive supply (vcc = +3.3V and vee = 0.0V = ground). All outputs need ACtermination when connected to any devices with 50Ohm termination to ground.

Rev. 1.0.2

2January 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ABSOLUTE MAXIMUM RATINGS
Caution: Exceeding the absolute maximum ratings may cause damage to this product and/or lead toreduced reliability. Functional performance is specified over the recommended operating conditions forpower supply and temperature only. AC and DC device characteristics at or beyond the absolutemaximum ratings are not assumed or implied. All min and max voltage limits are referenced to ground.
Table 1. Absolute Maximum Ratings

Parameter
Supply Voltage (vcc)
Power supply current
RF Input Voltage Swing (SE)
Case Temperature
Storage Temperature
Operational Humidity
Storage Humidity

Min-40
1010

Max
+3.6
125
0.6
+90+1009898Units
VmA
VºCºC%%TERMINAL FUNCTIONSTERMINAL
NameNo.
Typeinpinn
out1p
out1n
out2p
out2n
out3p
out3n
off_1_3

Namevccveenc
Rev. 1.0.2

DESCRIPTION

Medium-Speed I/OsLVDSi Differential data/clock inputs with internal differential 100Ohm
nput termination between the lines
CML Differential high speed data/clock outputs with internal SE 50Ohm
output termination to vcc. Require external SE 50Ohm termination to vcc
CML Differential high speed data/clock outputs with internal SE 50Ohm
output termination to vcc. Require external SE 50Ohm termination to vccCML Differential high speed data/clock outputs with internal SE 50Ohm
output termination to vcc. Require external SE 50Ohm termination to vcc
DC Control Port
63.3V Channel activation signal (active: high, outputs 1 and 3 are disabled;
CMOS default: low, all outputs are enabled)
Supply and Termination Voltages
Description
Pin Number
Positive power supply (+3.3V)
1, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23
Negative power supply (0V)
12, 18, 24

20
22
16
14
10
84
2No connection

33January 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ELECTRICAL CHARACTERISTICSPARAMETER

MIN

TYP

MAX UNITCOMMENTS
General Parameters
3.1
3.3
3.5
V
±6%
vcc
0.0
V
External ground
vee
Ivcc
50mA
Output port 1 active
115mA
All output ports active
Power consumption
165
380mW
Junction temperature -40
25125°C
Input Data/Clock (inp/inn)
DC6Gbps
Input common mode voltage >0.8V
Data Rate
DC4Gbps
Input common mode voltage >0.6V
Clock FrequencyDC7GHz
Amplitude
250
400
V
Differential
CM Voltage Level
0.63.0V
Output Data/Clock (out0p/out0n, out1p/out1n, out2p/out2n)
DC6Gbps
Input common mode voltage >0.8V
Data Rate
DC4Gbps
Input common mode voltage >0.6V
Clock Frequency
DC
7
GHz
Logic “1” level
Vvcc
Logic “0” levelvcc-0.5
vcc-0.4
V
With external 50Ohm DC termination
Latency180
250
ps
From input to any output
Phase mismatch
1ps
Between any two SE outputs
Rise/Fall times
101418ps
20%-80%
Output Jitter5ps
Peak-to-peak, for PRBS
Duty cycle
455055%For clock signal

PACKAGE INFORMATIONThe chip die is housed in a standard 24-pin QFN package shown in Fig. 2. It is recommended that thecenter heat slug located on the back side of the package is soldered to ground to help dissipate heatgenerated by the chip during operation.
Rev. 1.0.2

4January 2020

Advanced Science And Novel Technology Company, Inc.
2790 Skypark Drive Suite 112, Torrance, CA 90505

Offices: 310-530-9400 / Fax: 310-530-9402
www.adsantec.com

ASNT3114
Fig. 2. QFN 24-Pin Package Drawing (All Dimensions in mm)

The part’s identification label is ASNT3114-PQC. The first 8 characters of the name before the dashidentify the bare die including general circuit family, fabrication technology, specific circuit type, and partversion while the 3 characters after the dash represent the package’s manufacturer, type, and pin outcount.
This device complies with the Restriction of Hazardous Substances (RoHS) per 2011/65/EU for all ten
substances.

REVISION HISTORY
Revision
1.0.2

Date01-2020

0.0.1

01-2019

Rev. 1.0.2

Changes
Corrected Header
Corrected current and power consumption
Corrected clock frequency
Preliminary release
5January 2020