Intra-arm Balancing Control of Cascaded Multi-Port Converter
for Whole Power Unbalance Conditions
Takumi Yasuda and Jun-ichi Itoh
NAGAOKA UNIVERSITY OF TECHNOLOGY
1603-1, Kamitomioka-machi, Nagaoka, Niigata, Japan
Tel.: +81 / (258) – 47.9533.
E-Mail: t_yasuda@stn.nagaokaut.ac.jp, itoh@vos.nagaokaut.ac.jp
URL: http://itohserver01.nagaokaut.ac.jp/itohlab/en/index.html

Keywords«Modular Multilevel Converters (MMC)», «Load imbalance», «Capacitor voltage balancing», «ACDC converter», «Charging infrastructure for EV´s»

Abstract
This paper proposes a capacitor voltage balancing control for load imbalance among cells in acascaded multi-port converter. The input/output power of the cell is controlled by adjusting the ac-side
voltage of the cell to balance the capacitor voltage even when the load imbalance occurs in the arm. The
current of the multi-port converter with the conventional controller can distort due to overmodulation of
the cell under the large load imbalance. The proposed controller prevents overmodulation with the
improved generation method of the ac-side voltage, which extends the operation region with respect tothe power imbalance. Furthermore, the proposed controller injects minimal additional circulating current
to achieve the operation for whole power conditions. The experimental results reveal that the proposed
controller improves the total harmonic distortion of the grid current by 2.9p.t. with minimal circulating
current while achieving the capacitor voltage balancing.

Introduction
Recently, cascaded multi-port converters have been actively researched as a decentralized batteryenergy storage system [1]-[6], an integrated PV power conditioner [7]-[10], and so on [11], [12]. The
cascaded configuration of cells realizes a grid connection without a bulky line frequency transformer[13], [14]. In addition, a filter on the ac-side is
Arm-ruArm-suArm-tudownsized due to the multilevel operation
iarm
cell
cell
cell
compared to conventional 2-level converters [2],
cell
1
1
1
[15].
k
load
load
load
varm,ruload
Fig. 1 shows a cascaded multi-port converter.
cell
cell
cell
The multi-port converter in this paper isNNN
composed of the cascaded chopper cells and has
load
load
load
Pcell,k
MV
L
L
L Arm
no high-voltage dc-link port. The loads, such asACCLeg
Vc,ijkthe battery and EV, are assumed to be connectedvcell,ijk
in parallel to the cell capacitor. Although the rated
L
L
L
load
load
load
voltage and power of the cells are identical, a
cell
cell
cell
power imbalance among the cells can appear due
1
1
1
to the different operation points of the loads
varm,rl
load
load
load
caused by factors such as a slight difference in
cell
cell
cell
parasitic parameters and operating environments.
NN
N
The balancing controller of the multi-port
Arm-rlArm-slArm-tlconverter is required to balance the capacitor
Fig.
1.
Multi-port
converterusing modular
voltage of the cells in spite of the power
multilevel cascaded converter with double-star
imbalance. In other words, the controller for the
chopper cells.
multi-port converter distributes the differentamounts of power to each cell according to the states of the load.
A circulating current is utilized to interact the power between the arms when a power imbalanceoccurs among the arms [4], [12]. Besides, a different ac-side voltage of each cell is applied to distributethe desired power when loads of cells within the arm are not identical. However, there is an operational
limit with respect to the power imbalance because the ac-side voltage of the cells has to avoid
overmodulation to suppress current distortion [5]-[8]. The additional circulating current (intra-arm
balancing current) prevents the overmodulation because the larger arm current reduces the required
amplitude of the ac-side voltage of the cell to gain the desired power. However, the past literature seems
that the intra-arm balancing current controllers have not been proposed with a discussion of a hardware
design of the multi-port converter, including the intra-arm balancing current effect.
This paper proposes an intra-arm balancing controller for the multi-port converter with abidirectional operation, which operates in all possible power conditions with the compensation voltage
injection to the ac-side voltage of the cell and the intra-arm balancing current control. The proposed
controller minimizes the intra-arm balancing current while balancing all the capacitor voltage in theconverter. In addition, the cell of the converter is designed to achieve the operation in whole power
conditions taking into account the effect of the intra-arm balancing current. This paper is organized asfollows; first, the control strategy for the multi-port converter is proposed. Next, the multi-port converter
is designed. Finally, the proposed controller is evaluated by the simulation and the experiment with aminiature model. The experimental results show that the proposed controller prevents theovermodulation of the cells by the minimal intra-arm balancing current and improves the total harmonic
distortion (THD) compared with the conventional controller. Moreover, the intra-arm balancing current
is minimized by the proposed controller.

Controllers for multi-port converter
The objectives of the controller for the multi-port converter are to shape the grid current and tobalance all the cell capacitor voltage in spite of the load imbalance among the cells. In order to achieve
that, the balancing controllers are installed to distribute a different amount of power among the cells.
In this paper, a voltage redundancy  is defined as a ratio of the peak-to-peak value of the grid phasevoltage to the maximum available voltage of the arm in the steady-state as
 :=

NVc

(1)

2 2Vg

where N is the number of cells in one arm, Vc is the capacitor voltage of the cell, and Vg is the RMS
value of the grid phase voltage.

Current controllers and inter-arm balancing controllers
Fig. 2 depicts the proposed control block diagram for the multi-port converter. The grid-side
controller controls the average capacitor voltage in the converter by controlling the input and output
power of the converter and shapes the grid current. The power is distributed evenly to each cell by the
grid-side controller. The balancing controllers redistribute the power to the cells according to the state
Upper arm: 1i  r , s, t
Input current reference
Lower arm: +1*
id
Total power
Grid currentj  u, l±1controller
controller v*
iq*arm,g,iArm voltagek  1, 2,..., N 
reference
Circulating
AC side voltage+
varm,ij*
1 ++Leg balancing
current
reference of cell*
controller+Nvarm,cir,i ++
controller
vcell,ijk*+ Circulating
current
reference icir,i *Intra-arm
Arm balancingbalancing
controller
Compensation
controller
Intra-armvoltage reference
balancing current
Intra-arm
vd,ijk*reference iint,i*balancing current
calculation
Balancing control

Grid-side control

Fig. 2. Proposed control strategy of multi-port converterof the loads in order to control all the capacitor
Vpi,ijk*Compensation
Averaged 1 N+
voltages of the cells to the command value. The
V
capacitor
voltagePIc ,ijkvoltage in arm N k =1
N
reference vd,ijk*
leg balancing controller regulates the averaged
Capacitorg(t)capacitor voltage of the phase by the power
voltage of cell Vc,ijk
distribution utilizing a dc circulating current. The
Reference
Arm current condition
waveformarm balancing controller utilizes the circulating
calculationPower
conditionofcells
current of the fundamental frequency toFig. 3. Block diagram of proposed intra-arm
interchange the power between the upper andbalancing controller with optimized reference
lower arm. The proposed intra-arm balancing
waveform.
current calculation block generates the intra-arm
balancing current command, which is explained
in detail in the following subsection. A sum of the output of the grid current controller and the circulating
current controller is the arm voltage reference, which is assumed as
NVc(2)varm ,ij (t ) =− K j 2Vg cos (g t − i ) ... ( i  r , s, t , j  u, l )2where Ku=1, Kl=−1, g is the angular grid frequency, i is the phase angle (r=0, s=2/3, t=4/3).
Note that (2) neglects the voltage drop on the arm inductor L. This paper defines the arm current as(3)
iarm,ij (t ) := I 0,i + 2I1,ij cos (g t − 1,ij − i ) + iint ,i (t )where I0,i is the dc circulating current of phase i, I1,ij and 1,ij is the RMS value and the phase angle ofthe fundamental frequency component of the arm current, respectively, which is the sum of the gridcurrent and the circulating current for the upper/lower arm balancing, and iint,i is the intra-arm balancing
current. Since there is no high-voltage dc-link port in the multi-port converter, as shown in Fig. 1, thecirculating current circulates through three phase legs. Thus, the circulating current of the three phases
can be different when a power imbalance occurs among the cells.
The sum of the arm voltage reference and the compensation voltage from the proposed intra-arm
balancing controller is the ac-side voltage reference of the cells. This paper adopts the phase-shifted
PWM (PS-PWM), which is suitable for decentralized control [16], [17].

Intra-arm balancing controller
The intra-arm balancing controller regulates the capacitor voltage error among the cells within thearm by injecting the compensation voltage to the ac-side voltage reference of the cells.
Fig. 3 shows the proposed intra-arm balancing controller. The controller feedbacks the capacitor
voltage and regulates the capacitor voltage deviation within the arm to zero. The reference waveform isobtained by multiplying a reference waveform g(t) to an output by the PI controller. Since the commandof the intra-arm balancing controller is the averaged capacitor voltage of the cell within the arm, the sumof the outputs of the PI controllers over the arm is always zero, that is,
N

N

k =1

k =1

 vd* ,ijk (t ) = g (t )Vpi* ,ijk = 0 .

(4)

Eq. (4) implies that the arm voltage, which is the sum of the ac-side voltage of the cells in the arm, is
not affected by the compensation voltage regardless of any selection of the reference waveform g(t).
Therefore, g(t) is designed to guarantee the operation without the overmodulation over wide power
conditions. The boundary of the overmodulation for the compensation voltage is expressed as
varm,ij (t )varm,ij (t ).
(5)−
 vd ,ijk (t )  Vc ,ijk −NN
The maximum amplitude of the compensation voltage is calculated from the arm voltage reference andthe capacitor voltage. Besides, the compensation power Pd,ijk, which is the power obtained by thecompensation voltage, is calculated as
1 Tg(6)
Pd ,ijk =  vd ,ijk (t )iarm,ij (t ) dt
Tg 0
where Tg is a fundamental period. Here, a maximum and minimum compensation power Pd,ij,max and
Pd,ij,min are defined as a maximum and a minimum power in arm-ij which is generated by the intra-arm
balancing controller without the overmodulation with an arbitrary reference waveform g(t), respectively.

In order to prevent diverging the capacitor voltage, the intra-arm balancing controller has to satisfy
1 N
1 N




(7)
Pd ,ij , min  min  Pcell ,ijk −  Pcell ,ijk  , Pd ,ij , max  max  Pcell ,ijk −  Pcell ,ijk  .
kk
N k =1
N k =1For example, the reference waveform g(t) should be adjusted so that the Pd,ij,max becomes large when
there is a significantly heavier load on the cell than the typical load in the arm. On the other hand, g(t)should be adjusted to decrease Pd,ij,min for the significantly lighter load than the typical load. Therefore,g(t) is decided by the loaded conditions of the cells in the arm as,
1 N
1 N




(8)
Pd ,ij ,max : Pd ,ij ,min = max  Pcell ,ijk −  Pcell ,ijk  : min  Pcell ,ijk −  Pcell ,ijk  .
k
k
N
N
k =1
k =1




The proposed intra-arm balancing controller calculates g(t), fulfilling (5) and (8) online.
Fig. 4 shows an example of the ac-side voltage of the cell generated by the proposed intra-arm
balancing controller. The voltage varies
discontinuously according to the polarity of the
Arm current
arm current. The amplitude of the compensation
voltage is decided from the instantaneous arm
Otime
AC-sidevoltage reference.
voltage of cell For heavy load
The operation region with respect to theVcvarm,ij (t )power imbalance is extended by the proposedN
intra-arm balancing controller with the optimized
reference waveform. However, the capacitor
O
time
For light load
voltage balance is not necessarily achieved inwhole power conditions even though the proposed
Fig.4. Example of the ac-side voltage reference
reference waveform is applied. For example, it isof the cell with the compensation voltage
obvious that the compensation voltage does notreference. The loaded condition in the arm iscontribute to the power distribution, and thethat the magnitude of the maximum load
capacitor voltage would diverge in the case of
imbalance in the arm is half of that of theiarm,ij(t)=0 as shown in (6). It means that the intraminimum load imbalance in the arm.
arm balancing current is required under somestartconditions.
*
Iint,ij =Iint,ij,1=Iint,ij,2=0
n=0Intra-arm balancing current calculation
The larger compensation power Pd,ij,max andthe smaller Pd,ij,min reduce the possibility ofovermodulation. The larger intra-arm balancing
current increase Pd,ij,max and decrease Pd,ij,min,which result in the extension of the operation
region. However, the large intra-arm balancing
current injection causes the large switching andconduction losses. Therefore, the proposed intraarm balancing current calculation part in Fig. 2
minimizes the intra-arm balancing controller
online to suppress the loss.
Fig. 5 shows the flowchart of the proposed
intra-arm balancing current calculation. The
controller minimizes the intra-arm balancing
current in the steady-state. First, the proposed
controller calculates the maximum and theminimum compensation power Pd,ij,max and Pd,ij,minfrom the arm current with the discrete integral.
The arm current for the calculation is thecommand value generated by the other balancing
controllers in this paper. Then, the controller
minimizes the intra-arm balancing current with

Input: Loaded condition, Arm current
yes
Iint,ij,1=Iint,ij,0, n=n0

Load imbalance increase?
noyesLoad imbalance decrease?
noIint,ij,2=0, n=0
yes

n>n0 ?
non=n+1

Iint,ij*=Iint,ij,1, n=0^^

Calc. compensation region Pd,ij,max and Pd,ij,minwith discrete integral when Iint,ij=(Iint,ij,1+Iint,ij,2)/2
yes
Iint,ij,1=(Iint,ij,1+Iint,ij,2)/2^

Pd,ij,max>max[Pd,ijk] ?
noIint,ij,2=(Iint ,ij,1+IInt,ij,2)/2

Fig. 5 Minimization strategy of intra-arm
balancing current using bisection and discrete
integral. The maximum value of derived Iint,ij*
in six arms is applied to the converter as theintra-arm balancing current reference.

the bisection by comparing the calculated Pd,ij,max and Pd,ij,min to the loaded condition. The minimizationis performed in each arm. Finally, the maximum value of the derived Iint,ij* for six arms is applied as theintra-arm balancing current Iint*. The intra-arm balancing current Iint,ij* is only updated when the derived
Iint,ij satisfies (7) and is smaller than Iint,ij*, which is the minimum intra-arm balancing current derived in
the last calculation. An update frequency of the intra-arm balancing current reference is set to be
sufficiently low not to interfere with the intra-arm balancing controller in Fig. 3. In addition, a low passfilter with a cut-off frequency of 6.7 Hz is installed on the output of the intra-arm balancing current
calculation to prevent a step change of the current reference. In this paper, the intra-arm balancing
current reference input to the circulating current controller is 1.1 times larger than the derived value
considering the calculation error because the proposed algorithm works as a feed-forward controller.
Iint,ij* is increased temporarily to a sufficiently large value Iint,0 to satisfy (7) when the power
imbalance increases as a result of the load variation. In this paper, Iint,0 is decided from the rated currentof the system and the given arm current condition as

Iint ,ij ,0 = I arm,n 2 − ( I0,i 2 + I1,ij 2 )(9)where Iarm,n is a rated current of the arm. The multi-port converter operates without the overmodulation
with Iint,ij,0 in any loaded conditions if the rated current is designed properly, as in the following section.
The initial interval of the bisection is set to Iint,ij,0 and Iint,ij *, which are (9) and the minimum intra-arm
balancing current derived by the last calculation, respectively. The amplitude of the intra-arm balancing
current can be decreased. Thus, the bisection interval is changed to Iint,ij* and zero when the power
imbalance decreases due to the load variation. Note that this paper assumes that the controller can detect
the loaded condition. This is because the applications of the multi-port converter are the integrated PV
power conditioner and the battery energy storage system, which usually measures the load voltage andthe current to perform the maximum power point tracking or control a state-of-charge.
The frequency of the intra-arm balancing current Iint has to be chosen not to interfere with othercontrollers. Too low frequency of Iint increases the capacitor voltage ripple [18], [19]. On the other hand,
too high frequency of Iint increases the voltage drop on the arm inductor, which may result in thesaturation of the arm voltage. Therefore, this paper adopts the double-frequency component as Iint as(10)
iint ,i (t ) := − 2I int sin ( 2g t − 2i ) .
Note that the phase angle (10) is based on (2).
Fig. 6 compares the intra-arm balancing current Iint required to operate in the power imbalance. The
conventional controller in Fig. 6 utilizes the polarity of the arm current as the reference waveform g(t)[3], [4]. Required Iint becomes larger as the load imbalance increases. The proposed controller reduces
the intra-arm balancing current compared to the conventional controller. It reveals that the proposed
intra-arm balancing controller helps to reduce the arm current of the converter.

Design of switching devices and cell capacitors
Intra-arm balancing
currnet [p.u.]

In this section, the switching devices and the cell capacitors are designed considering the intra-arm
balancing. As described above, the intra-arm
0.6
balancing current is derived by the nonlinear
I0=0p.u.
0.3 Conventional
calculation with the discrete integral and the
I1=0.3p.u.
controller
Proposed controller 1=0
bisection. Therefore, this section presents the
0.0
maximum arm current of the converter with the
0.0
0.5
1.0
Load difference of cell
proposed controller calculated numerically. 64
from averaged load of cells in arm[p.u]million loaded conditions were analyzed.
Fig. 6. Comparison of required intra-arm
Fig. 7 shows the maximum intra-arm balancingbalancing current for operation in a power
current and the maximum arm current of theimbalance. The magnitude of the minimum
system, which is derived as a result of theload difference is set to double that of thenumerical calculation. The current is normalized
maximum load difference. The intra-arm
by the rated grid current. The maximum intra-arm
balancing current and the power imbalance arebalancing current decrease as the voltage
normalized by the rated grid current and theredundancy , which is defined in (1), increases.
averaged power of cells in the arm,
Since the large  allows the cell to inject a larger
respectively.

Maximum arm current

0.6
0.0

Maximum intra-arm
balancing current
1.0

1.5
Voltage redundancy  [-]

2.0

3.0
Percentage
admittance [p.u.]

Current [p.u.]

1.2

Designed point
2.0
1.0
0.0

1.0

1.5
Voltage redundancy Fig. 7. Maximum intra-arm balancing current
and arm current.

2.0

Fig. 8. Minimum capacitance for operation
without overmodulation.
amplitude of the compensation voltage, the required amplitude of the intra-arm balancing current
decreases. As a result, the maximum arm current is reduced. Fig. 7 reveals that almost double arm current
in the full loaded operation is required for the system when =1.5, which is the condition in thefollowing simulation and experiment. Iarm,n in (9) is designed as 0.94 times as rated grid current.
Fig. 8 shows the minimum capacitance to avoid the overmodulation in whole power conditions. The
required capacitance decreases as  increases.
Since the maximum arm current is reduced by the
Table I. Simulation conditions
large , the capacitor voltage ripple is reduced as
Parameter
SymbolValue
Rated power of cellPcell
2.2 kW
 increases. In addition, the cell can operate
Grid line-line voltage
3Vg
6.6 kV (RMS)
without the overmodulation even though theGridfrequencyf
50 Hz
gcapacitor voltage contains larger fluctuation when
Number of cells per arm
N40 is large. Practically, the cell capacitance isRated capacitor voltage
Vc
400 V
required to be designed with redundancy. The
Arm inductanceL
158 mH (0.10p.u.)
indication written as “Designed point” in Fig. 8
Cell capacitanceC
1.87 mF (68 mJ/VA)
indicates a cell capacitance for the simulation andCarrier frequency
fcar
6.0 kHzthe experiment in the following section.

Simulation results

1.0

Table I shows the simulation conditions. In
this simulation, both the cell with the power of
1p.u. and the cell with the power of −1p.u. are in
the same arm, which is the largest power
imbalance for the converter. One calculation of
the discrete integral in Fig. 5 is performed every
1 ms, and the update frequency of the intra-arm
balancing current command is set to 6.7 Hz,
which is also applied to the practical controller.
Fig. 9 shows the simulation results of thesteady-state operation with the load imbalance.
Fig. 9(a) shows modulation waveforms of thecells and the arm current in the correspondingarm. The proposed controller injects different
compensation voltages. A large second harmoniccomponent of 20.8 A is injected as the intra-arm
balancing current iint in order to operate in thesevere power imbalance, which is 13.4% larger
than the theoretical minimum value. The
calculation error is 3.4% because a 10% larger iintof the originally derived value by the controller isapplied to the system, as mentioned above. The
error is caused by the error between the current
used for the calculation in the proposed controller
and the true value. Fig. 9(b) shows the gridcurrent. The converter operates with a THD of

0.5

Modulation waveform [-]
1p.u.
1p.u.

0.0
50

Arm current [A]050
10 [ms](a) Modulation waveforms and arm current ofupper arm in r-phase.
30

AC current [A] (THD: 0.96%)

030
10 [ms](b) Grid current
460

Capacitor voltage of cells [V] (error: 0.01%)
1.0p.u.

400
1.0p.u.
340

Command
10 [ms](c) Capacitor voltage of cells.
Fig. 9. Simulation results of steady-state
operation with load imbalance.

AC current [A]

30

30

Vdc
2

Capacitor voltage of cells [V]

700

550

0.3 to -1.0p.u.
Command250
Arm current [A]

60

iac

R

Vdc
2

Pcell,k
C

L
iarm
L

0

40
20
0.0
20

Vdc

load

cell
4

0.3 to 1.0p.u.

400

60

cell
k

cell
1

0

Rcell

vcell,jk
Vc,jk
load

cell
1

RMS value of intra-arm balancing current command [A]cell
4Load change

0.3 [s]Fig. 10. Simulation result of transient response
under step increase of load imbalance.

Fig. 11. Scaled model for experimental
verification of proposed intra-arm balancing
controller.

0.96% despite the largest power imbalance. Fig.
Table II. Experimental conditions.
Parameter
SymbolValue
9(c) shows the capacitor voltages of the cells in
Rated power of cell
Pcell
169 W (Rcell=100 W)
the same arm. The capacitor voltages are balanced
AC line-line voltage
3Vg
125 V (RMS)
thanks to the proposed controller.
DC-link voltage
Vdc
520 V
Fig. 10 shows the transient response under the
Grid frequency
fg
50 Hz
load variation. Before the load change, there is no
Number of cells per arm
N4
power imbalance in the arm and no intra-arm
Rated capacitor voltage
Vc
130 Vbalancing current iint flows. After the load change,
AC resistanceR
50 Ω
one cell is fully loaded, and a load of another cell
Arm inductanceL
5.0 mH (0.07p.u.)
becomes −1p.u. The command of iint increases
Cell capacitanceC
1.36 mF (68 mJ/VA)
Carrier frequency
fcar
6.0 kHz
rapidly after the load change. Then, iint isdecreased thanks to the proposed controller. The
capacitor voltage of the cells and the grid current is balanced.

Experimental results
Fig. 11 and Table II show the experimental circuit and the conditions. The experimental multi-port
converter is composed of single-phase cascaded choppers, and the dc voltage source is utilized insteadof the other two phases. The variable load is installed in only one cell to emulate the condition that there
is a fully loaded cell and an unloaded cell in the same arm.
Fig. 12 shows the block diagram of the controller for the experiment. The output of the total power
controller is dc circulating current command, unlike Fig. 2. The grid current is controlled at a constantvalue of Id=2.5 A and Iq=0 A to keep the voltage redundancy  constant. The proposed controller wastested under the condition that the dc and the fundamental frequency component of the arm current flow.
Fig. 13 shows experimental waveforms in the steady-state operation with the power imbalance when
the proposed controller is applied. The different modulation waveforms and the relatively large intraarm balancing current iint of 1.93 A are applied, as shown in Fig. 13(a). The error of iint from thetheoretical minimum value is 2.38%. Fig. 13(b) shows the grid current with a THD of 3.98% even under
the power imbalance. The capacitor voltage is balanced with a maximum error of 1.3% as in Fig. 13(c).
Fig. 14 shows experimental waveforms in the steady-state operation with the power imbalance when
the conventional controller [3], [4] is adopted. The conventional controller does not inject the iint. The
overmodulation occurs in the cells on account of the large amplitude of the compensation voltage by theconventional intra-arm balancing controller. As a result, the arm current and the grid current distort.
THD of the grid current deteriorates by 2.9p.t. compared with the proposed controller.
Fig. 15 shows the transient behavior of the converter with the proposed controller when the load inUpper arm: 1
Lower arm: +1±1

Grid-side control

Total power
controller

Input current
reference id*, iq*

Grid current
controller v*
arm,g,i++Circulating
current
controller+

varm,cir,i++j  u, lArm voltage
reference
varm,ij*
1
N

Intra-armbalancing
controller

Arm balancing
controller
Intra-armbalancing current
reference iint,i*Intra-armbalancing current
calculation*i  r , s, tk  1, 2,..., N ++

Cell voltage
reference vcell,ijk*

Compensation
voltage reference
vd,ijk*Balancing control

Fig. 12. Control strategy for experimental circuit.
Modulation waveform [-]1.0

Modulation waveform [-]1.0

Unloaded
0.5

0.5

Fully
loaded0.0

0.0

Arm current [A]

6.0

6.0

Fully
loadedUnloaded
Arm current [A]

0.0

0.0

6.0

6.0

10 [ms]

10 [ms](a) Modulation waveforms and arm current ofupper arm in r-phase.
AC current [A] (THD: 7.1%)

5.0(a) Modulation waveforms and arm current ofupper arm in r-phase.
5.0

0.0

AC current [A] (THD: 4.2%)

0.0
5.0

5.0

10 [ms]

10 [ms](b) Grid current.

(b) Grid current.
150

Capacitor voltage of cells [V] (error: 1.3%)

150

Fully loaded

Fully loaded
130
110Capacitor voltage of cells [V] (error: 1.3%)

130

Unloaded

UnloadedCommand
10 [ms]110

Command
10 [ms](c) Capacitor voltage of cells.
(c) Capacitor voltage of cells.
Fig. 13. Experimental results of steady-stateFig. 14. Experimental results of steady-state
operation with proposed controller in load
operation with conventional controller in load
imbalance.
imbalance.
one cell increases from 0p.u. to 1p.u. The proposed controller decreases iint and converges to 2.21 A,
which is 11% larger than the theoretical minimum value, although iint increases after the load variation.
The capacitor voltage drops by approximately 30% of its nominal value after the load change. After that,the capacitor voltage converges to the command value of 130 V within 1 s. The update of iint causes asmall voltage drop of 12% on the cell capacitor at 0.15 s after the load change. However, the voltage
fluctuation on the cell capacitor does not affect the grid current.
Fig. 16 shows the transient response when the load in one cell increases from 1p.u. to 0.5p.u. iint
decreases to zero after the load changes, and the power imbalance in the arm decreases. The capacitor
voltage increases by 23% at maximum after the load change. The capacitor voltage converges to thecommand value within 0.5 s, even though the change of iint causes the overshoot of the voltage. The gridGrid current [A]

5.0
0.0

0.0

5.0

5.0

DC link voltage of cell [V]Unloaded

150

170

120
90

140

LoadedUnloadedCommand110

Arm current [A]

6.0

0
10

DC link voltage of cell [V]Command

Loaded

10

8.0
4.0
0.0
4.0

Grid current [A]5.0

Arm current [A]0.0
RMS value of intra-arm balancing current command [A]Load change (0p.u. to 1p.u.)

0.5 [s]Fig. 15. Experimental results of transient
behavior under step increase of load imbalance.

6.0
4.0
2.0
0.0
2.0

RMS value of intra-arm balancing current command [A]Load change (1p.u. to 0.5p.u.)

0.5 [s]Fig. 16. Experimental results of transient
behavior under step decrease of load imbalance.

current is little affected by the load variation. These results verify that the proposed controller achieves
operation in whole power conditions with the minimum intra-arm balancing current.

Conclusion
This paper proposed the intra-arm balancing controller to achieve the capacitor voltage balancing
under the power imbalance with the minimum current injection. In addition, the maximum arm current
and the cell capacitors were designed to ensure the operation in all power conditions considering theeffect of the intra-arm balancing current. The experimental result with the designed multi-port converter
achieved both the balanced grid current and the balanced capacitor voltages of all cells. The proposed
controller improved the grid current THD by 2.9pt compared with that of the conventional controller.
In addition, the intra-arm balancing current was minimized with an error of 2.38% compared with thetheoretical minimum current.

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