FROM ATOMS TO SYSTEMS

Parasitic Extraction
Clever and Hipex-FS
Integrated Full Chip and Cell Level RCX
Combine Rule Based and Field Solver Solutions
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Contents• Introduction• Simulation Methodologies• Rule Based• Generating Parasitic Database• Field Solver• Field Solver Methods• Boundary Element or Finite Element ?
• Combining Both Rule and Field Solver Methods• Summary

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Introduction• Many Solution Methodologies Exist for RCX Extraction• No One Methodology is Suitable for all Circuit Blocks• Combine Solution Methods for each Cell or Block• Common Integrated Platform to Localize User Options• Consider Intended User Skill Set, CAD versus TCAD
• Consider Size and Topology, versus Simulation Speed• How Much Accuracy do you Really Need ?
• User Choices are Often Technology Dependent
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Solution Methodologies• Rule Based - or - Field Solver Based
Field Solver Approach
Physics-based Parasitic Extractor

PDK
Process Info

GDS

Rule Based Flow
Test Structure
Capacitancecoefficient
Extraction

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LPE
RuleDecks

Equationbased
Extractors

SPICE
parasiticNetlist

Spicesimulator

Rule Based• Capacitance – Extract Geometry from layout Polygons• Resistance – Count Conductor Length in “Squares”• Coefficient Database Converts Polygons into C and R

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Generating Parasitic Database• However, generating thelarge capacitancecoefficient database forrule-based extraction,
also requires a specificfield solver solution, onetime per technology

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Field Solver Methods• Field Solver’s have several methods to apply the physics tothe Physical Representation of the Structure• Field Solvers Extract Both Capacitance and Resistance• Finite Difference and Finite Element Methods are:
• Optimal for Complex and Curved 3D Shapes• Boundary Element and Random Walk Methods are:
• Optimal for Squared Off Simple “Manhattan” Shapes• Simulation Speed versus Shape Complexity Trade-off• Silvaco uses Field Solvers from Both Category Types
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Boundary Element or Finite Element ?
• For Uniform Layer
Thickness and ManhattanShapes• Boundary Element Method

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Copyright• For Complex 3D Shapes• Finite Element Method

Combining Both Rule and Field Solver Methods• Technology information for field solved
sections can be defined in several ways:• 1/ Using TCAD tools and syntax (Left)• 2/ Using a GUI in the Layout Tool (Below)• 3/ A file provided from the PDK• Choices for TCAD or CAD Engineers

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CopyrightCombining Both Rule and Field Solver Methods• Technology information plus layout is converted into atrue 3D model of the BEOL for Field Solve

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Copyright• Domain decomposition allows much larger circuit sections
to be field solved
DomainSize

Simulated
Overlap
Size

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Copyright• Simulating a larger overlap improves accuracy a little atthe expense of simulation speed.
Example of full 4-bit adder below,
using boundary element method,
simulation time 26 minutes, 41seconds using 4 CPUs

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Copyright• True Mix and Match Capability in One Tool
User selects which section of the layout is solved using
finite element or boundary element field solvers, withthe remainder using traditional rule-based extraction

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Summary• Rule Based Extraction – Use for Most of the Full Chip
• Field Solver Extraction – Complex R and C Topology• Where Highest Accuracy is Required for Critical Cells• Mix and Match Techniques within One Design• TypicalMaximum
Cell Size
illustration
for using
Field Solve
Techniques
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