Evaluation of Current Source Gate Drive Circuit
Applied for High Frequency Converter
Ayato Sagehashi

Koji Orikawa

Jun-ichi Itoh

Dept. of Energy and Environment
ScienceNagaoka University of Technorogy
Nagaoka Niigata, Japansagehashi@stn.nagaokaut.ac.jp

Dept. of Science of Technology
Innovation
Nagaoka University of Technorogy
Nagaoka Niigata, Japanorikawa@vos.nagaokaut.ac.jp

Dept. of Science of Technology
Innovation
Nagaoka University of Technorogy
Nagaoka Niigata, Japan
itoh@vos.nagaokaut.ac.jp

Abstract— This paper investigates a switching operation whena current source gate drive circuit with energy cycling is used. The
current source gate drive circuit consists of a voltage source, an
input inductor and switching devices as an H-bridge inverter. The
power consumption of the current source gate drive circuit isreduced to compared with that of a conventional voltage sourcegate drive circuit because the energy of the capacitor between agate and a source is not consumed in a gate resistance which is not
required for the current source gate drive circuit. The switching
operation of the proposed current source gate drive circuit in thehigh frequency inverter is evaluated in experiment. In addition,
the power consumption is measured when the switching frequency
is changed from 100 kHz to 1 MHz. As a result, it is confirmed thatthe power consumption of the current source gate drive circuitwith energy cycling is reduced by 26% compared with that of thevoltage source gate drive circuit at 1 MHz. In addition, thedifferential configuration of the current source gate drive circuit
is considered in order to actualize the regenerating energy.
Consequently, the regenerating energy of the inductor and thecapacitance between a gate and a source is confirmed on the
proposed current source gate drive circuit in simulation.
Keywords—voltage sourcve; current source; high frequency
switching; gate drive circuit

I. INTRODUCTION
SiC-MOSFETs have especially advantages which arecharacteristics of the high frequency switching and the low loss
in compared with conventional Si-MOSFETs[1-5]. However,the capacitance Cgs between a gate and source of SiC-MOSFET
is larger than that of Si-MOSFETs[6]. Additionally, thecapacitance Cgs is increased when the low on resistance Ron or
the large rated current of Si and SiC-MOSFET is selected.
Furthermore, the power consumption of the voltage source gate
drive circuit is increased at the high switching frequency because
the discharge and charge power of the capacitance Cgs is nearly
equal to the power consumption in a gate resistance. As a result,the high frequency switching cannot be applied to theconventional voltage source gate drive circuit.
Therefore, gate drive circuits for the fast and low loss
charging of the capacitance Cgs of the MOSFET between thegate and the source has been actively studied [7-9]. For example,
the switching operation of the MOSFET is achieved using theresonance which the inductor is connected to the gate in series[7]. For this reason, the loss is reduced because the charging
energy of the capacitance Cgs and the inductor are regenerated.
As a result, the power consumption of the gate drive circuit isdecreased. However, the rise and fall time of the gate voltage islimited by resonance frequency because the capacitance Cgs ischarged by LC resonance.
On the other hand, the high frequency switching is realizedusing an inductor in the push-pull gate drive circuit[8].
Generally, the push-pull gate drive circuit uses a positive and anegative voltage source in order to charge the gate capacitanceCgs. However, the voltage source availability of the energy is low
because that these voltage source are alternately used. In thismethod, the energy is charged for the inductor using auxiliary
MOSFETs for the gate driving which is not contributed to thedischarge and charge of the Cgs in a push-pull gate drive circuit.
Then, the switching is achieved in order to suppress the surge
voltage of the inductor on the gate voltage when the current to
the inductor is blocked at the switching. However, the circuit
configuration becomes complex because many additional
components are required in this method. Moreover, the highfrequency switching is achieved by connecting an auxiliary
switch on the main circuit side[9]. The fall time of the MOSFET
is normally decided by the load resistance of the main circuit andthe output capacitance. Thus, it is difficult to increase the speedof the fall time by the gate drive circuit. The auxiliary switch isconnected on the main circuit side in order to enable the highfrequency switching because the discharge and charge of theoutput capacitance in the main MOSFET can be fast. However,
the reconstruction of the main circuit configuration is necessary.
In this paper, the operation of the current source gate drive
circuit with energy cycling is experimentally confirmed in orderto solve the problems mentioned above. In addition, the current
source gate drive circuit with energy regeneration is confirmedby simulation in order to decrease the power consumption. The
high frequency switching is possible using the current sourcegate drive circuit with energy cycling to compare with thevoltage source gate drive circuit because the limitation of gate
current caused by the gate resistance is not necessary[10]. First,
the operating principle of the conventional gate drive circuit andthe current source gate drive circuit with energy cycling is
explained. Secondly, the design method of the current sourcegate drive circuit with energy cycling is shown. Thirdly, theoperations of the current source gate drive circuit with energy
cycling is confirmed by experiments in upper switching arm on
the high frequency inverter at each switching frequency andsome gate capacitance value. Additionally, the power
consumption is compared between the conventional gate drive
circuit and the current source gate drive circuit with energy
cycling. Finally, the different configuration of the current sourcegate drive circuit is proposed in order to realize the regeneratingenergy of the capacitance Cgs. It is confirmed the regenerating
operation on the current source gate drive circuit withregeneration in simulation. In addition, the power consumption
is compared among three gate drive circuits.
II. TYPE OF THE GATE DRIVE CIRCUIT
A. Conventional gate drive circuit
Fig. 1 shows the circuit configuration of the voltage sourcegate drive circuit, Fig2 shows the switching patterns of theconventional gate drive circuit. The conventional gate drive
circuit is actualized the positive voltage and the negative voltageof the gate voltage using the H-bridge circuit similar to Fig. 1.
The switching speed of the main MOSFET is adjusted by thegate resistance Rg in the conventional gate drive circuit because
this circuit configuration is equivalent to a discharge and a

S1

S3
FET

Rg
Rs
Cgs

Ig

Vin

S2

S4

Fig. 1. Conventional gate drive circuit.

S1

ON

OFF

S2

OFF

ON

OFF

ON

S3

charge of a gate resistance Rg and a capacitance Cgs. However,
all energy of charging to a capacitance Cgs become a loss. A lossof conventional gate drive circuit is calculated by Eq. (1).

1
2
P  C gsVgs  2 f sw ........................................... (1)2where Vgs is the total peak to peak value of the gate voltage, fsw
is the switching frequency. In this equation, the switchingfrequency is two times because the discharge and charge of thegate capacitance is two period in the switching frequency.
Additionally, the current capacity of the auxiliary MOSFET
for gate drive circuit is increased because the gate current isincreased when the gate resistance Rg is small for achieving highdv/dt of the gate voltage. Hence, the switching speed is limited
when the capacitance Cgs is large of the main MOSFET.
B. Current source gate drive circuit with energy cycling typeFig. 3 shows the current source gate drive circuit with energy
cycling. This gate drive circuit configures the voltage source andthe small input inductor L at the current source[6]. It is used fora transient LC resonance to charge and discharge the capacitance
Cgs.
Fig. 4 shows the operation mode of the current source gate
drive circuit. Normally, the energy of the capacitance Cgs is
consumed by the gate resistance in the gate drive circuit.
Consequently, the power consumption of the gate drive circuit
becomes larger as the higher frequency. On the other hand, atransient LC resonance is used on the current source gate drive
circuit. As a result, the power consumption becomes smaller
than that of conventional voltage source gate drive circuit.
Fig. 5 shows the switching pattern of the current source gate
drive circuit. The detail of the switching pattern is explained byusing Fig. 3.
1) MODE I [0 ≤ t ≤Ti] : S1 and S2 are turned on. The energy
is charged to the input inductor L.
2) MODE II [Ti ≤ t ≤ Tii] : S4 is turned on. This period is theoverlapping time for ensuring the inductor current path between
MODE I and MODE III.
3) MODE III [Tii ≤ t ≤ Tiii] : S2 is turned off. The energy of
the input inductor L is added to the DC power source. Then, the
L

IL
S1

S4

OFF

ON

Vgs

-Vgs_peak

Ig

Fig. 2. Switching patterns of the conventional gate drive
circuit.

D3

D1+Vgs_peak

S3

Igs

Rs
Cgs

S2

S4

Vin

D2

FET

D4

Fig. 3. Current source gate drive circuit.

capacitance Cgs is charged a positive voltage. In this operationmode, the input inductor current IL becomes a sinusoidal
waveform. When the gate voltage reaches the maximum value
by a transient LC resonance, the gate voltage is kept a constantbecause the discharging of the capacitor Cgs is blocked by diodes.
III. DESIGN METHOD OF GATE DRIVE CIRCUIT
Fig. 6 shows the flowchart for design of the current sourcegate drive circuit with energy cycling.
1) Deciding the voltage slope dVgs/dt
First of the gate drive circuit designing, the MOSFET ofmain circuit is selected. In consequently, the switchingspecification is decided from the MOSFET. Parameters of othercomponents is designed based on the voltage slope.
2) Designing the input inductor L
This gate drive circuit uses a transient LC resonance for gate
driving at rise and fall timing. Therefore, the switching speed isadjusted up to the resonance frequency.
3) Calculation the gate voltage vgs
L

L

IL

S1
D1

S1

S3
D3

FET

Rs
Cgs

Vin
S2
D2

L

S2

L

Vin
S2
D2

L

S1
D1

D2

D4

Rs
Cgs

Vin
S2
D2

MODE V

S4
D4

D3

FET

FET

ON

OFF

S2

ON

OFF

ON

D2

ON

OFF

ON

S3

OFF

ON

D3

OFF

ON

S4

OFF ONOFF

D4

OFF ON

OFF

V

VI

OFF

Tii

Tiii

OFF

Tiv

Dec. dVgs/dt

D4

Capacitance Cgs

Switching frequency fsw
Dec. LVin
S2
D2

Eq. (2)

Calc. Vgs

S3
D3

Tvi

Start

IL

D1

Tv

Fig. 5. Switching patterns and operation modes of thecurrent source gate drive circuit.

S4

MODE IV

S1

S3

D1

Ti

S3

S2

S4

D3

ON

IV

III

+Vgs_peak

Rs
Cgs

Vin

IL

S1

II

IL

D1

L

I

-Vgs_peak

S1

MODE III

Mode

Vgs

IL

FET

Rs
Cgs

also necessary to redesign the input inductor L.

MODE II

S3
D34) Calculation the input current iin
The calculation of the input current iin is necessary to selectthe MOSFET for the gate driving. If it is difficult to select the
MOSFET for gate driving from commercialized product, it is

S4
D4

D2

D4

IL

FET

Rs
Cgs

Vin

S4

S1

S3
D3

D1

MODE I

D1

IL

The rated gate voltage of the MOSFET is decided when the
MOSFET of main circuit is selected. It is necessary to redesign
the input inductor L if the calculation result is over the rated gate
voltage of the MOSFET.

FET

Eq. (3)Rs
Cgs

Vgs = Vgs_peakYesCalc. Iin

S4

Select: MOSFETs

D4

MODE VI

Fig. 4. Switching patterns of the current source gate drive
circuit.

No
Eq. (10)

No
There are a buyable MOSFETs

Yes
End

Fig. 6. Flowchart for design of the current source gate
drive circuit.

These parameters is designed by this method without theoverlapping time because it is negligible compared with theswitching period.

L

A. Decided of the input inductor L
The input inductor L of the gate drive circuit is decided by
the LC resonant frequency between input inductor L and thecapacitance Cgs. The input inductor value is calculated by (2).

i
RDS
VF

S2

Gate voltage of current source circuit

vgs

t

0

In addition, the vibrational angular frequency , initial
current of input inductor i(0) and coefficient k1 to k3 areexpressed by (4)-(8).

(2 R DS )
1

LC gs
4 L2

2

........................................ (4)2R

 DS Ti(V  2VF )i(0)  in(1  e L ) ............................ (5)2R DS

Vin  2VF  v gs (0)L

k 3  v gs (0)C gs  k1  i(0)k 2   i(0)2

 R DS    2
 L 

R DS
L

......... (8)drive circuit has resistance components of the MOSFET for gate
driving. However, the gate voltage is clamped to the peakvoltage value when the gate voltage is increased at initial motion.
It is because the diode is connected in series. Therefore, the input
inductor L is designed for that the peak value of gate voltage
becomes desired value. The time of arriving to the gate voltage
peak value tVgs_peak is given by (9).

t v gs _ peak i(0)  
Tan 1   ............... (9) k1  i(0)k 2  
1

C. Select of the MOSFET for gate drive circuit
The input inductor current is calculated after the input
inductor value is decided. The specification of the MOSFET for
driving is determined from the calculation result of the input
inductor current. The input inductor current value is expressedby (9) from transient response of equivalent circuit in Fig. 5.

iin (t ) 

where Ti is the charging period of input inductor L on MODE I
or MODE IV in Fig. 5.
Fig. 8 shows the gate voltage vibration expressed by (3). The
gate voltage of current source gate drive circuit is vibrated
similar to sinusoidal waveform due to a LC resonance. Moreover,the gate voltage attenuates with time because the current gate

LC resonance with resistance R

Fig. 8. Gate voltage of current source gate drive circuit.

........................................ (6)R DS............................................................. (7)Lttvgs_peak
ti_peak.................................................................................. (3)where L is the input inductor, RDS is the on resistance of
MOSFET for gate driving.

k2 

VF

Fig. 7. Equivalent circuit of current source gate drive
circuit.


RDS
1
e L

v gs (t )  i (0) sin t (k1  i (0)k 2 )
R
C gs
L

( DS ) 2   2 
L
 k
R 

  (k1  i (0)k 2 )  i (0) DS  cost   3
L  C gs

k1 

RDS

D2

B. Design of the gate voltage vgs
Fig. 7 shows the equivalent circuit of the current source gate
drive circuit. The gate voltage vgs is given by (3) from the RLC
equivalent circuit in Fig. 7.



FET

vgs Cgs

where fsw is the switching frequency of the gate drive circuit. isarbitrary constant. Besides,  is adjusted fast enough than thatof the switching frequency fsw.

RDS

D3

Vin

1
L
.................................................. (2)24 f sw C gs

S3

Vin  2V F  V gs 0

L



R DS
L

t

sin t.. (10)R DS i (0)esin t  i (0) cost Lwhere Ti is the charging period of input inductor similar to


(5).

e

R DS
L

t

The charging period of input inductor Ti is adjusted shorter
than the switching period Tsw of the MOSFET for main circuit.
Thus, the charging period Ti is set to 25 ns because 5% of thehalf cycle of the maximum switching frequency 1 MHz is
considered in this paper. The MOSFET for gate driving whichhave rated pulse drain current in order to satisfy the maximum
input inductor current is calculated by (8). The time of arriving
to the maximum pulse drain current ti_peak is given by (11).
R k1  i (0)k 2   DS i (0) L
t i _ peak  Tan 1 
 ... (11)R DS k  i (0)k   i (0) 
1
2


 L

1

IV. EXPERIMENTAL RESULTS
Fig. 9 shows the circuit diagram of the high frequency
inverter using the current source gate drive circuit with energy
cycling type, Table. 1 shows the detail of the experimental
condition in Fig. 9. The current source gate drive circuit isconnected one by one to each main MOSFET of the highfrequency inverter. Furthermore, the current source gate drive
circuit in Fig. 3 is used.
A. Switching operation at high frequency
Fig. 10 shows the experimental results of the switching
operation on the high frequency inverter at the switchingfrequency of 100 kHz. It is confirmed that the MOSFET of theupper arm is switching in Fig. 10. However, the gate voltage of
the waveforms is vibrated when the current source gate drive
circuit is used. This reason is resonance between the capacitanceCgs and the parasitic inductance of the wiring from the main
MOSFET to the gate drive circuit after the charging of thecapacitance Cgs is finished. Although, it is not a problem because
the voltage of the vibration in the gate voltage is the outside
range which is higher and lower than the threshold voltage of themain MOSFET.
Fig. 11 shows the measurement waveform of the highfrequency inverter at the switching frequency of 1 MHz. The
switching operation of the upper arm MOSFET is also
confirmed in Fig. 11. However, the gate voltage have a ringing
at rise timing. This reason is similar to the switching frequencyof 100 kHz. From results of Fig. 10 and Fig. 11, the highfrequency switching of the upper arm MOSFET is realized using
the current source gated drive circuit.
Fig. 12 shows the magnifying of the gate voltage waveformwhen the switching frequency are 100 kHz and 1 MHz. It is

Q1 Gate voltage [20 V/div]
0
Q2 Gate voltage [20 V/div]0

Ringingoccur

Q1 Drain-Source voltage [20 V/div]
Q1
VDS

Vgs

C
Vin

0
Time [2 ms/div]

Q2
R

Current sourcegate drive
circuit(1ch✕2)Out put current [5A/div]

L

Iout

C

0

Fig. 10. Measurement waveform of the high frequency
inverter using the current source gate drive circuit at
100kHz.

2

Q1 Gate voltage [20 V/div]0

Fig. 9. Experimental circuit diagram.
Table. 1. Experimental condition.
48 V
Input voltage Vin
Input capacitance C
5 mF
Main
Lode reactor L
5 mH
circuit5W
Lode resistance R
Gate voltage Vgs±12 V
MOSFET:IRLML2060TRPbF(IR)
Switching device
for gate drive circuit
0.48 WOn resistance RDS
RB161M-20TR(Rohm)
Diodefor gate drive circuit
Forward Voltage VF
0.32 VMOSFET:IRF640NPbF(IR)
Switching device
for main circuit
1670 pF
FET Gate capacitance Cgs

Q2 Gate voltage [20 V/div]0

Ringingoccur

Q1 Drain-Source voltage [20 V/div]0

Out put current [1A/div]0Time [200 ns/div]

Fig. 11. Measurement waveform of the high frequency
inverter using the current source gate drive circuit at
1 MHz.

B. Comparing of power consumption
Fig. 13 shows the experimental results of the power
consumption in the current source gate drive circuit. In addition,
the calculation results of the power consumption in theconventional gate drive circuit is shown in order to compare thecurrent source gate drive circuit in Fig. 13. These power
consumptions of two gate drive circuits are compared when theswitching frequency is changed from 100 kHz to 1 MHz. The
maximum input current and the maximum input inductor current
are constant value of 4 A in the two gate drive circuits at
designing.
The switching frequency is 100 kHz in Fig. 13, the power
consumption of the current source gate drive circuit is 0.078 W,
the power consumption of the conventional voltage source gate
drive circuit is 0.096 W. It is considered the power consumption
can be reduced by 18.8% using the current source gate drive
circuit. Moreover, when the switching frequency is 1 MHz in
Fig. 13, the power consumption of the current source gate drive
circuit is 0.71 W, the power consumption of the conventional
voltage source gate drive circuit is 0.96 W. As a result, it isconfirmed the power consumption of the gate drive circuit isreduced by 26.3 % when the current source gate drive circuit isused. Therefore, the gate drive circuit of the current source gate
drive circuit can reduce the power consumption when theswitching frequency is high. It is due to the energy of thecapacitance Cgs is cycled in the gate drive circuit when thereverse polarity voltage is input at the MODE III and MODE VI
of the current source gate drive circuit. In consequently, low loss
gate drive circuit is achieved by the current source gate drive
circuit at the high frequency.
C. Problem of the kickback effect
The kickback effect occur on the gate voltage of the main
MOSFET when the capacitance Cgs is low value because thecurrent is flow in the gate drive circuit from the path of thecapacitance between the drain and the gate Cds. This problem issolved by connecting the capacitance to the capacitance Cgs inparallel using several methods. The gate voltage fluctuation
suppressed due to flow in the current from the capacitance Cds.
However, the power consumption of the gate drive circuit
because the capacitance Cgs is increased. Therefore the current
source gate drive circuit is designed based on the each gate
capacitance Cgs. In addition, the operation of the switching ismeasured.
Fig. 14 shows the switching operation when the capacitanceCgs is 3000 pF. The ringing of the gate voltage is reduced
compared with Fig. 11. It is because the resonance frequency
between the capacitance Cgs and the parasitic inductance of thewiring from the main MOSFET to the gate drive circuit become

Q1 Gate voltage at 1MHz [20 V/div]0Time [100 ns/div]
Q1 Gate voltage at 100kHz [20 V/div]0Time [1 ms/div]

Fig. 12. Magnifying the waveform of the gate voltage at
100kHz and 1MHz

1Power consumptionof the gate drive circuit P [W]confirmed the rise time is 37 ns when the switching frequency is
100 kHz. On the other hand, the rise time is 33 ns at theswitching frequency of 1 MHz. The results of 100 kHz and 1
MHz are 0.4% and 3.7% when these rise time is considered in
the one period of the switching frequency. However, the risetime of the measurement results are included 25 ns of theoverlapping time. Therefore, the rise time of the gate voltage canbe fast if the overlapping time is shorter than this condition.

Capacitance Cgs : 1670 pF

0.8
0.6

Conventional

0.4
Proposed

0.2
0
100

200

500

Switching frequency fsw [kHz]1000

Fig. 13. Comparison of power consumption between twogate drive circuits.
Q1 Gate voltage [20 V/div]0

Ringingoccur
Q1 Drain-Source voltage [20 V/div]0
Out put current [1A/div]0Time [200 ns/div]

Fig. 14. Measurement waveform of the high frequency
inverter using the current source gate drive circuit at
3000pF.
low. Additionally, the kickback effect is suppressed because thecapacitance Cgs is increased.
Fig. 15 shows the measurement waveform of the switching
operation when the capacitance Cgs is 5000 pF. As a result, theringing of the gate voltage is suppressed compared with Fig. 11

and Fig. 14. Besides, the high frequency switching of the main
MOSFET is achieved because the rise time of the gate voltage
is similar to Fig. 11 and Fig. 14. In consequence, the highfrequency switching of the main MOSFET is achieved
regardless of the capacitance Cgs value.

Q1 Gate voltage [20 V/div]0

Ringingoccur
Q1 Drain-Source voltage [20 V/div]

V. REGENERATED CURRENT SOURCE GATE DRIVE CIRCUIT
A. Operation mode of proposed gate drive circuit
Fig. 16 shows the proposed current source gate drive circuit.
In proposed gate drive circuit, components are similar to thecurrent source gate drive circuit with energy cycling. The power
consumption of the current source gate drive circuit with energy
cycling is reduced than that of the voltage source gate drive
circuit. However, energy of the inductor L and the capacitanceCgs cannot regenerate to the DC power source because diodes
are used for blocking the short path in the gate drive circuit. The
power consumption is more reduced if the regenerating of theinductor L and the capacitance Cgs energy is actualized.
Therefore, the proposed gate drive circuit uses only MOSFETs
in order to regenerate energies of the inductor L and thecapacitance Cgs.

0
Out put current [1A/div]0Time [200 ns/div]

Fig. 15. Measurement waveform of the high frequency
inverter using the current source gate drive circuit at5000 pF.
S5
S1

Vin

The operations of MODE IV-VI are similar to MODE I-III
although the voltage polarity of the capacitance Cgs is opposite.

S7
S4

S2

S8

Fig. 16. Circuit diagram of proposed current sourcegate drive circuit.
Iin

Iin

S5
S1

S3
L

Vin

S6

S5
S1

FET

S3

L
Vin

Rs
Cgs

S2

S4

S3
L

Vin

S6

S5
S1

FET

S3

L
Vin

S4

S3

L
Vin

S4

S6
Rs
Cgs

S5
S1

FET

S3

L
Vin

S4

MODE V

S8

S6
Rs
Cgs
S7

S7
S2

S8

MODE IV
Iin

S5
S1

FET

S7
S2

S8

MODE III

VI. CONCLUSION

S6
Rs
Cgs

S7
S2

S8

MODE II

Rs
Cgs

Iin

In this paper, the validity of the current source gate drive
circuit for high frequency switching converters is discussed. In
consequence, it is confirmed the high frequency switching of theupper arm MOSFET is realized. In addition, the power
consumption can be reduced by 26% at the switching frequencyof 1 MHz compared with the voltage source gate drive circuit in
the experimental results. Moreover, the high frequency
switching of the main MOSFET is realized regardless of the

S4

Iin

S5
S1

FET

S7
S2

S8

MODE I
Iin

S6
Rs
Cgs

S7

B. Simulation of the proposed gate drive circuit
Fig. 18 shows the simulation results of the proposed gate
drive circuit at 1 MHz. It is confirmed the gate voltage isactualized -12 V and +12 V. Besides, the input average current
is zero because the supplying energy of the DC power source isretrieved from the inductor L and the capacitance Cgs. As a result,
the regeneration of the gate drive circuit is realized in simulation.
However, the inductor current is not reduced because thissimulation uses ideal components in MODE II and MODE V.

FET

Rs
Cgs

1)MODE I : S1,S7 and S8 are turned on. The energy of theinductor L is charged. The rise time of the gate voltage becomes
fast when this mode period is long time.

3)MODE III : All MOSFETs are turned off expect S6. Theenergy of the inductor L is regenerated to the DC power source.
In addition, the gate voltage is kept during this mode.

S6

L

Fig. 17 shows the operation mode of the proposed gate drive
circuit. The proposed gate drive circuit has six modes.

2)MODE II : S7 and S8 are turned off, S4 conducts. The
capacitance Cgs is charged to a positive voltage. On the other
hand, the charging energy of the capacitance Cgs in the previous
mode is moved to the inductor L.

S3

S2

S4

S8

MODE VI

Fig. 17. Operation modes of the proposed gate drive
circuit.

FETcapacitance Cgs value. Besides, the differential configuration of
the current source gate drive circuit is considered in order toactualize the regenerating energy. Consequently, theregenerating energy of the inductor and the capacitance Cgs isconfirmed on the current source gate drive circuit withregeneration in simulation. In the future, the operation of the
proposed current source gate drive circuit will be confirmed inexperiment.

Input current Iin [A]Regenerating

Inductor current IL [A]

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Gate voltage Vgs [V]200ns

Fig. 18. Simulation results of the proposed gate drive
circuit.