Version: 0.1
Issued Date: 2024/07/29

Approval Sheet(產品承認書)產品名稱(Product)

WiFi Low Power Module

解決方案(Solution)

Nordic nRF7002 QFN Package產品型號(Model No.)

AN7002Q – P產品料號(Part No.)see 3.1 Order code

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Index1.

Overall introduction ...................................................................................................... 4
1.1. Features ............................................................................................................... 4
1.2. Application ............................................................................................................ 5
1.3. General parameters .............................................................................................. 5

2.

Product dimension ........................................................................................................ 6
2.1. PCB dimensions & pin indication .......................................................................... 6
2.2. Recommended layout of solder pad ..................................................................... 7
2.3. RF layout suggestion (aka keep-out area) ............................................................ 92.4. Pin assignment ................................................................................................... 123.

Shipment packaging information ............................................................................... 13
3.1. Order code.......................................................................................................... 13

4.

Specification ................................................................................................................ 14
4.1. Absolute maximum ratings ................................................................................. 14
4.2. Recommended operating conditions .................................................................. 15
4.3. Electrical specifications....................................................................................... 15
4.3.1. General characteristics ....................................................................................... 15
4.3.2. Current consumption .......................................................................................... 16
4.3.3. Receiver characteristics...................................................................................... 16
4.3.4. Transmit current consumption ............................................................................ 17
4.3.5. Transmitter characteristics .................................................................................. 17
4.3.6. Transmitter power variation over temperature .................................................... 17
4.3.7. Transmitter power variation over supply voltage ................................................. 17

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5.

Block diagram.............................................................................................................. 18

6.

Host connection .......................................................................................................... 197.

Power and clock management ................................................................................... 20
7.1. Power states ....................................................................................................... 20
7.2. Power state operation ......................................................................................... 21
7.3. Clock accuracy considerations ........................................................................... 22

8.

Coexistence ................................................................................................................. 23
8.1. Bluetooth LE/IEEE 802.15.4 timing .................................................................... 25

9.

OTP memory programming ........................................................................................ 282

10. FICR - factory information configuration registers .................................................. 30
11. Reference circuit ......................................................................................................... 31
12. Notes and cautions ..................................................................................................... 32
13. Useful links .................................................................................................................. 33
Full list of Raytac’s WiFi modules ..................................................................................... 34
Full list of Raytac’s Bluetooth modules............................................................................ 35
Release note ....................................................................................................................... 39

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1. Overall introduction
Raytac’s AN7002Q is a low power WiFi 6 module designed based on Nordic nRF7002
companion solution and it supports dual-band 2.4 GHz and 5 GHz band operation. The
antenna ports are single-ended 50 Ω and it supports 20 MHz wide channels, 1x1 SingleInput Single-Output (SISO) operation and can deliver a PHY data rate of 86 Mbps (MCS7).
AN7002Q series is a wireless module that adds low-power Wi-Fi 6 capabilities to another
System on Chip (SoC), Microprocessor Unit (MPU), or Microcontroller Unit (MCU) host.
AN7002Q is compatible with IEEE 802.11ax (also known as Wi-Fi 6) and with earlier
standards IEEE 802.11 a/b/g/n/ac and which has been designed for IoT applications, and isideal for adding modern Wi-Fi 6 capabilities to existing Bluetooth® Low Energy, Thread®, or
Zigbee® systems.

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It connects to the host SoC or MCU through a Serial Peripheral Interface (SPI) or Quad Serial

Peripheral Interface (QSPI) serial interface (which can optionally be encrypted) and supports

coexistence with other radio protocols through a dedicated 3-wire or 4-wire coexistenceinterface.

an

It supports Station and Wi-Fi Direct operation modes as well as Software Enabled Accessimli

Point (Soft AP) (Wi-Fi 4 operation only) and simultaneous station + soft AP/Wi-Fi Direct/station
modes.

1.1.

Features

1. Wi-Fi® 6 companion IC with integrated RF.

2. Supports IEEE 802.11 ax and earlier standards (IEEE 802.11 a/b/g/n/ac)erP

3. Supports Target Wake Time (TWT), Orthogonal Frequency Division Multiple Access(OFDMA), Basic Service Set (BSS) Coloring

4. Supports Wi-Fi CERTIFIED 6™, Wi-Fi CERTIFIED™, Wi-Fi Enhanced Open™
5. Supports WPA3™, WPA2™, WPA™ - Personal and Enterprise, Protected Management
Frames

6. Supports WMM®, WMM - Power Save, Wi-Fi Agile Multiband™, Wi-Fi Direct®
7. Dual-band 2.4 GHz and 5 GHz operation in 1x1 (SISO) operation.
8. 3-wire or 4-wire coexistence interface and compatible with Raytac MDBT53 series
module.

4

1.2.

Application‧Internet of Things (IoT)‧Smart Home application‧Gateways and Border Routers‧Industrial IoT sensors and controllers‧Sports and Fitness sensor and monitor devices‧Wireless payment enabled devices‧Health monitor devices‧Wi-Fi locationing based on SSID scanning

1.3.

General parameters

Model name

AN7002Q-P

Dimension (L x W x H)

18 x 11 x 2.2mm

Weight (g)AN7002Q-P:0.79 (±0.02g)

Interface

SPI or QSPISupply voltage

2.9V to 4.5V

Operating temperature-40 to +85°C

Support antenna

1 x 1 (SISO)
2.4G

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RF channels

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5G

IEEE WLAN Standard

Ch1-Ch14*

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Ch36/40/44/48/52/56/60/64
Ch100/104/108/112/116/120/124/128/132/136/140
Ch149/153/157/161/165/169/173

IEEE 802.11 a/b/g/n/ac/ax*Channel 14 Japan only with 11b modulation.

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2. Product dimension
2.1.

PCB dimensions & pin indication‧AN7002Q-P

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2.2.

Recommended layout of solder pad
Graphs are all in Top View, Unit in mm.

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2.3.

RF layout suggestion (aka keep-out area)

Make sure to keep the “No Ground Pad” as wider as you can regardless of the size of yourPCB.
No Ground Pad should be included in the corresponding position of the antenna in EACH
LAYER.
Place the module towards the edge of PCB to have better performance than placing it on thecenter.
Welcome to send us your layout in PDF for review at service@raytac.com or your contact at
Raytac with title “Layout reviewing – Raytac Model No. – YOUR company’s name”.

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Examples of “NOT RECOMMENDED” layout

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2.4.

Pin assignment

Pin No.

Name

Pin Function

Description(1)(2)GND

Power

Ground

(3)

VBAT

Power

(4)(5)(6)(7)(8)

GND

Power

Ground(9)

BUCKEN

Digital I/O

PWR IP enable pin(10)(11)

GND

Power

GroundQSPI_CLK

Digital I/O

QSIP Clock

SPI_CLK

Digital I/O

SIP Clock

QSPI_SS

Digital I/O

QSIP Slave selectSPI_SS

Digital I/O

SIP Slave selectQSPI_DATD0Digital I/O

QSIP data

SPI_MOSI

Digital I/O

SIP data

QSPI_DATD1Digital I/O

QSIP data

SPI_MISO

Digital I/O

SIP data(16)

QSPI_DATD2Digital I/O

QSIP data(17)

QSPI_DATD3Debug

QSIP data(18)

COEX_STATUS0Digital I/O(19)

COEX_REQ

Reset

(20)

COEX_GRANT

Digital I/O

Coex interface(21)

SW_CTRL1

Digital I/OExternal switch control (4 wire coex interface)(22)

HOSI_IRQ

Digital I/O

Host processor interrupt request

(23)

VDDIO

GND

I/O Power level(24)(25)

GND

Power

Ground

(12)

(13)

(14)

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(15)

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Coex interface

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Coex interface

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3. Shipment packaging information

3.1.

Model

Antenna

AN7002Q-P

PCB antenna

Photo

Order codeyr

Each model has two options of packaging. Please use following part no. when placing order
to us.

Model
AN7002Q-P

Tray

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W5-500A1-001

anTape & Reel

W5-500A1-001R

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4. Specification
Any technical spec shall refer to Nordic’s official documents as final reference. Contents
below are from “nRF7002 Product Specification v1.1”, please click to download full spec.

4.1.

Absolute maximum ratings

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4.2.

Recommended operating conditions

4.3.

Electrical specifications

4.3.1. General characteristics

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4.3.2. Current consumption

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4.3.3. Receiver characteristics

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4.3.4. Transmit current consumption

4.3.5. Transmitter characteristics

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4.3.6. Transmitter power variation over temperatureer
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4.3.7. Transmitter power variation over supply voltage

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5. Block diagram

AN7002Q module

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AN7002Q module is a companion alongside MDBT53 module18

6. Host connection
AN7002Q is a wireless companion device that is connected to a host MCU or application
processor. It is connected to the host through a QSPI (6-wire) or SPI (4-wire) for data and a
3-wire or 4-wire coexistence control interface for hosts that include a Bluetooth LE/IEEE
802.15.4 radio. In addition, two lines (HOST_IRQ and BUCKEN) are required. The user
application executes on the host MCU.
The following figure shows a system with AN7002Q and a host MCU.

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AN7002Q is designed to support radio coexistence and can be used together with anothernRF Series device. The following figure shows AN7002Q together with Raytac MDBT53

series to achieve a combined Bluetooth LE and Wi-Fi solution. nRF5340 functions as a hostand common interface to the wireless system.

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7. Power and clock management
The power and clock management system in AN7002Q is optimized for ultra-low power
applications to ensure maximum power efficiency.

7.1.

Power states

AN7002Q has three power states: Shutdown, Sleep, and Active.
⚫ Shutdown

A fully inactive state where no state information is retained except for the contents of
the One Time Programmable (OTP) memory. AN7002Q will only respond to a
BUCKEN assertion (input to Power Management Unit (PMU)).
The following conditions occur during Shutdown state:• PMU: Off• Analog circuits: All circuits off• Baseband logic and scratch RAMs: Offimli• Retention RAMs: Off• SPI/QSPI: Off⚫ Sleepanyr

A low-power state where state information is retained and transitioning to Active state canerPoccur rapidly. The device may be in the Sleep state during both pre-association (device idle
waiting for host command) and post-association period as part of the Wi-Fi Power Save
mode (that is, maintain association with an Access Point but without data traffic). In thisstate, the device is clocked through the internal 32 kHz RC oscillator (Real-time Clock(RTC)), and can be awakened through the host interface or the internal sleep timer expiry.
The following conditions occur during Sleep state:• PMU: Low-power mode (Pulse-Frequency Modulation (PFM))• Analog circuits: RTC active, register state retained. All other circuits are powered down.
• Baseband logic and scratch RAMs: Off• Retention RAMs: Off• SPI/QSPI: On

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⚫ Active

In the Active state, the device will be in one of the Active sub-states: Transmit, Receive, or
Idle. The high frequency crystal oscillator derived clocks are active and the appropriate RF
section components are enabled as required. The Idle sub-state is a short term transitory
state used when Receive is not required, but Sleep cannot be exploited (for example, uponearly termination of an RX packet).
The following conditions occur during Active state:• PMU: High-power mode (Pulse-Width Modulation (PWM))• Analog circuits: All circuits powered (including crystal oscillator). The circuits are enabledaccording to Active sub-state (TX, RX, or IDLE)• Baseband logic and scratch RAMs: On• Retention RAMs: Active• SPI/QSPI: On

7.2.

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Power state operation

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Apart from transitions in or out of Shutdown state through the BUCKEN pin, all transitions
between Sleep and Active states are automatic and do not rely on any control pin assertionor de-assertion.

Shutdown state is achieved by de-assertion on the BUCKEN pin. Asserting BUCKEN willerP

result in the Active (IDLE sub-state) state being entered. The host will initiate the bootsequence through SPI/QSPI, culminating in the Sleep state being entered. This is the lowest
power non-Shutdown state that can be achieved. Transitions from Active to Sleep are fully
controlled by AN7002Q. Transitions from Sleep to Active are determined by both the hostand AN7002Q. In a pre-association condition, Sleep is entered opportunistically whenever
there is no activity initiated from the host (for example, a scan request). In a post-association
condition, Sleep opportunities are determined by the negotiated Power Save mode of
the Access Point. No host interactions are required to enter Sleep, while the host invokes atransition from Sleep to Active as part of any SPI/QSPI command transaction.
1.

Switch the Power Management Unit (PMU) to high power mode (PWM).

2.

Apply power to the digital logic, RAMs, and analog circuits.

3.

Start the 40 MHz crystal oscillator and allow to settle.

4.

Start the baseband PLL and allow to settle.

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5.

Boot all processor cores.

6.

Execute baseband initializations.

7.

Execute RF initializations and calibrations.

The initial steps consume equal duration whether originating in Shutdown or Sleep, while thebaseband and RF initializations are dependent on the originating state. In particular:
Full baseband initializations are required from Shutdown (including transferring the Factory
Information Configuration Registers (FICR) information from OTP memory into retentionRAM), while in Sleep some of the state is retained in retention RAMs.
• Full baseband initializations are required from Shutdown (including transferring theFactory Information Configuration Registers (FICR) information from OTP memory into
retention RAM), while in Sleep some of the state is retained in retention RAMs.

yr• Complete RF calibrations are required from Shutdown, including across channels to

support scanning. From Sleep, only minimal initialization or calibration on the operating
channel is required.
See Electrical specification on page 34 for timing information.

7.3.

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Clock accuracy considerationsan

The crystal oscillator is active during normal operation, and is the clock reference for the RF
synthesizer, the Analog-to-Digital Converter (ADC)/Digital-to-Analog Converter (DAC)
sample clocks, and the baseband logic. The RTC is active during sleep state, and is used to
run the wakeup timer used as part of Wi-Fi Power Save. The crystal oscillator is inactive
during sleep.

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The IEEE 802.11 specification defines the accuracy of the Wi-Fi carrier frequency to bewithin ± 20 ppm (in 5 GHz), which in turn defines the required accuracy of the external
crystal. There is provision to trim the crystal oscillator through a value programmed into the
OTP memory on the AN7002Q device (or any other available non-volatile memory). This
trimming will compensate for the combined frequency offset resulting from the crystal itself
as well as any crystal oscillator variation at room temperature. The crystal and crystal
oscillator will both exhibit frequency drift across temperature, and the crystal will also be
subject to aging. The combination of these temperature and aging effects, along with thetrimming accuracy, will consume the majority of the ± 20 ppm allowance, assuming a crystal
with ± 10 ppm stability over temperature. The crystal tolerance (that is, accuracy at room
temperature) is less important since this will be trimmed out by the crystal oscillator trim
function (up to ± 20 ppm). The crystal oscillator/crystal is typically trimmed by transmitting

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Wi-Fi packets through the antenna connector and using a Vector Signal Analyzer (VSA) tomeasure the frequency offset. Alternatively, a generic spectrum analyser can be used tomeasure the frequency offset on a transmitted Carrier Wave (CW).
The RTC is automatically calibrated against the trimmed 40 MHz crystal oscillator reference
at runtime, and as such nothing needs to be done on the production line. During sleep, theRTC clocked wakeup timer is used to time wakeup intervals (since the last Delivery Traffic
Indication Message (DTIM) beacon in regular Wi-Fi Power Save), and as such any residual
inaccuracy is not accumulated.

8. Coexistenceyr

AN7002Q Series devices have a highly configurable coexistence hardware to help mitigate
interference between WLAN and Bluetooth LE/IEEE 802.15.4 devices (Thread, Zigbee).

A Packet Traffic Arbitration (PTA) module, connected to the CH logic function, facilitates theanmitigation of various interference scenarios through a highly-programmable fabric. The

coexistence hardware enables the output signal that support interface configurations 4-wire.
The primary schemes supported are:imli

• Separate Antenna mode – The PTA makes priority decisions, granting TX/RX requests

from Bluetooth LE/IEEE 802.15.4. Each interface is permanently connected to its own
antenna.

The following figure shows the architecture of the coexistence hardware with details about
the PTA control lines.

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8.1.

Bluetooth LE/IEEE 802.15.4 timingThis section provides Bluetooth LE/IEEE 802.15.4 timing diagrams and parameters
3-wire with multiplexed priority
The following diagram shows external Bluetooth LE/IEEE 802.15.4 timing parameters when
SR_STATUS
carries both priority and TX/RX information in a time multiplexed manner.

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The Bluetooth LE/IEEE 802.15.4 timing parameters are used to derive PTA timing
parameters. The following table describes the relationship between PTA timing parametersand Bluetooth LE/IEEE 802.15.4 timing parameters.

25

3-wire without multiplexed priority

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If SR_STATUS carries only one parameter information (3-wire, no priority mode), then theimlidefault

information that it carries is SR_TX_RX. In this case, SR_STATUS is set to TX or RX when
SR_REQUEST is HIGH. The following diagram shows SR_STATUS only carrying TX/RX
information. The signals are represented as a bus even though they are single bit ports toindicate transitions happening on the ports.

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During the transaction, the Bluetooth LE/IEEE 802.15.4 device changes SR_STATUS
appropriately to indicate TX and RX information. PTA continuously tracks SR_STATUS while
SR_REQUEST is high and updates SR_TX_RX status internally for corresponding COEX
behavior.

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4-wire timing
In the following diagram, Bluetooth LE/IEEE 802.15.4 priority is explicitly signaled on the
BT_COEX_STATUS1 pin.

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9. OTP memory programming
AN7002Q includes a 128 x 32-bit OTP memory. This memory is partitioned into two regions,a factory
programmed region and a customer programmed region, each containing 64 x 32-bit
locations.
The factory programmed region contains information related to production and trim values.
The customer
programmed region contains:• Encryption key used to protect the QSPI traffic (4 words)• MAC addresses for VIF0 and VIF1 (4 words)• Module level calibration coefficient (1 word)• OTP memory protection control (4 words)• Default register control (1 word)• Reserved (24 words)• User data region (26 words)

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QSPI encryption is optional. This is enabled at runtime through a QSPI command. If thisfeature is not required, the OTP memory locations can remain unprogrammed. For security
reasons, the encryption key cannot be read once programmed.

The MAC address fields in the OTP memory are accessed by firmware when powering uperP

the device and presented to the host through an SPI/QSPI-based event as part of the bootphase. The host driver is responsible for configuring the MAC addresses as part of device
configuration. As such, the MAC addresses stored in OTP memory can be overwritten by thehost. Using this mechanism, the MAC addresses in the OTP memory can remain
unprogrammed if an alternate host side storage is used.
The only module level calibration coefficient is the crystal oscillator trim. This is required tominimize the frequency offset resulting from the external 40 MHz crystal. See Device
Commissioning and Characterization for information related to calibration.
Although the OTP memory is one time programmable, any bit still in a 1 state can be
reprogrammed into a 0 state. To avoid deliberate or inadvertent modification of the OTP
memory data, a protection mechanism is provided. The protection registers initially need to
be programmed to 0x50FA50FA in order to activate programming of the remaining locations.

28

Once OTP memory programming is complete, the protection registers should be
programmed to 0x00000000, at which point the OTP memory can never be modified.
In addition to the logical protection mechanism described above, a programming voltage
needs to be applied to the OTPVDD pin in order to enable programming. The programming
voltage is 2.5 V, while for reads it is 1.8 V. To coordinate the OTPVDD supply voltage withread and write operations, it is recommended to drive this supply from the POWERIOVDD
output pin on AN7002Q. This also ensures there will be no leakage associated with the OTP
memory across sleep cycles, where the digital supply rail is removed.
The OTP memory is indirectly mapped, and as such read and writes are achieved using
address, data, and mode registers. The OTP memory programming utility implements thisprogramming, along with appropriate control of the OTPVDD supply through the
POWERIOVDD output.

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10. FICR - factory information configuration
registers
The Factory Information Configuration Registers (FICR) are stored in the OTP memory.
FICR has two regions:• A factory-programmed region that contains device information and has the INFO group
registers.
• A customer-programmable region that contains empty registers for the customer to write
data to. It
has the QSPI, MAC, and CALIB group registers.
Access to the customer-programmable region is controlled using the PROTECTION register.
The PROTECTION scenarios are:• When PROTECTION is unprogrammed, neither read not write is enabled.

yr• When PROTECTION is programmed to 0x50FA50FA, full read and write access isenabled.

an• When PROTECTION is programmed to 0x00000000, access protection is applied andimli

readout of
QSPI.KEY is prevented.

The following table shows the access protection for the different register groups.

erP

Please click to download full spec from “nRF7002 Product Specification v1.1”.

30

11. Reference circuit
AN7002Q module compatible with MDBT5340 module

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12. Notes and cautions
Module is not designed to last for a lifetime. Like general products, it is expected to be wornout after continuous usage through the years. To assure that product will perform better andlast longer, please make sure you:⚫

Follow the guidelines of this document while designing circuit/end-product. Any
discrepancy of core Bluetooth technology and technical specification of IC should referto definition of Bluetooth Organization and Nordic Semiconductor as final reference.

⚫

Do not supply voltage that is not within range of specification.

⚫

Eliminate static electricity at any cost when working with the module as it may causeyrdamage. It is highly recommended adding anti-ESD components to circuit design toprevent damage from real-life ESD events. Anti-ESD methods can be also applied inmechanical design.
⚫

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Do not expose modules under direct sunlight for long duration. Modules should be kept

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away from humid and salty air conditions, and any corrosive gasses or substances.
Store it within -40℃ to +125℃ before and after installation.
⚫

Avoid any physical shock, intense stress to the module or its surface.

⚫

Do not wash the module. No-Clean Paste is used in production. Washing it will oxidizeerP

the metal shield and have chemistry reaction with No-Clean Paste. Functions of themodule are not guaranteed if it has been washed.

The module is not suitable for life support device or system and not allowed to be used in
destructive device or systems in any direct or indirect ways. The customer agrees toindemnify Raytac for any losses when applying modules in applications such as the ones
described above.

32

13. Useful links⚫

Nordic Infocenter: https://infocenter.nordicsemi.com/index.jsp
All the necessary technical files and software development kits of Nordic’s chip are on
this website.

⚫

Nordic DevZone: https://devzone.nordicsemi.com/questions/
A highly recommended website for firmware developer. Interact, discuss and consult
with other fellow developers and Nordic’s employees to get answers to your questions.
The site also includes tutorials in detail to help you get started.

⚫

Official Page of nRF7002 : https://www.nordicsemi.com/Products/nRF7002
A brief introduction to nRF7002 and download links for Nordic’s developing software and
SoftDevices.

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Full list of Raytac’s WiFi modules⚫ AN7002Q series (QFN package IC)
SeriesAN7002Q

NordicSolutionnRF7002

Raytac No.

IC
Ver.

AN7002Q

1

AN7002Q-P

1

AN7002Q-U

1

Antenna
Chip
Antenna
PCB
Antennau.FL
Connector

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Full list of Raytac’s Bluetooth modules⚫ AN54L15 series (QFN package IC) ~ coming soon
⚫ AN54H20 series~ coming soon

⚫ AS1262 series (QFN package IC) ~ coming soon
⚫ MDBT53 series (WLCSP package IC)yrSeriesNordicSolution

Raytac No.

IC
Ver.

Antenna

MDBT53

nRF5340

MDBT53-1M

1Chip
Antenna

MDBT53-P

nRF5340

MDBT53-P1M

1PCB
Antenna

512 kbMDBT53-U

nRF5340

MDBT53-U1M

1

u.FL
Connector

512 kb

1 MB

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RAM

a
n
512 kbFlash
Memory
1 MB

1 MB⚫ MDBT53V series (WLCSP package IC)
Series
MDBT53V

MDBT53V-Per
P
NordicSolution

Raytac No.

IC
Ver.

AntennaRAM

Flash
MemorynRF5340

MDBT53V-1M

1

Chip
Antenna

512 kb

1 MB

nRF5340

MDBT53V-P1M

1PCB
Antenna

512 kb

1 MB

35

⚫ MDBT50 series (QFN package IC)
SeriesNordicSolution

Raytac No.

IC
Ver.

nRF52820

MDBT50-256R

1

nRF52833

MDBT50-512K

1

nRF52820

MDBT50-P256R

1

nRF52833

MDBT50-P512K

1

Antenna
Chip
Antenna

MDBT50PCB
Antenna

MDBT50-P

RAM

Flash
Memory32 kb

256 kb128 kb512 kb

32 kb

256 kb128 kb512 kb⚫ MDBT50Q series (aQFN package IC)
Series

MDBT50Q

MDBT50Q-P

MDBT50Q-U

NordicSolution

Raytac No.

IC
Ver.

nRF52840

MDBT50Q-1MEN

3

MDBT50Q-1MV2

2

nRF52833

MDBT50Q-512K

1

nRF52840

MDBT50Q-P1MEN3

MDBT50Q-P1MV2

e
r
P

2

nRF52833

MDBT50Q-P512K

1

nRF52840

MDBT50Q-U1MEN

3

nRF52840

MDBT50Q-U1MV2

2

nRF52833

MDBT50Q-U512K

1

MDBT50Q-RX

1, 2

MDBT50Q-CX-40

1

MDBT50Q-CX-33

1

nRF52840
DonglenRF52833

RAM

a
n

Chip
Antennaimli

nRF52840

nRF52840

Antenna

PCB
Antennau.FL
Connector

PCB
Antenna

256 kb128 kbyr
FlashMemory1 MB

512 kb256 kb

1 MB

128 kb512 kb256 kb

1 MB

128 kb512 kb256 kb

1 MB

128 kb512 kb36

⚫ MDBT42T series (WLCSP package IC)
SeriesNordicSolution

MDBT42T

Raytac No.

IC
Ver.

AntennaRAM

Flash
Memory1

Chip
Antenna
PCB
Antenna

24 kb

192 K

IC
Ver.

AntennaRAM

Flash
Memory1

Chip
Antenna
PCB
Antenna

24 kb

MDBT42T-192K
nRF52805

MDBT42T-P

MDBT42T-P192K⚫ MDBT42TV series (WLCSP package IC)
SeriesNordicSolution

MDBT42TV

Raytac No.

IC
Ver.

Antenna

RAM

y
r

2

Chip
Antenna
PCB
Antenna

64 kb

512 K

IC
Ver.

AntennaRAM

Flash
Memory2

Chip
Antenna
PCB
Antenna

64 kb

512 K

MDBT42TV-192K
nRF52805

MDBT42TV-P

MDBT42TV-P192K⚫ MDBT42 series (WLCSP package IC)
SeriesNordicSolution

MDBT42imli

Raytac No.

MDBT42-512KV2
nRF52832

MDBT42-P

MDBT42-P512KV2

e
r
P

a
n

192 K

Flash
Memory⚫ MDBT42V series (WLCSP package IC)
Series
MDBT42V

NordicSolution

Raytac No.

MDBT42V-512KV2

nRF52832

MDBT42V-P

MDBT42V-P512KV2

37

⚫ MDBT42Q series (QFN package IC)
SeriesNordicSolution

Raytac No.

IC
Ver.

nRF52832

MDBT42Q-512KEN

3nRF52832

MDBT42Q-512KV2

2

nRF52810

MDBT42Q-192KV2

2

nRF52811

MDBT42Q-192KL

1

nRF52832

MDBT42Q-P512KEN

3

MDBT42Q

nRF52832

MDBT42Q-P512KV2

2

nRF52810

MDBT42Q-P192KV2

2

MDBT42Q-P

AntennaRAM

Flash
Memory

64 kb

512 K

24 kb

192 K

64 kb

512 K

Chip
Antenna

PCB
Antenna
24 kb

nRF52811

MDBT42Q-P192KL

1

nRF52832

MDBT42Q-U512KEN

3

i
m
li

MDBT42Q-U
nRF52832

MDBT42Q-U512KV2⚫ MDBT40 series
SerieserP
NordicSolution

Raytac No.

u.FL
Connector

64 kb

IC
Ver.

AntennaRAM

Flash
Memory

16 kb

256 K

3

Chip
Antenna

32 kb

256 K

16 kb

256 K

32 kb

256 K

2

MDBT40-256V3

MDBT40nRF51822

MDBT40-256RV3

MDBT40-P256V3

MDBT40-P

nRF51822

MDBT40-P256RV3

a
n

y
r
192 K

3

PCB
Antenna

512 K

38

Release note⚫

2024/07/29

Version 0.1: Preliminary.

i
m
li

a
n

y
r

e
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39