Build a true fidelity
system using video
signal conditioners
Chris Griffith
Product Marketing andBusiness Development Manager

Richard Hubbard
System Engineering

Zhihong Lin
Product Marketing
High Speed Interface
Texas Instruments

Applying signal conditioners to high-speed video
systems enables a true fidelity video systemdesign with 4K display.
The ever-increasing sophistication of technology advancement has created an evengreater appetite for higher quality video display. For example, in addition to ultrahigh-definition 4K resolution, high-definition multimedia interface (HDMI®) version 2.0
doubles the frame rate from 30 to 60 frames per second (FPS) when compared toHDMI 1.4. HDMI 2.0 has effectively increased the video transmission data rate from
3.4 to 6 Gigabits per second (Gbps) per data lane.
HDMI

Higher data rates that reach into the multi-gigabit
level can significantly impact signal integrality when

HDMI is a popular video interface based on thea signal travels through long traces, connectors,

Electronic Industries Alliance/Consumer Electronics

and long cables to the end receiver. The need forAssociation-861(EIA/CEA-861) standard, which

signal conditioners has never been more prominent

was established in 2003. HDMI can carry bothin this multi-gigabit era. In this paper, we review

video and digital audio signals from a source,and compare two popular video display standards:

for example, a video controller, to a sink device

HDMI and DisplayPort. We also discuss the benefits

such as a high-definition television (HDTV) orof using a signal conditioner to enable a true fidelity

monitor. HDMI is backwards-compatible with thevideo system design and what it takes to deliver

digital visual interface (DVI) and uses transition-a 4K display to consumers with each of theseminimized differential signaling (TMDS) as the maininterface standards.

communication channel.

Figure 1. HDMI signal interface connecting a video source and sink through an HDMI connector.

Build a true fidelity system using video signal conditioners

2June 2016

Figure 2. End-to-end DisplayPort signal interface.

While HDMI 1.4b has 30 FPS and HDMI 2.0 has

DisplayPort

60 FPS, both can support 4K resolution. 4K ultra-DisplayPort is the newer display interface introduced

high-definition (UHD) is a resolution of 3840 pixels

by the Video Electronics Standards Association× 2160 lines (8.3 megapixels, aspect ratio 16:9),(VESA) in 2008. The aim of this standard was toand is one of the two resolutions of UHD television

replace VGA and DVI when connecting PC monitors

targeted towards consumer television. The otherand projectors. DisplayPort versions 1.2, 1.2a and4K resolution is 4096 pixels x 2160 lines with 8.8

1.3 all support a resolution of 4K and above. Themegapixels for digital cinema projector. Figure 1

first two support high-bit rate 2 (HBR2) of 5.4 Gbps,

shows an HDMI signal interface. HDMI includes four

while the third supports high-bit rate 3 (HBR3) ofTMDS differential pairs with three pairs that carry

8.1 Gbps. DisplayPort dual mode (or DP++) isdata for video, audio and auxiliary data, and one paircomparable to HDMI 1.4b performance, whichthat carries the clock. The physical layer for TMDS is

supports 4K at 30 FPS. DP++ can directly transmit

DC-coupled. Using differential signaling can reduce

HDMI TMDS signals using a simple adapter.

the electromagnetic interference (EMI) and transmit

Figure 2 shows a DisplayPort signal interface. Thethe data serially over the data link.

main link consists of one, two or four AC-coupled

For HDMI 1.4b, each TMDS data lane can support

differential lanes. AC-coupling enables DisplayPort

up to 3.4 Gbps. For HDMI 2.0, each TMDS data lanesource and DisplayPort sink to have different

can support up to 6 Gbps. The display data channel

common-mode voltages. Each main link lane can(DDC) is based on I2C for source to discover thesupport 8.1 Gpbs for DisplayPort 1.3, or 5.4 Gbps

sink’s configuration and capabilities. The Consumerfor DisplayPort 1.2a. The auxiliary (AUX) channel

Electronics Control (CEC) protocol is used by HDMI

is a half-duplex, bidirectional channel used for linkdevices to control each other, or to be operated bymanagement and device control. The AUX channel

remote control devices. The HDMI Ethernet andhas a data rate of 1 Mbps and uses Manchester

audio return channel (HEAC) is optional to provide

II encoding. HPD is used to notify a source of thean Ethernet-compatible data network and an audio

connection or generate an interrupt request by thereturn channel from sink-to-source direction. A hot-sink device. DisplayPort provides link training, which

plug-detect (HPD) signal notifies the source that aallows sources and sinks to communicate andsink device is connected.

establish a robust audio/video link that other video
technologies lack.

Build a true fidelity system using video signal conditioners

3June 2016

Figure 3. Embedded DisplayPort signal interface.

When DisplayPort ++ (DP++) was introduced

Embedded eDP v1.4 is fully backwards-compatible

in 2013, it was designed to enable DisplayPortwith DisplayPort 1.2a. Generally, only one or twointeroperability with DVI and HDMI interfaces.

main-link lanes will be needed due to the smallThis was achieved by adding three capabilities toform factor and resolution needed for a laptop PC.

DisplayPort and using a simple adaptor to output

Since eDP is internal to a system, the protocol can

DVI and HDMI format:

be flexible, depending on system requirements and• Adding a DP_PWR DisplayPort receptacle power

dedicated display.

pin provides power to a video adaptor

Signal conditioners• Adding a CONFIG1 and CONFIG2 provides adiscovery mechanism for dual-mode video adaptor• Adding I2C over an AUX channel connects to an

When signals traverse through a transmission
media, such as over printed circuit board (PCB)
trace, across connectors, over long cables, they are

HDMI DDC interface

subject to the effects of noise, distortion and signal

There are two types of dual-mode DP adaptors:

loss. Signal integrity and fidelity can be preserved at

Type 1 and Type 2. Type 1 supports a maximum

a low bit-rate and travel through longer distances.

TMDS clock rate of 165 MHz for both DVI andHowever, multi-gigabit signals such as DisplayPort

HDMI, and DDC signaling through I2C. Type 2and HDMI are subject to significant signal integrality

supports 165 MHz for DVI and 300 MHz for HDMI

degradation when signals traverse through longfor a maximum TMDS clock rate, and both DDC andtraces, across connectors or over long cables. The

AUX-over-I2C signaling.

result could be reduced signal strength, a distorted

While DisplayPort defines the interconnect between

or noisy signal at the receiving end, or a signal failing

different video sources and sink devices through anstandard compliance.

external cable connection, embedded DisplayPort

Several techniques incorporated into a signal(eDP) is defined for internal interconnect between theconditioner can be used to mitigate this signal

video source and display panel used in a notebook,integrity issue with DisplayPort or HDMI. Equalizers

for example. Typically the video source contains

in both receive and transmit directions can be useda graphics processing unit (GPU), and the sink

to remove signal distortion in the frequency domain.

device function is integrated into a display processor

A linear equalizer can process the incoming signal

such as a notebook’s liquid crystal display (LCD)

with a linear filter, and an adaptive equalizer cantiming controller (TCON). Figure 3 shows the signal

update the equalizer parameter as it processes theinterface of an embedded DisplayPort.

data to achieve the best performance.

Build a true fidelity system using video signal conditioners

4June 2016

Figure 4. Source-side retimer block diagram.

Pre-emphasis is an often-used signal conditioning

By using retimers and redrivers in DisplayPort ortechnique that can increase the magnitude of someHDMI interfaces, the video system can maintainfrequencies to improve the overall signal-to-noise

signal integrity over long traces or cables withratio (SNR). Clock and data recovery circuits canimproved signal quality. Retimers and redrivers

recover the clock at the receiver end, and recreate

enable design flexibility by extending the distancea cleaner signal with input noise, inter-symbolthat a signal can travel across cables or traces. This

interference and jitter removed.

enables a broad range of interoperability, as well

Redrivers and retimers, or repeaters, are typicalas improved system performance, while helping asignal conditioners. A redriver is an analog

system to pass standard compliance.

component used to restore an attenuated input

Video source-side signal conditioner

signal through equalization and gain adjustment,

As GPUs and other system-on-chip (SoC) devices

and to re-transmit the signal based on signal

migrate to lower geometry CMOS processes, theyspecification. Redrivers also can be used to shift

are moving away from supporting high common-common-mode voltages, for example, going frommode, wide-swing physical layer technologies

an AC-coupled to DC-coupled signal.

like HDMI. Their preference now is AC-coupled

A retimer is a mixed-signal component used totechnologies like DisplayPort, PCIe, and USB 3.1.

recover an attenuated input signal with clock data

This, along with the distance between these SoC

recovery circuits, compensate the phase anddevices and HDMI connectors, makes it difficult torandom jitter, then retransmit the signal based onpass HDMI compliance. Increasing the data rate

the signal specification. A retimer usually includes

makes this process even more difficult. To pass

redriver functionalities.

compliance redrivers and retimers are needed.
Figure 4 shows a block diagram for a retimer thattakes the AC-coupled input signal and converts it toDC-coupled TMDS signaling.

Build a true fidelity system using video signal conditioners

5June 2016

Figure 5. Sink-side retimer block diagram.

Signal conditioners, such as redrivers and retimers,

Video sink-side signal conditioners

can implement several features to improve signal

Where source-side redrivers and retimers areintegrity. They can support adaptive or fixed

used to pass compliance at the source connector

equalization to clean up inter-symbol interferencesink-side, signal conditioners must pass sink-side

jitter or loss from bandwidth-limited board traces tocompliance, which is much more difficult.

cables. Retimers use clock data recovery circuits

Sink-side HDMI retimers need to support four(CDR) to cleanup random, phase and sinusoidal

TMDS channels, an audio return channel, and digitaljitter. Good retimers have wideband CDR tracking

display control (DDC) interfaces. These retimers

and narrowband jitter cleaning, as well as themust support both HDMI 1.4b and HDMI 2.0, which

capability to work with wide frequency ranges.

provides a challenge. For HDMI 1.4b the clock rate

Retimers enable signal recreation without expensive

is one-tenth the data rate and can be between

external components, and the recovered clock

25 MHz and 340 MHz. When a system is HDMI 2.0,

can be forwarded to the sink. The transmitterthe clock rate is one-fortieth the data rate for data

provides several features for passing compliance

rates greater than 3.4 Gbps. The clock frequency forand reducing system-level design issues like de-HDMI 2.0 overlaps HDMI 1.4b, 85 MHz to 150 MHz.

emphasis, which compensates for the attenuation

This requires retimers to be more intelligent by having

when driving long cables or high-loss board traces.

to read certain registers and bits on the DDC line.
Figure 5 shows a sink-side retimer block diagram,which can be found in an ultra-HDTV.
Figure 6 shows a source and sink application with asignal conditioner at both ends.

Build a true fidelity system using video signal conditioners

6June 2016

Figure 6. End-to-end system block diagram using video signal conditioner.

Conclusion

ReferencesAs cinema-quality, 4K resolution is becoming main

• Learn more about these TI solutions: interface,stream, the need for signal conditioners to bring
the desired video bandwidth over a Gigabit linkcontinues to increase. Video signal conditioners suchas the SN65DP159, SN75DP159, SN65DP149,
SN75DP149, TMDS181I, TMDS181, TMDS171I andretimers, redrivers• Download these data sheets: SN65DP159,
SN75DP159, SN65DP149, SN75DP149,
TMDS181I, TMDS181, TMDS171I and TMDS171

TMDS171 enable these 4K video systems. Thesevideo conditioners provide low-power consumption
and state-of-the-art clock data recovery (CDR)
technology for quality signal performance. These
retimers have Eye Scan, a built-in real-time
diagnostic tool that visualizes eye quality, whichsimplifies system design and debugging. Using TI
video signal conditioners, a designer can overcome
high-speed video signal design challenges, preserve
4K video signal fidelity, and increase system
performance for a true 4K video experience.

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