Euvis

8-GSPS DAC FMC Module, FMC201

FMC201 – 8-GSPS 12-bit DAC with 2:1 MUX’s FMC Module
PRODUCT DESCRIPTION
The FMC201 module is equipped with the Euvis MD662H digital-to-analog converter(DAC). At 8 GSPS, the module provides analog outputs with bandwidth from DC to 4 GHz(Nyquist bandwidth). In addition to the 4:1 internal multiplexer of the MD662H, the module
includes four 2:1 high-speed Euvis MX2412H multiplexers to further lower the input data
rate and can directly accept advanced FPGA LVDS outputs. The total multiplexing ratio is
8:1 and the digital data rate is 1 Gb/s for the DAC operated at 8 GSPS. The 96 LVDS pairsof digital data are fed through two FMC connectors, a high-pin-count (HPC) and a low-pincount (LPC) connector. Sampling window select (SEL’s) and reset signals of the DAC canbe independently controlled via the FMC connectors. The module includes three clock
buffers to relax the need of high-power clock source. The amplitudes and duty cycles of theclock buffers can be programmed though the I2C interface.

KEY FEATURES•••••

12-bit DAC
1 ~ 8 GSPS sampling rate
On-board clock buffers with adjustable gain and duty cycle
Power supplies needed from carrier: 12V and 3.3 V
Compliant with Vita 57.1 standard

SMA Connectors

FMC Connectors
ControlClock
Buffer &Distribution

CKI

222OP, ON2

MUX
DAC

2I2C

CK_8

RESET
SEL

96

2:1
MUX

Power Unit

Rev (A.4), 3/5/14

192

D+ 12 V+ 3.3 V

1Euvis8-GSPS DAC FMC Module, FMC201

ELECTRICAL SPECIFICATIONS
SymbolParameterMin

TypicalMax

UnitoOperating Temperature

ToSampling Ratefdata

188GSPSClock Frequency

fCK0.544GHz

Clock Input Power

PCK+3+6+10dBm

Output Frequency

fout04GHzOutput Level1Vout-6350mVPout-40dBm-130

dBC/HzOutput Power225C

Output Residue Phase Noise

NfOutput Port Return Loss

RLRF

15dB

V33+3.3

V

I33

300mA

V120+12V

I120

800mAPower Supply

1If external 50 ohm loads are terminated to ground, the analog outputs will
have voltage swings from ground to – 0.6 V with a common mode voltageof –0.3 V. If a positive analog output common mode level is desired, theexternal 50 ohm loads can be terminated to a positive voltage Vpull with aresultant analog output common mode voltage of (Vpull – 0.6)/2.
Vpull should not exceed 5 V.
210 KHz offset

Rev (A.4), 3/5/14

2

Euvis8-GSPS DAC FMC Module, FMC201TERMINAL DESCRIPTION
Name

Function

I/O

SignalCKI

Input Clock

IRFOP

Analog Output Positive

ORFON

Analog Output Negative

ORFGND

GroundD96 LVDS Pairs of Digital Data Inputs

IRFRESET_A

LVDS Pair inputs for DAC ResetIRFSEL_A

DAC Sampling Window SelectIDCSCKI2C Clock

I

RFSDA

I2C Data

I/O

RF

Rev (A.4), 3/5/14

DC3

Euvis8-GSPS DAC FMC Module, FMC201

SWITCHING CHARACTERISTICS
Parameter

Description

Min

TypMaxUnits

Data, Reset, CK_8: LVDS Logic
VIH
VIL

Input Voltage High
Input Voltage Low

1.4
1V
V

ITsTh

Input driving current
Setup time
Hold time

2mA
nsns

0.2
0.2

SEL and RZ: LVCOMS25 / LVCMOS18 Logic
VIH

Input Voltage High1.52.5

2.8

V

VILIInput Voltage Low
Input driving current-0.302500.5VuA

I2C SDA, SCK: LVTTL33 LogicSpeed

Standard
Fast

VIH

High-Speed
Input Voltage HighVILIInput Voltage Low
Input driving current

Cin
VHys

Input Capacitance
Input Hysteresis

Rev (A.4), 3/5/14

2100400

KHz
KHz

3400
3.3

KHz
V00.3

1±1

VuA

2pF
V

4Euvis8-GSPS DAC FMC Module, FMC201PIN ASSIGNMENT
Signal NameMDA_RESETPMDA_RESETNMDA_SEL1
MDA_SEL2
MXA_SEL1
MXB_SEL1
MXC_SEL1
MXD_SEL1
MUX_CK_OE
MUX_CK_POLCKD8FPCKD8FNI2C SCLI2C SDA+12V+3.3V

Rev (A.4), 3/5/14

FMC Pin Name
LPC_LA18P
P2.C22
LPC_LA18N
P2.C23
LPC_LA14P
P2.C18
LPC_LA14N
P2.C19HPC_HB19N
P1.E33
HPC_HB19P
P1.E34
LPC_LA02N
P2.H7
LPC_LA02P
P2.H8
LPC_LA13P
P2.D17
LPC_LA13N
P2.D18
HPC_CLK00P
P1.H4
HPC_CLK00N
P1.H5
HPC_SCL
P1.C30HPC_SDA
P1.C31
12P0V
P1.C35
12P0V
P1.C37
12P0V
P2.C35
12P0V
P2.C37
3P3V
P1.C393P3VAUX
P1.D32
3P3VP1.D36
3P3V
P1.D38
3P3V
P1.D403P3V
P2.C393P3VAUX
P2.D32
3P3V
P2.D36
3P3V
P2.D38
3P3V
P2.D405

Euvis8-GSPS DAC FMC Module, FMC201MUXDAC Data
A
A11B
A
B11B
A
C11B
A
D11B
A
A10B
A
B10B
A
C10B
A
D10B
A
A9B
A
B9B
A
C9B
A
D9B
A
A8B
A
B8B
A
C8B
A
D8B

FMC Pin
HPC_HB17P
P1.K37
HPC_HB17N
P1.K38
HPC_HB18P
P1.J36
HPC_HB18N
P1.J37
HPC_HB14P
P1.K34
HPC_HB14N
P1.K35
HPC_HB15P
P1.J33
HPC_HB15N
P1.J34
HPC_HB16P
P1.F34
HPC_HB16N
P1.F35
HPC_HB12P
P1.F31
HPC_HB12N
P1.F32
HPC_HB11P
P1.J30
HPC_HB11N
P1.J31
HPC_HB10P
P1.K31
HPC_HB10N
P1.K32
HPC_HB08P
P1.F28
HPC_HB08N
P1.F29HPC_HB07P
P1.J27
HPC_HB07N
P1.J28
HPC_HB04P
P1.F25
HPC_HB04N
P1.F26
HPC_HB06P
P1.K28
HPC_HB06N
P1.K29HPC_HB00P
P1.K25
HPC_HB00N
P1.K26
HPC_HB02P
P1.F22
HPC_HB02N
P1.F23
HPC_HB01PP1.J24
HPC_HB01N
P1.J25
HPC_HB03P
P1.E21
HPC_HB03N
P1.E22
HPC_LA25P
P1.G27
HPC_LA25N
P1.G28
HPC_LA24P
P1.H28
HPC_LA24N
P1.H29HPC_LA29P
P1.G30
HPC_LA29N
P1.G31
HPC_LA28P
P1.H31
HPC_LA28N
P1.H32
HPC_LA31P
P1.G33
HPC_LA31N
P1.G34
HPC_LA30P
P1.H34
HPC_LA30N
P1.H35
HPC_LA33P
P1.G36
HPC_LA33N
P1.G37
HPC_LA32P
P1.H37
HPC_LA32N
P1.H38
HPC_LA26P
P1.D26
HPC_LA26N
P1.D27
HPC_LA21P
P1.H25
HPC_LA21N
P1.H26
HPC_LA27P
P1.C26
HPC_LA27N
P1.C27
HPC_LA22P
P1.G24
HPC_LA22N
P1.G25
HPC_LA23P
P1.D23
HPC_LA23N
P1.D24
HPC_LA19P
P1.H22
HPC_LA19N
P1.H23
HPC_LA20P
P1.G21
HPC_LA20N
P1.G22
HPC_LA17P
P1.D20
HPC_LA17N
P1.D21

Rev (A.4), 3/5/14

MUXDAC Data
A
A7B
A
B7B
A
C7B
A
D7B
A
A6B
A
B6B
A
C6B
A
D6B
A
A5B
A
B5B
A
C5B
A
D5B
A
A4B
A
B4B
A
C4B
A
D4B

FMC Pin
HPC_HA12P
P1.F13
HPC_HA12N
P1.F14
HPC_HA13P
P1.E12
HPC_HA13N
P1.E13
HPC_HA08P
P1.F10
HPC_HA08N
P1.F11
HPC_HA09P
P1.E9
HPC_HA09N
P1.E10
HPC_HA04P
P1.F7
HPC_HA04N
P1.F8
HPC_HA05P
P1.E6
HPC_HA05N
P1.E7
HPC_HA00P
P1.F4
HPC_HA00N
P1.F5
HPC_HA01P
P1.E2
HPC_HA01N
P1.E3
HPC_HA16P
P1.E15
HPC_HA16N
P1.E16
HPC_HA15P
P1.F16
HPC_HA15N
P1.F17
HPC_HA18P
P1.J18
HPC_HA18N
P1.J19HPC_HA20P
P1.E18
HPC_HA20N
P1.E19HPC_HA21P
P1.K19HPC_HA21N
P1.K20
HPC_HA19P
P1.F19HPC_HA19N
P1.F20
HPC_HA22P
P1.J21
HPC_HA22N
P1.J22
HPC_HA23P
P1.K22
HPC_HA23N
P1.K23
HPC_HA17P
P1.K16
HPC_HA17N
P1.K17
HPC_HA14P
P1.J15
HPC_HA14N
P1.J16
HPC_HA10P
P1.K13
HPC_HA10N
P1.K14
HPC_HA11P
P1.J12
HPC_HA11N
P1.J13
HPC_HA06P
P1.K10
HPC_HA06N
P1.K11
HPC_HA07P
P1.J9
HPC_HA07N
P1.J10
HPC_HA02P
P1.K7
HPC_HA02N
P1.K8
HPC_HA03P
P1.J6
HPC_HA03N
P1.J7
HPC_LA02P
P1.H7
HPC_LA02N
P1.H8
HPC_LA00P
P1.G6
HPC_LA00N
P1.G7
HPC_LA13P
P1.D17
HPC_LA13N
P1.D18
HPC_LA09P
P1.D14
HPC_LA09N
P1.D15
HPC_LA05P
P1.D11
HPC_LA05N
P1.D12
HPC_LA06P
P1.C10
HPC_LA06N
P1.C11
HPC_LA10P
P1.C14
HPC_LA10N
P1.C15
HPC_LA14P
P1.C18
HPC_LA14N
P1.C19MUXDAC Data
A
A3B
A
B3B
A
C3B
A
D3B
A
A2B
A
B2B
A
C2B
A
D2B
A
A1B
A
B1B
A
C1B
A
D1B
A
A0B
A
B0B
AC0B
A
D0B

FMC Pin
HPC_LA03P
P1.G9
HPC_LA03N
P1.G10
HPC_LA04P
P1.H10
HPC_LA04N
P1.H11
HPC_LA08P
P1.G12
HPC_LA08N
P1.G13
HPC_LA07P
P1.H13
HPC_LA07N
P1.H14
HPC_LA12P
P1.G15
HPC_LA12N
P1.G16
HPC_LA11P
P1.H16
HPC_LA11N
P1.H17
HPC_LA16P
P1.G18
HPC_LA16N
P1.G19HPC_LA15P
P1.H19HPC_LA15N
P1.H20
LPC_LA32P
P2.H37
LPC_LA32N
P2.H38
LPC_LA33P
P2.G36
LPC_LA33N
P2.G37
LPC_LA30P
P2.H34
LPC_LA30N
P2.H35
LPC_LA31P
P2.G33LPC_LA31N
P2.G34
LPC_LA28P
P2.H31
LPC_LA28N
P2.H32
LPC_LA29P
P2.G30
LPC_LA29N
P2.G31
LPC_LA24P
P2.H28
LPC_LA24N
P2.H29LPC_LA25P
P2.G27
LPC_LA25N
P2.G28
LPC_LA27P
P2.C26
LPC_LA27N
P2.C27
LPC_LA26P
P2.D26
LPC_LA26N
P2.D27
LPC_LA21P
P2.H25
LPC_LA21N
P2.H26
LPC_LA22P
P2.G24
LPC_LA22N
P2.G25
LPC_LA23P
P2.D23
LPC_LA23N
P2.D24
LPC_LA19P
P2.H22
LPC_LA19N
P2.H23
LPC_LA20P
P2.G21
LPC_LA20N
P2.G22
LPC_LA17P
P2.D20
LPC_LA17NP2.D21
LPC_LA15P
P2.H19LPC_LA15N
P2.H20
LPC_LA16P
P2.G18
LPC_LA16N
P2.G19LPC_LA11P
P2.H16
LPC_LA11N
P2.H17
LPC_LA12P
P2.G15
LPC_LA12N
P2.G16
LPC_LA07P
P2.H13
LPC_LA07N
P2.H14
LPC_LA08P
P2.G12
LPC_LA08N
P2.G13
LPC_LA04P
P2.H10
LPC_LA04N
P2.H11
LPC_LA03P
P2.G9
LPC_LA03N
P2.G106Euvis

8-GSPS DAC FMC Module, FMC201

BOARD OUTLINE AND DIMENSIONS:TOP VIEW

P1 is the primary HPC connector and P2 is the LPC connector. All dimensions use thebottom left corner of the board as the origin. All dimensions are in millimeters (mm). Board
thickness is 1.62 mm.

Board Edge Lengths
Edge

LengthEdge

LengthEdge

Length

adg
j

139
9.1
131.3
56.9beh
Width

61.7
2.1
21.9
139

cfi
Height

2.4
83
78.8

FMC Connector Mount Hole Locations ( x, y )73, 18.4

136, 18.4

3, 18.4

66, 18.4

SMA Locations ( x, y )
CKI
OA_P
OA_N

Rev (A.4), 3/5/14

118.6, 69.3
61.7, 69.3
92.1, 69.3

7

Euvis8-GSPS DAC FMC Module, FMC201TEST SETUP
In applications, FMC201 requires a VITA 57.1-compliant carrier board to provide all digital
data, DAC controls, I2C signal, and DC powers via FMC connectors. The carrier must
provide two power supplies, +12V and +3.3V, with minimum current capacities of 1A and500mA respectively. Digital data and DAC resets are in LVDS pairs. The DAC timing
selects are single-ended LVCMOS25. The carrier board can be an advanced FPGA
evaluation board, such as Xilinx VC707, with proper configurations.
The FMC module is tested using Euvis carrier FMCC371 as shown in following figure. Thecarrier consists of a Xilinx XC6VLX130T, a USB controller, and power modules. In the testsetup, the carrier is controlled by a PC host via the USB interface. The carrier can store up
to 2 x 512 K words of data in memory. The maximum data length is 64us at 4 GSPS foreach channel. Several built-in waveforms are available as in our AWG’s GUI. Waveformgeneration and download are performed in GUI.

Rev (A.4), 3/5/14

8

Euvis8-GSPS DAC FMC Module, FMC201

Euvis Inc.
Ordering Information:
Email to: Sales@euvis.com
Or call: (805) 583-9888 x108 Sales Department
Or fax: (805) 583-9889
The information contained in this document is based on preliminary measured results.
Characteristic data and other specifications are subject to change without notice. Customers
are advised to confirm information in this advanced datasheet prior to using this informationor placing the order.
Euvis Inc. does not assume any liability arising from the application or use of any product or
circuit described herein, neither does it convey any license under its patents or any otherrights.

Rev (A.4), 3/5/14

9