IBMの最新ハードウェアテクノロジーのご紹介
IBM Research Tokyo, Science & Technology,Senior Manager
Shintaro Yamamichi, Ph. D.	

© 2016 IBM Corporation1

Where we are! 1990年: 「収穫加速の法則」 by Ray Kurtzweil– “Mooreの法則は、コンピュータ発展の 第5のパラダイム” 	

1,000ドル・1秒当たりの計算能力

What’s next?

ICDiscrete
真空管リレー
パンチカードWikipedia© 2016 IBM Corporation2

情報爆発	! 1ZB (Zetta Byte) /年

＠2010– 新聞朝刊(1MB)→約3.7兆年分

Ref. 電子情報通信学会誌
Vol.94,No.8,2011© 2016 IBM Corporation3

情報爆発	

2012年	

2020年	

344

zettabytes

zettabytes

全世界で生み出されるデジタル情報の総量500億本分の映画に相当
Source: IDC Digital Universe, IBM GTO 2015

© 2016 IBM Corporation4

Internet of Things	サービスRFID/sensornetwork© 2016 IBM Corporation

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Internet of Things	

2005年	

11%

2020年	

42%

全データにおけるセンサーデータの割合
Source: IDC Digital Universe

6© 2016 IBM Corporation

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Brain-Inspired Computing	

左脳

右脳

言語・会話・計算概念・声や音の認知
論理的思考

五感
イメージ・図形・音楽
直感的思考© 2016 IBM Corporation

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ITは第三世代へ	
コグニティブ・システムの時
代 Cognitive
Systems Era

プログラムで動く時代
Programmable
Systems Era

計算機の時代Tabulating
Systems Era© 2016 IBM Corporation

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Cognitive Computing	Cognition
In science, cognition is the set of all mental abilities and processes
related to knowledge: attention, memory & working memory,
judgment & evaluation, reasoning & "computation", problem solving& decision making, comprehension & production of language, etc. 	
Cognitive Computer
A cognitive computer is a proposed computational device with a
non-Von Neumann architecture that implements Hebbian learning.
非フォン・ノイマン型アーキテクチャー

ヘブ則	

人間の脳のように経験から学び、異なる事象間の関係性を見つけ、仮説を立て、判断し、記憶する機能を備えたコンピューターの概念
Source: Wikipedia / IBM© 2016 IBM Corporation

9Watson vs. Brain	

System Power (W)! Big efficiency gap calls for technology innovation	

Watson Power Scaling
with Moore’s Law> 1,000x
Efficiency
Gap*

Human Brain*brain does far more than scaled Watson

Year10© 2016 IBM Corporation

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フォンノイマンアーキテクチャー vs 脳	

Dharmendra S. Modha
Science 345, pp668-673(2014)© 2016 IBM Corporation

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コンピュータと脳は異質なデバイス	

~5 GHz, sequential, linear
200 kW
150um pitch, ~5K joints/cm2
CPU-バス-メモリシステム

1210 Hz, parallel, high fanout
20 W
10um pitch, ~1M synapses/cm2
CPU-メモリ共役システム© 2016 IBM Corporation

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Neuromorphic Device	! Brain-Inspired device	

NeuronSynapseシナプス	

Dendrite

Neuronニューロン	

Axon
アクソン	

Axon

NeuronSynapsewikipedia© 2016 IBM Corporation

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SyNAPSE chip	! SyNAPSE : Systems of Neuromorphic Adaptive Plastic Scalable Electronics 	
256 neurons, 256k synapses,
field-programmable
Merolla et al., 2011; Arthur et al., 2012

NeuronDendrite
Axon

NeuronSynapsewikipedia© 2016 IBM Corporation

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SyNAPSE 2nd Generation : “TrueNorth”	
1st gen (2011) 	
256 neurons
260K synapses
3.8M transistors
45pJ/spike	

2nd gen (2014) 	
1M neurons
256M synapses
5.4B transistors
70mW (20mW/cm2)	
4096 Cores
1 Core256 neurons
256 x 256 synapse
256 x 4096 = 1M neurons© 2016 IBM Corporation

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SyNAPSE “TrueNorth”	

Speaker recognition by face
image and voiceHandwriting
recognition

Object recognition and tracking© 2016 IBM Corporation

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IBM Creating New Cognitive Technologies
OFF	  ON	  Power, space, memory, and communication scale with synapses© 2016 IBM Corporation17

Challenges for Neuromorphic Integration	
SynapseNeuronSyNAPSE Chip x 1

256M

1M

Bee

8.5B

0.85M

SyNAPSE Chip x 100

25.6B

100M

Cat

1T

100M

SyNAPSE Chip x 100K

25.6T

100B

Human1000T

100B

Cat (Bee x 100)Bee

Human (Cat x 1000)

individual
neuronresearch

synaptic
integration
researchaxon
interconnect
research“Axon”
Innovation needed!
© 2016 IBM Corporation

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Neuromorphic Interconnection! High density interconnection and 3D stacking for future scalable synaptic architecture

Ultra high-density interposer
Low temperature interconnect

ChipChipHigh density
wiring layers

Interconnect bottle neck for synaptic architecture
3D stacking

Low-cost TSV fill
TrueNorth module with 1M neurons© 2016 IBM Corporation

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Interposer challenges! Assumptions:– 0.7 M neurons & 7 B synapses :– 2 chip configuration : 1 synapse chip & 1 controller IC• Synapse chip : cross-bar array type, 10 x 10 mm for 438 M sypanse-> 16 chips required• Controller IC : smaller– Packaging : 2.5D integration, all cross-points accessible• Chip to substrate interconnections : 10 um! Challenges :– What is the substrate specification?	
Cross-bar array 	C’trl IC	synapse chip	© 2016 IBM Corporation

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Interposer challenges! Specifications:– Wiring pitch : < 1.0 um !
– Signal layers : 1 to 6 layers ! 	

© 2016 IBM Corporation

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IMS (Injection Molded Solder)• C4NP (C4 New Process) for wafer bumping- Adopted in IBM’ mass production from 2007.

Transfer

Solder filling
Solder

Wafer

Glass mold

Solder filling + Transfer -> ” 1process ”	

N2 pressure	
Molten solder	・Polyimide film
・Solder resist
・Resist mask	

" Simple process" Green process• No flux, No formic acid
• Reduction of solder waste" Pure solder injection• Capability of Higher solder bump
• Flexible solder composition• High capability for finer pitch" One pass for multiple bump size

Wafer / Interposer	
© 2016 IBM Corporation

22Bump structure formed by IMS with different Cu thickness• 40µm thick Cu pillar
As
received

Dry film (60µm)

Dry film

Cu pillar

SAC 305• 2µm thick Cu UBM
Dry film

Dry film

Cu UBM

SAC 305

After IMS

Afterstrippingdry film

• Particular geometry achieved is unique in industry.
Straight sidewalls w/ round top of the solder bump on pillar→ No need additional reflow. It should help with fine pitch.
• Molten solder injection w/o flux → No voids in solders.
• Ability to control solder composition readily.
• No change in throughput even though solder volume increased.
© 2016 IBM Corporation

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Advanced TSV technology 	
! Vertical integration after Stacking (ViaS)	

Chip stacking

TSV formation

Source: A. Horibe, IBM Japan, ECTC 2015

© 2016 IBM Corporation

Thank you for your kind attention!	

© 2016 IBM Corporation

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