THCV217_218_Design Guide_Rev.1.70_E

THCV217/THCV218 Application Note
System Diagram and PCB Design Guideline

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THCV217_218_Design Guide_Rev.1.70_E

Contents
Contents................................................................................................................................................................... 2
Application Diagrams.............................................................................................................................................. 3
Dual-in/Dual-out, 10bit (30bit per pixel) without Pre-emphasis ................................................................... 3Single-in/Single-out, 8bit (24bit per pixel) without Pre-emphasis ................................................................. 4Single-in/Dual-out to Dual-in/Single-out, 10bit (30bit per pixel) without Pre-emphasis............................. 5
Recommendations for Power Supply ...................................................................................................................... 6
Recommended Power Supply for THCV217................................................................................................... 6
Recommended Power Supply for THCV218................................................................................................... 6
Note ......................................................................................................................................................................... 7
PCB Layout Considerations .................................................................................................................................... 9
Notices and Requests............................................................................................................................................. 10

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Application Diagrams
Dual-in/Dual-out, 10bit (30bit per pixel) without Pre-emphasis

CMOS
Driver

THCV217
R19-R10

R19-R10

G19-G10

G19-G10

B19-B10

B19-B100.1mF

CONT11,12

0.1mF

*1

TX0n
TX0p

RX0n
RX0p

TX1n
TX1p

RX1n
RX1p

R29-R20
G29-G20

CMOS
Receiver

THCV218

CONT11,12
R29-R20

B29-B20

G29-G20
B29-B20

DVDH

CONT21,22

CONT21,22
10kW

DE, H/VSYNC
HTPDN
CLKIN
LOCKN

DE, H/VSYNC
HTPDN
LOCKN CLKOUT

PDN

Power Down

PDN

Power Down

3.3V
COL=L
-> 10bit(30bpp)
DEMUX=L & MODE=L-> Dual-in/Dual-out
PRE=L-> Pre-emphasis 0%
BET=L-> Normal Mode
R/F=H-> clock's rising edge
is used to latch data

R/F
DKEN
DK
COL
MODE1
MODE0
PLL
Reserved3,4 OPEN
Reserved1,2,5,6,7

3.3V

R/F
COL
DEMUX
MODE
PRE
Reserved0
Reserved1

COL=L-> 10bit(30bpp)
MODE1/0=L/ L-> Dual-in/Dual-out
PLL=L-> DiDo > 40MHz
BET=L-> Normal Mode
R/F=H, DKEN=DK=L-> clock's rising edgealigned to the centerof the data eye

*2

GND

*1
*2

GND

indicates microstrip lines or cables with their differential characteristic impedance being 100W
Connect GNDs of both Tx and Rx PCB

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THCV217_218_Design Guide_Rev.1.70_E

Single-in/Single-out, 8bit (24bit per pixel) without Pre-emphasis

THCV217

CMOS
Driver

R19-R12
R11-R10
G19-G12
G11-G10
B19-B12B11-B10
CONT11,12

THCV218

0.1mF

0.1mF

*1

TX0n
TX0p

RX0n
RX0p

R29-R20
G29-G20

CMOS
ReceiverR19-R12
R11-R10 OPEN
G19-G12
G11-G10 OPEN
B19-B12B11-B10 OPEN
CONT11,12 OPEN
R29-R20 OPEN

TX1n OPEN
TX1p OPEN

OPEN RX1n
OPEN RX1p

B29-B20

G29-G20 OPEN
B29-B20 OPEN

DVDH

CONT21,22

CONT21,22 OPEN
10kW

DE, H/VSYNC
HTPDN
CLKIN
LOCKN

DE, H/VSYNC
HTPDN
LOCKN CLKOUT

PDN

Power Down

PDN

Power Down

3.3V
R/F=H
-> clock's rising edge
is used to latch data
COL=H-> 8bit(24bpp)
DEMUX=L & MODE=H-> Single-in/Single-out
PRE=L-> Pre-emphasis 0%

R/F
DKEN
DK
COL
MODE1
MODE0
PLL
Reserved3,4 OPEN
Reserved1,2,5,6,7

3.3V

R/F
COL
DEMUX
MODE
PRE
Reserved0
Reserved1

R/F=H, DKEN=DK=L-> clock's rising edgealigned to the centerof the data eye
COL=H-> 8bit(24bpp)
MODE1/0=H/L-> Single-in/Single-out
PLL=L-> SiSo > 40MHz

*2

GND

*1
*2

GND

indicates microstrip lines or cables with their differential characteristic impedance being 100W
Connect GNDs of both Tx and Rx PCB

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Single-in/Dual-out to Dual-in/Single-out, 10bit (30bit per pixel) without Pre-emphasis

THCV217

CMOS
Driver

THCV218

R19-R10

R19-R10

G19-G10

G19-G10

B19-B10

B19-B100.1mF

CONT11,12

0.1mF

*1

TX0n
TX0p

RX0n
RX0p

TX1n
TX1p

RX1n
RX1p

R29-R20
G29-G20

CMOS
ReceiverCONT11,12
R29-R20 OPEN

B29-B20

G29-G20 OPEN
B29-B20 OPEN

DVDH

CONT21,22

CONT21,22 OPEN
10kW

DE, H/VSYNC
HTPDN
CLKIN
LOCKN

DE, H/VSYNC
HTPDN
LOCKN CLKOUT

PDN

Power Down

PDN

Power Down
3.3V

COL=L
-> 10bit(30bpp)
DEMUX=H & MODE=L->Single-in/Dual-out
PRE=L-> Pre-emphasis 0%
R/F=H-> clock's rising edge
is used to latch data

R/F
DKEN
DK
COL
MODE1
MODE0
PLL
Reserved3,4 OPEN
Reserved1,2,5,6,7

3.3V

R/F
COL
DEMUX
MODE
PRE
Reserved0
Reserved1

*2

GND

*1
*2

COL=L
-> 10bit(30bpp)
MODE1/0=L/H-> Dual-in/Single-out
PLL=L-> DiSo Normal ope.
R/F=H, DKEN=DK=L-> clock's rising edgealigned to the centerof the data eye

GND

indicates microstrip lines or cables with their differential characteristic impedance being 100 W
Connect GNDs of both Tx and Rx PCB

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THCV217_218_Design Guide_Rev.1.70_E

Recommendations for Power Supply

Separate all the power domains in order to avoid unwanted noise coupling between noisy digital andsensitive analog domains.
Use high frequency ceramic capacitors of 100pF or 10nF as bypass capacitors between power and groundpins. Place them as close to each power pin as possible. 100pF capacitors, along with 0.1uF capacitors, arerecommended for 218’s CAVDL.
Adding 4.7μF capacitors to PLL's power pins, along with the smaller bypass capacitors, is recommended.
Use the same ground plane for all ground pins.

Recommended Power Supply for THCV217

DVDH
3.3V

10uF

1.8V

10uF

VDL
GND

10nF

VDL

DVDH
DGND

x5

THCV217

CAVDL
CAGND

10nF

x2

10nF

x3

CAVDL
10uF
CPVDL

10nF 4.7uF

10uF

CPVDL
CPGND

Recommended Power Supply for THCV218

DVDH
3.3V

10uF

100pF

x4

1.8V

VDL
GND

CAVDL

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10nF

THCV218

VDL
10uF
10uF

DVDH
x17
DGND

0.1uF 100pF

x5

CAVDL
CAGND

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THCV217_218_Design Guide_Rev.1.70_E

Note1)Cable Connection and Disconnection
Don’t connect and disconnect the LVDS and CML cable, when the power is supplied to the system.
2)GND Connection
Connect the each GND of the PCB which Transmitter, Receiver and THCV217 on it. It is better for EMI
reduction to place GND cable as close to LVDS and CML cable as possible.
3)Asynchronous use
Asynchronous use such as following system are not recommended. Data sheet p.18 tRS/tRH should be kept.
CLKOUT
TTL RxDATA
THCV217

CLKOUT
TTL RxDATA

Asynchronous use such as following system are not recommended.
CLKOUT
TTL TxDATA
THCV218

CLKOUT
TTL TxDATA4)Multiple device connection
HTPDN and LOCKN signals are supposed to be connected proper for their purpose like the following figure.
HTPDN should be from just one Rx to multiple Tx because its purpose is only ignition of all Tx.
LOCKN should be connected so as to indicate that all Rx CDR become ready to receive normal operation data.
LOCKN of Tx side can be simply split to multiple Tx. THCV218 DGLOCK is appropriate for multiple Rx use.
Also possible time difference of internal processing time (Data sheet p.19 THCV217 tTCD and THCV218
tRDC) on multiple data stream must be accommodated and compensated by the following destination device
connected to multiple THCV218, which may have internal FIFO.
THCV217

THCV218

HTPDN

HTPDN

clkin.1

clkout.1

LOCKN

FIFO

LOCKN
DGLOCK

SourceDeviceEx. synchronizedTime diff. comes up

THCV217

THCV218

HTPDN

HTPDN

LOCKN

LOCKN

Destination
Device

FIFO
clkin.2

clkout.2

DGLOCKInternal processing time tTCD

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Internal processing time tRDC

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5)In case of No DE in video signal stream
V-by-One® HS transmission always requires DE, while some system has only HSync and VSync.
Sometimes Hsync should be connected to DE and other treatment is at the same time required.
DE polarity on active data transmission period must be High, which sometimes needs external inverter.
DATAIN

HTPDN
LOCKN

HTPDN
LOCKN

CLKIN
Hsync from camera
Vsync from camera*mounted/NC

FLD from camera*NC/mounted

DATAOUT

CLKOUT
THCV218
RX0n
HSYNC
RX0p
VSYNC
RX1n
RX1p
DE

THCV217
HSYNC
TX0n
TX0p
VSYNC
TX1n
DE
TX1p

*System HSYNC must be treated properly
in order to match V-by-One® HS DE polarity requirement

Camera Module
Active Data bits

CameraImage

Hsync for use
Vsync for use*mounted/NC

FLD for use*NC/mounted

CameraImage

Camera Module
Horizontal Indicator

H signal inverted
and to Vx1HS Tx DE(Vx1HS requirement)Time*V-by-One® HS DE polarity must be High during video
image is transmitted. (One of the requirements)

Below are consideration points if there is no DE signal on original data format.

DE Requirement
Data bits
input to Vx1HS Tx

Targetdata

DEinput to Vx1HS Tx

Normal data bits Requirement
Normal Data bits
input to Vx1HS Tx

Transmitted
dataDE
input to Vx1HS Tx
At least 2 pix clock
Normal Data bits is transmitted when DE=High.
Time

Control bits (Hsync, Vsync) Requirement
Control bits
input to Vx1HS Tx

Control bits
transition banned

CTL data bits Requirement
CTL Data bits
input to Vx1HS Tx

Transmitted
dataDE
input to Vx1HS Tx

DEinput to Vx1HS Tx

Control bits are named as Hsync and Vsync input to V-by-One® HS Tx.
Control bits transition is allowed when DE=H=>L edge and during DE=L.
Control bits transition is allowed when DE=L=>H edge and during DE=H.

CTL Data bits is transmitted except DE=Low first and last pixel.
CTL of DE=L first and last pixel is fixed low at THCV218 and THCV234.
CTL of DE=L first and last pixel keeps preceding pix. value at THCV220.

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THCV217_218_Design Guide_Rev.1.70_E

PCB Layout Considerations






Use at least four-layer PCBs with signals, ground, power, and signals assigned for each layer. (Refer tofigure below.)
PCB traces for high-speed signals must be single-ended micorstirp lines or coupled microstrip lines whose
differential characteristic impedance is 100Ω.
Minimize the distance between traces of a differential pair (S1) to maximize common mode rejection andcoupling effect which works to reduce EMI (Electro-Magnetic Interference).
Route differential signal traces symmetrically.
Avoid right-angle turns or minimize the number of vias on the high speed traces because they usually cause
impedance discontinuity in the transmission lines and degrade the signal integrity. Mismatch among
impedances of PCB traces, connectors, or cables also causes reflection, limiting the bandwidth of thehigh-speed channels.

PCB Cross-sectional View
for Microstrip Lines> 3 x S1

S1

GND

> 3 x S1

GND

Layer1: Signals
Layer2: Ground
Layer3: Power
Layer3: Signals

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THCV217_218_Design Guide_Rev.1.70_E

Notices and Requests
1.

The product specifications described in this material are subject to change without prior notice.

2.

The circuit diagrams described in this material are examples of the application which may not always apply to the customer’s
design. THine Electronics, Inc. (“THine”) is not responsible for possible errors and omissions in this material. Please noteeven if errors or omissions should be found in this material, THine may not be able to correct them immediately.

3.

This material contains THine’s copyright, know-how or other intellectual property rights. Copying, reverse-engineer ordisclosing to third parties the contents of this material without THine’s prior written permission is prohibited.

4.

THINE ACCEPTS NO LIABILITY FOR ANY DAMAGE OR LOSS IN CONNECTION WITH ANY DISPUTE
RELATING TO INTELLECTUAL PROPERTY RIGHTS BETWEEN THE USER AND ANY THIRD PARTY, ARISINGOUT OF THIS PRODUCT, EXCEPT FOR SUCH DAMAGE OR LOSS IN CONNECTION WITH DISPUTESSUCCESSFULLY PROVED BY THE USER THAT SUCH DISPUTES ARE DUE SOLELY TO THINE. NOTE,HOWEVER, EVEN IN THE AFOREMENTIONED CASE, THINE ACCEPTS NO LIABILITY FOR SUCH DAMAGE OR
LOSS IF THE DISPUTE IS CAUSED BY THE USER’S INSTRUCTION.

5.

This product is not designed for applications that require extremely high-reliability/safety such as aerospace device, nuclear
power control device, or medical device related to critical care, excluding when this product is specified for automotive use by
THine and used it for that purpose. THine accepts no liability whatsoever for any damages, claims or losses arising out of theuses set forth above.

6.

Despite our utmost efforts to improve the quality and reliability of the product, faults will occur with a certain small
probability, which is inevitable to a semi-conductor product. Therefore, you are encouraged to have sufficiently fail-safe
design principles such as redundant or error preventive design applied to the use of the product so as not to have our productcause any social or public damage.

7.

This product may be permanently damaged and suffer from performance degradation or loss of mechanical functionality if
subjected to electrostatic charge exceeding capacity of the ESD (Electrostatic Discharge) protection circuitry. Safety earth
ground must be provided to anything in contact with the product, including any operator, floor, tester and soldering iron.

8.

Please note that this product is not designed to be radiation-proof.

9.

Testing and other quality control techniques are used to this product to the extent THine deems necessary to support warranty
for performance of this product. Except where mandated by applicable law or deemed necessary by THine based on the user’s
request, testing of all functions and performance of the product is not necessarily performed.

10. This product must be stored according to storage method which is specified in this specifications. THine accepts no liability
whatsoever for any damage or loss caused to the user due to any storage not according to above-mentioned method.
11. Customers are asked, if required, to judge by themselves if this product falls under the category of strategic goods under theForeign Exchange and Foreign Trade Act in Japan and the Export Administration Regulations in the United States of America
on export or transit of this product. This product is prohibited for the purpose of developing military modernization, including
the development of weapons of mass destruction (WMD), and the purpose of violating human rights.
12. The product or peripheral parts may be damaged by a surge in voltage over the absolute maximum ratings or malfunction, if
pins of the product are shorted by such as foreign substance. The damages may cause a smoking and ignition. Therefore, youare encouraged to implement safety measures by adding protection devices, such as fuses. THine accepts no liability
whatsoever for any damage or loss caused to the user due to use under a condition exceeding the limiting values.
13. All patents or pending patent applications, trademarks, copyrights, layout-design exploitation rights or other intellectual
property rights concerned with this product belong to THine or licensor(s) of THine. No license or right is granted to the user
for any intellectual property right or other proprietary right now or in the future owned by THine or THine’s licensor. The user
must enter into a license agreement with THine or THine’s licensor to be granted of such license or right.

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