Sensors and Materials, Vol. 8, No. 6 (1996) 327-344
MYUTokyo
S &M 0249

Porous Silicon Technology for Thermal Sensors
Walter Lang* and Peter Steiner
Fraunhofer Institute for Solid State Technology
Hansastr. 27, 80686 Munich, Germany(Received March 29, 1995; accepted December 28, 1995)
Key words:

porous silicon, microstructuring, sacrificial layer, thermal sensor

Porous silicon as a tool for the structuring of thermal sensors is presented. The special
requirements of thermal structures are discussed and microstructuring techniques arereviewed. Then the technology of porous silicon and its etch and etch stop techniques aredescribed. Examples of thermal sensor applications of porous silicon technology are
given.

1.

Introduction

Thermal sensing is one of the most important issues in measurement technology. A
large number of thermal transducers have been developed and are being produced. For
those fabricated by silicon micromachining, anisotropic etching is conventionally used toperform the microstructuring. This method is now a well-established industrial process. It
has many advantages, but also some severe drawbacks which make it worthwhile toinvestigate alternatives. A technique which seems to be especially suited to the fabricationof thermal transducers is microstructuring with porous silicon as a sacrificial layer. In thistechnique, part of the wafer is transformed from monocrystalline silicon to porous silicon
by electrochemical etching. Then thin films are deposited on top of the porous silicon, andthe sensor structures are realized. At the end of the process, the porous film is removed.
Two features make this technology particularly interesting in relation to thermal transducers.
First, the gaps structured with porous silicon are relatively wide("" 100 µm). Such wide
gaps are necessary in order to obtain good thermal isolation of the sensor structure from thebulk silicon and to obtain a device with high sensitivity. The other feature is that*Current address: Institute for Micro- and Information Technology, Wilhelm Schickard-Str. 10,78052 Villingen-Schwenningen, Germany

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Sensors and Materials, Vol. 8, No. 6 (1996)

membranes made of insulators such as silicon nitride which are very well suited for the
support of thermal sensors, can be formed easily.
In this paper, first the fundamental thermodynamics of microstructures are discussedwith special consideration of the consequences for sensor structures and technology. Then,with the special needs of thermal sensors in mind, microstructuring techniques are re­viewed. Porous silicon technology is discussed, and finally we present actual examples ofthermal sensors realized by means of porous silicon technology.

2.

Basic Concepts of Thermal Sensors

In a thermal sensor, a physical quantity is measured by determining the temperaturechange it induces in the sensor structure, which is often a thin membrane as used in thin­film thermopile radiation sensors. The measured effect delivers a certain amount of power
AP to the sensor area; this generates a temperature difference AT, which induces a voltage
AU either due to the thermoelectric effect (thermopile principle) or the voltage drop acrossa resistor (bolometer principle). A linear approximation of this is described by thefollowing equations.
U=cxAT
T= l/KxAP(1)(2)

The first constant c characterizes the efficiency of the thermoelectric conversion, whichmust be as high as possible to obtain high sensitivity of the device. The second coefficient
K is the generalized thermal conductivity which characterizes the device as a whole, not acertain material. For high sensitivity, the thermal conductivity must be small. The sensor
area must be thermally isolated, so that low power generates a high temperature difference
and a large measurement sensitivity. The main problem in the construction of thermal
sensors is the realization of structures with good thermal isolation. Figure 1 shows aschematic of the thennal management of a sensor structure. The main mechanisms bywhich a sensor gains or loses heat are joule heating, thermal conduction in the membrane,
wall heat transfer from the membrane to the surrounding gas, and radiation. There may beother important mechanisms for specific sensor applications, such as chemical heat in thecase of pellistors. At room temperature, radiation loss is usually negligible. Therefore, theminimization of two of the mechanisms must be investigated: conduction and wall heattransfer.
Conduction through the membrane, bridge, cantilever or other structure which supports
the sensor area mechanically is dependent on the geometry and the thermal conductivity ofthe material. Silicon has a thermal conductivity kin the region of k = 150 W /mK. Thin­film insulators are far less conductive; for example, silicon nitride has k = 2.25 W /mK.
Silicon oxide and amorphous silicon carbide have k values of the same order of magnitude
as nitride. For this reason, thermal sensors are mainly based on free-standing membranesof silicon nitride or other insulators. This has an important impact on technology: whilepressure sensors have silicon membranes which are a few µm thick and comparatively

Sensors and Materials, Vol. 8, No. 6 (1996)

Fig. 1.

329

The main heat flow mechanisms of a sensor.

robust, thermal sensors have very thin membranes (thinner than 1 µm) which are rather
difficult to handle without breaking. Furthermore, the silicon membranes of mechanicalsensors are monocrystalline and have no internal stresses, but nitride membranes aredeposited films. They may exhibit high internal stress which must be taken into account. A
typical layer used for this purpose is low pressure chemical vapor deposition (LPCVD)
silicon nitride with a thickness of 300 nm. To evaluate the quantities invoLved, we assume
a typical square membrane with a side length of 1000 µm and obtainC1 -3J a thermal loss due
to conduction of Kconct = AUI AT= 10 µW /K.
Wall heat transfer is the transfer of energy from the membrane to the surrounding air. It
is characterized by the wall heat transfer coefficient a. This coefficient depends on thegeometry, the temperature, the distance to the closest heatsink and the surrounding gas.
The wall heat transfer is normally determined by semiempiric formulae based on experi­mental results and theory.c1AJ The application of these formulae to microstructures has
been investigated. c2J When the distance to the closest heatsink is small, the heat transfer isrepresented as heat conduction in the gap. This representation is used if the thermal
conductivity of the gas is to be measured by thermal conductivity gas sensors or by vacuum
sensors. If good thermal isolation is required, heatsinks near the membrane must be
avoided. For infinite distance from the closest heatsink, the heat transfer coefficient isevaluated using a free convection approach. In our example, the numerical value is a =130 W /m2K. The heat loss by wall heat transfer is Kirans = 110 µW /K. Thermal flow
through the air is much larger than the flow through the membrane, a situation which istypical for sensors on thin-film insulating membranes.
Infinite distance to a heatsink is not possible, of course. Therefore, we must discuss
how far away the heatsink must be in order to achieve sufficient isolation. Convection

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experiments show that, if the distance is greater than the thickness of the thermal boundary
layer of the heated structure, increasing the distrance further does not affect the transfer.
This is demonstrated by an experiment, the results of which are shown in Fig. 2. All detailsof this experiment are given in ref. 2. A membrane is placed in front of a heatsink at a
variable distance. The thermal transfer from the front of the membrane is plotted vs the
distance. The experimental data are corrected for conduction and heat transfer from the.
other side of the membrane. For long distances (case A in Fig. 2), the transfer is constantand can be represented by a wall heat transfer coefficient. For short distances, the transfer
is represented by conduction in the air layer (case B). The theoretical thickness of thethermal boundary layer is 160 µm. In this region, the heat transfer can be represented by aninterpolation formula (case C). This experiment shows that a free-standing membraneneeds sufficient space around it to provide efficient thermal isolation.
The consideration above leads to three guidelines for thermal sensors.
1. In air, thermal conductivity as low as K = 100 µW /K can be realized.
2. The heat transfer to air is greater than the thermal conduction within the membrarie.
3. The distance between the membrane and the nearest heatsink should exceed thethickness of the thermal boundary layer, which is in the range of 50 µm to 200 µm forrnicrostructures.
With these guidelines in mind, we discuss different techniques for rnicrostructuring
thermal sensors.

40.0
35.0

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34-J

.....

30.0
25.0

....>

20.0

C

10. o

JS. 0

5.0

o. o

0.00

B

a.so

DistoncQ

l.00

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Fig. 2. The thermal boundary layer: heat transfer from a heated membrane to a heatsink at distanced. The thickness of the thermal boundary layer in this case is 160 µm. A: At distances greater than thethermal boundary layer thickness, the transfer is represented by a wall heat transfer coefficient. B: If
dis small compared to the thermal boundary layer thickness, the transfer is described as conduction
in air in the gap. C: Between these two cases, an interpolation formula is used.

Sensors and Materials, Vol. 8, No. 6 (1996)

3.

331

Microstructuring of Thermal Sensors

The basic structure of a thermal transducer is free-standing and supports the sensor
area. Several micromachining methods can be used to build such structures.

3.1 Anisotropic etching

Anisotropic etching, mostly performed using KOH solution, is the most common
method for microstructuring. <5, ) Currently, there are two types of silicon micromechanicalsensor which are produced and sold in very large numbers: the pressure sensor and thethermopile radiation sensor. Both are fabricated using anisotropic etching. The basic
structures of these sensors are shown in Fig. 3(a). This method has numerous advantages.
It is well understood; industrial processes are reliable and state of the art.
It provides exact geometries, which are given by the crystal planes of the silicon.
The cost of the etching equipment is low.
Integration of CMOS electronics and anisotropically etched sensors on one chip is
possible. This has been demonstrated in several devices.<7,sJ These devices are
realized by performing the CMOS process first, and then the microstructuring as aprocess outside the CMOS line.
On the other hand, this method has a number of serious drawbacks.
The slopes of the crystal planes shown in Fig. 3(a) require considerable space on thechip, but sensors must be small to fit as many of them as possible on one wafer. This
problem becomes greater with increasing wafer size and thickness.
The process involves double-sided lithography which requires expensive, special
equipment.
KOH is not CMOS-compatible. Therefore, only part of the process may be performed
in a CMOS line.
Although the equipment for wet-chemical etching is cheap, the process is time­
consuming, and therefore, etching is an expensive process.
The long etching time often causes problems with the masking layers.
Design freedom is limited by the crystallographic structure.
Two etch stop techniques are common: electrochemical, which requires complicatedcontact structures, and p+ etch stopping, which is. only possible for highly doped
materials.
KOH etching can also be performed from the front.<9) The structures are cantilevers,
which are freed by underetching. However, the remaining problems are severe enough towarrant development of alternative methods.
6

3.2 Su,face micromachining
This technology< 0· ) involves a sacrificial layer, on which a structure layer is deposited.
When the sacrificial layer is removed, the structure layer is freed, as shown in Fig. 3(b).
The sacrificial layer is generally silicon oxide, in which a gap several µm thick can beformed. The structure layer is generally polysilicon. Surface micromachining is applied
for mechanical sensors, especially for accelerometers.0 2J This method is very powerful;small structures can be fabricated, and the method allows freedom in design. Furthermore,
111

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332

silicon nitride orbulk silicon membrane@anisotropic etching in KOH

polysiliconlayer (5 µm)@©

silicon oxide (l-2 µm)

free-standing polysiliconbulk silicon or silicon nitride
etched porous
silicon l 00 µm@
porous silicon technology

Fig. 3. Microstructuring methods for sensors. A: Anisotropic etching. B: Surface micromachining.
C:BESOI-technology. D:Porous silicon technology.

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333

the method is CMOS-compatible since only HF is used for etching. The most important
technological problems are the internal stress in the film and possible adhesion of thestructures to the substrare due to the small gap. Since the structures are freed by lateral
undercutting, free-standing planes cannot be realized without holes for the etchant. Sur­face micromachining with oxide as a sacrificial layer does not allow large gaps between the
structure and the bulk. Therefore, it cannot be used for thermal sensors in which large gaps
are needed for isolation.

3.3 BESOI technology

Back-etched silicon on insulator (BESOI) is a technology used in the fabrication of
mechanical sensors, particularly pressure sensors.ci 3.t4l The principle is shown in Fig. 3(c).
On a silicon wafer, a silicon oxide layer is grown. Then a second wafer is formed on top of
the oxide. When the compound is annealed at a high temperature, the two wafers arebonded together (silicon fusion bonding). The top wafer is thinned by chemical mechani­
cal polishing (CMP). Advanced polishing technology allows fabrication of a layer withgood homogeneity. Thick layers can be realized as well as very thin ones. For sensor
applications, the buried oxide in the compound is used as an etch stop. Another possible
method of obtaining membranes is to structure the oxide before bonding. This technology
is very promising for CMOS-compatible pressure sensors. For thermal devices it is moredifficult to apply because, first, the membranes are silicon, which has a high thermal
conductivity, and second, the distance from the membrane to the bulk is short.

3.4 Porous silicon technology

Considering the technologies described above, the best alternative to KOH etching is asurface micromachining process with a thick sacrificial layer. This layer must have thefollowing features.
It must be possible to produce layers with thicknesses which range from a few µm toseveral hundred µm.
The layer should be etched very easily with high selectivity .
It must be possible to deposit and structure thin films on top of the layer.
The methods used to produce and etch the layer must be CMOS-compatible.
Etch stop at a low doping level of silicon is desired.
A material which meets all these requirements is porous silicon anodically etched froma silicon wafer in HF. The CMOS compatibility of this process was demonstrated whenelectronic circuits were fabricated on silicon islands isolated by oxidized porous silicon.
Thus porous silicon is used to make SOI substrates.<'5• l Later we show that the otherrequirements are also fulfilled. For thermal sensors, this technology is especially promis­
ing. A membrane layer of silicon nitride or carbide can be deposited on top of the porous
material, which is removed at the end of the process. In this way, a surface micromachining
process with a thick sacrificial layer is performed, as shown in Fig. 3(d). The fundamental
drawback of the method is the undercutting of the structures, which limits the possible
aspect ratio. Since thermal transducers always have a size of several hundred µm, thisproblem does not arise here.
16

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334
4.

Porous Silicon

When silicon is exposed to HF, it normally dissolves very little. If a current flows
accross the interface of the silicon and the etchant and if the Si is at anodic bias, it starts todissolve due to an electrochemical process.0 7J The cmTent carries holes to the surface
which are necessary for the electrochemical process of the dissolution of Si in HF. Figure
4 shows the electrochemical cell used. The wafer is immersed in a solution of HF, ethanol
and water usually of ratio 1:2:l. The electrodes are made from platinum. A white-light
halogen lamp is installed in front of the wafer inl order to illuminate it during etching, if
desired.
Why does this etching cause pores? If the applied current is high, no pore formation
occurs but electropolishing does. In this case, the number of holes is high due to the highbias voltage. The etching speed is controlled by the number of HF molecules at the surface
which must be replaced by diffusion. Projections in the crystal are etched preferentiallyand the surface becomes smooth. When the current is small, the etching speed is controlled
by the carriers. The carrier motion is determined by the electrical potential which is largest
at the pits in the crystal. These pits grow preferentially to form pores. To obtain a porous
material, the remaining silicon between the pores must be passivated to prevent further

halogen la m p 500

electrode grip (PTFE)

tube (PTFE)

wafec grlp (PTFE)
elecITodewafer.
(platinum)(porous side)

�

�
�
...

------"+--

tank (HOPP)

Fig. 4. Electrochemical cell used for anodic etching. The cell is made from HDPP, which is
resistant to HF solution. The electrodes are made of platinum. The wafer is immersed in the etchantand can be illuminated with white light during etching.

Sensors and Materials, Vol. 8, No. 6 (1996)

335

etching. This passivation is effected by different physical mechanisms depending on thedoping of the Si and on the illumination during etching. The different mechanisms
generate different morphologies of porous silicon.
4.1 Macroporous siliconThis is formed when a low-doped n-type wafer is etched without illumination. Theinterface between the silicon and the HF is a Schottky contact, which is reverse biased. The
etching layer is determined by the space-charge region around each pore. In this space­charge region, there are no holes available, and consequently the material cannot be etched.
Between two pores, a wall with a thickness of twice the space-charge region is passivated.
A typical pore and structure size is 1 µm which is determined by the doping level, the bias
and the HF concentration. The pores follow the electrical current lines and are therefore
mainly perpendicular to the wafer surface. When a prestructured wafer is used, a very
regular arrays of holes can be fabricated. os) Applications of macroporous silicon are for the
fabrication of trenches for high electrical capacity, microfilters and microfluidics. The useof perpendicular macropores has been proposed to prepare grooves and trenches and to fillthem with metals in order to obtain interconnections from the front to the back of a wafer.
4.2 Nanoporous silicon
If p-doped silicon is anodized, the front edge of the wafer is a forward-biased Schottky
contact. Therefore, numerous carriers are present and no space-charge region develops.
Here, passivation is achieved by a quantum confinement effect.0 7l Below a certain
thickness, the remaining structures form quantum wires, their band gap increases, and thecharge carriers no longer enter those structures. The structure size is a few nm.
Nanoporous silicon can also be etched from n-type material when the wafer is illumi­
nated during etching. The absorbed photons generate electron-hole pairs, and thus theinterface is flooded with carriers and the space-charge region vanishes. Therefore, when
exposed to illumination, n-type silicon shows a pore morphology similar to that of p-typematerial.
Nanoporous silicon is being intensively investigated due to its quantum confinement
effect and its luminescence. ci9, l For sensors, it is of interest due to its large internal surface
area of 600m2 /cm3 which can be used for gas adsorption.
20

4.3 Mesoporous silicon
When either p+- or n +-type degenerately doped silicon is anodized, the structure size is
between those of macroporous and nanoporous materials and ranges from 10 to 500 nm.
Mesoporous silicon also has a large internal surface area. It is an attractive material for
sensor applications. A humidity sensor made of porous silicon has been realized. <21 l It isalso possible to use the large surface area to support a catalyst in a pellistor or for theimmobilization of active species in gas and biosensors. While nanoporous mate1ial tends
to break, mesoporous silicon is mechanically stable. The surface has excellent smoothness
and can be compared to bulk silicon; no cracks are observed. Thin films can be depositedon this material. The pores are so small that, during deposition, no material enters them,
but a film can be grown on top of the porous film. This holds for CVD processes, PVD

Sensors and Materials, Vol. 8, No. 6 (1996)

336

processes and sputtering. If deposition into the pores is desired, it can be performed by
wet-chemical deposition such as electroplating or impregnation. Furthermore, mesoporous
silicon can be easily removed by weak etchants. For these reasons, mesoporous silicon is
the preferred material for sacrificial layer technology.

5.

Masking Layers and Etch Stop

5.1 Masking layers

For micromachining, it is necessary to etch defined areas and to limit the etched area
laterally. This can be achieved using a resistive film as a masking layer, which is structuredby thin-film technology. Since the highly concentrated HF used for anodization is a verystrong etchant, the chemical stability requirements on this film are severe.<22)
Photoresist is resistant to the etchant for about 10 min. It can be used for shortanodization times, but the HF and ethanol attack the edges of the mask. Therefore, theborderlines of the anodized area are rough and not very well defined. Silicon oxide andsilicon nitride are resistant to the etchant for only a few seconds.
The best results are obtained with thin films of amorphous silicon carbide. It is
deposited<23) by plasma enhanced chemical vapor deposition (PECVD) fromhexamethyldisilane which comes from a liquid source and is carried by argon which is used
as a process gas. The film is semi-insulating. Therefore, there is no current flow throughit and no electrochemical attack from HF. The etching rate in HF is less than 1 nm/min.
SiC is structured by reactive ion etching (RIE) in a fluoroform/oxygen plasma.

5.2 Etch stop techniques

The other possible method for achieving lateral structuring is to prevent part of thesilicon from being anodized. Since anodization is an electrochemical dissolution, etching
only occurs where current flows. When part of the wafer is isolated electrically, it ispassivated from etching. One way of achieving this is to induce a p / n transition by
implantation. This type of etch stop was used for SOI structures. < 1 5) The degree of etchingis mainly determined by the availability of holes in the silicon. Therefore, good selectivity
is obtained between n--type and p--type silicon. Another possibility is the use of n -- versus
n+-type (or p-- versus p+-type) material. Micromechanical structures made ofmonocrystal­line silicon can be realized.<24-26) This type of etch stop is highly advantageous comparedto the etch stopping technique in anisotropic etching in which highly doped material (p+),
which is not advantageous for integration, is required, or we must ensure electrical contact
during etching, which is complicated. In the case of porous silicon, we achieve the etchstop in low-doped silicon without contacts.
Figures 5 and 6 show a cantilever fabricated using this etch stop method. The process
starts with a p--doped wafer. The structure to be protected from etching is defined by
implantation (P, 250 keV, 2 x 10 13 / cm2). During an annealing step of 24 h at 1100 °C an n­
Si layer with a doping of 5 x l0 16/cm3 is formed. The p/njunction is at a depth of4 µm.
Then anodic etching is performed for 40 min with a current density of 20 mA/cm2• After
that, the porous material is removed. Figure 5 shows a bridge fabricated in this way. The
bridge is 600 µm long, 200 µm broad and 4 µm thick. To improve the undercutting of theSensors and Materials, Vol. 8, No. 6 (1996)

337

Fig. 5. A bridge made of monocrystalline silicon fabricated by porous silicon technology. The etchstop is a p/n junction.

Fig. 6. Porous silicon technology allows etching of free-standing structures which are supported byvertical walls or pillars of silicon.

Sensors and Materials, Vol. 8, No. 6 (1996)

338

bridge, there are some holes in it. Figure 6 shows a free-standing cantilever from the side.
Under the structure, the wall of remaining silicon can be seen, positioned at the center
under the structure. This is the most difficult place for the current lines detouring aroundthe passivated area to reach. This connection to the bulk is a typical feature of this kind of
etch stop. Normally, this structure is removed together with the porous film. Thisphenomenon may have very interesting applications. We can make free-standing silicon
structures which are supported by thin vertical walls or pillars. The thickness of the pillars
can be controlled by doping the wafer. The walls of the pillar are vertical. In Fig. 6 the
support is 60 µm high and 1.25 µm broad, which gives an aspect ratio of 48. Higher pillars
and larger aspect ratios are possible.
The use of polysilicon as a masking and structure layer combines etch stop techniquesand masking layers. c 7, ) Figure 7 shows a thin bridge of polysilicon fabricated in this way.
The process starts with the thermal oxidation of a p-type wafer. Then a 500-nm-thick layerof n-type polysilicon is deposited. The bridge and the pads which anchor it are structured
in the polysilicon. Then the wafer is anodized. While the open parts of the wafer are
etched, the polysilicon is not attacked. It is insulated from the bulk by the oxide and fromthe HF by a reverse Schottky contact. No carriers pass through the interface from thepolysilicon to the etchant, and thus it is passivated. Using this technology, free-standing
wires which are 500 nm by 5 µm in cross section and 600 µm long can be fabricated andused as hot wire flow probes.
22sFig. 7. SEM micrograph of a polysilicon bridge of cross section 500 nm by 20 µm and 600 µm long.
The bridge is fabricated using porous silicon as a sacrificial layer.

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339

5.3 Undercutting

Etching always follows the lines of electric current. At the edge of the mask, there is alateral current from the etched region into the region under the mask. This current causes
undercutting. A typical etching profile is a ramp which can be seen below the cantilevershown in Fig. 8. The undercutting is slightly different for different masking layers.<22)The extent of the undercutting is about 1 to 2 times the depth of the porous layer. Thus,
anodization causes undercutting similar to that of isotropic etchants. Figure 9 shows a flow
channel made by anodization and removal of the porous material. The slope of the walls is
about 45° . The figure also shows that there is no undercutting of convex comers such asthat which occurs in KOH etching.

6.

Examples of Application

Porous silicon is used to realize sensors on insulating bridges and membranes formeasuring IR radiation (bolometer principle) and liquid mass flow.<29l The bridges havesizes ranging from 150 µm to 1000 µm and the circular sensors have diameters ranging
from 300 µm to 1300 µm. Figure 10 shows the process. The material is a <100> p+ (B,0.010-0.018 Qcm) silicon wafer 4 inches in diameter. For the anodization, a photoresist
mask is used. Anodization is performed by electrochemical etching in HF. The solution isFig. 8. SEM micrograph of a cantilever made of polysilicon, seen from the side. The micrographshows the typical undercutting profile of anodic etching.

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Sensors and Materials, Vol. 8, No. 6 (1996)

Fig. 9. A flow channel structured with porous silicon. The slope of the walls is about 45 °. No
undercutting of convex comers occurs.

25% (weight) HF, 25% water and 50% ethanol. A cunent density of 100 rnA/cm2 isapplied for 20 min. Thus, a porous layer 50 µm deep is generated. The porous material
generated from p+ silicon is mesoporous. The average structure size of the silicon skeleton
is 20 nm to 50 nm, and the porosity is 70%. Figure lO(a) shows the sensor after
anodization. After the resist is removed, a 200 nm layer of amorphous SiC is deposited forthe membrane. The SiC shows compressive stress after deposition, which is relaxed byannealing (600° C, 30 min, N2). The details of the SiC process are given in ref. 23. The
metallization is a 500 nm gold layer on an adhesion layer of 15 nm NiCr. The metals are
structured by wet chemical etching to form the resistors and the bond pads (Fig. 10(b)). For
the removal of the porous material, the membrane must be opened by RIE etching. Then,the porous silicon is removed using a weak KOH solution (10%) at room temperature.
Figure 11 shows a SEM micrograph of a free-standing flow measurement bridge at theend of the process. When the porous silicon is removed, a trench is formed. The
dimensions of the bridge are 150 µm by 300 µm. A measurement resistor which has theform of a meander is placed on the bridge. This type of structure is used for flow
measurement. The bridges are mechanically strong enough to withstand high flow speeds.
When this chip is bonded to a second chip which only has flow channels, a fully closed
throughflow measurement system is realized. Figure 12 shows a circular bolometer, whichis free-standing and anchored with four supports.
The structures are characterized thermodynamically in a heating experiment. The
resistor has a low resistance of R0 = 65 Q. The temperature coefficient of the gold is a
(20° C, differential)= 1.5 x 10- 3/K. Next, the membrane is heated by an electrical cunent
and the temperature change is measured. This gives the thermal isolation 1 /K of the341

Sensors and Materials, Vol. 8, No. 6 (1996)

photoresist

porous silicon 50 µm@
meandering resistor:
NiCr 15 nm
gold 500 nm
membrane:
SiC 200 nm®
free-standing
membrane©
Fig. 10. Processing of a membrane sensor in porous silicon technology. A: Anodization with aphotoresist mask B: Deposition of the membrane, deposition of the metal and structuring of themetal. C: Opening the membrane and removing the porous silicon.

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Sensors and Materials, Vol. 8, No. 6 (1996)

Fig. 11. Heated bridge for flow measurement fabricated using porous silicon technology.

Fig. 12.

Bolometer on a SiC membrane fabricated using porous silicon technology.

Sensors and Materials, Vol. 8, No. 6 (1996)

343

structure, which determines the sensitivity. Figure 13 shows the temperature difference AT
versus the electrical power P. The thermal isolation of the structure is very good.
K=APIAT= 104 µWIK.
This value is comparable to the heating power of commercial membrane sensors. The goodthermal isolation is due to the bridge structure, which restricts thermal flow to two
directions, whereas a membrane usually has four sides in thermal contact with the bulk of
the chip. The response of the sensor is described by the slope S, defined as the relative
resistance change per unit of power:

a value which is within the acceptable range for thermal sensors. The detection limit of thesensor is given by the noise equivalent power (NEP). For bolometers with metal resistors
the noise is calculated using Nyquist's formula with the measured data for the slope. We
obtain
NEP = 0.6 nW

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15

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power (mW)
Fig. 13. Electrical heating of the bridge sensor: temperature difference versus heating power. At
low temperatures, the specific heating power is 104 µW /K.

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Sensors and Materials, Vol. 8, No. 6 (1996)

Acknowledgments
The authors thank K. Kiihnemann for technical help, U. Schaber and K. Kuhl for SiC
deposition and D. Boehm for the SEM micrographs.

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