DATA SHEET
www.onsemi.com

1-Channel Automotive LED
Driver16

H−Bridge 1.5 A, 60 V − TSSOP16−EP

1
TSSOP16−EP
CASE 948BV

NCV78514

MARKING DIAGRAM

The NCV78514 is a part of the onsemi LED driver solution family
for the automotive market. It’s main emphasis is on supporting MCU
less applications by integrating smart features like derating based on
input voltage and temperature of the LED string. The device is
optimized for a one channel LED driver unit and is based on
a H−Bridge topology with a synchronous Buck switches andasynchronous Boost with external low side NMOSFET and Schottky
diode. Supplying in a constant current mode a single LED string
between 2 and 20 LEDs.
This enables the design of a single PCB design solution or witha separate module approach.
The LED string current is set with a current−encoding resistor. The
actual current through the LED string is sensed with a sense resistor.

16
L514
001
ALYWG

1

VBAT

Input
EMC/EMI
FilterReversePolarity
Protection

BAT

DIM

8

L514001= Specific Device CodeA
= Assembly Location
L= Wafer Lot
YW= Year & Work Week
G
= Pb−Free Indicator Microdot

Features Support for MCU Less Application
 Integrated Derating Mechanisms
 Fixed Switching Frequency at 400 kHz
 Input Operating Range from 5 V – 21 V
 Warm Start Management below 9 V
 Withstands Load Dump up to 45 V
 Output Voltage Range up to 60 V
 External Programmable Current 200 mA − 1500 mA
 Pulse Width Modulation from 80 Hz to 600 Hz
 LED Current Dimming Frequency 400 Hz
 External NTC / PTC for LED−temperature Spread Spectrum
 Status and Error Mode Handling AEC−Q100 Qualified and PPAP Capable

9

ORDERING INFORMATION
DevicePackage

Shipping†

NCV78514PA0R2GTSSOP16−EP(Pb−Free)4000 /Tape & Reel

†For information on tape and reel specifications,
including part orientation and tape sizes, pleaserefer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

Typical Application

 Fog Lamp
 Cornering Light Logo Projection
 Logo Lighting

VBOOT
PWM
Reconstruct

VDD

VDRV

Buck
Boost
Controller

SW

LSSG
ISET
PGND
TCS
AGND

SNSP

RSV

SNSN

Figure 1. Typical Application Circuit Semiconductor Components Industries, LLC, 2022

July, 2024 − Rev. 1

1

Publication Order Number:
NCV78514/D

NCV78514
FUNCTIONAL BLOCK DIAGRAM

BAT

IPEAK
Amp

3V3

VDD

CBOOT
3V3

VDRV

VDRV
LDO

Q1

3V3
Drv

DIM

SW
Dimming Generator

Buck-Boost
Controller

Q2
3V3

DIAG
Control

Drv

VDRV
LSSG
Drv
PGND

BAT
PTC
TJ
ISET

ADC

- VOUT_H+

Logic Control
3V3

RSV

+
-

+ VOUT_L

SNSP
SNSN
ISET

ADC

TCS
Oscillator

ADC

AGND

PGND

Figure 2. Block Diagram

www.onsemi.com
2

Exp

NCV78514
PIN OUT DESCRIPTION

16

1
BAT

SW

BAT

SW

DIM

PGND

AGND

VBOOT

15

2

3
4
Exposed Pad

5
VDD

TCS

RSV

SNSP

VDRV

ISET

LSSG

SNSN

14
13
12
11

6

7
8

10
9

Figure 3. Pin Out (Top View)

Table 1. PIN FUNCTION DESCRIPTION
NumberName

Description

1, 2

BAT

Input supply voltage, coming from the Battery or ECU, through reverse blocking protection and input
Pi filter. Pin 1 and pin 2 must be connected together.

3

DIM

Enable/disable function, including LED current dimming function and error status function.

4

AGND

Must be connected directly to the analog ground plane.

5

VDD

3V3 low dropout output pin. A capacitor must be connected between this pin and ground.
Must not be used for external load.

6

RSV

Reserved for production test. Must be connected directly to the analog ground plane in theapplication.

7

VDRV

VDRV regulator output for the external gate driver. A capacitor must be connected between this pin
and ground. Must not be used for external load.

8

LSSG

Gate drive of the boost, low side NMOS.

9

SNSN

Voltage feedback of the current sense, LED side

10

ISET

LED current−encoding resistor connection (RSET connection or VSET voltage).

11

SNSP

Voltage feedback of the current sense, H−Bridge side

12

TCS

Temperature coefficient sensor connection. Compatible with both NTC and PTC sensors.

13

VBOOT

Bootstrap pin.

14

PGND

Power ground.

15, 16SW

Switching node for the inductor connection. Pin 15 and pin 16 must be connected together.

Exposed pad

ExP

Thermal Pad for power dissipation. Must be connected to the power ground local plane for noise
optimization.

www.onsemi.com
3

NCV78514
MAXIMUM RATINGS
Pin voltages listed below are referenced to ground plane.
Table 2. MAXIMUM RATINGS
SymbolParameter description

Min

Max

Unit

AM_BAT

BAT pin. Main Power Input.

−0.3

45

V

AM_DIM

DIM pin. Signal Input

−20

45

V

AM_RSV

RSV pin Signal Input.

−0.3

3.6

V

AM_VDDVDD pin. Local Power Supply Output

−0.3

3.6

V

AM_ISETISET pin. Signal Input

−0.3

70

V

AM_TCSTCS pin. Signal Input

−0.3

70

V

AM_VDRVVDRV pin. Power Output

−0.3

5.5

V

AM_LSSGLSSG pin. Power Output

−0.3

5.5

V

AM_SW

SW pin. Power Output

−0.3

45

V

Max of(VSW−0.3,−0.3)

VSW+3.6

V

AM_VBOOTVBOOT pin, referring to ground. Power Input

AM_SNSPSNSP pin. Signal Input

−0.3

70

V

AM_SNSNSNSN pin. Signal Input

−0.3

70

V

AM_TS

Storage Temperature Range

−55

150

C

AM_TJ

Maximum Junction Temperature (Note 1)−40

P_TJ_OFFESD Withstand Voltage (Human Body Model)

2

kV

EOS_CDM_CORNER

ESD Withstand Voltage (CDM). BAT, SW, LSSG, SNSN

750

V

EOS_CDM

ESD Withstand Voltage (CDM), all other pins than corners

500

V

EOS_HBM

C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The maximum functional operating temperature range can be limited by the IC thermal shutdown: P_TJ_OFF.

RECOMMENDED OPERATING CONDITIONS
Operating ranges define the limits for functional
operation and parametric characteristics of the device. Notethat the functionality outside the operating ranges describedin this section is not warranted. Operating outside therecommended operating ranges for extended periods of time

may lead to a not functional device or affect device
reliability. A mission profile is a substantial part of theoperation conditions; hence the Customer must contact
onsemi in order to mutually agree in writing on the allowed
missions profile(s) in the application.

Table 3. RECOMMENDED OPERATING CONDITIONS
SymbolParameter Description

Min

Max

Unit

P_UVLO_operating

P_OVLO_operating

V

P_BAT_OPBAT Range − Operating

P_BAT_MAXBAT Range − Full Power9

P_OVLO_operating

V

P_VOUT

DC to DC VOUT Range

5.6

60

V

P_TA

IC Ambient Temperature Range

−40

125

C

P_TJ

IC Junction Temperature Range(Notes 2 and 3)

−40

150

C

20

W

2

W

P_OUTPUT_POWER Output Power
P_IC_POWER

On−chip Power Dissipation with therecommended heatsink performance

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
2. The parametric characteristics of the circuit are not guaranteed outside the parametric operating junction temperature range.
3. A mission profile describes the application specific conditions such as, but not limited to, the cumulative operating conditions over life time,
the system power dissipation, the system’s environmental conditions, the thermal design of the customer’s system, the modes, in which thedevice is operated by the customer, etc. No more than 100 cumulated hours in life time above P_TJ.

www.onsemi.com
4

NCV78514
Table 4. THERMAL INFORMATION (Note 4)
SymbolRTHETA_JC

Parameter Description

Min

Junction to exposed pad thermal resistance

Typ

Max

3.2

Unit

Notes

C/W

4. Includes also typical solder thickness under the Exposed Pad (EP).

ELECTRICAL CHARACTERISTICS
In the electrical table of this section, the Min and Max
Limits apply for ambient temperature from −40C to 125C

and junction temperature from −40C to +150C and for
VBAT from 5 V to 21 V unless otherwise specified. Typicalvalues are referenced to TJ = + 25C, VBAT = 14.0 V.

Table 5. BAT ELECTRICAL CHARACTERISTIC TABLE
SymbolParameter Description

P_UVLO_starting

Under−voltage comparator rising edge – BAT rising

P_UVLO_operating

Under−voltage comparator falling edge – BAT falling

P_OVLO_operating Over−voltage comparator BAT rising edge
P_OVLO_starting

Min

Typ

Max

Unit

7.75

8

8.25

V

5

V

21

V

20

Over−voltage comparator BAT falling edge

18

19

V

P_OVLO_hyst

Over−voltage hysteresis, falling

1.5

2.3

V

P_OVLO_FALL

BAT falling for rearming after an overvoltage

P_BAT_IWAIT

BAT pin Wait current, UVLO <BAT< OVLO no switching
DIM=0 or FAULT/STOP modes

20

Notes

ms
8

mA

Max

Unit

Notes

3.3

V

(Note 5)55

mA

Table 6. POWER TREE TABLE
SymbolParameter Description

Min

P_VDD

LDO supply voltage, BAT > P_UVLO_operating

P_VDD_CLAMPVDD Current limit, BAT > P_UVLO_operating

30
2.2

Typ

P_CVDDVDD output capacitance, including derating

P_VDRVVDRV supply voltage, BAT > P_UVLO_operating

4.7

P_VDRV_CLAMPVDRV Current limit, BAT > P_UVLO_operating

40

P_CVDRVVDRV output capacitance, including derating

2.2

P_PORB_R

Power on reset threshold, VDD rising

2.95

V

P_PORB_F

Power on reset threshold, VDD falling

2.5

V

mF

5

V

60

mA
4.7

(Note 5)mF

5. Loaded up to the minimum clamp value

Table 7. DC−DC CONVERTER TABLE
SymbolParameter Description

Min

Typ

Max

Unit

P_HSS_RONHigh side switch resistance from BAT to SW

75mW

P_LSS_RON

Low side switch resistance from SW to PGND

260

mW

IPEAK protection of the inductor

4.5

A

P_EFFICIENCY1

DC to DC efficiency, buck mode, BAT 14 V,
VLED 9 V, 1.5 A

90%

P_EFFICIENCY2

DC to DC efficiency, boost mode, BAT 14 V,
VLED 44 V, 0.4 A

90%

P_EFFICIENCY3

DC to DC efficiency, buck−boost mode, BAT14 V,
VLED 13 V, 1 A

90%

P_DC_Buck_Max

Max duty cycle in Buck Mode (BAT > VLED),
from Buck to Buck−Boost

80%

P_DC_Boost_Min

Min duty cycle in Boost Mode (BAT < VLED),
from Boost to Buck−Boost

23%

P_IPEAKwww.onsemi.com
5

Notes

NCV78514
Table 7. DC−DC CONVERTER TABLE (continued)
Symbol

Min

Typ

Max

Unit

DC to DC switching frequency

360

400

440

kHz

P_FSSMB

Spread Spectrum Modulation Bandwidth, of the
SWITCH_FREQ

5

6

10

%

P_FSSMF

Spread Spectrum Modulation Frequency

11.97

13.3

14.65

kHz

P_ILED_MAX

Maximum output current – RSET= 715 W − nodimming – no derating

1.425

1.5

1.575

A

P_ILED_MIN

Minimum output current – RSET= 10 kW − nodimming – no derating

0.18

0.2

0.22

A

P_ILEDCLAMP

LED Current de−rating minimum value in case ofderating, plateau option 50%

P_ILED_ACCURACY_200

ILED accuracy for a 200 mA programmed current –no dimming (RSET = 10 kW)

−10

+10

%

P_ILED_ACCURACY_1500 ILED accuracy for a 1500 mA programmed current –no dimming _(RSET = 715 W)

−5

+5

%

P_SWITCH_FREQParameter Description

100

mA

P_RSENSE

ILED Current sensing resistor value

99

100

101

mW

P_LSSG_PD

LSSG Gate Pull−down impedance – Isink 40 mA

1.5

3

6

W

P_LSSG_PUP

LSSG Gate Pull−up impedance – Isource 40 mA

1.5

3

6

W

Buck Boost inductor value

8

10

12

mH

P_EXT_CBOOT

Boost strap capacitor. Including DC bias derating

100

220

nF

P_EXT_LX

Notes

P_EXT_ISET

ISET capacitor for EMC

0.1

2.2

mF

P_EXT_CBATBAT pin decoupling capacitor. Including DC bias derating

1

2

4.7

mF

P_EXT_CVOUT

Vout pin decoupling capacitor. Including DC bias
derating

1

2

4.7

mF

P_EXT_CIN_INPUT_PI

Cin of the input Pi Filter

4.7

10

mF

P_EXT_COUT_INPUT_PI

Cout of the input Pi Filter

10

30

mF

Inductor of the input Pi Filter

2.2

3.3

mH

Cin of the output Pi Filter

2.2

2x4.7

mF

P_EXT_COUT_OUTPUT_PI Cout of the output Pi Filter

0.680

1

mF

2.2

3.3

mH

Max

Unit

Notes
(Note 6)

P_EXT_LX_INPUT_PI
P_EXT_CIN_OUTPUT_PI

P_EXT_LX_OUTPUT_PI

Inductor of the output Pi Filter

Table 8. DIM TABLE
SymbolParameter Description

Min

P_DIM_IN_DIG

Input duty cycle range, digital mode

1

100

%

P_DIM_OUT_DIG

Output duty cycle range, digital mode

1

100

%

Valid frequency on DIM

80

600

Hz

Hysteresis of the minimum valid frequency

−1

−3

%

10

%

P_DIM_FREQ
P_DIM_FREQ_IN_MIN_HYST
P_DIM_FREQ_ACC

Typ

−2

Accuracy of the frequency thresholds

P_DIM_FREQ_IN_MAX_HYSTHysteresis of the maximum valid frequency

1

2

3

%

P_DIM_FREQ_OUT

Output frequency of the DIM reconstruction(from DIM input frequency)

360

400

440

Hz

P_DIM_DC_ACC

DIM dimming reconstruction accuracy basedon DCDC Switching Activity Ratio. From DIM
in to LSSG or SW.

−1

1

%

P_DIM_DETECT

Detection time of a valid DIM.

25

30

ms

P_DIM_REMOVAL

Detection time of DIM removal

90

100

ms

80

www.onsemi.com
6(Note 7)

NCV78514
Table 8. DIM TABLE (continued)
SymbolParameter Description

Min

Typ

Max

Unit

P_FULL_STARTUP

DC to DC output start up time from valid BAT
applied – Automatic mode / Direct turn ON,
P_FADING_TIME=0

20

25

30

ms

P_DIM_SLOPE

Total time constant of the ILED setting fromdimming mode to normal mode

P_DIM_Vih

DIM pin high logic level (4.5 V overdrive)

P_DIM_Vil

DIM pin low logic level

P_DIM_IQ

No LED Error
P_UVLO_operating < BAT <P_OVLO_operating, DIM valid
Referring to ILED derating summary table
LED Error
P_UVLO_operating < BAT <P_OVLO_operating, DIM valid
No LED Error
BAT < P_UVLO_operating. DIM valid
Referring to Protection and error managementsummary table

P_DIM_IFAULT

125

Notes

ms

3.5

V
2

V

10

14

mA

0.4

0.7

mA

(Note 8)

6. An input duty cycle on DIM pin over 98 % is considered as a 100 % output duty cycle.
7. P_DIM_DC_ACC represents the digital reconstruction of the DIM input duty cycle. The ILED average and P_FULL_STARTUP depend on
the component choice, like Schottky leakages and/or lower capacitor values. Referring to Ta max 105C
8. A 4.5 V overdrive on DIM slope must be respected to not create additional delay on the PWM reconstruction.

Table 9. RSET PARAMETRIC TABLE
SymbolP_RSET_RANGE
P_RSET_RANGE_ACC
P_TIMEOUT_RSET
P_SET_RSETParameter Description

Max

Unit

15

kW

RSET range accuracy

10%

Timeout for an out−of−range RCOD value

100

ms

RSET pull down resistor valid range

Min

Typ

0.4

RSET reading duration from an UVLO rising edge

4.5

5

5.5

s

Min

Typ

Max

Unit

Notes

Table 10. LED CURRENT CONTROL WITH LOW VBAT TABLE
SymbolParameter Description

P_BAT_LOW

Poor BAT voltage (ADC reading)

8.7

9

9.3

V

P_DEB_BAT

VBAT time before derating, when
VBAT < P_BAT_LOW

7

10

13

ms

P_DTC_BATILED derating time constant in case of
VBAT < P_BAT_LOW, rising and falling

P_ILED_BAT_STEP

Step to Step Current De−rating granularity

www.onsemi.com
7

256

ms
2.5

%

Notes

NCV78514
Table 11. IC THERMAL THRESHOLDS TABLE
SymbolParameter Description

Min

Typ

Max

Unit

P_TJWARN

Warning threshold for a LED Current de−rating
starting value

130

C

P_TJ_HYST

Rearming threshold after a direct TSD (no derating)

135

C

P_TJ_REG

LED Current de−rating end value(ILED = P_ILED_TJILED over this threshold)

150

C

P_TJ_OFFProtection for the maximum Junction Temperature.
DC to DC is turned off over this value.

170

C

P_ILED_TJ

End de−rating output current ratio, percentage of
the ISET60%

P_TJ_FALL

Response time + timer, falling for rearming

20

ms

Step to Step Current De−rating ratio

1.3

2.5

Typ

Max

P_ILED_TJ_STEP

Notes

%

Table 12. THERMAL COEFFICIENT SENSOR PIN TABLES
SymbolParameter

Min

Unit

P_VTCSSTART

Derating start voltage on TCS

0.57* VVDD

P_VTCSEND

Derating end voltage on TCS

0.39* VVDD

P_ISTOP

Relative to ISET, Default Option

60%

P_TFAULT

Timer before an error is reported on DIM pin

20

30

100

ms

Derating slope in percentage of ILED

0.15

0.2

0.25

%/ms

Internal pull down for pin floating event, measured
at 1 V

0.3

2

MW

Max

Unit

P_TDER_SLOPE
P_TCS_PD

Notes

Table 13. SNSP AND SNSN THRESHOLDS TABLE
SymbolParameter Description

Min

Typ

P_VOUT_L

LED under voltage threshold (LED string shorted),falling

1.5

V

P_VOUT_SU

Start up threshold, Current sense feedback, rising

1.825

V

P_VOUT_L_IDLE_SU

Blanking time where the VLED low comparator is
not activated during start up, from switching activity

10

ms

P_VOUT_H

LED over voltage threshold (LED string opened),rising62

P_SNSPN_OPEN

Of the programmed ICOD. The comparator isdebounced.

135

P_SNSPN_SHORT

Differential voltage of the VLED N and P pins.
The comparator is debounced.

5mV

P_SNSPN_SHORT_SU

Blanking time at start up, from switching activity(sum of Ton in DIM dimming case)

8

ms

64

66

V

195

%

Notes

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Productperformance may not be indicated by the Electrical Characteristics if operated under different conditions.

www.onsemi.com
8

NCV78514
DETAILED OPERATING DESCRIPTION

During the ton time, HSS is turned on, and LSS is madenon−conductive. The peak current is tracked during thisphase. The conductivity of integrated switches is inverted
during the toff phase. Behaving like a synchronous buckconverter until the maximum duty cycle is reached(DC_Buck_Max).
In case of the BAT is close to the output voltage, the IC
enters in the 4−phases cycle, called the Buck−Boost mode.
The LSSG is then re−activated and the 3 switches (bothintegrated switches and external N−MOSFET) will be
alternatively controlled, where the sequence depends on
BAT voltage in reference to VLED.
During boost phase, LSS is open and HSS is closed.
Allowing to continuously track the Inductor IPEAK current.
The ton boost phase (inductor current increasing phase) iswhen external N−MOSFET is on, and no current crosses theschottky diode (VLED > schottky anode voltage).
The external N−MOSFET is made non−conductive
during the inductor discharge phase (toff).
The inductor is protected by an IPEAK protection. The
current is measured internally, through the high side switch.
The IPEAK is set at P_IPEAK. The maximum output power
will be limited in case of IPEAK event. The output power
limitation due to IPEAK protection mainly occurs in Boost
mode and in case of Battery cranking.
In case of IPEAK event, no error is reported to DIM pin.

BAT ELECTRICAL DESCRIPTION

For a proper operation and a safe start−up sequence, anunder−voltage comparator senses the BAT pin. Its own wide
hysteresis protects against slow battery rising and falling
behavior.
An overvoltage comparator turns off the DC−to−DC
controller in case of a too high or inappropriate battery
voltage is applied. The IC starts again when the input voltage
retrieves to normal level, below the OVLO_operating minus
hysteresis.
POWER TREE

The single channel LED driver is supplied from the BATpin.
BAT can be supplied from the car battery, for instance bya SmartFET. Two local supplies are generated from BAT:VDD and VDRV.
VDD supplies most of the internal circuitry and isdecoupled with the CVDD capacitor. VDRV supplies thedriver of the external low side Boost switch and is decoupledwith the CVDRV capacitor.
No external components or system (except the respective
decoupling capacitors and potential TCS pull−up resistor)
are allowed to be connected to VDD and VDRV pins.
DC−DC BUCK – BOOST CONVERTER OPERATIONSPREAD SPECTRUM FREQUENCY MODULATIONThe NCV78514 is powered from an automotive battery
and operates with a fixed switching frequency
SWITCH_FREQ, DIM mode (duty cycle modulation).
It is designed to supply a constant current between
ILED_MAX and ILED_MIN into a single LED string,
programmed by a pull−down resistor connected on ISETpin.
The synchronous Buck integrates the high side and thelow side switch. Whereas the asynchronous boost utilizes anexternal low side N−MOSFET and a Schottky diode.
The constant LED current is achieved by sensing peakcurrent through integrated high side switch.
The sensed peak current is compared to voltage over the
RSENSE resistor, which is in series with LED string.
The output voltage varies with number of LEDs in series
and programmed output current.
When the input voltage is well above the differential
output voltage between LED+ and LED − (Voltage acrossthe LEDs), the DC−DC converter is in buck mode (BAT >VLED).
Consequently, the LSSG pin used to drive the low sideswitch in boost mode, is then deactivated (retained to GND).
Upon the buck operation, integrated high side and low
side switches, transfer the energy from the input to the
inductor. Their resistances are represented by the
P_HSS_RON and P_LSS_RON parameters. The high sideswitch is driven from bootstrap capacitor Cboot (HSS gate
voltage = BAT + VDD − Vf).

Spread spectrum is a technique using frequency
modulation to achieve lower peak electromagnetic
interference (EMI).
It is an elegant and complementary solution with filteringand shielding techniques to improve EMC performance.
In order to “spread” the peak to broader band, the internal
oscillator frequency is modulated, decreasing the peak
amplitude at the center frequency and at the frequency’s
harmonics. This results in lower system EMI compared tothe typical narrow band signal produced by oscillators andmost clock generators.
The adopted spread spectrum technic results in double
peak triangle modulation, on FSSMB frequency range, andFSSMB frequency modulation.
DIM PIN − DIMMING DESCRIPTION

The average current through the LEDs can be reduced ina dimming fashion, with an external signal applied on DIM
pin.
The input signal frequency at DIM can be freely chosen
in the DIM_FREQ frequency range while the output
frequency is constant at FREQ_OUT.
The input signal is validated by the device before actual
dimming is applied on LED string (two periods).
An input frequency outside the DIM_FREQ_IN range isconsidered as no DIM available (or disappearance) thus the
LED string is maintained off (or switched off).

www.onsemi.com
9

NCV78514
Digital Dimming

As soon as the part achieves 100 % duty cycle, the part
enters in automatic mode.
At start up, the NCV78514 starts after the second
identified valid duty cycle.
A duty cycle change, to a higher or lower value, makes
a linear change of the LED current. The time to reach new
current is proportional to difference of new and previous
duty cycle and is described below.

A first dimming functionality is achieved by applying
a square input signal on the DIM pin.
The input duty cycle range is valid in the DIM_DC_IN
range and is reconstructed on the output with an identicalduty cycle (DIM_DC_OUT).
A duty cycle above 98% is considered as a 100 % duty
cycle. The current into the LEDs is then no more dimmed,
and set to the DC current, programmed by RSET.

Normalized
Output Current

DIM
Pin

A = Old Duty
Cycle: 20 %B = New Duty
Cycle: 50 %Duty cycle:0%t (ms)

1
0.5
0.2

t (ms)
P_DIM_DETECT

B-A
P_DIM_DETECT + P_FADING_TIME
100

P_DIM_DETECT

Figure 4. ILED Setting Slope in Digital Dimming Mode
Automatic Fading

P_DIM_DETECT, the output current will start to decline toin logarithmic manner. Zero output current will be reachedafter P_FADING_TIME.
Remark: depending on the output conditions (I.E low
current level, high LED number), the small duty cycle
values can create long turn on time of the LED string.

Automatic fading mode is activated if the voltage applied
to PWM pin is not alternating during the P_DIM_DETECT
period. When the PWM pin is held active for this period, theoutput current will reach programmed value after
P_FADING_TIME and the current rise will be logarithmic.
When logic 0 is applied for another period of

DIM
Pin

1

Normalized
Output Current0t (ms)

1

0
t (ms)
P_DIM_DETECT

P_FADING_TIME
P_DIM_DETECT

P_FADING_TIME

Figure 5. ILED Setting Slope, Automatic Fading Modewww.onsemi.com
10

NCV78514

DIM = 1 for more P_DIM_DETECTAUTOMODE
Logarithmic rising

FADING_TIME elapsed

DIM=0 longer than DIM_DETECTFADING_TIME elapsed

AUTOMODE
Logarithmic falling

DIM = 0 longer than DIM_DETECT

100 % Duty Cycle
ILED = ISETDCDC OFFDIM = Valid Duty cycle

Linear transition done

Digital mode
DCDC duty cycle =DIM duty cycle

Valid Duty cycle change

DIM = 0 for P_DIM_DETECT or

Linear transition
Rising or falling
FADING_TIME ratio

DIM = Duty cycle

DIM = 100% duty cycle

Figure 6. Dimming Modes Functional Flow Diagram
LED CURRENT SETTING

Important remark:For EMC conductive emission performance, Pi filters
must be placed on:
 BAT line and recommended on the output of the DCDC
converter (after the Rsense resistor), in case of separate
module application.

RSET Pull Down

The LED current is set through the ISET pin, witha pull−down resistor.
Granularity of the current setting is achieved though theresistor series choice and tolerance of them.
ILED (A) +The sizing of the Pi filters (please see the bill of material)is done to achieve a good stability of the Buck − Boost.
Any other component choice will have an impact on theturn on time in dimming mode, as for the duty cycle accuracy(DIM_DC_ACC) or overall stability.
The turn on time in Normal Mode and DIM Mode arerespectively
FULL_STARTUP
andDIMMING_STARTUP.
Upon removal of the DIM signal, the LED current isturned off only after a delay of DIM_MISS.

1000 (W @ A)
RSET (W)) 0.1 (A)(eq. 1)For example, RSET = 1 kW => 1.1 A.
The identification of the RSET is initiated by BAT >P_UVLO_STARTING, rising edge.
During IC’s wake up time, a first read of RSET is
performed in order to provide current into LEDs within the
P_FULL_STARTUP. The RSET is continuously done
during P_SET_RSET to achieve the more accurate value inthis time frame. After this period, a value out of the
P_RSET_RANGE, longer than P_TIMEOUT_RSET isconsidered as an out of range, and LED current is turned off.
A new power on reset sequence is then required.

www.onsemi.com
11

NCV78514
P_SET_RSET timer elapsed

UVLO
Wake up
DCDC OFF
Start P_SET_RSET
timer

From any state
VBAT valid
No errorRead RSET before
Start up during
P_FULL_STARTUPOORRSET Valid
ISET = 10e6/RSET +100 mAOut of range
Start
P_TIMEOUT_RSET

RSET update if > 5
DAC LSB

Stop RSET update

P_TIMEOUT_RSET elapsed& ( DIM = 1 or P_SET_RSET)

Automatic restart

OORbarFigure 7. Flow Diagram of the R_COD Identification
LED CURRENT DERATING MANAGEMENT

Battery cranking

To limit overheating of the IC an ILED current de−rating
mechanism is managed by the controller itself. The different
de−rate mechanisms are described below.
When two or more derating mechanisms are active, theone which derates more is applied to ILED current.
Both BAT pin, TCS pin and internal junction temperature
sensor are monitored by integrated ADC.

In case of a low Battery voltage (BAT pin), the LED
current is gradually decreased. In order to avoid glare andflickering, the duration of the current derating is set at
P_DTC_BAT. A violent battery crancking, can trigger Ipeak
protection. The input current and output power are thenlimited by the IPEAK clamp. The current derating will takehand if the BAT voltage continues to decrease down to theundervoltage comparator. No error is reported on DIM pin
in case of IPEAK event

BAT (V)

P_BAT_LOWP_UVLO_operating

T (ms)LED Current (A)ISET

0.6 x ISET
T (ms)BAT Current (A)P_IPEAK

P_DEB_BAT

P_DEB_BAT

P_DTC_BAT

Figure 8. Current Derating, Battery Voltage

www.onsemi.com
12

T (ms)

NCV78514
If the junction temperature continues to increase andcrosses the P_TJ_REG threshold, the LED current ismaintained around P_ILED_TJ.
If the IC temperature exceeds the P_TJ_OFF, the current
into the LED is stopped, and an error is reported on DIM pin.
A power on reset is required to reset the error.
In case of a very fast temperature increase (no derating is
engaged) and P_TJ_OFF is crossed, the LED string will be
rearmed when the junction temperature falls below the
P_TJ_HYST threshold, and the error reporting on DIM pin
is stopped.
The current derating and management are defined asfollowing:

When VBAT falls under P_BAT_LOW, ILED is derated
following the formula with a minimum of
P_ILED_CLAMP value:
ILED + ISET

(BAT ) 1)
10(eq. 2)IC Temperature Monitoring

The junction temperature of the IC is monitored thanks toan internal thermometer.
In the situation where the junction temperature exceeds
gradually the P_TJWARN, a current de−rating isimmediately applied to the LED current, with a controlled
slope upon P_DTC_BAT timing.
Normalized Output
Current
100%
ILED_TJ_STEP
60%

TJ_OFF

TJ_REG

TJ_WARN

Junction Temperature

Figure 9. LED Current Derating versus Junction Temperature
LED String Temperature Monitoring

In case of a module approach, NTC is recommended tosave one wire on the connector between the controller andthe Led module.

A derating is also applied to ISET in case the LED string
temperature is too high, and a temperature coefficientresistor is used (same PCB or separate LED module).
Both negative temperature coefficient (NTC) or positive
temperature coefficient (PTC) can be used with a pull−up or
pull−down resistor respectively.

NCV78514

NCV78514

VDD

VDD

TCS

RPU

TCS

PTC

ADC

ADC
P_TCS_PDNTC

P_TCS_PD

RPD

Figure 10. NTC (left side) and PTC (right side) Connection Options

During the derating time frame, AR_P_DER_SLOPE is
applied on the LED current to avoid glare or flickering
effect.

The sampling period of the temperature sensor is definedby the sampling rate of the internal ADC.
RPUP and RNTC (or RPD and RPTC) ratio is selected tostart the ILED derating when VTCS is crossing VTCSTART.

www.onsemi.com
13

NCV78514
If the LED temperature stays excessive longer than
TFAULT timer, with a maximum derating applied, a fault isreported on DIM pin.
Derating example with a positive temperature coefficientsensor.
PTC ref: PRF18BE471QS5RB (470 W @ 25 C, 4700 W @85C)

PTC choice makes the derating more direct due to the
exponential intrinsic variation of this resistor type. The
derating slew rate is then blended with the TDISDER slope
control.
For safety reasons, an internal pull−down resistor isconnected between TCS pin and and GND. Indeed, in caseof a floating pin, the TCS pin is automatically tied to GND,
and a maximum derating is applied on the LED current.
RPD + RPTC@85C *ǒ

VDD * VTCS START

Temperature calculation at ISTOP value (60% of ISET bydefault).
RPTC@END + RPD(6250 W) *ǒ

VDD * VTCS START

Because the PTC value changes by 50% with 5Ctemperature difference, the same temperature difference
creates larger change of output current than NTC.

ǒǒ

[ 6250 W+ 9775 W [ 90C with&a PRF18BE471

Ǔ

VDD * VTCS start
VTCS STARTǓVDD * VTCS STARTVTCS START(eq. 4)[ 1100 W+ 698 W [ 115C with&a NCG18XH103(eq. 5)(eq. 6)

Optional Behavior: STOP Over VTCSEND Threshold

If unused, TCS pin is to be connected with an external
resistor divider, to set TCS pin voltage to half of VLDO.
In case both junction temperature and LED temperature
required current derating, the current is controlled by thethermal sensor (NTC/PTC or TJ) which requires the higher
current derating (whichever results in lower LED current).

Optionally, it is proposed to the end user to reshape thederating profile by turning off the DCDC in case of
VTCS_END threshold is exceeded longer than TSTOP. If
so, the profile is expressed below.

Normalized
Output Current
1

P_ISTOP0(eq. 3)

Derating example with a negative temperature coefficientsensor: NCG18XH103F0SRB

Temperature calculation at ISTOP value (60% of ISET bydefault).
RNTC@END + RPD(1100 W) *Ǔ

VTCS START

RPU + RNTC@85C *Ǔ

VTCS START

VTCS_END VTCS_STARTVTCS (V)Figure 11. Current Derating TCS Voltage

www.onsemi.com
14

NCV78514
PROTECTIONS AND ERROR MANAGEMENT

error mode, a new start up sequence is started. The
brightness is recovered as soon as the error disappear.
The second situation occurs, when LED string opens.
In this case the SNSN will cross the P_VOUT_H
threshold due to the boost mode. An auto−rearming is started
as soon as the output capacitor is fully discharged (below
UV out threshold).
A LED string error is reported via DIM pin.
The auto−rearming sequence is running as long as the led
string is opened.

Due to several embedded protection systems, theNCV78514 is able to manage different errors and fault
types.
Depending on the error, the controller informs the systemthrough the DIM pin by changing current consumption.
The different errors types are described below.
Overvoltage

When BAT pin voltage is larger than P_OVLO_operating
threshold, the light is turned off or maintained off. An error
is reported to DIM pin in this case.
To retrieve normal operation, the BAT must be below
OVLO operating minus hysteresis. Error is not reported on
DIM pin, when BAT voltage falls below OVLO minus
hysteresis.

RSET Out of Range Value

An out of range RSET is considered as an error (See Error
Table) if RSET < 400 W, RSET > 15 kW for longer than
P_TIMEOUT_RSET.
This out of range detection acts after the P_SET_RSET
start up timer is elapsed or if the LEDs are already ON.
The out of range error is reported via DIM pin. The system
automatically rearms until the RSET recovers a valid value.

LED String Error

The device is able to detect several faults on the LED
string, through the SNSP and SNSN sense pins.
For the two error situations described below, the DC to DC
controller will instantaneously turn off the LED current, andreport error via DIM pin.
The first situation is when anode of LED string shorts tocathode, or to GND. These events are detected, when SNSN
voltage drops below P_VOUT_L.
During the turn on sequence of the DC DC converter, thisprotection
mechanism
isdeactivatedduring
P_VOUT_L_IDLE_SU in order to avoid unexpected fault
detection. In case of an error is detected and the part goes toFeedback Loop Issue

SNSP and SNSN pins are used for the regulation loop.
A physical error making the pins shorted or opened, latch anerror and the LED current is stopped.
DIM Pin Status Function

In case of some specific errors, the DIM pin is used asa status pin.
The current consumption on the pin will switch from
P_DIM_IQ to P_DIM_IFAULT input current consumption,in case of error.

DIM
Light provided:
IDIM > P_DIM_IQ

Dimming Generator

DIAG
Control

No light provided:
IDIM < P_DIM_IFAULT

Figure 12. DIM Pin, Diagnostic Current Sink

Depending on the kind of error, the output may be turnedoff, requiring a BAT removal to reset the error modecondition.
At power up, the P_DIM_IQ is activated when
P_VOUT_L is reached to make sure the current is present
into the LED string.

The P_DIM_IQ is de−activated on UVLO, falling edge.
The different errors are described in the below table.

www.onsemi.com
15

NCV78514
Table 14. ILED DERATING SUMMARY TABLEReset

DIM Current Sink

Output StateIC over temperature (Warning)

ILED Derating List−

> P_DIM_IQ

ILED Derated

Low BAT voltage−> P_DIM_IQ

ILED Derated following (BAT +1)/10 rule

> P_DIM_IQ

ILED Derate> P_DIM_IQ

ON but limited power

PTC or NTC Over temperature (ILED < ISTOP)
Inductor I PEAK−

Table 15. PROTECTIONS AND ERROR MANAGEMENT SUMMARY TABLEReset

DIM Current Sink

Output State

Overvoltage

Protections and Errors List

Comp. Hysteresis< P_DIM_IFAULT

LED OFF

BAT < UVLOComp Hysteresis< P_DIM_IFAULT

LED OFFIC over temperature (TJ_OFF)

Comp. Hysteresis< P_DIM_IFAULT

LED OFFIC over temperature (TJ_OFF) − 40 % ILED derate

BAT POR< P_DIM_IFAULT

LED OFFILED = ISTOP more than TFAULTBAT POR< P_DIM_IFAULT

LED OFF

LED + shorted to GND or LED −BAT POR< P_DIM_IFAULT

LED OFF

LED + string opened

BAT POR< P_DIM_IFAULT

LED OFF

SNS P or N opened

BAT POR< P_DIM_IFAULT

LED OFF

SNS P and N shorted

BAT POR< P_DIM_IFAULT

LED OFFRSET out of range

Auto restart< P_DIM_IFAULT

LED OFF

Table 16. TIMING TABLE SUMMARY
Parameter

Timings

VREG_OKNo debounce, 2 ms response time

VREF_OKNo debounce, 2 ms response time

VDRV_OKNo debounce, 2 ms response time

UVLO

No debounce, 2 ms response time, Functional State Machine. Synchro rise & fall

OVLO

No debounce, 2 ms response time, Functional State Machine. Falling + 20 ms FAULT state timer

TSD

No debounce, 2 ms response time, Functional State Machine. Falling + 20 ms FAULT state timer

VLED H

Debounce 8 ms rising

VLED L

Debounce 5 ms after bob_running. Debounce 8 ms in running mode.

SNSP&N opened

Debounce 150 ms in running mode.

SNSP&N shorted

Blanking 8 ms after bob_running. Debounce 150 ms in running mode.

RSET OOR

90 ms

BAT

10 ms before derating

BAT derating

256 ms (de)rating slope

PTC/NTC derating

256 ms (de)rating slope

DIM slope

P_DIM_SLOPE (Option)

IC tempDirect deratingwww.onsemi.com
16

NCV78514
MAIN FUNCTIONAL STATE MACHINEPower ON Reset / VBAT Removal

Initialization

RSET reading

Internal ref ok

RSET in range

STOP

AGND or (TSD+maxDerate) or
TCS error or VSET high out of range

VDRV ON

From any states

OTP bits loading
Done

VBAT OKNo fault + 20 ms

VDRV ok

AGND ground loss
check

WAIT

No Fault

DIM ONUVLO

LEDs ONFAULT

OVLO IN or (TSD+ No full derating)
RSET OOR or LED string short
LED string open

Figure 13. Functional State Machine

COMPONENT LEVEL ELECTROMAGNETICCOMPATIBILITY (EMC)
EMC is a critical item in automotive systems. onsemi
commits to cooperate technically with the customer to target
to build an integrated circuit which is sufficiently
EMC−robust in the application environment of thecustomer.
To make the application successful for EMC, following
items need to be taken into account, explicitly, during theconcept phase: onsemi is specialized in IC design and IC manufacturing,but cannot be considered as expert in the automotive
IC−application.
The
know
how
on
application−level−EMC needs to be provided by thecustomer.
 The customer needs to inform onsemi explicitly during
the concept phase about any EMC item which isconsidered as critical for the application and which may
be of importance for the IC design.
 If the customer is aware about any potential particular
EMC marginalities or any potential EMC issues – forexample from experience with previous generations of
the particular application – , which may have an impact
on the IC design, they need to inform onsemi explicitly(beyond general wordings or general frame
agreements) during the concept phase about theassociated EMC risks.
 In case there are particular EMC requirements
embedded in the IC requirement spec, these need to be
explicitly flagged by the customer, discussed

explicitly with onsemi, and mutually agreed during
the concept phase.
 EMC items which turn out to be critical in a later phaseof the project and have impact on the IC design cannot
be considered as implicitly agreed if they have notbeen explicitly discussed and documented in writing(somehow) during the concept phase.
 Proposals for solutions in the IC design to address thecritical EMC items for the application need to be
discussed explicitly and documented in writing during theconcept phase.
 It needs to be well understood that external components
may eventually be necessary to meet the application’s
EMC requirements.
 In case of lack of discussion or documentation during
the concept phase of an item which turns out later to be
EMC−critical, it cannot be implicitly assumed that the
IC can meet all application−level−EMC−requirements
without the help of external components.
 For proper design and validation by onsemi, it isimportant that realistic “conductive” EMC performancetargets are agreed during the concept phase.
 On IC−level, only conductive requirements (DPI
levels for susceptibility, emission levels to be verified
with conductive 150 Ohm method – ref.
IEC−62132−4/IEC−61967−4) can be taken into
account for the IC design by onsemi.

www.onsemi.com
17

NCV78514
Application level EMC performance will depend on theuse of the IC (ASIC) component in an application
environment: The influence of the application environment is typicallycaused by or related to (but not limited to) the board
design, values and tolerances of external components,
presence of external non−linear elements, size, housing,wire harness and the variations of all these over different
applications.
 For example, EMC signals disturbing directly within
the signal band of normal operation cannot be
distinguished by the IC from normal operating signals.

 Therefore, onsemi cannot take responsibility on

application level EMC testing, application EMC
performances or application solutions for EMC.
 onsemi is willing to cooperate with the customer to findroot causes for application level EMC issues, if thenecessary information is provided to document that apotential root−cause for application level EMC issues
may be in the ASIC. A potential correction in the ASIC
itself for an application level EMC issue (if feasible) willneed to follow an agreed change procedure.
Remark: please refer to the application schematic forrecommended components.

www.onsemi.com
18

Figure 14. Application Board Schematic

www.onsemi.com

19

R4

C18

TCS

VBAT

R10

GND

TP8

C7

C19

TP7

C10
GND

3

1
2

R9

ISET

C9
R11 GND

PWM

J_IN

6

10

12

7

5

RSV

ISET

TCS

VDD
VDRV

BAT
2
BAT
3
DIM

1

U1

PWM

C8

TP3

TP1

TP4

EXP
GND

17

C1

PGND

SNSN

SNSP

SNSP
SNSN

9

R7

C20

G
11 GND

4

14

LSSG

AGND

8

16

13

D
SW
15
SW

VBOOT

NCV78514

C2

M2

S1

TP9

L1

G

10 uH

R2

R1

1
S

D

2

S

Reverse polarity protection

C3

D1

M1

C21

D2

R6

C4

GND

C12

C11

C22

L2

C13

R5

3,3 uH

Input PI filter

GND

C14

C23

C15

TP5

C5

R8

C6

VBAT

C16

L3
3,3 uH

Output PI filter

GND

TP2

GND

C17

TP6

GND

ISET
TCS

GND

ISET
TCS

5

3
4

1
2

5

3
4

2

1

J_OUT_2

J_OUT_1

NCV78514

NCV78514
Table 17. BILL OF MATERIAL
Reference

Manufacturer

Manufacturer Reference

Value

C1

MurataGCJ188R72A104KA01D

100 nF

C2

MurataGCM32EL8EH106KA07

10 mF

C3

MurataGCJ188R72A104KA01D

100 nF

C4

MurataGCM32EL8EH106KA07

10 mF

C5

MurataGCM32EL8EH106KA07

10 mF

C6

MurataGCM32EL8EH106KA07

10 mF

C7

Murata

GCJ32DC72A475KE01L

4.7 mF

C8

Murata

GCM21BC72A105KE36L

1 mF

C9

Murata

GCM21BR71C475KA73L

4.7 mF

C10

Murata

GCM21BR71C475KA73L

4.7 mF

C11

Murata

GCJ32DC72A475KE01L

4.7 mF

C12

MurataGCJ188R72A104KA01D

100 nF

C13

MurataGCJ188R72A104KA01D

100 nF

C14

MurataGCJ188R72A104KA01D

100 nF

C15

Murata

GCJ32DC72A475KE01L

4.7 mF

C16

Murata

GCJ32DC72A475KE01L

4.7 mF

C17

Murata

GCM21BC72A105KE36L

1 mF

C18

MurataGCJ188R72A104KA01D

100 nF

C19

MurataGCJ188R72A104KA01D

100 nF

C20

MurataGCJ188R72A104KA01D

100 nF

C21

MurataGCJ188R72A102KA01

1 nF

C22

MurataGCJ188R72A104KA01D

100 nF

C23

MurataGCJ188R72A104KA01D

100 nF

D1

onsemi

MM5Z20VT1

MM5Z15VT1G

D2

onsemi

NRVTS8100PFST3G

NRVTS8100PFST3G

M2

onsemi

NVTFS5116PLT

NVTFS5116PLTWG

U1

onsemi

NCV78514

NCV78514

M1

onsemi

NVTFS6H860NL

NVTFS6H860NL

L1

TDK

SPM7054VT − 100M−D

10 mH

L2

TDK

SPM4030VT−3R3−D

3.3 mH

L3

TDK

SPM4030VT−3R3−D

3.3 mHR1

Vishay

MCT06030C2002FP5

20 kW

R2

Vishay

MCT06030C1002FP5

10 kW

R4

Vishay

MCT06030Z0000ZP5

0R − Optional

R5

SusumuRL1632R−R100−F

R100

R6

Vishay

MCT0603PD1009DP5

100R − Optional

R7

Vishay

MCT06030Z0000ZP5

0R − Optional

R8

Vishay

MCT06030Z0000ZP5

0R − Optional

R9

Vishay

MCT06030Z0000ZP5

0R − Module Option

R10

Vishay

MCT06030Z0000ZP5

0R − NTC/PTC

R11

Vishay

MCT06030Z0000ZP5

0R − NTC/PTC

J_IN

Wurth

691709710303

Wurth Header 3

J_OUT_1

Molex

502352−0500

Molex Header 5

J_OUT_2

Wurth691709710305

Wurth Header 5

www.onsemi.com
20

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONSTSSOP16, 4.4x5 EXPOSED PAD
CASE 948BVISSUE ODATE 22 JUN 2017

TOP VIEWEND VIEW

BOTTOM VIEW

SIDE VIEWSYMBOL
A
A1
A2
b
c
D
E
E1
e
L
L1
N
P
R
S

θ

MIN

NOM

MAX
1.10
0.15
0.95
0.30
0.20
5.10
6.50
4.50

0.05
0.85
0.19
0.13
4.90
6.30
4.30
0.65 BSC
1.00 REF
0.45
0.90
6.50
4.60
0.37

0.75
1.00
6.70
4.80
0.47

0º

8º

X
Y

LAND PATTERN
Notes:(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153 variations ABT.

3.33 REF
2.76 REF

DOCUMENT NUMBER:DESCRIPTION:

98AON65408G

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

TSSOP16, 4.4X5 EXPOSED PAD

PAGE 1 OF 1

onsemi andare trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particularpurpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.

© Semiconductor Components Industries, LLC, 2017www.onsemi.com

onsemi,, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of theinformation, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or useof any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance mayvary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any licenseunder any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

ADDITIONAL INFORMATIONTECHNICAL PUBLICATIONS:Technical Library: www.onsemi.com/design/resources/technical−documentation
onsemi Website: www.onsemi.com



ONLINE SUPPORT: www.onsemi.com/support
For additional information, please contact your local Sales Representative at
www.onsemi.com/support/sales