AN14284

FlexIO模拟接口的时序参数调整
第1版—2024年4月12日

文档信息信息内容关键词AN14284、FlexIO、SPI摘要

本应用笔记介绍了如何使用附加定时器来调整RT1170-EVK中SPI主设备的建立时间。

应用笔记

AN14284

恩智浦半导体FlexIO模拟接口的时序参数调整

1介绍FlexIO是Kinetis、S32K、RT和MCX微控制器系列中配备的一个片上外设。它具有高度可配置性，能够模拟UART、
I2C、SPI、I2S和LIN等各种通信协议以及J1850、I3C、Manchester等其他协议。1
这个单独的外设模块FlexIO可用作微控制器的一个额外的外设模块，并不是要替代任何通信外设。
FlexIO的主要特点是灵活性强，让用户甚至可以自定义时序参数。
本应用笔记介绍了如何使用附加定时器调整RT1170-EVK中SPI主设备的建立时间。

2 模拟SPI主设备
2.1 概述要用FlexIO模拟SPI主设备，请使用以下资源：• 两个移位器：一个是发送器，另一个是接收器。
• 两个定时器：一个用于生成片选，另一个用于生成时钟以控制两个移位器。
• 四个引脚：CS、SCK、MOSI和MISO。

2.2 在高波特率下的接收错误模拟SPI主设备的驱动程序通常包含在MCUXpresso SDK中。下面是evkmimxrt1170_flexio_spi_edma_lpspi_transfer_master_cm7以20MHz频率运行时的结果。SPI主设备接收到移位了一位的数据，发生了某种错误，如下图所示。
FLEXIO Master edma - LPSPI Slave edma example start.
This example use one flexio spi as master and one lpspi instance as slave on one board.
Master uses edma and slave uses edma way.
Please make sure you make the correct line connection. Basically, the connection is:
FLEXIO_SPI_master -- LPSPI_slave-CLKCLKPCSPCS-SOUTSIN-SIN-SOUT
This is LPSPI slave call back.
Master receives:
FEFDFDFCFC
FBFBFFFFFE
FAFAF6F5F5F4F4F3F3F7F7F6F2F2Slave transmits:
FFFE
FDFC
FBFA
F9F8F7F6F5F4EFEEEDECEB
EA
E9E8E7E6E5E4Error occurred in FLEXIO SPI master <-> LPSPI slave transfer!

F9F1F9F1F8F0F8F0F3E3F2E2F1E1F0E0End of example.

1 使用FlexIO模拟四线SPI主设备（文件AN14175）使用FlexIO模拟通信和定时外设（文件AN12174）
AN14284应用笔记

本文件中提供的所有信息均受法律免责声明的约束。

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恩智浦半导体FlexIO模拟接口的时序参数调整
图1所示为逻辑分析仪测量到的信号。

MOSIMISO图1. MISO信号稍稍滞后于SCK信号MISO会信号稍稍滞后于SCK信号，因为从设备是由主设备驱动的，而MISO是由SCK的上升沿采样的。所以会导致
一位的数据移位。
这就是所谓的建立时间。延迟时间取决于所连接的从设备的速度。

3 通过延迟时钟调整建立时间
3.1 延迟时钟是什么在单纯的实现方案中，接收器在SCK的上升沿移位，当MOSI信号稍稍滞后于SCK信号时，就会导致一位的移位。
通过使用接收器的内部延迟时钟，即使MOSI信号滞后于SCK信号，主设备也能接收到正确的数据。

3.2 配置移位器和定时器要实现延迟时钟，还需要四个定时器。虽然发送移位器仍由SCK控制，但接收移位器由Delayed SCK（延迟SCK）控制。每个定时器的输出必须遵循此时序图，如图2所示。

图2. 时序图• 添加移位器RX以便将移位器状态标志位（SSF）转换为定时器输出。它用于SCK Enable（SCK启用）。
• 当SCK Enabled信号发出时，SCK被启用。当SSF TX为低电平且SSF RX处于下降沿时，SCK Enable信号被发出。

AN14284应用笔记

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AN14284

恩智浦半导体FlexIO模拟接口的时序参数调整
• Delayed SCK Enable信号发出时，Delayed SCK（延迟SCK）启用。Delayed SCK Enable会计算DelayedSCK需要多长的延迟时间。一个单位为一个FlexIO周期。在此演示中，Delayed SCK被配置为延迟两个周期，
但它是可定制的。
具体来说，定时器的配置如下。
表1. 定时器配置定时器名称0触发器选择引脚选择启用条件关闭条件

递减源Shifter RX SSF RX

输出(ShifterRxPin)

触发器上升沿定时器比较触发器

1SCKEnable

SSF TX

输入(ShifterRxPin)

触发器低电平定时器比较引脚2

Delayed
SCKEnable

SCK启用

未使用

触发器上升沿定时器比较

FlexIO时钟

3

SCK

SCK启用

输出(SCKPin)

触发器上升沿定时器比较FlexIO时钟

4

Delayed
SCK

DelayedSCK启用输出(DelayedSCKPin)

触发器上升沿定时器比较FlexIO时钟

5

CS

SCK启用

输出(CSnPin)

触发器上升沿定时器比较触发器

3.3 运行演示
要运行示例，请按表2所示进行连接。
表2. 引脚连接信号

从设备主设备

MOSI

J10-10

J26-6

MISO

J10-8

J26-4

SCKJ10-12

J26-2

延迟SCK (测试点)—J26-10CSJ10-6J26-8

1. 移除R200、R406、R408和R404的0Ω电阻。
2. 在PC主机和电路板上的OpenSDA USB端口之间连接一条mini USB线。
3. 在计算机上打开一个OpenSDA串行设备的串行终端，设置如下：• 115200波特率• 8个数据位• 无奇偶校验• 1个停止位• 无流量控制
4. 将程序下载到目标板。
5. 按下板上的复位按钮或启动IDE中的调试器，开始运行演示程序。
如果示例运行成功，您将在终端上看到以下信息。

AN14284应用笔记

本文件中提供的所有信息均受法律免责声明的约束。

© 2024 NXP B.V. 版权所有。

第1版—2024年4月12日
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AN14284

恩智浦半导体FlexIO模拟接口的时序参数调整

FLEXIO Master edma - LPSPI Slave edma example start.
This example use one flexio spi as master and one lpspi instance as slave on one board.
Master uses edma and slave uses edma way.
Please make sure you make the correct line connection. Basically, the connection is:
FLEXIO_SPI_master -- LPSPI_slave-CLK
CLKPCS
PCS
-SOUT
SIN
-SIN
-SOUT
This is LPSPI slave call back.
Master receives:
FCFB
FA
F9F8F7F6F5FF
FE
FD
EFEEEDEC
EB
EA
E9E8E7E6E5Slave transmits:
FC
FB
FA
F9F8F7F6F5FF
FE
FDEC
EB
EA
E9E8E7E6E5EF
EEEDFLEXIO SPI master <-> LPSPI slave transfer all data matched!

F4E4F3E3F2E2F1E1F0E0F4E4F3E3F2E2F1E1F0E0End of example.

图3所示为Delayed SCK按配置延迟了两个FlexIO周期。

CSSCK
Delayed SCK

Latency = 2/120MHz ≈ 17ns

MOSIMISO图3. Delayed SCK延迟了两个FlexIO周期

4 结语通过使用额外的定时器，在FlexIO模拟接口上，甚至能自定义时序参数。

AN14284应用笔记

本文件中提供的所有信息均受法律免责声明的约束。

© 2024 NXP B.V. 版权所有。

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恩智浦半导体FlexIO模拟接口的时序参数调整

5 关于本文中源代码的说明
本文中所示的示例代码具有以下版权和BSD-3-Clause许可：
2024年恩智浦版权所有；在满足以下条件的情况下，可以源代码和二进制文件的形式重新分发和使用本源代码
（无论是否经过修改）：1. 重新分发源代码必须保留上述版权声明、这些条件和以下免责声明。
2. 以二进制文件形式重新分发时，必须在文档和/或随分发提供的其他材料中复制上述版权声明、这些条件和以下免责声明。
3. 未经事先书面许可，不得使用版权所有者的姓名或参与者的姓名为本软件的衍生产品进行背书或推广。
本软件由版权所有者和参与者“按原样”提供，不承担任何明示或暗示的担保责任，包括但不限于对适销性和特定用途适用性的暗示保证。在任何情况下，无论因何种原因或根据何种法律条例，版权所有者或参与者均不对因使用本软件而导致的任何直接、间接、偶然、特殊、惩戒性或后果性损害（包括但不限于采购替代商品或服务；使用损失、数据损失或利润损失或业务中断）承担责任，无论是因合同、严格责任还是侵权行为（包括疏忽或其他原因）造成的，即使事先被告知有此类损害的可能性也不例外。

6 修订历史表3总结了本文档的修订情况。
表3. 修订历史
文档ID

发布日期

说明

AN14284 v.1

2024年4月12日

首次公开发布AN14284

应用笔记

本文件中提供的所有信息均受法律免责声明的约束。

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恩智浦半导体FlexIO模拟接口的时序参数调整

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恩智浦半导体FlexIO模拟接口的时序参数调整

目录
12
2.1
2.2
3
3.1
3.2
3.3
456

介绍 .................................................................... 2模拟SPI主设备 .................................................... 2
概述 .................................................................... 2
在高波特率下的接收错误 .................................... 2通过延迟时钟调整建立时间 ................................ 3
延迟时钟是什么 .................................................. 3
配置移位器和定时器 ........................................... 3运行演示 ............................................................. 4
结语 .................................................................... 5
关于本文中源代码的说明 .................................... 6
修订历史 ............................................................. 6
法律声明 ............................................................ 7

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Date of release: 12 April 2024
Document identifier: AN14284