II-9. Instrumentation

RIKEN Accel. Prog. Rep. 54 (2021)

RIKEN Accel. Prog. Rep. 54 (2021)

Development of a high-bandwidth waveform processing system using
RFSoC
S. Takeshige,∗1 H. Baba,∗2 K. Kurita,∗1 Y. Togano,∗1 J. Zenihiro,∗3 and Y. Hijikata∗38x Analog Signal

So ware Trigger

Enable

FADC

External Trigger
to DDR
MemoryFig. 2. Block diagram of the implemented external trigger
function.The bold line shows the implemented part.
Plastic scintillator waveform
Amplitude[LSB]

We are developing a real-time digital signal processing unit using a GHz-band ﬂash-type analog-to-digitalconverter (FADC) to establish the next-generation dataacquisition system at RIBF. In experiments using radioactive ion (RI) beams, it is necessary to identify eachparticle. For this purpose, detectors are installed along
the beam line, and signals are acquired on an eventby-event basis. However, as the amount of beams increases, conventional CAMAC/VME ADC/TDC modules become a measurement bottleneck owing to its slow
processing rate. For germanium detectors, real-time digital signal processing is applied using 100-MHz FADCsinstead of conventional ADC/time-to-digital converter(TDC) modules.1) However, 100 MHz is insuﬃcient for
signals with high-frequency components such as thosefrom plastic scintillators used as beam-line detectors.
The Xilinx radio frwaquency system-on-chip (RFSoC)
has been commercially available since 2018. It is a device designed for 5 G communication and integrates anFADC (up to 5 GHz) and ﬁeld-programmable gate array (FPGA) on one chip. This RFSoC has the potential
to perform real-time digital signal processing for highintensity RI-beam experiments.
In this study, we used the Xilinx ZCU111 evaluationkit2) (Fig. 1). This kit has 8 channels of ADC inputs,
8 channels of DAC outputs, and 20 channels of general-0− 500− 1000− 1500− 2000

050

100

150200250300350

400450500Time[ns]Fig. 3. An example of an acquired plastic scintillator waveform.

purpose I/O ports. The speciﬁcations of the ADC input
are as follows: 100 Ω diﬀerential impedance, AC coupling, and 1 Vppd voltage range. The maximum sampling frequency of the ADC is 4.096 GHz, and the resolution is 12 bits.
As it is not possible to impliment external triggers
with sample FPGA ﬁrmware provided by Xilinx, weadded external trigger function. The block diagram isshown in Fig. 2. When data acquisition is started, asoftware trigger is enabled. At this time, when an external trigger is issued, digitized data are stored in memory.
Finally, data are retrieved by a PC via the network. An
example of an acquired plastic scintillator waveform isshown in Fig. 3.
We added an external trigger function to the RFSoC
device and conﬁrmed that it works successfully. Basicstudies such as the measurement of the timing resolution
are in progress.
Fig. 1. Xilinx ZCU111 evaluation kit used for development.
∗1
∗2
∗3

Department of Physics, Rikkyo University
RIKEN Nishina Center
Department of Physics, Kyoto University

References

1) J. -P. Martin et al., IEEE Trans. Nucl. Sci. 55, 84 (2008).
2) Xilinx, Zynq UltraScale+ RFSoC ZCU111 Evaluation
Kit, https://japan.xilinx.com/products/boards-and-kits/
zcu111.html .

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