N04·5

2008 IEEE Nuclear Science Symposium Conference Record

Radiation Resistance of SOl Pixel Devices
Fabricated with OKI O.151lID FD-SOI Technology
K. Hara, M. Kochiyama, A. Mochizuki, T. Sega, Y. Arai, K. Fukuda, H. Hayashi, M. Hirose, J. Ida, H. Ikeda, Y.
Ikegami, Y. Ikemoto, H. Ishino, Y. Kawai, T. Kohriki, H. Komatsubara, H. Miyake, T. Miyoshi, M. Ohno, M.
Okihara, S. Terada, T. Tsuboyama and Y. Unno
Abstract-Silicon-on-insulator (SOl) technology is being
investigated for monolithic pixel device fabrication. The SOlwafers by UNIBOND allow the silicon resistivity to be optimized
separately for the electronics and detector parts. We havefabricated pixel detectors using fully depleted SOl (FD-SOI)
technology provided by OKI Semiconductor Co. Ltd. The firstpixel devices consisting of 32x32 pixels each with 20 pm square
were irradiated with 6OCO .,'s up to 0.60 MGy and with 70-MeV
protons up to 1.3x1016 I-MeV neq,.cm 2• The performance
characterization was made on the electronics part and as a
general detector from the response to RESET signals and to laser.
The electronics operation was affected by radiation-induced
charge accumulation in the oxide layers. Detailed evaluation
using transistor test structures was separately carried out withcovering a wider range of radiation level (0.12 kGy to 5.1 MGy)with 6OCO .,'s.
I. INTRODUCTIONM

ONOLITHIC pixel devices are an ultimate dream forphysicists who require devices with large number ofreadout channels with fine segmentation though at small cost.
In fact, in recent experiments, pixel-type particle detectors are
required to be finely segmented and highly integrated to copewith high density particle flux generated in the luminous
particle collisions. The pixel devices, such as for the LHC
experiments, are based on bump bonding of the detector
elements to their readout electronics. This procedure isbecoming delicate and costly with increasing number ofchannels. The device thickness remains also an issue in viewof material budget. Pixel devices utilizing UNIBOND™ [1]silicon-on-insulator (SOl) wafers can potentially solve suchdifficulties. Most important is that the silicon resistivity canbe optimized separately for the readout electronics and SOl"handle wafer" which we adopt as the sensitive part. Weare

Manuscript received November 14, 2008. This work was supported by the
KEK Detector Technology Development project.
K. Hara (e-mail: hara@)tep.px.tsukuba.ac.jp). M. Kochiyama, A.
Mochizuki, T. Sega and H. Miyake are with the Institute of Pure and Applied
Sciences, University of Tsukuba, Tsukuba, Ibaraki 305-8571, Japan.
Y. Arai, K. Ikegami, Y. Ikemoto, T. Kohriki, T. Miyoshi, S. Terada, T.
Tsuboyama and Y. Unno are with the lPNS, High Energy Accelerator
Research Organization, KEK, Tsukuba, Ibaraki 305-0801, Japan.
K. Fukuda, H. Hayashi, 1. Ida, Y. Kawai, H. Komatsubara, M. Ohno and M.
Okihara are with OKI Semiconductor Co. Ltd.
M. Hirose is with Osaka University, Graduate School of Science,
Toyonaka, Osaka 560-0043, Japan.
H. Ikeda is with the ISAS, Japan Aerospace Exploration Agency,
Kanagawa 229-8510, Japan.
H. Ishino is with the Department of Physics, Tokyo Institute of Technology,
Tokyo 152-8551, Japan.

978·1-4244·2715-4/08/$25.00 ©2008 IEEE

developing pixel devices [2] using 0.15-0.20 flm fully
depleted SOl (FD-SOI) CMOS process provided by OKI
Semiconductor Co. Ltd. The first monolithic pixel device,named TOPPIX [2], was fabricated in 2006, composed of
32x32 pixels each with 20 flm square.
Since the SOl silicon layer is substantially thin relative tobulk CMOS and fully covered by oxide, the device is lesssensitive to ion strikes providing immunity to latch-up. On theother hand, the charge build-up in the buried oxide (BOX)layer and at the BOX interface is a significant issue for the
total ionization dose (TID) effects in SOl devices [3]. The
TID effects should present as threshold voltage shifts andincrease in the leakage current. We have irradiated TOPPIX
devices with 60Co y' sand 70 MeV protons. TrTEG chips [3]consisting of an array of PMOS and NMOS transistors withvarious L/W ratios were also irradiated to evaluate the TID
effects in the basic transistor characteristics.
II. TOPPIX AND TRTEG
Three types of transistors are available in the OKI 0.15 flm
FD-SOI process: low threshold voltage transistors (LVT) andhigh threshold voltage transistors (HVT) for core circuits bothwith a 2.5 nm thick gate oxide layer, and I/O transistors (10)with a 5.0 nm thick gate oxide layer. The SOl wafers are 150
mm in diameter and 650 flm in thickness. The wafer iscomposed of 40 nm thick p-type SOl silicon of 18 ncm and ntype substrate of 700 ncm, separated by a 200 nm thick BOX
layer. After the topside process is completed, the backside of
the wafer was ground down mechanically to 350 flm thickness,and then plated with 200 nm of aluminum. The backside canbe used for back gate biasing. There are two types of bodycontrol transistors, body floating and body tied. In the bodytied configuration, the body is connected at regular intervals
with the source externally in the metal layer; there are fivemetal and one poly-silicon layers available on top of the SOltransistors.
The TOPPIX chip is 2.4 rom square in size. The analog
readout chain on each pixel consists of eight HVT body-tied
FETs, one functioning as input protection diode, as shown in
Fig. 1. The reset voltage VRST is provided externally, thus the
response to varied VRST can test the individual pixel readout
chain. "VRST response" refers to this test in this paper. Resetswitching signal (rst), row/column selections, and othercommands are provided by 10 transistors located surrounding
the pixels at center. The selected analog output is recorded by

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a digital oscilloscope. The entire electronics part is surroundedby bias (at ground) and guard (floating) rings. At the edge
region, an Nsub ring (HV ring) is located allowing to bias fromthe topside to the n substrate.
TOPPIX
32x32 pixels
pixel:20x20 J.1m
back: aluminizeddimension:
2.4 x 2.4 mm (area)
0.35 mm (thickness)

HV ring

bias ring (GND) I/O

Vdd

rea::U<---1----~l I

The irradiation with 60Co y's was performed at Takasaki
Institute of Japan Atomic Energy Agency. Three TOPPIX
chips were irradiated to 0.12 kGy to 0.60 MGy at 1-5 kGy/h.
providing data at six dose values (dosage was added after
characterization measurements were made). Fifteen TrTEG
chips were irradiated each to 0.01 kGy to 5.1 MGy at 0.2-20
kGy/h. Alanine rod dosimeters AminograyTM, available from
Hitachi Cable, Ltd., were attached to several samples to
examine the dose calibration. The absorbed dose is derived
from the yield of radiation induced stable radicals in alanine,
which is measured using ESR spectroscopy. The measured
values agreed with the doses provided by the facility to 10%:
there was a massive sample of other user next to our samples.
We assign an uncertainty of 10% to the dose. In the exposure,the samples were kept at room temperature with theirterminals shorted using conductive sponge.
In comparing the TID for 70-MeV protons with 60Co y's,
the absorbed dose to Si0 2 is 8.4 MGy (Si02) for the proton
fluence corresponding to I x10 16 I-MeV neq/cm2.
IV. TOPPIX y-IRRADIATIONRESULTS+Vdet

Fig. 1. Schematics of the TOPPIX chip and areadout chain on one pixel.
The TrTEG chip consists of 16 NMOS and 16 PMOS
transistors. With fixing the W/L ratio to 2000, we chose two
to four length combinations for each transistor type and bodycontrol. The selected 16 parameters are listed in Table I. The
shortest gate length for LVT and HVT transistors is 0.14 ~lm,and that for 10 is 0.3 ~.

The primary goal of TOPPIX irradiation is to examine thefunctionality of the electronics part and as a particle detector.
The VRST response, I-V characteristics, and response to laser
were measured for this purpose. While the laser test was madeafter completion of irradiation, the other two were measured
between irradiations. The irradiated chips were placed at 60°C
for 20 min before starting the evaluation to promote quick
recovery (annealing) from the extra damage caused byirradiation at accelerated rate. The annealing time wasshortened from the recommended duration, 80 min at 60°C,
since the majority of the annealing should complete in 20 min.
At some dose points, we obtained the data right after theirradiation was completed and evaluated the effect of
annealing.

TABLE I

A. 1- V characteristics

16 TRTEG TRANSISTORS SHOWING TYPES, TYPICAL THRESHOLD VOLTAGES,WfL SIZES (IN MICRONS) AND BODY CONTROLS, (F) FLOATING OR (BI) BODY
TIE.

W/L

280/0.14400/0.20600/0.30

1000/0.50

LVT (0.2V)

F, BT

BT

F, BT

BT

HVT (0.4V)
10 (0.5V)

F, BT

BT

F, BT
F, BT

BT
F, BT

Ill. IRRADIATION
The proton irradiation was carried out at Cyclotron andRadioisotope Center (CYRIC), Tohoku University. Details ofirradiation and fluence calibration are described elsewhere [3].
The fluence target was taken from the radiation level at thesuper LHC [4], where 10 16 I-MeV neqlcm2 is the expectation
at the pixel detector. Two TOPPIX chips were irradiated to
1.4xl0 15 and 1.3xl0 16 I-MeV ncqlcm2 .

Fig. 2 shows the I-V characteristics of one of the TOPPIX
chips irradiated up to 0.60 MGy. The leakage current refers to
the total detector current when the reverse bias was applied tothe detector back with the bias ring grounded, measured atroom temperature. Plotted are the data taken after 1.1, 66, and596 kGy, and before irradiation. For the two dose points, I-V
curves measured immediately after the irradiation are alsoplotted. The leakage current at biases below 50 V tends todecrease with radiation. This can be explained by the PMOS
transistor threshold shift, described later, suggesting theleakage current through the pixels only should decrease withthe dose.
The breakdown voltages, defined as the bias where theleakage exceeds I ~, are summarized in Fig, 3 for all thethree chips. The annealing contribution is moderate as thebreakdown voltage is shifted by approximately 5 V only.
Although the individual difference may be large, thebreakdown voltage tends to decrease with the dose. This can1370

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be seen also in Fig. 2 where the slope of the curves becomessteeper with radiation.
Abrupt leakage current increases are often caused byavalanche multiplication due to local high electric field. We
can localize such points, "hot spots", by detecting associatedinfrared lights with a cooled infrared sensitive CCD camera.
We identified that the breakdown is located at the comers of
the bias ring both for pre and post irradiated samples. Since
the bias ring is p-implanted (P SUB ) against the n-bulk, the field
is largest especially around the comers. The ions trapped in
the BOX generate additional field lines to the PSUB implantand hence lower the breakdown voltage.

!: 10-4i~ 10-5

3 10-6

oM:

10.7
10"

20

30

40

50

60

70

80

90

100

Vbias M

Fig. 2. Leakage current of TOPPIX chip3 as a flUlction of the detector
bias. The data right after the irradiation are shown in dashed curves.
120 , . . . . - - . . . . , . . . - - - - - - - - - - . . . . . ,
Q)

fl

~
>

80

~

60

~

1

o

100

chip 1
Achip2.chip3

f_

100

1000

o

40
20

pre-irrad

0110§ 0.6 a) non-Irradiationb) 596kGy

:::s

:i

Vbi8s

..... ov

0.5... 3V- 6V- 9V···12V

0.2

0.4

0.6

0.8

1.00

Vrst [V]Fig. 4. TOPPIX output voltage averaged over 1024 channels as a functionof VRST for (a) before and (b) after 0.60 MGy irradiation. The curves areshown for selected bias settings up to 12 V.

Histograming the slopes provides a clear separation of sickchannels against genuine ones. For chip 3 in Fig. 4, thenumber identified as dead is 16 pixels both before and after
irradiation with their location unchanged. We conclude that nodead channel is created up to 0.6 MGy we tested. Note that thefraction of dead pixels has been significantly reduced to a
0.1 % level in the 2007 fabrication.

o10

where the first second values in parentheses are the two
reference VRST values to calculate the slope

Dose [kGYl

Fig. 3. Breakdown voltages of TOPPIX chips as a function of dose. The
marks correspond to the chip number 1 to 3. The two same marks at the same
dose points are the data before and after annealmg with the arrows showing
the chorological order.

C. Laser response

The TOPPIX chips have a window on each pixel to allow
testing the functionality as a photon detector. We injected
continuous 670 nm laser over the entire device face. The
output voltage differences between laser on and off were
histogrammed to judge abnonnal channels. The histogram
shown in Fig. 5 is TOPPIX laser response after 0.60 MGy
with a bias of 1 V. The 16 abnonnal channels found in the
VRST response measurement are clustered in the low responsegroup. Additionally one channel is found dead near the arrow.
This channel is leaky giving a large OFF signal and could notdetected in the V RST response measurement. We conclude thatno defect channels are created by irradiation.
en

-=
ii:

596 kGy

100

....0

B. VRST response
The VRST response was measured for a VRsTrange from 0 to
1 V at a 0.1 V step, with changing the bias up to 20 V at a stepof 1 V. The electronics working range is influenced by biasing
since the bias voltage couples to the electronics via BOX layer,
known as a back-gate effect.
Fig. 4 shows the VRST response of chip 3 before and after
0.60 MGy irradiation. The output voltage should increaselinearly with V RST in optimum region. Although modified byirradiation, there remain conditions where the electronics isfunctioning properly. The tendency is that the working regionis shifted to lower biases with irradiation. This is explained bythreshold voltage shifts, as discussed later. To numerate thefunctionality of individual pixel channels, we chose the rangesof V RST (0.4:0.7 V, 9V bias) and (0.3:0.6 V, OV bias) for thedata before and after 0.60 MGy irradiation, respectively,

0

Z

10

0.04

0.08

0.12

0.16

0.2

Aout[ON]-Aout[OFF) M

Fig. 5. Histogram of response differences with laser on and off for TOPPIX
irradiated to 0.6 MGy.

V. TOPPIX PROTON IRRADIAnON RESULTS
Two TOPPIX chips were irradiated with protons up to
1.3xl0 16 I-MeV neqlcm2 to investigate the radiation effects to1371

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the substrate. The electronics damage that is caused by 70MeV protons and by 60Co y's is also to be compared.

wafers after a few x 10 13 /cm2 [6] is established. The present
observation is not inconsistent with [5].

A. 1-V characteristics
Fig. 6 plots the I-V curves for the two TOPPIX samples.
The curves obtained at pre-irradiation are identicalirrespective whether the bias is provided through the HV ringin front or from the backside. However, the I-V curves ofproton irradiated samples tum different as plotted in the figure.
The I-V characteristics is moderated if biased from the HVring. This is explained by the radiation induced bulk damages
that effectively increase the silicon ohmic resistance. The
backside potential is dropped accordingly by the voltage drop
through. The drop is larger with increasing the leakage current.

Fig. 7. Hot spots observed on the sample irradiated to lAx 1015 neqlcm 2
measured at (left) Vdet=210 V and (right) Vdet=150 V. The spots with circle
are confirmed to be noise.

~ 100

i 80
~

60

B. VRsr response~ '----~.....;",;;,,~

40

20
50

100

150

200 0

Vbias [V]

50

100

150

200
Vbias [V]Fig. 6. I-V curves of TOPPIX samples irradiated to protons of (left) 1.4
xlO IS Ileqlcm2 and (right) 1.3xlO I6 Ileqlcm2, overplayed with pre-irradiation
curve. The data are shown when biased through the HV ring (Vdet) and fromthe backside (Vback). The curves biased from both and Vback only areoverlapped each other.

We observed that pre-irradiation samples exhibit hot spots
always at the comers of the bias ring, as described previously.
For the irradiated samples, the hot locations are characteristic
depending on the characteristics of the I-V curves. On thesteepest I-Vdet curves (at 210 V and 170 V for 1.4 xl0 15 and1.3x 10 16 neqlcm2 samples, respectively), hot spots areobserved around the HV ring (see Fig. 7 left). On the second
steepest I-Vdet curves or on the steeper I-Vback curves, hotspots are seen at the comers of bias ring, similar to nonirradiated samples, but only for the 1.4 xl 0 15 ncqlcm2 sample(see Fig. 7 right). This supports that the n-bulk is not inverted
up to this fluence, which is also confirmed from the laser
response described below.
The 1.3xl0 16 neqlcm2 sample had an early leakage current
increase for bias between 40 and 150 V since pre-irradiation.
The hot spots could not be identified with the CCO camera,probably because infrared emission is not strong enough forsuch a slow increase. Judging from the forward bias I-V
behavior in the negative voltage side, the bulk of this sample
seems to stay un-inverted. Conclusive result could not bederived from the laser response, since this device did not
respond properly to laser as explained by that the electronics
was radiation damaged.
It is reported [5] that n-type MCZ wafers, which we use forthe detector, will not invert up to proton fluence of3.4x10 15 1MeV n/cm2 they tested. The type inversion of n-type FZ

As observed in the y irradiation, the VRST response isaffected also by proton irradiation. Figure 8 shows the VRST
response for selected bias values. The electronics working
region became narrow at 1.4x 1015 neqlcm2, and disappeared at
1.3xl 016 neqlcm2. The reset is not properly transferred. This ismost probably caused by damage in the 10 transistors, sincethe 10 transistor threshold shift is substantial (see Sec. V).
060-

ilpre-,rr~dl

055 i

5050

Q

r

040

0.0

04

06

Vrst {v]~---.--.. - ... - - . - ~
040

00

04

06
Vrst {V]

-c-

t

030

0.0

0.4

0.6

Vrst{vj

0.8

Fig. 8. V RST response for the pre- and two proton irradiated samples. The
curves are shown for selected Vback values.

C. Laser response.
The TOPPIX chip irradiated to 1.4x lOiS ncqlcm2 is
examined for the laser response since we observed that theelectronics is working. Figure 9 shows the response of threeconsecutive pixel signals to laser ON and OFF. The readout
channels are switched every 64 Ils. The signal shape ischaracteristic showing the output corresponding to the reset
voltage, followed by accumulation of charge. The irradiatedsample exhibits substantial contributions from the leakage, but
the response to laser is obviously seen. A mask pattern wasproperly reproduced. The measurement was made at room
temperature.

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The dead channels were evaluated by laser injection while
the chip was cooled to 11°C to reduce the noise contribution.
There was no new dead channel created from the proton
irradiation.
~ 0.6

are-irradiation

I-

:::>

~

0.5

0.6 ~b.l-:.1,-,-.4"-x-:.1.:..rJ_5~/c,,,-,-~.:...-----.

~/..-ft :-f!~ :

..

•

.

lIE

~

20

lIE

IeONl

•

~

40

Fig. 9. Response to laser ON (red) and OFF (blue) for (a) pre-irradiationand (b) after 1.4x 10 15 I-MeV ~q/cm2, with bias at 2 V.

created at the oxide-silicon interface. The charge state ofinterface traps is negative at the p-type silicon to oxideinterface (NMOS) and positive at n-type (PMOS). The
contributions from the BOX layer need to be considered inaddition for the SOl devices, especially for FD-SOI, where thelarger coupling should make the transistors much sensitive tothe BOX charge trapping [8]. The hole trapping and interface
charge creation should also be affected by manufacturing
processing techniques and wafer quality.
Figure 11 shows the radiation induced shifts of thethreshold voltage VT, VT defined as VGS where 10 =0.5 mAo
The data are for the transistors with the shortest gate lengths
and body-floating. Since the holes are the main contributor,
the shifts are negative for both PMOS and NMOS. The dataobtained from the proton irradiation are compared. The bothsets of data are in reasonable agreement. The shifts aredifferent among LVT, HVT and 10, resulting larger shifts for
10 transistors with thicker gate oxide. The positive charges in
the gate oxide are considered to act as the primary contributor
for the threshold shifts.

VI. TRTEG RESULTS~

Radiation effects in transistor characteristics were evaluatedindependently in the TrTEG chips by measuring the draincurrent as a function of the gate-source voltage VGS. The
drain-source voltage Vos was fixed at 0.5 V and -0.5 V for
NMOS and PMOS transistors, respectively. The results
obtained from proton irradiation are already reported in [3].

~ 10,3OJ

C"l~ 10-6OJ....J• lVT INMosl
• HVT
.10
~........ ---

~

10

2
10

3

10

Dose [kGy]

10'2

10'1

1

10

2
10

3

10

4

10

Dose [kGy]Fig. 10. Leakage current TD defined at Vos =0 as a function of dose, shownfor three transistor types with the shortest gate lengths. The uncertainty
dominates the measured values below 10- 11 A.

~"'-~~~4).-.~ 1'-~

~

-0.2

~

-0.3

A. Leakage Current
Figure 10 shows the leakage current defined as 10 at VGS =0
for the transistors with shortest gate lengths (see Table I). As
the threshold voltage shifts negatively to compensate thepositive charges trapped in the gate oxide, the leakage current
increases with dose for NMOS. The effect is opposite for
PMOS resulting that the dose dependence is small.

0... -0.1'I-1IU~~
CJ-"t;;f-,~

-0.1
-0.2

~

\

-0.3

-0.4

-0.4

-0.5

-0.5

-0.6

10.2 10"1

10102 103 104

~

• lVT
• HVT
610
OlVTJI[I HVTJI
AIOJI

\

\

\

~

-0.6 ~.u.wL...-'.--'-'-UWl......L-Lllwu......L.LLLIUIL...L.LU..ULIlL....L.LLLWII

10.2 10"1

103

1cf 10

104

Dose [kGy]Fig. 11. Dose dependence of the threshold voltage shift for NMOS andPMOS transistors. The transistors are with the smallest gate length and body
floating (see Table I). Open marks are the data obtained from proton
irradiation.

For bulk CMOS, the absolute voltage shift for NMOS
becomes smaller with dose, since the contribution of thenegative interface traps increases with dose to cancel the
positive charges in the oxide. The present data, especially forthe larger threshold HVT and 10, show an opposite tendency.
The difference should be attributed to the charge creation at
the BOX interface. This contribution should be larger in FDSOl and numerical evaluation to breakdown the contribution
is underway.
The body tie effects are expected to be not substantial in
FD-SOI. The measured shifts are typically larger in magnitude
by 10mV for body tied samples than body floating. The
difference is smaller at lower doses.
C. Gate length dependence

B. Threshold voltage shift
The radiation induced threshold voltage shift is well studied[7] for bulk CMOS devices. The shift is explained byinterplay of holes trapped in the gate oxide and the charges

The threshold shifts are plotted in Fig. 11 as a function ofgate length. The graphs are given for two dose values, 0.54
and 5.1 MGy. We recognize a small short-gate length effect.

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~0-;- ..0.1';;.--b-----bt----------""lJ..

;~... ~~ ..,-~ ... ~~ ...... ~~ ....

..0.2

-

..0.3
NMOS LVTNMOS HVTNMOS 10PMOS LVT:c PMOS HVTPMOS 10

..0.4
..0.5

---....

..0.1
l3"_-~_----I;I----------""t..J

..0.2

----

-0.3
-04

(b)51 MGy

-0.5(a) 0.54 MGy"O.6'---'----'--'...L.L.L~~L.L.L.L...L.L.L.l....L'-LL.L.1....L..l._L..J

o

0.1

0.2

0.3

0.4

0.5

0.1

0.2

0.3

U

0.5

0.6

Lb-mJ

Fig. 11. Voltage shifts as a function of gate length L, compared at (a) 0.54
and (b) 5.1 MGy. W/L=2000. PMOS 10 has no data at 5.1 MGy, since thevoltage compliance is exceeded.

D. Back Gate Compensation

Substantial threshold voltage shifts are inherent. In SOl
devices, the voltage applied to the back side Vback affects the
top gate transistor operation and may provide a possibility torecover the transistor performance. In fact, the irradiated IdsVgs characteristics is substantially different from the preirradiation at Vback = 0 but becomes almost identical if anappropriate Vback is applied. Figure 12 shows the optimum
Vback as a function of the dose when the threshold of theirradiated transistor is compensated back to the pre-irradiation
value. The data shown are for the transistors with the shortest
gate lengths and body floating.

C)

The pixel irradiated to 1.4xl0 15 I-MeV neqlcm2 responded
to laser light, although the electronics operation region ismodified by irradiation. This result indicates that the n-bulk
adopted in our SOl wafers is not inverted up to this fluence.
Another sample irradiated to 1.3xl0 16 I-MeV neqlcm2 did nottransfer the reset signal, which is explained by a radiationinduced large threshold shift in the 10 transistors.
Detailed characterization was performed of the transistors
with different threshold types and W/L ratios. The primaryeffect appears in the threshold voltage shift. The low thresholdtype transistors are suitable in view of radiation resistance,
showing smallest deviations among NMOS and PMOS
threshold shifts. Such shifts may be compensated by applying
appropriate negative voltage to the backside.
The fabricated pixel devices utilized n-type silicon for thesensitive part and require positive voltages to the back todeplete. We have started investigating p-type silicon so thatnegative voltage to back compensates the threshold shifts. The
optimum compensation voltages to the back are at most about
50 V for the dose range exceeding I MGy. Such a voltage
should be applicable to the back, as the present devices cansustain up to 70 V even after irradiation.
ACKNOWLEDGMENTS

We acknowledge Dr. R. Yamagata of JAEA Takasaki for
performing 60Co irradiation. Professors T. Shinozuka and T.
Wakui, and the team of CYRIC are also acknowledged formany helps and conducting excellent proton irradiation.

':f -10REFERENCES
-20

[1]
[2]

-30

-50

10

1cr

103

1cf

Dose [kGy)Fig. 12. Optimum Vback voltages for the transistors with shortest gate
lengths to compensate the threshold voltage shifts.

The optimum backside voltages show a spread among
different transistor types, and between NMOS and PMOS.
However the LVT transistors show a smallest difference,
which are preferred for the analog part of the circuit.

VII.

[3]

[4]

[5]

[6]

SUMMARY

We have evaluated radiation resistance of monolithic pixel
devices fabricated with OKI 0.15-l.lm FD-SOI process. The
pixel devices and arrays of individual transistors were
irradiated with 70-MeV protons and 60Co y's to understand theeffects and mechanism of radiation damage.

[7]
[8]

http://www.soitec.com/en/products!
Y. Arai, et aI., "Monolithic pixel detector in a 0.15 J.lIIl FD-SOI
technology", 2007 IEEE Nucl. Sci. Symposium, Conference Record
N20-2 (IEEE Nuclear Science Symposium, MedicaIlmaging Conference
Honolulu, Hawaii, USA, Oct. 2007)~ Y. Arai, et aI., "Monolithic pixel
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