Raritan PX2/PX3 Modbus Interface

ContentsIntroduction
Supported Modbus Functions . . . . . . . . . . . . . . . . . . . . . . .
Feature Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

222

Register Layout
Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Holding Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . .
Coil Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Basic PDU Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peripheral Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transfer Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inlets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overcurrent Protectors . . . . . . . . . . . . . . . . . . . . . . . . . . .
Outlets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Poles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

33
3
446
915
1920
231

Introduction
The PX2 device can act as a Modbus/TCP server. The Modbus service can be
enabled in the Network Services section of the Device Settings menu in the web
UI.

Supported Modbus Functions
The following Modbus function codes are supported:• General Commands:– Read Device Identification (0x2b)• Bit Access:– Read Coils (0x01)– Write Coils (0x05)– Write Multiple Coils (0x0f)• 16-bit Word Access:– Read Holding Registers (0x03)– Write Single Register (0x06)– Write Multiple Registers (0x10)– Mask Write Register (0x16)

Feature Set
The following features of the PX2/PX3 are available via Modbus:• Sensor readings for inlets and overcurrent protectors• Outlet sensor readings (PX2-4K, PX2-5K, PX3-4K and PX3-5K series)• Outlet control (PX2-2K, PX2-5K, PX3-2K, and PX3-5K series)• Transfer switch status and control (PX3TS series)• Peripheral sensor readings• Peripheral actuator control2

Register Layout
Conventions• All register or coil addresses are hexadecimal, indicated by a 0x prefix.
• Data types which span multiple 16-bit registers are big-endian, i.e. thelowest register address contains the most significant bits.
• The following data types are supported for holding registers:– Word: 16-bit unsigned integer– DWord: 32-bit unsigned integer (two registers, big-endian)– QWord: 64-bit unsigned integer (four registers, big-endian)– Float: IEEE 32-bit floating point value (two registers, big-endian)– Bit Mask: 16 individual bits
• The access flags column can have the following values:– R: Read-only register– W: Write-only register (writing triggers an action, always reads 0)– R/W: Read-write register• Reading a reserved register usually yields zero, but the meaning maychange in future versions.
• Reserved bits in bit mask registers should always be written as 0.

Holding Register Map
StartEndFunction

See Section

0x00000x0010

Basic parameters, PDU
layoutBasic PDU Parameters0x080f0x081f

Peripheral sensor 1
Peripheral sensor 2

Peripheral Sensors

0x09ff

Peripheral sensor
320x20ff
0x21ffTransfer switch 1
Transfer switch 2

0x2fff0x303f0x306f0x309f0x30cf
0x30ff
0x31ffTransfer switch 16
Inlet 1
Inlet 1 pole 1
Inlet 1 pole 2
Inlet 1 pole 3
Inlet 1 pole 4
Inlet 2 (incl. poles)...
0x08000x0810...
0x09f0...
0x20000x2100...
0x2f000x30000x30400x30700x30a00x30d00x31003

Transfer Switches

InletsPoles

StartEnd

Function

See Section...
0x3f000x3fff0x40000x40400x40700x40a00x40d00x41000x403f0x406f0x409f0x40cf
0x40ff
0x41ff

Inlet 16 (incl.
poles)
Overcurrent protector 1
OCP 1 pole 1
OCP 1 pole 2
OCP 1 pole 3
OCP 1 pole 4
OCP 2 (incl.
poles)...
0x7f00

0x7fff0x80000x80400x80700x80a00x80d00x81000x80ff0x806f0x809f0x80cf
0x80ff
0x81ff...
0xff000xffff

OCP 64 (incl.
poles)
Outlet 1
Outlet 1 pole 1
Outlet 1 pole 2
Outlet 1 pole 3
Outlet 1 pole 4
Outlet 2 (incl.
poles)

Overcurrent Protectors
Poles

Outlets
Poles

Outlet 128 (incl.
poles)

Coil Map
Coil Address

AccessFunction

0x00000x0001...
0x003f...
0x01000x0101...
0x017f

RR

Overcurrent protector 1 status
Overcurrent protector 2 status

R

Overcurrent protector 64 status

R/W
R/W

Outlet 1 state
Outlet 2 state

R/W

Outlet 128 state

Basic PDU Parameters

4Address

TypeAccessParameter

0x00000x00010x00020x00030x0004Word
WordWord
WordWordRRRRRRegister set version (8 bit major, 8 bit minor)
Number of inlets
Number of overcurrent protectors
Number of outlets
Number of transfer switches5Peripheral Sensors• Up to 32 sensors, 16 holding registers each
• Base address (i = 0..31): 0x0800 + i * 0x0010

6

Offset

TypeAccess

Parameter

0x00

WordR

Sensor type:• 0:
unassigned• 1:
Temperature
in degrees
Celsius• 2: Relative
humidity in%• 3: Air flow inm/s• 4: Airpressure inPa
• 5: Contact
closure (0:off, 1: on)• 6: Vibrationin G• 7: Water
leak (0:normal, 1:alarm)• 8: Smoke
detector (0:normal, 1:alarm)• 9: Ambient
light in lux• 10: Dry
contact(actuator, 0:off, 1: on)• 11: Magnetic
contact (0:off, 1: on)• 12: Passive
IR motion
detector (0:off, 1: on)• 13: Tamper
detector (0:normal, 1:alarm)• 14: Powered
dry contact(actuator, 0:off, 1: on)• 15: Absolute
humidity ing/mˆ3• 16:Acceleration

7

OffsetTypeAccess

Parameter

0x01
0x02~0x03

WordFloatRR

0x04
0x05~0x0f

WordR/W

State (for discrete sensors)
Sensor reading (for numerical sensors, seeabove for unit)
Actuator control
Reserved8

Transfer Switches• Up to 16 transfer switches, 256 holding registers each
• Base address (i = 0..15): 0x2000 + i * 0x0100
Offset

TypeAccess

Parameter0x00

Bit Mask

R

Transfer switch
capabilities(supportedsensors):• Bit 0: Inlet
voltage phasedifference
sensor• Bits 1~15:
Reserved0x01

WordR

Selected inlet:• 0: No activeinlet• 1: Inlet 1• 2: Inlet 20x02

WordR

Preferred inlet:• 1: Inlet 1• 2: Inlet 20x03

WordW

Transfer to inlet.
If the new inlet isavailable, it will
become both active
and preferred.
• Bits 0~30:
New active
inlet (1 or 2)• Bit 31: Forceswitch even
if the phasedifference
between theinlets is toolarge

9OffsetType

AccessParameter

0x04

Bit Mask

RFault flags:• Bit 0: Inlet
phases out ofsync• Bit 1:
Overloadalarm• Bits 2~15:
Reserved0x05

Bit Mask

RInlet 1 fault flags:• Bit 0: +12 Vpower supply
fault• Bit 1: Fuseblown• Bit 2: MOV
surge
protectorfault• Bit 3: Switch
open• Bit 4: Switch
short• Bits 5~15:
Reserved0x06

BitMask

R

Inlet 2 fault flags (see above)

Float

R

Reserved
Inlet voltage phase difference in degrees
Reserved

0x07
0x08~0x09
0x0a~0x1f

10

OffsetType

AccessParameter

0x20

Bit Mask

R/W

Transfer settings:• Bit 0:
Enableautomatic
retransfer• Bit 1:
Suppress
automatic
retransfer onphase syncalarm• Bit 2:
Enablemanualtransfer front
panel button• Bits 3~15:
Reserved0x21
0x22

Word
Bit Mask

R/W
R/W

Automatic retransfer wait time in seconds
Inlet 1 enabled
voltage thresholds:• Bit 0: Lower
criticalthresholdenabled• Bit 1: Lower
warning
thresholdenabled• Bit 2: Upper
warning
thresholdenabled• Bit 3: Upper
criticalthresholdenabled• Bits 4~15:
Reserved0x23

Word

R/W

Inlet 1 lower critical voltage threshold (0.01V)11

OffsetType

AccessParameter

0x24

Word

R/W

0x25

Word

R/W

0x26

Word

R/W

0x27
0x28

Word
Word

R/W
R/W

0x29

Bit Mask

R/W

Inlet 1 lower warning voltage threshold (0.01V)
Inlet 1 upper warning voltage threshold (0.01V)
Inlet 1 upper critical voltage threshold (0.01V)
Inlet 1 voltage assertion timeout (seconds)
Inlet 1 voltage deassertion hysteresis (0.01V)
Inlet 1 enabledfrequency
thresholds:• Bit 0: Lower
criticalthresholdenabled• Bit 1: Lower
warning
thresholdenabled• Bit 2: Upper
warning
thresholdenabled• Bit 3: Upper
criticalthresholdenabled• Bits 4~15:
Reserved

0x2a

Word

R/W

0x2b

Word

R/W

0x2c

Word

R/W

0x2d

WordR/W

0x2e0x2f

Word
Word

R/W
R/W

12

Inlet 1 lower critical frequency threshold(0.01 Hz)
Inlet 1 lower warning frequency threshold(0.01 Hz)
Inlet 1 upper warning frequency threshold(0.01 Hz)
Inlet 1 upper critical frequency threshold(0.01 Hz)
Inlet 1 frequency assertion timeout (seconds)
Inlet 1 frequency deassertion hysteresis (0.01Hz)

OffsetType

AccessParameter

0x30

Bit Mask

R/W

Inlet 2 enabled
voltage thresholds:• Bit 0: Lower
criticalthresholdenabled• Bit 1: Lower
warningthresholdenabled• Bit 2: Upper
warningthresholdenabled• Bit 3: Upper
criticalthresholdenabled• Bits 4~15:
Reserved

0x31

Word

R/W

0x32

Word

R/W

0x33

Word

R/W

0x34

Word

R/W

0x35
0x36

Word
Word

R/W
R/W

Inlet 2 lower critical voltage threshold (0.01V)
Inlet 2 lower warning voltage threshold (0.01V)
Inlet 2 upper warning voltage threshold (0.01V)
Inlet 2 upper critical voltage threshold (0.01V)
Inlet 2 voltage assertion timeout (seconds)
Inlet 2 voltage deassertion hysteresis (0.01V)

13Offset

TypeAccess

Parameter

0x37

Bit MaskR/W

Inlet 2 enabledfrequency
thresholds:• Bit 0: Lower
criticalthresholdenabled• Bit 1: Lower
warningthresholdenabled• Bit 2: Upper
warning
thresholdenabled• Bit 3: Upper
criticalthresholdenabled• Bits 4~15:
Reserved

0x38

Word

R/W

0x39

Word

R/W

0x3a

Word

R/W

0x3b

Word

R/W

0x3c
0x3d

Word
Word

R/W
R/W

Inlet 2 lower critical frequency threshold(0.01 Hz)
Inlet 2 lower warning frequency threshold(0.01 Hz)
Inlet 2 upper warning frequency threshold(0.01 Hz)
Inlet 2 upper critical frequency threshold(0.01 Hz)
Inlet 2 frequency assertion timeout (seconds)
Inlet 2 frequency deassertion hysteresis (0.01Hz)
Reserved

0x3e~0xff

14Inlets• Up to 16 inlets, 256 holding registers each
• Base address (i = 0..15): 0x3000 + i * 0x0100

15

Offset

TypeAccess

Parameter

0x00

Bit Mask

R

Inlet capabilities(supportedsensors):• Bit 0: RMS
voltage• Bit 1: RMS
current• Bits 2~3:
Reserved• Bit 4:
Unbalanced
current• Bit 5: Activepower• Bit 6:
Apparentpower• Bit 7: Powerfactor• Bit 8: Activeenergycounter• Bit 9:Apparent
energycounter• Bit 10:Phase angle• Bit 11: Linefrequency• Bit 12:
Reactive
power• Bit 13:
Reactiveenergycounter• Bit 14:
Powerquality• Bit 15: Surge
protector
status16

OffsetType

AccessParameter

0x01

Bit Mask

R

Inlet capabilities(continued):• Bit 0:Residualcurrent• Bit 1:
Residual DC
current• Bits 2~15:
Reserved

0x02
0x03
0x04
0x05
0x06~0x07
0x08~0x09
0x0a~0x0b
0x0c~0x0f
0x10~0x11
0x12~0x13
0x14~0x15
0x16~0x17
0x18~0x1b
0x1c~0x1f
0x20~0x21

Word
Word
Word
Word

R
R
R
R

Float
Float

R
R

Float
Float
Float
Float
QWord
QWord
Float

R
R
R
R
R
R
R

0x22~0x23
0x24~0x25
0x26~0x29
0x2a

Float
Float
QWord
Word

R
R
R
R

Number of inlet poles
Minimum voltage rating in V
Maximum voltage rating in V
Current rating in A
Reserved
RMS voltage reading in V
RMS current reading in A
Reserved
Unbalanced current reading in %Active power reading in W
Apparent power reading in VA
Power factor reading (no unit)
Active energy counter in Wh
Apparent energy counter in VAh
Phase angle between voltage and current indegrees
Line frequency reading in Hz
Reactive power reading in var
Reactive energy counter in varh
Power quality:• 0: Unknown• 1: Normal• 2: Warning• 3: Critical

0x2b~0x2f
0x30

Word

R17

ReservedSurge protector
status:• 0: OK• 1: Alarm

Offset

TypeAccess

Parameter

0x31

WordR

Residual current
status:• 0: Unknown• 1: Normal• 2: Warning• 3: Critical• 4: Self-Test• 5: Failure

0x32~0x33
0x34~0x35
0x36~0x3f
0x40~0x6f

Float
Float

RR

Residual current reading in A
Residual DC current reading in A
Reserved
Pole 1 (see sectionPoles)
Pole 2
Pole 3
Pole 40x70~0x9f
0xa0~0xcf
0xd0~0xff

18

Overcurrent Protectors• Up to 64 overcurrent protectors, 256 holding registers each
• Base address (i = 0..63): 0x4000 + i * 0x0100• Trip status is represented by coils 0x0000 to 0x003f (0 = open, 1 = closed)
Offset

TypeAccess

Parameter0x00

Bit Mask

RCapabilities(supportedsensors):• Bit 0:Reserved• Bit 1: RMScurrent• Bit 2: Peakcurrent• Bits 3~14:Reserved• Bit 15: Trip
detection

WordR

WordRFloat
Float

RR

0x01
0x02
0x03~0x04
0x05
0x06~0x09
0x0a~0x0b
0x0c~0x0d
0x0e~0x3f
0x40~0x6f
0x70~0x9f
0xa0~0xcf
0xd0~0xff

19

Reserved
Number of overcurrent protector poles
Reserved
Current rating in A
Reserved
RMS current reading in A
Peak current reading in A
Reserved
Pole 1 (see sectionPoles)
Pole 2
Pole 3
Pole 4

Outlets• Up to 128 outlets, 256 holding registers each
• Base address (i = 0..127): 0x8000 + i * 0x0100• Outlet state (for switchable units) is controlled by coils 0x0100 to 0x017f(0 = off, 1 = on)

20

Offset

TypeAccess

Parameter

0x00

Bit Mask

R

Outlet capabilities(supportedsensors):• Bit 0: RMS
voltage• Bit 1: RMS
current• Bits 2~3:Reserved• Bit 4:
Unbalancedcurrent• Bit 5: Active
power• Bit 6:
Apparent
power• Bit 7: Powerfactor• Bit 8: Activeenergycounter• Bit 9:Apparent
energycounter• Bit 10:Phase angle• Bit 11: Linefrequency• Bit 12:
Reactivepower• Bit 13:
Reactiveenergy
counter• Bit 14:
Reserved• Bit 15:
Outletcontrol coil(switchable)

21

Offset
0x01
0x02
0x03
0x04
0x05
0x06~0x07
0x08~0x09
0x0a~0x0b
0x0c~0x0f
0x10~0x11
0x12~0x13
0x14~0x15
0x16~0x17
0x18~0x1b
0x1c~0x1f
0x20~0x21
0x22~0x23
0x24~0x25
0x26~0x29
0x2a~0x3f
0x40~0x6f

Type

Access

Word
Word
Word
Word

R
R
R
R

Float
Float

R
R

Float
Float
Float
Float
QWord
QWord
Float

RR
RRRR
R

Float
Float
QWord

RR
R

0x70~0x9f
0xa0~0xcf
0xd0~0xff

22Parameter
Reserved
Number of outlet poles
Minimum voltage rating in V
Maximum voltage rating in V
Current rating in A
Reserved
RMS voltage reading in V
RMS current reading in A
Reserved
Unbalanced current reading in %Active power reading in W
Apparent power reading in VA
Power factor reading (no unit)
Active energy counter in Wh
Apparent energy counter in VAh
Phase angle between voltage and current indegrees
Line frequency reading in Hz
Reactive power reading in var
Reactive energy counter in varh
Reserved
Pole 1 (see sectionPoles)
Pole 2
Pole 3
Pole 4

Poles• Embedded into the register space of inlets, overcurrent protectors andoutlets• The number of poles depends on the pole count register at offset 0x02
• Base addresses for inlet i pole blocks (i=0..15):– Pole count: 0x3002 + i * 0x0100– Pole 1: 0x3040 + i * 0x0100– Pole 2: 0x3070 + i * 0x0100– Pole 3: 0x30a0 + i * 0x0100– Pole 4: 0x30d0 + i * 0x0100• Base addresses for overcurrent protector i pole blocks (i=0..63):– Pole count: 0x4002 + i * 0x0100– Pole 1: 0x4040 + i * 0x0100– Pole 2: 0x4070 + i * 0x0100– Pole 3: 0x40a0 + i * 0x0100– Pole 4: 0x40d0 + i * 0x0100• Base addresses for outlet i pole blocks (i=0..127):– Pole count: 0x8002 + i * 0x0100– Pole 1: 0x8040 + i * 0x0100– Pole 2: 0x8070 + i * 0x0100– Pole 3: 0x80a0 + i * 0x0100– Pole 4: 0x80d0 + i * 0x0100

23OffsetType

AccessParameter

0x00

Bit Mask

R

Pole capabilities(supportedsensors):• Bit 0: RMS
voltage• Bit 1: RMS
current• Bits 2-4:
Reserved• Bit 5: Active
power• Bit 6:
Apparent
power• Bit 7: Powerfactor• Bit 8: Activeenergycounter• Bit 9:Apparent
energycounter• Bit 10:Phase angle• Bit 11: Linefrequency• Bit 12:
Reactive
power• Bit 13:
Reactiveenergycounter• Bit 14:
Residualcurrent• Bit 15:
Residual DC
current

0x01~0x07
0x08~0x09
0x0a~0x0b

Float
Float

RR24

Reserved
RMS voltage reading in V
RMS current reading in A

Offset

TypeAccess

0x0c~0x11
0x12~0x13
0x14~0x15
0x16~0x17
0x18~0x1b
0x1c~0x1f
0x20~0x21

Float
Float
Float
QWord
QWord
Float

R
R
R
R
R
R

0x22~0x23
0x24~0x25
0x26~0x29
0x2a

Float
Float
QWord
Word

R
R
R
R

0x2b~0x2c
0x2d~0x2e0x2f

Float
Float

R
R

25

Parameter
Reserved
Active power reading in W
Apparent power reading in VA
Power factor reading (no unit)
Active energy counter in Wh
Apparent energy counter in VAh
Phase angle between voltage and current indegrees
Line frequency reading in Hz
Reactive power reading in var
Reactive energy counter in varh
Residual current
status:• 0: Unknown• 1: Normal• 2: Warning• 3: Critical• 4: Self-Test• 5: Failure
Residual current reading in A
Residual DC current reading in AReserved