Commercial C650 CompactFlash

401-0615-00 Rev. B

Commercial CompactFlash

C650 Series

Engineering Specification
Document Number 401-0615-00
Revision: B

No part of this document may be reproduced, copied, recorded, stored in a retrieval system, or transmitted in any
form without the written permission of Delkin Devices. This document is for informational use only and is subject tochange without prior notice. Delkin Devices assumes no responsibility for any errors that may appear in thisdocument.
©2024 Delkin Devices, Inc.

1

Commercial C650 CompactFlash

401-0615-00 Rev. B

Table of Contents
1.0
1. 1
1.2
1.3

2.0

Product Overview............................................................................................................4
Part Numbers ................................................................................................................................................... 6
Mechanical Specifications ............................................................................................................................... 6
Dimensions ...................................................................................................................................................... 6

Product Specifications ....................................................................................................8

2.1
System Performance ....................................................................................................................................... 8
2.1.1
Performance ............................................................................................................................................ 8
2.1.2
Power ....................................................................................................................................................... 8
2.2
Reliability ......................................................................................................................................................... 8
2.3
Environmental Specifications .......................................................................................................................... 9

3.0
3.1
3.2

4.0

CF Card Interface .........................................................................................................10
Card Pin Assignment ..................................................................................................................................... 10
Card Pin Explanation ..................................................................................................................................... 12

Electrical Interface ........................................................................................................17

4.1
Absolute Maximum Conditions ...................................................................................................................... 17
4.2
Input Power .................................................................................................................................................... 17
4.3
Input Leakage Current ................................................................................................................................... 17
4.4
Input Characteristics ...................................................................................................................................... 17
4.5
Output Drive Type.......................................................................................................................................... 18
4.6
Output Drive Characteristics .......................................................................................................................... 18
4.7Interface/Bus Timing ...................................................................................................................................... 18
4.8
CF-ATA Command Description ..................................................................................................................... 18
4.8.1
CF-ATA Command set .......................................................................................................................... 18
4.8.2
Check Power Mode – 98H or E5H ........................................................................................................ 20
4.8.3
Execute Drive Diagnostics – 90H .......................................................................................................... 21
4.8.4
Erase Sector(s) – C0H........................................................................................................................... 22
4.8.5
Flush Cache – E7h ................................................................................................................................ 22
4.8.6
Format Track – 50H ............................................................................................................................... 23
4.8.7
Identify Drive - ECH ............................................................................................................................... 23

5.0

Comparing CF-ATA to PC Card-ATA and True IDE .....................................................26

5.1
Electrical Differences ..................................................................................................................................... 26
5.1.1
TTL Compatibility ................................................................................................................................... 26
5.1.2
Pull Up Resistor Input Leakage Current ................................................................................................ 26
5.2
Functional Differences ................................................................................................................................... 26
5.2.1
Additional Set Features Codes in CF-ATA ............................................................................................ 26
5.2.2
Additional Commands in CF-ATA .......................................................................................................... 26
5.2.3
Idle Timer ............................................................................................................................................... 26
5.2.4
Recovery from Sleep Mode ................................................................................................................... 27

6.0

SMART Functionality ....................................................................................................28

6.1
SMART Data Structure .................................................................................................................................. 28
6.1.1
Spare Block Count Attribute .................................................................................................................. 29
6.1.2
Spare Block Count Worst Chip Attribute Threshold .............................................................................. 30©2024 Delkin Devices, Inc.

2

Commercial C650 CompactFlash

401-0615-00 Rev. B

6.1.3
Erase Count Attribute ............................................................................................................................ 30
6.1.4
Total ECC Errors Attribute ..................................................................................................................... 31
6.1.5
Correctable ECC Errors Attribute .......................................................................................................... 31
6.1.6
UDMA CRC Errors Attribute .................................................................................................................. 32
6.1.7
Total Number of Reads Attribute ........................................................................................................... 32
6.1.8
Power On Count Attribute ...................................................................................................................... 32
6.1.9
Total LBA’s Written Attribute.................................................................................................................. 33
6.1.10 Total LBA’s Read Attribute .................................................................................................................... 33
6.1.11 Anchor Block Status Attribute ................................................................................................................ 33
6.1.12 Trim Status Attribute .............................................................................................................................. 34
6.2
SMART Read Attribute Thresholds ............................................................................................................... 34
6.2.1
Spare Block Count Attribute Threshold ................................................................................................. 35
6.2.2
Spare Block Count Worst Chip Attribute Threshold .............................................................................. 35
6.2.3
Erase Count Attribute Threshold ........................................................................................................... 35
6.2.4
Total ECC Errors Attribute Threshold .................................................................................................... 35
6.2.5
Correctable ECC Errors Attribute .......................................................................................................... 35
6.2.6
UDMA CRC Errors Attribute .................................................................................................................. 35
6.2.7
Total Number of Reads Attribute ........................................................................................................... 36
6.2.8
Power On Count Attribute ...................................................................................................................... 36
6.2.9
Total LBAs Written Attribute .................................................................................................................. 36
6.2.10 Total LBAs Read Attribute ..................................................................................................................... 36
6.2.11 Anchor Block Status Attribute ................................................................................................................ 36
6.2.12 Trim Status Attribute .............................................................................................................................. 36
6.3
SMART Return Status ................................................................................................................................... 37
6.4
SMART Read Log.......................................................................................................................................... 37
6.5
SMART Write Log .......................................................................................................................................... 38
6.6
SMART Read Remap Data ........................................................................................................................... 39
6.7
SMART Read Wear Level Data ..................................................................................................................... 39

Table of Figures
Figure 1. CF Card Dimensions ....................................................................................................... 7©2024 Delkin Devices, Inc.

3

Commercial C650 CompactFlash

401-0615-00 Rev. B

1.0 Product Overview
Delkin’s Commercial C650 Series CompactFlash memory cards feature significant performanceand robustness upgrades for industrial applications. These cards have superior features such as:•

Static and Global Wear Leveling•

BCH ECC error correction 6 or 8 bit / 512 Byte sector or 24 bit /1024 Byte double-sector
with additional CRC•

Power loss detection and sudden power fail management•

Read disturb management•

Up to 50 MB/sec sustained write speed*•

Commercial temperature (0 to 70°C) operating range•

Compliant with CompactFlash Specification Rev. 4.1, and compatible with 6.1
specifications, Type 1, and ATA/ATAPI-7•

Operating modes – PIO 0 – 6, MDMA 0 – 6, UDMA 0 – 6 in True-IDE mode•

Compliant with European Union Directive 2002/95/EC (RoHS)•

Shock: 40g’s for 11ms, MIL-STD-810, Method 516.8•

Vibration: 20Hz to 2,000Hz, 7.7GRMS, MIL-STD-810, Method 514.6•

Humidity: 5 - 95% RH, non-condensing•

Altitude: 80,000 feet•

Capacities supported
o MLC: 8GB-32GB•

Supports 3.3-Volt and 5-Volt operation•

Fixed Drive and removable configurations available•

Solid State – no moving parts•

Ultrasonic welded case – No press fit components•

Available upon request – Custom CIS, mechanical features, programming, duplication,labels and packaging•

All capacity configurations are available with proprietary conformal coating*Dependent on card capacity, host configuration and testing equipment.

©2024 Delkin Devices, Inc.

4

Commercial C650 CompactFlash

401-0615-00 Rev. B

The Commercial C650 Series CompactFlash cards are manufactured in the USA at our own
facilities in Poway, California. The cards are supported by Delkin’s locked-down Bill of Materials
that ensures consistent product performance and future compatibility. Delkin’s Commercial line ofCompactFlash is the perfect solution for enterprises demanding specific higher qualitative andperformance functions in a widely accepted, time-tested form factor.
Applications:● Industrial Computers● Flight Systems● Agriculture● Embedded Systems● Manufacturing● Gaming● Data Acquisition● Automotive● Telecommunications

Optional Conformal Coating
Delkin’s proprietary conformal coating defends data integrity in harsh environments. Delkinutilizes a low-viscosity silicon elastomer that thoroughly covers exposed board and component
surfaces with a protective coating. This process shields memory electronics from moisture andcontamination, preventing metal corrosion and insulating conductors against electrical leakage.
The coating also ruggedizes devices against the vibration, shock, and thermal stress ofsevere-service applications. Conformal coating is available as an option for Delkin commercial
flash memory products in many form factors, including solid state drives, CompactFlash, Secure
Digital, removable and embedded USB, PCMCIA, and mSATA.

©2024 Delkin Devices, Inc.

5

Commercial C650 CompactFlash

401-0615-00 Rev. B

1.1 Part Numbers
Delkin Devices Commercial C650 Series CompactFlash cards are available in the following
Configurations:
Capacity *

8 GB

16 GB

32 GB

Configuration

Part Number

MLC, Commercial Temp, Fixed Drive, DMA ON

CF08APSGS-FD000-D

MLC, Commercial Temp, Fixed Drive, DMA OFF

CF08APSGS-F1000-D

MLC, Commercial Temp, Removable, DMA ON

CF08APSGS-XX000-D

MLC, Commercial Temp, Removable DMA, OFF

CF08APSGS-X1000-D

MLC, Commercial Temp, Fixed Drive, DMA ON

CF16APBGS-FD000-D

MLC, Commercial Temp, Fixed Drive, DMA OFF

CF16APBGS-F1000-D

MLC, Commercial Temp, Removable, DMA ON

CF16APBGS-XX000-D

MLC, Commercial Temp, Removable DMA, OFF

CF16APBGS-X1000-D

MLC, Commercial Temp, Fixed Drive, DMA ON

CF32APSGS-FD000-D

MLC, Commercial Temp, Fixed Drive, DMA OFF

CF32APSGS-F1000-D

MLC, Commercial Temp, Removable, DMA ON

CF32APSGS-XX000-D

MLC, Commercial Temp, Removable DMA, OFF

CF32APSGS-X1000-D

Notes:
To add optional Conformal Coating, change the 000 in the part number to 050.
The CompactFlash cards are manufactured at our facilities in Poway, California USA.
Many custom configurations are available including custom CHS, mechanical features,
labels and packaging.

*Usable capacities are within 10% of the gross capacity figures shown above, which istypical with all NAND flash devices, as a small portion of the total is needed for controller
firmware and spare block reserves.

1.2 Mechanical Specifications
Delkin Devices Commercial C650 Series cards are Type I CompactFlash cards.

1.3 Dimensions
Length:36.4 ± 0.15 mm (1.433 ±.006 in.)

Width:

42.80 ± 0.10 mm (1.685 ±.004 in.)Thickness Including
Label Area:

3.3 mm ± 0.10 mm (.130 ± .004 in.)

Weight:©2024 Delkin Devices, Inc.

12.0 g typical6

Commercial C650 CompactFlash

401-0615-00 Rev. B

Figure 1. CF Card Dimensions©2024 Delkin Devices, Inc.

7

Commercial C650 CompactFlash

401-0615-00 Rev. B

2.0 Product Specifications
2.1 System Performance
2.1.1 Performance
Capacity

Read (MB/s)

Write (MB/s)

8GB

104

28

16GB

108

29

32GB

103

52

Note: All values dependent on configuration and testing environment.

2.1.2 Power
Capacity

Read (mA)

Write (mA)

Idle (mA)

8GB

86

65

4

16GB

90

69

4

32GB

125

117

4

Note: All values dependent on configuration and testing environment.

2.2 Reliability
Parameter

Value

Endurance**

Up to 2,000,000 cycles

MTBF***

Data Retention
Connector Durability

Up to 2,000,000 hours at 0°C
10 Years when up to 10% of the P/E cycles havebeen consumed
1 year when 100% of the P/E cycles have been
consumed
10,000 insertion cycles**Endurance estimates based on the Enterprise Workload per JEDEC JESD219A. The figures provided are estimates and notguarantees of endurance. Actual results may vary depending on usage, operating temperature, and other conditions.

*** Dependent on configuration, testing environment and operating temperature.

©2024 Delkin Devices, Inc.

8

Commercial C650 CompactFlash

401-0615-00 Rev. B

2.3 Environmental Specifications
Features

OperatingStorage Temperature-50 ~ 100°C

Commercial Operating Temperature

0 ~ 70°C

Humidity

5% – 95% RH, non-condensing

Vibration

20Hz to 2000Hz (MIL-STD-810, Method 514.5)

Shock

40g's for 11ms (MIL-STD-810, Method 516.8)

Altitude80,000 feet max.

©2024 Delkin Devices, Inc.

9

Commercial C650 CompactFlash

401-0615-00 Rev. B

3.0 CF Card Interface
3.1 Card Pin Assignment
Memory card mode

I/O card mode

True IDE mode

Pin No. Signal Name
GND
1

I/O
—

Signal Name I/O
GND—

Signal Name
GND

I/O
—

2

D3

I/O

D3

I/O

D3

I/O

3

D4

I/O

D4

I/O

D4

I/O

4

D5

I/O

D5

I/O

D5

I/O

5

D6

I/O

D6

I/O

D6

I/O

6

D7

I/O

D7

I/O

D7

I/O

7

-CE1

I

-CE1

I

-CS0

I

8

A10

I

A10

I

A10

I

9

-OE

I

-OE

I

-ATASEL

I

10

A9

I

A9

I

A9

I

11

A8

I

A8

I

A8

I

12

A7

I

A7

I

A7

I

13

Vcc

—

Vcc

—

Vcc

—

14

A6

I

A6

I

A6

I

15

A5

I

A5

I

A5

I

16

A4

I

A4

I

A4

I

17

A3

I

A3

I

A3

I

18

A2

I

A2

I

A2

I

19

A1

I

A1

I

A1

I

20

A0

I

A0

I

A0

I

21

D0

I/O

D0

I/O

D0

I/O

22

D1

I/O

D1

I/O

D1

I/O

23

D2

I/O

D2

I/O

D2

I/O

24

WP

O

-IOIS16O-IOCS16

O

25

-CD2

O

-CD2

O

-CD2

O

26

-CD1

O

-CD1

O

-CD1

O

27

D11

I/O

D11

I/O

D11

I/O

28

D12

I/O

D12

I/O

D12

I/O

29

D13

I/O

D13

I/O

D13

I/O

©2024 Delkin Devices, Inc.

10

Commercial C650 CompactFlash

401-0615-00 Rev. B

Memory card mode

I/O card mode

True IDE mode

Pin No. Signal Name
D14
30

I/O
I/O

Signal Name I/O
D14
I/O

Signal Name
D14

I/O
I/O

31

D15

I/O

D15

I/O

D15

I/O

32

-CE2

I

-CE2

I

-CS1

I

33

-VS1

O

-VS1

O

-VS1

O

34

-IORD

I

-IORD

I

-IORD

I

35

-IOWR

I

-IOWR

I

-IOWR

I

36

-WE

I

-WE

I

-WE

I

37

RDY/-BSY

O

-IREQ

O

INTRQ

O

38

Vcc

—

Vcc

—

Vcc

—

39

-CSEL

I

-CSEL

I

-CSEL

I

40

-VS2

O

-VS2

O

-VS2

O

41

RESET

I

RESET

I

-RESET

I

42

-WAIT

O

-WAIT

O

IORDY

O

43

-INPACKO-INPACK

O

DMARQ

O

44

-REG

I

-REG

I

-DMACK

I

45

BVD2

I/O

-SPKR

I/O

-DASP

I/O

46

BVD1

I/O

-STSCHG

I/O-PDIAG

I/O

47

D8

I/O

D8

I/O

D8

I/O

48

D9

I/O

D9

I/O

D9

I/O

49

D10

I/O

D10

I/O

D10

I/O

50

GND

—

GND

—

GND

—

©2024 Delkin Devices, Inc.

11

Commercial C650 CompactFlash

401-0615-00 Rev. B

3.2 Card Pin Explanation
Signal Name
A10 to A0(PC Card
Memory mode)
A10 to A0(PC Card
Memory mode)
A2 to A0
(True IDE mode)

DirectionI

Pin Number

8, 10, 11,
12, 14,15,
16, 17, 18,
19, 2018, 19, 20

BVD1(PC Card
Memory mode)-STSCHG(PC Card I/O
mode)-PDIAG(True IDE mode)
BVD2(PC Card
Memory mode)-SPKR(PC Card I/O
mode)

I/O

46

I/O

45

O

26, 25-CD1, -CD2
(PC Card
Memory mode)©2024 Delkin Devices, Inc.

Address bus is A10 to A0. A10 is MSB and
A0 is LSB.

Address bus is A10 to A0. Only A2 to A0
are used, A10 to A3 should be groundedby the host.
BVD1 outputs the battery voltage status in
the card. This output line is constantly
driven to a high state since a battery is not
required for this product.
-STSCHG is used for changing the status
of Configuration and status register in
attribute area.
-PDIAG is the Pass Diagnostic signal in
Master/Slave handshake protocol.

-DASP(True IDE mode)-CD1, -CD2
(PC Card I/O
mode)-CD1, -CD2
(True IDE mode)

Description

BVD2 outputs the battery voltage status in
the card. This output line is constantly
driven to a high state since a battery is not
required for this product.
-SPKR outputs speaker signals. This
output line is constantly driven to a highstate since this product does not support
the audio function.
-DASP is the Disk Active/Slave Present
signal in the Master/Slave handshake
protocol.
-CD1 and -CD2 are the card detection
signals. -CD1 and -CD2 are connected to
ground, so host can detect that the card isinserted or not.

12Commercial C650 CompactFlash

Signal Name
-CE1, -CE2
PC Card Memory
mode)
Card Enable-CE1, -CE2
(PC Card I/O
mode)
Card Enable-CS0, -CS1
(True IDE mode)
Card Enable-CSEL(PC Card Memory
mode)
-CSEL
(PC Card I/O mode)-CSEL(True IDE mode)

D15 to D0(PC Card Memorymode)
D15 to D0(PC Card I/O mode)
D15 to D0(True IDE mode)
GND(PC Card Memory
mode)
GND
(PC Card I/O mode)
GND(True IDE mode)-INPACK(PC Card Memorymode)©2024 Delkin Devices, Inc.

401-0615-00 Rev. B

Direction

Pin Number

Description-CE1 and -CE2 are low active card selectsignals. Byte/Word/Odd byte modes aredefined by combination Card Enable of CE1, -CE2 and A0.

I

7, 32
-CE2 is used for select the Alternate Status
Register and the Device Control Register
while -CE1 is the chip select for the othertask file registers.
This signal is not used.

I

39

I/O

31, 30, 29,
28, 27, 49,
48, 47, 6, 5,
4, 3, 2, 23,
22, 21This signal is used to configure this device
as a
Master or a Slave when configured in theTrue IDE mode. When this pin is grounded,this device is configured as a Master.
When the pin is open, this device isconfigured as a Slave.
Data bus is D15 to D0. D0 is the LSB of theeven byte of the word. D8 is the LSB of the
odd byte of the word.

Ground
—

O

1, 50

43

This signal is not used and should not be
connected at the host.

13

Commercial C650 CompactFlash

Signal Name

401-0615-00 Rev. B

Direction

Pin NumberThis signal is asserted low by this card
when the card is selected and responding
to an I/O read cycle at the address that ison the address bus during -CE and-IORD
are low. This signal is used for the input
data buffer control.
This signal is a DMA Request that is usedfor DMA data transfers between host anddevice.

-INPACK(PC Card I/O mode)
Input Acknowledge

DMARQ(True IDE mode)-IORD(PC Card Memory
mode)
-IORD
(PC Card I/O mode)This signal is not used.

I

34

-IORD
(True IDE mode)-IOWR(PC Card Memory
mode)
-IOWR
(PC Card I/O mode)©2024 Delkin Devices, Inc.

-IORD is used for control of read data in
I/O task file area. This card does not
respond to -IORD until I/O card interface
setting up.
-IORD is used for control of read data in
I/O task file area. This card does not
respond to -IORD until True IDE interface
setting up.
This signal is not used.

I

35

I

9

-IOWR
(True IDE mode)-OE(PC Card Memory
mode)
-OE
(PC Card I/O mode)-ATASEL(True IDE mode)
RDY/-BSY(PC Card Memory
mode)

Description-IOWR is used for control of data write in
I/O task file area. This card does not
respond to -IOWR until I/O card interface
setting up.
-IOWR is used for control of data write in
I/O task file area. This card does not
respond to -IOWR until True IDE interface
setting up.
-OE is used for the control of reading
register’s data in attribute area or task filearea.
-OE is used for the control of reading
register’s data in attribute area.
To enable True IDE mode this input should
be grounded by the host.

O

37

The signal is RDY/-BSY pin. RDY/-BSY pinturns low level during the card internal
initialization operation at Vcc applied or
reset applied, so next access to the cardshould be after the signal turned high level.

14

Commercial C650 CompactFlash

Signal Name

401-0615-00 Rev. B

Direction

Pin NumberThis signal is active low -IREQ pin. The
signal of low level indicates that the card isrequesting software service to host, andhigh level indicates that the card is not
requesting.
This signal is the active high Interrupt
Request to the host.

-IREQ(PC Card I/O mode)

INTRQ(True IDE mode)-REG(PC Card Memory
mode)
-REG
(PC Card I/O mode)-DMACK(True IDE mode)

I

44

RESET
(PC Card Memory
mode)

RESET
(PC Card I/O mode)
I

41-RESET(True IDE mode)

Vcc(PC Card Memory
mode)
Vcc
(PC Card I/O mode)

Description-REG is used during memory cycles todistinguish between task file and attributememory accesses. Attribute memory selectHigh for task file, Low for attribute memoryis accessed.
-REG is constantly low when task file orattribute memory is accessed.
This is a DMA Acknowledge signal by thehost in response to DMARQ to initiate DMA
transfers.
This signal is active high RESET pin. If
this signal is asserted high, the card
internal initialization begins to operate.
During the card internal initialization RDY/BSY is low. After the card internal
initialization RDY/-BSY is high.
This signal is active high RESET pin. If
this signal is asserted high, the card
internal initialization begins to operate. In
this mode, RDY/-BSY signal cannot be
used, so using Status Register the
Ready/Busy status can be confirmed.
This signal is active low -RESET pin. If thissignal is asserted low, all the registers inthis card are reset. In this mode, RDY/BSY signal cannot be used, so using status
register the Ready/Busy status can be
confirmed.
+5 V, +3.3 V power.

—

13, 38

Vcc(True IDE mode)©2024 Delkin Devices, Inc.

15

Commercial C650 CompactFlash

Signal Name

401-0615-00 Rev. B

Direction

Pin Number-VS1, -VS2
(PC Card Memory
mode)-VS1, -VS2
(PC Card I/O mode)-VS1, -VS2
(True IDE mode)-WAIT(PC Card Memory
mode)
-WAIT
(PC Card I/O mode)
IORDY(True IDE mode)-WE(PC Card Memory
mode)
-WE
(PC Card I/O mode)-WE(True IDE mode)
WP(PC Card Memory
mode)-IOIS16(PC Card I/O mode)-IOCS16(True IDE mode)©2024 Delkin Devices, Inc.

O

33, 40Description
These signals are intended to notify Vcc
requirement to host. -VS1 is held
grounded and -VS2 is non-connected inthis card.

This signal is active low -WAIT pin. In thiscard this signal is constantly high level.
O

42This output signal may be used as IORDY.
In this card this signal is constantly highimpedance.
-WE is used for the control of writing
register’s data in attribute memory area ortask file area.

I

36-WE is used for the control of writing
register’s data in attribute memory area.
This input signal is not used and should beconnected to Vcc by the host.
WP is held low because this card does nothave write-protect switch.

O

24-IOIS16 is asserted when task file registers
are accessed in 16-bit mode.
This output signal is asserted low when thisdevice is expecting a word data transfer
cycle.

16

Commercial C650 CompactFlash

401-0615-00 Rev. B

4.0 Electrical Interface
4.1 Absolute Maximum Conditions
Parameter
Input Power
Voltage on any pin except Vcc withrespect to GND

SymbolVcc

Conditions-0.3V min. to 6.7V Max

V-0.5V min. to Vcc + 3.6V Max

4.2 Input Power

3.135-3.465V

Maximum Average
RMS Active Current
110 mA

Maximum Average
RMS Sleep Current
3 mA

Measurement
Method
3.3V at 25ºC¹

4.5-5.5V

75 mA

3 mA

5.0V at 25ºC¹

Voltage

4.3 Input Leakage Current
Type
IxZ
IxU
IxD

Parameter
Input Leakage
Current
Pull Up Resistor
Pull Down Resister

Symbol
IL
RPU1
RPD1

Conditions
VHI = Vcc / VIL =GND
Vcc = 5.0V
Vcc = 5.0V

Min

Typ

Max

Units

-1

1

µA

50k
50k

500k
500k

Ohm
Ohm

4.4 Input Characteristics
Type
1
2
3

Parameter
Input Voltage
CMOS
Input Voltage
CMOS
Input Voltage
CMOS Schmitt
Trigger©2024 Delkin Devices, Inc.

Symbo
l
Vih
Vil
Vih
Vil
Vth
Vtl

Min

Typ
Max
Vcc = 3.3V

2.4

Min

Typ
Max
Vcc = 5.0V

4.0
0.6

1.5

0.8
2.0

0.6
1.8
1.0

0.8
2.8
2.0

Units

Volts
Volts
Volts

17

Commercial C650 CompactFlash

401-0615-00 Rev. B

4.5 Output Drive TypeAll outputs drive types are CMOS level.

4.6 Output Drive Characteristics
Type

Parameter

O1

OutputVoltage02

OutputVoltage

Symbol Conditions
Voh
Ioh = -4mA
Vol
Iol = 4 mA
Voh
Ioh = -8mA
Vol
Iol = 8 mA

Min

Typ

Max

Units

Vcc -0.8V

GND
+0.4V

Volts

Vcc -0.8V

GND
+0.4V

Volts

4.7 Interface/Bus Timing
There are two types of bus cycles and timing sequences that occur in the PCMCIA type interface,a direct mapped I/O transfer and a memory access. The two timing sequences are explained indetail in the PCMICA PC Card Standard. Delkin’s CompactFlash Card conforms to the timing inthat reference document.

4.8 CF-ATA Command Description
This section defines the software requirements and the format of the commands the host sends
to the CompactFlash cards. Commands are issued to the CompactFlash card by loading therequired registers in the command block with the supplied parameters, and then writing thecommand code to the Command register. The manner in which a command is accepted varies.
These are three classes of command acceptance, all dependent on the host not issuingcommands unless the CompactFlash card is not busy (BSY=0).
4.8.1 CF-ATA Command set
The following table summarizes the CF-ATA command set with the paragraphs that follow
describing the individual commands and the tasks file for each.
Class

COMMAND

Code

FR

SC

SN

CY

DH

LBA

1

Check Power ModeE5h or 98h

-

-

-

-

D

-

1

Execute Drive Diagnostic

90h

-

-

-

-

D

-

1

Erase Sector(s)

C0h

-

Y

Y

Y

Y

Y

1

Flush Cache

E7h

-

-

-

-

D

-

2

Format Track

50h

-

Y

-

Y

Y

Y

©2024 Delkin Devices, Inc.

18

Commercial C650 CompactFlashClass

COMMAND

401-0615-00 Rev. B
Code

FR

SC

SN

CY

DH

LBA

1

Identify Device

ECh

-

-

-

-

D

-

1

Idle

E3h or 97h

-

Y

-

-

D

-

1

Idle ImmediateE1h or 95h

-

-

-

-

D

-

1

Initialize Drive Parameters

91h

-

Y

-

-

Y

-

1

Key Management Structure Read

B9 Feature 0-127

C

C

C

C

DC

-

1

Key Management Read Keying
Material

B9 Feature 80

C

C

C

C

DC

-

2

Key Management Change Key
Management ValueB9 Feature 81

C

C

C

C

DC

-

1

NOP

00h

-

-

-

-

D

-

1

Read Buffer

E4h

-

-

-

-

D

-

1

Read DMA

C8h

-

Y

Y

Y

Y

Y

1

Read Long Sector

22h or 23h

-

-

Y

Y

Y

Y

1

Read Multiple

C4h

-

Y

Y

Y

Y

Y

1

Read Sector(s)20h or 21h

-

Y

Y

Y

Y

Y

1

Read Verify Sector(s)40h or 41h

-

Y

Y

Y

Y

Y

1

Recalibrate

1Xh

-

-

-

-

D

-

1

Request Sense

03h

-

-

-

-

D

-

1

Security Disable Password

F6h

-

-

-

-

D

-

1

Security Erase Prepare

F3h

-

-

-

-

D

-

1

Security Erase Unit

F4h

-

-

-

-

D

-

1

Security Freeze Lock

F5h

-

-

-

-

D

-

1

Security Set Password

F1h

-

-

-

-

D

-

1

Security Unlock

F2h

-

-

-

-

D

-

1

Seek

7Xh

-

-

Y

Y

Y

Y

1

Set Features

EFh

Y

-

-

-

D

-

1

Set Multiple Mode

C6h

-

Y

-

-

D

-

1

Set Sleep ModeE6h or 99h

-

-

-

-

D

-

1

StandbyE2h or 96h

-

-

-

-

D

-

1

Standby Immediate

E0h or 94h

-

-

-

-

D

-

1

Translate Sector

87h

-

Y

Y

Y

Y

Y

1

Wear Level

F5h

-

-

-

-

Y

-

2

Write Buffer

E8h

-

-

-

-

D

-

2

Write DMA

CAh

-

Y

Y

Y

Y

Y

2

Write Long Sector

32h or 33h

-

-

Y

Y

Y

Y

3

Write Multiple

C5h

-

Y

Y

Y

Y

Y

©2024 Delkin Devices, Inc.

19

Commercial C650 CompactFlash
Class

1.
2.
3.
4.
5.
6.
7.
8.

401-0615-00 Rev. B

COMMAND

Code

FR

SC

SN

CY

DH

LBA

3

Write Multiple w/o Erase

CDh

-

Y

Y

Y

Y

Y

2

Write Sector(s)30h or 31h

-

Y

Y

Y

Y

Y

2

Write Sector(s) w/o Erase

38h

-

Y

Y

Y

Y

Y

3

Write Verify

3Ch

-

Y

Y

Y

Y

Y

FR = Features Register
SC = Sector Count Register
SN = Sector Number Register
CY = Cylinder Register
DH = Card/Drive/Head Register
LBA = Logical Block Address Mode Supported (see command description for use).
Y = The register contains a valid parameter for this command.
For the Drive/Head Register:• Y – both the CompactFlash card and head parameters are used;• D – only the CompactFlash card parameter is valid and not the head parameter.

4.8.2 Check Power Mode – 98H or E5H
Bit –>

7

6

5

4

Command (7)C/D/H (6)

3

2

1

0

98h or E5h
X

Drive

X

Cyl High (5)X

Cyl Low (4)X

Sec Num (3)X

Sec Cnt (2)X

Feature (1)X•

This command checks the power mode.

•

Because Delkin’s CompactFlash card can recover from sleep in 200ms, idle mode isnever enabled.

•

CompactFlash card sets BSY, sets the Sector Count Register to 00H, Clears BSY andgenerates an interrupt.

©2024 Delkin Devices, Inc.

20

Commercial C650 CompactFlash

401-0615-00 Rev. B

4.8.3 Execute Drive Diagnostics – 90H
Bit –>

7

6

4

5

Command(7)
C/D/H (6)

3

2

1

0

90H
X

Drive

X

Cyl High (5)X

Cyl Low (4)X

Sec Num (3)X

Sec Cnt (2)X

Feature (1)X

This command performs the internal diagnostic test implemented by the CompactFlash card.
If in PCMCIA configuration this command runs only on the CompactFlash card which isaddressed by the Drive/Head register when the diagnostic command is issued. This is because
PCMCIA card interface does not allow for direct inter-drive communication (such as the ATAPDIAG and DASP signals). If in True IDE mode the Drive bit is ignored and the diagnostic
command is executed by both the master and the slave with the master responding with status forboth devices.
The Diagnostic codes shown below are returned in the Error register at the end of the command.
Diagnostic Codes
CodeError Type01H

No Error Detected

02H

Formatter Device Error

03H

Sector Buffer Error

04H

ECC Circuitry Error

05H

Controlling Microprocessor Error

8XH

Slave Error in True IDE mode

©2024 Delkin Devices, Inc.

21

Commercial C650 CompactFlash

401-0615-00 Rev. B

4.8.4 Erase Sector(s) – C0H
Bit –>

7

6

5

4

Command (7)C/D/H (6)

3

2

1

0

C0H
1

LBA

1

Drive

Head (LBA 27-24)

Cyl High (5)Cylinder High (LBA 23-16)

Cyl Low (4)Cylinder Low (LBA 15-8)

Sec Num (3)Sector Number (LBA 7-0)

Sec Cnt (2)Sector Count

Feature (1)X

This command is used to pre-erase and condition data sectors in advance of a Write without
Erase or Write Multiple without Erase command. There is no data transfer associated with thiscommand but a Write Fault error status can occur.
4.8.5 Flush Cache – E7h
Bit ->

7

6

5

4

Command (7)C/D/H (6)

3

2

1

0

E7h
X

Drive

X

Cyl High (5)X

Cyl Low (4)X

Sec Num (3)X

Sec Cnt (2)X

Feature (1)X

This command causes the card to complete writing data from its cache. The card returns status
with RDY=1 and DSC=1 after the data in the write cache buffer is written to the media. If theCompact Flash Card does not support the Flush Cache command, the Compact Flash Card shallreturn command aborted.

©2024 Delkin Devices, Inc.

22

Commercial C650 CompactFlash

401-0615-00 Rev. B

4.8.6 Format Track – 50H
Bit –>

7

6

5

4

Command (7)C/D/H (6)

3

2

1

0

50H
1

LBA

1

Drive

Head (LBA 27-24)

Cyl High (5)Cylinder High (LBA 23-16)

Cyl Low (4)Cylinder Low (LBA 15-8)

Sec Num (3)X (LBA 7-0)

Sec Cnt (2)Count (LBA mode only)

Feature (1)X

This command writes the desired head and cylinder of the selected drive with a vendor uniquedata pattern (typically FFH or 00H). To remain host backward compatible, the CompactFlashcard expects a sector buffer of data from the host to follow the command with the same
protocol as the Write Sector(s) command although the information in the buffer is not used by
the CompactFlash card. If LBA=1 then the number of sectors to format is taken from Sec Cnt
register (0=256). The use of this command is not recommended.
4.8.7 Identify Drive - ECH
Bit –>

7

6

5

4

Command (7)C/D/H (6)

3

2

1

0

ECH
X

X

X

Drive

X

Cyl High (5)X

Cyl Low (4)X

Sec Num (3)X

Sec Cnt (2)X

Feature (1)X

The Identify Drive command enables the host to receive parameter information from theCompactFlash card. This command has the same protocol as the Read Sector(s) command.

©2024 Delkin Devices, Inc.

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Commercial C650 CompactFlash

401-0615-00 Rev. B

Identify Drive Information
Word
Address

Default
Value

Total
Bytes

848Ah

2

General configuration - signature for the CompactFlash Card

0XXX

2

General configuration – Bit Significant with ATA-4 definitions

1

XXXXh

2

Default number of cylinders

2

0000h

2

Reserved

3

00XXh

2

Default number of heads

4

0000h

2

Obsolete

5

0000h

2

Obsolete

6

XXXXh

2

Default number of sectors per track

7-8

XXXXh

4

Number of sectors per card (Word 7 = MSW, Word 8 = LSW)

9

XXXXh

2

Obsolete

10-19

aaaa

20

Serial number in ASCII (Right Justified)

20

0000h

2

Obsolete

21

0000h

2

Obsolete

22

0004h

2

Number of ECC bytes passed on Read/Write Long Commands

23-26

aaaa

8

Firmware revision in ASCII. Big Endian Byte Order in Word

27-46

aaaa

40

Model number in ASCII (Left Justified) Big Endian Byte Order in Word

47

XXXXh

2

Maximum number of sectors on Read/Write Multiple command

48

0000h

2

Reserved

49

XX00h

2

Capabilities

50

0000h

2

Reserved

51

0X00h

2

PIO data transfer cycle timing mode

52

0000h

2

Obsolete

53

000Xh

2

Field Validity

54

XXXXh

2

Current numbers of cylinders

55

XXXXh

2

Current numbers of heads

56

XXXXh

2

Current sectors per track

57-58

XXXXh

4

Current capacity in sectors (LBAs)(Word 57 = LSW, Word 58 = MSW)

59

01XXh

2

Multiple sector setting

60-61

XXXXh

4

Total number of sectors addressable in LBA Mode

62

0000h

2

Reserved

63

0X0Xh

2

Multiword DMA transfer. In PCMCIA mode this value shall be 0h

64

00XXh

2

Advanced PIO modes supported

65

XXXXh

2

Minimum Multiword DMA transfer cycle time per word. In PCMCIA mode
this value shall be 0h0©2024 Delkin Devices, Inc.

Data Field Type Information

24

Commercial C650 CompactFlash
Word
Address

Default
Value

66

XXXXh

67

XXXXh

2

Minimum PIO transfer cycle time without flow control

68

XXXXh

2

Minimum PIO transfer cycle time with IORDY flow control

69-1270000h

116

Reserved

128

XXXXh

2

Security status

129-1590000h

64Vendor unique bytes

160-255

0000h

172

Reserved©2024 Delkin Devices, Inc.

Total
Bytes
2

401-0615-00 Rev. B
Data Field Type Information
Recommended Multiword DMA transfer cycle time. In PCMCIA mode thisvalue shall be 0h25Commercial C650 CompactFlash

401-0615-00 Rev. B

5.0 Comparing CF-ATA to PC Card-ATA and True IDE
This section details the differences between CF-ATA when compared to the PC Card-ATA andTrue IDE.

5.1 Electrical Differences
5.1.1 TTL Compatibility
CF is not TTL compatible, it is a purely CMOS interface. Refer to Electrical Specification
section covered earlier in this document.
5.1.2 Pull Up Resistor Input Leakage Current
The minimum pull up input leakage current is 50K ohms rather than the 10K ohms statedin the PCMCIA specification.

5.2 Functional Differences
5.2.1 Additional Set Features Codes in CF-ATA
The following Set Features codes provide additional functionality in CF-ATA, but are notstandard in PC Card-ATA or True IDE:
1. 69H, Accepted for backward compatibility
2. 96H, Accepted for backward compatibility
3. 97H, Accepted for backward compatibility
4. 9AH, Set the host current source capability
5.2.2 Additional Commands in CF-ATA
The following commands provide additional functionality in CF-ATA, but are not standard
PC Card-ATA commands.
PC Card-ATA and True IDE define the following command codes as vendor unique:
1. C0H, Erase Sectors
2. 87H, Translate Sector
3. F5H, Wear Level
PC Card-ATA and True IDE define the following command codes as reserved:
1. 03H, Request Sense
2. 38H, Write Without Erase
3. CDH, Write Multiple Without Erase
5.2.3 Idle Timer
The CF-ATA Idle timer uses an increment value of 5 ms, rather than the 5 second
minimum increment value specified in PC Card-ATA/True IDE.
©2024 Delkin Devices, Inc.

26

Commercial C650 CompactFlash

401-0615-00 Rev. B

5.2.4 Recovery from Sleep Mode
For CF devices, recovery from sleep mode is accomplished by issuing another commandto the device. A hardware or software reset is not required.

©2024 Delkin Devices, Inc.

27

Commercial C650 CompactFlash

401-0615-00 Rev. B

6.0 SMART Functionality
Delkin Devices Commercial C650 Series CF cards support the following SMART commands,
determined by the Feature Register value.
Value

Command

D0h

SMART Read Data

D1h

SMART Read Attribute Thresholds

D2hSMART Enable / Disable Attribute Autosave

D5h

SMART Read Log

D6h

SMART Write Log

D8h

SMART Enable Operations

D9h

SMART Disable Operations

DAh

Return Status

E0h

SMART Read Remap Data

E1h

SMART Read Wear Level Data

SMART commands with Feature Register values not mentioned in the above table are not supported and will be aborted.

6.1 SMART Data Structure
The following 512 bytes make up the device SMART data structure. Users can obtain the datausing the “Read Data” command (D0h.)
Byte
0–1

Value

Description

0010h

SMART structure version

2 – 361

Attribute entries 1 to 30 (12 bytes each)

362

00h

Off-line data collection status (no off-line data collection)

363

00h

Self-test execution status byte (self-test completed)364 – 3650000h

Total time in seconds to complete off-line data collection activity

366

00h

Vendor specific

367

00h

Off-line data collection capability (no off-line data collection)

368 – 369

0003h

SMART capability

370

00h

Error logging capability (no error logging)

371

00h

Vendor specific

372

00h

Short self-test routine recommended polling time (in minutes)©2024 Delkin Devices, Inc.

28

Commercial C650 CompactFlash

401-0615-00 Rev. B

373

00h

Extended self-test routine recommended polling time (in minutes)

374 – 38500h

Reserved

386 – 387

0004h

SMART Structure Version

388 – 391

Firmware “Commit” Counter

392 - 395

Firmware Wear Level Threshold

396

Global Wear Leveling Active

397

Global Bad Block Management active(returns 0 if bad block management is still at local chip level, and returns 1 if global badblock management has begun.)398 – 401

Average Flash Block Erase Count402 – 405

Number of Flash Blocks involved in the Wear Leveling406 – 409

Number of total ECC errors during firmware initialization

410 – 413

Number of correctable ECC errors during firmware initialization

414 – 510

00h

511

Vendor specificData structure checksum

6.1.1 Spare Block Count Attribute
This attribute gives information about the amount of available spare blocks.
OffsetValue

Description

0

196

Attribute ID – Reallocation Count

1–2

0003h

Flags – Pre-fail type, attribute value is updated during normal
operation

3

Attribute value. The value returned here is the percentage ofremaining spare blocks summed over all flash chips, i.e.
(100 x current spare blocks / initial spare blocks)

4

Attribute value (worst value)

5–7

Sum of the initial number of spare blocks for all flash chips

8 – 10Sum of the current number of spare blocks for all flash chips

11

00h

Reserved

This attribute is used for the SMART Return Status command. If the attribute value field is less than thespare block threshold (set with the –tsbc preformat option), the SMART Return Status command will
indicate a threshold exceeded condition.

©2024 Delkin Devices, Inc.

29

Commercial C650 CompactFlash

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6.1.2 Spare Block Count Worst Chip Attribute Threshold
This attribute gives information about the amount of available spare blocks on the flash chip that has thelowest current number of spare blocks.
OffsetValue

Description

0

213

Attribute ID – Spare Block Count Worst Chip (vendor specific)

1–2

0002h

Flags – Advisory type, attribute value is updated during normal
operation

364hAttribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5–7

Initial number of spare blocks for the flash chip with the lowest current
number of spare blocks.

8 – 10Current number of spare blocks for the flash chip with the lowest
current number of spare blocks.

11

00h

Reserved

6.1.3 Erase Count Attribute
This attribute gives information about the amount of flash block erases that have been performed.
OffsetValue

Description

0229

Attribute ID – Erase Count Usage (vendor specific)

1–2

000Xh

Flags – Pre-fail or Advisory type, attribute value is updated during
normal operation

3

Attribute value. The value returned here is an estimation of theremaining card life, in percent, based on the number of flash blockerases compared to the target number of erase cycles per block.

4

Attribute value (worst value)

5 - 10Estimated total number of block erases.

11

00h

Reserved

This attribute is used for the SMART Return Status command. If the attribute value field is less than theerase count threshold (set with the –tec preformat option), the SMART Return Status command will
indicate a threshold exceeded condition.
The target number of erase cycles per flash block is taken from the –mbec preformat option, or if thisoption is absent, from the MaxBlockEraseCount column in the Device Description file.
The attribute type (pre-fail or advisory) can be set with the –ecwl preformat option.

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Commercial C650 CompactFlash

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6.1.4 Total ECC Errors Attribute
This attribute gives information about the total number of ECC errors that have occurred on flash readcommands during firmware runtime. This attribute is not used for the SMART Return Status command.
OffsetValue

Description

0203

Attribute ID – Number of ECC Errors

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5–8

Total number of ECC errors (correctable and uncorrectable)

9 – 10

---

11

00h

Reserved

6.1.5 Correctable ECC Errors Attribute
This attribute gives information about the total number of correctable ECC errors that have occurred on
flash read commands during firmware runtime. This attribute is not used for the SMART Return Statuscommand.
OffsetValue

Description

0204

Attribute ID – Number of corrected ECC Errors

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5–8

Total number of correctable ECC errors

9 - 10

---

11

00h

©2024 Delkin Devices, Inc.

Reserved

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Commercial C650 CompactFlash

401-0615-00 Rev. B

6.1.6 UDMA CRC Errors Attribute
This attribute gives information about the total number of UDMA CRC errors that have occurred on flash
read commands. This attribute is not used for the SMART Return Status command.
OffsetValue

Description

0

199

Attribute ID – UDMA CRC error rate

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5–8

Total number of UDMA CRC errors

9 – 10

---

11

00h

Reserved

6.1.7 Total Number of Reads Attribute
This attribute gives information about the total number of flash read commands. This can be useful forinterpretation of the number of correctable or total ECC errors. This attribute is not used for the SMART
Return Status command.
OffsetValue

Description0232

Attribute ID – Number of Reads (vendor specific)

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5 – 1011

Total number of flash read commands
00h

Reserved

6.1.8 Power On Count Attribute
OffsetValue

Description

012

Attribute ID – Power On Count

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5–8

Number of Power On cycles

9 – 10

---

11

00h

©2024 Delkin Devices, Inc.

Reserved

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Commercial C650 CompactFlash

401-0615-00 Rev. B

6.1.9 Total LBA’s Written Attribute
This attribute gives the total amount of data written to the disk, in units of 32MB (65536 sectors.) This
number can be converted to Terabytes written (TBW) by dividing the raw attribute value by 231.
OffsetValue

Description

0241

Attribute ID – Total LBA’s Written (vendor specific)

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5 – 1011

Total number of LBA’s written to the disk, divided by 65536
00h

Reserved

6.1.10 Total LBA’s Read Attribute
This attribute gives the total amount of data read from the disk, in units of 32MB (65536 sectors.) This
number can be converted to Terabytes read (TBW) by dividing the raw attribute value by 231.
OffsetValue

Description

0242

Attribute ID – Total LBA’s Read (vendor specific)

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5 – 1011

Total number of LBA’s read from the disk, divided by 65536
00h

Reserved

6.1.11 Anchor Block Status Attribute
This attribute reports how many times the Anchor Block of the card has been re-written, either by the
Anchor Block repair routine or by a firmware update.
OffsetValue

Description

0

214

Attribute ID – Anchor Block Status (vendor specific)

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value. This value is fixed at 100.

464h

Attribute value (worst value)

5–8

Anchor Block Write Count

9 – 10

---

11

00h

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Reserved

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Commercial C650 CompactFlash

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6.1.12 Trim Status Attribute
This attribute gives percent ratio for the disk space that is currently in the trimmed state, reported as theattribute value. The range for the attribute value is 1 to 99, and does not reach 100 even for a fully
trimmed card since the management blocks are also counted, which do not have trim status.
OffsetValue

Description

0215

Attribute ID – Trim Status (vendor specific)

1–2

0002h

Flags – Advisory type, attribute value is updated during normal operation

364h

Attribute value.

464h

Attribute value (worst value)

5 – 10

---

11

00h

Reserved

6.2 SMART Read Attribute Thresholds
COMMAND CODE – B0h with a Feature Register value of D1h
PROTOCOL – PIO data in
INPUTS Register

7

6

5

4

3

2

1

0

D1h

Features
Sector Count
Sector Number
Cylinder Low

4Fh

Cylinder HighC2h

Device / Head

1

1

1

D
B0h

Command

NORMAL OUTPUTS – None required
ERROR OUTPUTS – Aborted if either the signature in the Cylinder registers is invalid or if SMART is notenabled.
DESCRIPTION – This command returns one sector of SMART attribute thresholds. The data structure
returned is:Offset0-1
2 – 361

Value
0010h

Description
SMART structure version
Attribute threshold entries 1 to 30 (12 bytes each)362 – 379
380 – 510
511

00h
00h

Reserved---Data structure checksum©2024 Delkin Devices, Inc.

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6.2.1 Spare Block Count Attribute Threshold
Offset
0
1

Value
196

Description
Attribute ID – Reallocation Count
Spare Block Count Threshold as defined in preformat

2 – 1100h

Reserved

6.2.2 Spare Block Count Worst Chip Attribute Threshold
Offset0
1
2 – 11

Value
213
00h
00h

Description
Attribute ID – Spare Block Count Worst Chip (vendor specific)
No threshold for the Spare Block Count Worst Chip Attribute
Reserved

6.2.3 Erase Count Attribute Threshold
Offset0
1
2 – 11

Value
229
00h

Description
Attribute ID – Erase Count Usage (vendor specific)
Erase Count Threshold as defined in performat
Reserved

6.2.4 Total ECC Errors Attribute Threshold
Offset0
1
2 – 11

Value
203
00h
00h

Description
Attribute ID – Number of ECC errors
No threshold for the Total ECC Errors Attribute
Reserved

6.2.5 Correctable ECC Errors Attribute
Offset
0
1

Value
204
00h

Description
Attribute ID – Number of corrected ECC errors
No threshold for the Correctable ECC Errors Attribute2 – 1100h

Reserved

6.2.6 UDMA CRC Errors Attribute
OffsetValue

Description

0
1
2 – 11

199
00h
00h

Attribute ID – UDMA CRC error rate
No threshold for the UDMA CRC Errors Attribute
Reserved©2024 Delkin Devices, Inc.

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6.2.7 Total Number of Reads Attribute
Offset
0
1

Value
232
00h

Description
Attribute ID – Number of Reads (vendor specific)
No threshold for the Total Number of Reads Attribute2 – 1100h

Reserved

6.2.8 Power On Count Attribute
Offset0

Value
12

Description
Attribute ID – Power On Count1
2 – 1100h
00h

No threshold for the Power On Count Attribute
Reserved

6.2.9 Total LBAs Written Attribute
Offset0
1
2 – 11

Value
241
00h
00h

Description
Attribute ID – Total LBAs Written (vendor specific)
No threshold for the Total LBAs Written Attribute
Reserved

6.2.10 Total LBAs Read Attribute
Offset0
1
2 – 11

Value
242
00h
00h

Description
Attribute ID – Total LBAs Read (vendor specific)
No threshold for the Total LBAs Read Attribute
Reserved

6.2.11 Anchor Block Status Attribute
Offset0
1
2 – 11

Value
214
00h
00h

Description
Attribute ID – Anchor Block Status (vendor specific)
No threshold for the Anchor Block Status Attribute
Reserved

6.2.12 Trim Status Attribute
Offset
0

Value
215

Description
Attribute ID – Trim Status (vendor specific)

1
2 – 1100h
00h

No threshold for the Trim Status Attribute
Reserved©2024 Delkin Devices, Inc.

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6.3 SMART Return Status
COMMAND CODE – B0h with a Feature Register value of DAh
PROTOCOL – non-data
INPUTS Register

7

6

5

4

3

2

1

0

DAh

Features
Sector Count
Sector Number
Cylinder Low

4Fh

Cylinder HighC2h

Device / Head

1

1

1

D
B0h

Command

NORMAL OUTPUTS – Returns a status indication as described below.
ERROR OUTPUTS – Aborted if either the signature in the Cylinder registers is invalid or if SMART is notenabled.
DESCRIPTION – This command checks the device reliability status. If a threshold exceeded condition
exists for either the Spare Block Count attribute or the Erase Count attribute, the device will set the
Cylinder Low register to F4h and the Cylinder High register to 2Ch. If no threshold exceeded condition
exists, the device will set the Cylinder Low register to F4h and the Cylinder High register to C2h.

6.4 SMART Read Log
COMMAND CODE – B0h with a Feature Register value of D5h
PROTOCOL – PIO data in.
INPUTS Register

7

6

5

4

3

2

Features

D5h

Sector Count

Number of sectors to be read

Sector Number

Log address

Cylinder Low

4Fh

Cylinder HighC2h

Device / Head1

Command

1

1

1

0

D
B0h

NORMAL OUTPUTS – None required.
ERROR OUTPUTS – Aborted if either the signature in the Cylinder registers, the Log address or thenumber of sectors is invalid, or if SMART is not enabled.
DESCRIPTION – This command will return data of the SMART log. The following Log addresses aredefined:Address

Description©2024 Delkin Devices, Inc.

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0x00
0x80 – 0x9F
0xA0

Log Directory
Host Vendor Specific Logs
SMART Wear Level Data

0xA1
0xA2

SMART Remap Data
Reserved

The Log Directory (at Log address 0) returns one sector that shows the number of sectors for Log
addresses 1 to 255:
Offset
0-1

Value
1

Description
SMART Logging Version

256 – 319
320 – 321
322 – 323
324 – 325

16
4
1
1

Number of sectors in the logs at addresses 0x80 – 0x9F
Number of sectors in the logs at address 0xA0
Number of sectors in the logs at address 0xA1
Number of sectors in the logs at address 0xA2

All other bytes in the Log Directory are zero.
The Host Vendor Specific Logs can be used by the host to store and retrieve arbitrary data.
The SMART Wear Level Data and SMART Remap Data Logs return the same data that is also returned by
the SMART Read Wear Level Data and SMART Read Remap Data commands.

6.5 SMART Write Log
COMMAND CODE – B0h with a Feature Register value of D6h
PROTOCOL – PIO data out.
INPUTS Register

7

6

5

4

3

2

Features

D6h

Sector Count

Number of sectors to be written

Sector Number

Log address

Cylinder Low

4Fh

Cylinder HighC2h

Device / Head1

Command

1

1

1

0

D
B0h

NORMAL OUTPUTS – None required.
ERROR OUTPUTS – Aborted if either the signature in the Cylinder registers, the Log address or thenumber of sectors is invalid, or if SMART is not enabled.
DESCRIPTION – This command can be used to write data into the SMART log (see section 6.4 for thedefinition of the log addresses.) Writes are allowed only to the Host Vendor Specific logs, all other log
addresses can only be read.

©2024 Delkin Devices, Inc.

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6.6 SMART Read Remap Data
COMMAND CODE – B0h with a Feature Register value of E0h
PROTOCOL – PIO data in.
INPUTS Register

7

6

5

4

3

Features

E0h

Sector Count

01h

2

1

0

Sector Number
Cylinder Low

4Fh

Cylinder HighC2h

Device / Head

1

1

1

D
B0h

Command

NORMAL OUTPUTS – None required.
ERROR OUTPUTS – Aborted if either the signature in the Cylinder registers is invalid, if the Sector Countis not 1, or if SMART is not enabled.
DESCRIPTION – This command returns one sector of spare block information. The information is theinitial number of blocks (directly after the preformat) per flash chip available for bad block remap, and thecurrent number of blocks per flash chip available for bad block remap. The layout of the returned sector is:
Offset0 - 31
32 – 63
64 - 511

Description
Initial number of replacement blocks for chips 0 – 15, 2 bytes per entry
Current number of replacement blocks for chips 0 – 15, 2 bytes per entry----

6.7 SMART Read Wear Level Data
COMMAND CODE – B0h with a Feature Register value of E1h
PROTOCOL – PIO data in.
INPUTS Register

7

6

5

4

3

Features

E1h

Sector Count

04h

2

1

0

Sector Number
Cylinder Low

4Fh

Cylinder HighC2h

Device / HeadCommand©2024 Delkin Devices, Inc.

1

1

1

D
B0h

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NORMAL OUTPUTS – None required.
ERROR OUTPUTS – Aborted if either the signature in the Cylinder registers is invalid, if the Sector Countis not 4, or if SMART is not enabled.
DESCRIPTION – This command will return four sectors of information regarding the status of the wear
leveling. The information returned is the distribution of the blocks into the 1024 possible wear levelclasses. The layout of the returned sector is:
Offset0-3
4–5
6–7
8 – 1516 – 23

Description
Marker Bytes, fixed value 0xFFFFFFFF
Lowest Wear Level Class
Highest Wear Level Class
Wear Level Class entry 1
Wear Level Class entry 2

24 – 31….
2040 - 2047

Wear Level Class entry 3….
Wear Level Class entry 255

Each Wear Level Class entry consists of this data:
Offset0-3
4–7

Description
Wear Level Class Index
Number of blocks in this Wear Level Class

Unused Wear Level Class entries are zero.
A block moves from one wear level class into the next when it reaches the number of erases that is
specified as the “Wear Level Threshold” in the preformat. A common threshold number is 4095, thismeans that blocks in wear level class 0 have seen 0 to 4095 erases, blocks in wear level class 1 haveseen 4096 to 8191 erases, and so on. Using this information, statements about the wear of the card andof the estimated remaining life can be made.

WARNING: This product may contain chemicals known to the State of California to cause cancer, birthdefects, or other reproductive harm. For more information go to www.p65warnings.ca.gov.

©2024 Delkin Devices, Inc.

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