DATASHEETVP430

3U VPX Direct RF Processing System Xilinx Zynq Ultrascale+ RFSOCThe VP430 is 3U VPX RF processing system
featuring the transformational Xilinx® Zynq®
Ultrascale+™ RF system-on-chip technology(RFSoC). The ZU27DR device used on theVP430 includes eight integrated analog-todigital converters at 4GSPS, eight digitalto-analog converters at 6.4 GSPS, a userprogrammable FPGA fabric, and multi-core
Zynq ARM® processing subsystem.
Reduce RF Signal Chain Complexity
RF systems with multiple channels sufferfrom a cost- and complexity challenge.
More channels means more expensive andlarge RF signal up/down conversion andsignal conditioning. As a solution, the VP430
enables direct RF sampling which can be
implemented in the digital domain, bringing
greater flexibility to the signal processing
chain. Additionally, simplified integration withRF sampling devices removes the complexityof JESD204B high speed serial interfaces.
Maximize Input/Output Channel Density
The VP430 is one of the densest 3U VPX
analog FPGA carrier boards available withthe ability to synchronize all 16 channels
as well as multiple boards for even larger
system applications. In previous generationsof technology, this combination would havetaken four times as many boards.
Heterogeneous processing capability
Many RF and signal processing systems
require both a streaming DSP with an
FPGA and a general purpose processor for
decisions and control. In the past, theseprocessing requirements were handled byseparate modules. Now, with the VP430, it
is possible to get both functions in a single
module by leveraging the RFSoC technology.
Offload Data More Efficiently
The VP430 has a traditional VPX data
plane interface, allowing a x8 PCIe™ Gen3
connection to a host computer. With eight
ADCs sampling at rates over 6GSPS with twobytes per sample, even the modern PCIe Gen
3 high speed data connection is too slow fora direct transfer. To overcome this challenge,
the VP430 includes – in addition to the PCIe
Gen3 data plane - the option to be built with
an 8-channel VITA 66.4 fiber optic interface
for transfers up to 12 GB/s.
The VP430 is designed to be both air- andconduction cooled, making it an ideal COTS
product for early designs and capable ofbeing deployed into operational assets.
When paired with Abaco’s extensive
portfolio of multi- architecture processing
boards including SBCs and GPGPUs, thestate-of-the-art VP430 enables systems tobe built from leading edge, interoperablecomponents.

FEATURES:• Zynq UltraScale+ RFSoC-- Integrated ADC, DAC,
programmable logic andprocessing subsystems.

• ADC 8-channel 4GSPS 12-Bit• DAC 8-channel 6.4GSPS 14-Bit• Application Processing Unit-- Quad-core ARM Cortex-A53• Real-time Processing Unit-- Dual-core ARM Cortex-R5• Up to 16 GBytes DDR4
• Single serial BLAST site-- Configurable memory options.
-- Firefly Optical backplane
option.

• I/O-- PCIe Gen3 x8-- 2x USB 3.0 or DisplayPort™
with RTM311-- SATA 3.1 M.2 2280 SSD withRTM311-- VITA 66.4 8x FireFly™ Optical
Interface for transfers up to 12
GB/s.

DATASHEETVP430 3U VPX Direct RF Processing SystemSpecifications

Block diagram

Build options• 0.8” pitch convection cooled• 1.0” pitch conduction cooled
Zynq Ultrascale+ RFSOC• ZU27DR. Until production silicon is released
from Xilinx, the VP430 has engineering
samples of the RFSoC device. Contact
Abaco for more information.

Analog Domain

Memory• Two 64-bit 8GBytes DDR4 (16GB total)
memory blocks. Up to 2400 Mb/s.
• RFSOC - 256KB on-chip with ECC.

8 Off Board 4GSPSADC Channels

BALUNs and Filters

Analog Domain
Clock Generation

BALUNs and Filters

XilinxX100 HPIO

Contact Abaco for ordering information.

UARTtoUSBUARTuSD Card
Bottomside
64x

8GB DDR4A 4x16b

64x

VITA
46.6

Eth Phy

1000Base-BX

USB2.0Phy
USB-2.0

PL_8_GTY
32Gb/s2x UART
RX/TX

RS-232
COMx2JTAG
HDR

12V/3P3V

OpenVPX
VITA 65

Rx8

PS_4_GTR
6Gb/s

Power/BoardManagementHot SwapControlMMC
VITA46.11
8051F960

I2C
1P8V HPIO
1.25G LVDS

Tx8

FPGA LEDs
Status/Done(214PS, 48PL HDIO, 299PL HPIO)(4PS-GTR, 18 GTY)

1Gb
FlashQSPIx4

P1 P1P0

P2 options
P2B Option 1Xilinx and Zynq are registered trademarks, and Ultrascale+ isa trademark, of Xilinx, Inc. FireFly is a trademark of Samtec,
Inc. PCIe is a trademark of PCI-SIG. ARM is a registeredtrademark of ARM Limited. DisplayPort is a trademark of theVideo Electronics Standards Association (VESA).

RP0-1 Rear Transition Module Option (RTM311)

P2B
P2.9 : P2.16

P2A
P2.1 : P2.8

4 Position
SMPM Coax

8 differential
wafer Zynq
GPIO
16x LVDS
Backplane or
RTM311 QSEConnector

VITA 67.1
24 Position
MT Fibre

LED
RGBUSB

SI5341

Zynq UltraScale+ RFSoC
ZU27DR

FireFly
BLAST

LED
RGB
RST

Digital Domain Clocks

x8 GTY Duplex

DFP1 Data Fabric
SRIO/PCIe/ENET x8

Flexible VPX backplane options• VITA 67.1 analog interface ports• VITA 66.4 optical interface via FireFly BLAST
site (optional). 8 channels up to 12 GB/s.

Front PanelIO (UART)
Mini USB-B

I2C IPMIS-BLAST

Application Processing Unit
• Quad-core ARM Cortex-A53 MPCore• Up to 1.5GHz
Real-time Processing Unit
• Dual-core ARM Cortex-R5 MPCore• Up to 533MHzSoC USB to Serial
Debug Port

Analog Power
Generation

User Defined(RTM) Support x3

Programmable FPGA Logic• 930k System Logic Cells• 425k CLB LUTs
• 4,272 DSP Slices

DAC/ADC REF/TRIG
Clock In/Out Inputs

16 Channel LVDS
P2A 0-7 User I/O

ADC and DAC• ADC: 8-channels, 12-bit, 4GSPS with DDC• DAC: 8-channels, 14-bit, 6.4GSPS with DUC

8 Off Board 6GSPSDAC Channels

Fiber/Coax are mutually
exclusive and collocatedat P2B.

P2B Option 2
VITA 66.4

QSE 120 Pin Socket

Optional RTM311
supported interfaces

M.2 SSD
2260-2280

GbE
PHY &MAGS

GbE
PHY &MAGS

USB
2.0
PHY

2x
RS-232JTAG

RJ-45
w/LEDs

RJ-45
w/LEDsUSB
x2

Custom
uHDMI

Video
Codec

JTAG
HDR

Lithium
BatterymDisplay
PortuSD
Card

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