Experimental Verification of Low-Voltage
Power Supply with 10,000-A Pulse Output for
Spark Plasma Sintering
Koji Orikawa, Jun-ichi Itoh
Department of Electrical Engineering
Nagaoka University of Technology
Nagaoka, Japanorikawa@vos.nagaokaut.ac.jp, itoh@vos.nagaokaut.ac.jp
Abstract— This paper discusses a high-efficiency power
supply developed for implementation under low-voltage andhigh-current conditions for sintering applications such as theSpark Plasma Sintering (SPS) and so on. The proposed system
consists of four 2,500-A units of the power supply connected inparallel. The output voltage of the proposed system is very low
because load resistance is usually very small in SPS
applications. Therefore, on the output side, many circuitcomponents are connected in parallel. Especially, in the
prototype circuit, many schottky barrier diodes are connectedin parallel. As a result, equivalent parasitic capacitance ofthem could not be ignored from the view point of surge voltage.
First, the circuit configuration and the control principle for the
proposed low-voltage, high-current power supply aredescribed. Second, the influence of the parasitic capacitance ofthem and parasitic inductances of each snubber component areclarified by theoretical discussion and simulations. Next, theprototype circuit demonstrates that each individual circuit
yields a balanced output. Moreover, temperature of eachcomponent is measured during long time operation of the
prototype circuit. Finally, it is clarified that experimental
results of the surge voltage on the schottky barrier diode arecorrespond to the theoretical discussion by experiments.
Keywords—AC-DC power converters; snubbers; surge
protection

I. INTRODUCTION
The SPS is known as one of sintering techniques thatcreate contacts and bond between particles by heating
molded powder material which is ceramic and graphite andso on below their melting point. In this method, the molded
powder material is sintered by mechanical pressurization andpulse heating. As a result, the SPS can achieve shortsintering time compared to conventional methods such as apressure less sintering method and a hot pressing method andso on. In this process, the pulse voltage requires a lowvoltage and high-current power supply. A thyristor rectifier
is well known for it as a conventional circuit [1-5]. However,it has low efficiency and input power factor of approximately
60% and 40%, respectively [5]. On the other hand, power
converters using high-speed power semiconductors, such as
IGBT and MOSFET, have been proposed for application insintering power systems in order to improve the efficiency
and also reduce the size [5-8]. In Ref [8], a prototype modelwith an output of 10,000 A has been verified. The prototype
model consists of four unit outputs of 2,500 A connected inparallel. The operation characteristics such as the input
power factor, the efficiency, and the loss distribution havebeen evaluated. However, the output current was DC current
for fundamental operations even though the SPS actuallyrequires pulse voltage for materials.
Generally, material used in the SPS has a small resistance.
Therefore, low voltage is required for the output voltage ofpower supply. For low output voltage, the transformer which
can step down the voltage is used. In addition, the rectifier isconnected the output of the transformer. As a result, thesurge voltage occurs at the rectifier diode of the secondaryside of the transformer [9, 10]. In Ref. [10], only a capacitor
which has a small capacitance is connected to the output
terminal as a snubber capacitor. This snubber circuit is very
simple and low cost. However, adding a capacitor to the
output terminal makes the range of the output voltage control
narrow. If a phase shift control method is applied, the output
voltage is not drastically changed even the phase shift angle
is adjusted when the capacitor is connected to the output
terminal because the capacitor smoothes the output voltage.
Moreover, if the output current is large, a leakage inductanceshould be lower, and the subber capacitance should be larger.
In addition, if a positive output terminal and a negative
output terminal are not closed, the snubber capacitor cannot
be closer connected. Therefore, the snubber circuit used in
Ref [10] is not proper for the SPS which outputs large output
current. For the SPS, a snubber circuit which can be closer
connected to each rectifier diode is more effective.
This paper verifies a system topology wherein a 10,000A pulse output current power converter. First, theconfiguration of the proposed system and control method are
introduced. Secondly, the snubber circuit for the rectifier on
the secondary side of the transformer is analyzed. Next, an
operation of the prototype circuit is experimentallyconfirmed. As a result, it is confirmed that the prototype
circuit can achieve long time operation for the SPS from theexperiment which measures the temperature of IGBTs, aUnit 1=

L1: 0.5 mH
C1, C2: 5800 F
15k
lead

1

3

200V

0
R
1 VRS

T

y

Vinv_out
V-phase

D1

S1

S2

D2

S3

S4

L1
r1
s1

ir2
1

S
15k
lag

30k
lag

x ir3
y 1

ir4
3

VSBD

U-phaseVdc C1 C2

Gate1
Gate3

#1 Gate2#1 Gate4#2 Iout

Unit 3#3 Gate2#3 Gate4#3 Lout#3 Iout#3 Iinv_out

r4
s4
t4
Gate1
Gate3

#2 Lout#2 Iinv_out

r3
s3
t3
Gate1
Gate3

#4 Lout

Unit 4#4 Gate2#4 Gate4

Fig. 1. Circuit configuration of the low-voltage, high-current circuit for sintering.

high frequency transformer, a snubber circuit and so on.
Finally, it is clarified that experimental results of the surge
voltage on the schottky barrier diode are correspond to thetheoretical discussion by experiments.
II. CIRCUIT CONFIGURATION OF THE PROPOSED SYSTEM
A. Circuit Configuration
Fig. 1 shows the circuit configuration of the proposedsystem. This circuit can output 10,000 A due to the four
2,500 A units connected in parallel. Multiple transformers
are connected to the input of the three-phase diode rectifier
in order to reduce the harmonic components from the input
grid current and also to improve the power factor of the grid.
Moreover, snubber circuits are connected to schottky barrier
diodes on the secondary side of the high frequency
transformer in parallel in order to suppress the surge voltage
after the commutation period [9, 10]. It is caused by wiring
inductance including parasitic inductance of copper bus bar
between the output terminal of the prototype circuit and anelectric furnace, leakage inductance and parasitic capacitanceof the schottky barrier diode. At next chapter, the snubber
circuit is theoretically analyzed.

D4#1 Iinv_out
Unit 2#2 Gate2#2 Gate4#1 Iout

D3

r2
s2
t2
Gate1
Gate3

Rout

n = N1/N2

t1

sin 15 x
sin 120 
sin 45y
sin120

ir

x

ir1

SnubberRsn#4 Iinv_out
1#4 Iout

Carrier0
Switching period
Dead-time command
Output current control
Iout*

+
-

PI

Phase shift & Duty calculation
Duty=50%(U phase)
T
Gate1
Dd
Gate3

Dps

Iout
DC magnetization compensation
Dmc
+
PI
0
Iinv_out

Td

Tps(V phase)
Gate2
Gate4

-

LPF

Tps-Tmc
Dead-time: Td = DdT
Phase shift time: Tps = DpsT
DC magnetization compensation time : Tmc = DmcT
Fig. 2. Control diagram of the circuit.

B. Control Strategy
Fig. 2 shows a control diagram of the circuit. For each
unit, the control strategy shown in Fig. 2 is independently
implemented in order to guarantee that each unit output
equal current. The gate signals of the U-phase are always
operated with a 50% duty cycle. The gate signals of the Vphase are operated by phase shift control and duty control.
When DC magnetizing occurs in the transformer due to thevariability of the dead-time and the saturation voltage of theswitch of the inverter, the duty cycle of the gate signals of

(a) Mode I(b) Mode II(c) Mode III(d) Mode IV

the V-phase is controlled in order to suppress the dc
component of the transformer current. The dc component of
the transformer current is detected by the low-pass filter andcompared to zero, which is the command of the DC
component of the transformer current.
III. SNUBBER CIRCUIT FOR RECTIFIER CIRCUIT OFSECONDARY SIDE OF TRANSFORMER
In large output current applications, circuit components
are connected in parallel. Actually, in the prototype circuit,schottky barrier diodes are connected in parallel on thesecondary side of the transformer. Schottky barrier diodes
feature no reverse recovery phenomenon which causes
problems such as a short circuit between an upper switch anda lower switch, and surge voltage. However, due to parasitic
capacitance of the diodes, the problem as mentioned above
may occur even if the schottky barrier diode is used.
Especially, when many devices are used, an equivalentparasitic capacitance is increased. Therefore, in large output
current applications, parallel connection of rectifier diodes
cause the surge voltage due to the parasitic capacitance.
Therefore, proper design methods for the snubber circuits ofschottky barrier diode on the secondary side of thetransformer are needed. In this paper, a RCD snubber circuit
which is connected to each schottky barrier diode isconsidered.
A. Suppression principle of the surge voltage
Fig. 3 shows the operation modes and ideal simulation
waveforms when the surge voltage occurs on the schottky
barrier diode D2. In this paper, the RCD snubber which
consists of a snubber resistor Rsn, a snuber capacitor Csn anda snubber diode Dsn, is considered. It is noted that parasitic
resistance, parasitic capacitance, parasitic inductance except
the leakage inductance and forward voltage of the diodes are
not considered for simplification of the principle of the RCD(e) Each simulation waveform
Fig. 3. Operation modes and ideal simulation waveforms.

snubber circuit. In addition, a load is assumed as current
source because the output resistance is dominant by parasitic
inductance of copper bus bar.
Fig. 3(a) shows the mode I which is the commutation
over lapping period. After the inverter output voltage ischanged, both of diodes D1 and D2 are on-state. Therefore,
the voltage of D2 vSBD2 is almost zero. After Fig. 3 (a), thevoltage of D2 is increased as shown in Fig. 3 (e).
In the mode II (as shown in Fig. 3 (b)), the snubber
capacitor is charged through the snubber diode. From Fig. 3(b), the current of snubber capacitor iCsn2(t) is obtained by (1).

iCsn 2 (t ) 



1
sin 
t
 2l ' C 
2l2 ' / Csn
2
sn 


2v2  Vc (0)where v2 is the voltage of secondary side of thetransformer, Csn is the snubber capacitor, Vc(0) is the initial
voltage of the snubber capacitor, l2’ is the leakage inductance.
When the current of the snubber capacitor iCsn2(t) isreached to zero, the surge voltage of D2 becomes maximum.
From (1), the time t1 which makes the current of the snubber
capacitor zero is obtained by (2)t1  2l2 ' Csn RCD snubber circuit
Rsn



Csn
l2'

Dsn
SBD

Parasitic capacitance Cp(a) RCD snubber circuit considering parasitic capacitance.



Therefore, maximum voltage of D2 when the RCD
snuber is connected is expressed by (3) using the steady
voltage VD2steady and the increment of the surge voltage
VD2surge

VD 2 max 

1 t1
iCsn 2 (t )dt  Vc (0)  VD 2 steady  VD 2 surge
C sn 0

Here, VD2steady and VD2surge are expressed by (4).

VD 2 steady  2V2
VD 2 surge  2V2  Vc (0)After Fig. 3 (b), the snubber capacitor is discharged
through the snubber resistor. In the mode III(as shown in Fig.
3 (c)), the snubber loss occurs.
In the mode IV (as shown in Fig. 3 (d)), D2 is turned on
according to the inverter output voltage. In the mode IV, thesnubber loss also occurs.
B. Influence of parasitic capacitance of SBDs
In high current applications, many circuit components areconnected in parallel. In Fig. 1, many SBDs on secondaryside of the transformer are connected in parallel. As a result,an equivalent parasitic capacitance is increased. In thissection, the influence of the parasitic capacitance of SBDs isinvestigated.
Fig. 4(a) shows the circuit diagram of the RCD snubber
circuit with parasitic capacitance Cp. As shown in Fig. 4(a),the parasitic capacitance exists to the RCD snubber circuit inparallel.
Fig. 4(b) shows simulation waveforms of vSBD2 when theparasitic capacitance is not considered. In contrast, Fig. 4(c)shows simulation waveforms of vSBD2 when the parasitic
capacitance is considered. Comparing Fig. 4(b) and (c), it isconfirmed that the parasitic capacitance mainly affects tovSBD2 in the mode III. This is because the resonance occurs
among the leakage inductance, the snubber capacitor and theparasitic capacitance when the snubber capacitance is(b) Without parasitic capacitance.

(c) With parasitic capacitance.

Fig. 4. Circuit diagram of RCD snubber circuit and simulation waveformsof vSBD2 considering parasitic capacitance.

discharged through the snubber resistor in the mode III.
However, the maximum voltage of vSBD2 is not drasticallychanged because the snubber resistor works as a damping
resistance. Therefore, it is confirmed that the parasitic
capacitance does not drastically affect to the maximum
voltage of vSBD2 by simulation.
C. Influence of parasitic inductanceFig. 5 shows an equivalent circuit considering parasitic
inductance in order to consider the influence of parasitic
inductance when the snubber circuit cannot be closely
connected to SBDs. LR is a parasitic inductance of Rsn, LD isa parasitic inductance of Dsn, and LC is a parasitic inductanceof Csn. It is noted that the parasitic capacitance of SBD isalso considered in this section.
In Fig. 5 (a), when the snubber capacitor is charged, theparasitic inductance of the snubber capacitor LC and that ofsnubber diode LD should be mainly considered. Bothparasitic inductances contribute to vibration of the surge
voltage as a resonance component with the snubber capacitor
in the mode II. On the other hand, influence of the parasitic
inductance of the snubber resistor does not affect in the mode
II because the current does not flow to the snubber resistance.
On the other hand, In Fig. 5 (b), when the snubber
capacitance is discharged, the parasitic inductance of thesnubber capacitance LC and that of the snubber resistance LR
should be taken into account. As mentioned in the section Bof the chapter III, when the snubber capacitor is discharged,
the resonance occurs among the leakage inductance, thesnubber capacitor and the parasitic capacitance. Therefore,
LC and LR affect the resonance. As a result, maximum
current of the snubber resistor could be increased due to LC
and LR.

Fig. 6 shows simulation results when each parasitic
inductance is considered. From Fig. 6(a), it is confirmed that
LR does not affect in the mode II. On the other hand, from
Fig. 6(b), it can be seen that LD greatly affects to vSBD2. As aresult, the maximum value of vSBD2 could be increased. In
addition, the snubber loss is also increased due to thevibration of the current of the snubber resistance because thesnubber resistor works as the damping resistor. From Fig.
6(c), it is confirmed that the maximum value of vSBD2 could
be increased by LC. However, although the vibration of thecurrent of the snubber resistance does not occur in the modeII, the maximum value of the current of the snubber resistor
could be increased.

(a) When the snubber capacitor is charged in mode II.

RCD snubber
circuitIV. EXPERIMENTAL RESULTS
Fig. 7 shows the waveforms of the total output current
and each output current when the square pulse of the current
command which has 50 ms as on time and 50ms as off time
is applied in a parallel operation of four units. Table I showsthe experimental conditions. The total output current iscalculated by adding each output current obtained as acomma-separated value (CSV) data. From Fig. 7, it isconfirmed that each output current is not exactly square
waveform because of inductances of copper bus bar between
the output terminal of the prototype circuit and the electric
furnace.
Fig. 8 shows temperature of each circuit components
during the rated output current operation over three hours atconstant ambient temperature of 26 degrees Celsius. It isnoted that the output current is DC current in order to strictly
test the prototype circuit in this experiment. In an actual SPS,
high-current power supply should keep to output current fora few hours or a few days. From Fig. 8, the temperature of asnubber resistance is around 90 degrees Celsius, which is thehighest in all devices. This temperature increase is due to thesurge voltage of the schottky barrier diode. Temperature of
the secondary winding of the high frequency transformer isaround 80 degrees Celsius because of high output current.
However, it is confirmed that the prototype circuit canachieve long continuous operation for sintering from thetemperature experiment.
Fig. 9 shows waveforms of the inverter output voltage
vinv_out, the voltage of the schottky barrier diode vSBD2 and thecurrent of the snubber resistor iRsn. From Fig. 9, it isconfirmed that the surge voltage occurs on the schottky
barrier diode after the commutation period as mentioned in
the chapter III. It is noted that the capacitance and theresistance of the snubber circuit is not actually designed for
low power loss in this experiment. However, it isexperimentally confirmed that the oscillation of vSBD2 in themode II and III corresponds to the theoretical discussion andthe simulations.
V. CONCLUSION
In this paper, a prototype model was demonstrated withpulse output of 10,000 A in order to apply middle-large
power for application in sintering. The prototype model
consists of four units with output of 2,500 A in parallel. The

LC

Csn

l2'

LR

Rsn

LD

Dsn

SBD

Main current path

Cp(b) When the snubber capacitor is discharged in mode III.
Fig. 5. Equivalent circuit of RCD snubber circuit including parasitic
inductance.
iRsn2
iRsn2
iRsn2
0

0

0
vSBD2

vSBD2

0

0

vSBD2

0

Mode II III
Mode II III
Mode II III(a) LR is considered. (b) LD is considered. (c) LC is considered.
Fig. 6. Simulation result when each parasitic inductance is considered(with parasitic capacitance of schottky barrier diode).
TABLE I.

EXPERIMENTAL CONDITIONS

Items
Total output current Iout
DC reactor L1
Smooth capacitor C1, C2
Switching frequency fsw
Dead time Td
Turn ratio n

Value
10 (kA)
0.5 (mH)
5800 (F)
15 (kHz)4 (s)
n=N1/N2=17

experimental results confirmed that the prototype circuit
outputs pulse current of 7,200 A from the experiment of thelong continuous operation. Moreover, from the temperature
measurement, it was confirmed that the prototype circuit canachieve long continuous operation for sintering. Moreover,the influence of the parasitic capacitance of SBD, theinfluence of the parasitic inductance of each snubbercomponent was theoretically discussed and simulated.
Finally, it was experimentally confirmed that the voltage of
SBD vSBD2 corresponds to the theoretical discussion and thesimulations.

100
Snubber resistance

90

Secondary winding
80
70

Schottky barrier diode

60

IGBT

50
Primary winding
40
Transformer core

30
20

Ambient

1000

One unit operation
At the rated output current condition
1.0
1.5
2.0
2.5
3.5
3.0
Time (hour)

0.5

Fig. 8. Temperature of each circuit components during the rated current
operation over three hours.
250 (V)0(vinv_out)

vinv_out
20 (V)

Fig. 7. Experimental output current waveforms.

0(vSBD2)

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[1]

[2]

[3]

[4]

[5]

[6]

[7]

[8]

[9]

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10 ( s)iRsn2
Fig. 9(b)(a) Whole waveforms.
250 (V)0(vinv_out)

vinv_out
20 (V)

0(vSBD2)0(iRsn2)vSBD2500 (mA)
1 ( s)

iRsn2
Mode

I

II

III

IV

(b) Extended waveform.
Fig. 9. Experimental waveforms of SBD voltage and current of snubber
resistor.
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Characteristics Improvement of Full-Bridge DC-DC Converter with
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