3DIC 2024 Program Schedule
September 25-27, 2024
Conference Venue:
September 25, 2024 at Hotel Metroloplitan Sendai
September 26-27, 2024 at Sendai Kakusai Hotel
SessionLocation
Session
Date
Opening Remark
25-Sep-24
Keynote Talk I
25-Sep-24
Keynote Talk II
25-Sep-24
Coffee BreakInvited Talk I

25-Sep-24
25-Sep-24

as of August 20, 2024

13:00-13:10
13:10-13:50
13:50-14:30

Presentationtime
13:00-13:10
13:10-13:50
13:50-14:30

14:30-14:45
14:45-15:15

14:30-14:45
14:45-15:15

Invited

15:15-15:45
15:45-16:15
16:15-16:45

15:15-15:45
15:45-16:15
16:15-16:45

InvitedInvitedInvited

16:45-17:05

16:45-17:05

4036

Lecture4008

LectureElectrochemical Deposition of Indium Thin-Films for Scalable Jowesh Avisheik Goundar, La Thi Ngoc Mai, Yugi Otake, Yuki Yokohama National University
3D Quantum Chiplets
Mori, Hideo Kosaka, Fumihiro Inoue
3D Stacked Spin Qubit and TCAD Simulations
Tetsufumi Tanamoto
Teikyo University

CHIPS -NAPMP: Overview and Next Steps

Session time

paper_ Category paper_title
idKeynote
KeynoteIBM NorthPole: Brain-Inspired Neural Inference ArchitectureIntertwining Compute with MemoryDevelopment of Hybrid Bonding: Perspectives on Material
Selection, Structural Design, and Applications (Tentative)

Authors

Affiliations

T. Tanaka
Bor-Sung Liang
Takanori Ueda

Tohoku University
MediaTeck
IBM Research Tokyo

Kuan-Neng Chen

National Yang Ming Chiao Tung University

TBD
TBD
Alexandra Shevsky

Fraunhofer EMFT

25-Sep-24

HotelInvited Talk II
Metropolitan
Invited Talk III
Sendai
Session 1: Quantum Technology
Invited Talk IV
Session 1: Quantum Technology

25-Sep-24
25-Sep-24

Session 1: Quantum Technology
Banquet17:05-17:25
18:00-20:00

17:05-17:25
18:00-20:00

26-Sep-24

Keynote Talk III

08:50-09:30

08:50-09:30

Keynote26-Sep-24

09:30-10:00

09:30-10:00

Invited

TBD

10:00-10:30

10:00-10:30

Invited

TBD

10:30-10:45
10:45-11:05

10:30-10:45
10:45-11:05

4016

Lecture11:05-11:25

11:05-11:25

4009

Lecture11:25-11:45

11:25-11:45

4003

Lecture26-Sep-24
26-Sep-24

Session 2: Process Technology for
Hybrid Bonding
Invited Talk V
Session 2: Process Technology for
Hybrid Bonding
Invited Talk VI
Coffee BreakSession 2: Process Technology for
Hybrid Bonding
Session 2: Process Technology for
Hybrid Bonding
Session 2: Process Technology for
Hybrid Bonding
Lunch
Poster Session Core time*

11:45-13:00
13:00-14:30

11:45-13:00
13:00-14:30

4010

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4031

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4037

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4019

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4018

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4007

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4022

Poster

26-Sep-24
26-Sep-24

Poster Session Core time*
Poster Session Core time*

13:00-14:30
13:00-14:30

13:00-14:30
13:00-14:30

4034
4025

PosterPosterPoster Session Core time*

13:00-14:30

13:00-14:30

4021

PosterPoster Session Core time*

13:00-14:30

13:00-14:30

4027

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4014

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4029

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4038

Poster

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4012

Poster26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4006

PosterImpact of 2-Dimensional Materials for 3D Power IC

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

4035

Poster

Thermal Flow Simulation and Measurements of 3D Si Chip
Stacks with TSVs

25-Sep-24
25-Sep-24
25-Sep-24

26-Sep-24

26-Sep-24
26-Sep-24
26-Sep-24
26-Sep-24

26-Sep-24
26-Sep-24

Sendai
Kokusai
Hotel

Poster Session is scheduled on September 24. Poster session core time is 13:00-14:30, September 24.

Superconducting TSVs for quantum computers (Tentative)A Temporary Bonding De-Bonding Tape with High ThermalResistance, Easy Peeling and Excellent TTV for 3DIC
A Novel Transfer Bonding Process with Particle Less Tapesfor Die to Wafer Integration
Advanced Technology Development of Squeeze Effect NonContact Handling Tool for Semiconductor Chips

George Orij

Moeki Nakano, Shigenori Nagahama, Toshio Takahashi, andTakuya Yamamoto
Tomoka Kirihata (1), Masanori Yamagishi (1), Ichiro Sano
(2) Haruka Morita (2), Yusuke Fumita, Shinya Takyu
Hayato HISHINUMA (1), Masaaki MIYATAKE (2), Hiroshi
KIKUCHI (1), Yuta TOBARI (1)

Antioxidative Cu Electrodeposition for 3D Interconnects with Ryo Aizawa (1), Masahiro Sawa (1), Jinta Nampo (1),Hybrid Bonding
Murugesan Mariappan (2), Takafumi Fukushima (2)Room-Temperature and Compressive Force-Free Metal-Metal Jiayi Shen, Chang Liu, Tetsu Tanaka, and Takafumi
Direct Bonding for Heterogeneous Integration of Micro-LED
Fukushima
Array on 3D-IC
Plasma Hydrophilic Treatment for Improved Wafer Bonding
Daiki Nemoto, Kai Takeuchi, Eiji Higurashi
Strength via Polysilazane
Cost-Effective Low-Temperature Hybrid Bonding Using Layer Yu-Lun Liu, Chun-Ta Li, Tzu-Han Sun, Chien-Kang Hsiung,Transfer Technology
and Kuan-Neng Chen
Characteristics of Ozone-Ethylene Radical Pretreatment for
B. Tanaka (1), T. Shino (2), M. Murugesan (1), T. Tanaka
Hybrid Bonding Without Water Rinsing Processes(1), T. Fukushima (1)Detectability of Resistive Open Defects with Analog
Yuya Yamahashi (1), Yuto Ohtera (1), Hiroyuki Yotsuyanagi
Relaxation Oscillators Under Unit-to-Unit Variations of Dies
(1), Shyue-Kung Lu (2), Masaki Hashizume (1)Gate Driver IC for GaN Power Devices Suitable for 3D PowerICDesign Enablement of Heterogenous Integration for 3DIC
3D SRAM Design & Optimization with Open Source Memory
Compiler
Machine Learning-Based Diagnosis of Defects in Chiplet
Interconnects
Creep Behavior of Low-Temperature Sn-in Solder Using
Nanoindentation Test
16-Layer 3D Stacking Based on Self-Assembly Technologyfor HBM Application
Temporary Adhesive Effect on Multichip Thinning for Rapid
Prototyping of 3D-IC from 2D-IC Fabricated in Foundry
Shuttle Services
Activation of Copper Surfaces by VUV-Redox Method Using aXenon Excimer lamp
Clean Dicing: an Alternative Blade Dicing Technique for
Minimising Particles in 3D Heterogeneous Integration

National Advanced Packaging Manufacturing Program(NAPMP)SEKISUI CHEMICAL CO., LTD ,{1} LINTEC Corporation{2} TAZMO CO.,LTD.
(1) Yamaha Robotics Holdings Co., Ltd. (2) (2) TokyoUniversity of Science(1) JCU Corporation(2) Tohoku UniversityTohoku UniversityTohoku University
National Yang Ming Chiao Tung University(1) Tohoku University(2) MEIDEN NANOPROCESS INNOVATIONS(1) Tokushima University(2) National Taiwan University of Science and Technology

Yusuke Ohgush (1) and Satoshi Matsumoto (1) (2)(1) Kyushu Institute of Technology(2) Tokyo Metropolitan University
Ahmed Hossam-ELdeen, Sudipta Das, Giuliano Sistoimec
Sunan Chen (1), Chao Wu (2), Yuan Guan (2), Yuanqing(1) Beihang University
Cheng (1)(2) Beijing Smartchip Microelectronics Technology Co.,Ltd.
Junming Li , Huaguo Liang, Xianrui Dou, Le Yu , Zhengfeng Hefei University of Technology
Huang, Yi ngchun Lu, Cuiyun Jiang
Shunya Nitta, Hiroaki Tatsumi, Hiroshi Nishikawa
Osaka University
ZEHUA DU (1), Hiroshi Kikuchi (2), Hayato Hishinuma (2), (1) Tohoku University
Tetsu Tanaka (1), Takafumi Fukushima (1)(2) Yamaha Robotics Holdings Co. Ltd.
Akihiro Tominaga, Jiayi Shen, Chang Liu, Tetsu Tanaka and Tohoku University
Takafumi Fukushima
S. Endo, A. Shimizu

Ushio Inc.,

Akito Hiro, Damien Jon Leech, Geert Schoofs, JohnSlabbekoorn, Alain Phommahaxay, Koen Kennes, GeraldBeyer, Eric Beyne
Ayano Furue (1), Masataka Hasegawa (2), and Satoshi
Matsumoto (1) (3)imec

Shuhei Yokota , Rikuu Hasegawa , Kazuki Monta, Takaaki
Okidono, Takuji Miki , Makoto Nagata(1) Kyushu Institute of Technology(2) AirMembrane Corporation(3) Tokyo Metropolitan University
Kobe Unversity

13DIC 2024 Program Schedule
September 25-27, 2024
Conference Venue:
September 25, 2024 at Hotel Metroloplitan Sendai
September 26-27, 2024 at Sendai Kakusai HotelSession
Location
Session
Date
Poster Session Core time*
26-Sep-24

13:00-14:30

Presentationtime
13:00-14:30

26-Sep-24

Poster Session Core time*

13:00-14:30

13:00-14:30

26-Sep-24

14:30-15:15
15:15-15:30
15:30-16:00

14:30-15:15
15:15-15:30
15:30-16:00

26-Sep-24

Panel Session
Coffee BreakSession 3: Advanced Interposers
Invited Talk VII
Session 3: Advanced Interposers

16:00-16:20

16:00-16:20

26-Sep-24

Session 3: Advanced Interposers

16:20-16:40

26-Sep-24

Session 3: Advanced Interposers

as of August 20, 2024

Session time

paper_ Category paper_title
Authors
Affiliations
id4033
Suppression of TSV-Induced Stress by Using Negative
Hisashi Kino (1), Takafumi Fukushima (2), Tetsu Tanaka (2) (1) Kyushu University
Poster
Thermal Expansion Material(2) Tohoku University
4030
TSV Formation Using a Direct Cu Electroplating on Electroless Y. ISHII, T HAMAMURA, T. S HIMIZU T. ITO , and S.
Kansai University
PosterPlated Barrier Layer with a Low Resistivity
SHINGUBARA
CAD tools for 3DICPaul D. Franzon
North Carolina State University
Panel
InvitedFO-PLP Technology for HPC (Tentative)

Ole Hölck

4011

LectureProcess Development for a Novel low-Loss Photo Imageable
Dielectric in an RF Silicon Interposer Platform

Hamideh Jafarpoorchekab, Xiao Sun, Angel Uruena,
imec
Siddhartha Sinha, Nelson Pinho, Andy Miller, Nadine Collaert

16:20-16:40

4015

Lecture16:40-17:00

16:40-17:00

4013

Lecture17:00-17:10
17:10-17:40

17:00-17:10
17:10-17:40

H.L. Cheng, J.Y. Lin, T.C. Hsu, C.Y. Peng, Felix Tsui and S.F. TSMC
Huang
Akihiro Shimizu (1), Kazuhiro Fukada (2), Shinichi Endo (1), (1) Ushio Inc.
Mitsunori Abe (3), Akiko Matsui (3)(2) Shibaura Machine Co.
(3) NTT Devices Cross Technologies Corporation

Invited08:50-09:20

08:50-09:20

Invited27-Sep-24

Coffee BreakSession 4: Application
Invited Talk VIII
Session 5 Thermal Management
Invited Talk X
Session 5: Thermal Management

Ultra-High Density Deep Trench Capacitor (DTC) for 3DIC
Integration
Direct Sputtering Copper Seed Layer Formation Method onLow Dielectric Resin That Achieves Low Transmission Loss
Up to 100 GHz in high-Frequency Transmission Circuit

09:20-09:40

09:20-09:40

4032

Lecture27-Sep-24

Session 5: Thermal Management

09:40-10:00

09:40-10:00

4026

Lecture27-Sep-24

Coffee BreakSession 6: Bumpless and HybridBonding Technology

10:00-10:15
10:15-10:35

10:00-10:15
10:15-10:35

4002

LectureFace-Down and Heterogeneous Chip Bonding Technology on Yoshiaki Satake (1)(2), Tatsuya Funaki (1)(2), Wataru Doi
Waffle Wafer for Bumpless Chip-on-Wafer (COW) Package(1)(2), Hajim e Kato (2)(3), S hogo Okita (2)(3), Takayuki
Ohba (2)(1) Murat a Manufacturing Co., Ltd.
(2) Tokyo Institute of Technology(3) Panasonic Connect Co., Ltd.

Session 6: Bumpless and Hybrid
Bonding Technology
Session 6: Bumpless and Hybrid
Bonding Technology

10:35-10:55

10:35-10:55

4020

LectureNational Yang Ming Chiao Tung University

10:55-11:15

10:55-11:15

4017

LectureLow-Temperature Adhesive Hybrid Bonding Technology with
Novel Aera-Selective Passivation Layer
Die-to-Wafer Hybrid Bonding Impact at mm-Wave
Frequencies

27-Sep-24

Session 6: Bumpless and Hybrid
Bonding Technology

11:15-11:35

11:15-11:35

4028

LectureImpact of Cu Pad Density on Cu-CMP and Bonding Yield for
Chip-to-Wafer Hybrid Bonding

27-Sep-24

11:35-11:55

11:35-11:55

4024

Lecture11:55-12:10

11:55-12:10

Cost-Effective Low-Temperature Hybrid Bonding Using Layer Wei Ting Chen Chih Hsien Chiu, and Jenn Ming Song
Transfer Technology

27-Sep-24

Session 6: Bumpless and HybridBonding Technology
Award Ceremony and Closing
RemarkNanoTerasu Visit in Japanese

14:00-15:00

14:00-15:00

27-Sep-24

NanoTerasu Visit in English

15:00-16:00

15:00-16:00

26-Sep-24

26-Sep-24
27-Sep-24

27-Sep-24
27-Sep-24

27-Sep-24

Sendai
Kokusai
Hotel

Poster Session is scheduled on September 24. Poster session core time is 13:00-14:30, September 24.

Fraunhofer IZM

TBD
Power, Thermal and Noise Characterization of Stacked
Processors for Ai Systems (Tentative)
A Novel Multi-Chip Cooling System Using Direct On-Chip Jet
Impingement for High-Performance Interposer Packages
Thermal Analysis of Reflow Process for PIC-Embedded
Package Substrate with 2.3D RDL Interposer for CoPackaged Optics

Eren Kursun

Columbia University

Akshat Patel, Tiwei Wei

Purdue University

A. Noriki (1), H. Uemura (2), H. Kuwatsuka (1), N. Matsui(1) National Institute of Advanced Industrial Science and(2), R. Motoji (2), D. Maeda (2), T. Sugita (2), F. Nakamura Technology (AIST)(1), T. Amano (1)(2) Kyocera Corporation

Tzu-Han Sun, Yu-Lun Liu, Chun-Ta Li, Wen-Tzu Tsai, MuPing Hsu, and Kuan-Neng Chen
Mohammad Alsukour (1) (2), Olivier Valorge (1), Margot
Faure (1), Loïc Vincent (3), Victor Milon (4), Pascal
Chevalier (4) Jean Daniel Arnould (2), Emmanuel Pistono(2), Christophe Dubarry (1)M. Murugesan (1), H. Hashimoto (1), K. Mihara (2), F.
Inoue (3), A. Uedono (4), T. Hare (2), T. Fukushima (1)(1) CEA LETI, Univ. Grenoble Alpes(2) TIMA(3) CIME, Univ. Grenoble Alpes, CNRS
(4) STMicroelectronics(1) Tohoku University(2) Toray Engineering Co. Ltd.
(3) Yokohama National University(4) The University of Tsukuba
National Chung Hsing University2