ELECTRONICS

Development of Via Connection Technology with
Conductive PasteYoshio OKA*, Takashi KASUGA, Hiroshi TOMIOKA, Sumito UEHARA, Jin Joo PARK,Naota UENISHI and Yasuhiro OKUDA

Flexible printed circuit (FPC) boards need to have fine pitch patterns for lighter, thinner, and smaller electronicequipment, and connection technology for metal layers (other than copper) is required for FPC diversification.
Conductive paste via connection technology offers advantages for manufacturing fine pitch FPC boards and can beapplied to non-copper metal layers. The authors have developed highly reliable via connecting technology using
conductive paste containing silver nano particles.
Keywords: FPC, conductive paste, nano particle, via connecting

1. Introduction
Flexible printed circuit (FPC) boards need to havefine pitch patterns for lighter, thinner, and smaller electronic equipment.
Since FPC development started in the research sectionin 1969, Sumitomo Electric Industries, Ltd. has developed
products which meet the needs of the electronics industry
through the development of specific technologies basedon its creativity and copper wire production technology(1).
In recent years, with the progress of digitization, compact and lightweight electronic apparatus with advanced
features has been developed, and accordingly, highly functional products using fine pitch flexible printed circuit(FPC) boards are needed.
To cope with this need, we have developed a high conductive paste which uses our original nano electric conductive particles and high reliability connection technology formetal layers with a small diameter via and non-conductive
layers made from metal other than copper.

2. Paste Connection Technology
2-1 Connection technology using conductive paste
In a double-sided FPC, a copper layer covers bothsides of the core polyimide (PI) film, and conduction isnormally achieved through the copper plating of holesthat pass through the core layer between the copper layers. This method is called plated-through hole (PTH). It
consists of four processes: NC drilling, non-electrolytic
plating, electrolytic plating, and circuit formation by etch
process (Fig. 1(1)). The method has disadvantages in fine
pitch circuit formation because the copper layer becomes
thick.
On the other hand, paste connection technology consists of three processes: circuit formation by etch process,via formation by laser or other devices, and printing using
conductive paste with conductive filler and resin (Fig. 1(2)).
Therefore this method has advantages in fine pitch circuit

106 · Development of Via Connection Technology with Conductive Paste

CopperPolyimide
CopperElectrolesscopperplating

Drilling

CopperPolyimide
CopperCircuit formation

Electroless copper plating
Laser drilling

Electrolytic
copperplating

Electrolytic copper plating

Conductive paste

Circuit forming

Paste printing(1) Plated-through hole(2) Paste blind-via holeFig. 1. Conceptual diagram of interlayer connecting process

patterning, because the copper thickness is the same as theoriginal substrate.
2-2 Conductive paste
We have established a metal nano-particle manufacturing process using our innovative liquid phase process
based on the plating technology. Eliminating the use of avacuum system, this process manufactures uniformly-sizedparticles at a low cost(2).
Nickel nano-particles and silver nano-particles have already been used in anisotropic conductive film (ACF) andconductive ink for printed wiring material(3), (4).
Paste via connection technology using conductive
paste with nano silver particles (Photo 1) and micron-sized
conductive particles has high reliability performance as described later in this paper.
The mixing ratio of resin, additives and the conductive
particles of the conductive paste has been optimized. At astage of material design, improvement of ion migrationand compliance with the RoHS directive and other environmental regulations were taken into consideration.

Paste via

Polyimide
CopperPolyimide
Stainless steel

Fig. 2. Institute of evaluation test sample (daisy chain pattern)
via /land diameter =ø60µm/ø120µm

50nm

Photo 1. TEM observation of silver nanoparticles

Change ratio of resistance

2-3 Via-filling using conductive paste
Photo 2 and 3 show a cross section of blind via holes(hole diameters are 60 µm and 40 µm) by screen printing
using conductive paste, and the vias are filled up with theconductive paste. Photo 4 shows the interface of the conductive paste and stainless steel. There is no intervention
layer and it is connected well.

first conductive layer is made of copper, and second one ismade of stainless steel. We measured the total resistanceof the entire vias and circuits.
(2) Heat shock test
This sample was tested by a thermal shock testing machine which was set at -40 degrees Celsius as the lowest temperature and 125 degrees Celsius as the highest temperature,
to evaluate the change in resistance. The result is shown inFig. 3. The resistance remained unchanged after being exposed to a heat shock.

Photo 2. Cross section of ø60µm blind
via using the conductive paste

40％-40℃ 15min ~ 125℃ 15min

3840 vias

20％
0％
-20％
-40％

0100

200300400500

Number of exposure cycle

Photo 3. Cross section of ø40µmblind via using the conductive paste

Fig. 3. Connection reliability in heat shock test(3) High temperature and humidity test
Figure 4 shows the test results at a high temperature(85 degrees Celsius) and high humidity (85%). The resistance remained unchanged after being exposed to the hightemperature and high humidity.

Conductivepaste

0.2µm

Photo 4. Interface of conductive paste and stainless steel

2-4 Reliability(1) Evaluation test sample
Evaluation of reliability test was carried out using anevaluation test sample which has a cross-sectional structure
as shown in Fig. 2.
This sample has blind via holes (hole diameter is 60µm), and circuits form a daisy chain pattern, in which theChange ratio of resistance

Stainlesssteel

40％85˚C85%3840 vias

20％0％-20％-40％

0200

400

600

800

1000

Exposure time (hour)Fig. 4. Connection reliability in high temperature and humidity test

SEI TECHNICAL REVIEW · NUMBER 75 · OCTOBER 2012 · 107

The Highly Accelerated temperature and humidity
Stress Test (HAST)*3 (120 degrees Celsius, 85%, 96 h) wasalso carried out for the same sample. The resistancechanged by 1% during HAST.
(4) Heat resistance evaluation
In order to evaluate their heat resistance in the atmosphere, the test samples were subject to high temperatures(300, 325, 350 and 400 degrees Celsius). When the resistance increased to 20% or higher, the product was regarded
as having reached the end of service life. Figure 5 shows anArrhenius plot of the heat test result. At 150 degrees Celsius, at least 10 years or more of life expectancy can be expected, and this connection technology shows high heat
resistance reliability.

1.E+06100yearsLife (hour)

10years
1.E+04(6) Flex resistance
Even in conventional plated-through holes, an interlayer connection portion is not used for the bending portion. In order to evaluate the tolerance to mechanicalstrains, the following experiments were conducted. Figure
7 shows the diagrammatic illustration of this bending test.
We used bending jigs which are made of brass and havecurvature radius of 1, 2, 3 and 5 mm. The sample was slid
along the jig (see Fig. 7). The procedure of the experimentis as follows: (1) the stainless steel side of the sample isarranged inside and slid along the jig and (2) the stainlesssteel side of the sample is arranged outside and slid along
the jig. The operation (1) and (2) were carried out 6 times(24 times of bending in total).
Figure 8 shows the result of this bending test. This conductive paste via has a high reliability for mechanical strain
as there is little resistance change after the test.
As shown in the above mentioned test results, our connection technology using the conductive paste shows highreliability with good resistance to high temperature, humidity, ion migration, and bending.

1years300˚C

1.E+02

Test sample
325˚C
350˚C
400˚C

1.E+000.001

200˚C 150˚C

100˚C

Metal plate
0.002

0.003

R=1, 2, 3, 5

1/T (K )-1Fig. 7. Diagrammatic illustration of the bending test(5) Ion migration evaluation
A DC voltage of 18 V was applied to the neighboring
circuits (15 µm space) including conductive paste vias (diameters are 60 µm and 120 µm). Insulation resistance wasalso monitored. As shown in Fig. 6, its insulation resistanceremained over 10GΩ for 500 hours. This result means thatour via connection technology has superior insulation reliability.

Change ratio of resistanceFig. 5. Test result of heat resistance test

40％20％0％-20％-40％0246Bending radius R (mm)Insulation resistance (ohm)

1.0E+12Fig. 8. Result of the bending test

1.0E+0985˚C 85% RH, 18V

3. Conclusion

1.0E+06

1.0E+03

1.0E+00

0100

200

300

400500

Exposure time (hour)Fig. 6. Insulation reliability at high temperature and humidity test

108 · Development of Via Connection Technology with Conductive Paste

We have developed a conductivity paste which uses theoriginal nano electric conduction particles and our compound material technology. By using this paste, small diameter via holes can be filled well and via holes with
non-copper metal layers can be connected. This interlayer
connection shows high reliability in the tests of heat shock,heat resistance, constant temperature and humidity, ion
migration, and bending.

Technical Terms
1
RestrictionofHazardous
Substances (RoHS): The di*rective on the restriction of the use of certain hazardous
substances in electrical and electronic equipment.
*2 Daisy Chain Pattern: A bumper-to-bumper wiring
method which connects multiple sites.
*3 Highly Accelerated temperature and humidity Stress
Test (HAST): A steam test conducted in a non-saturating autoclave for testing reliability of electronic components under temperature and humidity stress.

(1)

(2)

(3)

(4)

References
Masayuki Kanehiro, Shuji Kashiwagi, Kouki Nakama, Juichiro Nishikawa,
Hideo Aramaki, “Development of Sumitomo Electric’s Flexible Printed
Circuit business,” SEI Technical Review, P.4-13, No.66 (2008)
Masatoshi Majima, Keiji Koyama, Yoshie Tani, Hideaki Toshioka, Misako
Osoegawa, Hideaki Kashihara, Shinji Inazawa, “Development of Conductive Material Using Metal Nano Particles,” SEI Technical Review,
P.25-27, No.54 (2008)
Hideaki Toshioka, Kyouichirou Nakatsugi, Masamichi Yamamoto,Katsuhiro Sato, Naoki Shimbara, Yasuhiro Okuda, “Development ofAnisotropic Conductive Film for Narrow Pitch Circuits,” SEI Technical Review, p.40-44, No.73 (2011)
Issei Okada, Kouhei Shimoda, Takeshi Miyazaki, “Development ofFine Circuit Pattern Formation Process Using Nano-Metal Ink,” SEI
Technical Review, p.54-57, No.62 (2006)

Contributors (The lead author is indicated by an asterisk (*).)

Y. OKA*• Group Manager, Electronics & Material
R&D Laboratories
Engaged in the research and development of FPCs.

T. KASUGA• Assistant Manager, Electronics & Material R&D Laboratories

H. TOMIOKA• Sumitomo Electric Printed Circuits, Inc.

S. UEHARA• Assistant Manager, Sumitomo Electric Printed Circuits, Inc.

J. J. PARK
• Manager, Sumitomo Electric Printed Circuits, Inc.

N. UENISHI• General Manager, Development Department, Sumitomo
Electric Printed Circuits, Inc.

Y. OKUDA• Ph.D
Department Manager, Electronics & Material R&D Laboratories

SEI TECHNICAL REVIEW · NUMBER 75 · OCTOBER 2012 · 109