AN12893

Using the DC-DC Feature
Rev. 0 — 30 June 2022

Application note

Document information
Information

ContentKeywords

JN5189, QN9090, K32W, DCDC

Abstract

This document outlines critical parameters for DC-DC external component
selection and implication of incorrect component selection.

AN12893

NXP Semiconductors

Using the DC-DC Feature

1

Introduction
This application note provides a hardware design guide for the DC-DC converter on theJN5189, QN9090, and K32W devices. It explains how to choose external components
for the DC-DC converter properly. The document focuses on the critical parameters ofexternal components and their implication of incorrect selection, including a PCB design
example of the external component.

2Theory and uses of DC-DC converters
DC-to-DC converters are used in portable electronic devices such as cellular
phones and laptop computers, which are supplied with power from batteries primarily.
Such electronic devices often contain several subcircuits, each with its own voltage
level requirement different from the one supplied by the battery or an external supply,
sometimes higher or lower than the supply voltage. Additionally, the battery voltage
declines as its stored energy is drained. Switched DC-to-DC converters offer a method
to increase the voltage from a partially lowered battery voltage instead of using multiple
batteries to accomplish the same thing. This method saves space.
Most DC-to-DC converter circuits also regulate the output voltage. Some exceptions
include high-efficiency LED power sources, a kind of DC-to-DC converter that regulates
the current through the LEDs and simple charge pumps that double or triple the output
voltage.
Switching converters, such as buck converters in JN5189, QN9090, and K32W, provide
much greater power efficiency as DC-to-DC converters than linear regulators. Theselinear regulators are simpler circuits that lower voltages by dissipating power as heat but
do not step up output current.
Warning:
The DC-DC function is bypassed by removing the inductor and mounting a series resistor
to VBAT on the JN5189, QN9090, or K32W OM15069 module, as shown in Figure 1.
However, this mode is not allowed and NXP does not support this mode.

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Using the DC-DC Feature
JN5189 ANTENNA MODULE - OM15069-2

C1J1
SMC_UFL

RSTN

10uF

C10100nF

C1247pF

PIO_21_SPIFI_IO1
PIO_20/SPIFI_IO2
PIO_19/SPIFI_IO0
PIO_18/SPIFI_CLK
PIO_17/SPIFI_IO3

Reference design
JN5189 ANTENNA MODULE

VDD

GND

M10 - M13x

R2NC

L4

L10R

35
C13100nF

C1447pF
363738

LB

39LA

40

VSS_RF(1)RF_IO
VSS_RF(2)
LB/NC
LA/NC

1PIO21/ACM
PIO20/ACPPIO19/ADC5PIO18/ADC4
PIO17/ADC3VDD

25242322212726TRST

RSTN

2830
VSS_DCDC

29VDD_RADIO

20C111918171615141312100nF

PIO_16/SPIFI_CSN
PIO_15/ADC1
PIO_14/ADC0
PIO_13/SWDIOPIO_12/SWCLK
PIO_11/I2C0_SDA
PIO_10/I2C0_SCL
PIO_9/USART0_RXD

PIO0PIO1PIO2PIO3PIO4
PIO5/ISP_ENTRY
PIO6
PIO7
PIO8/TXD0

3.3nH

C21NC

PIO16/ADC2
PIO15/ADC1
PIO14/ADC0
PIO13/SWDIOPIO12/SWCLK
PIO11
PIO10
PIO9/RXD03456789101150 Ohms

R5VSS (Exposed die pad)

50 Ohms

0R

C25
2.0pF

L2413C24
1.2pF

VDDE

JN5189_40

XTAL_32k_N

XTAL_Nin34

VDD_PMUXTAL_32k_P

XTAL_PNC

1GND

R333FB

250 Ohms
NC

R4ANT132
X132.768Khz
X2LX

U1C1910uF 31C20NC

VBAT

2

134.7uHY132.000Mhz
34

PIO_0/SPI1_SCK
PIO_1/SPI1_MISO
PIO_2/SPI1_MOSIPIO_3/SPI1_SSELN0
PIO_4/PWM4-PU
PIO_5/ISP_ENTRY
PIO_6/PWM6-PD
PIO_7/PWM7-PD
PIO_8/USART0_TXD12Figure 1. Location of the resistor for bypass mode (do not populate)

3Hardware design guideThis chapter summarizes the hardware requirements for external components used fora proper functionality of the DC-DC internal converter. It contains the recommendation ofappropriate component selection and the PCB drawing.
The JN5189, QN9090, and K32W family consist of internal regulators including the DCDC converter, which are supplied by the main external supply domain with VBAT of 1.9
V – 3.6 V. Figure 2 shows the connection of all the external components and the MCUrequired for proper DC-DC functionality.
C7100 nF

VDDE

VDD_RADIOVDD_PMU

VBAT
C210 F

C3100 nF

C447 pF

C647 pF

FB

JN5189/
QN9090/K32W0

VSS_PMU

LX

L14.7 HC110 F

C5100 nF

VSS_DCDC

Figure 2. External parts

Table 1 summarizes the pin names and numbers for all packages.
Table 1. List of pin names and numbers for internal DC-DC converter
Pin Name
Pin number (HVQFN40)VBAT28VDD_PMU
32
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Using the DC-DC Feature
Table 1. List of pin names and numbers for internal DC-DC converter...continued
Pin Name
Pin number (HVQFN40)
VDD_RADIO
35
VDDE
20
VSS_DCDC30
VSS_PMU
LX
29
FB
31

Table 2 summarizes the values and limitations for the external components of the DC-DCinternal converter.
Table 2. External parts
PartMinimum
C110
C210C380
C438.7
C580
C638.7
C780
L13.87Type
22 (X5R or X7R)
22 (X5R or X7R)
100 (X5R or X7R)
47 (COG)
100 (X5R or X7R)
47 (COG)
100 (X5R or X7R)
4.7Maximum
47
47
120
56.2
120
56.2
120
10Unit
μF
μF
nF
pF
nF
pF
nF
μH

3.1 Input decoupling capacitors
The 100 nF and 47 pF ceramic capacitors are the input decoupling capacitors for the DCDC converter. The 10 μF or 20 μF input ceramic capacitor is used to decouple and power
the internal DC-DC converter. All the decoupling capacitors must be placed close to thepin. For the capacitors, there is no Equivalent Series Resistance (ESR) value restriction.

3.2 Output filter capacitor
This capacitor sets the voltage ripple value, which is essential for USB power supply
requirements. A minimum value of the output capacitor is 10 μF and is necessary for thecorrect functionality of the DC-DC converter.
If the value of the output capacitor is below 10 μF, the voltage ripple is higher, and it does
not meet the requirements of internal LDO. Values higher than the typical 22 μF increase
possible noise current.

3.3 Power inductor
The typical inductor value for most applications is from 3.7 μH – 5.6 μH. Those values
are chosen based on the desired ripple current.
At the expense of higher output-voltage ripple, small-value inductors result in a higher
output current slew rate, improving the load transient response of the converter. The
higher the values of inductors, the lower the ripple current, reducing the core magnetic
hysteresis losses.
Table 3 summarizes the values and limitations of the power inductor.

AN12893

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Using the DC-DC Feature
Table 3. Power inductor
Parameter
Minimum
Inductance value
3.7Saturation current
350

TypeMaximum
5.6-4.7500

Unit
μHmA

3.3.1 Saturation current limitation
The minimum value of the saturation current is 350 mA. The recommended saturation
current is 500 mA or higher.

3.4 PCB guide line
To reduce the series resistance from the DC-DC inductor, keep the traces as thick and as
short as possible. The ground between the inputs of capacitors C2, C3, C4, the DC-DC
ground pads, and the output capacitor C1 must be on the same plane. It is not possible
to use a via or a strap connection.
Figure 3 shows a proper DC-DC ground connection.

C5C1C6L1C4C3C2C7

Figure 3. Ground connection

4Conclusion
This application note summarizes all external components and PCB recommendationsof the internal DC-DC converter used in JN5189, QN9090, and K32W. For proper

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Using the DC-DC Featurefunctionality, follow these recommendations in your designs with JN5189, QN9090, andK32W.
Efficiency is often the main design goal when using a DC-DC converter. Using theDC-DC converters increases the conversion efficiency from battery voltage to a low
supply voltage. Even though a linear regulator can be used, it cannot achieve the same
efficiency as switching regulators.

5Revision history
Revision history
Rev.
Date030 June 2022

AN12893Application note

Description
Initial release

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Using the DC-DC Feature

6

Legal information

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Contents
12
3
3.1
3.2
3.3
3.3.1
3.4
4
5
6Introduction ......................................................... 2
Theory and uses of DC-DC converters ............. 2Hardware design guide ...................................... 3
Input decoupling capacitors ............................... 4
Output filter capacitor ........................................ 4
Power inductor ...................................................4
Saturation current limitation ............................... 5
PCB guide line .................................................. 5Conclusion ...........................................................5
Revision history .................................................. 6
Legal information ................................................ 7

Please be aware that important notices concerning this document and the product(s)described herein, have been included in section 'Legal information'.

© NXP B.V. 2022.

All rights reserved.

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Date of release: 30 June 2022
Document identifier: AN12893