Nuclear Instruments and Methods in Physics Research A 731 (2013) 266–269

Contents lists available at ScienceDirect

Nuclear Instruments and Methods inPhysics Research A
journal homepage: www.elsevier.com/locate/nima

Development of the Pixel OR SOI detector for high energy
physics experiments
Y. Ono a,n, A. Ishikawa a, H. Yamamoto a, Y. Arai b, T. Tsuboyama b, Y. Onuki c, A. Iwata d,T. Imamura d, T. Ohmoto da

Tohoku University, Aramaki, Aoba-ku, Sendai 980-8578, Japan
Institute of Particle and Nuclear Studies, High Energy Accelerator Research Org., KEK, Tsukuba 305-0801, JapancTokyo University, Hongo, Bunkyo-ku, Tokyo 113-0033, Japan
dA-R-Tec Corp., Hiroshima Techno Plaza 405, 3-13-26 Kagamiyama, Higashi-Hiroshima 739-0046, Japanbart ic l e i nf oa b s t r a c t

Available online 20 June 2013

A Silicon-On-Insulator (SOI) Technology is suitable for vertex detectors for high energy physics
experiments since complex functions can be fabricated on the SOI wafer with a small amount ofmaterial thanks to the monolithic structure. We developed a new sensor processing scheme “PIXOR(PIXelOR)” for pixel detectors using a LAPIS 0:20 μm SOI process.
An analog signal from each pixelated sensor is divided into two dimensional directions, and 2n signal
channels from a small n by n pixel matrix are ORed as n column and n row channels, then the signals areprocessed by a readout circuit in each small matrix. This PIXOR scheme reduces the number of readout
channels and avoids a deterioration of intrinsic position resolution due to large circuit area, that was acommon issue for monolithic detectors. This feature allows high resolution, low occupancy and onsensor signal processing at the same time. We present the successful results of the PIXOR readout
scheme using a ﬁrst prototype.
& 2013 Elsevier B.V. All rights reserved.

Keywords:SOI
Pixel detector
High energy physics experiment

1. Introduction
In high energy physics experiments, a vertex detector plays animportant role to identify b/c quarks by measuring impact parameters of tracks from short-lived heavy hadrons. Vertex detectors
require(1) High point resolution(2) Low occupancy(3) Low material budget(4) Radiation tolerance(5) Low power consumption
and generally semiconductor detectors are used since the characteristics are suitable for the requirements.
One of the candidates is a silicon-on-insulator pixel detector(SOIPIX) which utilizes a substrate layer as a radiation sensor [1].
The SOIPIX consists of three layers, a substrate sensor layer, an SiO2layer called buried oxide (BOX) layer, and a CMOS circuit layer (Fig. 1).
The substrate and CMOS circuit layers are insulated by BOX layer. If aparticle penetrates the SOIPIX, electron–hole pairs are created in thenCorresponding author. Tel.: +81 22 795 5730.
E-mail address: ono@epx.phys.tohoku.ac.jp (Y. Ono).

0168-9002/$ - see front matter & 2013 Elsevier B.V. All rights reserved.
http://dx.doi.org/10.1016/j.nima.2013.06.044

substrate layer. The signal charges drift to and are collected bythrough-silicon vias, which electrically connect the substrate andcircuit layers, and then processed by the circuit. Thanks to thismonolithic structure, problems in hybrid silicon detectors can besolved and the performance as vertex detectors is improved.
Since a standard sub-micron CMOS process is used for SOIPIX(1) high point resolution with ﬁne pixel is achievable (detail will
be discussed in Section 2). Fine pixel and faster signal processing
allow (2) low occupancy even if the vertex detector is located atvery close to interaction point. The monolithic SOIPIX is (3) low
material compared with hybrid vertex detector which has bumpbondings connecting sensor layer and circuit layer. Concerning(4) radiation tolerance, the probability of single-event-effect (SEE)
is very small thanks to thin active-layer, however total-ionizingdose (TID) effect still needs some improvement for applications inhigh radiation environment [2] (we have some possible solutions
for TID effect). Finally, (5) low power consumption is achievable
due to low leakage current and small parasitic capacitance.
The feature of pixel detectors which have readout chip onsensor also allows the use of more intelligent signal processing ineach pixel simultaneously. Moreover, a high signal-to-noise ratio,
granted by the low sensor parasitic capacitance, may reduce itssensor thickness considering minimum ionizing detection.
The paper is organized as follows. In Section 2, we introduce
the new signal processing scheme called “PIXOR”. Then we explain

Y. Ono et al. / Nuclear Instruments and Methods in Physics Research A 731 (2013) 266–269

267< 1 pixel circuit >shaperPre-amp

Discriminatorpixel array

Fig. 1. Structure of the SOIPIX. The thickness of Si-sensor, BOX layer and CMOS
circuit are 50−725 μm, 0:20 μm and 0:04 μm, respectively.

the ﬁrst prototype of the PIXOR chip in Section 3, and report its
evaluation results in Section 4. Finally we summarize the prototype PIXOR chip in Section 5.

2. PIXOR scheme
In general, to obtain 2-dimensional position of a penetrating
particle, two kinds of sensor shape can be considered, strip andpixel. In very high radiation environments, pixel detectors should
be used since the occupancy is much smaller than that of strip
detectors. However, the position resolution for conventional pixel
detectors is as not good as that of strip detectors. To avoid theproblem, a new sensor processing scheme Pixel OR (PIXOR) wasdeveloped.

Fig. 2. Schematic view of chip-on-sensor. Each pixel has each readout circuit.

SuperPixel

readout circuitSensor
nodexy2.1. Limitation of pixel detectors with chip-on-sensor
In high energy physics experiments, data are usually taken
when trigger signals are issued. Thus each detector should have atrigger receiver. For conventional chip-on-sensor pixel detectors,
each pixel has its own readout circuit and trigger receiver. Since
the readout timing is synchronized with the trigger, occupancy canbe small enough. However, position resolution is limited by pixel
size which is constrainted by circuit area on each pixel (Fig. 2). Oneof the merits of SOIPIX is that complex functionalities can be
fabricated with a standard CMOS process. If complicated circuitry
is included in each pixel, the pixel size becomes much larger andthe position resolution becomes worse. There are pixel detectors
with rectangular pixel shape to improve the resolution in theshorter side's direction but these sacriﬁce the position resolution
in the longer side's direction [3–5].

Fig. 3. Conceptual view of PIXOR (4  4 Super Pixel case). A charged particle
penetrates the green pixel. The signal is divided into X(blue)/Y(red) directions. In
this ﬁgure, readout circuit is not shown. (For interpretation of the references tocolor in this ﬁgure caption, the reader is referred to the web version of this article.)

we can change the effective circuit area by not enlarging its pixel
size, but optimizing the number of ORed pixels. If the Super Pixelis small enough, the probability to have two hits is tiny comparedwith strip detector and ghost hits can be negligible. In conclusion,a PIXOR could solve the circuit area problem and achieve a highpoint resolution and a low occupancy.

3. First prototype – PIXOR1
2.2. New readout scheme – PIXOR
To solve the pixel size problem, the PIXOR readout scheme wasdeveloped. PIXOR is a signal handling scheme for pixelated sensor
nodes and represents an intermediate structure between pixelsand strips.
The PIXOR readout scheme (Fig. 3) is based on a unit of an n  npixel matrix, called Super Pixel. A signal from one pixel in a SuperPixel is divided into two directions, X and Y. For each column, theX signals of the n pixels in that column are analogue ORedtogether. Likewise for each row, the Y signals of the n pixels inthat row are ORed together . The result is n ORed column signals
and n ORed row signals. The ORed signal is processed by a readout
circuit and sent to a data acquisition system. This readout scheme
reduces the number of readout channels from n2 to 2n, and thereis space available to include a complex readout circuit. Moreover,We developed the ﬁrst prototype PIXOR1 to conﬁrm the PIXOR
scheme within the SOIPIX Collaboration [6]. The PIXOR1 is fabricatedby LAPIS Semiconductor Co. Ltd. 0:20 μm CMOS fully depleted (FD-)
SOI process, and its sensor is 260 μm thick [7].
3.1. Circuit
The primary goal of the PIXOR1 evaluation is to conﬁrm thebasic concept of PIXOR readout scheme. For this purpose, wedeveloped PIXOR1 chip just having the pixel OR part on the sensor,
and analog and digital circuits are off-sensor (Fig. 4).To avoid
electrical connection between readout channels, two diodes areused in the OR line. The analog part consists of a charge ampliﬁer,a shaper and a discriminator with a 4-bit DAC. The gain andpeaking time of the ampliﬁer and shaper are 100 μV=e and 100 ns.

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Y. Ono et al. / Nuclear Instruments and Methods in Physics Research A 731 (2013) 266–269

Pixel OR part
Vdet

XAnalog part

YDigital part
CLKSensor
nodeDAC(4bit)
Synchronizer Sequencer

Down counter
9bit

idle

Triggercomparecount==0

OUT

count

Preamplifier

Shaper
Discriminator
Thresholdvoltage

TriggerlatencyTrigger* n pixel
Fig. 4. PIXOR1 circuit for single channel. Analog and digital part are not mounted on sensor region (off-sensor).

Shaper output
Binary output
22 SuperPixels
16-Pixel ORFig. 5. Layout of the PIXOR1. The chip size is 6 mm  6 mm.

3.2. Test element group
To check the analog and discriminator signals separately, twosimple test circuits (called Test Element Group: TEG) were
included on the PIXOR1 chip; one outputs a signal from a shaper(shaper output TEG in Fig. 5), the other outputs a signal from adiscriminator (binary output TEG in Fig. 5). Thanks to the PIXOR
scheme, the pixel pitches can be reduced to 25 μm and 40 μm ineach direction with 16-pixel OR.
The shaper output TEG is used to conﬁrm that the two divided
signals have same shape and amplitude. In this region, there are
7 Super Pixels with 4-pixel-OR PIXOR readout scheme having 16
pixels and 8 readout channels. We can monitor the two shaper
outputs from X and Y directions simultaneously.
The binary output TEG aims to check the data processing with atrigger signal. A signal from a pixel sensor is processed by pixel OR,
analog and digital circuits and binary hit information can beobtained with a trigger signal. This area consists of the 22 Super
Pixels with 16-pixel-OR PIXOR readout scheme having 256 pixels
and 32 readout channels, where all readout circuits can beincluded on the Super Pixel. Fig. 6 shows a layout of a Super Pixelfor binary output TEG.

7 SuperPixels
4-Pixel OR

16 pixels

A common threshold voltage can be applied to the discriminator
for all channels and ﬁne threshold tuning can be controlled by the
4-bit DAC in each channel. Here, we adopt the binary readout
method to handle the hit data to avoid the use of any analog
buffers to store the signal charge during the trigger latency.
The digital part manages binary data holding and timing
comparison of a hit and trigger. Generally, in high energy experiments, a trigger decision typically takes several micro seconds, andafter that the trigger signal is sent to each sub-detector. Hence, thehit information should be stored during the trigger latency. The
digital part of the PIXOR1 has a 9-bit down counter to hold thebinary data in each channel. A signal coming from analog part issynchronized to the digital clock (with synchronizer), then the useof down counter is checked by the sequencer, count down starts
from the latency time which corresponds to a initial value of thecounter (by the 9-bit down counter). When the time of the counter
becomes zero, hit data timing is compared with the external
trigger signal by trigger compare. If the timing is consistent, hitdata is sent to a central data acquisitions system. Once trigger
comparison is done, the sequencer discards the hit information
and waits for the next signal. For higher occupancy environments,
we will mount additional counters which allow a higher numberof hits to be recorded.

1 channel circuit

16 pixels
Fig. 6. Layout of a Super Pixel (16-pixel OR) which is the readout circuit on-sensor.
In this paper, we report the result which is readout circuit off-sensor.

4. PIXOR1 result
We report results of basic evaluations, the shaper output ischecked with an X-ray source and a validation of the trigger
processing digital circuit is performed.
4.1. Shaper output
We measured the shaper output with 109Cd X-ray source whichradiates 88 keV photons making about 6000 electron–hole pairs inthe silicon sensor which corresponds to a number of the pairs

Y. Ono et al. / Nuclear Instruments and Methods in Physics Research A 731 (2013) 266–269

X shaper output
Y shaper output

269

circuit. Fig. 8 shows clock, input test pulse signal, trigger signal andoutput binary hit information. The digital circuit could store thesignal hit information during the trigger latency and send a binary
hit information as expected.

~ 300mV

5. SummaryFig. 7. Shaper output with a 109Cd X-ray source.

test pulseIN

40 nstrigger

Hit Info.
OUTFig. 8. Evaluation of trigger processing circuit. From top to bottom, clock (yellow),
test pulse (cyan), trigger (magenta) and binary hit information (green). (Forinterpretation of the references to color in this ﬁgure caption, the reader is referredto the web version of this article.)

generated by a minimum ionizing particle penetrating about a
75 μm silicon layer.
Fig. 7 shows shaper outputs for Xand Ydirections taken with
Tektronix DPO-3034. Clear signals with 6000 input electrons areseen and the signal charges are equally divided into the twodirections. This result conﬁrms one of the important functions for
PIXOR readout scheme.
4.2. Digital circuit
We have evaluated the overall circuit with a test-pulse to checkthe synchronization of the hit timing and trigger timing by digital

A limitation of point resolution due to large circuit size is acommon issue for hybrid and monolithic pixel detectors. The Pixel
OR (PIXOR) scheme is designed to solve the problem. To reduce thecircuit area, the number of readout channels is reduced from n2 to2n by taking analog OR of several pixel nodes in both Xand
Ydimensions in each n  n pixel matrix. We fabricated the PIXOR1
chip as a ﬁrst prototype and evaluated it. As a result, we conﬁrmedthat signals are cleanly divided into two dimensions and thetrigger processing circuit works well as expected. Since the basic
PIXOR scheme has been conﬁrmed, further work will include
measurement of cluster size with an X-ray source and the beam
test to study the position resolution. More complex circuitry canbe fabricated with the next chip, PIXOR2.

Acknowledgments
This work was partially supported by JSPS KAKENHI Grant
number 40452833.

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