2 0 11 Q U A L I T Y R E P O R T

XI LI NX QUALITY R E PORT | 2011

Engineering Quality
Engineering quality—it is what we create and how we create it. In the field of physics, the lawof entropy explains how energy tends towards chaos. We believe that quality will similarly
deteriorate without ongoing effort. So we invest our time, energy, and knowledge to engineer
continuous quality advancements. We also drive breakthroughs by listening to our customers
and using real-world needs and feedback to adjust ongoing strategies, guide execution, andachieve results our customers have come to expect.
Each year we share the results of our most recent efforts.
In 2011, more than any other year, we saw our investments pay off in the form of milestoneachievements like the Xilinx® Virtex®-7 2000T and Zynq™-7000 families. We have transformed
ourselves from a supplier of FPGAs to a programmable solutions provider, giving customers a
new level of value. Our Targeted Design Platforms are coming to life—making FPGA solutions
easier to use, powerful enough for the biggest engineering challenges, and truly ubiquitousin the industry. Xilinx quality has contributed to these achievements with programs that arefocused on the following areas:• Foundations. Greater predictability and standardization using a scalable optimized
architecture and 28nm foundry process have resulted in accelerated product development.
• Complexity. Repeatable development processes, improved over three productgenerations, have allowed us to pioneer and ship the world’s first stacked-siliconinterconnect devices and ARM-based processing platform.
ABOUT OUR COVER:
FIELD-PROGRAMMABLE GATE ARRAYS HAVE COME A LONG WAY—TODAY THEYHELP ENGINEERS TACKLE SOME OF THE WORLD’S BIGGEST CHALLENGES. THE
COVER DESIGN SHOWS JUST ONE EXAMPLE OF FPGA-POWERED ENGINEERING,
THE LARGE HADRON COLLIDER, A PARTICLE ACCELERATOR BUILT AND OPERATEDBY CERN, THE EUROPEAN ORGANIZATION FOR NUCLEAR RESEARCH. ONE OF THE
MOST RESPECTED CENTERS FOR SCIENTIFIC STUDY, CERN RELIES ON THE QUALITY
AND TECHNOLOGY OF XILINX SOLUTIONS TO EXPLORE THE PHYSICAL BEHAVIOR
OF FUNDAMENTAL PARTICLES THAT MAKE UP ALL MATTER.

• Solutions. Consistent, corporate-wide quality methodologies are elevating nextgeneration design tools and simultaneously improving current tool releases.
• Innovation. Rigorous verification and industry standards are enabling plug-and-play,
innovation-accelerating IP from Xilinx and third parties.
• Processes. Customer feedback and multilevel collaboration with our ecosystem
partners are elevating the value we deliver to systems and businesses.
• Overall quality. Tools that increase visibility and reduce human error allow us to meetcustomer expectations and address issues sooner.
We are proud of what we have achieved and look forward to sharing with you the innovation andproduct leadership that are the direct results of engineering quality.

Moshe Gavrielov

Vincent Tong

President & CEO
Xilinx, Inc.

Senior Vice President, Quality & New Product Introductions
Xilinx, Inc.
Board of Directors, Global Semiconductor Alliance

“

XI LI NX QUALITY R E PORT | 2011

ZTE has achieved enviable revenue

growth in the extremely competitive
telecommunications and networking market
by taking a leading role in standardizationand partnering with vendors that alignwith our focus on ultra-high-speed wired

LESS IS MORE—an adage that is reflected in the latest generation of Xilinx
programmable devices. A single architecture has harmonized the 7 series
FPGA families and created a roadmap that fosters design reuse, solution
portability, and increased developer productivity. Along with a single 28nm
process, the scalable optimized architecture streamlines product development
and allows more predictable product results and shorter time to market.

Foundations
Scalable Optimized Architecture:
One Vision, One Organization
Xilinx’s use of a scalable optimized architecture allowed a single merged engineering
team to launch all three 7 series families (28nm). With 90% of the fabric, logic, and I/O
in common, Xilinx brought to market a broad range of silicon features in just 15 months(down from 18 months for the complete rollout of 6 series devices). The scalable
optimized architecture allows for parallel product learning during engineering sampling,
avoids late-in-cycle product adjustments, and lets Xilinx—and our customers—respondquickly to dynamic market opportunities.

Comprehensive Award winner) has continued
to score above nine on ZTE’s performance
scorecard and is providing a 98 percent
on-time first commitment delivery.
LESLIE ZHONG”

Director of Strategic Supplier Management

ZTE CORP.

WIRED:ENGINEERING HIGHER BANDWIDTHIn the field of wired communications,designers are pushing the limits on theroad to higher-bandwidth networks. Xilinx
is smoothing the way with a 100G OTN
platform that addresses faster market
implementations of 100G line cards, andleverages a scalable optimized
architecture to let developers get
started on 400G designs today.

The Virtex-6 HXT FPGA ML630 Evaluation
Kit for OTN was included in the EDN Hot
100 Products of 2011 list. Based on theindustry’s first optically compliant device,
the kit enables next-generation transponder,
muxponder, and ODU switching applications.

Last year’s launch of the Xilinx OTN
platform illustrates the envisioned benefits
that drove Xilinx to adopt a scalable
optimized architecture. By letting engineers
get started with one device family, andlater move to another when it becomes
available, Xilinx makes it possible to havea design ready when the silicon ships.

The Scalable optimized architecture has simplified development and learning,
and is leveraged across multiple families for higher-quality products. The
common architecture facilitates development of silicon, design tools, and intellectual
property (IP) for stronger Targeted Design Platforms and promoting the growth of ahealthy ecosystem.

DRIVING TSMC PROCESS IMPROVEMENT

3-4 months ahead

The High-Performance Low-power (HPL) process at TSMC was pioneered in partnershipwith Xilinx and allowed Xilinx to ship the industry’s first 28nm devices in 2011. Long before
customers saw a single 28nm device, Xilinx invested years of effort using Process andPerformance Learning Vehicles (PPLVs) to improve the quality of processes, materials, andtechniques. Besides leveraged learning, Xilinx introduced tighter controls and improvedalignment with a single foundry and process. As a result, we achieved robust wafer-level

28nm HPL yield(actual)reliability (WLR) and lower defect densities for reduced excursion rates. Currently, the Xilinx

MAX

Power Improvement

TYP

28nm HPL yield(plan)

28nm yield results have exceeded 40nm benchmarks, met production milestones, andachieved power reductions of greater than 50% compared with previous generations.

STAND-BY POWER

28nm:
One Partner, One Process
PRODUCT YIELDARCHITECTURE
AND FABRICATION

and wireless products. Xilinx (2011 Best

0

6

12

18

TIME (months after first silicon)

24

lower

PERFORMANCE

higher

In 2011, Xilinx was the first in the industry to tape out 28nm. Since then, the 7 series devices have exemplified the resulting HPL process benefits forcustomers, including lower power and higher yields.

2
3

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We continually push ourselves toincrease our value-add while maintaining
high quality for fast-moving markets likewireless communications. This segment
sets a high bar due to insatiable demand forbandwidth, the programmable imperative,
and multiple evolving standards. Our 28nm
leadership and design win momentum inwireless is the result of our leadershipperformance, power, and cost and ourability to improve quality even in theface of greater design and technology
complexity.

XI LI NX QUALITY R E PORT | 2011

SEMICONDUCTOR QUALITY starts and ends with excursion prevention.
In 2011, Xilinx New Product Evaluation (NPE) and New Product Introduction(NPI) advancements brought to market much more complex devices without
wavering in the quest for Zero Defects. The improvements allow more rapid
delivery of devices that perform to specifications, give customers early accessto higher-density packaging (stacked-silicon interconnect devices), andprovide a roadmap to embedded processor platforms.

Co p e y”

VICTOR PENG

SVP, Programmable Platforms Development

XILINX, INC.

WIRELESS:ENGINEERING LOW POWER & HIGH PERFORMANCE

SILICON DEVICES

7 Series Quality Milestones:• Improved NPI sequencing, to bringthe most complex verification andcharacterization work into the firstsilicon cycle, leading to higher productconfidence and simpler closure prior
to General Engineering Sample (ES)• Earlier access to first silicon withover 2,000 dice, allowing extended
characterization rigor whereby almost
all designs were verified on first silicon• New PPLV discoveries• Many new tests and faster completionof test pattern development—2X cornermaterial and 10X testing compared withthe previous generation• 3X more automated testing• Early BRAM circuit and processverification (all patterns are functional,
with solid performance margins) toextended operating specifications• Improved generational test coverage

The scalable optimized architecture efficiencies, a single 28nm process, and related
NPE/NPI enhancements add up to faster customer access to 7 series devices that
perform to specifications. For example, the first Virtex-7 X485T devices showed 12.5-Gbps
transmit performance within 36 hours of first silicon, without any optimization— whichputs the 7 series on track for delivering 28G.

Quality Integration
Predictable integration is resulting in Xilinx NPE/NPI methodology breakthroughs. An
example of this is Xilinx achieving “more than Moore’s Law” with its launch of the world’s
first FPGA based on stacked-silicon interconnect technology. The Virtex-7 2000T effectively
delivers 20nm logic density, and shatters the industry record for programmable device density
by 2X (6.8 billion transistors). The devices have passed all reliability conditions and beganshipping in December 2011.
Xilinx has also announced the Zynq-7000 Embedded Processing Platform family,
representing a new FPGA device class that combines FPGA and ARM in a single chip.
Because of the larger and more complex devices, Xilinx has also been extending
board-level reliability methodologies, increasing testing, and expanding its 3D
equipment capabilities.

4• Zynq drives up integration levels, allowing• Advancing improvements in the IP

applications to be designed with fewer

development process —validation,

devices and lower power for a lower overall

interoperability testing, test coverage —cost. For example, an LTE radio head thatdrive up ease of use and shorten FGPA

required a Spartan -6 and seven otherdesign tasks from weeks to days.

®

devices (10.2W) can be implemented
with a Kintex™-7 and just two other devices(6.4W) or a Zynq-7030 and a memory
device (5.3W) for less than half the costof the Spartan-6 design.

5• Xilinx acquired AutoESL, to expand its
design suite with high-level synthesisthat can drive up designer productivity
and innovation for Xilinx silicon devices.

RMA TRENDS ARE DOWN
Spartan FPGAAVERAGE TATAt Xilinx, excursion prevention is treated as more than a “wafer fabrication issue.” It begins
with design. Xilinx quality is driven by the next wave of innovations through efforts such as
design for test (DFT), design for reliability (DFR), design for manufacturing (DFM), mitigations
for single-event upset (SEU), and the consistency provided by a scalable optimized
architecture. This drive has resulted in a “shift to the left” such that risks are reducedby earlier verification.

Wireless system integrators and solution
suppliers choose Xilinx for complete
platforms including silicon devices that
help them reduce CapEx and OpEx while
meeting the throughput and low-latency
demands for high-performance networks.
Xilinx quality advancements of particularinterest in the wireless market in 2011
included the following:

RMA CASES

Zero Defect Mindset

Q1
08

Q2
08

Q3
08

RMAs

Q4
08

Q1
09

Q2
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Q3
09

Q4
09

Q1
10

Q2
10

Q3
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Q4
10

Q1
11

Q2
11

FACTORY AVG. TAT

Xilinx RMA rates reached an all-time low in 2011 as a result of a company-wide
Zero Defect mindset.

Q3
11

Q4
11

Product

Technology Node

PPM

Spartan-2/2E.22µm / .18µm

0.42Spartan-3

90nm

0.59

Spartan-3E

90nm

0.09

Spartan-3A/AN

90nm

0.96

Spartan-6

45nm

0.73

Product

Technology Node

PPM

Virtex/E.25µm / .18µm

0.00

Virtex-2/2Pro.15µm / .13µm

0.51Virtex-4

90nm

2.08

Virtex-5

65nm

7.62

Virtex-6

40nm

2.31

Virtex FPGA

Products PPM Trend CY2011

“

XI LI NX QUALITY R E PORT | 2011

Our vision was to significantly reduce

the time to market for innovative embedded
systems. From the start of our long-term
relationship, Xilinx and NI have been extremely
well aligned. Our common mindset aroundinnovation has allowed us to do extraordinary

QUALITY GOES BEYOND SILICON—Xilinx design tools boost productivity bysimplifying the entire design experience. Developers of the next-generation Xilinx
design suite are leveraging lessons learned from silicon quality methodologies, ascalable optimized architecture, and 28nm process readiness through PPLV. As aresult, Xilinx has evolved a more holistic development process that encompasses
both silicon and design tools and includes more rigorous release criteria across devices
and tools. Customer solutions are more thoroughly vetted, with tighter collaboration
between silicon, design tools, and IP teams at every stage of development.

things. We aimed to help solve amazingly
difficult problems, and our customers’
accomplishments are the testimony toour joint success.
KEITH ODOM”R&D Fellow

NATIONAL INSTRUMENTS

AUTOMOTIVE:
ENGINEERING SAFETY AND AWARENESS

So u o s
DESIGN TOOLS

Unifying Proven Processes• Formal verification for XST Synthesis

Development of the next-generation Xilinx design suite created an opportunity—anda need —for major advancements in tool quality methodologies. Armed with a new
development model vision, the design and quality teams expanded beta testing, formalized
more metrics, and adopted more internal tools for automating various design stages.
These quality innovations include greatly accelerated time-to-milestone sign-offs
and earlier identification and resolution of issues. The improvements were madeeven as complexity increased, and have allowed Xilinx to introduce 4X the numberof devices in roughly the same time compared with the previous generation.

• Verific Parser, for maximizing language
coverage

Earlier Discovery• Coverity, for static code analysis andbug reporting• Perforce, for source control and versioning
Process Advancements that Further
Boost Design Tool Quality• Automation advancements, with bestin-class compute cloud:— Capability to perform thousands ofregressions per hour
— Faster iterative cycles, toaccommodate testing of more
configurations• Stringent exit criteria for design tools,
based on Zero Defect mindset• Extensive and dynamic database of test
designs (spanning a broad testing range,from individual functions to subsystems
to large customer-like designs)

Earlier and more stringent testingand vetting are outweighing the risks
stemming from increased complexity.
More issues are identified during
development, to avoid impact on customers
and to accelerate design cycles for higherquality products and an improved
customer experience.

100

Tool A
Tool B
Internal
Testing
2008

2009

2010
YEAR

In 2011, the portfolio was expandedwith the Xilinx Automotive platform for
four-camera surround view. Improvementsin the Xilinx ISE® Design Suite gives
automotive designers the tools theyneed and a productive environmentthat lets them focus on the 20% of
the design that represents theirdifferentiating value. Besides reducing
risk, Xilinx platforms simplify development
and allow even first-time FPGA adopters
to successfully deliver solutions to market.

CUSTOMERS EXPERIENCE FEWER DESIGN HALTS

EARLIER DISCOVERY MINIMIZES CUSTOMER IMPACTCUSTOMER DISCOVERED BUGS

— Massively parallel builds

Besides aligning Xilinx quality initiatives withthe essential automotive industry standards
and guidelines, Xilinx has pioneered
Targeted Design Platforms to accelerate
automotive innovations and quality design
methodologies. The platforms help OEMs
develop flexible designs that can be tailoredto multiple automakers and quickly adjusted
to track changing connectivity standards.

Just as the scalable optimized architecture is helping elevate silicon quality, the common
logic blocks help design tool engineering and quality teams focus their efforts and streamline
evaluations. The efficiencies gained are being translated into more test development,
test patterns, and debugging. Test result and analysis cycles have been greatly reduced—
with daily instead of bi-weekly builds multiplying the iterative cycles. Next- generation
modules are reaching quality milestones earlier, with staged release for early vetting
as part of the current design environment.

2011

TARGET PASS RATE

Leveraging Tools Proven to Improve
Designer Experiences

In the automotive market, quality saves
lives. Auto manufacturers continue toincorporate more safety-related functions
relating to driver assistance, and OEMs
have consequently heightened their focus
on standards for device functional safety
and reliability.

90

80

70

60
Pass Rate
50
-11

-10

-9

-8

-7

-6

-5

-4

WEEKS TO RELEASE

-3

-2

-1

0

6
7

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XI LI NX QUALITY R E PORT | 2011

By providing standards for IP

interfaces, verification and certification
standards and services, protection andsecurity standards based on industry
standards, and distribution standards,
Xilinx is approaching an infrastructure

CUSTOMER INNOVATION IS ACCELERATED by high-quality IP, making it a fundamental
success factor. In 2011, Xilinx made it much easier for our customers to benefit
from IP. The Xilinx IP development team implemented processes (the Open Verification
Methodology) and adopted standards (AXI-4, IP-XACT) that allow customers easierevaluation of IP and simplified integration of IP, leading to a more predictable development
environment. Targeted reference designs and Targeted Design Platforms are also
speeding the development and validation of IP, helping to ensure higher-quality IP.

model for IP.

Process-Driven Results
One key Xilinx IP quality initiative for Plug and Play has led to the adoption ofindustry standards for developing and releasing IP. The initiative makes it easierfor customers to incorporate Xilinx IP into systems and leverage the efficiencies gained
from a scalable optimized architecture and a single set of IP interfaces. The IP team has
also standardized on the Open Verification Methodology and best practices, with four welldefined levels of compliance and plans for evolving all Xilinx IP to the highest level. Throughthe Premier Program, Xilinx is promoting the same standards within its third-party IP ecosystem.
The customer benefits of these initiatives include ease of IP integration and higher-quality
IP, which lead to faster time to market.

“One for All: Does a Standards-Based IP Strategy
Hurt Competition?”

ELECTRONIC ENGINEERING JOURNAL
July 12, 2011

The power of FPGAs is driving innovation at
every point in the broadcasting landscape.
To simplify the integration of productivityenhancing Xilinx video and imaging
IP cores and third-party IP, Xilinx
launched an IP plug-and-play initiativein 2011. Xilinx quality is also helping drive
down power and increase throughput:• At the cable headend, with comprehensivewith platforms that are preverified for

EdgeQAM platform. The integrated

fully supporting a variety of display

IP speeds the development of single-

interfaces (e.g., triple-rate SDI,

chip solutions that can simultaneously

DisplayPort). The integrated IP facilitatesprocess the full upstream andreal-time video processing for scaling,

downstream broadcast spectrum.

deinterlacing, 3D, calibration, andwaveform generation.

In addition to the new verification methodology and practices, new quality metrics include
testing and validation of Xilinx IP against more stringent criteria. Tools for tracking andreporting streamline the oversight of progress against an extensive IP development checklist.
The more challenging release criteria, coupled with the automated tracking, help facilitatea 3X increase in test coverage.

• Industry-standard interconnect:
AXI-4 interface• Encryption: IEEE-1735• Adoption of Open Verification
Methodology• More stringent release criteria• Simulation environment improvements(C models, testbenches,example designs)

INTERNAL IP TESTING• IP-XACT, for expressing dataconsistently; single IP repository

Xilinx IP verification methodology
tracks industry design trends.
Standardization and increased
testing maximize issue identification
and resolution prior to application
by a customer.

2008

2009

2010

2011

DRIVING FEWER PRODUCT BUGS

Even with the increase in thebreadth of the IP offerings and theincreased complexity of the IP,
customers are encountering alower percentage of bugs. The
vast majority of issues have been
discovered and resolved earlier
by Xilinx teams.

% EXTERNAL / INTERNAL BUGSINCREASED TESTING PREVENTS CUSTOMER ISSUE DISCOVERY

Q1
CY11

Q2
CY11

Q3
CY11

Q4
CY11

• In the studio and at the delivery points,

testing and validation of the Xilinx

Customer-Focused TestingStandardized, Easy-to-Use,
Feature-Rich IP”

KEVIN MORRISBROADCAST:ENGINEERING HIGHER BANDWIDTHo at o s

INTELLECTUAL
PROPERTY (IP)that would enable the ‘app store’

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XI LI NX QUALITY R E PORT | 2011

Tesat’s customers’ designs are onboard

more than half of the satellites that circle
Earth. This magnitude of an accomplishment
requires collaboration with—and support
from—a strong ecosystem of partners andsuppliers. Xilinx is one of the vendors that

ENGINEERING IS A TEAM EFFORT. Even the most talented engineers need astandardized environment that simplifies knowledge sharing, enhances coordination,and drives out inefficiencies. Recognizing this, Xilinx actively promotes repeatable
methods that create productive, high-quality, cross-functional collaboration. Industry
and internal measures are used to gauge organizational success. Structured productdevelopment strengthens teamwork to improve quality through design, verification,and test, and also fosters consistent company-wide processes.

we trust to contribute space-grade products
and support to our customers’ programs.
In each instance, working with Xilinx has
been excellent.
MARKUS KRAL”

Project Manager, Parts Projects

TESAT-SPACECOM GMBH & CO. KG

SPACE:ENGINEERING A HERITAGE OF MISSION RELIABILITY

ocesses

COLLABORATION

Strong Partnerships
Adoption of a scalable optimized architecture led to major organizational changes throughout
Xilinx, and inherently improved collaboration by merging multiple teams. Next-generation
design tools, currently under development, are also strengthening cross-functional
collaboration by serving as a center of integration that spans all product families. As aresult, Xilinx teams—hardware, design tools, IP, and quality—are collaborating sooner in
the NPE/NPI process. In earlier stages, IP is being tested with tools, and tools tested
with hardware. This shift, combined with more detailed specifications and documentation,is enhancing work flow and communication between teams.

For more than two decades, Xilinx has been
contributing a broad portfolio of radiationtolerant and radiation-hardened devices.
Xilinx collaboration within the space market
not only helps space agencies andcontractors carry out successful missions,
it also benefits all Xilinx customers with theresulting quality advancements that ripple
through the entire Xilinx portfolio of devices.

Xilinx radiation-hardened technology, suchas the Virtex-5QV device, has in fact beena game changer by fostering standard
architectures that are more competitiveand versatile. Since testing and certifying
these and other space-grade devices iscomplex, Xilinx formed the Xilinx Radiation
Testing Consortium (XRTC). Today morethan 100 members work together toproduce trusted certifications.

Knowledge Management
New metrics and reporting are accelerating Xilinx collaborations by automating the transfer
of learning from one group to another. To collaborate more effectively with customers andpartners, Xilinx helps customer designs move forward through knowledge sharing that includes:• Quality Workshops —The launching of on-site workshops is helping customers
apply best practices, debug more effectively, and solve issues to strengthen
their understanding of Xilinx technology.
• Premier Program — The newly formalized partner program includes a revised
qualification process that categorizes partners based on their ability to
streamline customers’ product development cycles and reduce design risks.
Premier Partners benefit from collaboration with Xilinx that ultimately drives up
quality for ecosystem customers.
• Published IP Ratings — Xilinx publishes third-party IP quality and implementation
metrics—a practice that leads the industry in terms of the level of transparency
and promotion of quality.
• Technical Support Channels —Xilinx quality and support teams drive closed-loop
learning with engineering that responds to the customers’ needs. The knowledge
gained through these interactions is systematically managed and used to drive
online knowledge bases for customers (MySupport), technical support forums,
and issue resolution.

AVIONICS:QUALITY ADVANCEMENTS
IN 2011• DO-254 and DO-178 focus: Partneredwith industry and ecosystem to provide
guidance and support for certifiable
SoC solutions• Industry-leading SEU support: Regularly
published SEU FIT rate data; first releaseof SEU failure rate calculator; SEU
mitigation IP enhancement enabling>60% increase in system uptime• Isolation Design Flow: Pioneering
reusable and reliable design flows forhigh-reliability applications and expanding
our heritage in information assurance tostreamline avionics certifications

In February 2012, the XRTC celebrated
its 10th anniversary at its annual meeting.
Attendees had three days of seminars
on radiation studies and demonstrations
from the third-party suppliers of
products that complement Xilinx
hardened products.

10
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XI LI NX QUALITY R E PORT | 2011

D ATA S H E E T C O L O R K E Y

INNO V AT IO N

A CUSTOMER’S DESIGN and product quality is the truest measure of Xilinx quality, anddoes not stem from the work of a single group. At Xilinx, quality is everyone’s business andthe full-time focus for more than 300 employees that make up the quality teams. To harness
this organizational powerhouse requires clear quality goals, objectives, and customer focus.
From the board of directors to the engineering labs, Xilinx uses its performance management
system to drive accountability and ownership for quality results. Customer-reported
scorecards and problem resolution are studied diligently to drive world-class results.

Q UAL IT Y
CASE STUDIES“We have worked closely with Xilinx andits leading engineers for over a decade.
Without the high-speed performanceof the Virtex-4 devices and their active
dynamic reconfiguration capability,
combined with low-latency serial links
and high-speed LVDS interconnectivity,”

this project would not have been possible.

Qua tyVOLKER LINDENSTRUTH
Professor
UNIVERSITY OF HEIDELBERG
CERN, ALICE (A Large Ion Collider Experiment)

ACCOUNTABILITY
Driving Ownership
Well-understood responsibilities and goals form the beginnings of success for individuals,
teams, and Xilinx as a whole. When met, these goals produce all of the components of
Xilinx quality that benefit customers. In 2011, we made including more fine-grained trackingof deliverables, checklists, and schedules. Related status reports along with clearlyattached ownership resulted in improved communications and greater efficiency.

Managing Quality
The Xilinx quality dashboard has been instrumental in taking NPE/NPI implementation
to the next level. The tracking data for design tools and IP releases is organized andaccessible in real time using a comprehensive dashboard. The visually intuitive displays
highlight critical data for developers and quality teams, and allow rapid identification ofissues. Checklists and testing information are centralized and provide easy access toauthorized users any time, anywhere. The automated delivery of at-a-glance current
information keeps quality front and center throughout Xilinx.

“”

CONSISTENT TOP-TIER CUSTOMER SATISFACTION
109.5
QUALITY SCOR E

For several years, hundreds of Xilinx
engineers have been working behindthe scenes to change the way we dobusiness, and to make it easier for ourcustomers to deliver world-changing
innovations based on programmablesilicon. In 2011, the results of theirvision and efforts have grabbed theattention of industry watchers and ourcustomers. A relentless commitment
to quality has allowed Xilinx to be firstto market with 28nm, stacked-siliconinterconnect, and other advancementsthat now make it possible to solve theworld’s biggest problems with the helpof FPGAs.

9

Pending
Final Data

8

JACK ELWARD
Vice President, Worldwide Quality Systems
and Customer Support

XILINX, INC.

Q1
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QUARTE R /CALE N DAR YEAR

Xilinx aligns strategies and processes with feedback from customers, to achieveand sustain improved satisfaction levels.

Corporate Headquarters
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