Organic Nonvolatile Memory Transistors for Flexible
Sensor Arrays
Tsuyoshi Sekitani, et al.
Science 326, 1516 (2009);
DOI: 10.1126/science.1179963
The following resources related to this article are available online atwww.sciencemag.org (this information is current as of December 10, 2009 ):Updated information and services, including high-resolution figures, can be found in the online
version of this article at:
http://www.sciencemag.org/cgi/content/full/326/5959/1516
Supporting Online Material can be found at:
http://www.sciencemag.org/cgi/content/full/326/5959/1516/DC1

This article appears in the following subject collections:Physics, Applied
http://www.sciencemag.org/cgi/collection/app_physics
Information about obtaining reprints of this article or about obtaining permission to reproduce
this article in whole or in part can be found at:
http://www.sciencemag.org/about/permissions.dtl

Science (print ISSN 0036-8075; online ISSN 1095-9203) is published weekly, except the last week in December, by theAmerican Association for the Advancement of Science, 1200 New York Avenue NW, Washington, DC 20005. Copyright2009 by the American Association for the Advancement of Science; all rights reserved. The title Science is a
registered trademark of AAAS.

Downloaded from www.sciencemag.org on December 10, 2009This article cites 22 articles, 2 of which can be accessed for free:
http://www.sciencemag.org/cgi/content/full/326/5959/1516#otherarticles

S. Guiriec,35 Y. Hanabata,36 A.K. Harding,21 M. Hayashida,3E. Hays,21 A. B. Hill,28 L. Hjalmarsdotter,4,5 D. Horan,17 R. E.
Hughes,12 M. S. Jackson,5,37 G. Jóhannesson,3 A. S. Johnson,3T. J. Johnson,21,33 W. N. Johnson,1 T. Kamae,3 H. Katagiri,36
N. Kawai,38,39 M. Kerr,18 J. Knödlseder,42 M. L. Kocian,3 E.
Koerding,7 M. Kuss,6 J. Lande,3 L. Latronico,6 M. LemoineGoumard,29,30 F. Longo,8,9 F. Loparco,15,16 B. Lott,29,30 M. N.
Lovellette,1 P. Lubrano,13,14 G. M. Madejski,3 A. Makeev,1,41
L. Marchand,42 M. Marelli,20 W. Max-Moerbeck,43 M. N.
Mazziotta,16 N. McColl,42 J. E. McEnery,21,33 C. Meurer,26,5
P. F. Michelson,3 S. Migliari,44 W. Mitthumsiri,3 T. Mizuno,36
C. Monte,15,16 M. E. Monzani,3 A. Morselli,45 I. V. Moskalenko,3
S. Murgia,3 P. L. Nolan,3 J. P. Norris,46 E. Nuss,24 T. Ohsugi,36
N. Omodei,6 R. A. Ong,42 J. F. Ormes,46 D. Paneque,3 D.
Parent,29,30 V. Pelassa,24 M. Pepe,13,14 M. Pesce-Rollins,6
F. Piron,24 G. Pooley,47 T. A. Porter,48 K. Pottschmidt,21 S.
Rainò,15,16 R. Rando,10,11 P. S. Ray,1 M. Razzano,6 N. Rea,19,49
A. Readhead,43 A. Reimer,50,3 O. Reimer,50,3 J. L. Richards,43
L. S. Rochester,3 J. Rodriguez,7 A. Y. Rodriguez,19 R. W.
Romani,3 F. Ryde,37,5 H. F.-W. Sadrozinski,48 A. Sander,12P. M. Saz Parkinson,48 C. Sgrò,6 E. J. Siskind,51 D. A. Smith,29,30
P. D. Smith,12 P. Spinelli,15,16 J.-L. Starck,7 M. Stevenson,43
M. S. Strickman,1 D. J. Suson,52 H. Takahashi,36,11 T. Tanaka,3J. B. Thayer,3 D. J. Thompson,21 L. Tibaldo,10,11,7 J. A. Tomsick,53
D. F. Torres,54,19 G. Tosti,13,14 A. Tramacere,3,55 Y. Uchiyama,3
T. L. Usher,3 V. Vasileiou,22,23 N. Vilchez,40 V. Vitale,45,56 A. P.
Waite,3 P. Wang,3 J. Wilms,57 B. L. Winer,12 K. S. Wood,1
T. Ylinen,37,58,5 M. Ziegler48
1

Space Science Division, Naval Research Laboratory, Washington, DC 20375, USA. 2National Research Council Research
Associate, National Academy of Sciences, Washington, DC
20001, USA. 3W. W. Hansen Experimental Physics Laboratory,
Kavli Institute for Particle Astrophysics and Cosmology, Department of Physics and SLAC National Accelerator Laboratory,
Stanford University, Stanford, CA 94305, USA. 4Departmentof Astronomy, Stockholm University, SE-106 91 Stockholm,
Sweden. 5The Oskar Klein Centre for Cosmoparticle Physics,
AlbaNova, SE-106 91 Stockholm, Sweden. 6Istituto Nazionale
di Fisica Nucleare, Sezione di Pisa, I-56127 Pisa, Italy.
7
Laboratoire AIM, CEA-IRFU/CNRS/Université Paris Diderot,
Service d’Astrophysique, CEA Saclay, 91191 Gif sur Yvette,
France. 8Istituto Nazionale di Fisica Nucleare, Sezione di Trieste,
I-34127 Trieste, Italy. 9Dipartimento di Fisica, Università diTrieste, I-34127 Trieste, Italy. 10Istituto Nazionale di Fisica Nu-

cleare, Sezione di Padova, I-35131 Padova, Italy. 11Dipartimento
di Fisica “G. Galilei,” Università di Padova, I-35131 Padova,
Italy. 12Department of Physics, Center for Cosmology andAstro-Particle Physics, Ohio State University, Columbus, OH
43210, USA. 13Istituto Nazionale di Fisica Nucleare, Sezione
di Perugia, I-06123 Perugia, Italy. 14Dipartimento di Fisica,
Università degli Studi di Perugia, I-06123 Perugia, Italy.
15
Dipartimento di Fisica “M. Merlin” dell’Università e delPolitecnico di Bari, I-70126 Bari, Italy. 16Istituto Nazionale di
Fisica Nucleare, Sezione di Bari, 70126 Bari, Italy. 17Laboratoire Leprince-Ringuet, École polytechnique, CNRS/IN2P3,
Palaiseau, France. 18Department of Physics, University ofWashington, Seattle, WA 98195-1560, USA. 19Institut deCiencies de l’Espai (IEEC-CSIC), Campus UAB, 08193 Barcelona,
Spain. 20INAF-Istituto di Astrofisica Spaziale e Fisica Cosmica,
I-20133 Milano, Italy. 21NASA Goddard Space Flight Center,Greenbelt, MD 20771, USA. 22Center for Research andExploration in Space Science and Technology (CRESST) andNASA Goddard Space Flight Center, Greenbelt, MD 20771,
USA. 23Department of Physics and Center for Space Sciences
and Technology, University of Maryland Baltimore County,
Baltimore, MD 21250, USA. 24Laboratoire de PhysiqueThéorique et Astroparticules, Université Montpellier 2, CNRS/
IN2P3, Montpellier, France. 25Department of Physics andAstronomy, Sonoma State University, Rohnert Park, CA 949283609, USA. 26Department of Physics, Stockholm University,
AlbaNova, SE-106 91 Stockholm, Sweden. 27Institut Universitaire de France, 75005 Paris, France. 28Université Joseph
Fourier-Grenoble 1/CNRS, Laboratoire d’Astrophysique deGrenoble (LAOG) UMR 5571, BP 53, 38041 Grenoble
Cedex 09, France. 29Université de Bordeaux, Centre d’Études
Nucléaires Bordeaux Gradignan, UMR 5797, Gradignan,33175, France. 30CNRS/IN2P3, Centre d’Études Nucléaires
Bordeaux Gradignan, UMR 5797, Gradignan, 33175, France.
31
Dipartimento di Fisica, Università di Udine and Istituto
Nazionale di Fisica Nucleare, Sezione di Trieste, Gruppo
Collegato di Udine, I-33100 Udine, Italy. 32Department of
Astronomy and Astrophysics, Pennsylvania State University,
University Park, PA 16802, USA. 33Department of Physics andDepartment of Astronomy, University of Maryland, College Park,
MD 20742, USA. 34Max-Planck-Institut für Radioastronomie, Auf
dem Hügel 69, 53121 Bonn, Germany. 35Center for Space
Plasma and Aeronomic Research (CSPAR), University of Alabamain Huntsville, Huntsville, AL 35899, USA. 36Department of
Physical Sciences, Hiroshima University, Higashi-Hiroshima,

Hiroshima 739-8526, Japan. 37Department of Physics, RoyalInstitute of Technology (KTH), AlbaNova, SE-106 91
Stockholm, Sweden. 38Department of Physics, Tokyo Instituteof Technology, Meguro City, Tokyo 152-8551, Japan. 39Cosmic
Radiation Laboratory, Institute of Physical and Chemical
Research (RIKEN), Wako, Saitama 351-0198, Japan. 40Centred’Étude Spatiale des Rayonnements, CNRS/UPS, BP 44346,
F-30128 Toulouse Cedex 4, France. 41George Mason University,
Fairfax, VA 22030, USA. 42Department of Physics and Astronomy, University of California, Los Angeles, CA 90095-1547,
USA. 43Cahill Center for Astronomy and Astrophysics, California
Institute of Technology, Pasadena, CA 91125, USA. 44European
Space Astronomy Centre (ESAC), 28691 Villanueva de laCañada, Madrid, Spain. 45Istituto Nazionale di Fisica Nucleare,
Sezione di Roma “Tor Vergata”, I-00133 Roma, Italy. 46Department of Physics and Astronomy, University of Denver, Denver,
CO 80208, USA. 47Cavendish Laboratory, Cambridge CB3 0HE,
UK. 48Santa Cruz Institute for Particle Physics, Department of
Physics and Department of Astronomy and Astrophysics, University of California at Santa Cruz, Santa Cruz, CA 95064, USA.
49
Sterrenkundig Institut “Anton Pannekoek,” 1098 SJ Amsterdam, Netherlands. 50Institut für Astro- und Teilchenphysik andInstitut für Theoretische Physik, Leopold-Franzens-Universität
Innsbruck, A-6020 Innsbruck, Austria. 51NYCB Real-Time
Computing Inc., Lattingtown, NY 11560-1025, USA. 52Department of Chemistry and Physics, Purdue University Calumet,
Hammond, IN 46323-2094, USA. 53Space Sciences Laboratory,
University of California, Berkeley, CA 94720, USA. 54Institució
Catalana de Recerca i Estudis Avançats (ICREA), Barcelona,
Spain. 55Consorzio Interuniversitario per la Fisica Spaziale(CIFS), I-10133 Torino, Italy. 56Dipartimento di Fisica, Università
di Roma “Tor Vergata,” I-00133 Roma, Italy. 57Erlangen Centre
for Astroparticle Physics, D-91058 Erlangen, Germany. 58Schoolof Pure and Applied Natural Sciences, University of Kalmar,
SE-391 82 Kalmar, Sweden.

Supporting Online Materialwww.sciencemag.org/cgi/content/full/1182174/DC1
Materials and Methods
Figs. S1 to S3
References
18 September 2009; accepted 5 November 2009
Published online 26 November 2009;10.1126/science.1182174
Include this information when citing this paper.

for later read-out. Most of the organic memory
Organic Nonvolatile Memorytransistors reported to date exploit the electric field–
induced remnant polarization in ferroelectric polyfilms (7–11). A considerable limitation ofTransistors for Flexible Sensor Arrays mer
ferroelectric polymer memory transistors is that
Tsuyoshi Sekitani,1 Tomoyuki Yokota,2 Ute Zschieschang,3 Hagen Klauk,3 Siegfried Bauer,4
Ken Takeuchi,1 Makoto Takamiya,5 Takayasu Sakurai,5 Takao Someya1,2,6*Using organic transistors with a floating gate embedded in hybrid dielectrics that comprise a
2-nanometer-thick molecular self-assembled monolayer and a 4-nanometer-thick plasma-grown
metal oxide, we have realized nonvolatile memory arrays on flexible plastic substrates. The small
thickness of the dielectrics allows very small program and erase voltages (≤6 volts) to produce
a large, nonvolatile, reversible threshold-voltage shift. The transistors endure more than 1000
program and erase cycles, which is within two orders of magnitude of silicon-based floatinggate transistors widely employed in flash memory. By integrating a flexible array of organic
floating-gate transistors with a pressure-sensitive rubber sheet, we have realized a sensor matrix
that detects the spatial distribution of applied mechanical pressure and stores the analog
sensor input as a two-dimensional image over long periods of time.
lectronic devices are traditionally fabricatedusing inorganic semiconductors, rigid substrates, and high-temperature manufacturing methods. In contrast, organic semiconductors
can be processed at low temperatures and on largearea polymeric substrates. This has allowed for thedevelopment of a variety of electronic devices on

E

1516

flexible plastic substrates, including solar cells (1),light-emitting diode displays (2), field-effect transistors (3), transponders (4), sensors (5), actuators (6),and nonvolatile memory transistors (7–11). Nonvolatile memory transistors are potentially useful
to individualize radio-frequency transponders or
to store data obtained by large-area sensor arrays

11 DECEMBER 2009

VOL 326SCIENCEthe coercive field required to reverse the macroscopic polarization increases with decreasing film
thickness (12), which makes it difficult to obtain alarge enough memory window with program anderase voltages below about 20 V. Also, due to thesubstantial surface roughness of the ferroelectric
polymer films, the carrier field-effect mobility inthese transistors is usually quite low (<0.1 cm2/Vs).
1
Department of Electrical and Electronic Engineering andInformation Systems, The University of Tokyo, 7-3-1 Hongo,
Bunkyo-ku, Tokyo 113-8656, Japan. 2Department of Applied
Physics, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku,
Tokyo 113-8656, Japan. 3Max Planck Institute for Solid State
Research, Heisenbergstrasse 1, 70569 Stuttgart, Germany.
4
Soft Matter Physics (SOMAP), Johannes Kepler University Linz,
A-4040 Linz, Austria. 5Institute of Industrial Science, The University of Tokyo, 4-6-1 Komaba, Meguro-ku, Tokyo 153-8505
Japan. 6Institute for Nano Quantum Information Electronics(INQIE), The University of Tokyo, 4-6-1 Komaba, Meguro-ku,
Tokyo 153-8505 Japan.

*To whom correspondence should be addressed. E-mail:
Someya@ee.t.u-tokyo.ac.jp.

www.sciencemag.org

Downloaded from www.sciencemag.org on December 10, 2009

REPORTSREPORTS
the control gate and the source contact. Charging
the floating gate changes the transistor’s thresholdvoltage, because the charge on the floating gatepartially screens the electric field between the control gate and the semiconductor. This thresholdvoltage shift can be detected by measuring the draincurrent at a certain gate-source voltage. Because
the floating gate is completely isolated by the di-

A floating-gate transistor is a field-effect transistor with two gate electrodes. In addition to thecontrol gate, similar to that in a regular transistor,
it has a floating gate embedded in the gate dielectric. When the dielectric is thin enough, electronic charge can be brought onto the floating gate
by quantum tunneling or thermal emission when alarge enough program voltage is applied between

A

B

C

SAM

source & drain contacts (Au)electric, charge stored on the floating gate remains
there without the need for any applied voltage(nonvolatile memory). To erase the memory, avoltage of opposite polarity is applied, discharging
the floating gate through the dielectric.
In silicon-based floating-gate transistors, the dielectric is a silicon dioxide layer with a thicknessof a few nanometers. The exact thickness is apentaceneorganic semiconductor

SAM (2 nm)
AlOx(4 nm)

top dielectric(AlOx + SAM)

Al (16 nm)(floating gate)

2 mm

SAM (2 nm)
AlOx (4 nm)

bottom dielectric(AlOx + SAM)

floating gate (Al)

P OH
OH

Al (18 nm)(control gate)

plastic substrate(PEN)

control gate (Al)10 nm

Fig. 1. (A) Photograph of an organic floating-gate transistor sheet comprising
26 by 26 memory cells. The array has an effective area of 50 by 50 mm2. The
inset shows a magnified image of the array. (B) Schematic cross section of thefloating-gate transistors. The substrate is flexible PEN. The control and floating
gates are 20-nm-thick layers of evaporated aluminum. The top and bottomAC

substratedielectrics are each a combination of a 4-nm-thick layer of AlOx and a 2-nmthick SAM. The organic semiconductor is a 50-nm-thick layer of pentacene, andthe source and drain contacts are 50-nm-thick layers of evaporated gold. (C)Cross-sectional TEM images of a flexible floating-gate transistor. The specimen
was prepared using a focused ion beam and imaged by TEM (300 kV).

Edrain current-410

control gate (Al)top contact
floating gate
control gate

gate-source voltage VGS

current
pentacene
top
contact
(Au)

10

-2

10

50 measurement
th

10-3

100 measurement

-7

10

10-4
10

-5

-9

10

-6

10

-7

area = 3 x 10-4 cm2 10

-8

10
10

-10

10

-11

10

-12

0

1

2
3
4
Voltage (V)

5

2

-8

-8

after
programming-9(with VGS = – 6 V)

10
10

-10

10

VDS = –1 V

-12

10

2

1
0
-1
Gate-source voltage (V)

-2

F
10-4

10

-5

10

-4

VDS = –1 V

-5

10

-6

Gate current (A)thDrain current (A)th

10 measurement

-6

-7

10

floating gate (Al)Current density (A/cm )

10

10

-1

-6

10

-11

D
st

1 measurement-5(with VGS = +3 V)

10

200 m

B 10-4Current (A)control
gate (Al)floating gate (Al)
200 m

10

10

gate
current

Drain current (A)voltageafter erasing-5

drain-source
voltage VDS

Downloaded from www.sciencemag.org on December 10, 2009

O

-6

10

-7

10

-8

10

-9

10

after erasing (with VGS = +3 V)-8

10

after programming(with VGS = – 6 V)

-9

10

-10

10

-11
-12

2
0
-2
-4
Gate-source voltage (V)Fig. 2. Static electrical performance of the floating-gate memory devices. (A)Photograph of a floating-gate capacitor used for characterizing the voltagedependent current through the AlOx/SAM dielectrics. (B) Current through the
AlOx/SAM dielectrics as a function of applied voltage. Up to 6 V, the current
does not cause irreversible changes in the dielectrics. (C) Photograph of apentacene floating-gate memory transistor. (D) Drain current as a functionof the voltage applied between control gate and source contact. When the
www.sciencemag.org

-7

10

10

VDS = –2 V

-10

10

6

10

SCIENCE

-6

10

2

1
0
-1
Gate-source voltage (V)-2applied voltages are –6 V and +3 V, the floating gate is charged and discharged, causing a threshold-voltage shift and hysteresis in the currentvoltage characteristics. (E) Read-out operation performed on a floating gate
transistor after programming and after erasing for 1 s. The threshold-voltage
shift induced by the program and erase operations is clearly observed. (F) Gatecurrent of a floating-gate transistor measured during read-out. For read-out
voltages up to T2 V, the gate current reaches about 100 pA.
VOL 326

11 DECEMBER 20091517

compromise between the voltage required to bringenough charge onto the floating gate and the charge
leakage from the floating gate, which sets an upper
limit on the retention time. Silicon-based floatinggate transistors typically have program and erase

voltages of 10 to 20 V (13, 14) and retention timesof several years. Because the defect density in thethin dielectric increases with every program anderase operation, the endurance is usually limited
to ~106 program and erase cycles (14).

Threshold voltage (V)Threshold voltage (V)Threshold voltage (V)Threshold voltage (V)Fig. 3. Threshold voltage A
Bof organic floating-gateafter erasing (VGS= +3 V)22transistors. (A) Thresholdafter erasing (VGS= +3 V)
voltage shift as a functionof program voltage. The
1
1
program voltage is applied
for 1 s. At the maximum
00
after programming
program voltage of –6 V,a threshold-voltage shift-1-1of about 2.5 V is obtained.
after programming (VGS= – 6 V)
The threshold voltage af0
-1
-2
-3
-4
-5
-6
0.01
0.1
1
10
ter erasing with +3 V is
Program time (s)Program voltage (V)independent of the program voltage. (B) Threshold- CDvoltage shift as a function
2
2of the duration of the proafter erasing (VGS= +3 V)
gram pulse. The program
after erasing (VGS= +3 V)
voltage is –6 V. (C) En1
1
durance of the memorytransistors. The threshold00
voltage window is greater
3
than 2 V after 10 pro-1 after programming (VGS= – 6 V)
-1 after programming (VGS= – 6 V)gram and erase (–6 to+3 V) cycles and greater454Initial 1
10 100 103 10 10
1
10
100
103
10
than 1 V after 104 cycles.
Program / erase cycles
Time (s)(D) Retention characteristics of the memory transistors. The threshold voltage window is greater than 2 V after 103 s and greater than
1 V after 104 s. For each data point, the threshold voltage was obtained by measuring the complete transfer
characteristics [sweeping gate-source voltage (VGS) from +2 to –2 V; drain-source voltage (VDS) = –1 V].

Although silicon floating-gate transistors are
excellent for high-density data storage, flexible organic floating-gate transistors are potentially usefulfor large-area sensors and actuators with integrated
nonvolatile memory capability. There are very few
reports of organic floating-gate transistors, most ofwhich use rigid substrates, thick dielectrics (10 to
50 nm) and large program and erase voltages (15 to50 V), and none of which have demonstrated integration of these transistors into memory arrays(15–18). The main challenge in reducing the program and erase voltages and in demonstrating highyield and sufficient uniformity in large-area memory arrays on flexible plastic substrates is to develop a dielectric that can be prepared below theglass transition temperature of plastic film (<150°C)
and which combines small film thickness with good
reproducibility and small defect density. By taking
advantage of the excellent properties of a lowtemperature hybrid dielectric based on a thin metaloxide and a self-assembled monolayer (SAM),
we have developed flexible floating-gate transistors with small program and erase voltages (–6 V
to +3 V). Figure 1A shows a photograph of aplastic sheet with 676 organic floating-gate transistors arranged in a 26 by 26 array on a 125-mmthick plastic film. The schematic device crosssection is shown in Fig. 1B; the fabrication process is outlined in the Supporting Online Material.
The two dielectrics that isolate the floating gatefrom the control gate and the organic semiconductor are a combination of a thin aluminum oxide(AlOx) layer grown in an oxygen plasma at room
temperature and an alkyl-phosphonic acid SAM

Fig. 4. Flexible pressuresensor array. (A) Schesensor
1T-cell after erasing
matic and photograph
-5
10
RL0
TA
TR
2T-cell after erasingof a two-transistor (2T)
read
-6
10
TA
memory cell in which an
VRead current
RL1-7
access transistor (TA) and10aread-out transistor (TR)
-8
TA
TR
10
TR
VAccess
share a large floating
1T-cell
after
programming-9
gate. (B) Retention char10
RL25
floating gate (Al)acteristics of a 2T cell in-10
VAccess
10
gate-sourcecomparison with that of200mV
2T-cell after programming
Readvoltage VGS-1110
a 1T cell. The read cur4
1
10
100
103
10
read-out circuits
rent (IRead) is the drain
Time (s)current of TR measured
20
min
12
h
E
D
with a drain-source voltage (VRead) of>10 nA
pressure sensitive rubber (Sensor)–1 V. IRead depends on the thresholdvoltage of the transistors and thus onbias electrode sheet
the amount of charge on the floatinggate. (C) Circuit schematic of the sensor. Lines marked AL are the access< 100 pA
lines used to apply a drain-source
voltage of –2 V to the access transistors during program and erase oper10 mmations. Lines marked RL are the readlines. The control gates of all accessorganic memory sheettransistors are connected to the bottom surface of the pressure-sensitive
rubber sheet. (D) Photograph of thethree individual sheets before lamination. Bottom, 125-mm-thick PEN sheet with 676 2T memory cells; center, 500-mm-thick pressure-sensitive rubber sheet;
top, 125-mm-thick PEN sheet with copper electrode. (E) Demonstration of the sensor array. The spatial distribution of mechanical pressure applied using two
different objects is stored in the organic floating-gate transistors and can be retrieved even after the pressure and voltages have been removed.

B

A

10

GND

C

-4

AL0

AL1

Read current (A)control gate (Al)1518

11 DECEMBER 2009

VOL 326SCIENCEwww.sciencemag.org

AL25

Downloaded from www.sciencemag.org on December 10, 2009

REPORTSprepared from solution at room temperature, with a
total thickness of about 6 nm and a capacitance of
0.6 to 0.65 mF/cm2 (19–22). The semiconductor
is a thin layer of vacuum-deposited pentacene.
Figure 1C shows a cross-sectional electron
microscopy (EM) image of a completed device.
The specimen was prepared using a focused ion
beam (FIB) (FB-2100, Hitachi High-Technologies
Corp., Tokyo, Japan) and imaged by transmission
electron microscopy (TEM) (HF-3300 Cold-FE
TEM, 300 kV, Hitachi High-Technologies Corp.).
The control gate, the floating gate, and the twodielectric layers can be clearly distinguished in
the TEM image. Perhaps most notably, the 2-nmthick organic SAM of the bottom dielectric that
separates the control gate from the floating gate isclearly resolved. The TEM image confirms the
structure of the organic floating-gate transistors.
To characterize the electric current through thedielectrics during program and erase operations,floating-gate capacitors were prepared without thesemiconductor (Fig. 2A). Figure 2B shows thatwhen the voltage between the control gate andthe top contact increases, the current also increases,
reaching 0.5 mA/cm2 at 6 V. This measurement
was repeated 100 times without any changes in thecurrent-voltage curves, showing that the dielectric
can sustain this current. Beyond 6.3 V, however,an irreversible increase in current was observed,
indicating damage to the dielectric (fig. S3A).
Figure 2C shows a photograph of a pentacene
floating-gate memory transistor. Initially, thethreshold voltage (Vth) is between +1 and +2 V
(Figs. 2 and 3). For programming, a voltage of–6 V is applied between the control gate and thesource contact. This creates a gate current of 1 mA
(fig. S3B), which charges the floating gate andshifts Vth to –1 V. To erase, a voltage of +3 V isapplied to discharge the floating gate and recover
the initial threshold voltage. Cycling the gate-source
voltage between +3 V and –6 V produces the hysteresis seen in Fig. 2D. The exact Vth shift depends
on the voltage and duration of the program pulse(Fig. 3, A and B, and figs. S4 and S5). To read thestored information, Vth is determined, for example,
by measuring the drain current as a function ofgate-source voltage. Figure 2E shows the result of
two read-out operations, one on a transistor programmed at –6 V, the other on a transistor erased
at +3 V. The threshold voltage window and thedevice-to-device uniformity (fig. S6) are sufficientfor unambiguous read-out. Figure 2F shows that
if read-out is performed with a gate-source voltageof T2 V, the gate current reaches 100 pA. This
causes a small portion of the stored charge to belost and Vth to shift slightly during each read-out
operation (destructive read-out) (fig. S7, A and B).
In contrast, if read-out is performed with a gatesource voltage of 0 V, there is no charge loss andno Vth shift (nondestructive read-out) (fig. S7C).
Modern silicon-based flash memory is typically rated for 106 program and erase cycles (14),after which the memory characteristics degrade.
To evaluate the endurance of the organic memory transistors, a device was subjected to 105

program and erase cycles (–6 V to +3 V, 1 Hz).
The results in Fig. 3C and in fig. S8 show that thethreshold voltage window is constant at 2 V up to
103 cycles. Beyond that, the positive thresholdvoltage shift during the erase operation becomes
smaller, so the initial threshold voltage of +1 V is
no longer recovered and the threshold voltage
window becomes smaller. Nonetheless, after 104
cycles, the threshold voltage window is still 1 V,
sufficient for unambiguous read-out. After 105
cycles, the threshold voltage window is 0.5 V.
Interestingly, the initial threshold voltage of +1 V
can be recovered by annealing the transistors at
140°C in dry nitrogen, which suggests that theendurance is limited not by irreversible structural
damage but by reversible carrier trapping.
Unlike dynamic random access memory(DRAM), nonvolatile memories retain information in the absence of external voltages. In floatinggate transistors, this requires that the charge on
the floating gate is prevented from leaking away
through the dielectric. Data retention experiments
on an individual pentacene device (shown in Fig.
3D) suggest that the retention time is only a few
hours (threshold voltage window is 1.1 V after
3 hours, 0.6 V after 12 hours). However, most of
the charge loss in this case occurred during readout. To improve retention, we have therefore designed and fabricated a two-transistor memory
cell in which an access transistor (with controlgate) and a read-out transistor (without controlgate) share a floating gate with an area of 400 by
1000 mm2 (Fig. 4A). Read-out is performed with adrain-source voltage of –1 Vapplied to the read-out
transistor for 0.1 s or less, with no voltage appliedon the control gate. This resulted in a significant
improvement in retention time: After 3 hours, theread-current ratio is less than 2 for the one-transistor
cell, but 2 × 102 for the two-transistor cell. After
12 hours, the two-transistor cell still has a usably
large read-current ratio of 102 (Fig. 4B).
To demonstrate the potential of organic
floating-gate transistors and the two-transistor
memory cell design, we fabricated a large-area
flexible sensor that measures the spatial distribution of mechanical pressure applied to it andretains this data for more than 12 hours after thepressure and voltages have been removed. The
sensor was fabricated by laminating three sheets:a polyethylene naphthalate (PEN) sheet with 676
two-transistor memory cells arranged in a 26 by
26 array, a pressure-sensitive rubber sheet, and a
PEN sheet with a copper electrode. The circuit
schematic is shown in Fig. 4C, a photograph ofthe three individual sheets before lamination isshown in Fig. 4D, photographs of the memory
array are shown in fig. S10A, and a cross sectionof the laminated stack is shown in fig. S10B. The
control gates of all 676 memory cells are connected to the bottom surface of the rubber sheet,and the top surface of the rubber sheet is incontact with the copper electrode. When mechanical pressure is applied to the rubber sheet,the electrical resistance between the rubber’s top
and bottom surfaces decreases (fig. S10C). By

www.sciencemag.org

SCIENCEVOL 326

applying a program voltage to the copper electrode and an access voltage to all memory cells,
the copper electrode supplies the program voltage
to the floating-gate transistors in those positions
where pressure is applied, and the pressure distribution is stored in the memory array.
Figure 4E shows a demonstration of thesensor. Pressure was applied using two different
objects: a roll of tape and two fingers. The stored
information was read out after 20 min and again
after 12 hours with a multichannel drive system.
As can be seen, the contrast between the programmed cells and the background deteriorates
over time due to charge loss (Fig. 4B), but even
12 hours after removing the mechanical pressure
and the electric voltages, the stored information
showing the spatial distribution of the appliedpressure was still successfully recovered.
References and Notes
1. D. Gebeyehu et al., Synth. Met. 118, 1 (2001).
2. L. Zhou et al., Appl. Phys. Lett. 88, 083502 (2006).
3. G. H. Gelinck et al., Nat. Mater. 3, 106 (2004).
4. P. F. Baude et al., Appl. Phys. Lett. 82, 3964 (2003).
5. T. Someya et al., Proc. Natl. Acad. Sci. U.S.A. 102, 12321(2005).
6. T. Sekitani et al., Nat. Mater. 6, 413 (2007).
7. C. A. Nguyen, S. G. Mhaisalkar, J. Ma, P. S. Lee,
Org. Electron. 9, 1087 (2008).
8. K. H. Lee, G. Lee, K. Lee, M. S. Oh, S. Im, Appl. Phys. Lett.
94, 093304 (2009).
9. T. Sekitani et al., IEEE Trans. Electron. Dev. 56, 1027 (2009).
10. R. Schroeder, L. A. Majewski, M. Grell, Adv. Mater. 16,
633 (2004).
11. R. C. G. Naber et al., Nat. Mater. 4, 243 (2005).
12. H. Kliem, R. Tadros-Morgane, J. Phys. D Appl. Phys. 38,
1860 (2005).
13. K. Takeuchi, IEEE J. Solid-State Circuits 44, 1227 (2009).
14. R. Bez, E. Camerlenghi, A. Modelli, A. Visconti, Proc. IEEE91, 489 (2003).
15. Z. Liu, F. Xue, Y. Su, Y. M. Lvov, K. Varahramyan,
IEEE Trans. NanoTechnol. 5, 379 (2006).
16. L. Zhen, W. Guan, L. Shang, M. Liu, G. Liu, J. Phys. D
Appl. Phys. 41, 135111 (2008).
17. W. Wang, J. Shi, D. Ma, IEEE Trans. Electron. Dev. 56,
1036 (2009).
18. M.-F. Chang, P.-T. Lee, S. P. McAlister, A. Chin,
Appl. Phys. Lett. 93, 233302 (2008).
19. H. Klauk, U. Zschieschang, J. Pflaum, M. Halik, Nature
445, 745 (2007).
20. H. Ma et al., Appl. Phys. Lett. 92, 113303 (2008).
21. T. Sekitani, Y. Noguchi, U. Zschieschang, H. Klauk, T. Someya,
Proc. Natl. Acad. Sci. U.S.A. 105, 4976 (2008).
22. P. H. Wöbkenberg et al., Appl. Phys. Lett. 93, 013303 (2008).
23. This study was partially supported by Core Research for
Evolutional Science and Technology, Japan Science andTechnology Agency (JST/CREST), Global Centers of Excellence(GCOE, Secure-Life Electronics, University of Tokyo), and theSpecial Coordination Funds for Promoting and Technology.
We thank H. Matsumoto and Y. Kuroda (Hitachi HighTechnologies Corp.) for the process using FIB and imaging
by TEM, H. Takagi (GENESIS Co., Ltd.) for designing themultichannel sensor driving system, and Daisankasei Co.,
Ltd. for high-purity parylene (diX-SR). We also thankT. Furukawa (Tokyo University of Science) and R. Koeppe(Johannes Kepler University Linz) for valuable discussion.
S.B. thanks the Austrian Science Funds for financial support.

Downloaded from www.sciencemag.org on December 10, 2009

REPORTS

Supporting Online Materialwww.sciencemag.org/cgi/content/full/326/5959/1516/DC1
Materials and Methods
SOM Text
Figs. S1 to S10
31 July 2009; accepted 23 October 200910.1126/science.1179963

11 DECEMBER 20091519