IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 1, JANUARY 2010

249

Stretchable EMI Measurement Sheet With 8 8 CoilArray, 2 V Organic CMOS Decoder, and 0.18 m
Silicon CMOS LSIs for Electric and Magnetic
Field Detection
Koichi Ishida, Member, IEEE, Naoki Masunaga, Zhiwei Zhou, Tadashi Yasufuku, Student Member, IEEE,
Tsuyoshi Sekitani, Member, IEEE, Ute Zschieschang, Hagen Klauk, Makoto Takamiya, Member, IEEE,
Takao Someya, Member, IEEE, and Takayasu Sakurai, Fellow, IEEE

Abstract—A stretchable 12 12 cm2 electromagnetic interference (EMI) measurement sheet is developed to enable the measurement of EMI distribution on the surface of electronic devices bywrapping the devices in the sheet. The sheet consists of an 8
8 coil array, a 2 V organic CMOS row decoder and a column selector, 40% stretchable interconnects with carbon nanotubes, and0.18 m silicon CMOS circuits for electric and magnetic field detection. The sheet detects the total power of an electric field in theband up to 700 MHz and that of a magnetic field up to 1 GHz. The
minimum detectable powers of the electric and magnetic fields are
60 and 70 dBm, respectively.
Index Terms—Calibration, carbon nanotubes, direct silicon-organic circuit interface, down conversion, electric filed, electromagnetic interference, frequency discrimination, intrasystem electromagnetic compatibility, localization, magnetic field, silicon CMOS,
stretchable interconnects, stretchable measurement sheet, 2 V organic CMOS.

Fig. 1. An example of an intrasystem EMC issue in a mobile phone and the
proposed EMI measurement.

I. INTRODUCTION
LECTROMAGNETIC INTERFERENCE (EMI) that
degrades the dependability of electronic devices is
becoming a serious issue. The issue is complicated by thefollowing technology trends: (1) RF signals and clock pulses ofdigital ICs are in the same frequency range. (2) The increase in
LSI power consumption causes the increase in noise emission.
(3) Electronic devices have 3-D structures and the packaging
is dense. These trends also make it difficult to analyze the root

E

Manuscript received April 27, 2009; revised July 06, 2009. Current version
published December 23, 2009. This paper was approved by Guest Editor Kevin
Zhang. This work was supported in part by the Grant-in-Aid for Scientific Research, Special Coordination Funds for Promoting and Technology, NEDO, andCREST/JST.
K. Ishida, N. Masunaga, T. Yasufuku, and T. Sakurai are with the Instituteof Industrial Science, University of Tokyo, Tokyo 153-8505, Japan (e-mail:ishida@iis.u-tokyo.ac.jp.)
Z. Zhou was with the Institute of Industrial Science, University of Tokyo,
Tokyo 153-8505, Japan, and is now with Sony Corporation, Atsugi 243-0014,
Japan.
T. Sekitani and T. Someya are with the Department of Electrical and Electronic Engineering, University of Tokyo, Tokyo 113-8654, Japan.
U. Zschieschang and H. Klauk are with the Max Planck Institute for Solid
State Research, Stuttgart, Germany.
M. Takamiya is with the VLSI Design and Education Center, University ofTokyo, Tokyo 113-8654, Japan.
Digital Object Identifier 10.1109/JSSC.2009.2034446

cause of EMI. For example, it is difficult to find EMI generation
points in electronic devices such as mobile phones and large
flat-panel displays.
Fig. 1 shows an example of an intrasystem electromagnetic
compatibility (EMC) issue in a mobile phone. EMI largely depends on the circuit board layout. Localizing either an EMI
source or a critical wiring is difficult by simulation. EMI measurement is, therefore, important for the development of electronic devices. However, there is no method of measuring EMI
on the surface of 3-D structures. In a conventional method, apencil-like magnetic field probe with X-Y scanning equipment
and spectrum analyzers are used for easy EMI measurement[1]. In the method, the surface of the electronic device should
be scanned repeatedly with the probe. However, the scanningequipment can only move in a flat plane. In another conventional method, a measurement system with an integrated arrayof magnetic field loop antennas is used [2]. Although the method
captures the distribution of a magnetic field, it is not applicableto 3-D structures since the antenna array is implemented in apiece of solid board.
To solve this problem, an EMI measurement sheet was proposed, which enables the measurement of EMI distribution on
the surface of 3-D structures by wrapping the devices with asheet like “furoshiki” [3]. Once EMI noise is roughly localizedwith the measurement sheet, one can easily scan EMI noise with

0018-9200/$26.00 © 2009 IEEE
Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

250IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 1, JANUARY 2010

the probe for precise localization. The magnetic field measurement using the sheet was demonstrated as shown in [3]. The
sheet can measure not only a magnetic field but also an electricfield by changing its antenna connection.
This paper describes the details of the EMI measurement
sheet and the measurement result of both electric and magnetic
fields. In Section II, we introduce the proposed EMI measurement sheet and the key technologies including 2 V organic
CMOS and stretchable interconnects with carbon nanotubes(CNTs). In Section III, we describe the details of silicon CMOS
LSIs for electric and magnetic field detection. In Section IV, wedemonstrate the experimental results of both electric and magnetic fields with their frequency responses and provide somediscussion. Finally, the conclusions are given in Section V.

Fig. 2. Prototype of the stretchable EMI measurement sheet.

II. STRETCHABLE EMI MEASUREMENT SHEET
A. Stretchable EMI Measurement Sheet
To wrap 3-D structures such as mobile phones and large flatpanel displays, an EMI measurement sheet should be stretchable
and flexible. The sheet includes a large number of arrayed antennas and measurement circuits, and therefore, large-area circuits such as a decoder and an encoder are required. We recognize that large-area electronic circuits should be implemented
with organic CMOS to reduce cost and increase productivity.
Recently, both the operation speed and supply voltage of organic transistors have been significantly improved [4]–[6]. In
terms of operation speed, the inkjet technology in [6] realizes a
2 MHz cutoff frequency. However, this speed is not sufficient tohandle EMI noise up to 1 GHz. We, therefore, recognize that thesystem-level integration of organic transistor and silicon CMOS
circuit is essential for high-speed applications in large-area electronics. To realize a direct interface between organic transistors
and silicon CMOS transistors, the sheet employs 2 V organic
CMOS [4], [5] for the decoder and encoder, stretchable interconnects with CNTs [7], and the measurement circuit in a silicon CMOS LSI in this feasibility study.
Fig. 2 shows a prototype of the stretchable EMI measurement
sheet. Each printed circuit board (PCB) includes 2 2 antennacoils and a silicon CMOS LSI chip. The sheet consists of 4 4cm
PCBs, and therefore, 8 8 antennas are located inarea. The antennas and LSIs are controlled using a 2 V organic
CMOS row decoder and a column selector. Each module is electrically connected with stretchable interconnects made of CNTs.
The overall system is sealed with a rubber sheet made of silicone
elastomer. The sheet is, therefore, flexible and stretchable.
Fig. 3 shows the block diagram of the EMI measurement
sheet. Three-bit address and select signals are applied to theorganic CMOS row decoder. The decoder selects one row of
the arrayed EMI measurement circuit. Each select signal is connected to a PCB with rubber-like stretchable interconnects. Each
PCB has a 2 2 antenna array to pick up EMI, an LSI, and six
stretchable interconnects. The four antennas share the LSI tomeasure EMI. The outputs of silicon LSIs are connected to theorganic CMOS column selector with stretchable interconnects.
In the conventional integrated array of magnetic field antennas
on a solid board [2], the processing function of the measured results is not integrated in the board. In contrast, the EMI measure-Fig. 3. Block diagram of the EMI measurement sheet.

ment sheet has the LSIs distributed near the antennas for EMI
measurement. It is the first demonstration of a distributed in situ
EMI measurement, which has a potential to improve the measurement speed and accuracy. The diameter of the loop antenna
is 9.8 mm. The antennas are made on a rigid PCB, because theantennas on a flexible film provide unstable antenna characteristics depending on the mechanical bending. When the scale of
the array is large, a low-cost and large-area decoder is required
to reduce the number of interconnects, and therefore, organic
transistors are suitable for the decoder [8]. The performance ofthe sheet will improve as the operational speed of organic devices improves. In particular, a faster row decoder and column
selector will realize high-speed scanning of the array.
B. 2 V Organic CMOS Decoder
In conventional organic design, only pMOS has been available and the power supply voltage was often as high as 40 V
[8]. The low-gain circuits in the pMOS-only design and thehigh voltage make it difficult to interface organic circuits and
LSI. To solve this problem, 2 V organic CMOS technology enabled by a 2.1-nm thick gate insulator (phosphoric acid self-assembled monolayers, SAM [4]) and the organic semiconductor(fluoroalkyl naphthalenetetracarboxylic di-imide, NTCDI [5])for nMOS was developed. The device structure of the organic
CMOS is shown in Fig. 4. An aluminum gate is deposited on thepolyimide or silicon substrate by evaporation and the alumina
is formed by oxygen plasma. SAM is overlaid by dip-coating.

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

ISHIDA et al.: STRETCHABLE EMI MEASUREMENT SHEET FOR ELECTRIC AND MAGNETIC FIELD DETECTION

251

Fig. 4. Device structure of the 2 V organic CMOS transistor.
Fig. 6. (a) Schematic of the 3 to 8 organic CMOS decoder. (b) Photomicrograph of the decoder. The area of one bit is 4:6 20:2 mm .

2

Fig. 5. (a) Schematic of the 2 V organic CMOS inverter. (b) Measured static
characteristic of the inverter. Inverter gain of 42 is achieved with 2 V V .

Either pentacene for pMOS or NTCDI for nMOS is depositedon the gate oxide, and gold electrodes for drain and source areformed by evaporation. The sum of the alumina layer thicknessof 3.6 nm and SAM layer thickness of 2.1 nm results in a total
gate oxide thickness of 5.7 nm. Thanks to the technology of thingate oxide, 2 V operation is realized. Organic/metallic hybrid
passivation layers [9], not indicated in Fig. 4, protect organic
CMOS and lengthen its lifetime to six months or more in air.
On the other hand, [10] presents a long-life material for organic
MOS transistors. The improvement of passivation layers andtransistor materials will increase the lifetime of organic CMOS
to years in the near future.
Fig. 5(a) shows a schematic of the organic CMOS inverter.
The minimum gate length is determined using the metal mask
resolution. Each gate width and length is 50 and 20 m, respectively. Although organic nMOS transistors show poor driving
capability compared with pMOS, both nMOS and pMOS are
implemented with the same gate width because increasing thegate width degrades the transistor yield. Fig. 5(b) plots the measured static characteristic of the inverter. The inverter gain of42, which is threefold the one shown in [12], is achieved with. Sinceis decreased from 40 to 2 V, the organic
2V
CMOS can drive the silicon CMOS directly. Therefore, the first
direct silicon-organic circuit interface is realized.
Fig. 6(a) shows the schematic of the 3 to 8 organic CMOS
decoder. Three-bit address and select signals are applied andthe decoder selects a row of LSI array to be operated. Since theorganic CMOS technology allows direct signal transmission between organic circuits and LSIs, level shifters in [13] are eliminated. The column selector is similar to the row decoder. Insteadof a common select signal, each of the Out0 to Out7 signals in

Fig. 3 is applied individually to the different rows of NAND
gates shown in Fig. 6(a). The output of each decoder is fed toan 8-input NAND to generate the global output signal.
Organic CMOS devices can be implemented on a polyimide
or silicon substrate. In terms of performance and reliability,
polyimide and silicon substrates achieve almost the same characteristics. A silicon substrate, however, provides both good
handling for testing and the desired yield. Therefore, a key partof the organic decoder is fabricated on a silicon substrate in thiswork. However, the organic decoder should be implemented ona flexible substrate in a practical measurement sheet. The photomicrograph of the decoder is shown in Fig. 6(b). The area ofmm . Measurement results are shown in
one bit is
Section IV.
C. Stretchable Interconnects With CNTs
The conductive material for the stretchable interconnects is
CNTs. CNTs are an inherently stretchable material with a very
low resistivity of 0.02
cm [7], however, CNTs should be
disentangled prior to being combined with a rubberlike material. The process flow of the stretchable interconnects is shownin Fig. 7. Single-walled CNTs are used as a conductive material. An ionic liquid (1-butyl-3-methyl imidazoliumbis (trifluoromethanesulfonyl) imide, BMITFSI [7]) and CNTs are combined and ground to disentangle the CNTs. A rubberlike material, fluorinated copolymer, and CNT dispersed in gel are combined and stirred by sonication. The stretchable interconnects
film is formed by air-drying. Fig. 8 demonstrates its stretchability. The flexible interconnects can be stretched by 40% thanks
to the sliding CNTs embedded in the rubberlike material, fluorinated copolymer. The key features of the organic CMOS andstretchable interconnects are summarized in Table I.
III. SILICON CMOS LSI FOR EMI DETECTION
The typical frequency of concern with respect to EMI isfrom 30 MHz to 1 GHz as specified by the International Special
Committee on Radio Interference (CISPR). If the measurement system tries to capture the waveform of EMI digitallyas shown in Fig. 9(a), the sampling clock of the ADC should
be higher than EMI noise by twofold or more. An advanced
expensive silicon CMOS process is required to capture thewaveform of EMI noise. Furthermore, the high-speed clock

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

252

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 1, JANUARY 2010

Fig. 7. Process flow of the stretchable interconnects with CNTs.

Fig. 8. Stretchability of the interconnects with CNTs. The resistant flexible
interconnects can be stretched by 40%.

TABLE ISUMMARY OF ORGANIC CMOS AND STRETCHABLE INTERCONNECTS

pulses cause other noise problems such as clock distribution
for an arrayed circuit and noise interference with the EMI noise
to be measured. For the purpose of measuring the distributionof EMI power, however, it is not necessary to capture the noise
waveform itself. The proposed circuit, therefore, employs arectifier to convert the noise power to a DC voltage as shown

Fig. 9. Comparison of measurement methods. (a) Capturing the waveform ofEMI digitally. (b) Converting EMI power to DC voltage using rectifier.

in Fig. 9(b). In this topology, a high-speed sampling clockthat ranges from megahertz to gigahertz order is not required.
Both the advanced expensive silicon CMOS process and clockinterference issue can be avoided in this way.
Fig. 10 shows the circuit diagram and the timing chart ofthe proposed EMI measurement LSI. The LSI has a four-stage
differential amplifier, an nMOS rectifier, sample and holdcircuitry, and a comparator. The conventional integrated EMI
sensor circuits [12] have analog outputs, which is unsuitable
for array measurements because an analog signal is easily
degraded during signal transportation. In contrast, the proposed
EMI measurement LSI has a digital output, which is suitable
for array measurements.
By changing the connection method of the antenna, the electric and magnetic fields are measured separately [14]. Whenboth ends of the antenna are connected to the inputs of the differential amplifier, the magnetic field is measured, because the differential current in the antenna is amplified. On the other hand,when both ends of the antenna are connected to an input of thedifferential amplifier and the other input of the amplifier is connected to the bias voltage, the electric field is measured, because
the common-mode current in the antenna is amplified.
For the aforementioned reason, the circuitry converts EMI
noise waveform into DC voltage using the rectifier and thesample and hold circuits. The down conversion relaxes the requirement for the speed of the comparator, and the comparator
can operate at low frequency such as 100 kHz. Fig. 11 shows
the operation of the EMI measurement LSI. By adjusting theof the comparator and the offset
reference voltage
voltage of the rectifier, the comparator output shows 50%
drop of thehigh-pulse density without EMI noise. The
nMOS rectifier is canceled by AC coupling and adjusting DC
as shown in Fig. 10. Therefore, the rectified voltage
bias oncorrespondingly increases by increasing EMI noise. When theis higher thanEMI power is large, the sampled voltagethe. The output of the comparator
is high. In
is lower than,contrast, when the EMI power is small,is low. The
is reset to high at every
and therefore,clock (CompClk) edge, because the comparator is a clocked
is close tocomparator. When the EMI power is medium,and therefore,changes between high and low. By
and monitoring the pulse density of, thesweeping

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

ISHIDA et al.: STRETCHABLE EMI MEASUREMENT SHEET FOR ELECTRIC AND MAGNETIC FIELD DETECTION

253

Fig. 10. Circuit diagram and timing chart of the proposed EMI measurement LSI.

Fig. 11. Operation of the EMI measurement LSI.

EMI power can be estimated. In this way, the EMI noise power.
is observed as a function ofFig. 12(a) and (b) shows the detail of the four-stage differential amplifier with a selectable bandwidth amplifier and theschematic of each amplifier stage, respectively. Common-mode
is determined by considering the thresholdvoltagevoltage of the nMOS rectifier. The total gain is approximately
80 dB, which enables the measurement of the magnetic EMI
with a 50
input
noise of 70 dBm, equivalent to 45
resistance. Fig. 13 shows the simulated frequency responseof the amplifiers. To avoid the noise interference caused by
the 100 kHz sampling clock and its harmonics, a first-orderhigh-pass filter (HPF) is adopted before the final stage amplifier.
The bandwidth of the HPF can be changed by a five-bit digitalcode as shown in Figs. 12 and 13. To roughly estimate the
EMI noise frequency, the bandwidth of the final-stage amplifier
can also be changed by simply cutting off parallel transistors.
Fig. 14 shows the die photomicrograph and layout of the EMI
measurement LSI. The LSI is implemented in 1.8 V, 0.18 m
CMOS process, and the core area is 0.18 mm .

Fig. 12. (a) Detail of the four-stage differential amplifiers. (b) Schematic ofeach amplifier stage.

IV. EXPERIMENTAL RESULTS AND DISCUSSION
A. Direct Silicon-Organic Circuit Interface
Fig. 15(a) shows the measurement setup for the direct signaltransmission between the organic circuits, a part of the decoder
in Fig. 6, and the LSI. The power supply voltage for both theorganic circuits and LSI is 2.0 V. The organic circuits and LSI

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

254

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 1, JANUARY 2010

Fig. 13. Simulated frequency response of the four-stage amplifiers.

Fig. 15. (a) Measurement setup for the direct signal transmission between theorganic circuits and an LSI. (b) Measured waveform of the direct silicon-organicinterface.

Fig. 14. Die photomicrograph and layout of the EMI measurement LSI.

are connected by a 12 cm stretchable interconnect. Its width is 1
mm, the thickness is 500 m, the resistance is 48 , and the resistivity is 0.02 cm. Fig. 15(b) shows the measured waveform.
andare input and output waveforms of the 2 V organicis the output of the stretchable interCMOS, respectively.
is the output
connect, that is, the input of silicon CMOS LSI.
of the LSI. As shown in Fig. 15(b), the organic CMOS decoder
successfully drives the LSI without a level sifter. Both the riseand fall times of the output of the organic decoder are approximately 0.5 s, which is very slow but acceptable in this application. Although organic nMOS transistors show poor driving capability compared with pMOS, both nMOS and pMOS are implemented with the same gate length and width by considering
the layout and yield. During the transmission of the input signal
through several logic gates, both the rise and fall times of, the output of the organic decoder, are limited by the driving
capability of nMOS transistors rather than by the pMOS transistors or by the output load capacitance.
B. Comparison of Conventional and Proposed EMI
Measurements
To demonstrate the operation of the EMI measurement
sheet, the same magnetic EMIs measured with the conventional
magnetic probe [1] and the developed EMI measurement sheet
are compared. The DUT is a memory module in a laptop PC.

Fig. 16(a) and (b) shows the photograph of the measurement
setup and the spectrum of the measured magnetic EMI noisewith the magnetic probe, respectively. The highest peak is
50 dBm at 267 MHz.
On the other hand, Fig. 17(a) shows the photograph ofthe measurement setup with the EMI measurement sheet.
Fig. 17(b) and (c) shows the output waveforms of the developed
EMI measurement LSI with and without DUT, respectively. In
Fig. 17(b), the output shows a high pulse density of 81%, which
detects EMI noise above the DUT. By contrast, in Fig. 17(c),the output includes no high pulse as described in Fig. 11, which
detects no EMI noise without the DUT. Thus, the proposedsystem successfully detects the actual noise emitted by thememory module in the laptop PC.
C. Noise Frequency Estimation
Fig. 18(a) and (b) shows that the proposed LSI can roughly
estimate EMI noise frequency by changing the bandwidth of
the amplifier as shown in Fig. 13. EMI noise of 900 MHz is
measured. Fig. 18(a) shows that the density of a high-pulse
output from the comparator is 71% with a wide bandwidth setting, 45.8 dB total gain at 1 GHz. In contrast, Fig. 18(b) showsa density of 24% of a high-pulse output with a narrow bandwidth setting, 30.4 dB total gain at 1 GHz. This result indicates that the measured EMI noise frequency is high. If the measured EMI noise frequency is low such as 100 MHz, the difference in the high-pulse probability is negligible when changing
the bandwidth of the amplifier. In this feasibility study, only
the bandwidth of the final-stage amplifier can be selectable foreasy estimation. Neither high-Q, high-order filters nor mixers
are implemented. Therefore, the frequency discrimination of the

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

ISHIDA et al.: STRETCHABLE EMI MEASUREMENT SHEET FOR ELECTRIC AND MAGNETIC FIELD DETECTION

255

Fig. 16. Measured magnetic EMI noise with the conventional magnetic probe.
(a) Measurement setup. (b) Spectrum of the noise.

measurement sheet is not sufficient. To improve the frequency
discrimination, high-Q, high-order filters and mixers should be
added to the silicon CMOS circuit. By increasing the number ofamplifiers of which the bandwidth can be selectable, EMI noise
frequency can be also estimated more accurately.
D. Calibration for EMI Measurement LSI
To determine the absolute power of EMI and compensate thetotal gain of antenna coils and amplifiers, a calibration for the
EMI measurement LSI is carried out. Fig. 19 shows the measurement setup to calibrate the frequency characteristics of themeasurement of the electric and magnetic fields by the EMI
measurement LSI. EMI noise is emulated using a signal generator and an antenna. The signal generator sweeps a sinusoidal
wave up to 1 GHz. EMI noise is measured by the EMI measurement LSI and the commercial magnetic [1] and electric [15]field probes. The magnetic field probe detects power ranging
dB
error. The emufrom 10 MHz to 3 GHz within
lated EMI noise is monitored with the probe and the spectrum
analyzer to calibrate the noise power. Similar to the magnetic
field calibration, the electric field strength is calibrated using theelectric field probe that can handle an electric field from 2 MHz
to 2 GHz.
Fig. 20(a) shows the measured relationship between the magof the comparator when the comnetic field power andparator output shows 50% pulse density at different EMI frecorrespondingly
quencies in the EMI measurement LSI.

Fig. 17. Measured magnetic EMI noise with the EMI measurement sheet.
(a) Measurement setup. (b) Output waveform with DUT. (c) Output waveform
without DUT.

increases by increasing the magnetic field power. The result indicates that the input power of EMI is successfully converted
into DC voltage by the nMOS rectifier and sample and holdcircuit. The minimum detectable magnetic field noise power is
70 dBm. Once this calibration is carried out and the calibration table is established, the measurement sheet does not require
further calibration. Fig. 20(b) shows the measured frequency re.
sponse of the magnetic field power at different values of

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

256

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 1, JANUARY 2010

Fig. 20. Measured magnetic field power with the EMI measurement LSI.
V is a reference voltage of the comparator when the comparator output
shows 50% pulse density. (a) V
dependence at different EMI frequencies.
.
(b) Frequency response at different values of V

Fig. 18. Measured 900 MHz EMI noise with different bandwidths of the amplifiers. (a) Waveform with wide bandwidth setting. (b) Waveform with narrow
bandwidth setting.

Fig. 19. Measurement setup for the calibration of the frequency response of
the EMI measurement sheet.

The maximum detectable noise frequency achieves 1 GHz. An
ideal frequency response should be flat. The measured magnetic

result, however, shows that its sensitivity is degraded with increasing frequency. The frequency characteristic of the inductorof the spiral antenna coil is not flat and the frequency responseof the amplifier gain shows bandpass characteristic as shown in
Fig. 13. The measurement result reflects the frequency responseof both antennas and amplifiers in the EMI measurement LSI.
Similar to the calibration of the magnetic field, Fig. 21(a)shows the measured relationship between the electric fieldpower andat different EMI frequencies, and Fig. 21(b)shows the measured frequency response of the electric field. The minimum detectable
power at different values ofelectric field noise power is 60 dBm and the maximum
detectable noise frequency is 700 MHz.
Comparison of the electric and magnetic field measurements
shown in Figs. 20(a) and 21(a) reveals that the sensitivity of theelectric field measurement is worse than that of the magnetic
field measurement. The difference is attributable to the antenna
gain difference between the electric and magnetic fields. The
key features of the EMI measurement LSI are summarized inTable II.
In this feasibility study, the resolution of EMI localizationand the flexibility of the measurement sheet are not sufficient
to wrap mobile phones up because 9.8-mm-diameter antennacoils are employed. By using smaller antenna coils, both resolution and flexibility will be improved. In such a case, the gain

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

ISHIDA et al.: STRETCHABLE EMI MEASUREMENT SHEET FOR ELECTRIC AND MAGNETIC FIELD DETECTION

257

smaller antennas generally provide better inductive characteristics. However, the capacitive characteristics are degraded withsmaller antennas, and therefore, further amplifier gain will be
required. This may not be a reasonable solution. In terms of resolution, minimum detectable power, and frequency discrimination, a down conversion scheme with a mixer is required to enhance the performance of the EMI measurement LSI.
V. CONCLUSION
The direct silicon-organic circuit interface has been demonstrated for the first time. The system-level integration of silicon
CMOS technology, 2 V organic CMOS technology, and stretchable interconnects including carbon nanotubes makes a stretchable EMI measurement sheet possible, and the proposed LSI
demonstrates EMI noise measurement up to 1 GHz using a rectifier and comparator operating at only 100 kHz. By changing
the connection of the antenna to the LSI, the electric and magnetic fields are successfully measured separately. The minimum
detectable magnetic field noise power is 70 dBm and the maximum detectable noise frequency is 1 GHz. The minimum detectable electric field noise power is 60 dBm and the maximum detectable noise frequency is 700 MHz.
ACKNOWLEDGMENT
The authors would like to thank S. Kazama, H. Tsutagaya,
and M. Sakurada from Taiyo Yuden Co., Ltd. for fruitful discussions.
Fig. 21. Measured electric field power with the EMI measurement LSI.
(a) V
dependence at different EMI frequencies. (b) Frequency characteris.
tics at different values of V

TABLE IIPERFORMANCE SUMMARY OF THE EMI MEASUREMENT LSIREFERENCES[1] Magnetic Field Probe (CP-2S), NEC Corp., Japan.
[2] EMSCAN. [Online]. Available: http://www.emscan.com/[3] K. Ishida, N. Masunaga, Z. Zhou, T. Yasufuku, T. Sekitani, U. Zschieschang, H. Klauk, M. Takamiya, T. Someya, and T. Sakurai, “A
stretchable EMI measurement sheet with 8 8 coil array, 2 V organic
CMOS decoder, and 70 dbm EMI detection circuits in 0.18 m
CMOS,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech.
Papers, Feb. 2009, pp. 472–473.
[4] H. Klauk, U. Zschieschang, J. Pflaum, and M. Halik, “Ultralow-powerorganic complementary circuits,” Nature, vol. 445, pp. 745–748, Feb.
2007.
[5] H. E. Katz, A. J. Lovinger, J. Johnson, C. Kloc, T. Siegrist, W. Li,
Y.-Y. Lin, and A. Dodabalapur, “A soluble and air-stable organic semiconductor with high electron mobility,” Nature, vol. 404, pp. 478–481,
Mar. 2000.
[6] T. Sekitani, Y. Noguchi, U. Zschieschang, H. Klauk, and T. Someya,“Organic transistors manufactured using inkjet technology with subfemtoliter accuracy,” in Proc. National Academy of Sciences USA, Apr.
2008, vol. 105, no. 13, pp. 4976–4980.
[7] T. Sekitani, Y. Noguchi, K. Hata, T. Fukushima, T. Aida, and T.
Someya, “A rubberlike stretchable active matrix using elastic conductors,” Science, vol. 321, pp. 1468–1472, Sep. 2008.
[8] H. Kawaguchi, T. Someya, T. Sekitani, and T. Sakurai, “Cut-and-paste
customization of organic FET integrated circuit and its application toelectronic artificial skin,” IEEE J. Solid-State Circuits, vol. 40, no. 1,
pp. 177–185, Jan. 2005.
[9] T. Sekitani and T. Someya, “Air-stable operation of organic field-effecttransistors on plastic films using organic/metallic hybrid passivation
layers,” Jpn. J. Appl. Phys., vol. 46, no. 7A, pp. 4300–4306, Jul. 2007.
[10] T. Yamamoto and K. Takimiya, “Facile synthesis of highly pi-extended heteroarenes, dinaphtho[2,3-b:2 ; 3 - f]chalcogenopheno[3,2-b]chalcogenophenes, and their application to field-effect transistors,” J. Amer. Chem. Soc., vol. 129, no. 8, pp. 2224–2225, 2007.
[11] S. De Vusser, S. Steudel, K. Myny, J. Genoe, and P. Heremans, “A 2
V organic complementary inverter,” in IEEE Int. Solid-State Circuits
Conf. (ISSCC) Dig. Tech. Papers, Feb. 2006, pp. 1082–1083.

0of amplifiers should be enhanced to compensate for the smaller
antenna gain. To enhance the minimum detectable power of bothmagnetic and electric field measurements, the total gain of antenna coil and amplifiers should be improved particularly inthe high frequency region. In terms of self-resonant frequency,

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

2

258

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 1, JANUARY 2010[12] S. Aoyama, S. Kawahito, T. Yasui, and M. Yamaguchi, “A high-sensitivity active magnetic probe using CMOS integrated circuits technology,” in Proc. IEEE Topical Meeting on Electrical Performance ofElectronic Packaging, Oct. 2005, pp. 103–106.
[13] M. Takamiya, T. Sekitani, Y. Miyamoto, Y. Noguchi, H. Kawaguchi,
T. Someya, and T. Sakurai, “Design solutions for multi-object wireless power transmission sheet based on plastic switches,” in IEEE Int.
Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2007, pp.
362–363.
[14] S. Kazama and K. Arai, “Adjacent electric field and magnetic field distribution measurement system,” in Proc. IEEE Int. Symp. Electromagnetic Compatibility, Aug. 2002, vol. 1, pp. 395–400.
[15] Electric Field Probe (CTM030), Credence Technologies [Online].
Available: http://www.credencetech.com/products/product.php?productId=CTK031

Koichi Ishida (S’00–M’06) received the B.S. degree
in electronics engineering from the University ofElectro-Communications, Tokyo, Japan, in 1998,
and received the M.S. and Ph.D. degrees in electronics engineering from the University of Tokyo,
Tokyo, Japan, in 2002 and 2005, respectively.
He joined Nippon Avionics Co., Ltd. Yokohama,Japan in 1989, where he developed high-reliability
hybrid microcircuits applied to aerospace programs.
Since July 2007, he has been working at Institute ofIndustrial Science, the University of Tokyo as a research associate. His research interests include low-voltage low-power CMOS
analog circuits, RF wireless-communication circuits, and on-chip power supplies. He is a member of IEEE and IEICE.

Naoki Masunaga received the B.S. degree in electronic engineering from Sophia University, Tokyo,
Japan, in 2008. He is currently studying in Graduate
school of Engineering, The University of Tokyo. His
research interests are in the field of integrated circuitdesign.

Zhiwei Zhou received the M.S. degree in electronicengineering from University of Tokyo, Japan, in
2008. His research interests include the circuitdesign of the low-power RF receiver circuits. He is
now with Sony Corporation.

Tadashi Yasufuku (S’09) received the B.S. degree inapplied physics from Keio University, Japan in 2007,
and the M.S. degree in electronic engineering fromthe University of Tokyo, Japan, in 2009. He is currently working toward the Ph.D, degree. His researchinterests include sub/near threshold logic circuit design and switched converters.

Tsuyoshi Sekitani was born in Yamaguchi, Japan,
in 1977. He received the B.S. degree from Osaka
University, Japan, and the Ph.D. degree in applied
physics from the University of Tokyo, Japan, in 1999
and 2003, respectively.
From 1999 to 2003, he was with the Institute for
Solid State Physics (ISSP), University of Tokyo.
From 2003 to 2009, he was a Research Associate of
the Quantum-Phase Electronics Center, Universityof Tokyo. Since 2009, he has been a Research
Associate of Department of Electrical and Electronic
Engineering, University of Tokyo.

Ute Zschieschang received the Dipl.-Ing. FH, Oberflächentechnik, Fachhochschule Mittweida in 2000,
and the Dr. rer. nat., Chemie, Technische Universität
Bergakademie Freiberg in 2006. In 2005, she joined
the Max Planck Institute for Solid State Research in
Stuttgart, Germany.

Hagen Klauk received the Diplom-Ingenieur degree
in Electrical Engineering from Chemnitz Universityof Technology (Germany) in 1995, and the Ph.D. degree in electrical engineering from the Pennsylvania
State University in 1999.
From 2000 to 2005 he was with the Polymer Electronics group at Infineon Technologies in Erlangen,Germany. In 2005 he joined the Max Planck Institute for Solid State Research in Stuttgart, Germany,to lead an Independent Junior Research Group in organic electronics.

Makoto Takamiya (S’98–M’00) received the B.S.,
M.S., and Ph.D. degrees in electronic engineeringfrom the University of Tokyo, Japan, in 1995, 1997,
and 2000, respectively.
In 2000, he joined NEC Corporation, Japan, where
he was engaged in the circuit design of high speed
digital LSIs. In 2005, he joined University of Tokyo,
Japan, where he is an associate professor of VLSI
Design and Education Center. His research interests
include the circuit design of the low-power RF circuits, the ultra low-voltage digital circuits, and thelarge area electronics with organic transistors.
Dr. Takamiya is a member of the technical program committee for IEEE
Symposium on VLSI Circuits and IEEE Custom Integrated Circuits Conference(CICC).

Takao Someya (M’03) received the Ph.D. degree inelectrical engineering from the University of Tokyo,
Japan, in 1997.
In 1997, he joined Institute of Industrial Science(IIS), the University of Tokyo, as a Research Associate and was appointed to be a Lecturer of the Research Center for Advanced Science and Technology(RCAST), University of Tokyo, in 1998, and an Associate Professor of RCAST in 2002. From 2001 to
2003, he worked for the Nanocenter (NSEC) of Columbia University and Bell Labs, Lucent Technologies, as a Visiting Scholar. From 2003 to 2009, he was an Associate Professorof the Department of Applied Physics and Quantum-Phase Electronics Center,the University of Tokyo. Since 2009, he has been a Professor of electrical andelectronic engineering at the University of Tokyo. His current research interests include organic transistors, flexible electronics, plastic integrated circuits,
large-area sensors, and plastic actuators.

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.

ISHIDA et al.: STRETCHABLE EMI MEASUREMENT SHEET FOR ELECTRIC AND MAGNETIC FIELD DETECTION

Prof. Someya is a member of the IEEE Electron Devices Society, the Materials Research Society (MRS), and the Japanese Society of Applied Physics. He
serves as a subcommittee member for IEEE/IEDM and a program co-chair forthe 3rd Organic Microelectronics Workshop.

Takayasu Sakurai (S’77–M’78–SM’01–F’03)
received the Ph.D. degree in electrical engineeringfrom the University of Tokyo, Japan, in 1981.
In 1981 he joined Toshiba Corporation, where hedesigned CMOS DRAM, SRAM, RISC processors,
DSPs, and SoC Solutions. He has worked extensively
on interconnect delay and capacitance modelingknown as Sakurai model and alpha power-law MOS
model. From 1988 through 1990, he was a visiting
researcher at the University of California Berkeley,
where he conducted research in the field of VLSI

259

CAD. From 1996, he has been a professor at the University of Tokyo, working
on low-power high-speed VLSI, memory design, interconnects, ubiquitouselectronics, organic ICs and large-area electronics. He has published morethan 400 technical publications including 100 invited presentations and several
books and filed more than 200 patents.
Dr. Sakurai will be an executive committee chair for VLSI Symposia anda steering committee chair for IEEE A-SSCC from 2010. He served as aconference chair for the Symp. on VLSI Circuits, and ICICDT, a vice chair
for ASPDAC, a TPC chair for the A-SSCC, and VLSI symp., an execcuitve
committee member for ISLPED and a program committee member for ISSCC,
CICC, A-SSCC, DAC, ESSCIRC, ICCAD, ISLPED, and other international
conferences. He is a recipient of 2010 IEEE Donald O. Pederson Award in
Solid-State Circuits, 2009 achievement award of IEICE, 2005 IEEE ICICDT
award, 2004 IEEE Takuo Sugano award and 2005 P&I patent of the year award
and four product awards. He gave keynote speech at more than 50 conferences
including ISSCC, ESSCIRC and ISLPED. He was an elected AdCom member
for the IEEE Solid-State Circuits Society and an IEEE CAS and SSCS distinguished lecturer. He is a STARC Fellow, IEICE Fellow and IEEE Fellow.

Authorized licensed use limited to: UNIVERSITY OF TOKYO. Downloaded on February 4, 2010 at 19:29 from IEEE Xplore. Restrictions apply.