MEET2 - 2
InvitedLarge Area Electronics with Organic Transistors andNovel Interconnects: EMI Measurement Sheet with Stretchable
Interconnects and User Customizable Logic Paper (UCLP) withInk-Jet Printed Interconnects
Makoto Takamiya, Koichi Ishida, Tsuyoshi Sekitani, Ute Zschieschang*,
Hagen Klauk*, Takao Someya, and Takayasu Sakurai
University of Tokyo, 4-6-1 Komaba, Meguro-ku, Tokyo 153-8505, Japan* Max Planck Institute for Solid State Research, Stuttgart, Germany
ABSTRACT
Large area electronics, which takes advantage of theflexibility and the low cost per area, is a good application of
the organic FETs. In this paper, some examples of large
area electronics using organic transistors including an EMI
measurement sheet and a User Customizable Logic
Paper (UCLP) are shown.
1. INTRODUCTION
Organic electronics is attracting a lot of attention forlarge-area pervasive electronics applications, because
organic transistors can be fabricated with printing
technologies on arbitrary substrates, enabling both
high-throughput and low-cost production. In this paper,
some examples of large area electronics using organictransistors including an EMI measurement sheet and aUser Customizable Logic Paper (UCLP) are shown.
2. LARGE AREA ELECTRONICS WITH ORGANICTRANSISTORS
Large area electronics, which takes advantage of theflexibility and the low cost per area, is a good application of
the organic FETs (OFET’s). Fig. 1 shows the relation
between conventional IT applications based on silicon
VLSI and human interface applications using large areaelectronics. The IT applications such as computers andcommunications are supported by the conventional silicon
VLSI’s, because silicon MOSFETs are fast and the costper transistor (=cost per function) is low. In contrast,Display

3.
EMI
MEASUREMENT
SHEET
WITH
STRETCHABLE INTERCONNECTS
3.1 EMI Measurement SheetFig. 2 shows an example of an intrasystem EMC
issue in a mobile phone. EMI largely depends on thecircuit board layout. Localizing either an EMI source or a
critical wiring is difficult by simulation. EMI measurement
is, therefore, important for the development of electronicsystems. However, there is no method of measuring EMI
on the surface of 3D structures. In a conventional
method, a pencil-like magnetic field probe with X-Yscanning equipment and spectrum analyzers are used
for the EMI measurement [1]. In the method, the surfaceof the electronic device should be scanned repeatedly
with the probe. However, the scanning equipment can
only move in a flat plane. In another conventional

Conventional

E-paper

IT applications basedon silicon VLSI’sProbe

Solar cellEMI

Communication

Proposed

Education

IlluminationPowersupplyhuman interface applications such as ambient
intelligence can well be supported by large area
electronics with OFET’s, because OFET’s are flexible
and the cost per area is low. Thus silicon VLSI andOFET’s are not competing technologies but more
complement each other. By combining silicon VLSI’sand OFET’s, large area electronics has the potential toexpand both the application field and the market size ofelectronic industry. Therefore, the development of thelarge area electronics which sophisticatedly combines
silicon VLSI’s and OFET’s is very important.

Actuator

SensorScan

Wrap

AnalogDC to DC converter

Human interface applications
based on large area electronics

Fig. 1. Relation between conventional IT applications
based on silicon VLSI and human interface
applications using large area electronics.

Magnetic field probe

The EMI source isdifficult to localize.

EMI measurement sheet

The EMI source iseasy to localize.

Fig. 2. Intrasystem EMC issue in a mobile phone.

ISSN-L 1883-2490/17/1577 © 2010 ITE and SID

IDW ’101577

Rubber sheet

30mm, 12:Pull

Antenna coil
12cm

Si CMOS LSIEMI
measurement
circuitStretch (+40%)
42mm, 17:

Stretchable
Interconnect(CNTs)
2V organic CMOS decoder circuits

Fig. 5. Demonstration of stretchable interconnect.

Fig. 3. Stretchable EMI measurement sheet.
method, a measurement system with an integrated arrayof magnetic field loop antennas is used [2]. Although themethod captures the distribution of a magnetic field, it is
not applicable to 3D structures since the antenna array isimplemented on a flat and rigid printed circuit board.
To solve this problem, an EMI measurement sheet [3-5]was proposed, which enables the measurement of EMI
distribution on the surface of 3D structures by wrapping
the devices with a sheet like “furoshiki ”. Once EMI noise isroughly localized with the measurement sheet, one caneasily scan EMI noise using the probe method for precise
localization or better quantification of the EM field. Thesheet can measure not only a magnetic field but also anelectric field suitably changing its antenna connection [5].
Fig. 3 shows a prototype of the stretchable EMI
measurement sheet. Each printed circuit board (PCB)
includes 2×2 antenna coils and a silicon EMI
measurement LSI. The sheet consists of 4×4 PCB’s, andtherefore, 8×8 antennas are located in 12×12cm2 area.
The antennas and LSI’s are controlled using 2V organic
CMOS decoder and selector. Each module is electricallyconnected with a stretchable interconnect made of carbon
nanotubes (CNT’s). The overall system is sealed with arubber sheet made of silicone elastomer. The sheet is,therefore, flexible and stretchable. The sheet detects thetotal power of an electric field in the band up to 700MHz
and that of a magnetic field up to 1GHz. The minimum
Carbon nanotubes(CNTs)

Fluorinatedcopolymer> 4 mmIonic liquid(BMITFSI)
Grinding todisentangle CNTs
CNTs dispersed gel
Stirring / Sonication

Air-drying
Stretchable interconnect filmFig. 4. Process flow of the stretchable interconnects.

1578

IDW ’10detectable power of the electric and magnetic fields are-60 and -70dBm, respectively.
3.2 Stretchable Interconnects with CNT’s
The conductive material for the stretchable
interconnects is CNT’s. CNT’s are an inherently
stretchable material with a very low resistivity of 0.02µ:cm [6], however, CNT’s should be disentangled prior
to being combined with a rubberlike material. The
process flow of the stretchable interconnects is shown inFig. 4. Single-walled CNT’s are used as a conductivematerial. An ionic liquid (1-butyl-3-methyl imidazoliumbis(trifluoromethanesulfonyl) imide, BMITFSI [6]) and
CNT’s are combined and ground to disentangle theCNT’s. A rubberlike material, fluorinated copolymer, andCNT dispersed in gel are combined and stirred bysonication. The stretchable interconnects film is formedby air-drying. Fig. 5 demonstrates its stretchability. The
flexible interconnects can be stretched by 40% thanks tothe sliding CNT’s embedded in the rubberlike material,
fluorinated copolymer.
4. UCLP WITH INK-JET PRINTED INTERCONNECTS
4.1 User Customizable Logic Paper (UCLP)UCLP is proposed for both prototyping of larger-area
electronics and educational applications [7]. In particular,
as shown in Fig. 6, learners can study and experience
the operation of integrated circuits by fabricating custom
integrated circuits, using at-home ink-jet printers to print
conducting interconnects on paper that contains
prefabricated arrays of organic transistors. The
feasibility of UCLP is demonstrated with the newly
proposed Sea-of Transmission-Gates (SOTG) of
organic CMOS transistors, providing field customizability
through the use of the printable electronics technology.
UCLP is applicable to a wide range of products ofprintable electronics including flexible displays andelectronic paper, as well as for educational purposes.
This technology provides a new means to add
programmability for integrated circuits used in large-area
electronics.

Ag, Ink-jet printed interconnects (t=1µm)
Ag, Via(I200µm)
Au, Pad

SAM*Fig. 6. User Customizable Logic Paper (UCLP) for
educational purpose. Learners can study andexperience operation of integrated circuits byfabricating custom integrated circuits, using at-home
ink-jet printers to print conducting interconnects onpaper that contains prefabricated arrays of organictransistors.
Fig. 7 shows a prototype of UCLP [7]. In UCLP, paperthat contains an array of vias and an organic SOTG filmare stacked. Although it would be ideal to fabricate thewhole UCLP including the organic transistors using ink-jet
printers, this proves to be very difficult since both hightemperature (130-150ºC) and an organic solvent arerequired to fabricate the organic transistors. Since hightemperatures and organic solvents cannot be handled byink-jet printers, in UCLP the organic transistors are
prefabricated and the field customizability is provided by
the printed interconnects.
Fig. 8 shows the cross section of UCLP. The 2-V
organic CMOS transistors [8] are fabricated on polyimide
film. Organic semiconductors for nMOS and pMOS are
F16CuPc and pentacene, respectively [8]. Self-assembled
mono-layers (SAM) realize 2-V organic transistors, which
are covered with a protective layer of parylene.
Connection pads to the paper are formed with gold on topof this protective layer. The interconnects are ink-jet
printed onto the paper by users.

Paper (t=150µm)

Au, Pad Au, Pad
Au (Source/ Drain)
Au, Via

AlOx
Al (Gate, interconnects)
Polyimide substrate
2V Organic semiconductor
Pentacene (pMOS), F16CuPc (nMOS)

SOTG* SAM:Phosphonic acid-based self-assembled monolayer**F16CuPc:Hexadecafluorocopperphthalocyanine

Fig. 8. Cross section of UCLP.
have been developed to date. However, either a hightemperature (130-150ºC) sintering or chemical processwith organic solvent is required after the printing process,which causes damage to organic transistors. In contrast,
our proposed ink-jet printing technology does not require
such processes. The technology consists of pre-coatednanoconductive base and silver nanoparticle ink. The
diameter of silver nanoparticles in the ink is typically
20nm. The ink chemically reacts with the pre-coatednanoconductive base on the paper at room temperature,that is, a sintering-free process, and does not cause
damage to organic transistors.

Ink-jet printer4.2 Ink-Jet Printed Interconnects
A number of ink-jet printed interconnects technologies

Paper with via array.
Interconnects will beformed by Ink-jet printer.

Parylene

UCLPL/S = 200Pm/200Pm

I200µm

200Pm

8x8 organic sea-oftransmission-gate(SOTG) film

Fig. 7. Prototype of UCLP.

Printed interconnects

Via hole

Sheet resistance: 0.2:/squareVia resistance: 2.7:/viaFig. 9. Photograph of the printing process of theinterconnects on UCLP using ink-jet printer, printed
interconnects, and a via hole.

IDW ’101579

VDD(2.5V)

Ink-jet printed interconnects
Organic pMOS LED driver(L :20µm, W:1200µm)
OUT
1M:13pF

1mm

IN(10Hz)
Vias(a)

IN

100ms

2.5V

OUT(b)
Fig. 10. Measured waveform of organic transistor
through printed interconnects. (a) Measurement
set-up. (b) Input and output waveforms.
Fig. 9 shows a photograph of the printing process of theinterconnects on UCLP using an off-the-shelf ink-jet(piezo-jet) printer and photographs of printed
interconnects and a via hole. The thickness of the Ag
interconnect is 1µm (typ.) and the measured sheet
resistance is 0.2:/square (typ.). The via holes of 200µm in
diameter are prefabricated in UCLP by punching, in orderto form a connection to the SOTG. The measured via
resistance is 2.7:/via.
In order to evaluate signal attenuation due to the printed
interconnects on the paper, the open drain pMOS LED
driver with three printed interconnects shown in Fig. 10(a)is measured at 2.5-V power supply voltage (VDD). Fig.
10(b) shows the output waveform from the proposed
printed interconnects on the paper. Although the output
swing is slightly degraded due to the printed interconnects,
it is acceptable because the driver can the driver can still
provide capability to drive low-power LED’s and logicgates of the SOTG.
5. CONCLUSION
Some examples of large area electronics using organic
transistors including the EMI measurement sheet with thestretchable interconnects and UCLP with the ink-jet
printed interconnects are shown. By combining silicon
VLSI’s and OFET’s, large area electronics has thepotential to expand both the application field and themarket size of electronic industry.
ACKNOWLEDGMENT
This work was partially supported by CREST/JST, theGrant-in-Aid for Scientific Research, Special Coordination
Funds for Promoting and Technology, and NEDO.

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IDW ’10REFERENCES[1] Magnetic field probe (CP-2S), NEC Corporations.
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