ISSCC 2013 / SESSION 6 / EMERGING MEDICAL AND SENSOR TECHNOLOGIES / 6.4
6.4

1µm-Thickness 64-Channel Surface Electromyogram
Measurement Sheet with 2V Organic Transistors for
Prosthetic Hand Control

Hiroshi Fuketa1,2, Kazuaki Yoshioka1,2, Yasuhiro Shinozuka1,2,Koichi Ishida1,2, Tomoyuki Yokota1,2, Naoji Matsuhisa1,2, Yusuke Inoue1,2,Masaki Sekino1,2, Tsuyoshi Sekitani1,2, Makoto Takamiya1,2,Takao Someya1,2, Takayasu Sakurai1,2
University of Tokyo, Tokyo, Japan, 2JST/ERATO, Tokyo, Japan1

A surface electromyogram (EMG), which measures a voltage waveform produced by skeletal muscles on skin, is an important tool for applications detecting the human will of motion, such as for prosthetic hands and prosthetic legs.
In the application to a prosthetic hand, a multipoint EMG measurement isrequired to precisely control the hand [1, 2]. Conventional multipoint measurements with a passive electrode array [1-3], however, have two problems: 1)
Measurement over a long time period is annoying, because the EMG electrodes
placed on the skin are rigid, and 2) the signal integrity of EMG is degraded,because the number of wires between the electrodes and the front-end circuits
increases with increasing number of measurement points. To address thesechallenges, a surface EMG measurement sheet (SEMS) on which an EMG electrode array and a front-end amplifier array with 2V organic transistors are integrated on a 1μm-thick ultra-flexible film is developed to control prosthetic
hands. The developed SEMS enables a comfortable long-time measurement
without signal integrity degradation.
The design challenges of organic circuits for the amplifier array are as follows:
1) the increase in the pitch of the electrode array due to the large area of theamplifier, and 2) the mismatch of amplifiers due to the large mismatch of organic transistors. To solve these problems, we propose: 1) a distributed and shared
amplifier (DSA) architecture for the in-situ amplification of the myoelectric signal with a fourfold increase in EMG electrode density, and 2) the post-fabrication
select-and-connect (SAC) method that reduces the transistor mismatch and thepower consumption of the amplifier by 92% and 56%, respectively, comparedwith the use of conventional parallel transistors.
Figure 6.4.1 shows a photograph of the developed 45x40mm2 64-channel SEMS.
In SEMS, an 8x8 EMG electrode array sheet and an 8x2 front-end amplifier array
sheet with 2V organic transistors on a 1μm-thick ultra-flexible polyethylene
naphthalate (PEN) film are stacked. The pitch of the EMG electrode is 0.7mm andthe area of the 8x8 EMG electrode array is 3.5mm2. Figure 6.4.2 shows a circuit
schematic of SEMS with the proposed DSA architecture. SEMS has an amplifier
array instead of a conventional passive electrode array [1-3] to avoid signal
integrity degradation. Because the area of the amplifier is large, as shown in Figs.
6.4.1 and 6.4.7, one amplifier is shared by four EMG electrodes, which increases the electrode density fourfold. In addition, the EMG electrode array and theamplifier array are fabricated on separate sheets and the sheets are stacked [4]to increase the electrode density. As shown in Fig. 6.4.2, in Block00, one of thefour EMG electrodes is selected by local word line (LWL) signals LWL0 to LWL3,
and the source-followed signal is amplified by the amplifier. Then, the two outputs of the amplifiers are selected by global word line (GWL) signals GWL0 toGWL1. We use 2V organic pMOS transistors with the organic semiconductor ofDNTT [5] and the gate dielectric of a self-aligned monolayer (SAM) technology[6], which requires a pMOS-only circuit design.
Figure 6.4.3 shows conventional and proposed transistor mismatch reduction
techniques for the amplifier array. Figures 6.4.3(a) and (b) show conventionaltransistor mismatches in a single transistor and N parallel transistors, respectively. Figure 6.4.3(c) shows the proposed post-fabrication SAC method. In theSAC method, first, the I-V characteristics (e.g., threshold voltage and ON-current(ION)) of each transistor are measured. 2N measurements are required. Then, M1and M2 transistors are selected from the left and right groups in Fig. 6.4.3(c),respectively, on the basis of the results of calculation to minimize the target mismatch. M1 and M2 are not always equal. Finally, the selected M1 (M2) transistors
are connected by inkjet-printed interconnects, as shown in Fig. 6.4.3(c).
Although the proposed SAC is too costly and impractical in silicon VLSI technology, SAC is advantageous in printed electronics. In Fig. 6.4.3(d), the area,104• 2013 IEEE International Solid-State Circuits Conference

power, and mismatch are compared among (a) single transistor, (b) paralleltransistors, and (c) SAC. Detailed analysis is shown in Fig. 6.4.4.
Figure 6.4.4(a) shows the measured IDS-VDS characteristics of 11 organic pMOS
transistors. In this work, the target mismatch is ION. On the basis of the measured μ(ION) and σ(ION), ION mismatch is simulated assuming that ION is normally distributed, and the conventional parallel transistors (Fig. 6.4.3(b)) and theproposed SAC (Fig. 6.4.3(c)) are compared. Figure 6.4.4(b) shows the simulated N dependence of ION mismatch. The ION mismatch of the parallel transistors
is proportional to 1/√N according to Pelgrom’s law. In contrast, the ION mismatch of the proposed SAC is much smaller than that of the conventional parallel transistors. Figure 6.4.4(c) shows the simulated N dependence of ION mismatch reduction derived from Fig. 6.4.4(b). ION mismatch reduction is -92% at
N=4, which corresponds to the photograph in Fig. 6.4.3(c). Figure 6.4.4(d)shows the simulated N dependence of μ(ION) (=average power). μ(ION) is
reduced by 56% at N=4 compared with that of the parallel transistors. In thisway, the proposed SAC achieves a much smaller mismatch than the conventional parallel transistors with less power overhead.
In pMOS-only circuit design, it is difficult to increase the gain of an amplifier. Apseudo-CMOS inverter [4, 7] achieves a high gain, although it requires a negative voltage. Therefore, in this work, a pMOS-only amplifier with an AC-coupled
load based on [8] is used, which does not require a negative voltage. Figure
6.4.5(a) shows a circuit schematic of the pMOS-only amplifier used in SEMS.
For comparison, a conventional diode load is also shown. In the AC-coupled
load, the VGS of M1 is constant owing to C2 and the impedance of the load ishigh, thereby achieving a high gain. C1 and C2 are implemented by MIM capacitors, and R1 and R2 are implemented by pMOS transistors. Figure 6.4.5(b)shows the measured frequency dependence of the gain of the amplifier at 2V.
The gain of the amplifier with the AC-coupled load is much higher than that withthe diode load. The power consumption of the amplifier with the AC-coupled load
is 30μW. The target specifications of the amplifier are “gain at 100Hz > 20dB”
and “gain at 500Hz > 10dB”, because the typical amplitude and frequency bandof the surface EMG are 1-to-2mV and 10-to-500Hz, respectively. In Fig. 6.4.5(b),the measured gains at 100Hz and 500Hz are 21dB and 10dB, respectively, which
satisfy the target specification.
Figure 6.4.6 shows the measurement setup and measured waveforms of the surface EMG with the organic amplifier. The difference between the waveforms with
open and closed hands is clearly observed. Figure 6.4.7 shows the photographof the organic amplifier and a summary of key features.
References:[1] P. Liu, et al., “EMG-to-Force Modeling for Multiple Fingers,” IEEE Annual
Northeast Bioengineering Conference (NEBEC), pp. 1-2, Apr. 2011.
[2] D. Staudenmann, et al., “Towards Optimal Multi-Channel EMG ElectrodeConfigurations in Muscle Force Estimation: A High Density EMG Study,” Elsevier
Journal of Electromyography and Kinesiology, vol. 15, issue 1, pp. 1-11, Feb.
2005.
[3] B. G. Lapatki, et al., “A Thin, Flexible Multielectrode Grid for High-Density
Surface EMG,” American Physiological Society Journal of Applied Physiology,
vol. 96, no. 1, pp. 327-336, Jan. 2004.
[4] T. Yokota, et al., “Sheet-Type Organic Active Matrix Amplifier System Using
Vth-Tunable, Pseudo-CMOS Circuits with Floating-Gate Structure,” IEDM Dig.
Tech. Papers, pp. 335-338, Dec. 2011.
[5] T. Yamamoto and K. Takimiya, “Facile Synthesis of Highly π-Extended
Heteroarenes,Dinaphtho[2,3-b:2’,3’-f]chalcogenopheno[3,2b]chalcogenophens, and Their Application to Field-Effect Transistors,” Journal ofAmerican Chemical Society, vol. 129, no. 8, pp. 2224-2225, Aug. 2007.
[6] H. Klauk, et al., “Ultralow-Power Organic Complementary Circuits,” Nature,
vol. 445, pp. 745-748, Feb. 2007.
[7] K. Ishida, et al., “100-V AC Power Meter System-on-a-Film (SoF) Integrating
20-V Organic CMOS Digital and Analog Circuits with Floating Gate for Process
Variation Compensation and 100-V Organic PMOS Rectifier,” IEEE ISSCC Dig.
Tech. Papers, pp. 218-219, Feb. 2011.
[8] H. Marien, et al., “A Fully Integrated ΔΣ ADC in Organic Thin-Film Transistor
Technology on Flexible Plastic Foil,” IEEE J. Solid-State Circuits, vol. 44, no. 1,
pp. 276-284, Jan. 2011.

978-1-4673-4516-3/13/$31.00 ©2013 IEEE

ISSCC 2013 / February 18, 2013 / 3:15 PM6Figure 6.4.1: Developed 64-channel surface electromyogram measurement
sheet (SEMS).

Figure 6.4.2: Circuit schematic of SEMS with proposed distributed and shared
amplifier (DSA) architecture.

Figure 6.4.3: Conventional and proposed transistor mismatch reduction
techniques. The post-fabrication select-and-connect (SAC) method isproposed.

Figure 6.4.4: (a) Measured mismatch in 11 organic pMOS transistors.
Simulated N dependence of (b) ION mismatch, (c) ION mismatch reduction, and(d) average ION.

Figure 6.4.5: (a) Schematic of pMOS-only amplifier. (b) Measured frequency
dependence of gain of amplifiers with different loads.

Figure 6.4.6: Measurement setup and measured waveforms of surface EMG
with organic amplifier.

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Figure 6.4.7: Photograph and key features.

• 2013 IEEE International Solid-State Circuits Conference

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