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IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 8, NO. 6, DECEMBER 2014

1 m-Thickness Ultra-Flexible and HighElectrode-Density Surface Electromyogram
Measurement Sheet With 2 V Organic Transistors
for Prosthetic Hand Control
Hiroshi Fuketa, Member, IEEE, Kazuaki Yoshioka, Yasuhiro Shinozuka, Koichi Ishida, Member, IEEE,
Tomoyuki Yokota, Naoji Matsuhisa, Yusuke Inoue, Masaki Sekino, Member, IEEE,
Tsuyoshi Sekitani, Makoto Takamiya, Member, IEEE, Takao Someya, Member, IEEE, andTakayasu Sakurai, Fellow, IEEE

Abstract—A 64-channel surface electromyogram (EMG)
measurement sheet (SEMS) with 2 V organic transistors on a
1 m-thick ultra-flexible polyethylene naphthalate (PEN) filmis developed for prosthetic hand control. The surface EMG
electrodes must satisfy the following three requirements; highmechanical flexibility, high electrode density and high signal integrity. To achieve high electrode density and high signal integrity,a distributed and shared amplifier (DSA) architecture is proposed,
which enables an in-situ amplification of the myoelectric signal
with a fourfold increase in EMG electrode density. In addition, a
post-fabrication select-and-connect (SAC) method is proposed tocope with the large mismatch of organic transistors. The proposed
SAC method reduces the area and the power overhead by 96%
and 98.2%, respectively, compared with the use of conventional
parallel transistors to reduce the transistor mismatch by a factorof 10.
Index Terms—Electromyogram, organic large-area electronics,
surface EMG measurement.

I. INTRODUCTIONSURFACE electromyogram (EMG), which measures a
voltage waveform produced by skeletal muscles on askin, is an important tool for applications detecting the humanwill of motion, such as for prosthetic hands [1]–[3]. In thispaper, electrodes for measuring surface EMG are focused on,
Manuscript received October 14, 2013; revised November 29, 2013; accepted
March 02, 2014. Date of publication June 10, 2014; date of current version January 15, 2015. This paper was recommended by Associate Editor S. Gambini.
H. Fuketa, K. Yoshioka, M. Takamiya, and T. Sakurai are with the Instituteof Industrial Science, University of Tokyo, Tokyo 153-8505, Japan, and alsowith Exploratory Research for Advanced Technology (ERATO), Japan Scienceand Technology Agency (JST), Tokyo 113-0032, Japan (e-mail: fuketa@iis.utokyo.ac.jp).
Y. Shinozuka was with the Institute of Industrial Science, University ofTokyo, Tokyo 153-8505, Japan. He is now with the Corporate Research andDevelopment Center, Toshiba Corporation, Kawasaki 212-8582, Japan.
K. Ishida was with the Institute of Industrial Science, University of Tokyo,
Tokyo 153-8505, Japan. He is now with the Dresden University of Technology,
01069 Dresden, Germany.
T. Yokota, N. Matsuhisa, Y. Inoue, M. Sekino, T. Sekitani, and T. Someya
are with the Department of Electrical Engineering and Information Systems,
School of Engineering, University of Tokyo, Tokyo 113-8656, Japan, and alsowith Exploratory Research for Advanced Technology (ERATO), Japan Scienceand Technology Agency (JST), Tokyo 113-0032, Japan.
Digital Object Identifier 10.1109/TBCAS.2014.2314135

Fig. 1. Prosthetic hand control system with surface EMG.

as shown in Fig. 1. In the application to a prosthetic hand, theelectrodes must satisfy the following three requirements toachieve reliable and precise hand control.
1) High Mechanical Flexibility: The EMG electrodes areplaced on the skin and if the electrodes are rigid, measurement
over a long time period is annoying. Thus, the electrodes shouldbe mechanically flexible.
2) High Electrode Density: A multipoint EMG measurement
is required to precisely control the hand [4], [5].
3) High Signal Integrity: As shown in Fig. 1, the EMG signals on the electrodes are obtained through wires. These wires
are sensitive to cable motion artifacts [6]. The number of thewires between the electrodes and the front-end circuits increases
with increasing number of measurement points, which degrades
signal integrity of EMG. Signal integrity should be taken into
account, since the voltage of the measured surface EMG is significantly small, typically ranges from tens of micro-volt amplitude to several milli-volt amplitude [7], [8].
It is difficult for the conventional passive electrodes [4], [5],[8]–[10] and active electrodes [11] to satisfy all of these requirements. Thus, a surface EMG measurement sheet (SEMS), on
which an EMG electrode array and a front-end amplifier arraywith 2 V organic transistors are integrated on a 1 m-thickultra-flexible film, is developed in this paper to address thesechallenges. The front-end amplifiers in the proposed SEMS can
reduce the output impedance and increase the S/N ratio, which
improves the signal integrity.
The design challenges of organic circuits for the amplifier
array are as follows: 1) the decrease in the electrode density due

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FUKETA et al.: 1 m-THICKNESS ULTRA-FLEXIBLE AND HIGH ELECTRODE-DENSITY SURFACE ELECTROMYOGRAM MEASUREMENT SHEET

825

Fig. 2. Developed 64 channel surface electromyogram measurement sheet (SEMS).

to the large area of the amplifier, and 2) the mismatch of amplifiers due to the large mismatch of organic transistors. To solvethese problems, we propose 1) a distributed and shared amplifier(DSA) architecture for the in-situ amplification of the myoelectric signal with a fourfold increase in EMG electrode density,and 2) a post-fabrication select-and-connect (SAC) method that
reduces the area and power overhead by 96% and 98.2%, respectively, compared with the use of conventional parallel transistors to reduce the transistor mismatch by 1/10 times. Both the
DSA architecture and the SAC method will be essential in thelarge-scale-array measurement of biomedical signals with flexible and printed electronics.
The feasibility of SEMS has been demonstrated in [12]. The
major contributions of this paper beyond the preliminary work
are as follows: 1) The gain of amplifiers with a pMOS-only
inverter is analytically evaluated, and 2) Two types of the SAC
method are proposed and compared in terms of the area andpower overhead.
This paper is organized as follows. Section II describes thedetails of the developed SEMS and DSA. The proposed SAC
method is explained in Section III. Section IV shows measurement results of the organic amplifier implemented SEMS andmeasured waveforms of the surface EMG obtained by SEMS.
Finally, Section V concludes this paper.
II. SURFACE ELECTROMYOGRAM MEASUREMENT SHEETA. Overview
Fig. 2 shows a photograph of the developed 45 40 mm
64-channel surface EMG measurement sheet (SEMS). In
SEMS, an 8 8 EMG electrode array sheet and an 8 2
front-end amplifier array sheet with 2 V organic transistors
are stacked. These organic transistors are fabricated on a 1
m-thick polyethylene naphthalate (PEN) film, which enables
ultra-flexibility as shown in Fig. 3.
We use 2 V organic pMOS transistors with the organic semiconductor of DNTT [13] and the gate dielectric of a self aligned
monolayer (SAM) technology [14], as shown in Fig. 4, which
requires a pMOS-only circuit design. SAM technology enables
a total gate oxide thickness of 6 nm and 2 V operation, andFig. 3. Photograph of ultra-flexible SEMS, which is fabricated on 1 m-thick
PEN film with 2 V organic transistors.

Fig. 4. Device structure of 2 V organic pMOS transistor.

DNTT is stable material with a high mobility of 1.0 cm /Vs[15]. The minimum gate length is 20 m. The minimum gate
length is determined by the metal mask resolution [16]. The
details about the organic transistors fabricated on the ultra-thin
PEN film have been described in [17]. The mechanical stabilityof the transistors has been also demonstrated in [17].
Table I compares SEMS with the conventional EMG electrodes. The passive electrodes can be implemented on flexible
substrates [4], [5], [8]–[10], which enables high mechanicalflexibility and high electrode density, since they only include
electrodes and do not include any active devices, such as
amplifiers. The previous works about the EMG electrodes
for the prosthetic hand control [4], [5] have reported that the826IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 8, NO. 6, DECEMBER 2014

TABLE ICOMPARISON BETWEEN CONVENTIONAL ELECTRODES AND SEMS

electrode pitch of from 5 to 7 mm and the electrode density offrom 64 channels per 31 cm to 130 channels per 27 cm areused to achieve precise control. However, signal integrity ofthe passive electrode is low, because amplifiers are not locatednear electrodes. In the active electrodes [11], on the other hand,
amplifiers are located near electrodes, and hence high signal
integrity can be achieved. However, the amplifiers are rigid
and large, which makes mechanical flexibility and electrodedensity low. Although the flexible active electrodes have been
demonstrated in [18], the electrodes are not arrayed and thegain of the amplifier of the active electrodes is small.
Therefore, it is difficult for the conventional passive and active electrodes to satisfy all the three requirements of electrodes
for the prosthetic hand control; high mechanical flexibility, highelectrode density, and high signal integrity. In contrast, both thesurface EMG electrodes and organic amplifiers are fabricatedon the 1 m-thick PEN film in the proposed SEMS, which enables ultra-flexible electrodes with high electrode density andsignal integrity as shown in Table I.
B. Distributed and Shared Amplifier (DSA) Architecture
One of the design issues of organic circuits is the increasein electrode density due to the large area of the organic amplifier, which will be explained in Section II.C. To address thisissue, distributed and shared amplifier (DSA) architecture forthe in-situ amplification of the myoelectric signal is proposed.
Fig. 5 shows the circuit schematic of SEMS to which the proposed DSA is applied. In SEMS with DSA, one amplifier isshared with four EMG electrodes, which increases the electrodedensity fourfold. In addition, the EMG electrode array and theamplifier array are fabricated on separate sheets and the sheets
are stacked [19] to further increase the electrode density.
In Block00, one of the four EMG electrodes is selectedby local word line (LWL) signals LWL0 to LWL3, and thesource-followered signal is amplified by the amplifier. Then,the two outputs of the amplifiers are selected by global wordline (GWL) signals GWL0 and GWL1. Although eight columns(LWL0–LWL7) are implemented in the developed SEMS asshown in Fig. 5, the columns of SEMS can be easily expandedby adding GWL signals.
With the proposed DSA architecture, the electrode pitch of
5 mm and the electrode density of 64 channels per 18 cm
are achieved. It corresponds to 3.6 channels/cm and is comparable with that of the conventional passive electrodes as listed
in Table I.

Fig. 5. Circuit schematic of SEMS with proposed distributed and shared
amplifier (DSA) architecture.

C. Inverter-Based Amplifier Design
As described in Section II.A, we use organic pMOS process,which requires a pMOS-only circuit design. Therefore, an amplifier based on a pMOS-only inverter is investigated in thissection.
In pMOS-only circuit design, it is difficult to increase thegain of an amplifier. An amplifier based on a pseudo-CMOS
inverter [19], [20] shown in Fig. 6(a) achieves a high gain [19],in Fig. 6(a)]. Therealthough it requires a negative voltage [fore, in this work, a pMOS-only amplifier with an AC-coupled
load based on [21] is used, which does not require a negative
voltage. Fig. 6(b) shows a circuit schematic of the pMOS-only
amplifier with the AC-coupled load. For comparison, a convenis required to detional diode load is also shown. In Fig. 6,
termine the bias voltage of the input signal of the inverter-based
amplifier.
In this section, the frequency dependences of the gains of
the pMOS-only amplifiers with the diode load and AC-coupled
load analytically are evaluated. In this evaluation, the gain of theinverter is discussed when an AC signal is input to the pMOSonly inverter as shown in the inset of Fig. 7. For simplicity,
any parasitic resistances and capacitances of the transistors are
ignored.
denotes the gain of the pMOS-only amplifier with thediode load and is given by(1)
andare the transconductance and output
where
conductance of transistor M1(M2), respectively.

FUKETA et al.: 1 m-THICKNESS ULTRA-FLEXIBLE AND HIGH ELECTRODE-DENSITY SURFACE ELECTROMYOGRAM MEASUREMENT SHEETThe frequency dependence ofapproximated as

is shown in Fig. 6.

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can be(4)where and are lower and higher cutoff frequencies, respectively, and they are expressed as(5)(6)

Fig. 6. Circuit schematic of amplifier with 2 V organic pMOS. (a) Amplifier based on pseudo-CMOS inverter [19]. (b) Amplifier based on pMOS-only
inverter.

Equation (4) indicates that the gain of the amplifier with the
AC-coupled load is much larger than that with the diodeandare typically smaller
load (shown in (2)), sincethan.
One of disadvantages of the amplifier with the AC-coupled
load is that the pseudo-CMOS inverter has a constant gain,
whereas the gain of the amplifier with the AC-coupled loaddecreases in the low frequency region as shown in Fig. 7.
is inversely proportional
Since the lower cutoff frequency
toas indicated in (5),must be determined suchthatsatisfies the frequency band required for the surface
EMG, which is typically 10-to-500 Hz [7]. In addition,
in Fig. 6 also determines the lower cutoff frequency. In thispaper,
andare 47 nF, andandare implemented)
by always-off (i.e., the gate voltage is always tied totransistors.
andare typically larger than 100 M , and theinfluence of resistance variations inandis small becauseandof 47 nF are used. The
large enough capacitances
measurement results of the amplifier with AC-coupled load
will be shown in Section IV.
III. SELECT-AND-CONNECT METHOD TO REDUCE MISMATCH
A. Overview

Fig. 7. Gain dependence on frequency of pMOS-only amplifiers.

Typically,is much larger thanis approximated asand. Thus,(2)This equation indicates that the gain of the pMOS-only amplifier
with the diode load is small.
In contrast, the gain of the amplifier with the AC-coupled load
is expressed as(3)

Fig. 8 shows the measured
characteristics of 11 organic pMOS transistors. As shown in this figure, variations ofcharacteristics of organic transistors are large. Therefore, one ofthe design challenges of organic circuits for the amplifier arrayis the mismatch of amplifiers due to such large mismatch of organic transistors.
In order to reduce such large mismatch, parallel transistors areconventionally used. However, the area and power overhead in
the conventional parallel transistors are large. In this paper, apost-fabrication select-and-connect (SAC) method that reduces
the transistor mismatch with small area and power overhead is
proposed. Fig. 9 explains the proposed SAC method. The SAC
method is divided into the following three steps.
First (step 1), the I-V characteristics (e.g., threshold voltage
and ON-current) of each transistor are measured. 2N measurements are required when the number of parallel transistors
is N.
Then (step 2),
andtransistors are selected from the left
and right groups, respectively, as shown in Fig. 9(c), on the basisof the results of calculation to minimize the target mismatch.

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TABLE IICOMPARISON BETWEEN CONVENTIONAL PARALLEL TRANSISTORS ANDPROPOSED SAC

Fig. 8. Measured-

characteristics of 11 organic pMOS transistors.

Fig. 10. Photograph of inkjet-printed interconnects used in proposed SAC
method when N is 4 and N1 is 2.

Although the proposed SAC is too costly and hence it is impractical in the silicon VLSI technology, the SAC takes advantageof the printed/printable electronics.
Table II summarizes the comparison between the conventional N parallel transistors and the proposed SAC method interms of the number of combinations, area, power, and mismatch. In the SAC method, the mismatch and power are lessthan-fold and N-fold, respectively, at the cost of an N-foldarea increase. The details about the mismatch reduction and thearea and power overhead will be discussed in Section III.B.
B. Simulation Results
Fig. 9. Conventional and proposed transistor mismatch reduction techniques.
Post-fabrication select-and-connect (SAC) method is proposed. (a) Single
transistor. (b) Parallel transistors. (c) Proposed select-and-connect (SAC)
method.

In this paper, two types of the transistor selection methods are
considered; SAC-1 and SAC-2. In SAC-1,
andare fixed
to a certain value.
is chosen
independently of N. In SAC-2,
andare equal to or lessthan
. The numbers of combination of SAC-1
and SAC-2 are listed in Table II.
Finally (step 3), the selectedtransistors are connected by inkjet-printed interconnects. Fig. 10 shows a photograph of inkjet-printed interconnects when N is 4 andis 2.
In this work, the width of interconnects is 10 m. In [22], it has
been demonstrated that the minimum line and space of inkjetprinted interconnects is 1 m. In contrast, the width of metal
wire lines in SEMS is several hundreds of micrometers. Therefore, it is feasible to print interconnects by the inkjet printer.

. It should be noted
In this work, the target mismatch isthat the proposed SAC is also applicable to the mismatch reduction of other characteristics, such as threshold voltage. On
the basis of the measured
andmismatch
is simulated by Monte-Carlo simulations assuming thatisnormally distributed, and the conventional parallel transistors(Fig. 9(b)) and the proposed SAC (Fig. 9(c)) are compared. It
should be noted that SAC can reduce any random variations,which cause mismatch, and does not depend on their distributions. The number of trials of the Monte-Carlo simulations is
one million.
Fig. 11 shows the simulated N dependence ofmismatch.
The
mismatch of the parallel transistors is proportional toaccording to Pelgrom's law. In contrast, themismatch of the proposed SAC is much smaller than that of the conventional parallel transistors and SAC-2 is always better thanSAC-1 in terms of the mismatch reduction at the identical N.
The number of combinations of SAC-2 is, however, larger thanthat of SAC-1 as listed in Table II, which means the cost to find

FUKETA et al.: 1 m-THICKNESS ULTRA-FLEXIBLE AND HIGH ELECTRODE-DENSITY SURFACE ELECTROMYOGRAM MEASUREMENT SHEET

Fig. 11. Simulated N dependence ofmismatch.

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Fig. 13. Proposed SAC-1 and SAC-2 methods are compared with conventional
parallel transistors in terms of area and power to reduce mismatch by 1/10 times.

Fig. 14. Simulated dependence ofmismatch on correlation coefficientisin conventional parallel transistors and proposed SAC method whennormally distributed with correlations. Number of parallel transistors (N) is 4.
Fig. 12. Simulated N dependence of average.

the optimum combination in SAC-2 is larger compared with
SAC-1.
Fig. 12 shows the N dependence of( average
power).
of the conventional parallel transistors is proportional to N. In SAC-1, the number of selected transistors isfixed toregardless of N, and hence
does not dependon N. In SAC-2, on the other hand,rises as N increases
because the number of selected transistors in SAC-2 is less thanor equal to N. In both SAC-1 and SAC-2 the mismatch andpower can be reduced compared with the conventional paralleltransistors at the same N (= area).
Finally, SAC-1 and SAC-2 are compared in Fig. 13 in termsof the area and power. In this figure, the case where the mismatch is reduced by a factor of 10 is considered. In the conventional parallel transistors,
is required, because themismatch of the parallel transistors is proportional to.
Consequently, 100-fold power (is required. In contrast, N is just 4 in SAC-2, which corresponds to 96% and 98.2%

reductions in the area and power overhead, respectively, compared with those of the parallel transistors. If the area is not a primary concern, SAC-1 (and) can further reduce
the power by 44% at the cost of 25% area increase comparedwith SAC-1. This means that the SAC-1 method achieves the
1/10 times reduction in the mismatch with the smallest power
overhead and the SAC-2 method achieves it with the smallest
area overhead. Therefore, which method is better differs case bycase. In both cases, the area and power are much smaller thanthose of the conventional parallel transistors. The measurement
cost of SAC is one of the problems. However, N is just 4, whichmeans only 8 measurements need to be taken, to reduce the mismatch by a factor of 10. Therefore, the measurement cost is notlarge.
In the abovementioned discussion, it is assumed thatisnormally distributed without correlations. Finally, we investigate the case whenis normally distributed with correlations. Fig. 14 shows the simulated dependence ofmismatch on the correlation coefficient in the conventional parallel transistors and the proposed SAC-2 method when N is 4.

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IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 8, NO. 6, DECEMBER 2014

Fig. 15. Photograph of pMOS-only amplifier with AC-coupled load. Circuit
schematic is shown in Fig. 6(b).

Fig. 17. Measurement setup and measured raw waveforms with organic
amplifier.

Fig. 16. Measured frequency dependence of gain of amplifiers with different
loads.

Even ifis distributed with correlations, SAC-2 is still effective, and can reducemismatch by 92% compared withthe conventional parallel transistors, regardless of the correlation coefficient.
IV. MEASUREMENT RESULTS
The photograph of the pMOS-only amplifier with the
AC-coupled load used in this work is shown in Fig. 15. The sizeof the amplifier is 20 mm 5 mm.
andare implemented
by MIM capacitors, whose capacitance is 700 nF/cm [19], andandare implemented by always-off transistors.
Fig. 16 shows a measured frequency dependence of the gainof the amplifiers when the supply voltage is 2 V. The gain of
the amplifier with the AC-coupled load is much higher than thatwith the diode load, which agrees the analytical evaluation described in Section II.C. The power consumption of the amplifiers with the AC-coupled load is 30 W. The target specifications of the amplifier are “gain at 100 Hz
dB” and “gain at
500 HzdB”, because the typical amplitude and frequency
band of the surface EMG are from tens of micro-volt to several
milli-volt and from 10 Hz to 500 Hz, respectively. In Fig. 16, themeasured gains at 100 Hz and 500 Hz are 21 dB and 10 dB, respectively, which satisfy the target specification. The measured
unity gain frequency is 2 kHz. In Fig. 16, The gain of the amplifier with the diode load is less than 0 dB, because
is smallerthanin (2).
Fig. 17 shows the measurement setup and measured waveforms of the surface EMG with the organic amplifier. In thismeasurement, two electrodes are used. Wires are connected tothe organic amplifier using a conductive epoxy. The maximum

Fig. 18. Power spectrum of measured waveforms shown in Fig. 17. (a) Open
hand. (b) Closed hand.

amplitude and the frequency of the waveforms with closed handare 35 mV and 100 Hz, respectively. Fig. 18 illustrates the power
spectrum of the measured waveforms shown in Fig. 17. Whenthe hand is open (Fig. 18(a)), only harmonics of 50 Hz are observed, whereas signals between 50–150 Hz are observed when
the hand is closed (Fig. 18(b)). From the shape of the power

FUKETA et al.: 1 m-THICKNESS ULTRA-FLEXIBLE AND HIGH ELECTRODE-DENSITY SURFACE ELECTROMYOGRAM MEASUREMENT SHEET

Fig. 19. Band-pass filtered waveforms of the raw data shown in Fig. 17. Cutoff
frequencies are 20 and 500 Hz. (a) Open hand. (b) Closed hand.

TABLE IIIKEY FEATURES AND PERFORMANCE SUMMARY

spectrum, these signals are considered as the surface EMG andthe signals below 50 Hz may be caused by motion artifacts. Thismeans the difference between the waveforms with open handand closed hands is clearly observed. Fig. 19 shows the waveforms that are band-pass filtered with the cutoff frequencies of
20 and 500 Hz [7], [23]. In this paper, it is assumed that such
filtering is performed in signal processing in Fig. 1.
Table III summarizes key features.
V. CONCLUSION
In this paper, a 64-channel surface electromyogram (EMG)
measurement sheet (SEMS) were developed for prosthetic handcontrol. For reliable and precise hand control, the following
three requirements must be satisfied for the surface EMG electrodes; high mechanical flexibility, high electrode density andhigh signal integrity. The developed SEMS was fabricated on
1 m-thick ultra-flexible PEN film with 2 V organic transistors and the distributed and shared amplifier (DSA) architecture was applied for the in-situ amplification of the myoelectric signal, which enables ultra-flexibility, high electrode density
and high signal integrity. Furthermore, we have to deal with thelarge mismatch of organic transistors. To address this challenge,
the post-fabrication select-and-connect (SAC) method was proposed in this paper. To reduce the transistor mismatch by afactor of 10, the proposed SAC method can reduce the area andthe power overhead by 96% and 98.2%, respectively, comparedwith the use of conventional parallel transistors.
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Tomoyuki Yokota received the B.S., M.S., andPh.D. degrees in applied physics from The University of Tokyo, Tokyo, Japan, in 2008, 2010, and2013, respectively.
Currently, he is a Research Assistant in the Department of Electrical and Electronic Engineering,
The University of Tokyo. His research interests
include printed electronics, large-area electronics,
and organic electronics.

Hiroshi Fuketa (S'07–M'10) received the B.E. degree from Kyoto University, Kyoto, Japan, and the
M.E. and Ph.D. degrees in information systems engineering from Osaka University, Osaka, Japan, in
2002, 2008 and 2010, respectively.
Currently, he is a Research Associate with Institute of Industrial Science, The University ofTokyo, Tokyo, Japan. His research interests include
ultra-low-power circuit design and large area electronics with organic transistors.
Dr. Fuketa is a member of IEICE.

Naoji Matsuhisa received the B.S. and M.S. degrees
in electronic engineering from The University ofTokyo, Tokyo, Japan, in 2012 and 2014, respectively.
Currently, he is working toward the Ph.D. degreein the Department of Electrical Engineering and Information Systems, Graduate School of Engineering,
The University of Tokyo. His research interests are in
the field of organic electronics, flexible electronics,
and stretchable electronics.

Kazuaki Yoshioka received the B.S. degree in electronic engineering from The University of Tokyo,
Tokyo, Japan, in 2012.
Currently, he is studying in the Department ofElectrical Engineering and Information Systems,
Graduate School of Engineering, The University ofTokyo. His research interests are in the field of low
power circuits and power supply noise.

Yusuke Inoue received the Ph.D. degree in medical
science from The University of Tokyo, Tokyo, Japan,
in 2011.
From 2011 to 2012, he was a Research Fellow in
the Graduate School of Medicine, The University ofTokyo. Since 2012, he has been a Research Fellow
in the Department of Electrical and Electronic
Engineering, The University of Tokyo. His researchinterests are Flexible electronics and biomedical
engineering.

Yasuhiro Shinozuka received the B.S. degree, andthe M.S. degree in electronic engineering from The
University of Tokyo, Tokyo, Japan, in 2011 and 2013,
respectively.
In 2013, he joined the Corporate Research and Development Center, Toshiba Corporation, Kawasaki,
Japan. His research interests are in the field of
in-package DC/DC converters and 3D integrated
circuits, and CMOS analog circuits.
Mr. Shinozuka is a member of IEICE.

Koichi Ishida (S'00–M'06) received the B.S. degree
in electronics engineering from the University ofElectro-Communications, Tokyo, Japan, and the
M.S. and Ph.D. degrees in electronics engineeringfrom The University of Tokyo, Tokyo, Japan, in
1998, 2002, and 2005, respectively.
In 1989, he joined Nippon Avionics Company
Ltd., Yokohama, Japan, where he developed
high-reliability hybrid microcircuits for aerospace
programs. From 2005 to 2007, he worked on CMOS
analog and RF circuits at the Tokyo Institute of Technology, Yokohama, Japan. From 2007 to 2012, he worked on on-chip power
supply circuits and organic electronics circuits at the Institute of Industrial Science, The University of Tokyo. Since July 2012, he has been working as Chair
for Circuit Design and Network Theory, Dresden University of Technology,
Dresden, Germany. His research interests include low-voltage low-power
CMOS analog circuits, on-chip power supply circuits, and large-area flexible
electronics.
Dr. Ishida is a member of IEICE.

Masaki Sekino (M'03) received the B.S. degree inmechanical engineering and the Ph.D. degree in electronics engineering from The University of Tokyo,
Tokyo, Japan, in 2000 and 2005, respectively.
From 2005 to 2006, he was a Research Associate
in the Graduate School of Medicine, The Universityof Tokyo. From 2006 to 2010, he was a Research Associate in the Graduate School of Frontier Sciences,
The University of Tokyo. Since 2011, he has been an
Associate Professor in the Department of ElectricalEngineering and Information Systems, The University of Tokyo.

Tsuyoshi Sekitani received the B.S. degree from
Osaka University, Osaka, Japan, and the Ph.D.
degree in applied physics from The University ofTokyo, Tokyo, Japan, in 1999 and 2003, respectively.
From 1999 to 2003, he was with the Institute for
Solid State Physics (ISSP), The University of Tokyo.
From 2003 to 2009, he was a Research Associate of
the Quantum-Phase Electronics Center, The University of Tokyo. Since 2011, he has been an Associate
Professor in the Department of Electrical and Electronic Engineering, The University of Tokyo.

FUKETA et al.: 1 m-THICKNESS ULTRA-FLEXIBLE AND HIGH ELECTRODE-DENSITY SURFACE ELECTROMYOGRAM MEASUREMENT SHEET

Makoto Takamiya (S'98–M'00) received the B.S.,
M.S., and Ph.D. degrees in electronic engineeringfrom The University of Tokyo, Tokyo, Japan, in
1995, 1997, and 2000, respectively.
In 2000, he joined the NEC Corporation, Japan,
where he was engaged in the circuit design of highspeed digital LSIs. In 2005, he joined The University of Tokyo, where he is an Associate Professor of
the VLSI Design and Education Center. Since 2013,
he has been at the University of California, Berkeley,
CA, USA, as a Visiting Scholar. His research interests include the circuit design of the low-power RF circuits, the ultra low-voltage
logic circuits, the low-voltage power management circuits, and the large areaand flexible electronics with organic transistors.
Dr. Takamiya is a member of the technical program committee for the IEEE
Symposium on VLSI Circuits. He received 2009 and 2010 IEEE Paul RappaportAwards and the Best Paper Award at the 2013 IEEE Wireless Power Transfer
Conference.

Takao Someya (M'03) received the Ph.D. degree inelectrical engineering from The University of Tokyo,
Tokyo, Japan, in 1997.
In 1997, he joined the Institute of Industrial Science (IIS), The University of Tokyo, as a Research
Associate and was appointed to be a Lecturer ofthe Research Center for Advanced Science andTechnology (RCAST), The University of Tokyo,
in 1998, and an Associate Professor of RCASTin 2002. From 2001 to 2003, he worked for the
Nanocenter (NSEC) of Columbia University andBell Labs, Lucent Technologies, as a Visiting Scholar. From 2003 to 2009,he was an Associate Professor in the Department of Applied Physics andQuantum-Phase Electronics Center, The University of Tokyo. Since 2009, hehas been a Professor of Electrical and Electronic Engineering, The Universityof Tokyo. His current research interests include organic transistors, flexible
electronics, plastic integrated circuits, large-area sensors, and plastic actuators.
Dr. Someya is a member of the IEEE Electron Devices Society, the Materials
Research Society (MRS), and the Japanese Society of Applied Physics.

833

Takayasu Sakurai (S'77–M'78–SM'01–F'03) received the Ph.D. degree in electrical engineeringfrom The University of Tokyo, Tokyo, Japan, in
1981.
In 1981, he joined Toshiba Corporation, where
he designed CMOS DRAM, SRAM, RISC processors, DSPs, and SoC Solutions. He has worked
extensively on interconnect delay and capacitancemodeling known as Sakurai model and alphapower-law MOS model. From 1988 to 1990, he wasa Visiting Researcher at the University of California,
Berkeley, CA, USA, where he conducted research in the field of VLSI CAD.
Since 1996, he has been a Professor at The University of Tokyo, working
on low-power high-speed VLSI, memory design, interconnects, ubiquitouselectronics, organic ICs, and large-area electronics. He has authored more than
400 technical publications, including 100 invited presentations and several
books, and has filed more than 200 patents.
Dr. Sakurai is the executive committee chair for VLSI Symposia and asteering committee chair for IEEE A-SSCC since 2010. He served as a conference chair for the Symposium on VLSI Circuits, and ICICDT, a vice chair
for ASPDAC, a TPC chair for the A-SSCC, and VLSI Symposia, an executive
committee member for ISLPED and a program committee member for ISSCC,
CICC, A-SSCC, DAC, ESSCIRC, ICCAD, ISLPED, and other international
conferences. He was a recipient of the 2010 IEEE Donald O. Pederson Awardin Solid-State Circuits, the IEEE Paul Rappaport Award (2009 and 2010), 2010
IEICE Electronics Society Award, 2009 Achievement Award of IEICE, 2005
IEEE ICICDT Award, 2004 IEEE Takuo Sugano Award, 2005 P&I Patent of
the Year Award, and four product awards. He gave the keynote speech at morethan 50 conferences including ISSCC, ESSCIRC, and ISLPED. He was anelected AdCom member for the IEEE Solid-State Circuits Society and an IEEE
CAS and SSCS distinguished lecturer. He is an IEICE Fellow.