electronics
ArticlePure Sinusoidal Output Single-Phase Current-Source
Inverter with Minimized Switching Losses andReduced Output Filter Size
Eka Rakhman Priandana 1,2, *
1
2
3

*

and Toshihiko Noguchi 3, *Department of Environment and Energy System, Graduate School of Science and Technology, Shizuoka
University, Hamamatsu 432-8561, Japan
National Laboratory for Energy Conversion Technology (B2TKE) of Agency for the Assessment andApplication of Technology (BPPT), Tangerang Selatan 15314, Indonesia
Department of Engineering, Graduate School of Integrated Science and Technology, Shizuoka University,
Hamamatsu 432-8561, Japan
Correspondence: aan.woodz@gmail.com (E.R.P.); noguchi.toshihiko@shizuoka.ac.jp (T.N.);
Tel.: +81-70-4432-3433 (E.R.P.); +81-53-478-1128 (T.N.)

Received: 20 November 2019; Accepted: 16 December 2019; Published: 17 December 2019


Abstract: This paper proposes a novel single-phase current-source inverter that generates a puresinusoidal waveform with minimized switching losses and using a small-size output filter capacitor.
The proposed method is investigated by incorporating a conventional multilevel current-source
inverter with a linear amplifier. The conventional multilevel technique uses fundamental switchingfrequency instead of using high-switching frequency modulation for the H-bridge circuit. The linear
amplifier such as class-A or class-D types has a function to reform the staircase waveform generated
by the multilevel inverter into a pure sinusoidal by using superimposition technique. As a result,pure sinusoidal output current is generated with a small ripple and the system only requires a small
output filter capacitor for smoothing the waveform. Based on the simulation and experimental results,
the proposed system presents not only the optimal configuration, but also an option as to whether toobtain excellent power efficiency or very low output harmonic. Implications of the results and future
research directions are also presented.
Keywords: current-source; multilevel inverter; linear amplifier; superimposition

1. Introduction
Direct current (DC) to alternating current (AC) converters, or inverters, are basically operated bymeans of a switching action to optimize their power conversion efficiency. In order to minimize theoutput noise or harmonics caused by switching modulation, a passive L-C filter is indispensable [1]. By
contrast, linear power amplifiers such as class-A, class-AB, or class-D can generate a pure sinusoidal
waveform with very low noise. However, poor power conversion efficiency is their main issue, sothat they are not suitable for power inverters [2–4]. The primary goal when constructing a power
inverter is generating pure sinusoidal waveform with very low output harmonics without forfeiting
the power efficiency [1]. Therefore, researchers and engineers have adopted several approaches toreach the requirement by either using high-switching frequency modulation, enlarging the output
L-C filter size, or employing multilevel technique. The latter features generate voltage or current withextremely low distortion and low dv/dt or di/dt. The multilevel technique also draws input current withvery low distortion. The most important is that it can operate with low-switching frequency so that theswitching losses can be minimized [5–10].

Electronics 2019, 8, 1556; doi:10.3390/electronics8121556

www.mdpi.com/journal/electronics

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Generally, power inverters are classified into two topologies, voltage-source inverters (VSIs) anddual circuit, current-source inverters (CSIs) [11]. The CSIs are well-known for having high capability todeliver very high current for inductive load, having robustness against the grid voltage fluctuation, andElectronics 2019, 8, x FOR PEER REVIEW
2 of 19
having low dv/dt or di/dt transient behavior [12–15]. However, the key problems with this topology are
low efficiency
bycurrenthigh conduction
losseslowrobustness
power density
thatcausedbyfluctuation,inductor-based
to deliver caused
very highfor inductive
load,andhavingagainsttheis
gridvoltageandhavingdv/dtthemor di/dt
behavior [12–15].
However,the key problems with thisenergybufferthatlow
makes
lesstransient
being developed
and applied[14,16,17].
topology
efficiency
causedthatby highand low
powerproblems
density thatA
numberareof lowworks
have showntheseconduction
efficiency losses
and power
densitycanisbecaused
overcomebyinductor-basedenergybuffer
that
makes
them
less
being
developed
andapplied[14,16,17].
by applying the multilevel technique into CSIs. So far, however, there has been little discussion about
number of works have shown that these efficiency and power density problems can be
multilevelACSI(MCSI). The conventional method for generating a multilevel current waveform is by
overcome by applying the multilevel technique into CSIs. So far, however, there has been little
paralleling some H-bridge CSIs. This topology is a dual circuit of cascaded multilevel VSI (MVSI) [18,19].
discussion about multilevel CSI (MCSI). The conventional method for generating a multilevel current
However,
several isolated current sources are needed for this topology. In order to reduce the number
waveform is by paralleling some H-bridge CSIs. This topology is a dual circuit of cascaded multilevelof isolated
current
sources,severalapproaches
were introduced.
The first
onetopology.
is a nested
structure
VSI (MVSI)[18,19].
However,
severalisolated current
sources are needed
for this
In orderas antoadvanced
H-bridge
technology.
The
second
one
is
a
dual
circuitofdiode-clamped
MVSI.
reduce the number of isolated current sources, several approaches were introduced. The first one The
third isone
is an inductor
as H-bridgea dual circuitof flying-capacitor
MVSI[19–22].
However,a nested
structure multi-rating
as an advanced
technology.
The second one
is a dual
circuitof diode-theseclampedMVSI. The
third oneinductors
is an inductor
multi-ratingasso
a dualof flying-capacitor
topologies
employedenormousas energy
buffersthat circuit
their power
density wasMVSIvery low.
[19–22].
However,these
topologies
employedenormous
inductors
asenergybuffers
so
that
their
Recent developments in MCSI become revolutionary after several novel topologies were proposed
poweranddensity
was verylow. invented the fish-bone structure of MCSI as a dual circuit of 3-levelby Suroso
Noguchi.
They
Recent developments in MCSI become revolutionary after several novel topologies were
diode-clamped half-bridge MVSI and then they expanded it for a higher number of levels. This topology
proposed by Suroso and Noguchi. They invented the fish-bone structure of MCSI as a dual circuit ofbecame an alternative of the conventional H-bridge type MCSI and its derivative such as paralleled
3-level diode-clamped half-bridge MVSI and then they expanded it for a higher number of levels.
and nested
structures [1,12,23–25]. They also developed an inductor-cell based MCSI technology as aThis topology became an alternative of the conventional H-bridge type MCSI and its derivative suchdual circuitof capacitor
cell-based
MVSI[1,12,15,26]
andalsoa DCcurrent module
technology
as paralleledand nested
structures[1,12,23–25].
Theydeveloped
an inductor-cellbased[1,12,13]
MCSI forgenerating
multilevel
current
waveformby using
singleMVSI
H-bridge
CSI. However,
they
all were
operated
technology
as a dual
circuitof capacitor
cell-based[1,12,15,26]
and a DCcurrent
modulewith high-switchingfrequency
modulationin orderto reduce
the output
L-C filter
Unfortunately,
technology [1,12,13]
for generating
multilevel
current
waveformby using
singlesize.
H-bridge
CSI.
However,
they
all
were
operated
withhigh-switchingfrequency
modulation
in
order
to
reducethethis effort results in problems related to the switching losses. One approach to solving this problem
outputsize.power
Unfortunately,
this Iteffort
into
problems
related toswitchinginvolves
the L-C
use filterof linear
amplifiers.
is ofresultsinterest
know whether
thethelinearpowerlosses.
amplifier
One approach
to solving
thisstillproblemtheanduse oflinear power amplifiers. It is of interest to
applicationin power
inverters
holdsinvolves
to be true
reasonable.
know whether the linear power amplifier application in power inverters still holds to be true andThe
objective of the present work paper is to investigate the linear power amplifier application
reasonable.
could improve the MCSI system performances in power efficiency, power quality, and power density.
The objective of the present work paper is to investigate the linear power amplifier application
As describedin Figure 1, the proposed concept is composed of several constant current sources, several
could improve the MCSI system performances in power efficiency, power quality, and powerswitchingmodules,a linearcurrent1, generator,a polarity
by a CSI
H-bridge
density. As describedin Figurethe proposed
concept alternatoris composedrepresentedof several constantcurrent
circuit,andseveraldiodes.
Constant
current
sources
are
the
main
power
source.
Switchingsources, several switching modules, a linear current generator, a polarity alternator represented modules
by acontrol
theH-bridge
directioncircuit,of eachcurrent
generatedby constantcurrent
sources
generatestaircaseCSI
andseveraldiodes. Constantcurrent
sourcesare intheordermaintopowersource.
Switchingmodulesthe directionof eachcurrent generated
by constantcurrent sourcesincurrent
waveform.
The control
linear current
generator
produces
linear current
to compensate
the staircase
order
topuregeneratestaircasewaveform.
current waveform.
The
linear current
generator
linear current
to As
current
intosinusoidal
The CSI
H-bridge
circuitinvertsproduces
the DC current
into AC.
the staircase
sinusoidal
CSI H-bridge
circuitcurrent.
inverts thea CSIcompensate
characteristic,
several current
diodesinto
are purerequiredin thewaveform.
circuit toThe
prevent
the reverse
Due toDC current into AC. As a CSI characteristic, several diodes are required in the circuit to prevent the
combination between the staircase current waveform and the linear current waveform generations,reverse current. Due to combination between the staircase current waveform and the linear current
this proposed MCSI is simply called a hybrid MCSI.
waveform generations, this proposed MCSI is simply called a hybrid MCSI.

...

Current Sources

Linear Generator

Polarity
Alternator

...
...

Switching Modules

Figure1. Generalized
conceptofofhybrid
hybrid multilevel
multilevel current-source
inverters(MCSI).
Figure1. Generalized
concept
current-source
inverters(MCSI).

Electronics 2019, 8, 1556

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The contributions of this work are presented as follows:1.

No high-switching frequency modulation is used for current inversion processing.

2.

The proposed method applies two times fundamental frequency of the output for controllingthe current direction by switching modules in order to generate staircase current waveform.
In other words, without any high-switching frequency modulation. Therefore, the switchinglosses in the current inversion process or in the H-bridge part is extremely low. Nevertheless, thehigh-switching frequency modulation is still needed for generating constant current and linear
current sources.
No dedicated linear amplifier is used for generating pure sinusoidal output.

3.

The amount of energy for constructing pure sinusoidal output current is still dominantly suppliedby constant current sources through a staircase current waveform. The linear amplifier produces
only a very small amount of amperage to compensate and reshape the staircase current waveform
into pure sinusoidal. Hence, the power losses wasted by linear amplifier circuit can be minimized.
No large output L-C filter utilization.

4.

The size of the utilized output L-C filter affects the power density [27]. Due to linear amplifier
utilization, the output total harmonic distortion (THD) is always being kept low in order tocomply with IEEE-1547, IEEE-929, and EN-61000-3-2 standards [26]. Therefore, the proposedsystem only needs small output capacitor that is sufficient to eliminate the current ripples. As aresult, the power quality and the power density of the proposed system are slightly improved.
No isolated multiple power sources utilization.
Figure 1 describes the proposed MCSI concept employs several isolated current sources. Moreover,
the research finding by author [1] also points towards that the proposed concept is consistent
with literature. However, the implementation is totally different. The depicted current sources
actually can be represented by only using one power source. The detailed implementation will beelaborated in the next section.

This paper is organized as follows: first, a brief introduction and significances of this research are
given. Next, the operation principle and circuit configuration of the proposed system are describedin detail. In order to verify the proper operation of the proposed system, several simulation andexperimental results are presented, respectively. Finally, the conclusion and future works are addressedat the end of this paper.
2. Operation Principle, Circuit Configuration, Switching Strategy and Control System
In this section, the basic operation principle and the circuit configuration of the proposed system
are described. In addition, the proposed control system as well as the switching strategy and atheoretical calculation for conduction and switching losses of the proposed system are also elaborated.
Several studies have attempted to explain that the linear power amplifier for audio applications can also
be utilized in power converter applications [1,28]. However, author [1] has problems in representing
single power source usage and low-switching frequency applications, meanwhile Author [28] has aproblem in representing non-audio applications. An as yet unsolved question is whether the linear
amplifier application in multilevel CSI could generate pure sinusoidal output with using single powersource and without using high-switching frequency modulation as well as large output L-C filter.
There is still considerable controversy surrounding the linear amplifier application in power electronics.
Additional studies to understand more completely the key tenets of linear amplifier application in
power electronics are required.

Electronics 2019, 8, 1556

4 of 192.1. Operation Principle
As shown in Figure 1, the proposed hybrid MCSI consists of several constant current sources
and switchingmodules, a linear current source, and a polarity inverter that is represented
by a CSIElectronics 2019, 8, x FOR PEER REVIEW
4 of 19
H-bridge circuit. The operation principle of the proposed system is illustrated simply in Figure 2.

Figure 2. Operation principle.
Figure 2.system
Operation
principle.
As explained beforehand, the proposed
appliesseveral current sources as the main powersource. The number of required current sources that corresponds to the number of levels is expressed
As explained beforehand, the proposed system applies several current sources as the mainby:power source. The number of required currentNsources −thatcorresponds to the number of levels is
LEVEL 1M=
(1)expressed by:
2
N LEVEL− 1 number of levels. The number of constantwhere M is the number of current sources andis the
MN=LEVEL(1)
2 modules is written as:
current sources that equals to the number of switchingwhere M is the number of current sources and Nlevel is the number of levels. The number of constant= M −modules
1
current sources that equals to the number ofCCS
switchingis written as:

(2)

(2)
CCS
= M sources−1
where CCS is the number of utilized constantcurrent
or the number of switching modules
in thewhere
system.
alsoofrepresents
the number
stepsororthe
stagesthatofexposed
the generated
CCSThisis theCCS
numberutilized constantcurrentof
sourcesnumberswitchingby
modulesinthe system.
CCS also represents the number of steps or stages that exposed by the generated
staircasecurrentThis
waveform.
staircasewaveform.
Figure 2current
describes
the basic operation principle of 13-level hybrid MCSI. By using Equation (1),Figure2
describes
the basicsources
operationof 13-level
MCSI.
using
Equation(1), arethe number of required current
is principle
six. According
to hybrid
Equation(2),Byfive
current
sourcesthenumberofrequiredcurrent
sourcesissix.
AccordingtoEquation(2),
fivecurrent
sources
areof theprogrammed to generate constant current whose amperage is determined by the main controller
programmed to generate constant current whose amperage is determined by the main controller ofsystem. While the remaining current source is for the programmable linear current generator. Eachthe system. While the remaining current source is for the programmable linear current generator.
constant current source generates equal DC current which is the direction is controlled by switching
Each constant current source generates equal DC current which is the direction is controlled bymodulesin orderto generatestaircaseon the DC
linkDC
current.
While
the thelinearcurrent
switchingmodulesin order togeneratewaveformstaircase waveformon thelink current.
Whilelineargenerator
compensates
the
DC
link
current
toresulttheDCfull-wave
current
waveform.
The
current generator compensates the DC link current to result the DC full-wave current waveform. The CSI
H-bridge
circuit changes
the polarityof the load
every every
time atime
zero-crossof sinusoidal
reference
CSI H-bridge
circuit changes
the polarityof thecurrent
load current
a zero-crossof sinusoidal
reference is detected.
is detected.
2.2. Direct
Current(DC)
Module2.2. Direct
Current(DC)
Moduleis inefficient
to utilize
severaldedicateddedicated current
systemcancanbe improved
if only
It is Itinefficient
to utilize
severalcurrentsources.
sources.The
The
systembe improved
if only
using
one
power
source.
To
make
this
happen,theDCcurrent
sourceisconstructedfromtheusing one power source. To make this happen, the DC current source is constructed frombuck
the buck
chopper circuit. The buck chopper converts the voltage into a current [12,13,25]. In order to simplify
chopper circuit. The buck chopper converts the voltage into a current [12,13,25]. In order to simplify
the circuit, a switching module is then combined with the buck chopper circuit. This combined circuit

Electronics 2019, 8, 1556

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Electronics
8, x FOR module
PEER REVIEW
5 of 19the circuit,a 2019,switchingis then combined with the buck chopper circuit. This combined
circuitis simply called DC current module (DCM) as depicted in Figure 3. The operation principle of theis simply called DC current module (DCM) as depicted in Figure 3. The operation principle of the
DCMDCMis explainedin Table 1.
is explained in Table 1.
Electronics 2019, 8, x FOR PEER REVIEW

5 of 19IL
is simply called DC current module (DCM) as depicted
in Figure 3. The operation principle of the
DCM is explained in TableIN
1.
L
OUT
D3
Q1
IL
D1
D2
L
IN
OUT
D3
Q1
Q2
D1

D2

Q
2
Figuremodule(DCM)
circuit.
Figure3.3.Direct
Direct current
current module(DCM)
circuit.

Table 1. DC current module (DCM) operation principle.
Table 1. DC current module (DCM) operation principle.

Q1
Q2module (DCM)Output
OutputQ1 3. Direct current
Q2
Figurecircuit.

X 11

00

00

Table
1. DC current module
Switching
00 (DCM) operation Iprinciple.
LIL
Switching

XX11
11
00
Q1
Q2
Output11 X =
do
not
care.
=
do
not
care.
1
0
X
0
Switching
IL current sources, therefore it is
The number of DCMs equals
to the number of0 required constant
X1
1 inductor L, free-wheeling0also denoted as CCS. A DCM consistsof switch Q1,
diode D1, blocking
The numberof DCMs
toswitch
the number
ofnotrequired
constant current sources, therefore it is
1 X ThediodesD2, blocking
diodeequals
D3, andQ2.
= do amountcare. of energy that generated by switching thealso Q1
denotedas CCS.
DCM
ofDC
switchQ1,
free-wheelingD1, blocking
In order toL,
reducethe L size, adiodehigh-switchingis preserved
in LA
and
then consists
released as
current
IL. inductor
The number of DCMs equals to the number of required constant current sources, therefore it is
diodesD2, blocking
diodeisD3,
and switch
amountenergy thatgeneratedfrequency
modulation
appliedfor Q1. Q2.
D1 isTheused
to keepofcontinuous
conductionof by
theswitching
chopper thealso denoted as CCS. A DCM consists of switch Q1, inductor L, free-wheeling diode D1, blocking
by circulating
thethenload released
current. Inasorderto maintainIL stability,
close-loop
is applied
Q1 ispartpreserved
in L andDC current
IL . In
order toareducethe controller
L size, a high-switching
diodes D2, blocking diode D3, and switch Q2. The amount of energy that generated by switching thefor thismodulation
circuit. The switchingmodulepartD1
directs
IL whether
to deliver it to theload or circulate
frequency
appliedfor Q1.
is usedof theback
chopper. Inkeepordercontinuous
to reduce theconduction
L size, a high-switching
Q1 is preserved in L isandthen released
as DC current
ILto
to
the
source.
When
Q2
isturnedoff,I
L flows to the load before flowing back to the source throughpart bycirculatingtheload
current.
In
order
to
maintainIstability,aclose-loop
controller
isapplied
L continuous conduction of the chopper
frequency modulation is applied for Q1. D1 is used to keep
D1.
On
the
other
hand,
when
Q2
is
turnedon,I
L flows directly back to the source so that no current
for this
circuit.
The switchingmoduleIL whether
to adeliver
it to
the loador circulatepart
by circulating
the load current.
In partorderdirects
to maintainIL stability,
close-loop
controller
is applied
supplies the load. The switching module part is working based on the comparison between thethis source.
circuit. The
switching
IL whetherdeliver
it to flowing
the load or
circulatebackback forto theWhen
Q2 ismodule
turnedpartoff,directs
IL flows
to the toload
beforebackto thesourceabsolute value of the sinusoidal reference with the determined current limit of each DCM.
to theWhen
Q2hand,is turned
off,Q2
IL flows
to theon,loadthroughthroughD1.source.
On theother
when
is turned
IL before
flows flowing
directlyback
backtotothe
thesource
sourceso that noD1. On the other
hand, The
whenswitchingQ2 is turnedon, IL flows
backbased
to theonsourceso that no current
current
the load.
modulepart isdirectly
working
the comparison
between
2.3. supplies
Circuit Configuration
supplies
the
load.
The
switchingmodulepartisworking
based
on
the
comparison
betweenthe absolute value of the sinusoidal reference with the determined current limit of each
DCM.the
The final
hybrid MCSI
systemshown
in Figure4 whichincludespower source,
absolute
valueproposedof the sinusoidal
reference
withisthedeterminedcurrent
limit
of eachaDCM.
several DC current modules, a linear current generator, and a CSI H-bridge circuit.
2.3. Circuit Configuration
2.3. Circuit Configuration
Current
The final proposed hybrid MCSI system isDC
shown
in Figure 4 which includes a power source,/M Figure 4 which includes a power source,
The final proposed hybrid MCSI system isModule-1
shownI in
severalDC
current
modules,alinearcurrent
generator,
and
CSIH-bridge
H-bridgecircuit.
circuit.
several DC current modules, a linear current generator, and aa CSIm

DC Current
Module-(M-1)...

Linear DC
Current
Generator
DC Source

Im/M

QB

QA

Im/M

...

DC Current
Linear DC
Module-2
Current
0~Im/M
Generator
DC Current
Module-(M-1)
Im/M

...
DC Source

Im/M

DC Current
Module-1
Im/M

...

...

DC Current
Module-2

QA

QC
0~Im/M...
Figure 4. Proposed design.

QC

Figuredesign.
Figure4.4.Proposed
Proposed design.

vo
io Load
Co

QB

vo
QD
io LoadCo
QD

Electronics 2019, 8, 1556

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In Figure 4, the AC current iO supplies the load so that giving the load a potential difference of vO .
In order to keep the output voltage stability, iO must be maintained at:
Electronics 2019, 8, x FOR PEER REVIEW

6 of 19v
iO = O(3)
In Figure 4, the AC current iO supplies theloadZso that giving the load a potential difference ofvO. In order to keep the output voltage stability, iO must be maintained at:

If the load is assumed as pure resistive R, therefore the output impedance Z is:

i =

vO

(3)

1
1O Z
=
+ jωCO
Z
RLOAD

(4)

If the load is assumed as pure resistive R, therefore the output impedance Z is:

Because iO is sinusoidal waveform, it has
1 a peak1 or maximum value that equals:

Z+ jωCO√RLOAD
Im = 2iO
=

(4)

(5)

Because iO is sinusoidal waveform, it has a peak or maximum value that equals:

This Im determines the required DC link current. Because the Im robustness is the key of vO(5)= 2iO source is limited to:stability, therefore the current generated by eachI mcurrent
This Im determines the required DC link current. Because the Im robustness is the key of vOIm
ICS =stability, therefore the current generated by eachcurrent source is limited to:

M

(6)

I

m
(6) Five
For instance, if the desired MCSI level isI13-level,
then ICS is limited to Im /6 amperes.
CS =M
DCMs are set to generate constant current of Im /6 amperes, meanwhile the linear current generator is
For instance,
if thelinear
desiredMCSI level
then ICS is limited to Im/6 amperes. Five DCMs
programmed
to generatecurrent
fromis0 13-level,to Im /6 amperes.
are setto generate
constant Ccurrentof Imin/6 orderamperes,
meanwhilethethelinearcurrent
currentthat
generator
isThe
outputfilter capacitor
is
added
to
eliminaterippleaccumulatedO
programmed
togenerate
linearcurrent
from0
toI
m/6 amperes.
from each current source as a consequence of using the buck chopper circuit. In order to reverse the
The output filter capacitor CO is added in order to eliminate the ripple current that accumulated
current polarity of the load, the operation of QA is paired with QD and the operation of QB is paired
from each current source as a consequence of using the buck chopper circuit. In order to reverse thewith current
QC . Whena zero-cross of the sinusoidal reference is detected, prior to changing the polarity,
polarity of the load, the operation of QA is paired with QD and the operation of QB is paired
switches
Q–Q
area turned
on offorthea few
microseconds
sureprior
the DC
current thedoes
not lose itsADwith QC. Whenzero-crosssinusoidal
referencetoismake
detected,
to changing
polarity,
current
path.
This
is
well-known
asoverlap
time
that
alwaysrequiredbytheCSI
systemto prevent
switches QA–QD are turned on for a few microseconds to make sure the DC current does not loseits
any damages.
current path. This is well-known as overlap time that always required by the CSI system to preventany damages.

2.4. Staircase Current Waveform Generation
2.4. Staircase Current Waveform Generation

The staircase current generator is working based on the comparison between the reference with
The
staircasecurrent
is working
basedon the comparison
reference
withof thethe current
limit
of eachstage.generator
The referenceof thisgenerator
is obtained between
from thethe
absolutevalue
thecurrent
limit
of
each
stage.
The
referenceof
thisgenerator
isobtainedfromtheabsolutevalue
ofsinusoidal waveform. In other words, the reference is DC full-wave waveform with unity maximum
the sinusoidal waveform. In other words, the reference is DC full-wave waveform with unity
value. Figure 5 explains how the staircase current waveform is generated.
maximum value. Figure 5 explains how the staircase current waveform is generated.
Limit2
Limit1

Limit1'+

Limit2'=
θ1

θ2

Limit2'
Limit1'θ2'

θ1'

Figure5. 5.Staircase
waveformgeneration.
generation.
FigureStaircasecurrent
current waveformElectronics 2019, 8, 1556

7 of 19

Figure 5 shows an example of staircase current waveform generation of 7-level hybrid MCSI.
Limit1 and Limit2 are determined by the number of required current sources M. Stage1 is the firstsquare-wave current generator and Stage2 is the second. Limit1 is the first comparison level that equals
1/M which its comparator commands to turn on and off the Stage1. Limit2 is the second or the lastcomparison level that equals 2/M or (M–1)/M which its comparator commands to turn on and off theStage2. When the reference goes up until it reaches the Limit1, Stage1 is turned on at θ1 with steady
amplitude Limit1’. The Stage1 will be turned off at θ1’ when the reference has been lower than the
Limit1. Similarly, when the reference continues going up until reaches the Limit2, Stage2 is turned on
at θ2 with steady amplitude at Limit2’. The Stage2 will be turned off at θ2’ after the reference has been
lower than the Limit2. The staircase current waveform is resulting from the summation of Stage1 andStage2 outputs.
The square-wave current waveform of Stage1 and Stage2 has an average value that is expressed by:
ISQ_AVG = ICS D

(7)

TON
TON + TOFF

(8)

and
D=

where ICS is the current generated by the corresponding current source of the stage and D is the duty
cycle that equals to the turn-on period divided by the total period-length. In Figure 5, θ1 and θ2 can befound by:nθn = arcsin(9)M
where n is the sequence number of the current limits. Therefore, the duty cycle of the square-wave canbe calculated as follows:
TONn = π − 2TOFFn = π − 2θn(10)
Dn = 1 −

2θn
π

(11)

By synthesizing Equations (6)–(11), the average value of the square-wave current waveform ofStage-n can be estimated by:nIm
ISQn_AVG =π − 2arcsin
(12)
πM
M
According to Kirchoff’s current law (KCL), the total output currents equal to total input
currents. Therefore,
ISTAIRCASE = ISQ1_AVG + ISQ2_AVG + . . . + ISQn_AVG(13)
By generalizing Equation (12) to Equation (13), the average value of the staircase current (ISTAIRCASE )waveform can be written as:
M−1

n
Im X
ISTAIRCASE =π − 2arcsin
πM
M

(14)

n=1

The proposed method conveys a new technique for generating pure sinusoidal output, i.e.,
applying a linear current compensator to eliminate harmonics. There have been numerous studies
to investigate harmonic reduction of the staircase waveform by using complex mathematics [29,30].
However, previous research never discussed other methods than just using a capacitor as the final
output harmonic filter. In this proposed approach, simple mathematical equations are used.
2.5. Linear Current Waveform Generation
The linear current compensator is used for reforming the staircase current waveform into puresinusoidal waveform by means of superimposing it. Due to Kirchoff’s current law, the linear current

output harmonic filter. In this proposed approach, simple mathematical equations are used.
2.5. Linear Current Waveform Generation
The linear current compensator is used for reforming the staircase current waveform into pure
8 of 19sinusoidal waveform by means of superimposing it. Due to Kirchoff's current law, the linear current
compensator waveform is obtained by subtracting the DC full-wave reference with the generated
staircase current
waveformas describedin Figure the6. Thevalueof DCwithfull-wave
current
compensator
waveform
is obtainedby subtracting
DC averagefull-wave
reference
the generated
referenceisexpressedby:staircase current waveform as described in Figure 6. The average value of DC full-wave current

Electronics 2019, 8, 1556

2I
I AVG =2Im mreference is expressed by:

IAVG =

(15)
(15)

ππ

where Figure
Figure 66 explains
explains that:
that:
where
IAVG = ISTAIRCASE + ILINEAR

(16)
(16)

I AVG = I STAIRCASE + I LINEAR

Therefore, the average of linear current (ILINEAR ) waveform can be estimated as:
Therefore, the average of linear current (ILINEAR) waveform can be estimated as:


M−1

Im 
n 
1 X
M −1
I
=I 2 − 1
π − 2arcsin n M
π − 2arcsin
I LINEAR= mπ 2 − M
LINEARπ M n=1 


M 

n =1

(17)
(17)

In order to generate the linear current waveform, a linear power amplifier is required. For the
In order to generate the linear current waveform, a linear power amplifier is required. For the
proposed circuit shown in Figure 4, there are two classes of linear amplifier can be used. They areproposed circuit shown in Figure 4, there are two classes of linear amplifier can be used. They areclass-A and class-D amplifiers. Due to dual supply requirement, class-B/AB amplifier is not suitableclass-A and class-D amplifiers. Due to dual supply requirement, class-B/AB amplifier is not suitable
for this kind of proposed hybrid MCSI topology.
for this kind of proposed hybrid MCSI topology.
2.5.1. Class-A Amplifier-Based Linear Current Generator
2.5.1. Class-A Amplifier-Based Linear Current Generator
The class-A amplifier is well-known the most linear among all linear counterparts. However,The class-A amplifier is well-known the most linear among all linear counterparts. However, its
its power efficiency is very challenging [2,4]. There are three configurations of transistor-based
power
efficiency is very challenging [2,4]. There are three configurations of transistor-based class-A
class-A amplifier circuit: common-emitter, common-base, and common-collector. A common-emitter
amplifiercircuit: common-emitter, common-base, and common-collector. A common-emitter
configuration is the default circuit for a general-purpose amplifier. It does not only amplify the current,
configuration is the default circuit for a general-purpose amplifier. It does not only amplify the
but also the voltage. Common-base configuration has a characteristic to amplify the voltage only.
current, but also the voltage. Common-base configuration has a characteristic to amplify the voltage
Common-emitter configuration also known as emitter-follower only amplifies the current.
only. Common-emitter configuration also known as emitter-follower only amplifies the current.
In case of linear current generation for the proposed hybrid MCSI, a class-A amplifier with
In case of linear current generation for the proposed hybrid MCSI, a class-A amplifier with
common-collector or emitter-follower configuration is chosen due to voltage unity amplification. The
common-collector or emitter-follower configuration is chosen due to voltage unity amplification. The
complete circuit of class-A amplifier-based linear current generator is shown in Figure 7.
complete circuit of class-A amplifier-based linear current generator is shown in Figure 7.
Top
Limit2
Limit1_
Limit2'
Limit1'

=
Top’

θ1

θ2

θ2'

θ1'

Figure 6.
6. Linear
waveform generation.
generation.
FigureLinear current
current waveformElectronics 2019,2019, 8,8, x1556
Electronics
FOR PEER REVIEWElectronics 2019, 8, x FOR PEER REVIEW

of 19
19
99 of
9 of 19

+
+
-

+

V+
VREF
REF

--

DC Source
DC Source

RSENSERSENSE

Io = VREF / RSENSE
Io = VREF / RSENSE
Io
Io

RLOAD
RLOAD

Figure 7.
7. Class-A
Class-Aamplifier-based
amplifier-based linear
linear current
current generator.
generator.
FigureFigure 7. Class-A amplifier-based linear current generator.

In Figure
Figure7,7,thethe
op-ampis usedfor maintaining
the sense-resistor
voltage,meanwhiletheIn
op-ampis usedfor maintaining
the sense-resistor
voltage,meanwhile
the power
In
Figure7,the
op-ampisusedformaintaining
thesense-resistor
voltage,meanwhilethepower
power transistor
providessufficientcurrent
to thedue
to the limited
op-ampoutput
limitedcurrent.
outputIncurrent.
transistor
providessufficientcurrent to
the load
dueloadto theop-ampordertransistor
sufficientcurrent
to theload dueto theop-amplimitedoutputcurrent.
Inclass-A
order
In prevent
order toprovides
prevent
thecurrent,
reverseblocking
diodeispriorinsertedprior
In thetothereverseacurrent,
blockinga diodeis inserted
to theload.toInthetheload.
class-A
amplifierto
prevent
thereversecurrent,a
blocking
diodeisinserted
prior
to
the
load.
In
the
class-A
amplifieramplifier-based
system,analog reference
voltage referenceis needed
for controllingthe output
current.
Hence,
based
system, ananaloganvoltage
is needed
for controllingthe output
current.
Hence,
thebasedsystem,ananalogvoltagereferenceisneededforcontrollingtheoutputcurrent.
Hence,
thethe digital-based
systemcontroller
employthe digital-to-analog
converterin ordertodigital-based
systemcontroller
mustmust
employthe digital-to-analog
converter(DAC)(DAC)in orderto drive
digital-based
systemcontroller
must
employthedigital-to-analog
converter
(DAC)
in
order
to
drive
drive
the
amplifier.
the amplifier.
the amplifier.
2.5.2. Class-D
Class-D Amplifier-Based
Amplifier-Based Linear
Linear Current
Current Generator
Generator
2.5.2.
2.5.2. Class-D Amplifier-Based Linear Current Generator
Class-D amplifiers
thetheaudio
power
amplifierin audiodevicesdueClass-D
amplifiers are
areincreasingly
increasinglyubiquitousubiquitousasas
audio
power
amplifierin audiodevicesClass-D
amplifiers
are power-efficiency
increasingly ubiquitousas theaudio
power
amplifier [3].
in audiodevicestotheirsignificantly
highercomparedtotheirlinearcounterparts
They
operatedue to their significantly higher power-efficiency compared to their linear counterparts [3]. Theydue
to theirswitchingsignificantly
power-efficiency
compared
their linear
counterparts[3]. pulse
They
by rapidly
back higher
and
forth
the supply
rails, to
being
byfed
a modulator
using
operateby rapidly switchingbackandbetween
forth between
the supply
rails, fed
being
by a modulator
using
operateby
rapidlyswitching
back
and
forth
betweenthe
supplyrails,
being
fed
by
a
modulator
using
width,width,
pulse pulse
density,or related
techniques
to encode
the linear
input into
pulse
density,or related
techniques
to encode
the linear
inputa pulse
into a train.
pulse The
train.linear
The
pulse
width,
pulsethroughdensity,aor
relatedtechniques
to encodethelinear input
into
a blocked.
pulse train. The
waveform
escapesfilter
into
the
load
while
the
high
frequency
pulsesarelinear waveform escapes through a filter into the load while the high frequency pulses are blocked.
linearFigure
waveform
escapesathroughaamplifier-based
filter into the load
whileforthegeneratinghigh frequency
pulsesarewaveform.
blocked.
describes
class-Dsystemlinearcurrent
Figure 88describes
a class-D
amplifier-based
systemfor generating
linearcurrent
waveform.
The
Figure8
describes
aclass-D
amplifier-based
systemforgenerating
linearcurrent
waveform.
The
The input
is comparedwiththe sensed
to theidentify
error.
error
is
input
is comparedwith thesensedoutputoutput
currentcurrent
in orderintoorderidentify
error.theThiserrorThisis amplified
input
is comparedwith the sensed output
currentinorder
to identify
theerror.
This error
is amplified
amplifiedwithproportional-integral
controller
andthenmodulatedbyhighfrequency
sawtoothcarrierwith proportional-integral controller and then modulated by high frequency sawtooth carrier
withproportional-integral
controller
and drives
then modulatedbyfrequency
sawtoothcarrier
waveform.
The generated
generated pulse
pulse
train thenthen
the switch.
switch. The
Thehigh
inductor
is usedused
for smoothingsmoothing
waveform.
The
train
drives theinductor
LL isforwaveform.
The
generated
pulse
train
then
drivestheswitch.
The
inductor
L
is
used
for
smoothing
the pulse
pulse train
train current
current andand blocking
blocking highhigh frequency
frequency pulses.
pulses. As
As aa result,result, aa linear
linear current
current waveform
waveform is
is
the
the
pulse train
current
andblockinghighfrequency
pulses. As a result, a linear current waveform isgenerated
attheoutputwhichisthereplicaof
its
input.
generated at the output which is the replica of its input.
generated at the output which is the replica of its input.
IL
IL
L
L

POWER IN
POWER IN
Q1
Q1+
IIREF +––
REF

PI
PI
Controller
Controller

D1
D1

+
+
––

Figure 8. Class-D amplifier-based linear current generator.
Figure 8. Class-D amplifier-based linear current generator.
Figure 8. Class-D amplifier-based linear current generator.

POWER OUT
POWER OUT

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10 of 192.6. Control System
2.6. Control System
In order to maintain the output robustness, the load voltage and line frequency must be controlled.
In order to maintain the output robustness, the load voltage and line frequency must be
The load voltage is controlled by controlling the DCM output current, while the line frequency iscontrolled. The load voltage is controlled by controlling the DCM output current, while the line
controlled by using phase-locked loop (PLL). Figure 9 shows the general scheme of the proposedfrequency is controlled by using phase-locked loop (PLL). Figure 9 shows the general scheme of thehybrid MCSI control system.
proposed hybrid MCSI control system.
vo
IL

VREF

+

–

P-I
Controller

Im

1/M

ICS

–
+

P-I
Controller

+

DCM

–

ZCD

H-bridge
Overlap-time|ABS|

Staircase
Generator

Plant
fREF

PLL

Sine
LUT

+

–

ICS

Linear
Generator

fo

Figure 9. Control system.
Figure 9. Control system.

The load voltage vO is subtracted with the voltage reference VREF in order to identify an error.
The load voltage vO is subtracted with the voltage reference VREF in order to identify an error.
This error is then amplified with proportional-integral (P-I) controller to generate the current referenceThis error is then amplified with proportional-integral (P-I) controller to generate the current
Im . By using Equation (6), the current limit ICS of each current source is determined. In order toreference Im. By using Equation (6), the current limit ICS of each current source is determined. In ordercontrol inductor current of DCM IL , the output of current P-I controller is modulated by high frequency
to control inductor current of DCM IL, the output of current P-I controller is modulated by highsawtooth carrier waveform. In the output frequency control section, the phase output of the PLL drives
frequency sawtooth carrier waveform. In the output frequency control section, the phase output of
the sinusoidal look-up table (LUT) to generate sinusoidal waveform reference for H-bridge polarity
the PLL drives the sinusoidal look-up table (LUT) to generate sinusoidal waveform reference for Hinversion, staircase current generator, and linear current generator. H-bridge changes its polarity whenbridge polarity inversion, staircase current generator, and linear current generator. H-bridge changes
the zero-crossing detector (ZCD) detects a zero-cross of sinusoidal reference. During overlap time, allits polarity when the zero-crossing detector (ZCD) detects a zero-cross of sinusoidal reference. Duringswitches of H-bridge are turned on to provide free-wheeling current path. The staircase and linear
overlap time, all switches of H-bridge are turned on to provide free-wheeling current path. The
generators have already been explained in the previous section.
staircase and linear generators have already been explained in the previous section.
2.7. Power Losses’ Theoretical Analysis
2.7. Power Losses’ Theoretical Analysis
This power losses’ theoretical analysis suggests to predict the total dissipated power of theThis hybrid
power MCSI
losses’thattheoreticalanalysisthe power
total dissipatedpowerof theproposedcorresponds
to thesuggests
numbertoof predictlevels. The
losses mainly
consistof
proposed
hybridMCSI
that
corresponds
tothenumberoflevels.
The
power
lossesmainlyconsistof
conduction, switching, and gate charge losses [31]. The conduction losses are obtained from modelling
conduction,
switching,andgatechargelosses[31].
The
conduction
lossesareobtainedfromthe hybrid MCSI circuit. The switching and gate charge losses are calculated from each switchingmodellinghybrid in
MCSI
circuit. The
switching and gate charge losses are calculated from eachdevicethat theis utilized
the proposedsystem.
switchingdevicethatisutilized
intheproposed
system.
The circuit model in Figure 10 represents the
proposed hybrid MCSI circuit that is shown inThecircuitmodel
inFigure10represents
theproposed
hybrid MCSI
circuitis shown
inFigure 4. In order to maintain the load voltage VL , theload RL requires
a currentof Imthat. If theparasitic
Figure
4.
In
order
to
maintaintheloadvoltageV
L, the load RL requires a current of Im. If the parasitic
resistance of each current source is assumed equal as RDCM , then each current source will generate theresistanceofequalseach current
sourcecurrent
that
Equation(6). is assumed equal as RDCM, then each current source will generate thecurrent that equals Equation (6).

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Im/M
RDCM

Electronics 2019, 8, x FOR PEER REVIEW

RDCM
DCM
RRDCM
DCM
RRDCM

DC Source

RDCM

E

RDCM

Im/M

11 of 19

/M
ImIm/M/M
ImIm/M
Im/M

Im
+

RL VL
Im/M
Im–

+ hybrid
FigureEquivalentcircuit model
model of
MCSI.
Figure10.10.
Equivalent
ofthe
theproposed
proposed
hybridMCSI.
DC Sourcecircuit
RL VL
E– source
Based
on Figurepower
thatdissipateddissipated byby eachor orDCMis expressed
by: by:Basedon Figure10, 10,thethepower
that
eachcurrent
current
sourceDCM
is expressed2

 Iof the proposed hybrid MCSI.
Figure 10. Equivalent circuit modelm 2

PDCM== Im R RDCM
PDCM
M  DCM
M

(18)

I 
PDCM =  m  RDCMI 2
M  = Imm 2R
PCOND _ TOTAL =MP
DCM
PCOND_TOTAL= MPDCM= M RDCM
DCM
M

(18)
(19)

(18)

Based on Figure 10, the power that dissipated by each current source or DCM is expressed by:
the theoretical
total
conductionlosses
losses ofof thethe2 system
calculated
as follows:
Thus,Thus,
the theoretical
total
conduction
systemcan
canbebecalculated
as follows:(19)

Thus, the theoretical total conduction losses of the system can be calculated as follows:
On the other hand, the switching and gate charge losses are distributed to the H-bridge circuit,Onthe other hand, the switching and gate charge losses
distributed
to the H-bridge circuit,
I m 2 arepartthe switching module part of DCM circuit, and the buck-chopperof DCM circuit, respectively.
(19)
P
MP
R
=
=
_ TOTAL
DCM part of DCM circuit, respectively.
the switchingpart ofDCM
circuit,and thebuck-chopper
However, module
the switchinglossesin COND
the
H-bridge
areDCMnot significant,because the polarity reversal is
M
However,theoutswitchinglossesin thenot significant,the polarity
reversalis carried
carriedwhen thecurrent
is H-bridge
near zero areampereand using because
fundamental
switchingfrequency.
On
the
other
hand,
the
switchingandgatechargelossesare
distributedtothe
H-bridge
circuit,out whenthe current
is nearzero andampereusinggate
fundamental
switchingfrequency.
Therefore,
Therefore,
it can be
neglected
onlyandH-bridge
charge losses
are counted.
The switchinglossit can
the switching module part of DCM circuit, and the buck-chopper part of DCM circuit, respectively.
of each switchingcommonlyis expressed
be neglected
and onlydevice
H-bridgegate charge
lossesby:are counted. The switching loss of each switching
However, the switching losses in the H-bridge are not significant, because the polarity reversal isdevice commonly is expressed by:carried out when the current is nearand using fundamental
switching frequency.

PSW =zeroEd fampere(20)
S  I d t r + t f + COSS Ed h  gate chargeTherefore, it can be neglected and only H-bridge
losses iare counted. The switching loss
P
= Ed fS Id by:
tr + t f + COSS Ed(20)
of eachswitchingdeviceis expressedThegate-charge
losscommonlyof each SW
devicecommonlyis expressed by:

(

(

)

)

The gate-charge loss of each device
is+gexpressed I d= t2r Q

PSW = commonly
Ed f SPGC
tVf g f+S COSS Eby:
d



(21)
(20)



d is the DC link voltage, fS is the switching frequency, Id is the passing current through thewhere
TheEgate-charge
loss of each device commonlyisgexpressedby:
PGC = 2Q
V g fS(21)
device, tr is the rise time of the switching transition, tf is the fall time of the switching transition, COSSPGC charge,= 2QgVand(21)ofis E
theisdeviceoutputtheswitchinggate
g f S Vg is the gate voltage. If all calculations
where
the DClinkcapacitance,
voltage, fSQisg isthefrequency,
Id is the passing current throughthedthe power losses are plotted into graphics and normalized to the 3-level CSI, the results are shown indevice,tr isEdthe
riseDCtime
ofvoltage,
the switchingtf is the fall
the switchingtransition,is thelink
fS is the transition,
switching frequency,
Id timeis theof
passing
current throughthe COSS
where
Figure 11a–c.
is thedevice,deviceoutputcapacitance,
Qg is the transition,gate charge,
Vg timeis theofgate
voltage. If
all calculationsof
tr is
the risetime of the switchingtf is andthe fallthe switchingtransition,
COSS
is the device
capacitance,
Qg is the gate
and Vtog isthethe 3-levelgate voltage.
If allresults
calculationsofthe power
lossesoutput
are plotted
into graphics
and charge,
normalized
CSI, theare shownin
the11a–c.
power losses are plotted into graphics and normalized to the 3-level CSI, the results are shown in
FigureFigure 11a–c.

(a)

(b)

(a)

(b)
Figure 11. Cont.

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12 of 19(c)
Figure
11. Theoretical
MCSI
powerlosses
lossescorrespondcorrespond toof oflevels.
All All
datadata
is normalized
Figure
11. Theoretical
MCSI
power
tothe
thenumbernumberlevels.
is normalized
to3-levelCSI:(a)conduction
losses;(b)
switchinglosses;(c)gatechargelosses.
to 3-level CSI: (a) conduction losses; (b) switching losses; (c) gate charge losses.

Figure 11 shows the correlation between power losses and the number of levels is positive andFigure11 shows the correlation between power losses and the number of levels is positive andstatistically significant at a high level. Compared to the 3-level CSI, the conduction losses of thestatistically significant at a high level. Compared to the 3-level CSI, the conduction losses of thesystem reduced to 10% when implemented on 21-level CSI. In contrast, the switching losses of thesystemreduced to 10% when implemented on 21-level CSI. In contrast, the switching losses of thebuck choppers, the switching losses of the switching module, the gate charge losses of high-switchingbuck devices,choppers,
lossesswitching module,
the gate chargeof1000%,high-switching
andthetheswitchinggate charge
lossesofofthe
low-switching
devices increased
to 130%,losses
1543%,
anddevices,
and
the
gate
chargelossesoflow-switching
devicesincreased
to130%,1543%,
1000%,
325%, respectively. Despite the fact that the conduction losses were reduced significantly, there
is a and
325%,total
respectively.
Despite
the
fact
that
the
conduction
losseswerereducedsignificantly,
there
power losses’ analysis limitation due to switching and gate charge losses. Moreover, there is is aloss thatmust beconsidered,loss. Manyvariablesandparametersmust therebetotal anotherpower losses’
analysis
limitationduei.e.,to coreswitchingand gatechargelosses.
Moreover,isaccounted
to mustthe analysis
in order toinvestigate
impactof the switching,gate charge,
core
anotherloss thatbe considered,i.e.,core loss.theManyvariablesand parametersmust andbe accounted
to thepower
efficiency. theTherefore,
and experimental
operations
are losses
neededto theto thelosses
analysis
intotalorder
to investigate
impactsimulationof the switching,gate charge,
and core
for further power losses investigations.
total power efficiency. Therefore, simulation and experimental operations are needed for further power
losses3.investigations.
Simulation Results
In orderto verify the proper operation of the proposed hybrid MCSI and investigate the3. Simulation
Results
correlation between efficiency-THD with switching frequencies, output filter capacitor sizes, and theInorder ofto verify
properoperationwereof theproposedby
hybridand investigate
numberlevels, theseveralsimulations
conductedusingMCSI
the PSIM
application.theThecorrelation
first
betweenefficiency-THD
with
switchingfrequencies,
outputfiltercapacitor
sizes,
andtheThisnumbersimulation intended to show the operation principle is consistent with the proposed concept.
of levels,
severalsimulations
conducted
simulationusedparameters werethat listed
in Tableby
2. using the PSIM application. The first simulation
12atheshows
the operational
simulation
result ofwith
the proposed
hybridconcept.
9-level CSIThis
withsimulation
classintended Figure
to show
operation
principle
is consistent
the proposedA
linearcurrent
compensatorinone
cycle.
Figure12a
consists
of
the
load
current,
theloadvoltage,used parameters that listed in Table 2.
the unfilteredload current,
the staircase
current, result
and thecompensatorcurrent.
It isCSI
shown
that
Figure12a showsthe operational
simulation
oflinearthe proposed
hybrid
9-levelwithclass-Atheunfilteredloadcurrentisthesummation
betweenstaircaseandlinearcurrents.
Dueto
low thelinear current compensator in one cycle. Figure 12a consists of the load current, the load voltage,
inductive load, the load voltage seems in phase with the filtered load current.
unfiltered load current, the staircase current, and the linear compensator current. It is shown that the
While Figure 12b shows the fast Fourier transform (FFT) analysis of both the unfiltered current
unfilteredload current is the summation between staircase and linear currents. Due to low inductive
and the load voltage. The horizontal axis shows the harmonic frequency from 0 Hz to 60 kHz, andload,meanwhile
the load voltage
seemswith theharmonic
filtered load
current.
the verticalaxisinis phase
the normalized
amplitude
to the logarithmic unity in percent.
While Figure 12b shows the fast Fourier transform (FFT) analysis of both the unfiltered current
2. Parametersfor 9-level hybrid
multilevel
inverters (MCSI)
and the loadTable
voltage.
The horizontal
axis shows
thecurrent-source
harmonic frequency
fromsimulation.
0 Hz to 60 kHz, andmeanwhile the vertical axis is Parameterthe normalized harmonic amplitude
to the logarithmic unity in percent.
Value (Unit)
Power source DC voltage
160 V
Table 2. Parameters for
9-levelhybrid multilevel current-source
inverters
DCM
Inductor
560 µH/90mΩ (MCSI) simulation.
Chopper Carrier Frequency
Parameter
Output Filter Capacitor
Power Loadsource DC voltage
DCM
InductorFreq
Output AC Voltage/Line
Chopper Carrier Frequency
Output Filter Capacitor
Load
Output AC Voltage/Line Freq

50 kHzValue (Unit)
6.8 µH/1 mΩ
10 Ω/1160
mHV
560
µH/90
100 V/60 Hz mΩ
50 kHz6.8 µH/1 mΩ
10 Ω/1 mH
100 V/60 Hz

Electronics 2019, 8, 1556

13 of 19

Electronics 2019, 8, x FOR PEER REVIEWElectronics 2019, 8, x FOR PEER REVIEW

13 of 19
13 of 19

(a)
(a)

(b)
(b)

FigureThe proposed
proposed9-level
9-levelhybridMCSI
simulation
results:(a) operation
principle;
fastFigure 12. The
hybridMCSI
simulation
results:(a) operation
principle;(b) fast(b)Fourier
Figure12.
The
proposed
9-levelhybridMCSI
simulation
results:(a)
operation
principle;(b)
fastFouriertransform
analysisoftheunfilteredloadcurrent
and
the
load
voltage.
transform analysis of the unfiltered load current and the load voltage.
Fourier transform analysis of the unfiltered load current and the load voltage.

shownthat
thatthethe3rd3rdorderorderofofthe
theunfilteredunfilteredloadcurrent
harmonicwas
onlyaroundat
ItIt isisshown
load
current
harmonicwas
onlyaround
1%,1%,
at 50
It
is
shown
that
the
3rd
order
of
the
unfilteredloadcurrent
harmonicwas
onlyaround1%,
at50
50 kHzswitchingfrequency
wasaround0.6%
andtheotherswere
werenonomoremorethanthan0.5%.
0.5%.By
Byonlyonly using
using
kHz
switchingfrequency
wasaround0.6%
andtheotherskHz
switchingfrequency
wasaround0.6%
andtheothers
were
no
more
than
0.5%.
By
only
using
small size
size output
output filter
filter capacitor,
capacitor, these
these higher
higher order
order harmonics
harmonics were
were attenuatedattenuated toto −20dB.
−20dB.As
Asaaresult,result,
small
small
size
outputfiltercapacitor,
thesehigherorder
harmonics
were
attenuatedto−20dB.
Asaresult,the loadload voltage
voltage harmonic
harmonic waswas only
only aroundaround 1%.
1%. From
Fromthisthisoperation
operationsimulation
simulationresult,result, thethe generated
generated
the
the
load
voltageharmonicwas
onlyaround
1%.
From
this
operation
simulation
result,thegenerated
output voltage
voltage THD
THD conforms
conforms toto thethe various
various international
international standards.
outputoutputconforms
to thetovarious
international
standards.
Thevoltage
secondsimulation
intended
explainthe correlation
betweenbetween
efficiency-THD
with switchingThe
secondTHD
simulation
intended
to explain
the correlation
efficiency-THD
withThe
secondsimulation
intendedtoexplainthecorrelation
betweenefficiency-THD
withfrequencies,
output filter
capacitor
and thenumberof levels
as of
well
as their
performanceswitchingfrequencies,
outputfilter sizes,
capacitor
sizes,and thenumberlevelsas wellas theirswitchingfrequencies,
outputfiltercapacitor
sizes,
andthenumberoflevels
as
well
as
their
comparison withthe previous
researchor conventional
methodthat has been undertaken
by author[26].
performancecomparison
withthe previous
researchor conventional
method thathas been
performancecomparison
withtheprevious
researchorconventional
method
that
has
been
Figures
13–15
depictthepowerefficiency
and
THD-V
resultsoftheconventional
9-levelsystem,theundertaken by author [26]. Figures 13–15 depict the power efficiency and THD-V results of theundertakenbyauthor[26].
Figures
13–15
depictthepowerefficiency
and
THD-V
resultsoftheproposed 9-levelsystemwiththeclass-Alinearcurrent
compensator,
and theproposed
systemconventional
9-levelsystem,proposed
9-levelsystemwith class-A
linearcurrent 9-levelcompensator,
conventional
9-levelsystem,the
proposed
9-levelsystemwithclass-Alinearcurrent
compensator,
with theclass-Dlinear current
in 3Dcurrent
graphics.
The simulation
parametersandproposed
9-level compensator,
system withrespectively
class-D linear
compensator,
respectively
inused3D
andthe
proposed
9-levelsystemwithclass-Dlinearcurrent
compensator,
respectively
in3D
in this simulation
were theparameterssame as listed
but with various
graphics.
The simulation
usedininTable
this 2,
simulation
were thechopper
same ascarrier
listedfrequencies
in Table 2, andbutgraphics.
The
simulation
parameters
used
in
this
simulation
were
the
same
as
listed
in
Table
2,
but
outputfilter capacitors.
The various
chopperused inthisvarious
simulation
werecarrier
5 kHz
with
variouschopper carrier
frequencies
andcarrier
outputfrequencies
filter capacitors.
The
chopperwith various
chopperfrequencies
and(Foutput
filtercapacitors.
Thevariouschoppercarrier(whichis denoted
F1carrier),simulation
25 kHz(Fwere
),
50
kHz
),
75
kHz
(F
),
and
100
kHz
(F
).
While
the
variousfrequencies
usedinasthis
5kHz(whichisdenoted
as
F
1
),
25
kHz
(F
2
),
50
kHz
(F
3), 752
3
4
5frequencies
used
in
this
simulation
were
5
kHz
(whichisdenotedasF1), 25 kHz (F2), 50 kHz (F3), 75
outputfilterin thisthesimulation
were 680
nF (whichis denoted
as Csimulation
µF
kHz
(F4),
andcapacitor
100 kHz used(F5). Whilevarious output
filtercapacitor
used in this1 ), 2.2 µF (Cwere
2 ), 6.8680
kHz
(F4µF
), and100
kHz(F5). While the various output filter capacitor used in this simulation were 680
(C
),
22
(C
),
and
68
µF
(C
).
nF
(whichisdenoted
as
C
1
),
2.2
µF
(C
2
),
6.8
µF
(C
3
),
22
µF
(C
4
),
and
68
µF
(C
5
).
3
4
5
nF (which is denoted as C1), 2.2 µF (C2), 6.8 µF (C3), 22 µF (C4), and 68 µF (C5).

(a)
(a)

(b)
(b)

Figure 13. The conventional 9-level MCSI performances correspond to the various switching
Figure13.
13.TheThe
conventional
9-level
performances
correspondto thevariousfrequencies
switching
Figureconventional
MCSIMCSI
performances
correspondthe various
switchingfrequencies
andoutputfilter9-level
capacitors:(a) power
efficiency;(b) tovoltagetotal
harmonic
distortion
frequencies
and capacitors:
output filter(a) power
efficiency;(b)harmonic
voltage total
harmonic
distortion
andoutput filter(a)capacitors:
power efficiency;(b) voltage
total
distortion(THD-V).
(THD-V).
(THD-V).

Electronics 2019, 8, 1556

14 of 19

Electronics
Electronics 2019,2019, 8,8, xx FOR
FOR PEER
PEER REVIEWREVIEW

14
14 of
of 19
19

(a)
(a)

(b)
(b)

Figure14.
The
proposed
9-levelwithlinearcurrent
performances
Figureproposed
9-levelMCSIMCSI
with class-A
linear current
performances
correspond
Figure14.
14.TheThe
proposed
9-levelMCSI
with class-A
class-Alinearcompensatorcurrent compensatorcompensator
performances
correspondtotheswitchingfrequencies
andoutput(a)(b)
tothe various
frequencies
output filter(a)capacitors:
power efficiency;(b)efficiency;
voltage total
correspondtoswitching
the various
variousswitchingand
frequencies
and capacitors:
output filter
filtercapacitors:(a) power
power
efficiency;(b)voltagetotal
harmonic
distortion(THD-V).
harmonic
distortion(THD-V).
voltage total harmonic distortion (THD-V).

(a)
(a)

(b)
(b)

Figure15.
The
proposed
9-levelwithlinearcurrent
performances
Figure15.
15.TheThe
proposed
9-levelMCSI
with class-D
class-Dlinearcompensatorcurrent compensatorcompensator
performances
Figureproposed
9-levelMCSIMCSI
with class-D
linear current
performances
correspondcorrespondtothevariousswitchingfrequencies
andoutputfiltercapacitors:
(a)
power
(b)
correspondthe various
switchingand
frequencies
and capacitors:
output filter(a) power
efficiency;(b)tothe varioustoswitchingfrequencies
output filter(a)capacitors:
power efficiency;(b)efficiency;
voltage total
voltagetotal
harmonic
distortion(THD-V).
voltagetotal
harmonic
distortion(THD-V).
harmonic distortion (THD-V).

Figure13
represents
theefficiency
and
THD-V
of
the
conventional
method.
In
Figure13a,
theFigureFigure 13
13 represents
represents thetheefficiency
efficiencyand
andTHD-V
THD-Vofofthe
theconventional
conventionalmethod.
method. In
In Figure
Figure 13a,
13a, thethebest
efficiency
wasachievedbythesystemusing
75
kHzswitchingfrequency
and0.68–22µFfilterbest
best efficiency
efficiency was
was achievedachieved byby thethe systemsystem using
using 75
75 kHzkHz switchingswitching frequency
frequency andand 0.68–22
0.68–22 µFµF filter
filtercapacitors.
While
Figure
13b,
THD-V
was
the
22
µF
capacitors.
13b,
thethebestbest
THD-V
was achievedby thebysystemusing
22usingµF filter
capacitors.While
Whileinin
inFigure
Figure
13b,
the
best
THD-V
was achievedachievedbythe systemsystemusing
22capacitor.
µF filter
filtercapacitor.
Therefore,
it
can
be
concluded
theoptimum
performanceoftheconventional
methodcould
Therefore,
can be concluded
optimum
performanceof the conventional
method could
be achieved
capacitor. itTherefore,
it can bethe
concluded
theoptimum performanceof the conventional
methodcould
beachievedby75
switchingfrequency
and22by
75 kHzswitchingfrequencyand
22 µF filter
capacitor.
be using
achievedby using
using
75 kHzkHz
switchingfrequency
and
22 µFµF filter
filter capacitor.
capacitor.
Figure14
showsthe
efficiency
and
THD-V
of
the
proposedmethodwithclass-Alinearcurrent
FigureFigure 14
14 shows
shows thetheefficiency
efficiencyand
andTHD-V
THD-Vofofthe
theproposed
proposedmethod
methodwith
withclass-A
class-Alinear
linearcurrent
current
compensator.
In
Figure
14a,
the
best
efficiency
was
given
by
the
systemusing
75
kHzswitchingcompensator.
compensator. In Figure 14a, the best efficiency
efficiency was
was givengiven byby thethe systemsystem using
using 75
75 kHzkHz switchingswitchingfrequency;
while
in
Figure14b,
thefrequency;
best
THD-V
was givengiven byby thethe systemsystem using
using 22µF filter
filter capacitor.
capacitor.
frequency; while
while inin Figure
Figure 14b,
14b, thethe best
best THD-V
THD-V was
22 µF
µF
However,thesystemused
75
kHz
switchingfrequency
and
0.68
µF
filtercapacitor
waschosenas
However,thesystemused
75
kHz
switchingfrequency
and
0.68
µF
filtercapacitor
waschosenHowever, the system used 75 kHz switching frequency and 0.68 µF filter capacitor was chosen asashavingthebest
performance,
because
its
THD-V
still
conforms
tothestandards
while
using
the
havinghaving thethe best
best performance,
performance, because
because its
its THD-V
THD-V still
still conforms
conforms toto thethe standards
standards while
while using
using thethesmallest
capacitor.
smallest
smallestcapacitor.
capacitor.
Figure15
depicts
theefficiency
and
THD-V
of
the
proposedmethodwithclass-Dlinearcurrent
FigureFigure1515depicts
depicts thetheefficiency
efficiencyand
andTHD-V
THD-Vofofthe
theproposed
proposedmethod
methodwith
withclass-D
class-Dlinear
linearcurrent
current
compensator.
In
Figure
15a,
the
best
efficiency
was
given
by
the
systemusing
25
kHz
switchingcompensator.
compensator. In Figure 15a, the best efficiency
efficiency was
was givengiven byby thethe systemsystem using
using 25
25 kHzkHz switchingswitchingfrequency.
Whilein
Figure15b,
thefrequency.
best
THD-V
was
given byby thethe systemsystem using
using 2222 µF
µF filter
filter capacitor.
capacitor.
frequency.While
While inin Figure
Figure 15b,
15b, thethe best
best THD-V
THD-V waswas given
However,thesystemused
25
kHz
switchingfrequency
and
6.8
µF
filtercapacitor
wasselectedasHowever,system usedused2525kHz
kHz
switchingfrequency
6.8 filterµF filter
capacitor
was selected
However, the systemswitchingfrequency
andand6.8 µF
capacitor
was selected
as thetheoptimaloptimal configuration,
configuration, because
because its
its THD-V
THD-V still
still conforms
conforms toto thethe standards
standards while
while using
using thethe smaller
smaller
capacitor.
capacitor.

Electronics 2019, 8, 1556

15 of 19as the optimal configuration, because its THD-V still conforms to the standards while using thesmaller capacitor.
From analysis of Figures 13–15, it is important to note that despite the lowest efficiency, the class-A
Electronics 2019, 8, x FOR PEER REVIEW
15 of 19
linear current compensator greatly reduces the output filter capacitor utilization, while the class-D
linear current
assists
to reduce
dependency
usinghigh-switchingfrequency
as well as
Fromcompensator
analysis of Figures
13–15,
it is important
to noteofthat
despitethe lowest efficiency,
the classlargeAcapacitor.
linear current compensator greatly reduces the output filter capacitor utilization, while the class-D
linear current compensator assists to reduce dependency of using high-switching frequency as well

4. Experimental
Results
as large capacitor.

A laboratory prototype was constructed in order to validate the computer simulation results. For
4. Experimental Results
DC current modules, IGBT STGP20V60DF from ST Microelectronics (Geneva, Switzerland) was used
A laboratory
prototypewasconstructedin order to validate
the computer
simulation
as the switches
and SiC
Schottky
diode
CREE C3D10060A
from Wolfspeed(Durham,NC,results.
USA) wasFor DC current modules, IGBT STGP20V60DF from ST Microelectronics (Geneva, Switzerland) wasused for the freewheeling and blocking diodes. For the H-bridge circuit, IGBT STGW60V60DF fromused as the switches and SiC Schottky diode CREE C3D10060A from Wolfspeed (Durham, NC, USA)
ST Microelectronics was used as the switches and ultra-fast recovery diode STTH60RQ06 from ST
was used for the freewheeling and blocking diodes. For the H-bridge circuit, IGBT STGW60V60DF
Microelectronics
was used as the blocking diodes. FPGA Xilinx Kintex-7 (Xilinx, San Jose, CA, USA)
from ST Microelectronics was used as the switches and ultra-fast recovery diode STTH60RQ06 fromwas utilized
as the mainwas
controller,
DL850E(Yokogawa
Measurement,
Tokyo,ST Microelectronics
used asYokogawa
the blocking
diodes.ScopeCorder
FPGA Xilinx Kintex-7(Xilinx,
San Jose, CA,
Japan)
was
used
for
the
oscilloscope,andYokogawa
WT1800
was
used
as
the
power
analyzer.
USA) was utilized as the main controller, Yokogawa DL850E ScopeCorder (Yokogawa Measurement, The
complete
hardwareexperimental
setup is shownin Figure WT1800
16.
Tokyo,
Japan) wasused for the oscilloscope,and Yokogawa
was used as the power analyzer.
hardwareshown
in Figure16. first experiment intended to validate
The complete
experimental
setupexperimental
was dividedsetup
into istwocategories.
The
The experimental
setupsecond
was divided
intototwo
categories.
The efficiency
first experimentintendedbetween
tothe operation
principle. The
one wascomparepower
and THD-V
validatetheoperation
principle.
The
secondone
wastocomparepower
efficiency
and
THD-V
simulation and experimental results that correspond to the number of levels. In this experiment,
between simulation and experimental results that correspond to the number of levels. In this
50 kHzswitching frequency and 6.8 µF output filter capacitor were used by the system.
experiment, 50 kHz switching frequency and 6.8 µF output filter capacitor were used by the system.

Figuresetup.
Figure16.
16. Experimental
Experimental setup.

The experimental
setup
shown
ofaaDC
DCinput
input
module,severalDC current
The experimental
setup
shownininFigure
Figure 16
16 consists
consists ofmodule,severalDC current
modules,a class-D
amplifier-based
linearcurrent
compensator
which
similarcurrent
modules,a class-D
amplifier-based
linearcurrent
compensator
which
usedusedsimilarDC DC
current
module,a CSI
H-bridge
circuitwith mounted
6.8 µF output
capacitor,
instrumentpower
power supply,
supply, anda CSImodule,
H-bridge
circuitwithmounted6.8 µF output
filter filter
capacitor,
instrument
anda light inductiveof 10
Ω/1ThemH.DC
Theinput
DC inputmodulea functiontotosense
senseDCDC voltage
voltage anda light
inductive
load of load
10 Ω/1mH.
modulehashasa function
and current. Ten DCMs were needed for investigating the impact of the number of levels to the power
current. Ten DCMs were needed for investigating the impact of the number of levels to the power
efficiency with THD-V as well as for the future investigation. Therefore, this experimental setup was
efficiency with THD-V as well as for the future investigation. Therefore, this experimental setup was
designed to be as flexible as possible.
designed Ittoisbe
as flexible as possible.
plausible that a number of limitations might have influenced the results obtained. Figure 17
Itisplausiblethat a numberof limitations
might 9-level
have influenced
the results
Figure 17
shows the experimental
resultsof the proposedsystem usingclass-Dobtained.
linear currentshows
the experimentalof the9-level systemusingclass-Dlinearcurrent
compensator.
Figureresults
17a showstheproposed
output waveforms
and it isshown
the load
voltage
had compensator.
massive
Figure17a shows
output waveforms
and it is shown
voltageharmonics.
harmonics.
Thetheperformance
was rather disappointing.
Thisthewasloadprobably
as a hadresultmassiveof the staircase
current
ripples
existenceandthelow-switchingfrequency
applicationfortheclass-Dlinear
The performance was rather disappointing. This was probably as a result of the staircase
current
compensator.
It
is
shown
the
staircasecurrent
rippleswerestillrelatively
high
even
thoughthe It isripples existence and the low-switching frequency application for the class-D linear compensator.
interleaved synchronous technique was applied to all DCMs. While it was being measured by powerElectronics 2019, 8, 1556

16 of 19

shown the staircase current ripples were still relatively high even though the interleaved synchronous
Electronics 2019, 8, x FOR PEER REVIEW
16 of 19
technique was applied to all DCMs. While it was being measured by power analyzer, the THD-V
indicated
more
3%. indicatedHowever,overall it has been confirmed that this proposed techniqueisanalyzer,
thethan
thisElectronics
2019,
8, THD-V
x FOR PEER
REVIEW more than 3%. However, overall it has been confirmed that
16 of19
possibletorealize.
proposed technique is possible to realize.
Figure
17b
shows
the
FFT
of
the
AC
outputs.
Prior
tohas
filteringprocess,theFigureshows
theFFTanalysis
analysisof theAC
outputs.
Prior
to filtering
process,
the amplitudeofanalyzer,
the17b
THD-V
indicated
more than
3%.
However,overallit
been
confirmed
thatamplitude
this
each
harmonic
higherthan 100th
100th
order
After
being
filtered,the majorityof ofof eachharmonic
higherthanorderreachedreachedup
uptoto20%.
20%.
After
being
filtered,the majority
proposedtechniqueis possible
to realize.
harmonics
successfully
eliminated.
However,thefirst
first
100to
orderswere
only theattenuatedby−6
Figure17b
shows
the FFT
analysis oftheAC outputs.
Priorfilteringprocess,
amplitude
harmonics
werewere
successfully
eliminated.
However,
the100orderswere
only
attenuatedbyof−6 dB.
dB. harmonic higher than 100th order reached up to 20%. After being filtered, the majority of
eachharmonics were successfully eliminated. However, the first 100 orders were only attenuated by −6
dB.

(a)

(b)

Figure17. Nine-levelhybridMCSIwith
withclass-D
class-D linear
linear compensator
experimental
results:(a) output
Figure17. Nine-levelhybridMCSI
compensator
experimental
results:(a) output(a) transform analysis of the unfiltered load current and(b) the load voltage.
waveforms;(b)fast
Fourier
waveforms; (b) fast Fourier transform analysis of the unfiltered load current and the load voltage.
Figure 17. Nine-level hybrid MCSI with class-D linear compensator experimental results: (a) output

On otherthe otherhand,
a class-A
linearcompensator
gave
THD-V
result.
Figure18a 18awaveforms;(b) fasttransform
analysisof the unfilteredcurrent andthe load
voltage.
On thehand,
aFourierclass-Alinearcompensatorgaveaload
apromisingpromising
THD-V
result.
Figureshows that in spite of heavy distorted staircase current waveform, the load current and voltage wereshows that in spite of heavy distorted staircase current waveform, the load current and voltage
successfullycompensated.
The measured
THD-V wasonly
1.9%. In THD-V
addition,result.
this Figure
result was
On the other
hand, a class-A
linear compensatorgave
a promising
18awere successfully compensated. The measured THD-V was only 1.9%. In addition, this result was
legitimatedthe ofFFT
analysisin Figure18b. current
Before being
filtered,loadcurrent
indicatingshowsthat inbyspite
heavy
distortedstaircasewaveform,thetheload
current
andwasvoltagewerelegitimatedby theFFT
analysisin measured
Figure18b.
Beforebeing
theaddition,load
current
was indicatingthat its first100
harmonic
ordersexceedednomore wasthan
1%.filtered,Asa result,
the
first
100
ofwas
the
successfullycompensated.
The
THD-V
only
1.9%.
In
thisorders
resultthat its
first100
harmonic
ordersexceeded
no
more
than
1%.
As
a
result,
the
first
100
ordersload
voltageharmonic
were
successfully
damped.
However,
this
information
did
notincludetheof thelegitimated by the FFT analysis in Figure 18b. Before being filtered, the load current was indicatingload thatvoltageharmonic
were
successfully
damped.
However,
this
information
did
notincludepower
efficiency.
In
order
to
evaluatethepowerefficiencyofeach
proposed
hybridMCSI,
thesecondits first 100 harmonic orders exceeded no more than 1%. As a result, the first 100 orders of the theexperimentload
voltagewas
harmonic
were
successfully
damped.
However,
this information
did notMCSI,
includepower
efficiency.
In conducted.
order toevaluate
the power
efficiencyof eachproposed hybrid
thethesecondpower efficiency.
In order to evaluate the power efficiency of each proposed hybrid MCSI, the second
experiment
was conducted.
experiment was conducted.

(a)

(b)

Figure 18. Nine-level hybrid MCSI with class-A linear compensator experimental results: (a) output(a)(b)
waveforms; (b) fast Fourier transform analysis of the unfiltered load current and the load voltage.
Figure18. Nine-levelhybridMCSIwith
withclass-A
class-A linear
experimental
results:(a) output
Figure18. Nine-levelhybridMCSIlinearcompensatorcompensator
experimental
results:(a) output
Figure 19 represents
the transformmeasuredanalysis
power ofefficiency
along
with
THD-V
corresponds
waveforms;(b) fast Fourier
the unfilteredloadcurrent
and that
the load
voltage. to the
waveforms; (b) fast Fourier transform analysis of the unfiltered load current and the load voltage.
number of levels. Figure 19a is the power efficiency comparison between simulation andexperimental
while
Figure 19bpowershows the THD-V
comparison
simulation
Figure 19 results,
represents
measured
THD-Vbetween
that corresponds
to andtheFigure19 represents
thethemeasured
power efficiency
efficiencyalong
alongwith
with
THD-V
that corresponds
to theexperimental
resultsFigure
as well.19a is the power efficiency comparison between simulation andnumberof levels.
number of levels. Figure 19a is the power efficiency comparison between simulation and experimental
experimental results, while Figure 19b shows the THD-V comparison between simulation andexperimental results as well.

Electronics 2019, 8, 1556

17 of 19

results, while Figure 19b shows the THD-V comparison between simulation and experimental results
Electronics 2019, 8, x FOR PEER REVIEW
17 of 19
as well.
In Figure 19a, a slight efficiency uptrend was shown by class-A linear utilization. On the other
In Figure 19a, a slight efficiency uptrend was shown by class-A linear utilization. On the other
hand, an efficiency downtrend was shown by class-D linear utilization. However, it had reached thehand, an efficiency downtrend was shown by class-D linear utilization. However, it had reached thepeak peakof efficiency
at 95%. The downtrend was probably caused by insignificant conduction losses
of efficiency at 95%. The downtrend was probably caused by insignificant conduction losses
reduction
at highlevel,
butbutthetheothergatecharge,
charge,andotherlossesreduction
at highlevel,
otherlosses
lossessuch
such asas switching,switching, gate
and
other
losseswereweresignificantly
increased.
A
different
characteristic
wasdemonstratedbyclass-Alinearutilization
which
significantly increased. A different characteristic was demonstrated by class-A linear utilization
has onelesshasswitchingbased current
source.source.
It tends
still increasing,butbutstill
difficultwhich
one less switchingbased current
It tends
still increasing,still
difficulttotoexceed
exceed 90%
duecircuit
to linearcircuitusage.
Both simulationand experimental
results
weretoshown
to be
due to90%
linearusage.
Bothsimulationand experimental
results wereshown
be consistent.
consistent.

(a)

(b)

Figure19. Performancecomparison
betweensimulation
simulation vsresults
corresponds
to theFigure19. Performancecomparison
betweenvsexperimental
experimental
results
corresponds
to thenumber of levels: (a) power efficiency; (b) total harmonic distortion of the load voltage.
number of levels: (a) power efficiency; (b) total harmonic distortion of the load voltage.

Figure 19b shows the high-level implementation seemed not giving better THD-V.

Figure 19b shows the high-level implementation seemed not giving better THD-V. Unexpectedly,
Unexpectedly, for a higher number of levels, the THD-V was worsening. As explained beforehand,for a higher number of levels, the THD-V was worsening. As explained beforehand, this was caused
this was caused by the asymmetrical staircase current waveform as the manifestation of the ripple
by thecurrents
asymmetricalstaircasewaveform
theresultmanifestationof theexclusively
ripple currents
from eachfrom eachcurrent current
source. However,theasbest
was significant
at 9 levels.
current source.
However,thebestresultwassignificant
exclusively
at9levels.
The correlation between the number of levels and power efficiency is worth mentioning becauseThe
betweenthe number
efficiency
is worth mentioning
becauseit is correlation
understandable
in a highnumber ofof levels
levels andthat power
the reductionof conduction
losses becomes
meaningless. The inmostsurprisingcorrelation
is withThe optimal
result forlosses
the system
it is understandable
a highnumberof levels
thatthetheTHD-V.
reductionof conduction
becomes
employing
50 mostkHz surprisingswitching frequency
6.8 µF
capacitor
was obtainedat the9-levelmeaningless.
The
correlationandis withthefilter
THD-V.
The optimal
result forsystemconfigurationforbothlinearamplifiertypes
utilization.
Duetotolerable
THD-V
result,theproposed
employing 50 kHz switching frequency and 6.8 µF filter capacitor was obtained at 9-level configuration
9-levelhybridMCSI types
with class-D
linear Duecurrent
compensator
was elected
best configuration.
for bothlinearamplifierutilization.
to tolerable
THD-V
result, as
thetheproposed
9-level hybrid
Our technique shows a clear advantage over the conventional method which was employing highMCSI with class-D linear current compensator was elected as the best configuration. Our techniqueswitching frequency for H-bridge circuit. The evidence from this study suggests that class-D linear
shows a clear advantage over the conventional method which was employing high-switching frequency
compensator utilization is preferably applied due to high efficiency. Nevertheless, class-A linear
for H-bridge
circuit.
The evidence
this forstudy
suggeststhatclass-D linear
compensatorutilizationcompensatorutilizationis still fromessential
power
quality
application.
The current
findings
add
is preferably
applieddueunderstanding
to high efficiency.
class-A
compensatorutilizationis still
substantiallyto ourof the Nevertheless,implementationof eachlinear
type oflinear amplifierin power
essential
for power quality application. The current findings add substantially to our understanding ofelectronics.
the implementation of each type of linear amplifier in power electronics.
5. Conclusions

5. Conclusions
A novel method for constructing a single-phase multilevel current-source inverter (MCSI) which
generates
pure sinusoidal
output withless switchinglosses andcurrent-source
reduced outputinverter
filter size(MCSI)
has beenAnovel method
for constructing
a single-phasemultilevel
which
presented
withconfirmation
from
both
simulation
andexperimental
results.
generates pure sinusoidal output with less switching losses and reduced output filter size has been
In this paper, considerable progress has been made towards the pure sinusoidal output being
presented with confirmation from both simulation and experimental results.
generated by applying linear amplifier in the MCSI system. There are two types of linear amplifier
In this paper, considerable progress has been made towards the pure sinusoidal output being
suitable for this proposed hybrid MCSI, class-A and class-D amplifiers. However, each type has its
generatedby applying The
linearamplifierin the MCSI
system.
There
aretwo typesof linear
amplifierown characteristics.
class-Alinear amplifier
has themost linear
but
challenging
power
efficiency.
suitablefor
this
proposed
hybridMCSI,
class-Aandclass-D
amplifiers.
However,eachtype
has its
On the other hand, class-D linear amplifier has the best efficiency but tolerable harmonics. According
own characteristics. The class-A linear amplifier has the most linear but challenging power efficiency.

Electronics 2019, 8, 1556

18 of 19On the other hand, class-D linear amplifier has the best efficiency but tolerable harmonics. According
to both simulation and experimental results, the optimal configuration was presented by combining
7-level MCSI with class-D linear amplifier to obtain a 9-level hybrid MCSI.
Taken together, these findings highlight a role for the linear amplifier. In order to construct power
quality tools such as active filters or reactive power compensators, class-A linear amplifier utilization
is suitable for these applications. On the other hand, a single-phase hybrid MCSI for distributed power
generation applications such as photovoltaic inverters or battery-charging systems, requires class-D
linear amplifier as the current compensator.
Notwithstanding low power efficiency, class-A linear utilization has presented the best power
quality. It will be important that future research investigates the power efficiency improvement of
the hybrid MCSI featuring a class-A linear amplifier. Research into solving this efficiency problem isalready underway.
Author Contributions: Conceptualization, E.R.P. and T.N.; Methodology, E.R.P. and T.N.; Investigation, E.R.P.;
Writing—original draft preparation, E.R.P.; Writing—review and editing, E.R.P. and T.N.; Supervision, T.N.
Funding: This research was funded by Noguchi Laboratory of Shizuoka University with Research and Innovationin Science and Technology Project (RISET-PRO), Ministry of Research, Technology, and Higher Educationof Indonesia.
Acknowledgments: Eka Rakhman Priandana was supported by Noguchi Laboratory of Shizuoka University and
by Research and Innovation in Science and Technology Project (RISET-PRO), Ministry of Research, Technology,
and Higher Education of Indonesia. Any opinions, findings, and conclusions expressed in this material are those of
the authors, and do not necessarily reflect the views of the funding agencies. Authors also would like to gratitude
anonymous reviewers for their very helpful and constructive comments, which improved this manuscript fromthe original.
Conflicts of Interest: The Authors declare no conflict of interest.

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