IEEE PEDS 2017, Honolulu, USA
12 – 15 December 2017

Current-Doubler Based Multiport DC/DC Converterwith Galvanic Isolation
Yoshinori Matsushita, Toshihiko Noguchi, Osamu Kimura†, and Tatsuo Sunayama†
Shizuoka University and Yazaki Corporation†
matsushita.yoshinori.15@shizuoka.ac.jp, noguchi.toshihiko@shizuoka.ac.jp

Abstract-This paper proposes a novel topology of a multiport
DC/DC converter composed of an H-bridge inverter, a highfrequency galvanic isolation transformer, and a combined
circuit with a current-doubler and a buck chopper. The
topology has lower conduction loss by multiple current paths
and smaller output capacitors by means of an interleave
operation. Results of computer simulations and experimental
tests show proper operations and feasibility of the proposed
strategy.

I.

conditions and some results for the circuit of the main
experiment. Finally, the conclusion is given in chapter VII.
II.

PROPOSED CIRCUIT CONFIGURATION AND
OPERATION PRINCIPLE

A.

Configuration of Main Circuit and Controller
Fig. 1 shows a circuit diagram of the proposed topology.
Multiport function is achieved by adding S5, S6, L3 and L4
to an isolated DC/DC converter based on a current-doubler.

INTRODUCTION

In recent years, global-scale problems on environmental
population have been increasing; hence, the effective
reduction of the energy consumption is focused on. As
solutions of the problems, there are usage of sustainableenergy and vehicles driven by the energy. One of the mostimportant factors of these solutions is energy conversion
systems because the power generated by the sustainableenergy resources and the power needed by loads are different[1]-[5]. However, in the current state, the energy sources, thestorages, and the loads are connected to independent
converters since such converters have only a single inputoutput. These lead a matter which is larger size of equipment.
As a method to solve the matter, multiport converters arefocused on [6]-[10]. In this paper, the multiport converter isapplied to a small-scale battery DC power supply system.
The system using a higher-voltage source for high-power
load is a recent technical trend to achieve smaller size. On
the other hand, a low-power supply is still in demand at thesame time. A DC power supply system which outputs mixed
multiple voltages is required for these reasons. In the case, asmall DC/DC converter which outputs different voltages is
expected because using multiple DC/DC converters leads tolarger size and higher cost.
In this paper, a new topology of the multiport DC/DC
converter which has potential of smaller size and lower cost is
proposed. The proposed topology is preliminary examinedboth computer simulations and experiments. The results
prove feasibility of the proposed strategy. Chapter II explains
proposed circuit configuration and operation principle, andchapter III indicates computer simulation conditions andresults of the circuit. Preliminary experimental setup and test
results are shown in chapter IV, and then chapter V indicatesconfiguration and test conditions for main experiment whichis in progress of making. Chapter VI describes simulation

S1

S2

L1
Vtx2

L2

Vin

S3

S5

S6

D1

D2

C1 Vout1

L3

S4
C2 Vout2

L4

Fig. 1. Proposed dual port DC/DC converter.

L1

Vout1

L2

C1
S5

D1

D1

D2

S6

D2

L3

Vout2
C2

L4

(a) Current doubler.
(b) Buck chopper.
Fig. 2 Decomposed configuration of secondary circuit.

Vout1* +

-

+
-

PI

+
-

V out1

Vout2* + -

PI

Vout2

S1
S4
+
-

S2
S3

S1
S3
S2
S4

S5
S6

Fig. 3. Block diagram of proposed circuit controller.

962
978-1-5090-2364-6/17/$31.00 ©2017 IEEE

1 2 3

4

567

80

8

Vout1

Vtx2
Voltage (V)

IL1

40

IL2

20

SW5

0

SW6
IL3

1

2
Time (ms)(a) Output voltage waveforms.
IL1
IL2

3

IL1+IL2

Current (A)

20
15
10
5
0
3.96

3.97

3.98

3.99

4.00

Time (ms)(b) Inductor currents and their synthesized current of output 1.

IL3

100

Current (A)The primary side is an H-bridge inverter connected through ahigh-frequency transformer to the secondary side. The
secondary circuit is a combination of the current-doubler
composed of S7, S8, L1 and L2 (Fig. 2 (a)) and a buckchopper composed of S5, S6, D1, D2, L3 and L4 (Fig. 2 (b)).
The circuit is characterized by having one inverter, one
transformer and outputting two different voltages. D1 and D2
are shared by the both circuits, which makes the component
counts lower. Fig. 3 shows a block diagram of the proposed
circuit controller. Vout1, which is a voltage of the output 1 iscontrolled by pulse width control (PWC) of the primary
inverter (S1 to S4), while Vout2 which is a voltage of output2
is controlled by S5 and S6 in the secondary circuit. The
command values of Vout1 and Vout2 are 48 V and 12 V,
respectively. In this paper, it is defined that an output of thecurrent-doubler is “output 1” and an output of the buckchopper is “output 2.”
B. Circuit Operation
Fig. 4 shows eight operation modes of the secondary
circuit. In the figure, it is hypothesized that the primarycircuit generates a three-level output to the transformer. Vtx2
is a voltage between both terminals of the secondary side of
the transformer. While Vtx2 is positive and SW5 is turned off,
L1 is charged by the electromotive force of the transformer,
and L3 discharges to the output 2 (modes 1 and 3). While
Vtx2 is positive and SW5 is turned on, the electromotive forceof the transformer charges not only L1 but also L3. While
Vtx2 is zero and negative, the energy charged in L1 and L3 isdischarged to each output (modes 4 and 8). While Vtx2 isnegative and SW6 is turned off, L2 is charged by theelectromotive force of the transformer, and L4 discharges tothe output 2 (modes 5 and 7). While Vtx2 is negative and SW6
is turned on, L4 is also charged by the electromotive force ofthe transformer energy (mode 6). While Vtx2 is zero or
positive, the energy charged in L2 and L4 are discharged toeach output (modes 4 and 8).
As shown in Figs. 1 and 2, the secondary circuit has double
current paths to each output, where one is L1 and L2 paths,

0

25

IL4
Fig. 4. Operation modes of proposed dual port DC/DC converter.

Vout2

60

IL4

IL3+IL4

80
60
40
20
3.96

3.97

3.98
3.99
4.00
Time (ms)(c) Inductor currents and their synthesized current of output 2.
Fig. 5. Dual port output voltage and inductor current waveforms.

and the other is L3 and L4 paths. This means that the
proposed topology has a half conduction loss compared withthe case of a single current path. In addition, the proposed
topology has a two-phase interleave mode because of an AC
rectangular wave from the transformer; thus, the capacitancevalues of the output capacitors C2 and C3 can be small.
Applying a multiphase inverter makes it possible to increase
the current paths, resulting in the lower conduction loss andthe lower capacity of C2 and C3. With increasing the current
paths, the components counts also increase. On the other
hand, the current capacity and each component size become
lower. This leads higher space occupancy rate of the circuit
package by flexible implementation. For this reason, theproposed topology has potential of higher power density.
By employing the synchronous rectification system using
MOSFETs instead of D1 and D2, the proposed topology
achieves higher power density with lower losses. Therefore,963

TABLE I.
SIMULATION PARAMETERS.

20

Switching Frequency

100 kHz

Vin

400 V

Vout1

48 V

Vout2

12 V

R1

2.3 Ω

R2

0.14 Ω

L1 and L2

20 μH

L3 and L4

5 μH

C1

47 μF

C2

94 μF

Vout1
Vout2
Voltage (V)Values1.0Time (s)IL1

3

PRELIMINARY EXPERIMENTAL TEST PARAMETERS.

1.5

2.0

IL1+IL2

IL2

2
1

Parameters

ValuesSwitching Frequency

100 kHz

Vin

80 V

Vout1

12 V

-2

Vout2

6V

R1

1.8 Ω

-3
1.975

R2

1.8 Ω

L1 and L2

20 μH

L3 and L4

5 μH

8

C1

47 μF

6

C2

94 μF

0
-1

1.980

1.985
1.990
Time (ms)

1.995

2.000

Current ripple (A)(b) Inductor current ripples and their synthesized current ripple of output 1.

it is considered that the proposed topology contributes
smaller size and lower cost of the DC/DC converter.

IL3

IL3 +IL4

IL4

4
2
0
-2
-4
-6

PRELIMINARY COMPUTER SIMULATIONS FORCONFIRMING OPERATION PRINCIPLETABLE I shows computer simulation conditions. Vin, Vout1,
and Vout2 are chosen from voltages assumed for automotive
applications. R1 and R2 are determined so that each output
power rating is 1000 W. L1 to L4 have enough values toprevent the current ripple from getting high, and C1 and C2
also have enough values to suppress output ripples.
Fig. 5 shows the simulation results. Fig. 5 (a) indicates
two-output voltage waveforms controlled stably in the steadystate within 1 ms. Although an overshoot appears before thesteady state, it is considered that the overshoot can besuppressed by adopting suitable controlled parameters. Fig. 5(b) shows the currents of L1, L2, and the synthetic bothcurrents, and Fig. 5 (c) shows the currents of L3, L4, and thesynthetic both currents. As can be seen in the figures, theinterleaved currents are confirmed, and the synthetic current
ripple is effectively reduced with doubling the ripple
frequency, especially in Fig. 5 (b). These results show thatthe proposed circuit works with expected principle.

0.5(a) Output voltage waveforms.

TABLE II.

III.

10

0
0.0

Current ripple(A)Parameters

-8
1.975

1.980

1.985
1.990
Time (ms)

1.995

2.000

(c) Inductor current ripples and their synthesized current ripple of output 2.
Fig. 6. Output voltage and inductor current waveforms obtained inpreliminary experimental.

IV.

PRELIMINARY EXPERIMENTAL SETUP AND TESTRESULTS FOR VERIFICATION OF OPERATION

In order to confirm the validity of the proposed technique,several preliminary tests have been conducted with a scaledown experimental setup. TABLE II shows the preliminary
test conditions. Vin is one-fifth, Vout1 is one-fourth, and Vout2 ishalf of the final prototype in the simulation. R1 and R2 arechosen so that the output power of Vout1 is 80 W and that ofVout2 is 20 W.
Fig. 6 shows the test results. Fig. 6 (a) is Vout1 and Vout2
waveforms. These are controlled stably in the steady state
without significant overshoot. Vout1 and Vout2 are controlled to

964

S1

S3

PC1

PC3

12:6

Vin

L1

Vtx2
S5

PC2
S2

PC4
S4

Itx

G2
PC1

G3
PC4

G4
PC3

L2

C1

Vout1

Vref1

G5
G6

L3

S7

G1
PC2

S6

S8

G7
G8

L4

C2
Vref2

Vout2

Fig. 7. Whole system configuration of proposed dual port DC/DC converter for final prototyping.
400kHzG1

Parameters

ValuesG3

Switching Frequency

400 kHz

G4

Vin

400 V

G5

Vout1

48 V

G6

Vout2

12 V

G7

R1

2.3 Ω, 23 Ω

G8

R2

0.14 Ω, 1.4 Ω

Transformer turn ratio

N1 : N2 = 12 : 6

L1 and L2

2.5 μH+-

VItx (I =0)
tx

Vout1*
Vref1-

Vout2*+

Vref2

TABLE III.
Parameters of proposed dual port DC/DC converter.

G2

VItx

+

-

PI
PI

Phase
shifter+-++Fig. 8. Control block diagram of dual port DC/DC converter for final
prototyping.

be 12 V and 6 V, respectively. It takes approximately 0.5 s toreach the steady state after turning on the circuit. The time tobe steady state should be shortened by choosing proper
control parameters. During the steady state, both output
voltages have high-frequency noises. It is considered that thenoises are caused by resonance of parasitic inductance andcapacitance. The noises should be removed by making thecircuit layout appropriate with lower parasitic circuit
parameters and putting low-pass filters in suitable locations.
Fig. 6 (b) shows current ripples of L1, L2, and the synthetic
current. The ripples of L1 and L2 are 3.2 A and 3.4 A,
respectively, and the synthetic current ripple is 2.3 A. Fig. 6(c) shows the same waveforms of L3, L4, and the synthetic
current. The ripples of L3 and L4 are 10.9 A are 12 A,
respectively, and the synthetic current ripple is 4.6 A. In theboth figures, periodical noises are observed in convex
downward part of each current. It is considered that thenoises are caused by the reverse voltages of S5 and S6. The
noises also come from the parasitic elements same as thehigh-frequency noises.
As well as the simulation results, the test result indicatesthat the two different output voltages are properly controlled
as expected, interleaved currents are confirmed, and thesynthetic current ripples are effectively reduced withdoubling the ripple frequency. These results show that the
proposed circuit works with actual circuit.

V.

L3 and L4

1 μH

C1

44 μF

C2

141 μF

WHOLE SYSTEM CONFIGURATION AND TESTCONDITIONS FOR FINAL PROTOTYPE

It is confirmed that the preliminary circuit was operated as
expected principle. In this chapter, a circuit, a control block
diagram, and test conditions for main test are indicated.
Figs. 7 and 8 show the circuit diagram and a block diagramof the circuit controller. Instead of diodes, MOSFETs are
employed (S7 and S8 in Fig. 6). The controller generates G1
to G8 signals which are gate signals of S1 to S8. G1 is a 50% duty cycle 400-kHz rectangular wave, and G2 is aninverted signal of G1. G3 is a phase-shifted signal based on
G1, and G4 is an inverted signal of G3. An optocoupler is
put in each MOSFET of the primary side to detect the drainsource voltages (PC1 to PC4). These signals are input tointerlock circuit to make proper dead times of the H-bridge
inverter. A corresponding voltage to the transformer current(VItx) and VItx(Itx=0), which is a voltage when VItx = 0 are alsoneeded to the proper switching of S3 and S4. G5 and G6 arechanged by situations of G1 to G4. G7 and G8 are alsodecided by situations of G1 to G6.

965

COMPUTER SIMULATIONS FOR FINAL PROTOTYPING

0

1

2
3
4
Time (ms)(a) Output voltage waveforms.

IL1

IL2

5

IL1+IL2

20

Current (A)Fig. 9 indicates the simulation results for the experimental
tests. Fig. 9 (a) shows the output voltage waveforms. The
two output voltages are controlled stably in the steady state.
Vout1 takes approximately 4 ms to be steady state and Vout2
takes approximately 3 ms to be stable. Overshoots areobserved in the both waveforms.
Particularly, Vout2’s
overshoot is more than 30-V higher than the command value(48 V). These overshoots are led by control parameters. The
parameters should be tuned from the viewpoints of theovershoots and the waveform behavior when the load changes.
Fig. 9 (b) shows currents of L1, L2, and the synthetic
current. Each current has some periodical noise in convex
upward part of each current. This noise is caused by thereverse voltage of S5 and S6 as well as the waveforms of Fig.
6 (b). Since the operation modes of the experimental tests arechanged from that of the preliminary experimental tests, thepoints where the noises appear are different between Fig.6 (b)and Fig. 9 (b). Fig. 9 (c) shows currents of L3, L4, and thesynthetic both currents. The noises from the reverse voltage
of S5 and S6 are also shown although these are small. It isbecause current values are much higher than the noises. In
Figs. 9 (b) and (c), it is confirmed that the currents areinterleaved and the synthetic current ripple is effectively
reduced by doubling the ripple frequency.
Fig. 10 indicates that results of load change tests. Whentime is 5.5 ms, load factors are changed. Figs. 10 (a) and (b)show that the load power of the both outputs is changed from
10 % to 100 %. Figs. 10 (c) and (d) show that load factors ofboth outputs are changed from 100 % to 10 %. In Fig. 10 (a),when Iout1 are changed from 10 % to 100 %, Vout1 swings
down 4 V and it takes approximately 4 ms to get back to thesteady state. On the other hand, Vout2 and Iout2 do not change
at all. Fig. 10 (c) shows similarly results to Fig. 10 (a).
When Iout1 are changed from 100 % to 10 %, Vout1 swings up 4
V and it takes 4 ms to get back to the steady state. On theother hand, Vout2 and Iout2 do not change at all. These results
imply that the voltage and current of output2 are not affectedby the load change of output1. Fig. 10 (b) shows that whenIout2 are changed from 10 % to 100 %, Iout2 has 3-A overshootand Vout2 little changes. In addition, Iout1 swings down 3 A,

Vout1
Vout2

30

10
0
-10
4.995

4.997
4.998
4.999
5.000
Time (ms)(b) Inductor current ripples and their synthesized current ripple of output 1.

4.996

IL3

120

IL4

IL3+IL4

100
Current (A)

VI.

90
80
70
60
50
40
30
20
10
0

Voltage (V)TABLE III indicates experimental parameters. Switchingfrequency is 400 kHz so that size of passive components getssmaller. R1 and R2 values are chosen through the situationsof the load change tests which are 100 % and 10 % of theload power. When the load power is 100 %, both output
powers are 1000 W. The transformer turn ratio is 12 : 6,
which is considered that the inverter part and the transformer
part and the current-doubler part have equable voltage
transformation ratio when load power is 100 %. L1 to L4,
and C1 and C2 are determined so that the total size of thesepassive components is reduced. The values listed in TABLE
III have not appropriately tuned yet, and the optimal values
are currently investigated while the final prototyping is done.

80
60
40
20
0
4.995

4.996

4.997
4.998
4.999
5.000
Time (ms)(c) Inductor current ripples and their synthesized current ripple of output 2.
Fig. 9. Experimental output voltage and inductor current waveforms.

and Vout1 also swings down 7 V. It takes more than 3 ms forthese waveforms to get back to the steady state. Fig. 10 (d)shows similarly results to Fig. 10 (b). Fig. 10 (d) also
indicates that when Iout2 are changed from 100 % to 10 %,Vout2 seldom changes. At the same time, Iout1 swings up 3 A,
and Vout1 also swings up 5 V. It takes more than 3 ms to getback to the steady state. According to the results, it isconsidered that the voltage and the current of the output 1 areaffected by the load change of output 2 in contrast to the casewhen the load change of the output 1.
It is considered that there are two reasons why the
waveforms of the output 1 are affected by the load change ofthe output 2, and the waveforms of the output 2 are notaffected by the load change of the output 1. One is because
the current variation range of Iout2 is wider than that of Iout1. It
means that although the output 2 is actually affected by the966CONCLUSION

In this paper, a novel topology of the current-doubler based
multiport DC/DC converter has been proposed and been
investigated. The secondary circuit has a mixed structurecomposed with a current-doubler and a buck chopper, which
effectively reduces the conductive loss and equipment size.
The simulation results and preliminary experimental test
results has proven feasibility of the proposed approach. The
experimental test results of the final prototype will bedemonstrated in the very near future work.
REFERENCES
[1]
[2]

[3]

[4]

[5]

[6]

[7]
[8]

T. Teratani, “Impact of DC48V on Automotive Power Supply System,”
IEEJ Transactions on Industry Applications, vol. 135, no. 9, pp. 892897.
R. Ota, N. Hoshi, and K. Uchida, “Improving the Efficiency byControlling the Switching Frequency for Secondary-side Converter ofan Inductive Power Transfer System,” IEEJ Transactions on Industry
Applications, vol. 137, no. 2, pp. 95-103.
K. Hata, T. Imura, and Y. Hori, “Simultaneous Estimation of Two
Parameters Based on Secondary-Side Information for Wireless Power
Transfer via Magnetic Resonance Coupling,” IEEJ Transactions on
Industry Applications, vol. 137, no. 2, pp. 104-111.
S. Sinha and S. S. Chandel, “Review of recent trends in optimization
techniques for solar photovoltaic-wind based hybrid energy systems,”
Renewable and Sustainable Energy Reviews, vol. 50, 2015, pp. 755–
769.
M. Hosenuzzman, N. A. Rahim, J. Selvaraj, and M. Hasanuzzaman,“Global prospects, progress, policies, and environmental impact ofsolar photovoltaic power generation,” Renewable and Sustainable
Energy Reviews, vol. 41, 2015, pp. 284–297.
K. Itoh, M. Ishigaki, N. Yanagizawa, S. Tomura, and T Umeno,“Analysis and Design of a Multiport Converter Using a Magnetic
Coupling Inductor Technique,” IEEE Transactions on Industry
Applications, vol. 51, Issue 2, 2015, pp. 1713-1721.
Z. Ling, H. Wang, K. Yan, and J. Gan, “Optimal Isolation Control of
Three-Port Active Converters as a Combined Charger for Electric
Vehicles,” Energies, 2016, vol. 9, Issue 9, 715.
L. Piris-Botalla, G. G. Oggier, A. M. Airabella, and G. O. Garcia,“Power losses evaluation of a bidirectional three-port DC-DC converter

Current (A), Voltage (V)

Iout1
Iout2
Vout1
Vout2

7
8
9
10
Time (ms)(a) Response of output 1 to step load change from 10 to 100 %.
90
80
Iout1
70
Iout2
Vout1
60
Vout2
50
40
30
20
10
0
5
6
7
8
9
10
Time (ms)(b) Response of output 2 to step load change from 10 to 100 %.
90
80
Iout1
70
Iout2
Vout1
60
Vout2
50
40
30
20
10
0
5
6
7
8
9
10
Time (ms)(c) Response of output 1 to step load change from 100 to 10 %.
90
80
Iout1
Iout2
70
Vout1
60
Vout2
50
40
30
20
10
0
5
6
7
8
9
10
Time (ms)(d) Response of output 2 to step load change from 100 to 10 %.
Fig. 10. Responses of dual ports to step load change.
Current (A), Voltage (V)6Current (A), Voltage (V)

VII.

90
80
70
60
50
40
30
20
10
0
5

Current (A), Voltage (V)load change of the output 1, it could not be observed becauseof a narrow current variation range of Iout1. Another reason is
because deference of complexity of the control system
between Vout1 and Vout2. A function of S1 to S4 is powertransport from input source to the transformer including acontrol of Vout1. It means that S1 to S4 also supply power to
Vout2 although they do not control Vout2. On the other hand, S5
and S6 operate to control Vout2 acting as a buck chopper. It
means that S5 and S6 just chop and control the power fromthe transformer. Therefore, the output 2 waveform is notaffected by the load change of the output 1 because thewaveforms of the output 2 are compensated by S5 and S6,
when the load of the output 1 is changed. In contrast, theoutput 1 waveform is affected by the load change of theoutput 2 because when the load of the output 2 is changed,
operation of adjusting supply power to Vout2 disturbs to
keeping Vout1 stable. To keep independence of the both
outputs, it is considered that the control link between the
inverter, S5, and S6 should be optimized.

for hybrid electric system,” Electrical Power and Energy Systems, vol.
58, 2014, pp. 1-8.
[9] Z. Rehman, I. Al-Bahadly, and S. Mukhopadhyay, “Multiinput DC-DC
converters in renewable energy applications -An overview,” Renewable
and Sustainable Energy Reviews, vol. 41, 2015, pp. 521-539.
[10] N. Zhang, D. Sutanto, and K. M. Muttaqi, “A review of topologies ofthree-port DC/DC converters for the integration of renewable energy
and energy storage system,” Renewable and Sustainable Energy
Reviews, vol. 56, 2016, pp. 388-401.

967