How to fabricate a defect free Si„001… surface
K. Hata, T. Kimura, S. Ozawa, and H. Shigekawaa)
Institute of Applied Physics and CREST, Japan Science and Technology Corporation (JST),
University of Tsukuba, Tsukuba 305-8573, Japan

共Received 26 October 1999; accepted 20 March 2000兲
We demonstrate the successful fabrication of an almost defect free Si共001兲 surface by refining thestandard annealing and flashing surface preparation method. On any desired samples, we canroutinely fabricate a surface with defect densities lower than 0.1%, significantly reducing the defectdensity compared to surfaces fabricated by standard methodology. © 2000 American Vacuum
Society. 关S0734-2101共00兲12004-4兴

I. INTRODUCTION
Even though a great deal of effort has been put forth tofabricate a defect free Si共001兲 surface, the Si共001兲 surface isbelieved to inevitably have a significant concentration of defects. Defects on the Si共001兲 surface influence, in some cases
determine, the surface morphology of the surface.1–12 Numerous important processes such as crystal growth, site ofadsorption, and oxidation are reported to be influenced by
the defects, in most cases in a negative and undesired
fashion.13–17 What makes the situation worse is the fact thatthe concentration and types of defects observed on the surface strongly depend on the preparation methods andsamples, making comparison of research from different
groups difficult. In order to diminish the influence of defects
and make the intrinsic characteristics of the Si共001兲 surface
clear, a method of fabricating a surface free from defects isurgently demanded and has been pursued by several different
approaches. If realized, a defect free Si共001兲 surface would
serve as a standard template for future surface science work.
The method of fabricating a defect free surface is required to
be as conventional as possible and be able to be applied toany desired sample. Many different surface preparation
methods to obtain clean Si共001兲 surfaces have been proposedso far, for example, pre-chemical treatments, and passivation. As the scanning tunneling microscope 共STM兲 has developed into the standard detector to check the cleanliness ofthe surface at an unprecedented resolution, many preparation
methods, including the use of ion bombardment, have been
discarded, and the simple annealing and flashing procedure
has became established as the method of choice for surface
preparation.18
The standard process of annealing and flashing widely
employed in surface science work nowadays was guided by
Swartzentruber et al.19 They have provided a procedure ofpre-baking and flashing which is believed to optimum thecleanliness of Si共001兲. Ukraintsev, Dohnalek, and Yatesstudied the influence of metal impurities, stressing the importance of the material of the sample holders, and presented
procedures to clean the sample holders.20 However, the best
published STM images of the Si共001兲 surface utilizing thesea兲Electronic mail: hidemi@ims.tsukuba.ac.jp; http://dora.ims.tsukuba.ac.jp

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J. Vac. Sci. Technol. A 18„4…, JulÕAug 2000

techniques show defects with a density around several percent 共1%⬃兲.
In this article, we report on the success of fabricating analmost defect free Si共001兲 surface. On any desired sample,
we can routinely fabricate a surface with defect densities
lower than 0.1%, significantly reducing the defects comparedto surfaces fabricated by standard methodology. Two important findings led us to the success of fabricating the defectfree Si共001兲 surface: 共1兲 split off dimers and missing dimerrow defects can be eliminated by a simple combination of
annealing at high temperatures 共at a temperature range which
was believed to lead to surface roughening兲 and a conventional flashing; 共2兲 the density of the A, B, and C defects
increases with the increase of vacuum pressure during flashing, and if the vacuum pressure during flashing is kept extremely low, it is possible to fabricate a surface which has
almost no A, B, and C defects. The techniques used to fabricate the defect free Si共001兲 surface are very simple andshould be applicable to many ultrahigh vacuum 共UHV兲 systems and on every desired sample.
II. RESULTS AND DISCUSSIONThe Si samples were clamped to a Ta holder by Mo clips
and direct contact to stainless steel was avoided. No thermocouple was used as they are reported to contaminate theSi共001兲 surface,20 and the temperature was measured by apyrometer. N-type Si samples phosphorus doped with a conductivity of 0.1 ⍀ cm were used, though similar results wereobtained with different doping levels and dopants. During
preparation, great care was taken not to contact the Si
samples with metals. The base pressure of the vacuum chamber was 3⫻10⫺9 Pa. After ultrasonic cleaning for 10 min inaseton, the Si共001兲 sample was loaded into vacuum and prebaked at ⬃600 °C for 12 h with a vacuum pressure below⫺1.0⫻10⫺7 Pa. After pre-baking, the sample was once
flashed to 1150 °C for 30 s to remove the oxidized layers. By
this procedure, a clean Si共001兲 surface that shows a typicalconcentration of defects 共several percent兲 is fabricated.19,20
We further reduce the density of defects by two extra processes described in the following and fabricate a defect free
Si共001兲 surface.
An example of an almost defect free Si共001兲 surface at 80
K is shown in the STM image of Fig. 1. Completely ordered0734-2101Õ2000Õ18„4…Õ1933Õ4Õ$17.00©2000 American Vacuum Society

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FIG. 1. STM image of the defect free Si共001兲 surface at 80 K. Tunnelingconditions Vs⫽⫹0.6 V, I⫽1 nA.

buckled dimers with no defects are observed.
Actually, defects are rarely observed on this surface. Notethat Fig. 1 is an STM image of the empty states taken at alow surface bias 共⫹0.6 V兲, a tunneling condition in which
the defects are highlighted most 共most of the defects appear
as bright protrusions兲. This is important because there aresome defects which are invisible at typical filled state STM
images taken at a surface bias as high as ⫺2 V. The defectdensity is lower than 0.1%, far lower than that achieved bystandard surface preparation methods.
A flow chart of the complete procedure to fabricate adefect free surface is shown in Fig. 2. Process 共*2兲 represents
the conventional pre-baking and flashing described above
while processes 共*3兲 and 共*4兲 are implemented to reduce thedefect density further. Process 共*3兲 removes the split off
dimer and missing dimer row defects while process 共*4兲 removes the A, B, and C defects. Process 共*1兲 is necessary to
make 共*4兲 possible.
The first extra process 共*3兲 eliminates the split off dimer
and missing dimer row defects from the surface. Split off

FIG. 2. Flow chart showing the procedure to fabricate a defect free Si共001兲
surface.
J. Vac. Sci. Technol. A, Vol. 18, No. 4, JulÕAug 2000

FIG. 3. 共a兲 Empty 共Vs⫽⫹0.6 V, I⫽1 nA兲 and 共b兲 filled state 共Vs⫽⫺1.5 V, I⫽1 nA兲 STM image of missing dimer rows formed by repeatedflashing. 共c兲 STM image 共Vs⫽⫺2.0 V, I⫽1 nA兲 of the surface after annealing at 950 °C. 共d兲 After flashing at 1150 °C for 30 s 共Vs⫽⫺1.5 V, I
⫽1 nA兲.

dimer defects are imaged by STM as two neighboring darkdimer sites, a neighbor bright dimer site, and a neighbor darksite.20–22 Within typical experimental conditions, the split off
dimer defects increase with repeated flashing and annealing
and eventually they organize themselves with other vacancies producing the missing dimer rows having a (2⫻n)
overlayer.20 The increase rate of the defects with flashingstrongly depends on the condition of the holders andsamples. No method has been reported to remove these defects, and once the missing dimer rows cover the surface, thesample is considered to have reached its lifetime and is replaced by a new sample.
We found that it is possible to eliminate the split off
dimer and missing dimer row defects by annealing the substrate for a long time 共1 h⬃兲 at high temperatures 共950–
1000 °C兲 followed by conventional flashing. Annealing
Si共100兲 surfaces to high temperature is usually avoided because it is reported to result in surface roughening.23 Figures
3共a兲 and 3共b兲 show the filled and empty state STM images ofa surface covered with a certain ratio of missing dimer row
defects which were formed by repeated flashing treatments
共this is a case of heavy and intentional contamination taken
for demonstration purposes兲. Annealing this surface at
950 °C for 1 h resulted in surface roughening as shown in
Fig. 3共c兲. We found that it is possible to clean the surface
with subsequent flashing at 1150 °C for 30 s 共required timedepends on the degree of roughening兲 as shown in Fig. 3共d兲.
It is striking to observe that the missing dimer rows havebeen eliminated by this process. Once the split off dimers
and missing dimer row defects are eliminated, the sample
remains clean and free from these defects after subsequent

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Hata et al.: How to fabricate a defect free Si„001… surface

flashing, provided the sample holder contains no stainlesssteel and is thoroughly outgassed by process 共*1兲. In usualexperimental conditions 共no intentional contamination兲, we
can reduce the density of the split off dimer defects almost to
zero by this process 共we have noticed that this process does
not always work, the reason is not known at this stage兲.
At this stage we cannot present a complete explanation
for the elimination of the split off dimers and missing dimer
rows. Many researchers have reported that the split off dimer
and missing dimer row defects are induced by heavy metal
contamination, particularly Ni.20–22 For the case of Si共111兲,Yoshimura, Shinabe, and Yao have shown the dissipation of
the superstructures associated with deposited Ni metals andthe recovery of the clean 7⫻7 structure of Si共111兲 by annealing at 1000 °C for a long time.24 The difference between
Si共001兲 and Si共111兲 is that it is necessary to combine thehigh temperature annealing 共950 °C⬃, 1 h⬃兲 and subsequent
flashing to eliminate the missing dimer rows of Si共001兲. It
might be that the heavy metals in the sample and sample
holder accumulate in the vicinity of the surface during annealing and are removed by subsequent flashing.
The second extra process 共*4兲 eliminates the A, B, and C
defects from the surface. After the sample and sample holder
are completely cooled down, an additional flashing is carriedout at 1150 °C for a very short time 共⬃5 s兲. What is criticalhere is to keep the increase of vacuum pressure 共outgas fromthe sample holder兲 during flashing as minimum as possible.
For the case of the surface shown in Fig. 1, the worst
vacuum pressure during flashing at 1150 °C was 7⫻10⫺9 Pa. The increase of vacuum pressure during flashingis minimized by pre-baking the sample holder and the surroundings at high temperatures for a couple of weeks in
UHV with a dummy Si sample 关process 共*1兲兴. This thoroughoutgassing of the sample holder is required once provided
the sample holder is not contaminated accidentally. In oursystem, if the vacuum pressure during flashing is kept below
1⫻10⫺8 Pa, we can obtain a surface with extremely low
defect density on any desired substrate, while if the vacuum
pressure exceeds 1⫻10⫺7 Pa during flashing, the surface iscovered with numerous defects. If the vacuum pressure during flashing is kept below 1⫻10⫺8 Pa, the slow cooling
down process conventionally employed to reduce the defects
is not necessary, though it would decrease the defect density
in other cases.
Dependence of the density of the C defects on vacuum
pressure during flashing has also been previously reported by
Ukraintsev and co-workers, though their clean surface showsa defect density of several percent.25 The concentration of
the C defect shows the strongest dependence on vacuum
pressure during flashing and is most easy to reduce. What issurprising here is that the concentration of the A and B defects can be reduced almost to zero in an extremely clean
fabrication condition, giving counter evidence to the suggestion that the A and B defects might be a feature of the groundstate of the Si共100兲 surface.26
Realization of the defect free Si共100兲 surface has several
important implications for future studies. The defect free
JVST A - Vacuum, Surfaces, and Films

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Si共100兲 surface readily manifests its importance in STM
studies of the clean surface of Si共100兲.27 Even though numerous STM studies have been carried out on the Si共100兲 surface, most of them have concentrated on the filled state STM
images taken at relative high surface biases as ⫺2 V. Only
recently it was realized that probing the surface of Si共100兲
with various biases is important, particularly through research of adsorbed atoms which revealed that some adsorbed
atoms are invisible in the filled state STM images taken atconventional surface biases 共⫺2 V兲.27–31 In addition, recently it has been pointed out that the dangling-bond orbitals
are roughly localized in the range of ⬃⫾1 V from the Fermi
level, and in a typical STM image taken at the surface bias of⫺2 V, a significant part of the tunneling current must comefrom other states than the dangling bond orbitals.27,32 Defects
are the major reason why most of the previous STM studies
mainly concentrated on the filled state images taken at a
relatively high bias 共⫺2 V兲. At ⫺2 V, most of the defects on
the surface are observed as dark sites or vacancies or areeven invisible, thus scanning at ⫺2 V provides the mostapparent clean STM image of the surface. When one attempts to lower the bias, defects become very bright because
many of them are metallic,1,14,16 making it difficult to observe the dimers clearly. This aspect is demonstrated in the
STM images of Figs. 4共a兲 and 4共b兲 taken at room temperature. We switched the surface bias to various values during
scanning of a surface that had a typical density of defects. It
is easy to realize that the defects become very bright at low
biases and in the empty state images. Particularly, at ⫺0.5 V,
defects are highly contrasted and seriously disturb the scanning, making it difficult to observe the dimers. However, insome particular locations 共indicated by the arrows and surrounded by the circles兲, a new feature is readily observable.
There, each of the two atoms of the dimers are clearly resolved as round protrusions, giving a filled state STM imageof the dimers similar to the empty state STM images. This
aspect becomes clear in a STM image taken on a defect freesurface at a surface bias of ⫺0.6 V as shown in Fig. 4共c兲. On
a defect free surface, we are no longer bothered by the defects and the surface can be probed at any desired surface
bias except those in the band gap. Again, in Fig. 4共c兲, each of
the two atoms of the dimers is clearly resolved. We interpretthe new feature observed in the filled states at low biases as
the following: 共1兲 at low biases 共⫺0.5 V兲, STM observes thedangling bond orbital. 共2兲 At high biases 共⫺2 V兲, tunnelingfrom other states starts to participate in which are localized
between the Si–Si dimer bond, and as a result, the dimer isobserved as a single oval. A detailed discussion is given
elsewhere.27 Furthermore, Qin and Lagally have observedsome new features in the empty state STM images of the
dimers taken at low biases, and have given a similarinterpretation.32 These results suggest that it is important toimage the surface with a lower surface bias than before, atask much easily fulfilled on a defect free surface.
III. CONCLUSION
In conclusion, we have succeeded in fabricating a clean
Si共001兲 surface with an extremely low concentration of de-1936

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ACKNOWLEDGMENTS
This work was supported by the Shigekawa Project ofTARA, University of Tsukuba. The support of a Grant-inAid for Scientific Research from the Ministry of Education,
Science and Culture of Japan is also acknowledged.

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1
2

FIG. 4. 共a兲, 共b兲 STM images of a surface that showed a typical density ofdefects probed with various surface biases indicated in the right of the
figures. 共c兲 A STM image of defect free Si共100兲 surface taken at ⫺0.6 V.
Tunneling current 1 nA.

fects by refining the standard annealing and flashing surface
preparation method. The key point in fabricating a defectfree surface is twofold: 共1兲 eliminating the split off dimer
and missing dimer row defects by a combination of annealing at high temperature 共950 °C⬃兲 for a long time 共1 h⬃兲and flashing at 1150 °C 共2兲 and to keep the increase of thevacuum pressure during flashing as minimum as possible
which eliminates the A, B, and C defects. Realization of thedefect free Si共001兲 surface should revolutionize some fields
of surface science work on Si共001兲 such as studies of adsorption, since some adsorbates are imaged similar to the defects
by STM. What is more important, the defect free Si共00兲 surface should serve as a standard template for future surface
science work.

J. Vac. Sci. Technol. A, Vol. 18, No. 4, JulÕAug 2000