SD Express Cards with
PCIe® and NVMeTM Interfaces

White Paper | June 2018www.sdcard.org | ©2018 SD Association. All rights reserved

Conditions for publication
Publisher and Copyright Holder:

Disclaimers:

SD Association
2400 Camino Ramon, Suite 375
San Ramon, CA 94583 USA
Telephone: +1 (925) 275-6615
Fax: +1 (925) 886-4870
E-mail: help@sdcard.org

The information contained in this whitepaper is provided as iswithout any representations or warranties of any kind. No
responsibility is assumed by the SD Association for any
damages, or any infringements of patents or other rights of
the SD Association or any third-parties, which may result fromthe use of any portion thereof. No license is granted by
implication, estoppel or otherwise under any patent or otherrights of the SD Association or any third-party. Nothing hereinshall be construed as an obligation by the SD Association todisclose or distribute any technical information, know-how orother confidential information to any third party.

Trademarks Notice:
SD is a trademark or a registered trademark of SD-3C, LLC in
the United States, other countries or both. SD, SDHC,
miniSDHC, microSDHC, SDXC, microSDXC, SDUC andmicroSDUC Logos are trademarks of SD-3C LLC.
PCI Express® is a registered trademark of PCI-SIG®.
NVM ExpressTM and NVMeTM are trademarks of
NVM Express, Inc.

SD Express Cards with PCIe® and NVMeTM Interfaces

2

White Paper

www.sdcard.org | ©2018 SD Association. All rights reserved

Executive Summary
In June 2018, the SDA released SD7.0 introducing two major new functions:
SD Express: Incorporates the PCIe® and NVMeTM interfaces, known worldwide for its high bandwidthand low latency storage, into SD memory cards alongside legacy SD interfaces
SD Ultra Capacity (SDUC): Extends the potential maximum SD memory card capacity from 2TB to
up to 128TB
In anticipation of the next generation of high performance mobile computing requirements, adding
the PCIe technology and the advanced NVMe protocol delivers faster access to data files than today’s
SD platform, achieving speeds of up to 985 MB/s that support content applications and data generated
by highly capable system architectures. This new protocol allows SD Express memory cards to serve as
removable Solid State Drives (SSD).
These speeds are essential for high-resolution content applications such as: super-slow motion video,
RAW continuous burst mode photography, 8K video capture and playback, 360 degree video, speed
hungry applications running on cards and mobile computing devices, ever-evolving gaming systems,
multi-channel IoT devices, numerous automotive storage needs, to name a few.
In addition to many performance advancements, SD Express maintains the long-standing advantage ofSD’s backward compatibility and interoperability. The PCIe interface was added in addition to theexisting SD (UHS-I) interface, allowing a card with SD Express to operate interchangeably in new SD
Express capable hosts as well as billions of existing SD host products in the market today.

SD Express Cards with PCIe® and NVMeTM Interfaces

3

White Paper

www.sdcard.org | ©2018 SD Association. All rights reserved

The Insatiable Need for More Capacity,
Performance and Modern Protocols
In the SD 7.0 specification, the SDA extended the limits oftraditional SD memory cards’ capacity to meet the evergrowing needs of users everywhere. The new SDUC surpasses
SDXC’s 2TB maximum, allowing SD cards to store data up to
128TB, regardless of form factor, either micro or full size, orinterface type including UHS-I, UHS-II, UHS-III or SD Express.
However, the SD Express card with its PCIe and NVMe
interfaces is the revolutionary addition to SD7.0 specification.
A few major market conditions have raised the requirements
for removable memory cards with higher speeds, improved
protocols and interfaces:
Applications Demand Capacity• Demand for higher capacity memory grows
continuously with the advancement of applications suchas higher resolution videos, 3D graphic games, social
media, drones, action cameras, 360o cameras, virtual
reality, and streaming video content that is stored on SD
memory cards for offline usage.
• Higher capacity cards require ever-faster speeds to movecontent quickly.
Evolving Mobile Computing Infrastructure• Growing performance levels of input/output (IO)
communication interfaces with either wireless such as
Wi-Fi/Wi-Gig, or wired such as USB 3.
• Rapid developments in application processor
technology, including multi cores, speed, RAM
increases, etc.
• Embedded storage is transitioning to more advanced
protocols. opening new opportunities, including UFS,
PCIe and NVMe.
• These evolving technology trends push removable
memory interfaces requirement for additional higher
random and sequential performance requirements.

Client Computing, Imaging and Automotive• Client computing is moving rapidly from SATA to PCIe
Gen3, multi-channel and Gen4.
• Various memory related emerging markets require highspeed memory interfaces and multi-channel operations.
A sample of markets include autonomous vehicles andconnected cars with multi sensors data collection andprocessing, multi-channel video capture for IoT devices.
• The imaging market is already trending toward UHS-II/III
or PCIe.
These evolving technology trends signal a demand for memory
cards with high performance sequential and random accessprovided by SD Express.
The major operating systems now allow applications to start-up
directly from an SD memory card. SD memory cards may now
be used in Google Android devices as embedded memory or
extended system storage for video/audio content as well as forstoring and running apps. Running Android applications from a
card requires higher random performance and sequential
performance capabilities.
In 2016 and 2017, SDA introduced the Application Performance
Classes A1 and A2 to ensure a certain level of random
performance of SD memory cards under given conditions.
While the sequential and random performance of the existing
SD interface may be good enough for most of today’s uses ofcards, new applications will undoubtedly require ever-higher
performance levels that can be achieved with SD Express using
its added higher performance PCIe and NVMe interfaces.

SD Express Cards with PCIe® and NVMeTM Interfaces

4

White Paper

www.sdcard.org | ©2018 SD Association. All rights reserved

SD Express with PCIe and NVMe Benefits Everyone
SD Express includes a UHS-I interface with the PCIe and NVMe interfaces. Use of PCIe Gen3 andNVMe v1.3 with SD was defined, for example initialization process, pin allocation etc., but thegeneral idea is utilization of the existing well-known and familiar protocols defined by PCI SIG and
NVMe Forum. By relying on successful protocols already in the marketplace, the SDA gives theindustry an advantage by leveraging existing test equipment and saving in development
processes. When companies use existing building blocks and existing designs, this translates tocost savings and an improved bottom line.
With existing support of major operating systems and popularity of drivers supporting PCIe andNVMe, the market adoption of SD Express should be easy.
Figure 1 shows the strength of SD Express by combining PCIe and NVMe with SD:

SD Express Cards with PCIe® and NVMeTM Interfaces

5

White Paper

www.sdcard.org | ©2018 SD Association. All rights reservedUnderstanding SD Express
SD Express is:• Same SD trusted full sized form factor was introduced,
first, with SD7.0• The full size SD Express card uses the same pins andconnectors as defined for existing SD UHS-II. See Figure 2.
• Features new PCIe and NVMe interfaces. The differential
interface of single lane PCIe Generation 3 is using thesame pads as of the SD UHS-II differential interface pads
found in the second row of pins. Next, PCIe REFCLK alongwith the side band signals CLKREQ# and PERRST# areshared with the existing SD UHS-I, leverage the first rowof pins.
• The first row is also the SD UHS-I interface, delivering fullbackward compatibility and interoperability with billions
of existing SD host devices.
• SD Express will not support UHS-II interface.
• SD7.0 specification defines a full size form factor using
two power supplies, a traditional 3.3 volt and 1.8 volt.
SD7.0 also allows an optional 1.2v supply, for future form
factors that requires additional pin #18. The future
optional 1.2 volt will allow additional power/performance
optimization.

Figure 3 shows the bit rate performance levels of SD Express:

Figure 3 - Bit rates for SD Express memory cards

The SD Express interface and initialization process is flexible,
allowing an SD Express compatible host to initialize the cardthrough either legacy SD interface, or PCIe interface. The
initialization through SD legacy is highly recommended, since itallows advanced notice about the card’s capabilities and saves
redundant re-iterations of non-supported card or protocol.
SD Express identified to SD Express PCIe and NVMe host as“Standard NVMe device” (Mass Storage controllergSolid State
ControllergNVM Express device). Therefore, standard NVMe
drivers may access the SD Express card.
Cards using SD Express may consume up to maximum of 1.80
Watts from the host, representing the accumulated wattage
from the two power supplies.

Figure 2 –SD Express full sized card pin layout

The following SD protocol features are supported partially by
the PCIe and NVMe interfaces, assuming use of NVMe version
1.3. In the future, NVMe may fully support these features:• Password Lock/Unlock: Card may be password
locked/unlocked only through the legacy SD interface.
Locked card does not allow access to the memory neither
through the SD nor through the PCIe and NVMe interface.
• Write Protect features: Card may be set to write protectedmode through legacy SD interfaces. A write-protectedcard does not allow any write operation to it neither
through its SD nor through the PCIe and NVMe interfaces.

SD Express Cards with PCIe® and NVMeTM Interfaces

6

White Paper

www.sdcard.org | ©2018 SD Association. All rights reserved

The following traditional SD features are not supported
through the PCIe interface:• SD CPRM Security: If SD Express host accesses cardthrough the PCIe interface that includes CPRM encrypted
files, it will read them as encrypted data, which is thesame result when inserting the card to any SD host that
does not support CPRM.
• Speed Classes: Speed Class, UHS Speed Class and Video
Speed Class are not supported or necessary through the
PCIe interface.

New Options for System Developers
PCIe and NVMe standards are highly capable protocols
enabling various features and choices for system implementer
to use. Here are a few examples of potential usage of PCIe and
NVMe. Note that the given capabilities are not related to SD
Express but to the nature of PCIe and NVMe capabilities.
Bus Mastering• Bus mastering (first-party DMA) is natively supported in
PCIe, see Figure 4.
• This feature allows inter chip communication between
devices.
• For example, a modem can send IO requests directly tothe storage without any help from the Application
Processor (AP):- AP can move to low power mode and save overall
battery life
- Better latency path from modem to storage device

Figure 4 – Bus mastering of PCIe

Multi Queue Support, Without Locking Mechanism• NVMe can have a dedicated command queue in DRAM
for every CPU core, see Figure 5.
• Other legacy embedded memory interfaces has one
command queue in the Host controller.
• Synchronization and locking are needed in legacy
protocols to mutual access the single queue.
• Legacy interface’s host controller is a system bottleneckin the architecture .

Figure 5 – Host controller synchronization lockvs Multi Queue support of NVMe

SD Express Cards with PCIe® and NVMeTM Interfaces

7

White Paper

www.sdcard.org | ©2018 SD Association. All rights reservedHost Memory Buffer (HMB)• High performance architecture usually requires extra
controller resources. For example, embedded SRAM
which is quite expensive compared to DRAM, see Figure 6• HMB and Bus Mastering native NVMe and PCIe features
are most useful in significantly improving storage
performance with limited overall cost penalty. This isaccomplished by using host DRAM resources as direct
extension of controller internal RAM.
• The allocated DRAM size is subject to host device policy• Important: In the future, as the SD Express becomes evenfaster, the use of the DRAM vs SD card’s memory may
become system flexible. Instead of using the host's
DRAM by the card saving card's SRAM, the SD Express
card may become an extension of the host's DRAM,
using the fast SD Express flash memory as host's
resource, saving DRAM.

Tips for Host Product Manufacturers
With use of the PCIe and NVMe interfaces, host productmanufacturers can now consider using existing SD interface
and PCIe and NVMe building blocks to utilize the new SD
Express host interface development.
The only challenge with this design is the switchingmechanism and/or pullups/pulldown IO controls of theshared signals – REFCLK, CLKREQ# and PERRST#. This IO
control circuit may be quite simple; however, it requires
thorough study and understanding of both interfaces ineach stage of the initialization process and normal
operation of each of the two modes.

Consumer Impact
Consumers will continue matching the card to their productfor best performance. Manufacturers will use SDA symbols
and logos on the product, its packaging and in the owner’s
manual). All SDHC, SDXC and SDUC memory cards with SD
Express will have SD UHS-I interface and symbols allowing
read and write operation on legacy SD interfaces. However, inorder to reach maximum performance using its PCIe andNVMe interfaces, the host must support SD Express. Therefore,
matching the SD Express host to and SD Express card isrequired to enjoy the best performance and the best user
experience.
In Figure 7, the SD Express marking is as follows:

Figure 6 – Host memory buffer description

Figure 7 - Various combinations of host and card marks

SD Express Cards with PCIe® and NVMeTM Interfaces

8

White Paper

www.sdcard.org | ©2018 SD Association. All rights reserved

Card types and expected maximum performance capabilities are outlined in Figure 8:

Figure 8 - Maximum Performance of SD Express host and card combinations

SD Express Cards with PCIe® and NVMeTM Interfaces

9White Paper

www.sdcard.org | ©2018 SD Association. All rights reserved

Summary
With SD memory cards used for higher capacity as well as speed intensive applications
and massive storage for devices of all types, there is a growing need for a big jump in
random and sequential performance levels as well as more modern protocols. The SD
Express feature introduced in SD7.0 includes the added PCIe and NVMe interfaces
enabling new opportunities for SD memory cards and opens a whole new world of uses
while keeping backward compatibility to billions of existing SD host. The SDA madeadoption easier thanks to allowing existing knowledge by using given building blocks
and available test equipment.

SD Express Cards with PCIe® and NVMeTM Interfaces

10

White Paper

www.sdcard.org | ©2018 SD Association. All rights reserved