EVALUATION KIT AVAILABLE

Thermochron iButton Device

DS1921G

General Description

Benefits and Features

The Thermochron® iButton® device (DS1921G) is a

• High Accuracy, Full-Featured Digital Temperaturerugged, self-sufficient system that measures temperatureand records the result in a protected memory section.
The recording is done at a user-defined rate, both as adirect storage of temperature values as well as in theform of a histogram. Up to 2048 temperature values
taken at equidistant intervals ranging from 1 to 255min
can be stored. The histogram provides 63 data bins witha resolution of 2.0°C. If the temperature leaves a userprogrammable range, the DS1921G also records when
this happened, for how long the temperature stayed outside the permitted range, and if the temperature was toohigh or too low. An additional 512 bytes of batterybacked SRAM allow storing information pertaining to theobject to which the DS1921G is associated. Data istransferred serially through the 1-Wire® protocol, which
requires only a single data lead and a ground return.
Every DS1921G is factory lasered with a guaranteed
unique, electrically readable, 64-bit registration numberthat allows for absolute traceability. The durable stainlesssteel package is highly resistant to environmental hazards such as dirt, moisture, and shock. Accessories permit the DS1921G to be mounted on almost any object
including containers, pallets, and bags.

Logger Simplifies Temperature Data Collection and
Dissemination of Electronic Temperature Record• Accuracy ±1°C from -30°C to +70°C (See theElectrical Characteristics for Accuracy Specification)• Digital Thermometer Measures Temperature in
0.5°C Increments• Built-In Real-Time Clock (RTC) and Timer Has
Accuracy of ±2 Minutes per Month from 0°C to +45°C• Automatically Wakes Up and Measures
Temperature at User-Programmable Intervals from
1 Minute to 255 Minutes• Logs Consecutive Temperature Measurements in
2kB of Datalog Memory• Records a Long-Term Temperature Histogram with
2.0°C Resolution• Programmable Temperature High and Temperature
Low Alarm Trip Points• Records Up to 24 Timestamps and Durations
When Temperature Leaves the Range Specified
by the Trip Points• Individually Calibrated in a NIST-Traceable Chamber• Complies to Standard EN12830• 512 Bytes of General-Purpose Battery-Backed SRAM
• Rugged Construction Survives Harsh Environments• Water Resistant Enclosure (IP56) or Waterproof if
Placed Inside DS9107 iButton Capsule (Exceeds
Water Resistant 3 ATM Requirements)• CE, FCC, and UL913 Certifications• Simple Serial Port Interfaces to Most Microcontrollers
for Rapid Data Transfer• Communicates to Host with a Single Digital Signal
Up to 15.4kbps at Standard Speed or Up to
125kbps in Overdrive Mode Using 1-Wire Protocol

Applications
Temperature Logging in Cold Chain, Food Safety,
Pharmaceutical, and Medical Products

Ordering InformationPART

TEMP RANGE

PIN-PACKAGE

DS1921G-F5#-40°C to +85°C

F5 CanDS1921G-F5N#-40°C to +85°C
F5 Can#Denotes a RoHS-compliant device that include lead(Pb) thatis exempt under the RoHS requirements.
A NIST traceability certificate is available for the DS1921G-F5N.
See Application Note 4629 for details.

Examples of Accessories
PART
DS9096P

ACCESSORY
Self-Stick Adhesive Pad

DS9101

Multipurpose Clip

DS9093RA

Mounting Lock Ring

DS9093A

Snap-In Fob

DS9092iButton Probe

Pin Configuration appears at end of data sheet.
Thermochron, iButton, and 1-Wire are registered trademarks of
Maxim Integrated Products, Inc.

19-5101; Rev 9; 3/15

Common iButton Device Features appear at end of data
sheet.

Thermochron iButton Device

DS1921G

Absolute Maximum Ratings
IO Voltage Range Relative to GND ..........................-0.5V to +6V
IO Sink Current....................................................................20mA

Operating Temperature Range ..........................-40°C to +85°C*
Storage Temperature Range..............................-40°C to +50°C**Storage or operation above +50°C significantly reduces battery life.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

Electrical Characteristics(VPUP = +2.8V to +5.25V, TA = -40°C to +85°C.)
PARAMETERSYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

2.2

k

IO PIN: GENERAL DATA
1-Wire Pullup Resistance

RPUP(Notes 1, 2)

Input Capacitance

CIO(Notes 3, 4)

Input Load CurrentIL

IO pin at VPUP (Note 5)

High-to-Low Switching Threshold(Notes 4, 6, 7, 8)

VTL

Input Low Voltage

VIL

Low-to-High Switching Threshold(Notes 4, 6, 7, 10)

VTH

Output Low Voltage at 4mA

VOL

Recovery Time (Notes 1, 4)

Time-Slot Duration (Notes 1, 12)tRECt SLOT

VPUP > 4.5V

100

pF

10

μA

1.14

2.70

0.71

2.70

(Notes 1, 6, 9)
VPUP > 4.5V

800

0.30
1.00

2.70

0.66

2.70

(Notes 6, 11)0.4Standard speed, RPUP = 2.2k

5Overdrive speed, RPUP = 2.2k

2Overdrive speed, directly prior to reset
pulse; RPUP = 2.2k

5Standard speed

65

Overdrive speed

8

V
V
V
V

μs

μs

IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE

Reset Low Time (Notes 1,12)tRSTL

Presence-Detect HighTime (Note 12)t PDH

Presence-Detect Low
Time (Note 12)t PDLPresence-Detect
Sample Time (Notes 1, 4)

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tMSP

Standard speed, VPUP > 4.5V

480

640

Standard speed

540

640

Overdrive speed, VPUP > 4.5V

48

80

Overdrive speed

58

80Standard speed

1560

Overdrive speed

1.1

6Standard speed

60

270

Overdrive speed, VPUP > 4.5V

7.5

24

Overdrive speed

7.5

32

Standard speed

6075

Overdrive speed

6

8.6

μs

μs

μs

μs

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Thermochron iButton Device

DS1921GElectrical Characteristics (continued)
PARAMETERSYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

IO PIN: 1-Wire WRITE
Write-Zero Low Time
(Notes 1, 12, 13)
Write-One Low Time
(Notes 1, 13)

tW0L

tW1L

Standard speed

60

120

Overdrive speed, VPUP > 4.5V

6

15

Overdrive speed

8.5

15

Standard speed

515

Overdrive speed

12Standard speed

515 - 

Overdrive speed

12-Standard speedtRL + 15

Overdrive speedtRL + 2

-5°C to +46°C

-48

+46

μs

μs

IO PIN: 1-Wire READ
Read Low Time (Notes 1, 14)tRL

Read Sample Time
(Notes 1, 14)

tMSR

μs
μs

REAL-TIME CLOCK
Frequency Deviation

F

ppm

TEMPERATURE CONVERTER
Tempcore Operating Range

TTC

-40

+85

°C

Conversion Time

tCONV

19

90

ms

Thermal Response Time
Constant

RESP

Conversion Error(Notes 16, 17)
Number of Conversions


NCONV

(Note 15)130s

-40°C to < -30°C

-1.3

+1.3

-30°C to +70°C

-1.0

+1.0

> +70°C to +85°C

-1.3

+1.3

(Notes 4, 18)(See the lifetime graphs.)°C—

System requirement.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery
times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For
more heavily loaded systems, an active pullup such as that found in the DS2480B may be required.
Note 3: Capacitance on IO could be 800pF when power is first applied. If a 2.2kΩ resistor is used to pull up the data line, 2.5µs
after VPUP has been applied, the parasite capacitor does not affect normal communication.
Note 4: These values are derived from simulation across process, voltage, and temperature and are not production tested.
Note 5: Input load is to ground.
Note 6: All voltages are referenced to ground.
Note 7: VTL and VTH are functions of the internal supply voltage, which is a function of VPUP and the 1-Wire recovery times. The
VTH and VTL maximum specifications are valid at VPUP = 5.25V. In any case, VTL < VTH < VPUP.
Note 8: Voltage below which, during a falling edge of IO, a logic 0 is detected.
Note 9: The voltage on IO must be less than or equal to VILMAX whenever the master drives the line low.
Note 10: Voltage above which, during a rising edge on IO, a logic 1 is detected.
Note 11: The I-V characteristic is linear for voltages less than 1V.
Note 12: Numbers in bold are not in compliance with the published iButton device standards. See the Comparison Table.
Note 13: ε in Figure 15 represents the time required for the pullup circuitry to pull the voltage on the IO pin up from VIL to VTH. The
actual maximum duration for the master to pull the line low is tW1LMAX + tF - ε and tW0LMAX + tF - ε, respectively.
Note 14: δ in Figure 15 represents the time required for the pullup circuitry to pull the voltage on the IO pin up from VIL to the input
high threshold of the bus master. The actual maximum duration for the master to pull the line low is tRLMAX + tF.
Note 15: This number was derived from a test conducted by Cemagref in Antony, France, in July 2000.
http://www.cemagref.fr/English/index.htm Test Report No. E42
Note 16: Total accuracy is Δϑ plus 0.25°C quantization due to the 0.5°C digital resolution of the device.
Note 1:
Note 2:www.maximintegrated.com

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Thermochron iButton Device

DS1921GElectrical Characteristics (continued)
Note 17: WARNING: Maxim data-logger products are 100% tested and calibrated at time of manufacture to ensure that they meet
all data sheet parameters, including temperature accuracy. As with any sensor-based product, user shall be responsible
for occasionally rechecking the temperature accuracy of the product to ensure it is still operating properly. Furthermore, aswith all products of this type, when deployed in the field and subjected to handling, harsh environments, or otherhazards/use conditions, there may be some extremely small but nonzero logger failure rate. In applications where the failure of any logger is a concern, user shall assure that redundant (or other primary) methods of testing and determining thehandling methods, quality, and fitness of the articles and products are implemented to further mitigate any risk.
Note 18: The number of temperature conversions (= samples) possible with the built-in energy source depends on the operating andstorage temperature of the device. When not in use for a mission, the RTC oscillator should be turned off and the device
should be stored at a temperature not exceeding +25°C. Under this condition the shelf life time is 10 years minimum.

Comparison Table
LEGACY VALUESPARAMETER

STANDARD SPEED (µs)

DS1921G VALUESOVERDRIVE SPEED (µs)

STANDARD SPEED (µs)

OVERDRIVE SPEED (µs)

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

t SLOT (including
tREC)

61

(undefined)

7(undefined)

65*(undefined)

8*(undefined)

tRSTL

480

(undefined)

48

80

540

640

58

80

t PDH

15

60

2

6

15

60

1.1

6

t PDL

60

240

8

24

60

270

7.5

32

tW0L

60

120

6

16

60

120

8.5

15

*Intentional change; longer recovery time between time slots.

Note: Numbers in bold are not in compliance with the published iButton device standards.

iButton Can Physical Specification
SIZE

See the Package Information section.

WEIGHT

Ca. 3.3g

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Thermochron iButton Device

DS1921G

RTC Deviation vs. Temperature
4
UPPER LIMIT

RTC DEVIATION (MINUTES/MONTH)

20
LOWER LIMIT

-2

-4

-6

-8

-10
-40

-30

-20

-10

0

10

20

30

40

50

60

70

80

TEMPERATURE (°C)

Minimum Product Lifetime vs. Temperature at Different Sample Rates
11.00
10.00
MINIMUM PRODUCT LIFETIME (YEARS)

9.00
8.00
7.00
6.00
5.00
4.00
EVERY MINUTENO SAMPLESEVERY 3 MINUTESOSCILLATOR OFF
EVERY 10 MINUTES

3.00
2.00
1.00
0.00
-40

-30

-20

-10

0

10

20

30

40

50

60

70

80

TEMPERATURE (°C)

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Thermochron iButton Device

DS1921G

Minimum Product Lifetime vs. Sample Rate at Different Temperatures
11.00
+15°C

10.00

-20°C
MINIMUM PRODUCT LIFETIME (YEARS)

9.00

-40°C

8.00

+40°C

7.00

+45°C

6.00
+50°C
5.00
+55°C

4.00

+60°C

3.00
2.00

+70°C

1.00
+85°C
0.00
1

10

100

1000

MINUTES BETWEEN SAMPLES

Accuracy Limits
2.0

1.5
UPPER LIMIT
1.0

ACCURACY (°C)

0.5

0

-0.5
LOWER LIMIT
-1.0

-1.5

-2.0
-40

-30

-20

-10

0

10

20

30

40

50

60

70

80

TEMPERATURE (°C)

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Thermochron iButton Device

DS1921G

Detailed Description
The DS1921G is an ideal device to monitor the temperature of any object it is attached to or shipped with,such as perishable goods or containers of temperaturesensitive chemicals. The general-purpose batterybacked SRAM can store an electronic copy of shipping
information, date of manufacture and other importantdata written as clear as well as encrypted files. Notethat the initial sealing level of the DS1921G achieves
IP56. Aging and use conditions can degrade theintegrity of the seal over time, therefore, for applications
with significant exposure to liquids, sprays, or othersimilar environments, it is recommended to place theThermochron in the DS9107 capsule. The DS9107 pro-

1-Wire PORTROM
FUNCTIONCONTROL

IO

vides a watertight enclosure that has been rated to IP68
(refer to Application Note 4126: Understanding the IP(Ingress Protection) Ratings of iButton Data Loggers
and Capsule).

Overview
Figure 1 shows the relationships between the major
control and memory sections of the DS1921G. The
device has seven main data components: 64-bit
lasered ROM; 256-bit scratchpad; 4096-bit generalpurpose SRAM; 256-bit register page of timekeeping,
control, and counter registers; 96 bytes of alarm timestamp and duration logging memory; 126 bytes ofhistogram memory; and 2048 bytes of data-log mem-

64-BITLASEREDROMMEMORYFUNCTIONCONTROL

PARASITE-POWEREDCIRCUITRY

256-BITSCRATCHPADDS1921G

GENERAL-PURPOSE
SRAM
32.768kHz
OSCILLATORINTERNALTIMEKEEPING,CONTROL REGISTERS,AND COUNTERSREGISTER PAGE

ALARM TIMESTAMP AND
DURATION LOGGINGMEMORYTEMPERATURE
CORE

HISTOGRAMMEMORYCONTROL
LOGIC

DATA-LOG MEMORY

3V LITHIUM

Figure 1. Block Diagram

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Maxim Integrated | 7

Thermochron iButton Device

DS1921G

ory. Except for the ROM and the scratchpad, all othermemory is arranged in a single linear address space.
All memory reserved for logging purposes, including
counter registers and several other registers, is readonly for the user. The timekeeping and control registers are write protected while the device isprogrammed for a mission.
The hierarchical structure of the 1-Wire protocol isshown in Figure 2. The bus master must first provide
one of the seven ROM function commands: Read ROM,
Match ROM, Search ROM, Conditional Search ROM,
Skip ROM, Overdrive-Skip ROM, or Overdrive-Match
ROM. Upon completion of an Overdrive ROM command byte executed at standard speed, the device
enters overdrive mode, where all subsequent communication occurs at a higher speed. The protocol required
for these ROM function commands is described in
Figure 13. After a ROM function command is successfully executed, the memory functions become accessible and the master can provide any one of the seven

1-Wire NET

BUS
MASTERavailable commands. The protocol for these memory
function commands is described in Figure 10. All data
is read and written least significant bit first.

Parasite Power
Figure 1 shows the parasite-powered circuitry. This circuitry “steals” power whenever the IO input is high. IO
provides sufficient power as long as the specified timing and voltage requirements are met. The advantagesof parasite power are two-fold: 1) By parasiting off this
input, battery power is not consumed for 1-Wire ROM
function commands, and 2) if the battery is exhausted
for any reason, the ROM may still be read normally. The
remaining circuitry of the DS1921G is solely operated
by battery energy. As a consequence, if the battery is
exhausted, all memory data is lost including the data of
the last mission, and no new mission can be started.
Refer to Application Note 5057: OneWireViewer Tips
and Tricks for how to check the battery status.

OTHER DEVICES

DS1921G
COMMAND LEVEL:AVAILABLE COMMANDS:

COMMAND CODES:

1-Wire ROM
FUNCTION COMMANDSREAD ROM
MATCH ROM
SEARCH ROM
SKIP ROMOVERDRIVE-SKIP ROM
OVERDRIVE-MATCH ROM
CONDITIONAL SEARCH ROM

33h
55h
F0h
CCh
3Ch
69h
ECh

64-BIT ROM
64-BIT ROM
64-BIT ROM
N/AOD-FLAG
64-BIT ROM, OD-FLAG
64-BIT ROM, CONDITIONAL SEARCHSETTINGS, DEVICE STATUS

WRITE SCRATCHPADREAD SCRATCHPADCOPY SCRATCHPADREAD MEMORYREAD MEMORY WTH CRC
CLEAR MEMORY

0Fh
AAh
55h
F0h
A5h
3Ch

CONVERT TEMPERATURE

44h

256-BIT SCRATCHPAD, FLAGS
256-BIT SCRATCHPAD
4096-BIT SRAM, REGISTERS, FLAGSALL MEMORY
ALL MEMORYMISSION TIMESTAMP, MISSION SAMPLES COUNTER,
START DELAY, SAMPLE RATE, ALARM TIMESTAMPSAND DURATIONS, HISTOGRAM MEMORYMEMORY ADDRESS 211h

DS1921G-SPECIFICMEMORY/CONTROLFUNCTION COMMANDSDATA FIELD AFFECTED:

Figure 2. Hierarchical Structure for 1-Wire Protocol

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Thermochron iButton Device

DS1921G

MSB

LSB
8-BIT
CRC CODE

MSB

8-BIT FAMILY CODE
(21h)

48-BIT SERIAL NUMBER
LSB MSB

LSB MSB

LSB

Figure 3. 64-Bit Lasered ROM

POLYNOMIAL = X8 + X5 + X4 + 1

1ST
STAGE
X0

2ND
STAGE
X1

3RD
STAGE
X2

4TH
STAGE
X3

5TH
STAGE
X4

6TH
STAGE
X5

7TH
STAGE
X6

8TH
STAGE
X7

X8

INPUT DATA

Figure 4. 1-Wire CRC Generator

64-Bit Lasered ROM

MemoryEach DS1921G contains a unique ROM code that is 64
bits long. The first 8 bits are a 1-Wire family code. The
next 48 bits are a unique serial number. The last 8 bits
are a cyclic redundancy check (CRC) of the first 56 bits
(see Figure 3 for details). The 1-Wire CRC is generatedusing a polynomial generator consisting of a shift register and XOR gates as shown in Figure 4. The polynomial is X8 + X5 + X4 + 1. Additional information about the
1-Wire CRC is available in Application Note 27:
Understanding and Using Cyclic Redundancy Checks
with Maxim iButton Products.
The Shift register bits are initialized to 0. Then, startingwith the least significant bit of the family code, one bit ata time is shifted in. After the 8th bit of the family code
has been entered, the serial number is then entered.
After the 48th bit of the serial number has been entered,
the Shift register contains the CRC value. Shifting in the
8 bits of CRC returns the Shift register to all zeros.

Figure 5 shows the DS1921G memory map. The 4096-bit
general-purpose SRAM makes up pages 0 to 15. The
timekeeping, control, and counter registers fill page 16,
called register page (see Figure 6). Pages 17, 18, and19 are assigned to storing the alarm timestamps anddurations. The temperature histogram bins begin at page
64 and use up to four pages. The data-log memory covers pages 128 to 191. Memory pages 20 to 63, 68 to
127, and 192 to 255 are reserved for future extensions.
The scratchpad is an additional page that acts as abuffer when writing to the SRAM or the register page.
The memory pages 17 and higher are read only for theuser. They are written to or erased solely under thesupervision of the on-chip control logic.

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Thermochron iButton Device

DS1921G

32-BYTE INTERMEDIATE STORAGE SCRATCHPADADDRESS
0000h to 01FFh

GENERAL-PURPOSE SRAM (16 PAGES)PAGES 0 to 15

0200h to 021Fh

32-BYTE REGISTER PAGE

PAGE 160220h to 027Fh

ALARM TIMESTAMPS AND DURATIONSPAGES 17 to 19

0280h to 07FFh(RESERVED FOR FUTURE EXTENSIONS)PAGES 20 to 63

0800h to 087Fh

TEMPERATURE HISTOGRAM MEMORYPAGES 64 to 67

0880h to 0FFFh(RESERVED FOR FUTURE EXTENSIONS)PAGES 68 to 127

1000h to 17FFh

DATA-LOG MEMORY (64 PAGES)PAGES128 to 191

1800h to 1FFFh(RESERVED FOR FUTURE EXTENSIONS)PAGES 192 to 255

Figure 5. Memory Map

ADDRESS

BIT 7

0200h

0

10 Seconds

Single Seconds

0201h

0

10 Minutes

Single Minutes

0202h

0

12/24

20 Hour
AM/PM

10 Hour

0203h

0

0

0

0

0204h

0

0

0205h

BIT 6

CENT

BIT 5

BIT 3

BIT 2

0

BIT 0

Day of Week

FUNCTIONACCESS*

RTC
Registers

R/W

R/W**

RTC Alarm
Registers

R/W

R/W**

Single Date

10
Months0

BIT 1

Single Hours

10 Date

0

0206h

BIT 4

Single Months

10 Years

Single Years

0207h

MS

10 Seconds Alarm

Single Seconds Alarm

0208h

MM

10 Minutes Alarm

Single Minutes Alarm

0209h

MH

12/24

20 Hour
AM/PM
Alarm

10 Hour
Alarm

Single Hours Alarm

020Ah

MD

0

0

0

0

Day of Week Alarm

020Bh

Temperature Low Alarm Threshold

020Ch

Temperature High Alarm Threshold

Temperature
Alarms

R/W

R/W**

020Dh

Number of Minutes Between Temperature Conversions

Sample Rate

R/W

R**

Control

R/W

R/W**

—

R

R**

020Eh

EOSC

EMCLR

020Fh

0

EM

RO

(No function, reads 00h)

TLS

THS

TAS

*The left entry in the ACCESS column is valid between missions. The right entry shows the applicable access mode while a
mission is in progress.
**While a mission is in progress, these addresses can be read. The first attempt to write to these registers (even read-onlyones), however, ends the mission and overwrites selected writable registers.

Figure 6. Register Pages Map

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Thermochron iButton Device

DS1921G

ADDRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

FUNCTIONACCESS*

0210h(No function, reads 00h)

—

R

R**

0211h

Temperature Read-Out (Forced Conversion)

Temperature

R

R**

0212h

Low Byte

0213hHigh Byte

Mission Start
Delay

R/W

R/W**

Status

R/W

R/W

MissionTimestamp

R

R

MissionSamples
CounterR

R

DeviceSamples
Counter

R

R

0214h

TCB

MEMCLR

MIP

SIP

0

0215h

Minutes

0216h

Hours

0217h

Date

0218h

Month

0219h

Year

021Ah

Low Byte

021Bh

Center Byte

021Ch

High Byte

021Dh

Low Byte

021Eh

Center Byte

021Fh

High Byte

TLF

THF

TAF

*The left entry in the ACCESS column is valid between missions. The right entry shows the applicable access mode while a
mission is in progress.
**While a mission is in progress, these addresses can be read. The first attempt to write to these registers (even read-onlyones), however, ends the mission and overwrites selected writable registers.

Figure 6. Register Pages Map (continued)

Detailed Register Descriptions
Timekeeping
The RTC/alarm and calendar information is accessedby reading/writing the appropriate bytes in the register
page, address 0200h to 0206h. Note that some bits are
set to 0. These bits always read 0 regardless of how
they are written. The contents of the time, calendar, andalarm registers are in the binary-coded decimal (BCD)
format.

RTC/Calendar
The RTC of the DS1921G can run in either 12hr or 24hr
mode. Bit 6 of the Hours register (address 0202h) is
defined as the 12hr or 24hr mode select bit. When high,the 12hr mode is selected. In the 12hr mode, bit 5 is the
AM/PM bit with logic 1 being PM. In the 24hr mode, bit
5 is the 20hr bit (20hr to 23hr).

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To distinguish between the days of the week, theDS1921G includes a counter with a range from 1 to 7.
The assignment of a counter value to the day of week isarbitrary. Typically, the number 1 is assigned to a
Sunday (U.S. standard) or to a Monday (European standard).
The calendar logic is designed to automatically compensate for leap years. For every year value that iseither 00 or a multiple of four, the device adds a 29th ofFebruary. This works correctly up to (but not including)the year 2100.
The DS1921G is Y2K compliant. Bit 7 (CENT) of theMonths register at address 0205h serves as a century
flag. When the Year register rolls over from 99 to 00, thecentury flag toggles. It is recommended to write thecentury bit to a 1 when setting the RTC to a time/date
between the years 2000 and 2099.

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Thermochron iButton Device

DS1921G

RTC and RTC Alarm Registers Map
ADDRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

0200h

0

10 Seconds

Single Seconds

0201h

0

10 Minutes

Single Minutes

0202h

0

12/24

20 Hour
AM/PM

10 Hour

0203h

0

0

0

0

0204h

0

0

0205h

CENT

0

0206h

Single Hours
0

10 Date0

BIT 0Day of Week
Single Date

10 Months

Single Months

10 Years

Single Years

0207h

MS

10 Seconds Alarm

Single Seconds Alarm

0208h

MM

10 Minutes Alarm

Single Minutes Alarm

0209h

MH

12/24

20 Hour
AM/PM
Alarm

10 Hour
Alarm

020Ah

MD

0

0

0

Single Hours Alarm0

Day of Week Alarm

RTC Alarm Control
ALARM REGISTER MASK BITS
(BIT 7 OF 0207h TO 20Ah)
MS

MM

MH

FUNCTION
MD

1

1

1

1

Alarm once per second.

0

1

1

1

Alarm when seconds match (once per minute).

0

0

1

1

Alarm when minutes and seconds match (once every hour).

0

0

0

1

Alarm when hours, minutes, and seconds match (once every day).

0

0

0

0

Alarm when day, hours, minutes, and seconds match (once every week).

RTC Alarms
The DS1921G also contains an RTC alarm function. The
RTC Alarm registers are located in registers 0207h to
020Ah. The most significant bit of each of the alarm
registers is a mask bit. When all the mask bits are logic
0, an alarm occurs once per week when the values
stored in timekeeping registers 0200h to 0203h match

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the values stored in the RTC Alarm registers. Any alarm
sets the timer alarm flag (TAF) in the device’s Status
register (address 214h). The bus master can set the
search conditions in the Control register (address20Eh) to identify devices with timer alarms by means of
the conditional search function (see the ROM Function
Commands section).

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Thermochron iButton Device

DS1921G

Temperature Alarm Register Map
ADDRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

020Bh

Temperature Low Alarm Threshold

020Ch

Temperature High Alarm Threshold

BIT 2

BIT 1

BIT 0

Sample Rate Register Map
ADDRRESS

BIT 7

BIT 6

BIT 5

020Dh

BIT 3

BIT 2

BIT 1

BIT 0

Sample Rate

Temperature Conversion
The DS1921G measures temperatures with a resolutionof 0.5°C. Temperature values are represented in a single byte as an unsigned binary number, which translates into a theoretical range of 128°C. The range,
however, has been limited to values from 0000 0000(00h) through 1111 1010 (FAh). The codes 01h to F9h
are considered valid temperature readings.
If a temperature conversion yields a temperature that isout of range, it is recorded as 00h (if too low) or FAh (iftoo high). Since out-of-range results are accumulated inhistogram bins 0 and 62 (see the Temperature Logging
and Histogram section), the data in these bins is of limited value. For this reason the specified temperature
range of the DS1921G is considered to begin at code
04h and end at code F7h, which corresponds to histogram bins 1 to 61.
With T[7…0] representing the decimal equivalent of a temperature reading, the temperature value is calculated as
ϑ(°C) = T[7…0]/2 - 40.0
This equation is valid for converting temperature readings stored in the data-log memory as well as for dataread from the Forced Temperature Conversion Readout
register (address 0211h).

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BIT 4

To specify the temperature alarm thresholds, this equation needs to be resolved toT[7…0] = 2 x ϑ(°C) + 80.0
A value of 23°C, for example, thus translates into 126
decimal or 7Eh. This corresponds to the binary patterns
0111 1110, which could be written to a Temperature
Alarm register (address 020Bh and 020Ch, respectively).

Sample Rate
The content of the Sample Rate register (address
020Dh) determines how many minutes the temperature
conversions are apart from each other during a mission.
The sample rate can be any value from 1 to 255, coded
as an unsigned 8-bit binary number. If the memory has
been cleared (Status register bit MEMCLR = 1) and a
mission is enabled (Control register bit EM = 0), writinga nonzero value to the Sample Rate register starts a mission. For a full description of the correct sequence ofsteps to start a temperature-logging mission, see theMissioning or Mission Example: Prepare and Start a
New Mission sections.

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Thermochron iButton Device

DS1921G

Control Register Map
ADDRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

020Eh

EOSC

EMCLR

0

EM

RO

TLS

THS

TAS

Control Register
The DS1921G is set up for its operation by writing
appropriate data to its special function registers thatare located in the register page. Several functions thatare controlled by a single bit only are combined into asingle byte called the Control register (address 020Eh).
This register can be read and written. If the device isprogrammed for a mission, writing to the Control register ends the mission and changes the register contents.
The functional assignments of the individual bits are
explained below. Bit 5 has no function. It always reads
0 and cannot be written to 1.
Bit 7: Enable Oscillator (EOSC). This bit controls the
crystal oscillator of the RTC. When set to logic 0, theoscillator starts operation. When written to logic 1, theoscillator stops and the device is in a low-power dataretention mode. This bit must be 0 for normal operation. The RTC must have advanced at least 1 second
before a Mission Start is accepted.
Bit 6: Memory Clear Enable (EMCLR). This bit needs
to be set to logic 1 to enable the Clear Memory function, which is invoked as a memory function command.
The timestamp, histogram memory as well as theMission Timestamp, Mission Samples Counter, Mission
Start Delay, and Sample Rate are cleared only if the
Clear Memory command is issued with the next
access to the device. The EMCLR bit returns to 0 as
the next memory function command is executed.
Bit 4: Enable Mission (EM). This bit controls whether
the DS1921G begins a mission as soon as the sample
rate is written. To enable the device for a mission, thisbit must be 0.
Bit 3: Rollover Enable/Disable (RO). This bit controls
whether the data-log memory is overwritten with newdata or whether data logging is stopped once the memory is filled with data during a mission. Setting this bit toa 1 enables the rollover and data logging continues atthe beginning, overwriting previously collected data.
Clearing this bit to 0 disables the rollover and no further

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temperature values are stored in the data-log memory
once it is filled with data. This does not stop the mission. The device continues measuring temperaturesand updating the histogram and alarm timestamps anddurations.
Bit 2: Temperature Low Alarm Search (TLS). If this
bit is 1, the device responds to a Conditional Search
ROM command if, during a mission, the temperature
has reached or is lower than the Low TemperatureThreshold stored at address 020Bh.
Bit 1: Temperature High Alarm Search (THS). If this
bit is 1, the device responds to a Conditional Search
ROM command if, during a mission, the temperature
has reached or is higher than the High TemperatureThreshold stored at address 020Ch.
Bit 0: Timer Alarm Search (TAS). If this bit is 1, thedevice responds to a Conditional Search ROM command if, during a mission, a timer alarm has occurred.
Since a timer alarm cannot be disabled, the TAF flag
usually reads 1 during a mission. Therefore, it is advisable to set the TAS bit to a 0, in most cases.

Mission Start Delay Counter
The content of the Mission Start Delay Counter register
determines how many minutes the device waits before
starting the logging process. The Mission Start Delayvalue is stored as an unsigned 16-bit integer number ataddresses 0212h (low byte) and 0213h (high byte). The
maximum delay is 65,535 minutes, equivalent to 45
days, 12 hours, and 15 minutes.
For a typical mission, the Mission Start Delay is 0. If a
mission is too long for a single DS1921G to store alltemperature readings at the selected sample rate, one
can use several devices, staggering the Mission Start
Delay to record the full period. In this case, the rollover
enable (RO) bit in the Control register (address 020Eh)must be set to 0 to prevent overwriting of the recorded
temperature log after the data-log memory is full. See
the Mission Start and Logging Process section and
Figure 11 for details.

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Thermochron iButton Device

DS1921G

Status Register Map
ADDRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

0214h

TCB

MEMCLR

MIP

SIP

0

TLF

THF

TAF

Status Register
The Status register holds device status information
and alarm flags. The register is located at address
0214h. Writing to this register does not necessarily
end a mission.
The functional assignments of the individual bits are
explained below. The bits MIP, TLF, THF, and TAF canonly be written to 0. All other bits are read-only. Bit 3
has no function.
Bit 7: Temperature Core Busy (TCB). If this bit reads
0, the DS1921G is currently performing a temperature
conversion. This temperature conversion is either selfinitiated because of a mission being in progress or initiated by a command when a mission is not in progress.
The TCB bit goes low just before a conversion starts
and returns to high just after the result is latched into
the Read-Out register at address 0211h.
Bit 6: Memory Cleared (MEMCLR). If this bit reads 1,
the memory pages 17 and higher (alarm timestamps/
durations, temperature histogram, excluding data-log
memory), as well as the Mission Timestamp, Mission
Samples Counter, Mission Start Delay, and Sample
Rate have been cleared to 0 from executing a Clear
Memory function command. The MEMCLR bit returns to
0 as soon as writing a nonzero value to the Sample
Rate register starts a new mission, provided that the EM
bit is also 0. The memory has to be cleared in order
for a mission to start.
Bit 5: Mission in Progress (MIP). If this bit reads 1, theDS1921G has been set up for a mission and this mission is still in progress. A mission is started if the EM bitof the Control register (address 20Eh) is 0 and a nonzero value is written to the Sample Rate register, address
20Dh. The MIP bit returns from logic 1 to logic 0 when amission is ended. A mission ends with the first write
attempt (Copy Scratchpad command) to any register in

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the address range of 200h to 213h. Alternatively, a mission can be ended by directly writing to the Status register and setting the MIP bit to 0. The MIP bit cannot be
set to 1 by writing to the Status register.
BIT 4: Sample in Progress (SIP). If this bit reads 1, theDS1921G is currently performing a temperature conversion as part of a mission in progress. The mission samples occur on the seconds rollover from 59 to 00. The
SIP bit changes from 0 to 1 approximately 250ms
before the actual temperature conversion begins allowing the circuitry of the chip to wake up. A temperature
conversion including a wake-up phase takes maximum
875ms. During this time, read accesses to the memory
pages 17 and higher are permissible but can reveal
invalid data.
Bit 2: Temperature Low Flag (TLF). Logic 1 in thetemperature low flag bit indicates that a temperature
measurement during a mission revealed a temperatureequal to or lower than the value in the Temperature Low
Threshold register. The temperature low flag can becleared at any time by writing this bit to 0. This flag
must be cleared before starting a new mission.
Bit 1: Temperature High Flag (THF). Logic 1 in thetemperature high flag bit indicates that a temperature
measurement during a mission revealed a temperatureequal to or higher than the value in the Temperature
High Threshold register. The temperature high flag can
be cleared at any time by writing this bit to 0. This flag
must be cleared before starting a new mission.
Bit 0: Timer Alarm Flag (TAF). If this bit reads 1, a
RTC alarm has occurred (see the Timekeeping section
for details). The timer alarm flag can be cleared at any
time by writing this bit to logic 0. Since the timer alarmcannot be disabled, the TAF flag usually reads 1 during
a mission. This flag should be cleared before starting a
new mission.

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Thermochron iButton Device

DS1921G

Mission Timestamp Register Map
ADDRESS

BIT 7

0215h

0

10 Minutes0

20 Hour
AM/PM

0216h

BIT 6

12/24

0217h

0

0

0218h

0

0

0219h

BIT 5

BIT 4

BIT 3

BIT 1

BIT 0

Single Minutes
10 Hour

Single Hours

10 Date0

BIT 2Single Date

10 Months

Single Months

10 Years

Single Years

Mission Samples Counter Register Map
ADDRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

021Ah

Low Byte

021Bh

Center Byte

021Ch

High Byte

BIT 2

BIT 1

BIT 0

Device Samples Counter Register Map
ADDRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

021Dh

Low Byte

021Eh

Center Byte

021Fh

High Byte

BIT 2

BIT 1

BIT 0

Mission Timestamp

Temperature Logging and Histogram

The Mission Timestamp register indicates the time anddate of the first temperature conversion of a mission.
Subsequent temperature conversions take place as
many minutes apart from each other as specified by thevalue in the Sample Rate register. Mission samples
occur on minute boundaries.

Once set up for a mission, the DS1921G logs the temperature measurements simultaneously byte after byte
in the data-log memory as well as in histogram form in
the histogram memory. The data-log memory is able tostore 2,048 temperature values measured at equidistant time points. The first temperature value of a mission
is written to address location 1000h of the data-log
memory, the second value to address location 1001h
and so on. Knowing the starting time point (Mission
Timestamp register), the interval between temperature
measurements, the Mission Samples Counter register,and the rollover setting, one can reconstruct the timeand date of each measurement stored in the data log.
There are two alternatives to the way the DS1921G
behaves after the 2048 bytes of data-log memory isfilled with data. With rollover disabled (RO = 0), thedevice fills the data-log memory with the first 2048 mission samples. Additional mission samples are notlogged in the data-log, but the histogram and temperature alarm RAM continue to update. With rollover
enabled (RO = 1), the data log wraps around and overwrites previous data starting at 1000h for the every
2049th mission sample. In this mode, the device storesthe last 2048 mission samples.

Mission Samples Counter
The Mission Samples Counter register indicates how
many temperature measurements have taken place
during the current mission in progress (if MIP = 1) or
during the latest mission (if MIP = 0). The value isstored as an unsigned 24-bit integer number. Thiscounter is reset through the Clear Memory command.

Device Samples Counter
The Device Samples Counter register indicates how
many temperature measurements have taken placesince the device was assembled at the factory. The
value is stored as an unsigned, 24-bit integer number.
The maximum number that can be represented in thisformat is 16,777,215, which is higher than the expected
lifetime of the DS1921G. This counter cannot be reset
under software control.

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Maxim Integrated | 16

Thermochron iButton Device

DS1921GTEMPERATURE READINGTEMPERATURE
EQUIVALENT IN °C

00h
01h

HISTOGRAM BIN NUMBERHISTOGRAM BIN ADDRESS-40.0 or lower

0800h to 801h

-39.5

0

800h to 801h

02h

-39.0

0

800h to 801h

03h

-38.5

0

800h to 801h

04h

-38.0

1

802h to 803h

05h

-37.5

1

802h to 803h

06h

-37.0

1

802h to 803h

07h

-36.5

1

802h to 803h

08h

-36.0

2

804h to 805h

…

…

…

…

F3h

+81.5

60

878h to 879h

F4h

+82.0

61

87Ah to 87Bh

F5h

+82.5

61

87Ah to 87Bh

F6h

+83.0

61

87Ah to 87Bh

F7h

+83.5

61

87Ah to 87Bh

F8h

+84.0

62

87Ch to 87Dh

F9h

+84.5

62

87Ch to 87Dh

FAh+85.0 or higher

62

87Ch to 87Dh

Figure 7. Histogram Bin and Temperature Cross-Reference

For the temperature histogram, the DS1921G provides
63 bins that begin at memory address 0800h. Each bin
consists of a 16-bit, nonrolling-over binary counter thatis incremented each time a temperature value acquired
during a mission falls into the range of the bin. The leastsignificant byte of each bin is stored at the lower
address. Bin 0 begins at memory address 0800h, bin 1
at 0802h, and so on up to 087Ch for bin 62, as shownin Figure 7. The number of the bin to be updated after atemperature conversion is determined by cutting off thetwo least significant bits of the binary temperature
value. Out-of-range values are range locked and counted as 00h or FAh.
Since each data bin is 2 bytes, it can increment up to65,535 times. Additional measurements for a bin thathas already reached its maximum value are not counted; the bin counter remains at its maximum value. With
the fastest sample rate of one sample every minute, a2-byte bin is sufficient for up to 45 days if all temperature readings fall into the same bin.

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Temperature Alarm Logging
For some applications it is essential to not only record
temperature over time and the temperature histogram,but also record when exactly the temperature exceeded a predefined tolerance band and for how long thetemperature stayed outside the desirable range. The
DS1921G can log high and low durations. The tolerance band is specified by means of the Temperature
Alarm Threshold registers, addresses 20Bh and 20Chin the register page. One can set a high temperatureand low temperature threshold. See the Temperature
Conversion section for the data format the temperature
has to be written in. As long as the temperature values
stay within the tolerance band (i.e., are higher than the
low threshold and lower than the high threshold), theDS1921G does not record any temperature alarm. If thetemperature during a mission reaches or exceeds
either threshold, the DS1921G generates an alarm andsets either the temperature high flag (THF) or the temperature low flag (TLF) in the Status register (address

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Thermochron iButton Device

DS1921G

ADDRESSDESCRIPTION

0220h

Mission Samples Counter, Low Byte

0221hMission Samples Counter, Center Byte

0222hMission Samples Counter, High Byte

ALARM EVENT

Low Alarm 1

0223h

Alarm Duration Counter0224h to 0227h

Alarm Timestamp and Duration

Low Alarm 20228h to 024Fh

Alarm Timestamp and Durations

Low Alarms 3 to 120250hMission Samples Counter, Low Byte

0251hMission Samples Counter, Center Byte

0252hMission Samples Counter, High Byte

0253h

Alarm Duration Counter

High Alarm 10254h to 0257h

Alarm Timestamp and Duration

High Alarm 20258h to 027Fh

Alarm Timestamp and Durations

High Alarms 3 to 12

Figure 8. Alarm Timestamps and Durations Address Map214h). This way, if the search conditions (address20Eh) are set accordingly, the master can quickly identify devices with temperature alarms by means of theconditional search function (see the ROM Function
Commands section). The device also generates a timestamp of when the alarm occurred and begins recording the duration of the alarming temperature.
Timestamps and durations where the temperature
leaves the tolerance band are stored in the address
range 0220h to 027Fh, as shown in Figure 8. This allocation allows recording 24 individual alarm events andperiods (12 periods for too hot and 12 for too cold). The
date and time of each of these periods can be determined from the Mission Timestamp register and thetime distance between each temperature reading.
The alarm timestamp is a copy of the Mission Samples
Counter register when the alarm first occurred. The
least significant byte is stored at the lower address.
One address higher than the timestamp, the DS1921G
maintains a 1-byte duration counter that stores thenumber of samples the temperature was found to be
beyond the threshold. If this counter has reached its
limit after 255 consecutive temperature readings andthe temperature has not yet returned to within the tolerance band, the device issues another timestamp at thenext higher alarm location and opens another counterto record the duration. If the temperature returns tonormal before the counter has reached its limit, thewww.maximintegrated.com

duration counter of the particular timestamp does notincrement any further. Should the temperature again
cross this threshold, it is recorded at the next available
alarm location. This algorithm is implemented for the
low temperature thresholds as well as for the high temperature threshold.

Missioning
The typical task of the DS1921G is recording the temperature of a temperature-sensitive object. Before thedevice can perform this function, it needs to be configured. This procedure is called missioning.
First, the DS1921G must have its RTC set to a valid timeand date. This reference time can be UTC (also called
GMT, Greenwich Mean Time) or any other time standard that was chosen for the application. The clock
must be running (EOSC = 0) for at least one second.
Setting an RTC alarm is optional. The memory assigned
to store the alarm timestamps and durations, temperature histogram, Mission Timestamp, Mission Samples
Counter, Mission Start Delay, and Sample Rate must be
cleared using the Clear Memory command. In casethere were temperature alarms in the previous mission,
the TLF and THF flags need to be cleared manually. To
enable the device for a mission, the EM flag must be
set to 0. These are general settings that have to bemade regardless of the type of object to be monitored
and the duration of the mission.

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DS1921G

Next, the low temperature and high temperature thresholds that specify the temperature tolerance band must
be defined. The Temperature Conversion section
describes how to convert a temperature value into thebinary code to be written to the threshold registers.
The state of the search condition bits in the Control
register does not affect the mission. If multiple devices
are connected to form a 1-Wire net, the setting of thesearch condition enables these devices to participate
in the conditional search if certain events, such as
timer or temperature alarms, have occurred. Details
on the search conditions are found in the ROM
Function Commands section and in the Control register description.
The setting of the rollover-enable bit (RO) and sample
rate depends on the duration of the mission and themonitoring requirements. If the most recent temperature
history is important, the rollover should be enabled(RO = 1). Otherwise, one should estimate the durationof the mission in minutes and divide the number by
2048 to calculate the value of the sample rate (numberof minutes between temperature conversions). For
example, if the estimated duration of a mission is 10
days (14,400min), then the 2048-byte capacity of thedata-log memory would be sufficient to store a newvalue every 7min. If the DS1921G’s data-log memory is
not large enough to store all temperature readings, one
can use several devices and set the Mission Start Delayto values that make the second device start recording
as soon as the memory of the first device is full and soon. The RO bit needs to be set to 0 to disable rolloverthat would otherwise overwrite the recorded temperature log.
After the RO bit and the Mission Start Delay are set, theSample Rate register is the last element of data that is
written. The sample rate can be any value from 1 to255, coded as an unsigned 8-bit binary number. As
soon as the sample rate is written, the DS1921G sets
the MIP flag and clears the MEMCLR flag. After as
many minutes as specified by the Mission Start Delay
are over, the device waits for the next minute boundary,then wakes up, copies the current time and date to theMission Timestamp register, and makes the first temperature conversion of the mission. This increments
both the Mission Samples Counter and Device Samples
Counter. All subsequent temperature measurements
are taken on minute boundaries specified by the value
in the Sample Rate register. One can read the memoryof the DS1921G to watch the mission as it progresses.
Care should be taken to avoid memory access conflicts. See the Memory Access Conflicts section for
details.

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Thermochron iButton Device

Address Registers andTransfer Status
Because of the serial data transfer, the DS1921G
employs three address registers, called TA1, TA2, andE/S (Figure 9). Registers TA1 and TA2 must be loadedwith the target address to which the data is written orfrom which data is sent to the master upon a read command. Register E/S acts like a byte counter and transfer
status register. It is used to verify data integrity withwrite commands. Therefore, the master has only readaccess to this register. The lower 5 bits of the E/S register indicate the address of the last byte that has been
written to the scratchpad. This address is called Ending
Offset. Bit 5 of the E/S register, called PF or partial byte
flag, is set if the number of data bits sent by the masteris not an integer multiple of 8. Bit 6 is always a 0. Notethat the lowest 5 bits of the target address also determine the address within the scratchpad where intermediate storage of data begins. This address is calledbyte offset. If the target address for a write command is
13Ch, for example, then the scratchpad stores incoming data beginning at the byte offset 1Ch and is fullafter only 4 bytes. The corresponding ending offset inthis example is 1Fh. For the best economy of speed
and efficiency, the target address for writing should
point to the beginning of a new page, i.e., the byte offset is 0. Thus, the full 32-byte capacity of the scratchpad is available, resulting also in the ending offset of
1Fh. However, it is possible to write one or several contiguous bytes somewhere within a page. The ending
offset together with the partial and overflow flag are ameans to support the master checking the data integrity after a write command. The highest valued bit of the
E/S register, called authorization accepted (AA), indicates that a valid copy command for the scratchpad
has been received and executed. Writing data to thescratchpad clears this flag.

Writing with Verification
To write data to the DS1921G, the scratchpad must be
used as intermediate storage. First, the master issues
the Write Scratchpad command to specify the desired
target address, followed by the data to be written to thescratchpad. In the next step, the master sends theRead Scratchpad command to read the scratchpad
and to verify data integrity. As preamble to the scratchpad data, the DS1921G sends the requested target
address TA1 and TA2 and the contents of the E/S register. If the PF flag is set, data did not arrive correctly inthe scratchpad. The master does not need to continue
reading; it can start a new trial to write data to thescratchpad. Similarly, a set AA flag indicates that the

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Thermochron iButton Device

DS1921G

BIT NUMBER

7

6

5

4

3

2

1

0

TARGET ADDRESS (TA1)

T7

T6

T5

T4

T3

T2

T1

T0

TARGET ADDRESS (TA2)

T15

T14

T13

T12

T11

T10

T9

T8

ENDING ADDRESS WITHDATA STATUS (E/S)(READ-ONLY)

AA

0

PF

E4

E3

E2

E1

E0

Figure 9. Address Registers

write command was not recognized by the device. If
everything went correctly, both flags are cleared andthe ending offset indicates the address of the last byte
written to the scratchpad. Now the master can continue
verifying every data bit. After the master has verified thedata, it has to send the Copy Scratchpad command.
This command must be followed exactly by the data ofthe three address registers TA1, TA2, and E/S as themaster has read them verifying the scratchpad. As
soon as the DS1921G has received these bytes, itcopies the data to the requested location beginning at
the target address.

Memory/Control Function
Commands
The Memory/Control Function Flowchart (Figure 10)
describes the protocols necessary for accessing thememory and the special function registers of theDS1921G. An example on how to use these and otherfunctions to set up the DS1921G for a mission is included in the Mission Example: Prepare and Start a New
Mission section. The communication between masterand DS1921G takes place either at standard speed(default, OD = 0) or at overdrive speed (OD = 1). If not
explicitly set into the overdrive mode, the DS1921G
assumes standard speed. Internal memory access during a mission has priority over external access throughthe 1-Wire interface. This affects the read memory commands described below. See the Memory Access
Conflicts section for details.

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Write Scratchpad [0Fh]After issuing the Write Scratchpad command, the master must first provide the 2-byte target address, followed by the data to be written to the scratchpad. The
data is written to the scratchpad starting at the byte offset T[4:0]. The ending offset E[4:0] is the byte offset atwhich the master stops writing data. Only full databytes are accepted. If the last data byte is incomplete,
its content is ignored and the partial byte flag (PF) is
set.
When executing the Write Scratchpad command, theCRC generator inside the DS1921G (see Figure 16) calculates a CRC of the entire data stream, starting at thecommand code and ending at the last data byte sentby the master. This CRC is generated using the CRC16 polynomial by first clearing the CRC generator andthen shifting in the command code (0Fh) of the Write
Scratchpad command, the target addresses TA1 andTA2 as supplied by the master, and all the data bytes.
The master can end the Write Scratchpad command at
any time. However, if the ending offset is 11111b, themaster can send 16 read time slots and receive an
inverted CRC-16 generated by the DS1921G.
Note: The range 200h to 213h of the register page is
protected during a mission. See Figure 6 for theaccess type of the individual registers between andduring missions.

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Thermochron iButton Device

DS1921G

Read Scratchpad [AAh]This command is used to verify scratchpad data andtarget addresses. After issuing the Read Scratchpad
command, the master begins reading. The first 2 bytes
are the target address. The next byte is the ending offset/data status byte (E/S) followed by the scratchpad
data beginning at the byte offset T[4:0], as shown in
Figure 9. Regardless of the actual ending offset, themaster can read data until the end of the scratchpad
after which it receives an inverted CRC-16 of the command code, target addresses TA1 and TA2, the E/S
byte, and the scratchpad data starting at the target
address. After the CRC is read, the bus master reads
logical “1”s from the DS1921G until a reset pulse isissued.

Copy Scratchpad [55h]This command is used to copy data from the scratchpad to the writable memory sections. Applying a Copy
Scratchpad command to the Sample Rate register canstart a mission provided that several preconditions are
met. See the Mission Start and Logging Process section and the flowchart in Figure 11 for details. After issuing the Copy Scratchpad command, the master must
provide a 3-byte authorization pattern, which can beobtained by reading the scratchpad for verification.
This pattern must exactly match the data contained in
the three address registers (TA1, TA2, E/S, in thatorder). If the pattern matches, the AA flag is set and the
copy begins. A pattern of alternating “1”s and “0”s istransmitted after the data has been copied until themaster issues a reset pulse. While the copy is inprogress, any attempt to reset the part is ignored. Copy
typically takes 2µs per byte.

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The data to be copied is determined by the threeaddress registers. The scratchpad data from the beginning offset through the ending offset is copied, startingat the target address. Anywhere from 1 to 32 bytes canbe copied to memory with this command. The AA flagremains at logic 1 until it is cleared by the next Write
Scratchpad command. Note that the Copy Scratchpad
command, when applied to the address range 200h to
213h during a mission, ends the mission.

Read Memory [F0h]
The Read Memory command can be used to read theentire memory. After issuing the command, the mastermust provide the 2-byte target address. After the 2bytes, the master reads data beginning from the target
address and can continue until the end of memory, atwhich point logic “0”s are read. It is important to realizethat the target address registers contain the addressprovided. The ending offset/data status byte is unaffected.
The hardware of the DS1921G provides a means toaccomplish error-free writing to the memory section. To
safeguard data in the 1-Wire environment when reading and to simultaneously speed up data transfers, it isrecommended to packetize data into data packets ofthe size of one memory page each. Such a packet
would typically store a 16-bit CRC with each page ofdata to ensure rapid, error-free data transfers that eliminate having to read a page multiple times to verify if
the received data is correct (refer to Application Note114: 1-Wire File Structure for the recommended filestructure).

Maxim Integrated | 21

Thermochron iButton Device

DS1921GFROM ROM FUNCTIONSFLOWCHART (FIGURE 13)

MASTER Tx MEMORY OR
CONTROL FUNCTION COMMAND

0Fh
WRITE SCRATCHPAD?

AAh
READ SCRATCHPAD?

N

Y

55h
COPY SCRATCHPADNYTO FIGURE 10b

N

Y

DS1921G SETSEMCLR = 0

DS1921G SETSEMCLR = 0

DS1921G SETSEMCLR = 0

MASTER Tx
TA1 [T7:T0], TA2 [T15:T8]

MASTER Rx
TA1 [T7:T0], TA2 [T15:T8]

MASTER Tx
TA1 [T7:T0], TA2 [T15:T8]

DS1921G SETSSCRATCHPAD OFFSET = [T4:T0]
AND CLEARS (PF, AA)

MASTER Rx ENDING OFFSET
WITH DATA STATUS(E/S)

MASTER Tx
E/S BYTE

MASTER Tx DATA BYTETO SCRATCHPAD OFFSET

DS1921G SETSSCRATCHPAD OFFSET = [T4:T0]

AUTHORIZATIONCODE MATCH?

N

Y
DS1921G
INCREMENTSSCRATCHPADOFFSETMASTER Tx RESET?

MASTER Rx DATA BYTE FROMSCRATCHPAD OFFSET

DS1921G
INCREMENTSSCRATCHPADOFFSETDS1921G SETS [E4:E0] =SCRATCHPAD OFFSETYMASTER Tx RESET?

N

N

AA = 1

DS1921G COPIES SCRATCHPADDATA TO MEMORYY

MASTER Rx "1"s

MASTER Rx "1"sN

N

SCRATCHPADOFFSET = 11111b?

N

SCRATCHPADOFFSET = 11111b?

COPYINGFINISHEDMASTER Tx RESET?

YYYMASTER Tx RESET?

PARTIAL
BYTE WRITTEN?

YNYDS1921G Tx "0"
MASTER Rx CRC-16 OF
COMMAND, ADDRESS, DATA,
E/S BYTE, AND DATA STARTING
AT THE TARGET ADDRESSNMASTER Tx RESET?

N

Y

Y

PF = 1
MASTER Rx CRC-16 OF
COMMAND, ADDRESS, DATAYNMASTER Tx RESET?
DS1921G Tx "1"
N

Y

MASTER Tx RESET?

MASTER Rx "1"sN

MASTER Tx RESET?

N
Y

MASTER Rx "1"s

FROM FIGURE 10b
TO ROM FUNCTIONSFLOWCHART (FIGURE 13)

Figure 10a. Memory/Control Function Flowchart

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Maxim Integrated | 22

Thermochron iButton Device

DS1921GFROM FIGURE 10a

F0h
READ MEMORY?

A5h
READ MEMORYWITH CRC

N

DS1921G SETSEMCLR = 0

DS1921G SETSEMCLR = 0
DECISION MADE
BY DS1921G

TO FIGURE 10c

N

EMCLR = 1?
Y

MASTER Tx
TA1 [T7:T0], TA2 [T15:T8]

DS1921G SETSMEMORY ADDRESS = [T15:T0]

N

Y

Y

Y

MASTER Rx
TA1 [T7:T0], TA2 [T15:T8]

3Ch
CLEAR MEMORYN

DS1921G CLEARS MISSIONTIMESTAMP, MISSIONSAMPLES COUNTER, MISSIONSTART DELAY, SAMPLE RATEREGISTERDS1921G SETS MEMORYADDRESS = [T15:T0]
DECISION MADE
BY MASTER

DS1921G
INCREMENTS
ADDRESS
COUNTERMASTER Rx DATA BYTE FROMMEMORY ADDRESSYDS1921G CLEARS ALARM
TIMESTAMPS AND DURATIONSEND OF
MEMORY?
NY

MASTER Tx RESET?

MASTER Rx
00 BYTEDS1921G CLEARS HISTOGRAMMEMORYMASTER Rx DATA BYTEFROM MEMORY ADDRESSNNEND OF
MEMORY?
YYDS1921G SETSMEMCLR = 1

DS1921G
INCREMENTS
ADDRESS
COUNTERMASTER Tx RESET?

DS1921G SETSEMCLR = 0

N

MASTER Rx "0"
END OF PAGE?

N
N

MASTER Tx RESET?

Y
Y
MASTER Rx CRC-16 OF
COMMAND, ADDRESS, DATA
(1ST PASS); CRC-16 OF DATA(SUBSEQUENT PASSES)CRC OK?

Y

N
MASTER Tx
RESET

TO FIGURE 10a

FROM FIGURE 10c

Figure 10b. Memory/Control Function Flowchart

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Maxim Integrated | 23

Thermochron iButton Device

DS1921GFROM FIGURE 10b

44h CONVERTTEMPERATURE?

N

YDS1921G SETSEMCLR = 0Y

MISSION IN
PROGRESS?
NTEMPERATURECONVERSION PROCESSDS1921G SETS
TCB = 0

DS1921G PERFORMS A
TEMPERATURE CONVERSIONDS1921G STARTS TEMPERATURECONVERSION PROCESSDS1921G COPIES RESULT TOADDRESS 0211h

N

MASTER
Tx RESET?

DS1921G SETS
TCB = 1YEND OF PROCESSNMASTER
Tx RESET?
YTO FIGURE 10b

Figure 10c. Memory/Control Function Flowchart

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Maxim Integrated | 24

Thermochron iButton Device

DS1921G

Read Memory with CRC [A5h]
The Read Memory with CRC command is used to readmemory data that cannot be packetized, such as theregister page and the data recorded by the device during a mission. The command works the same way as
the simple Read Memory command, except for the 16bit CRC that the DS1921G generates and transmits following the last data byte of a memory page.
After having sent the command code of the Read
Memory with CRC command, the bus master sends a
2-byte address (TA1 = T[7:0], TA2 = T[15:8]) that indicates a starting byte location. With the subsequent
read-data time slots, the master receives data from theDS1921G starting at the initial address and continues
until the end of a 32-byte page is reached. At that point
the bus master sends 16 additional read-data time slots
and receives an inverted 16-bit CRC. With subsequent
read-data time slots the master receives data starting at
the beginning of the next page followed again by the
inverted CRC for that page. This sequence continues
until the bus master resets the device.
With the initial pass through the Read Memory with
CRC command flow, the 16-bit CRC value is the resultof shifting the command byte into the cleared CRC generator followed by the two address bytes and the contents of the data memory. Subsequent passes throughthe Read Memory with CRC command flow generate a
16-bit CRC that is the result of clearing the CRC generator and then shifting in the contents of the data memory page. After the 16-bit CRC of the last page is read,the bus master receives logical “0”s from the DS1921G
and inverted CRC-16s at page boundaries until a reset
pulse is issued. The Read Memory with CRC commandsequence can be ended at any point by issuing a reset
pulse.

Clear Memory [3Ch]
The Clear Memory command is used to clear the
Sample Rate, Mission Start Delay, Mission Timestamp,
and Mission Samples Counter in the register page andthe temperature alarm memory and the temperature
histogram memory. These memory areas must be
cleared for the device to be set up for another mission.
The Clear Memory command does not clear the datalog memory or the temperature and timer alarm flags in
the Status register. The RTC oscillator must be on andhave counted at least 1s before issuing the command.
For the Clear Memory command to function, the
EMCLR bit in the Control register must be set to 1, andthe Clear Memory command must be issued with thevery next access to the device’s memory functions.
Issuing any other memory function command resets the
EMCLR bit. The Clear Memory process takes 500µs.
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When the command is completed the MEMCLR bit in
the Status register reads 1 and the EMCLR bit is 0.

Convert Temperature [44h]If a mission is not in progress (MIP = 0), the Convert
Temperature command can be issued to measure thecurrent temperature of the device. The result of the temperature conversion can be found at memory address
211h in the register page. This command takes maximum 90ms to complete. During this time the device
remains fully accessible for memory/control and ROM
function commands.

Mission Start and Logging Process
The DS1921G does not use a special command to starta mission. Instead, a mission is started by writing anonzero value to the Sample Rate register using the
Copy Scratchpad command. As shown in Figure 11, a
new mission can only be started if the previous mission
has been stopped (MIP = 0), the memory is cleared(MEMCLR = 1), and the mission is enabled (EM = 0). If
the new sample rate is different from zero, the value iscopied to the Sample Rate register. At the same time
the MIP bit is set and the MEMCLR bit is cleared to indicate that the device is on a mission. Next, the Mission
Start Delay Counter starts decrementing every minuteuntil it is down to 0. Now the DS1921G waits until thenext minute boundary and starts the logging process,which as its first action copies the applicable RTC registers to the Mission Timestamp register.

Stop Mission
The DS1921G does not have a special command tostop a mission. A mission can be stopped at any timeby writing to any address in the range of 0200h to
0213h or by writing the MIP bit of the Status register ataddress 0214h to 0. Either approach involves the use of
the Copy Scratchpad command. There is no need for
the Mission Start Delay to expire before a mission canbe stopped (see Figure 11).

Memory Access Conflicts
While a mission is in progress, a temperature sample isperiodically taken and stored in the data-log, histogram, and potential alarm memory. This “internal
activity” has priority over a Read Memory command’sor Read Memory with CRC command’s access to thesepages. If a conflict occurs, the data read may beinvalid, even if the CRC value matches the data. To
ensure that the data read is valid, it is recommended to
first read the SIP bit of the Status register. If the SIP bit
is set, delay reading the data-log, histogram, and alarm
memory until SIP is 0. The interference is more likely to
be seen with a high sample rate (one sample every

Maxim Integrated | 25

Thermochron iButton Device

DS1921GLOGGING PROCESSMISSION START PROCESSMIP = 1?
N

EM = 0?

DS1921G COPIES RTC TOMISSION TIMESTAMPYDS1921G SETS MIP = 0

DS1921G SETS DATA-LOG
ADDRESS = 1000h

N
DS1921G MEASURESTEMPERATUREYMEMCLR = 1?

N
DS1921G UPDATES HISTOGRAM,
DEVICE SAMPLES COUNTER,MISSION SAMPLES COUNTER
AND ALARM, IF APPLICABLEYNEW SAMPLE
RATE = 0?

Y
NN
DS1921G COPIES NEW SAMPLE
RATE FROM SCRATCHPAD TOSAMPLE RATE REGISTERYY

RO = 1?

DATA-LOGADDRESS = 1800h?
N

DS1921G SETS MIP = 1;
MEMCLR = 0

START DELAY
COUNTER = 0?

Y

N

MIP = 1?

N

DS1921G STORES TEMPERATUREAT DATA-LOG ADDRESSDS1921G INCREMENTS
DATA-LOG ADDRESSDS1921G INCREMENTS LOWER
11 BITS OF DATA-LOG ADDRESSDS1921G WAITSUNTIL NEXT MINUTE
BOUNDARYDS1921G WAITSONE SAMPLEPERIODYDS1921G WAITS UNTIL NEXTMINUTE BOUNDARYDS1921G STORES TEMPERATUREAT DATA-LOG ADDRESSDS1921GLOGGINGPROCESSY

MIP = 1?
NEND OF PROCESSDS1921G DECREMENTS
START DELAY COUNTEREND OF PROCESSNOTE: THE MISSION START PROCESS IS INVOKED WHEN THE COPY SCRATCHPAD COMMAND IS USED TO SET A NEW SAMPLE RATE BY WRITING TO THE SAMPLE RATEREGISTER AT ADDRESS 020Dh. ONE MINUTE AFTER THE START DELAY COUNTDOWN IS OVER, THE LOGGING PROCESS BEGINS AND THE MISSION START PROCESS ENDS.

Figure 11. Mission Start and Logging Process

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Maxim Integrated | 26

Thermochron iButton Device

DS1921G

a maximum data rate of 16.3kbps. The speed can beboosted to 142kbps by activating the overdrive mode.
The DS1921G is not guaranteed to be fully compliant to
the iButton device standard. Its maximum data rate instandard speed is 15.4kbps and 125kbps in overdrive.
The value of the pullup resistor primarily depends on
the network size and load conditions. The DS1921G
requires a pullup resistor of maximum 2.2kΩ at any
speed.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
must be left in the idle state if the transaction is toresume. If this does not occur and the bus is left low for
more than 16µs (overdrive speed) or more than 120µs(standard speed), one or more devices on the bus may
be reset. Note that the DS1921G does not quite meetthe full 16µs maximum low time of the normal 1-Wirebus overdrive timing. With the DS1921G the bus mustbe left low for no longer than 15µs at overdrive speed toensure that no DS1921G on the 1-Wire bus performs a
reset. The DS1921G communicates properly whenused in conjunction with a DS2480B or DS2490 1-Wiredriver and adapters that are based on these driver
chips.

minute). Since all mission samples occur on the seconds rollover (59 to 00), memory conflicts can be avoided by first reading the RTC seconds counter. For
example, if it takes 2s to read the data log, then avoid
starting the memory read if the seconds counter is 58,
59, or 00. Alternatively, one can read the affected memory section twice and accept the data only if both readings match. In any case, when writing driver software, it
is important to know about the possibility of interference
and to take measures to work around it.

1-Wire Bus System
The 1-Wire bus is a system that has a single bus masterand one or more slaves. In all instances the DS1921G
is a slave device. The bus master is typically a microcontroller. The discussion of this bus system is broken
down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling (signal types
and timing). The 1-Wire protocol defines bus transactions in terms of the bus state during specific time slotsthat are initiated on the falling edge of sync pulses fromthe bus master.

Hardware Configuration
The 1-Wire bus has only a single line by definition; it isimportant that each device on the bus be able to drive
it at the appropriate time. To facilitate this, each device
attached to the 1-Wire bus must have open-drain or
three-state outputs. The 1-Wire port of the DS1921G isopen drain with an internal circuit equivalent to thatshown in Figure 12.
A multidrop bus consists of a 1-Wire bus with multiple
slaves attached. At standard speed the 1-Wire bus has

Transaction Sequence
The protocol for accessing the DS1921G through the
1-Wire port is as follows:• Initialization• ROM Function Command• Memory/Control Function Command• Transaction/Data

VPUP
BUS MASTER

DS1921G 1-Wire PORT
RPUP
DATA

Rx

Rx

IL

Tx

Tx

Rx = RECEIVE
Tx = TRANSMIT
OPEN-DRAIN
PORT PIN

100Ω MOSFET

Figure 12. Hardware Configurationwww.maximintegrated.com

Maxim Integrated | 27

Thermochron iButton Device

DS1921G

Initialization
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consistsof a reset pulse transmitted by the bus master, followedby presence pulse(s) transmitted by the slave(s). The
presence pulse lets the bus master know that theDS1921G is on the bus and is ready to operate. For
more details, see the 1-Wire Signaling section.

ROM Function Commands
Once the bus master has detected a presence, it canissue one of the seven ROM function commands. All
ROM function commands are 8 bits long. A list of thesecommands follows (see the flowchart in Figure 13).

Read ROM [33h]This command allows the bus master to read theDS1921G’s 8-bit family code, unique 48-bit serial number and 8-bit CRC. This command can only be used if
there is a single slave on the bus. If more than one
slave is present on the bus, a data collision occurs
when all slaves try to transmit at the same time (opendrain produces a wired-AND result). The resultant family code and 48-bit serial number result in a mismatch of
the CRC.

Match ROM [55h]The Match ROM command, followed by a 64-bit ROM
sequence, allows the bus master to address a specificDS1921G on a multidrop bus. Only the DS1921G thatexactly matches the 64-bit ROM sequence responds tothe memory function command. All other slaves wait fora reset pulse. This command can be used with a single
device or multiple devices on the bus.

Search ROM [F0h]
When a system is initially brought up, the bus mastermight not know the number of devices on the 1-Wirebus or their registration numbers. By taking advantageof the wired-AND property of the bus, the master canuse a process of elimination to identify the registration
numbers of all slave devices. For each bit of the registration number, starting with the least significant bit, thebus master issues a triplet of time slots. On the first slot,
each slave device participating in the search outputs
the true value of its registration number bit. On the second slot, each slave device participating in the search
outputs the complemented value of its registration number bit. On the third slot, the master writes the true

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value of the bit to be selected. All slave devices that do
not match the bit written by the master stop participating in the search. If both of the read bits are zero, themaster knows that slave devices exist with both statesof the bit. By choosing which state to write, the bus
master branches in the ROM code tree. After one complete pass, the bus master knows the registration number of a single device. Additional passes identify theregistration numbers of the remaining devices. Refer toApplication Note 187: 1-Wire Search Algorithm for a
detailed discussion, including an example.

Conditional Search ROM [ECh]The Conditional Search ROM command operates similarly to the Search ROM command except that only
devices fulfilling the specified condition participate in
the search. The condition is specified by the bit functions TAS, THS, and TLS in the Control register,
address 20Eh. The Conditional Search ROM provides
an efficient means for the bus master to determine
devices on a multidrop system that have to signal animportant event, such as a temperature leaving the tolerance band. After each pass of the conditional searchthat successfully determined the 64-bit ROM code for a
specific device on the multidrop bus, that particulardevice can be individually accessed as if a Match ROM
command had been issued, since all other devices
have dropped out of the search process and are waiting for a reset pulse.
For the conditional search, one can select any combination of the three search conditions by writing theassociated bit to a logical 1. These bits corresponddirectly to the flags in the Status register of the device.
If the flag in the Status register reads 1 and the corresponding bit in the Control register is a logical 1 too,
the device responds to the Conditional Search ROM
command. If more than one bit search condition is
selected, the first event that occurs makes the device
respond to the Conditional Search ROM command.

Skip ROM [CCh]This command can save time in a single-drop bus system by allowing the bus master to access the memory
functions without providing the 64-bit ROM code. If
more than one slave is present on the bus and, forexample, a read command is issued following the Skip
ROM command, data collision occurs on the bus asmultiple slaves transmit simultaneously (open-drain
pulldowns produce a wired-AND result).

Maxim Integrated | 28

Thermochron iButton Device

DS1921G

MASTER Tx
RESET PULSEFROM MEMORY/CONTROLFUNCTIONS FLOWCHART (FIGURE 10)

FROM FIGURE 13b

SHORTRESET PULSE?

N

OD = 0Y
MASTER Tx ROM
FUNCTION COMMAND

33h
READ ROM
COMMAND?

*N

DS1921G Tx
PRESENCE PULSE

55h
MATCH ROM
COMMAND?

Y

**

F0h
SEARCH ROM
COMMAND?

NY

EChCONDITIONAL SEARCHCOMMAND?

NYNTO FIGURE 13b

Y

N

CONDITION
MET?
YDS1921G Tx
FAMILY CODE
(1 BYTE)DS1921G Tx BIT 0*

MASTER Tx BIT 0

DS1921G Tx BIT 0*

MASTER Tx BIT 0

BIT 0 MATCH?

N

N

MASTER Tx BIT 1

DS1921G Tx BIT 1
MASTER Tx BIT 1

BIT 1 MATCH?

N

N

MASTER Tx BIT 63

DS1921G Tx BIT 63
MASTER Tx BIT 63

BIT 63 MATCH?

NN

BIT 63 MATCH?

YY

BIT 0 MATCH?

DS1921G Tx BIT 1***

DS1921G Tx BIT 1
MASTER Tx BIT 1

NYDS1921G Tx BIT 63

*

*
*
*

Y

BIT 1 MATCH?

Y

DS1921G Tx
CRC BYTE

MASTER Tx BIT 0

YDS1921G Tx BIT 1*

DS1921G Tx BIT 0

N

BIT 0 MATCH?

Y
DS1921G Tx
SERIAL NUMBER(6 BYTES)DS1921G Tx BIT 0

*
*
*

*
*
*

BIT 1 MATCH?
Y
DS1921G Tx BIT 63***

DS1921G Tx BIT 63
MASTER Tx BIT 63

N

*
*
*

BIT 63 MATCH?

Y

TO FIGURE 13b

FROM FIGURE 13b*TO BE TRANSMITTED OR RECEIVED AT OVERDRIVE SPEED IF OD = 1.
** PRESENCE PULSE IS SHORT IF OD = 1.

TO MEMORY FUNCTIONSFLOWCHART (FIGURE 10)

Figure 13a. ROM Functions Flowchart
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Maxim Integrated | 29

Thermochron iButton Device

DS1921G

TO FIGURE 13a

FROM FIGURE 13a

CCh
SKIP ROM
COMMAND?

NY

3Ch
OVERDRIVESKIP ROM?

N

69h
OVERDRIVEMATCH ROM?

YY

OD = 1OD = 1

MASTER
Tx RESETPULSE?

Y

N

MASTER Tx BIT 0***

N

BIT 0 MATCH?

N

Y

MASTER Tx BIT 1

BIT 1 MATCH?

***

N

Y

MASTER Tx BIT 63

BIT 63 MATCH?

FROM FIGURE 13a

***

N

Y

TO FIGURE 13a***ALWAYS TO BE TRANSMITTED AT OVERDRIVE SPEED.

Figure 13b. ROM Functions Flowchart
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Maxim Integrated | 30

Thermochron iButton Device

DS1921G

Overdrive-Skip ROM [3Ch]

standard speed at the next reset pulse of minimum
480µs duration. The Overdrive-Match ROM command
can be used with a single or multiple devices on thebus.

On a single-drop bus this command can save time byallowing the bus master to access the memory/control
functions without providing the 64-bit ROM code. Unlike
the normal Skip ROM command, the Overdrive-Skip
ROM command sets the DS1921G in the overdrivemode (OD = 1). All communication following this command must occur at overdrive speed until a reset pulseof minimum 480µs duration resets all devices on thebus to standard speed (OD = 0).
When issued on a multidrop bus, this command sets all
overdrive-supporting devices into overdrive mode. To
subsequently address a specific overdrive-supporting
device, a reset pulse at overdrive speed must be
issued followed by a Match ROM or Search ROM command sequence. This speeds up the time for the
search process. If more than one slave supporting
overdrive is present on the bus and the Overdrive-Skip
ROM command is followed by a read command, data
collision occurs on the bus as multiple slaves transmit
simultaneously (open-drain pulldowns produce a wiredAND result).

1-Wire Signaling
The DS1921G requires strict protocols to ensure data
integrity. The protocol consists of four types of signaling
on one line: reset sequence with reset pulse and presence pulse, write-zero, write-one, and read-data. Except
for the presence pulse, the bus master initiates all thesesignals. The DS1921G can communicate at two different
speeds: standard speed and overdrive speed. If not
explicitly set into the overdrive mode, the DS1921G
communicates at standard speed. While in overdrivemode, the fast timing applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line
needs to fall from VPUP below the threshold VTL. To getfrom active to idle, the voltage needs to rise from
VILMAX past the threshold VTH. The time it takes for thevoltage to make this rise is seen in Figure 14 as “ε” andits duration depends on the pullup resistor (RPUP) used
and the capacitance of the 1-Wire network attached.
The voltage VILMAX is relevant for the DS1921G when
determining a logical level, but not for triggering any
events.
The initialization sequence required to begin any communication with the DS1921G is shown in Figure 14. A
reset pulse followed by a presence pulse indicates theDS1921G is ready to receive data, given the correct
ROM and memory function command. If the bus masteruses slew-rate control on the falling edge, it must pull
down the line for tRSTL + tF to compensate for the edge.

Overdrive-Match ROM [69h]
The Overdrive-Match ROM command followed by a 64bit ROM sequence transmitted at overdrive speed
allows the bus master to address a specific DS1921G
on a multidrop bus and to simultaneously set it in overdrive mode. Only the DS1921G that exactly matches
the 64-bit ROM sequence responds to the subsequent
memory/control function command. Slaves already inoverdrive mode from a previous Overdrive-Skip or successful Overdrive-Match ROM command remain in
overdrive mode. All overdrive-capable slaves return to

MASTER Tx "RESET PULSE"MASTER Rx "PRESENCE PULSE"
ε

tMSP

VPUP
VIHMASTER
VTH
VTL
VILMAX
0V
tRSTL

tPDH

tF

tPDL

tREC
tRSTH

RESISTORMASTERDS1921G

Figure 14. Intitialization Procedure: Reset and Presence Pulses

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Maxim Integrated | 31

Thermochron iButton Device

DS1921GA tRSTL duration of 480µs or longer exits the overdrivemode, returning the device to standard speed. If theDS1921G is in overdrive mode and tRSTL is no longer
than 80µs, the device remains in overdrive mode.
After the bus master has released the line, it goes into
receive mode (Rx). Now the 1-Wire bus is pulled to
V PUP through the pullup resistor or, in case of a
DS2480B driver, through active circuitry. When thethreshold VTH is crossed, the DS1921G waits for tPDH
and then transmits a presence pulse by pulling the line
low for tPDL. To detect a presence pulse, the mastermust test the logical state of the 1-Wire line at tMSP.
The tRSTH window must be at least the sum of tPDHMAX,t PDLMAX , and t RECMIN . Immediately after t RSTH is
expired, the DS1921G is ready for data communication.
In a mixed population network, tRSTH should be extended to minimum 480µs at standard speed and 48µs at
overdrive speed to accommodate other 1-Wire devices.

Read/Write Time Slots
Data communication with the DS1921G takes place intime slots that carry a single bit each. Write time slots
transport data from bus master to slave. Read time slots
transfer data from slave to master. The definitions of thewrite and read time slots are illustrated in Figure 15.
All communication begins with the master pulling thedata line low. As the voltage on the 1-Wire line falls
below the threshold VTL, the DS1921G starts its internaltiming generator that determines when the data line issampled during a write time slot and how long data isvalid during a read time slot.

Master-to-Slave
For a write-one time slot, the voltage on the data line
must have crossed the VTH threshold after the write-one
low time tW1LMAX is expired. For a write-zero time slot,
the voltage on the data line must stay below the VTH
threshold until the write-zero low time tW0LMIN is expired.
The voltage on the data line should not exceed VILMAX
during the entire tW0L or tW1L window. After the VTH
threshold has been crossed, the DS1921G needs arecovery time tREC before it is ready for the next time slot.

Slave-to-MasterA read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below VTL
until the read low time tRL is expired. During the tRL
window, when responding with a 0, the DS1921G starts
pulling the data line low; its internal timing generator
determines when this pulldown ends and the voltage
starts rising again. When responding with a 1, theDS1921G does not hold the data line low at all, and thevoltage starts rising as soon as tRL is over.

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The sum of tRL + δ (rise time) on one side and the internal timing generator of the DS1921G on the other side
define the master sampling window (t MSRMIN totMSRMAX) in which the master must perform a read fromthe data line. For most reliable communication, t RL
should be as short as permissible and the mastershould read close to but no later than tMSRMAX. Afterreading from the data line, the master must wait untiltSLOT is expired. This guarantees sufficient recovery
time tREC for the DS1921G to get ready for the nexttime slot.

CRC Generation
There are two different types of CRCs with theDS1921G. One CRC is an 8-bit type and is stored in themost significant byte of the 64-bit ROM. The bus mastercan compute a CRC value from the first 56 bits of the
64-bit ROM and compare it to the value stored within
the DS1921G to determine if the ROM data has been
received error-free. The equivalent polynomial functionof this CRC is X 8 + X 5 + X 4 + 1. This 8-bit CRC isreceived in the true (noninverted) form. It is computedat the factory and lasered into the ROM.
The other CRC is a 16-bit type, generated according to
the standardized CRC-16 polynomial function X16 +X15 + X2 + 1. This CRC is used for error detection whenreading data memory using the Read Memory with
CRC command and for fast verification of a data transfer when writing to or reading from the scratchpad. In
contrast to the 8-bit CRC, the 16-bit CRC is always
communicated in the inverted form. A CRC-generator
inside the DS1921G chip (Figure 16) calculates a new
16-bit CRC as shown in the command flowchart of
Figure 10. The bus master compares the CRC value
read from the device to the one it calculates from thedata and decides whether to continue with an operationor to reread the portion of the data with the CRC error.
With the initial pass through the Read Memory with
CRC flowchart, the 16-bit CRC value is the result ofshifting the command byte into the cleared CRC generator, followed by the 2 address bytes and the databytes. Subsequent passes through the Read Memory
with CRC flowchart generate a 16-bit CRC that is theresult of clearing the CRC generator and then shifting in
the data bytes.
With the Write Scratchpad command, the CRC is generated by first clearing the CRC generator and then shifting in the command code, the target addresses TA1
and TA2, and all the data bytes. The DS1921G transmits
this CRC only if the data bytes written to the scratchpad
include scratchpad ending offset 11111b. The data canstart at any location within the scratchpad.

Maxim Integrated | 32

Thermochron iButton Device

DS1921GWRITE-ONE TIME SLOT
tW1L
VPUP
VIHMASTER
VTH
VTL
VILMAX
0V

ε

tF

tSLOT
RESISTORMASTERWRITE-ZERO TIME SLOT
tW0L
VPUP
VIHMASTER
VTH
VTL
VILMAX
0V

ε

tF

tREC

tSLOT
RESISTORMASTER

READ-DATA TIME SLOT
tMSR
tRL
VPUP
VIHMASTER
VTH

MASTERSAMPLING
WINDOWVTL
VILMAX
0V

δ

tF

tREC
tSLOT

RESISTORMASTERDS1921G

Figure 15. Read/Write Timing Diagram

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Maxim Integrated | 33

Thermochron iButton Device

DS1921G

With the Read Scratchpad command, the CRC is generated by first clearing the CRC generator and thenshifting in the command code, the target addresses
TA1 and TA2, the E/S byte, and the scratchpad data
starting at the target address. The DS1921G transmits
this CRC only if the reading continues through the endof the scratchpad, regardless of the actual ending offset. For more information on generating CRC values
refer to Application Note 27: Understanding and Using
Cyclic Redundancy Checks with Maxim iButton
Products.

POLYNOMIAL = X16 + X15 + X2 + 1

1ST
STAGE

3RD
STAGE

2ND
STAGE

X0

X2

X1

9TH
STAGE
X8

4TH
STAGE

10TH
STAGE
X9

11TH
STAGE
X10

5TH
STAGE

X3

12TH
STAGE
X11

X4

13TH
STAGE
X12

6TH
STAGE
X5

14TH
STAGE
X13

7TH
STAGE
X6

8TH
STAGE
X7

15TH
STAGE
X14

16TH
STAGE
X15

X16

CRC OUTPUTINPUT DATA

Figure 16. CRC-16 Hardware Description and Polynomial

Command-Specific 1-Wire Communication Protocol—Legend
SYMBOLDESCRIPTION

RST

1-Wire reset pulse generated by masterPD

1-Wire presence pulse generated by slave

SelectCommand and data to satisfy the ROM function protocol (Skip ROM, Search ROM, etc.)

WS

Command: “Write Scratchpad”

RS

Command: “Read Scratchpad”

CPS

Command: “Copy Scratchpad”

RM

Command: “Read Memory”

RMC

Command: “Read Memory with CRC”

CM

Command: “Clear Memory”

CT

Command: “Convert Temperature”

TA

Target Address TA1, TA2

TA-E/S

Target Address TA1, TA2 with E/S byte

<data to EOS>

Transfer of as many data bytes as are needed to reach the scratchpad offset 1Fh<data to EOP>

Transfer of as many data bytes as are needed to reach the end of a memory page

<data to EOM>

Transfer of as many data bytes as are needed to reach the end of the data-log memory<00 to EOP>

Transfer of as many 00h bytes as are needed to reach a memory page boundary<32 bytes>

Transfer of 32 bytes

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Maxim Integrated | 34

Thermochron iButton Device

DS1921G

Command-Specific 1-Wire Communication Protocol—Legend (continued)
SYMBOLDESCRIPTION<data>

Transfer of an undetermined amount of data

CRC-16

Transfer of an inverted CRC-16

FF loopIndefinite loop where the master reads FFh bytes

AA loopIndefinite loop where the master reads AAh bytes

BusyInterval during Copy Scratchpad where the DS1921G does not respond. Any bits read during this time
are logic 1.

00 loopIndefinite loop where the master reads 00h bytes

Command-Specific 1-Wire Communication Protocol—Color Codes
Master-to-Slave

Slave-to-Master1-Wire Communication Examples
Write Scratchpad, Reaching the End of the Scratchpad
RST PD Select WSTA<data to EOS> CRC-16

FF loop

Write Scratchpad, Not Reaching the End of the Scratchpad
RST PD Select WS

TA <data> RST PD

Read Scratchpad
RST PD Select RS

TA-E/S<data to EOS> CRC-16

FF loop

Copy Scratchpad (Success)
RST PD Select CPS

TA-E/SBusy

AA loop

Copy Scratchpad (Invalid TA-E/S)
RST PD Select CPS

TA-E/S

FF loop

Read Memory (Success)
RST PD Select RM

TA <data to EOM>

00 loop

Read Memory (Invalid Address)
RST PD Select RMTA

00 loop

Reading reserved pages 20 through 63 or 68 through 127 or pages 192 and higher (beyond data-log memory)
results in 00h bytes.

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Maxim Integrated | 35

Thermochron iButton Device

DS1921G

1-Wire Communication Examples (continued)
Read Memory with CRC (Success)
RST PD Select RMC TA<data to EOP> CRC-16<32 bytes>

CRC-16Loop

The “32 bytes” are either valid page data or 00h bytes when reading reserved pages 20 through 63 or 68
through 127 or pages 192 and higher (beyond data-log memory).
Read Memory with CRC (Invalid Address)
RST PD Select RMC TA<00 to EOP>

CRC-16The “32 bytes” are all 00h.

<32 bytes>

CRC-16Loop

Clear Memory
RST PD Select CM

FF loop

To verify success, read the Status register at address 0214h. If MEMCLR is 1, the command was executed
successfully.
Convert Temperature
RST PD Select CT

FF loop

To read the result and to verify success, read the addresses 0211h (result) and the Device Samples Counterat address 021Dh to 021Fh. If the count has incremented, the command was executed successfully.

Mission Example: Prepare andStart a New Mission
Assumption: The previous mission has ended. To end
an ongoing mission write the MIP bit in the Status register to 0.
The preparation of a DS1921G for a mission including

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the start of the mission requires up to four steps:
Step 1: Set the RTC (if it needs to be adjusted).
Step 2: Clear the data of the previous mission.
Step 3: Set the search condition and Mission Start
Delay and clear the alarm flags.
Step 4: Set the temperature alarms and write theSample Rate to start the mission.

Maxim Integrated | 36

Thermochron iButton Device

DS1921G

Step 1: Set the RTC
Let the actual time be 15:30:00 hours on Monday, the 1st of April in 2002. This results in the following data to be written to the RTC registers:
ADDRESS

200h

201h

202h

203h

204h

205h

206h

DATA

00h

30h

15h

01h

81h

04h

02h

With only a single DS1921G connected to the bus master, the communication of step 1 is as follows:
MASTER MODEDATA (LSB FIRST)

Tx(Reset)COMMENTS

Rx(Presence)

Tx

CCh

Issue Skip ROM command

Tx

0Fh

Issue Write Scratchpad command

Tx

00h

TA1, beginning offset = 00h

Tx

02h

Tx

<7 data bytes>

Reset pulse (480μs to 960μs)
Presence pulse

TA2, address = 0200h
Write 7 bytes of data to scratchpad

Tx(Reset)Rx(Presence)

Reset pulse

Tx

CCh

Issue Skip ROM command
Issue Read Scratchpad command

Presence pulse

Tx

AAh

Rx

00h

Read TA1, beginning offset = 00h

Rx

02h

Read TA2, address = 0200h

Rx

06h

Rx

<7 data bytes>

Read E/S, ending offset = 6h, flags = 0h
Read scratchpad data and verify

Tx(Reset)Rx(Presence)

Tx

CCh

Tx

55h

Issue Copy Scratchpad command

Tx

00h

TA1

Tx

02h

TA2

Tx

06h

E/S

Tx

(Reset)Rx(Presence)

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Reset pulse
Presence pulse
Issue Skip ROM command(AUTHORIZATION CODE)

Reset pulse
Presence pulse

Maxim Integrated | 37

Thermochron iButton Device

DS1921G

Step 2: Clear the data of the previous mission
Set the EMCLR bit to 1, enable the RTC, and then execute the Clear Memory command. The RTC oscillator must be
stable before the Clear Memory command is issued. Wait 500µs after issuing the Clear Memory command before
proceeding to step 3. This results in the following data to be written to the Status register:
ADDRESS

20Eh

DATA

40h

With only a single DS1921G connected to the bus master, the communication of step 2 is as follows:
MASTER MODEDATA (LSB FIRST)

Tx(Reset)COMMENTS

Rx(Presence)

Tx

CCh

Issue Skip ROM command

Tx

0Fh

Issue Write Scratchpad command

Tx

0Eh

TA1, beginning offset = 0Eh

Tx

02h

TA2, address = 020Eh

Tx

40h

Write status byte to scratchpad

Reset pulse (480μs to 960μs)
Presence pulse

Tx(Reset)Rx(Presence)

Reset pulse

Tx

CCh

Issue Skip ROM command
Issue Read Scratchpad command

Presence pulse

Tx

AAh

Rx

0Eh

Read TA1, beginning offset = 0Eh

Rx

02h

Read TA2, address = 020Eh

Rx

0Eh

Read E/S, ending offset = 0Eh, flags = 0h

Rx

40h

Tx

(Reset)Rx(Presence)

Tx

CCh

Issue Skip ROM command

Tx

55h

Issue Copy Scratchpad command

Tx

0Eh

TA1

Tx

02h

TA2

Tx

0Eh

E/S

Tx

(Reset)Rx(Presence)

Tx

CCh

Issue Skip ROM command

Tx

3Ch

Issue Clear Memory command

Tx(Reset)Rx(Presence)

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Read scratchpad data and verify
Reset pulse
Presence pulse(AUTHORIZATION CODE)

Reset pulse
Presence pulse

Reset pulse
Presence pulse

Maxim Integrated | 38

Thermochron iButton Device

DS1921G

Step 3: Set the search condition and Mission Start Delay and clear the alarm flags
In this example, the rollover is disabled and the search condition is set for a high temperature only. The mission is
to start with a delay of 90min (005Ah) and the alarm flags TLF, THF, and TAF are cleared. This results in the following data to be written to the special function registers:
ADDRESS

20Eh

20Fh

210h

211h

212h

213h

214h

DATA

02h

00h*

00h*

00h*

5Ah

00h

00h

*Writing through address locations 20Fh to 211h is faster than accessing the Mission Start Delay register in a separate cycle. The
write attempt has no effect on the contents of these registers.

With only a single DS1921G connected to the bus master, the communication of step 3 is as follows:
MASTER MODEDATA (LSB FIRST)COMMENTS

Tx(Reset)Rx(Presence)

Reset Pulse (480μs to 960μs)

Tx

CCh

Issue Skip ROM command

Tx

0Fh

Issue Write Scratchpad command

Tx

0Eh

TA1, beginning offset = 0Eh

Presence pulse

Tx

02h

Tx

<7 data bytes>

Tx(Reset)Rx(Presence)

Tx

CCh

Issue Skip ROM command

Tx

AAh

Issue Read Scratchpad command

Rx

0Eh

Read TA1, beginning offset = 0Eh

Rx

02h

Read TA2, address = 020Eh

Rx

14h

Read E/S, ending offset = 14h, flags = 0h

Rx

<7 data bytes>

Tx(Reset)Rx(Presence)

Tx

CCh

Tx

55h

Issue Copy Scratchpad command

Tx

0Eh

TA1

Tx

02h

TA2

Tx

13h

E/S

Tx

(Reset)Rx(Presence)

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TA2, address = 020Eh
Write 7 bytes of data to scratchpad
Reset pulse
Presence pulse

Read scratchpad data and verify
Reset pulse
Presence pulse
Issue Skip ROM command(AUTHORIZATION CODE)

Reset pulse
Presence pulse

Maxim Integrated | 39

Thermochron iButton Device

DS1921G

Step 4: Set the temperature alarms and write the Sample Rate to start the mission
In this example, the temperature alarms are set to -5°C for the low temperature threshold and 0°C for the high temperature threshold. The sample rate is once every 10min, allowing the mission to last up to 14 days. This results inthe following data to be written to the special function registers:
ADDRESS

20Bh

20Ch

20Dh

DATA

46h

50h

0Ah

With only a single DS1921G connected to the bus master, the communication of step 4 is as follows:
MASTER MODEDATA (LSB FIRST)

Tx(Reset)Rx(Presence)

Tx

CCh

Issue Skip ROM command

Tx

0Fh

Issue Write Scratchpad command

Tx

0Bh

TA1, beginning offset = 0Bh

Tx

02h

TA2, address = 020Bh

Tx<3 data bytes>

Tx(Reset)Rx(Presence)

Tx

CCh

COMMENTS
Reset pulse (480μs to 960μs)
Presence pulse

Write 3 bytes of data to scratchpad
Reset pulse
Presence pulse
Issue Skip ROM command

Tx

AAh

Issue Read Scratchpad command

Rx

0Bh

Read TA1, beginning offset = 0Bh

Rx

02h

Read TA2, address = 020Bh

Rx

0Dh

Rx

<3 data bytes>

Tx(Reset)Rx(Presence)

Tx

CCh

Issue Skip ROM command

Tx

55h

Issue Copy Scratchpad command

Tx

0Bh

TA1

Tx

02h

TA2

Tx

0Dh

E/S

Tx

(Reset)Rx(Presence)

Read E/S, ending offset = 0Dh, flags = 0h
Read scratchpad data and verify
Reset pulse
Presence pulse(AUTHORIZATION CODE)

Reset pulse
Presence pulse

If step 4 is successful, the MIP bit in the Status register is 1, the MEMCLR bit is 0, and the Mission Start Delay
counts down.

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Maxim Integrated | 40

Thermochron iButton Device

DS1921G

Common iButton Device Features

Pin Configuration• Rugged Chip-Based Data Carrier with Fast, Simple
0.51mmt o n ®. c®

21

1-Wire® ®

50

ut

om

iB

BRANDING

89

16.25mm

000000FBC52B#F

W Thermochron G
ZZZ 1921
DSW

www.maximintegrated.com

5.89mmYY

Access to Information• Digital Identification and Information by Momentary
Contact• Unique Factory-Lasered 64-Bit Registration
Number Ensures• Error-Free Device Selection and Absolute Traceability
Because No Two Parts Are Alike• Built-In Multidrop Controller for 1-Wire Net• Compactly Stores Information• Data Can Be Accessed While Affixed to an Object• Button Shape is Self-Aligning with Cup-Shaped
Probes• Durable Stainless-Steel Case Engraved with
Registration Number Withstands Harsh
Environments• Easily Affixed with Self-Stick Adhesive Backing,Latched by Its Flange, or Locked with a Ring
Pressed Onto Its Rim• Presence Detector Acknowledges When Reader
First Applies Voltage

17.35mmIO
GND

NOTE: THE DS1921G-F5N# HAS A #F5N SUFFIX.

Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but thedrawing pertains to the package regardless of RoHS status.
PACKAGETYPE

PACKAGECODEOUTLINENO.

LAND
PATTERN NO.

F5 CanIB#5CP

21-0266—

Maxim Integrated | 41

Thermochron iButton Device

DS1921G

Revision History
REVISION
DATE

PAGES
CHANGEDDESCRIPTION
Added bullet “Water resistant or waterproof if placed inside DS9107 iButton capsule (Exceeds Water
Resistant 3 ATM requirements)”
Deleted “application pending” from UL bullet and safety statement
Added text to Detailed Description section: Note that the initial sealing level of DS1921G achieves
IP56. Aging and use conditions can degrade the integrity of the seal over time, so for applications
with significant exposure to liquids, sprays, or other similar environments, it is recommended toplace the Thermochron in the DS9107 iButton capsule. The DS9107 provides a watertight enclosurethat has been rated to IP68 (See www.maximintegrated.com/AN4126)

1, 2

4/09

Created newer template-style data sheet

All

4/10

Overdrive specifications for tRSTL, tPDL, and tW0L split into range VPUP > 4.5V and full range. New
values for the full range

2–4

4/11

Updated UL certificate reference; deleted  from the tW1L specification in the Electrical Characteristics
table; applied note 13 to the tW0L specification in the Electrical Characteristics table; added moredetails to Electrical Characteristics table notes 7, 13, and 14

1, 3, 4

9/11

DS1921G-F5N# part number added to the Ordering Information; branding information updated in the
Pin Configuration

1, 41

3/12

Added terminology updates for consistency with similar products; added more details to the Parasite
Power section

1, 7, 8,
9, 14

6/13

Removed the UL 913 5th Ed. compliance statement from the Common iButton Device Featuressection and iButton Can Physical Specification table; reworded the Electrical Characteristics table
Note 17

1, 4

11/13

Added the Busy state during Copy Scratchpad to the Command-Specific 1-Wire Communication
Protocol—Legend and 1-Wire Communication Examples sections

35

3/15

Updated Benefits and Features and Common iButton Device Features sections

1, 41

120407For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min andmax limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.

© 2015 Maxim Integrated Products, Inc. | 42