THESISA STUDY ON LOW-NOISE HIGH-DYNAMIC-RANGE SOIPIXEL X-RAY IMAGE SENSOR FOR NEXT
GENERATION ASTRONOMICAL SATELLITE MISSIONSUMEET SHRESTHA

Graduate School of
Science and Technology, Educational Division
Department of Nanovision Technology
Shizuoka University
June 2018

THESISA STUDY ON LOW-NOISE HIGH-DYNAMIC-RANGE SOIPIXEL X-RAY IMAGE SENSOR FOR NEXT
GENERATION ASTRONOMICAL SATELLITE MISSION
次世代天文観測衛星のための低雑音高ダイナミック
レンジSOIピクセル X線イメージセンサに関する研究

シュミートシュレスタ

静岡大学
大学院自然科学教育部
ナノビジョン工学専攻
２０１８年

６月

Declaration
The work in this thesis is based on research carried out at the Imaging Devices
Laboratory, Research Institute of Electronics, Shizuoka University in collaboration
with Department of Physics, Kyoto University and High Energy Accelerator
Research Organization, KEK. No part of this thesis has been submitted elsewhere
for any other degree or qualification and it is all my own work unless referenced tothe contrary in the text.

Copyright © 2018 by Sumeet Shrestha“The copyright of this thesis rests with the author. No quotations from itshould be published without the author’s prior written consent and information
derived from it should be acknowledged”.
“本論文の著作権は、国立大学法人静岡大学大学院自然科学教育部ナノビジョ
ン工学専攻張博が所有しています。本論文の記事・図面の無断複写、複製および無断転載を禁じます。ただし、著者は本論文の複写権を国立大学法人静岡大学に唯一許諾します”。

Abstract
Charge-coupled devices (CCDs) are current industry standard for X-ray imaging
spectrometers in astronomical satellite mission. They offer high X-ray spectroscopic
performance with a near fano-limited energy resolution and low readout noise of about
3 e−rms . CCDs allows the implementation of large format devices with high spatial resolution but the readout scheme of CCDs fails to read X-ray accurately at high X-ray
count events. Serial readout of the entire pixel array in CCDs is slow (∼ several seconds) which can cause a photon pile-up phenomenon. This inability to readout the
X-ray fast enough limits CCDs to have high time resolution, less immune to radiation
damage and difficulty in non X-ray background noise cancellation. We are designingmonolithic X-ray detector using 0.2 µm silicon-on-insulator (SOI) based CMOS active
pixel sensor for our future astronomical satellite missions. SOI-based pixel have provided great benefit to the high-energy detection as both detector and SOI CMOS circuit
can be optimized separately for different applications without any mechanical bonding
required between the detector and readout circuitry. We are developing next generation
X-ray detector with an aim to replace the standard CCDs for future astronomy.
In this dissertation, we present an overview of the SOI-pixel (SOIPIX) detector
with variable gain pixel circuit for realizing a low-noise and a high-dynamic-range
X-ray detector designed for next generation astronomical satellite mission. The designed detector called SOIPIX-PDD, is a progression from a SOIPIX detector anduses multiple-wells with pinned depleted diode structure. SOIPIX-PDD with a fully
depleted detector substrate using high back bias voltage can achieve very low sense
node capacitance. Small node capacitance is useful in realizing a low noise design.
Applying a constant voltage to the buried p-well (BPW) on the surface can pin the
back-gate voltage of SOI transistor for avoiding any threshold voltage shift. In addition, the BPW isolates the circuit from detector minimizing the capacitive coupling fora stable circuit performance. The pinned voltage helps in reducing the dark current
generation in the detector. Implemented detector has a dark current at 20◦ C hundred
times lower than sensor with conventional SOIPIX detector. Low dark current densityiof 44.8 pA/cm2 is observed at -30◦ C. Also, buried n-wells (BNW1, BNW2 and BNW3)
form a step-wise lateral electric field increasing the total charge collection area and fast
charge collection into the detector node. This increases the total charge transfer timeand results in high charge collection efficiency.
This dissertation also focuses on the development of two different types of pixel
circuit with in-pixel gain selection configuration for achieving a low-noise and wide
energy range of X-ray detection. System noise from the power-source and bias-lines
affects the detector performance. A technique to reduce correlated system-noise ispresented which reduces the correlated noise coupled due to large BPW capacitance.
The X-ray spectroscopic performance for both pixel circuits before and after systemnoise reduction is analyzed.
241

Am and 55 Fe X-ray radioisotopes are used for the calibration of designed sensor

X-ray spectroscopic performance. Continuous time integration (CTI) pixel employs an
in-pixel amplifier and charge integrating capacitor. The charge integrated in a capacitor
for a controlled time (TINT ) determines the gain for the circuit. Gain of the sensor linearly increases with the increase in TINT . Using the low-gain setting a very high X-ray
energy range of 59.5 keV was able to detect. A high-gain setting of CTI pixel is usefulin reducing the readout noise level to 22.5 e−rms . An energy resolution of 4.39% (613eV FWHM) at 13.95 keV is possible using CTI pixel. A high-gain setting is effective
to improve the SNR of the circuit. A detail regarding in-pixel dual-gain with a charge
sensitive amplifier (CSA) is designed in the same prototype chip. Configurations forachieving very high charge-to-voltage conversion gain of 52 µV/e− and 187 µV/e− arewell explained in this dissertation. CSA pixel circuit has improved noise performanceof 8.5 e−rms for high-gain setting and 11.7 e−rms for low-gain setting. Better energy resolution of 2.89% (171 eV FWHM) at 5.9 keV using 55 Fe and 1.67% (234 eV FWHM) at
13.95 keV using 241 Am are observed by using CSA pixel circuit. Using the high-gain
setting along with low-gain, dynamic range nearly 63 dB is possible for both CTI andCSA pixels.

ii

Acknowledgments
I would like to express my sincere gratitude to Prof. Dr. Shoji Kawahito for giving
me wonderful opportunity to pursue a PhD research and I am very fortunate to work
under his supervision. His wealth of knowledge helped me avoiding detours in myresearch. I am very grateful to have his serious and patient guidance on this exciting
research journey.
I express my profound gratitude to Prof. Takeshi Go Tsuru, Kyoto University for
his valuable instructive advice and useful suggestions on my research work. I would
also like to thank Prof. Yasuo Arai and Prof. Ikuo Kurachi from KEK for their support
and guidance to commence my research successfully.
I sincerely thank Prof. Dr. Keiichiro Kagawa, Prof. Dr. Keita Yasutomi and
Mr. Nobukazu Teranishi for their valuable guidance and grateful for their constantsupervision and helping me in better understanding of my work and potential. I would
like to thank my colleague Dr. Hiroki Kamehama, Mr. Syunta Nakanishi from the
Shizuoka University and Dr. Ayaki Takeda from the University of Miyazaki for helping
in my research project.
Likewise, a special thanks to Mr. Michio Fukuda and Mr. Taishi Takasawa forproviding technical support in my measurement and Ms. Rumi Fujihara for guiding mein the administrative work. I would also like to thank Ms. Eriko Ishizaki, Ms. Seiko
Nakamura, Mr. Masashi Hakamata, Dr. Kamel Mars and all the members of Imaging
Devices Laboratory for providing excellent research environment for the proper commencement and completion of my thesis. I would like express my appreciation to all
the professor and staff in Shizuoka University.
I would like to express my sincere thanks to Dr. Lioe De Xing for helping me inthis journey. I would also like to thank my friend Mr. Yash Sharma, Mr. Sivakumar
Paneer Selvam, Mr. Bekhti Mohammed Abdessamad and Dr. Verapan Manimuthu forbeing there with me in my hard times.
I extend my thanks and appreciations to my family members for their encouragement, without which this dissertation would not have materialized.

iii

Table of Contents
Abstracti

Acknowledgmentsiii

List of Figures

xiii

List of Tables

xiv

List of Abbreviationsxiv

1

X-ray Imager for Astronomical Satellite Mission : Motivation and Objective

1

1.1

X-ray astronomy . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1

1.2

CCD based X-ray detectors . . . . . . . . . . . . . . . . . . . . . . .

5

1.3

Requirements of next generation X-ray detector for astronomical satel-

1.4

1.5

lite missions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6

1.3.1

Low readout noise . . . . . . . . . . . . . . . . . . . . . . .

6

1.3.2

Deep depleteion . . . . . . . . . . . . . . . . . . . . . . . .

7

1.3.3

High radiation hardness . . . . . . . . . . . . . . . . . . . .

7

1.3.4

Fast readout and high time resolution . . . . . . . . . . . . .

7

1.3.5

Wide dynamic range and high SNR . . . . . . . . . . . . . .

8

1.3.6

High modulation transfer function . . . . . . . . . . . . . . .

8Active pixel sensor based X-ray detectors . . . . . . . . . . . . . . .

9

1.4.1

Fast readout time with no pile-up . . . . . . . . . . . . . . .

9

1.4.2

Non X-ray background noise cancellation . . . . . . . . . . .

9

1.4.3

Radiation damage . . . . . . . . . . . . . . . . . . . . . . . .

10

1.4.4

Micrometeorites . . . . . . . . . . . . . . . . . . . . . . . .

10

1.4.5

Low power and low cost . . . . . . . . . . . . . . . . . . . .

10Current APS architecture implementation for next generation X-ray
imager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

iv

10

TABLE OF CONTENTS

1.6
2

3

1.5.1

PSU/Teledyne hybrid CMOS pixel detector . . . . . . . . . .

11

1.5.2

MIT Lincoln laboratory 3-D integrated pixel detector . . . . .

12

1.5.3

Max Planck Institute DEPFET X-ray APS . . . . . . . . . . .

12

1.5.4

SAO/Sarnoff monolithic pixel detector . . . . . . . . . . . . .

13

1.5.5

Kyoto/Shizuoka/KEK SOI based X-ray detector . . . . . . . .

14Organization of thesis . . . . . . . . . . . . . . . . . . . . . . . . . .

16

SOI Based Pixel Detector with Pinned Depleted Diode

18

2.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

2.2

SOIPIX for X-ray detection . . . . . . . . . . . . . . . . . . . . . . .

18

2.3

Conventional SOIPIX . . . . . . . . . . . . . . . . . . . . . . . . . .

19

2.4

SOIPIX-PDD with single n-well structure . . . . . . . . . . . . . . .

21

2.5

SOIPIX-PDD with multiple buried wells . . . . . . . . . . . . . . . .

25

2.6

Simulation results . . . . . . . . . . . . . . . . . . . . . . . . . . . .

25

2.7

Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

30

Event-Driven Pixel Circuits for X-ray Imaging

31

3.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

31

3.2

Event detection circuit . . . . . . . . . . . . . . . . . . . . . . . . .

32

3.2.1

Working principle . . . . . . . . . . . . . . . . . . . . . . .

33

Continuous time integration variable gain pixel . . . . . . . . . . . .

36

3.3.1

Working principle . . . . . . . . . . . . . . . . . . . . . . .

37

3.3.2

Estimation of conversion gain of CTI pixel circuit . . . . . . .

39

3.3.3

Simulation results of CTI pixel circuit . . . . . . . . . . . . .

40

Charge sensitive amplifier dual-gain pixel . . . . . . . . . . . . . . .

41

3.4.1

Working principle . . . . . . . . . . . . . . . . . . . . . . .

43

3.4.2

Simulation results of CSA pixel circuit . . . . . . . . . . . .

48

Readout circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

49

3.5.1

Programmable gain amplifier . . . . . . . . . . . . . . . . . .

50

3.5.2

Sample and hold circuit and unity gain amplifier . . . . . . .

52

Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

53

3.3

3.4

3.5

3.6

v

TABLE OF CONTENTS

45

Low-Noise Design and System-Noise Reduction

54

4.1

Dark current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

54

4.2

Thermal noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

55

4.3

Flicker noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

56

4.4

System noise reduction . . . . . . . . . . . . . . . . . . . . . . . . .

57

4.5

Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

61

Performance Evaluation of CTI and CSA Pixel with SOIPIX-PDD Structure

6

7

62

5.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

62

5.2

Linearity and conversion gain . . . . . . . . . . . . . . . . . . . . . .

63

5.2.1

CTI pixel . . . . . . . . . . . . . . . . . . . . . . . . . . . .

63

5.2.2

CSA pixel . . . . . . . . . . . . . . . . . . . . . . . . . . . .

65

5.3

Dark current of SOIPIX-PDD . . . . . . . . . . . . . . . . . . . . .

67

5.4

Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

68

X-ray Spectroscopic Performance

69

6.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

69

6.2

CTI pixel X-ray spectroscopy . . . . . . . . . . . . . . . . . . . . . .

70

6.3

CTI pixel readout noise . . . . . . . . . . . . . . . . . . . . . . . . .

75

6.4

CSA pixel X-ray spectroscopy . . . . . . . . . . . . . . . . . . . . .

78

6.5

CSA pixel readout noise . . . . . . . . . . . . . . . . . . . . . . . .

85

6.6

Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

85

Conclusion

88

7.1

90

Future works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Appendix A

91

Appendix B

99

Appendix C

102

vi

List of Figures
1.1

Electromagnetic spectrum. X-rays are greater than visible light andless than gamma rays. Higher X-ray energy regions include somewavelength overlap with gamma rays [1], [2]. . . . . . . . . . . . . .

1.2

1NASA’s transiting exoplanet survey satellite. (a) Long vertical strip ofsky viewed by four CCDs. (b) TESS covering the south sky after one
complete year of observation. (c) Satellite covering almost an entire
constellation after its south and north sky scanning [3]. . . . . . . . .

1.3

Artists conception of the X-ray satellite for space missions. (a) Chandra [4]. (b) XMM-Newton [5]. (c) Suzaku [6]. (d) Astro-H [7]. . . . .

1.4

3

4

Cross-sectional schematic of PSU/TIS hybrid CMOS X-ray detector.
Top layer is the silicon absorber for the photo detection. Bottom layer
is CMOS readout circuits for signal processing. Two layers are connected using bump bonding [8]. . . . . . . . . . . . . . . . . . . . .

1.5

11

Cross-section of a 3-D integrated MIT/LL hybrid CMOS sensor. Readout circuit and detector tires are vertically interfaced through oxidebonded interface and electrically connected using 3-D via. Detector
tier is thinned to 50 µm for 100% fill factor [9]. . . . . . . . . . . . .

1.6

12

Cross-section of a MPI DEPFET pixel sensor. Internal gate is formed
under FET gate which collects the electron creating an additional charge
carriers in the channel leading to a modulation of the current. A n+contact is placed on both edges of the gate to remove the charge fromthe internal gate. [10]. . . . . . . . . . . . . . . . . . . . . . . . . . .

1.7

13

SAO/Sarnoff monolithic pixel detector. BMIII pixels has 6T PPD with
serial MIM full-well range switching circuits. It has separate photonode and sense node to perform on-chip analog CDS. Fabricated device can be front- or back-illuminated. [11]. . . . . . . . . . . . . . .

vii

14

LIST OF FIGURES

1.8

SOI Pixel Detector. Detector uses high resistivity silicon substrate with
0.2 µm low-leakage fully-depleted SOI CMOS process. BOX is theburied oxide layer. . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1

Conventional SOIPIX. p+ is a sense node and n−− is a n-type Si substrate with high resistivity. BOX is the buried oxide layer. . . . . . . .

2.2

15

21

Cross-sectional view of the SOIPIX-PDD. A n+ is sense node andn−− is a Si substrate with high resistivity. BOX is the buried oxide
layer.VBB and VBPW are bias voltages at BPW and back side respectively. 22

2.3

SOIPIX-PDD with their potential profile along X-axis and Z-axis. Potential profile on the right shows the vertical potential distribution alongcross-sections Z1 -Z1 ’ and Z2 -Z2 ’. Potential profile below the detector
shows the horizontal potential profile along cross-sections X1 -X1 ’ and
X2 -X2 ’. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4

23

Potential along Z2 -Z2 ’ axis for SOIPIX-PDD with high reisistivity nand p-substrate. (a) SOIPIX-PDD with n-substrate along with verticalpotential for different VBB . (b) SOIPIX-PDD with p-substrate alongwith vertical potential for different VBB . . . . . . . . . . . . . . . . .

2.5

Cross-sectional view of SOIPIX-PDD with multiple buried wells. Horizontal and vertical cross-sections are indicated for simulation. . . . .

2.6

24

26

Layout of SOIPIX-PDD pixel with multiple buried wells. The pixel
size is 40 µm x 40 µm. n+ is a sense node. p+ is a channel stop pinned
to fixed bias voltage VBPW . . . . . . . . . . . . . . . . . . . . . . . .

2.7

27

Potential profile simulation of SOIPIX-PDD. (a) Vertical potential distribution from surface to 200 µm. (b) Vertical potential distribution
from surface to 10 µm. (c) Horizontal potential distribution. Crosssections X2 -X2 ’ is at Z = 0 µm and X1 -X1 ’ is at Z = 10 µm. . . . . . .

2.8

28

3-D potential profile simulation of the SOIPIX-PDD nested well structure neat the surface with 40 µm pixel pitch. Blue line shows that an
expected generated charge will be collected at charge detector node. .

viii

29

LIST OF FIGURES

2.9

2-D (X-Z) equipotential plot. (a) Electron and hole path for Z = 0200 µm. (b) Electron and hole path for Z = 0-10 µm. . . . . . . . . .

29

2.10 Estimation of detector capacitance. . . . . . . . . . . . . . . . . . . .

30

3.1

Architecture of an event-driven pixel circuit. Unit pixel has an event
detection and a signal sensing part. Solid lines are wired connection
while dashed lines from the logic circuits are virtual connection for theselection of a variable gain. . . . . . . . . . . . . . . . . . . . . . . .

3.2

32

Event detection circuit. VT1 and VT2 are threshold voltages. VX isthe signal from the detector. EVENT_H is the horizontal event and
EVENT_V is the vertical event signal. FLAG is the signal for indicating low or high incoming energy. . . . . . . . . . . . . . . . . . . . .

3.3

Case 1: Reset phase. VRC is the reset voltage for the comparator.
Vin (R) is the reset signal from the detector. . . . . . . . . . . . . . . .

3.4

35

Event detection timing diagram. RT is the pixel reset pulse. RST_COMP1
and RST_COMP2 are the reset pulses for the two inverters. . . . . . .

3.6

34

Case 2: Signal phase with VT1 selected for X-ray detection., VT1 is thethreshold voltage for signal detection. . . . . . . . . . . . . . . . . .

3.5

33

36

Variable gain continuous time integration pixel circuit. RST_PD isthe detector reset transistor. RT is the reset transistor to reset charge
integration pixel amplifier. . . . . . . . . . . . . . . . . . . . . . . .

3.7

37

Working of charge integration pixel amplifier for gain sampling. (a)Discharging of integrating capacitors. Switches φS H,L and φ1 are turned
ON. (b) Gain sampling in the integrating capacitor. Switch φS H,L is ON
and φ1 is OFF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.8

38

Output response of the pixel with respect to time for different input
voltage. Time T1 to T2 is CS discharge period. Time T2 to T3 is gain
period for the incoming signal. . . . . . . . . . . . . . . . . . . . . .

39

CTI pixel timing diagram . . . . . . . . . . . . . . . . . . . . . . . .

39

3.10 Equivalent circuit for the conversion gain estimation in CTI pixel. . .

40

3.9

ix

LIST OF FIGURES

3.11 Photodiode model for pixel circuit simulation. (a) Pixel with detector
capacitor (CD ). (b) Trapezoidal test input for an equivalent input energy. 41
3.12 Linearity plot. Output response for different TINT simulated for wide
range of input energy. . . . . . . . . . . . . . . . . . . . . . . . . . .

42

3.13 Gain vs TINT . Gain is linear with TINT . . . . . . . . . . . . . . . . . .

43

3.14 Dual-gain CSA pixel circuit. CSA is in-pixel charge sensitive amplifier. RT is the reset transistor. C1 and C2 are the selective feedback
capacitors. CSL and CSH are two sampling capacitors for low and highgain sampling, respectively. SF1 and SF2 are source followers and
SEL is select switch for selecting one of the low or high gain outputs
for readout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

44

3.15 Internal pixel amplifier circuit and its gain response with output voltage. (a) Cascode common-source amplifier (b) Gain vs output voltage.
Operating range (gain > 40 dB) is 0.7 V to 2.8 V. . . . . . . . . . . .

45

3.16 Equivalent circuit for the conversion gain estimation in CSA pixel. . .

45

3.17 High-gain configuration. φG = 0, high-gain setting. Total feedback
capacitor is 0.5 fF (CFB = C1 ). . . . . . . . . . . . . . . . . . . . . .

46

3.18 Low-gain configuration. φG = 1, low-gain setting. Total feedback capacitor is 2 fF (CFB = C1 + C2 ). . . . . . . . . . . . . . . . . . . . . .

46

3.19 Charge injection model. Charge is injected from a reset transistor. ∆Q
is the amount of the charge injection after the reset switch is turned OFF. 48
3.20 CSA pixel timing diagram. . . . . . . . . . . . . . . . . . . . . . . .

49

3.21 Linearity plot. Pixel output response for low and high simulated forwide range of input energy. . . . . . . . . . . . . . . . . . . . . . . .

50

3.22 Sensor architecture. VCOM and VC are common-mode voltages of column amplifier and output buffer, respectively. . . . . . . . . . . . . .

51

3.23 Programmable gain amplifier. SG1 and SG2 are switches for selectable
gain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

51

3.24 Column level sample and hold circuit with unity gain amplifier. CSS =3 pF and CSR = 3 pF, are the signal and reset sampling capacitors. . .

x

52

LIST OF FIGURES

4.1

Basic amplifier with NMOS and PMOS transistor. . . . . . . . . . . .

4.2

Equivalent noise model of CSA SOIPIX-PDD circuit. (a) Circuit with57

noise sources from BPW1, internal amplifier, VBB and power line. (b)Simplified small signal noise model of pixel circuit. CBPW is the capacitance due to BPW1, CD is the detector capacitance, Ci is the input
capacitance of internal amplifier, CS is the sampling capacitor for low
or high output from the amplifier. . . . . . . . . . . . . . . . . . . . .

58

4.3

Total noise in charge amplifier for different input transistor size. . . .

60

4.4

Technique for system-noise reduction. P1 (1), P1 (2), P1 (N) are the hypothetical pixel with a dominant system-noise present in each pixel 1,
2 and N, respectively for single frame. P1 (2-N) is the average of pixels
from 2 to N, Y1 (1) is the final pixel with a reduced noise. . . . . . . .

5.1

Chip micrograph of the deign prototype SOIPIX-PDD detector. Chip
is fabricated using 0.2 µm FD-SOI CMOS process technology. . . . .

5.2

61

62

Linearity plot for different gain at TINT = 0.1 µs, 0.5 µs and 1.0 µs. The
light intensity with different LUX is changed to characterize the pixel
output response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.3

63

Photon transfer curve and sensor output at different TINT . (a) TINT =0.1 µs, conversion gain is 24 µV/e− . (b) TINT = 0.5 µs, conversion gain
is 122 µV/e− . (c) TINT = 1.0 µs, conversion gain is 244 µV/e− . And, (d)Sensor output vs TINT at 30 LUX light intensity. Gain increase linearlywith the increase in TINT . . . . . . . . . . . . . . . . . . . . . . . . .

5.4

64

Linearity plot for low- and high-gain settings in CSA pixel. The lightintensity with different LUX is changed to characterize the pixel output
response for two CFB (0.5 fF and 2 fF) configurations. . . . . . . . . .

5.5

65

Photon transfer curve of CSA pixel. (a) Low-gain setting with CFB = 2
fF. Conversion gain is 52 µV/e− . (b) High-gain setting with CFB = 0.5
fF. Conversion gain is 187 µV/e− . . . . . . . . . . . . . . . . . . . . .

xi

66

LIST OF FIGURES

5.6

Temperature dependence of detector dark current. Average dark current from the proposed SOIPIX-PDD is compared with a conventional
SOIPIX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.1

241

Am spectrum from CTI pixels with all the data from 16x6 pixel

array including the shared generated charges between pixels. . . . . .
6.2

70

Random X-ray events within 16x6 pixels with different X-ray hit position. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.3

67

241

71

Am spectrum from CTI pixels with a single X-ray event at 16x6

pixels at TINT of 0.1 µs. (a) Before system-noise reduction. (b) Aftersystem-noise reduction. . . . . . . . . . . . . . . . . . . . . . . . . .
6.4

241

72

Am spectrum from CTI pixels with a single X-ray event at 16x6

pixels for different TINT . (a) Spectrum for TINT = 0.3 µs. (b) Spectrum
for TINT = 0.5 µs. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.5

73

Calibration of X-ray energy with the signal pulse height for different
TINT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

74

6.6

Conversion gain vs TINT . . . . . . . . . . . . . . . . . . . . . . . . .

75

6.7

Noise at the pedestal peak of 241 Am spectrum from CTI pixels(a) Noisefor TINT = 0.1 µs before and after system-noise reduction. (b) Noise for
TINT = 0.5 µs before and after system-noise reduction. . . . . . . . . .

76

6.8

Comparison of readout noise of CTI pixel with out prior work. . . . .

77

6.9

55

Fe spectrum with single X-ray event after system-noise reduction andgain variation correction at low-gain setting. . . . . . . . . . . . . . .

78

6.10 55 Fe spectrum with single X-ray event after system-noise reduction andgain variation correction at low-gain setting. . . . . . . . . . . . . . .

79

6.11 Pixel-to-pixel gain variation. (a) Conversion gain for low-gain setting
estimated using 55 Fe in 16x6 pixel array. (b) Gain correction factor for
16x6 pixels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

80

6.12 55 Fe spectrum with single X-ray event after system-noise reduction andgain variation correction at low-gain setting. . . . . . . . . . . . . . .

xii

81

LIST OF FIGURES
6.13 55 Fe spectrum with single X-ray event after system-noise reduction andgain variation correction at high-gain setting. . . . . . . . . . . . . .

81

6.14 241 Am spectrum with single X-ray event after system-noise reduction
and gain variation correction at low-gain setting. . . . . . . . . . . . .

82

6.15 X-ray detection probability for different Si thickness. Detection efficiency of Si detector decreases for higher X-ray energy. . . . . . . . .

83

6.16 241 Am spectrum with single X-ray event after detection efficiency correction at low-gain setting. . . . . . . . . . . . . . . . . . . . . . . .

83

6.17 Calibration of X-ray energy with signal output pulse height. . . . . .

84

6.18 Noise at the pedestal peak of 55 Fe spectrum from CSA pixels before
and after system-noise correction. (a) Noise for CFB = 2.0 fF, low-gain
setting. (b) Noise for CFB = 0.5 fF, High-gain setting. . . . . . . . . .

86

6.19 Noise comparison of CSA pixel at the pedestal peak of 55 Fe with other
SOI based X-ray imager. . . . . . . . . . . . . . . . . . . . . . . . .

87

A.1 Event trigger circuit. . . . . . . . . . . . . . . . . . . . . . . . . . .

92

A.2 CTI pixel circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

93

A.3 CSA pixel circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . .

94

A.4 Folded cascode column amplifier used in column PGA circuit . . . .

95

A.5 Simulation results of column amplifier . . . . . . . . . . . . . . . . .

96

A.6 Folded cascode unity gain buffer amplifier . . . . . . . . . . . . . . .

97

A.7 Simulation results of unity gain buffer amplifier . . . . . . . . . . . .

98

B.1 CTI Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 100
B.2 CSA Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 101
C.1 Setup for linearity measurement . . . . . . . . . . . . . . . . . . . . 103
C.2

55

C.3

241

Fe radioisotope X-ray source mounted directly in the sensor board . 104
Am radioisotope X-ray source mounted directly in the sensor board

xiii

105

List of Tables
1.1

Required performance of next generation X-ray astronomical detector

2.1

Performance comparion of SOIPIX-PDD with high-resistivity N-substrate

15

and P-substrate . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

25

3.1

Simulation parameters for the CTI pixel circuit . . . . . . . . . . . .

41

3.2

Estimated gain for different TINT . . . . . . . . . . . . . . . . . . . .

42

3.3

Simulation parameters for the CSA pixel circuit . . . . . . . . . . . .

49

3.4

Column level readout gain . . . . . . . . . . . . . . . . . . . . . . .

52

4.1

Parameter used in calculation of total noise in the charge amplifier . .

59

6.1

Pulse height of 241 Am spectrum for different TINT . . . . . . . . . . .

74

6.2

Equivalent conversion gain for different TINT . . . . . . . . . . . . . .

75

6.3

Pulse height of 55 Fe and 241 Am spectra for low- and high-gain setting .

84

6.4

Perforamnce comparison of CTI and CSA pixels with the prior work .

87

7.1

Parameters of SOIPIX-PDD detecor . . . . . . . . . . . . . . . . . .

88

7.2

Performance summary of CTI pixel . . . . . . . . . . . . . . . . . .

89

7.3

Performance summary of CSA pixel . . . . . . . . . . . . . . . . . .

89

xiv

List of Abbreviations
241

55

Am Americium-241 radioisotope

Fe

Iron-55 radioisotope

ADU Analog to Digital Unit
APS

Active Pixel Sensor

BNW Buried N-Well
BOX Buried Oxide
BPW Buried P-Well
CFB

Feedback Capacitor

CCD Charge Coupled Device
CDS Correlated Double Sampling
CIS

CMOS Image Sensor

CSA Charge Sensitive Amplifier
CTI

Continuous Time IntegrationCXO Chandra X-ray Observatory
DEPFET DEPleted p-channel Field Effect Transistor
FPN

Fixed Pattern Noise

FWHM Full Width Half Maximum
GC

Conversion Gain

ILCInternational Linear Collider

ISAS Institute of Space and Aeronautical Sciencexv

LIST OF ABBREVIATIONSISPsImage Sensor Processors

LL

Lincon Laboratory

MIM Metal Insulator MetalMPI

Max Planck Institute

MTF Modulation Transfer Function
NXB Non X-ray Background
PGA Programmable Gain Amplifier
PSRR Power Supply Rejection Ratio
PSU

Pennsylvania State University

QE

Quantum Efficiency

RT

Reset Transistor

S&H Sample and HoldSAO Smithsonian Astrophysical Observatory
SF

Source Follower

SNR Signal to Noise Ratio
SOI

Silicon-On-Insulator

SOIPIX Silicon-On-Insulator PIXelSOIPIX-PDD SOIPIX-Pin Depleted DiodeTINT

INTegration time

TESS Transiting Exoplanet Survey Satellite
TIS

Teledyne Imaging Sensor

UGA Unity Gain Amplifier
xvi

LIST OF ABBREVIATIONSVBBBack Bias Voltage

VBPW BPW Bias Voltage
WFI

Wide field Imager

XRPIX X-Ray PIXel using SOI
XRT X-Ray TelescopexviiChapter 1
X-ray Imager for Astronomical Satellite Mission : Motivation and Objective
1.1

X-ray astronomy
In space, binary star systems, supernova remnants, inner regions of some galaxies,

black holes, stars, sun and even some comets emits X-rays. X-rays are the part ofvery high energetic electromagnetic spectrum that has energies thousand times higher
than the photon of a visible light. X-rays are expressed by energy more often thanwavelength. X-ray energy extend from soft to hard with some wavelength overlap
with gamma ray in the higher energy region [1], [2]. X-ray energy ranging from 0.1 to
100 keV will be used as typical energy definition of X-rays in this thesis as illustrated
in the electromagnetic spectrum of Figure 1.1. X-rays with shorter wavelengths havehigher energy and are emitted from objects that are extremely hot (millions of degrees).

Figure 1.1: Electromagnetic spectrum. X-rays are greater than visible light and lessthan gamma rays. Higher X-ray energy regions include some wavelength overlap withgamma rays [1], [2].
A study of X-rays emitted from celestial bodies can help scientists to achievea greater understanding into the origin of the universe, its evolution and gain some1

1.1. X-ray astronomy

insight in their destiny [12], [13]. By analyzing the X-ray energies, their spectral
distribution and period of the radiation, we can determine the atomic structure andtemperature of the body emitting X-rays. Information and data obtained from X-rays
can also further helps us to understand the fundamental physics of our universe [14].
X-rays generated in space cannot penetrate the earth’s thick atmosphere. Any
designed detector or telescope must be carried above the atmosphere in the space for
capturing the X-ray emitted in space and it can be practiced in different ways depending
upon applications. It can be done by placing the detector in the nose cone section of therocket and launching them above the atmosphere. This method of rocket flights havea very short duration as the detector falls back to the earth after 10 to 15 minutes offlight time. Another way is to mount the instruments on a balloon flight. It can carry thedetector at extreme altitude (above 99.7% of earth’s atmosphere) for studying cosmic
sources [15]. A long duration balloons can stay in that altitude for more than 3 weeks.
However, detection of energy level less than 30 keV is not possible as the X-rays withlower energy cannot even reach the balloon [14]. Detectors placed in a satellite canbe flown into an orbit which is much far from the earth’s atmosphere. It can be able
to observe and detect all the energies in the X-ray spectrum for a long term. Unlike
rocket and balloon flights, these can have very wide field of view. Recently launchedtransiting exoplanet survey satellite (TESS) uses four charge coupled device (CCD)
cameras arranged to observe a long strip of sky as shown in Figure 1.2a. TESS will
rotate after certain days to next strip of sky and completes a full rotation covering thesouthern sky (Figure 1.2b). It then starts to scan the north part of the sky covering
almost 80% of the sky [3], [16]. Figure 1.2 shows that a detector on a satellite can be
implemented for very wide field of view and is not limited to the place of launch.
Several major satellites from different countries are currently orbiting in space.
X-ray detectors are the key component for any satellite missions. The Chandra Xray observatory (CXO) designed to detect X-rays from very hot and high energy regions of universe were launched by NASA in 1999. It has been providing data forresearcher with capabilities of imaging with high resolution dispersive spectroscopy
over the wide band of 0.08-10 keV [4]. Another flagship mission for X-ray astronomy,
XMM-Newton by European space agency mission was also launched in 1999 solving2

1.1. X-ray astronomy

(b)

(a)

(c)

Figure 1.2: NASA’s transiting exoplanet survey satellite. (a) Long vertical strip of skyviewed by four CCDs. (b) TESS covering the south sky after one complete year ofobservation. (c) Satellite covering almost an entire constellation after its south andnorth sky scanning [3].

3

1.1. X-ray astronomy

many cosmic mysteries of the X-ray universe [5], [17]. A joint project by NASA’s
Goddard space flight center and the institute of space and aeronautical science (ISAS)
at JAXA developed X-ray astronomy satellite called Suzaku and was launched in 2005
[6], [18]. Figure 1.3 shows the artists rendering of different satellite missions.

(a)

(b)

(c)

(d)

Figure 1.3: Artists conception of the X-ray satellite for space missions. (a) Chandra[4]. (b) XMM-Newton [5]. (c) Suzaku [6]. (d) Astro-H [7].

4

1.2. CCD based X-ray detectors

1.2

CCD based X-ray detectors
CCD detectors are preeminent choice for current X-ray astronomical satellite mis-sions. Most satellites (shown in Figure 1.3) use CCDs as the primary detector for
the X-ray imaging spectrometers. CCDs are matured technology and have several unprecedented advantages for X-ray astronomy. CCD X-ray detectors offer readout noise
below 3 e−rms with fano-limited spectroscopic performance of 120 eV at 6 keV [19], [6].
They have linear behavior over wide range of incident photons. CCDs support a highspatial resolutions showing superior imaging performance with the sensor size of 2030 mm. Higher spatial resolutions are used in large area format devices for wide fieldof view [20].
In space, legacy design of CCDs suffer from numerous unfavorable circumstances.
Despite having remarkable X-ray spectroscopic performance, CCD based X-ray detectors may not be idle in different astronomical applications. They suffer from alow dynamic range and detection of energy is limited mostly to less than 10 keV [6],[21]. CCDs are notably sensitive to radiation damage and suffer from energy resolution
degradation over time without a very thick shielding [20]. Thick shield increases theoverall weight and cost of the payload. CCDs have poor time resolution of few seconds. CCDs uses bucket-brigade readout scheme where charge travels few cm before
being readout which makes it very much vulnerable to proton displacement damage[8], [22]. With a detector requiring high magnitude flux density, CCDs can saturate at
the required exposures due their slow readout. Also, at fast event rate, multiple X-ray
events hit same pixel between readouts causing the pile-up of X-ray photons in a single pixel. CCDs inability to fast readout of the X-ray hit pixel and the interpretation ofthese multiple events as single event worsen the spectroscopic performance.
Long term performance reliability of X-ray detectors are required for cost effective long lived missions. Micrometeoroids and dust particles can cause permanent
damage to pixels making a data unusable for any further analysis. On XMM-Newton
with X-ray pn-CCD, micrometeoroids have produced a bright pixels at small part ofthe sensitive area [23]. Swift satellite carrying X-ray telescope (XRT) CCD also suffered the damage from micrometeoroid damage in their early mission making some5

1.3. Requirements of next generation X-ray detector for astronomical satellite
missions
pixels totally non-functional [24].
Thus, inefficiency of CCDs with low coincidence time resolution for backgroundnoise cancellation, slow readout scheme, lack of window readout, moderate dynamic
range can be a big disadvantage for future astronomical satellite missions.

1.3

Requirements of next generation X-ray detector for
astronomical satellite missions
With the advent of a new technology and a demand for much higher bandwidthwith fast readout, next generation X-ray detectors needs much higher performance requirements than current CCD X-ray detectors. Future X-ray detectors should perform
similar if not better than current CCDs with a solution to overcome the shortcomingsof the CCDs addressed in section 1.2. Following are some of the important aspect, but
not limited, to the design for new detectors that could potentially replace the current
CCDs technologies:

1.3.1

Low readout noise

Low readout noise is an absolute requirement for any high performance X-ray
astronomy detectors. The readout noise sets the minimum noise floor for the detectors
output to be observed accurately. Noises are introduced at different steps during signal
processing of readout circuitry. Energy resolution ( ∆E
) of the detector is theoreticallyE
limited by the readout noise and is given by∆E 2.342ω
=
E
E

r

F·E
+ σ2
ω

(1.1)

where, E is the energy of the incident X-ray photon, ∆E is the energy at full widthhalf maximum (FWHM), F is the fano limit factor (0.11 for silicon), ω is the averageenergy required to generate an electron-hole pair (3.65 eV/e− for silicon) and σ isthe readout noise. Detector with high readout noise suffers from the degradation ina energy resolution. X-ray detectors aim to have fano-limited energy resolution withreadout noise ideally zero. However, noise level for astronomical satellite below 10
6

1.3. Requirements of next generation X-ray detector for astronomical satellite
missions
e−rms will suffice the requirement for high energy resolution near fano-limit [25]. Also,
current CCDs have noise level at 3 e−rms and any future X-ray detector should have anoise level below 3 e−rms .

1.3.2

Deep depleteion

Detector with high resistivity is used for near IR and soft X-ray spectroscopic
imaging. The thickness of depletion layer is a parameter to determine the quantum
efficiency [26]. Higher quantum efficiency (more than 3.5 times) was obtained with adetector having 4 kΩcm, 56 µm device compared to conventional CCDs with 10 Ωcm
and 10 µm substrate thickness [27]. Deep depletion is required to take the detector’s
advantage of wide range of X-ray detection mainly for energies greater than 10 keV.

1.3.3

High radiation hardness

In natural space, major sources of radiations are solar particle events, galactic cosmic rays, and earth radiation belts. These radiation consists of very energetic protons
in 10 to 100 MeV [28] and can cause substantial impact on detector performance. Radiation hardness indicates the resistance of electronics components after an exposure
to natural space radiation. CCDs are exposed to both ionizing and proton displacement
damage. X-ray CCDs in Chandra X-ray mission has suffered from ionizing radiationand its performance has degraded over the years. There is a degradation of chargetransfer efficiency (CTE) every year on both front and back-side illuminated CCDs[29] as charge travel multiple pixels before readout. This readout scheme of CCDs
makes them highly susceptible for radiation damage. Next generation X-ray detectors
should readout the charge as soon as they are generated without the need for transfer from pixel to pixel. Also, good shielding technique should be used to protect thedetector non X-ray background cosmic radiations.

1.3.4

Fast readout and high time resolution

Large format devices are used for wide field of view in space. Detectors withhigh spatial resolution require longer time for reading out their entire array. Reading7

1.3. Requirements of next generation X-ray detector for astronomical satellite
missionsout the pixels with only X-ray events can dramatically improve the time resolution.
Detectors should have a capability to identify the hit position to readout only the hit
pixel. Event driven circuit can be implemented in each pixel for the active reading of
the hit position. Reading the charge fast enough increases the radiation hardness of thesystem. Microsecond time resolution can be achieved by employing the in-pixel event
trigger circuit. The implantation of active shield for the reduction of the non-X-ray
background is possible with a detector with high time resolution [25].

1.3.5

Wide dynamic range and high SNR

Future X-ray detector should be able to detect a wide band X-ray energies ranging from soft to hard energy spectrum. Deep depletion detector described in section
1.3.2 must be used for the detection of X-rays with energy greater than 10 keV whereother non X-ray background dominates. Noise floor of the readout circuit can createtechnical limitation in the detection of energy band signal of low X-ray energy. Highin-pixel gain should be applied for low contrast image to increase the signal-to-noise
ratio (SNR) of the incoming energy. However, applying high gain to the entire signal
band can limit the wide range of energy detection. Next generation X-ray detector
should be able to dynamically apply high gain to low energy while maintaining thewide range of X-ray detection.

1.3.6

High modulation transfer function

Low modulation transfer function (MTF) limits the resolution of the system. Detectors with poor charge transfer efficiency with no isolation between the pixels cansee a cross-talk between the pixels. MTF worsens with energy for low frequency (soft
X-rays). With a front-side illuminated sensor, charges are generated deeper under thesurface where the strength of electric fields is low. Adjacent pixel having high charges
can create an electric cross-talk with the neighboring generated charge [30]. Charge
sharing between the pixels degrades the energy resolution of the X-ray spectra. High
resistivity substrate should be used for constant electric filed. Detector should be fully
depleted for achieving a good MTF [31].

81.4. Active pixel sensor based X-ray detectors

1.4

Active pixel sensor based X-ray detectors
Active pixel sensor (APS) is a significant revolution in the scientific image acqui-sition. The APS technology inhabits all the advantages aspects of CCDs such as highsensitivity, high signal fidelity and large array formats while eluding the major flaw of
CCD technology. Some important factors that make APS based detectors suitable for
the X-ray astronomy are:1.4.1

Fast readout time with no pile-up

An APS has one or more active transistors in each pixel which provides both again and buffering functions. This allows APS to have random accessibility to eachpixel. As explained in section 1.2, at high X-ray count rate, CCDs are not able tomeasure the energy accurately due to multiple X-rays hitting the same pixel. This
pile-up effects in energy resolution and false estimation of detected energy. Ability
to window readout allows APS to have event triggered pixel readout with only X-ray
events. This reduces, also eliminates in most cases, the pile-up effect and helps in abetter spectroscopic performance. The fast readout of hit pixel also helps to have very
high count rate capability with higher time resolution.

1.4.2

Non X-ray background noise cancellation

Fast readout time with active shielding helps in better non-X-ray background(NXB) noise cancellation. For instance, in the X-ray detector developed at Kyoto university is using the active anti-coincidence technique to achieve low NXB. Designed
detector has the capability of reading out the hit pixel after the trigger signal is generated from the hit pixel. Detector is surrounded by the scintillators. If the output signal
from the scintillator and trigger signal from the detector coincide at the same time,the event is rejected as NXB noise [25]. This anti-coincidence technique can only beapplied if time resolution for readout of event triggered pixel is higher than kilohertz
speed.

9

1.5. Current APS architecture implementation for next generation X-ray imager

1.4.3

Radiation damage

Unlike CCDs, APS technology does not require the charge to transfer acrossmacroscopic distances (∼ cm) [32]. The generated charge travels few micrometers
making APS imager to have much higher tolerance to any high radiation encounteredin space. High radiation hardness allows an APS to have thin active radiation shielding
with much less mass. Less mass of the shielding can decrease the overall throw-weightof the payload in the space missions.

1.4.4

Micrometeorites

In space, micrometeoroid can cause damage to detectors affecting the overall detector performance as discussed in section 1.2. CCDs pixel have the exposed gates andthe structure can be easily damaged by the impact of micrometeoroids. Also, pixels in
the CCDs share the same column to transfer the charge and any damaged pixels canaffect the readout [8]. Because of the APS readout scheme, generated charges in the
pixel will not bloom across the detector when damaged making them more immune tomicrometeoroids.

1.4.5

Low power and low cost

The APS technology can be implemented using modern technology CMOS design. CMOS are current industry standard and have reached high level of maturity.
On-chip integration signal processing circuit is possible allowing APS imager to be
implemented with much less power. Also, CMOS based APS design uses latest fabrication flow making any future APS design to be much more cost effective.

1.5

Current APS architecture implementation for next
generation X-ray imager
Rapid research developments with APS technology to replace the CCD detec-

tors for future astronomical X-ray imager are currently ongoing in different research

101.5. Current APS architecture implementation for next generation X-ray imager

laboratories. Some architecture uses a hybrid structure where two wafers fabricatedseparately for photo detector and readout circuitry are bonded together. While otherarchitectures uses a single wafer for designing monolithic sensors with both photosensors and readout circuits together. Some on-going developments utilizing the APS
architecture are:

1.5.1

PSU/Teledyne hybrid CMOS pixel detector

Pennsylvania State University (PSU) in collaboration with Teledyne Imaging Sensor (TIS) is developing an X-ray hybrid CMOS detector. PSU’s hybrid CMOS pixel
detectors are based on TIS HAWAII hybrid silicon detectors designed for the detectionof optical/IR energy bands [33], [34]. Figure 1.4 shows the cross-sectional schematicof PSU/TIS hybrid CMOS X-ray detector. The absorbing layer is indium bump bonded
to the readout circuitry. The main advantages of hybrid detector are that both photosensitive layer and the readout chain can be optimized separately. The most recent
detector has shown excellent energy resolution of 156 eV at 5.9 keV and a readout
noise of 6.8 e− [33]. However, the inter pixel cross-talk due to compulsory requirementof bump bonding between absorber and readout adversely effects the overall detector
performance and X-ray energy resolution. Also, the minimum obtainable size of the
pixel is limited by the presence of large bump bonding [35].

Figure 1.4: Cross-sectional schematic of PSU/TIS hybrid CMOS X-ray detector. Top
layer is the silicon absorber for the photo detection. Bottom layer is CMOS readout
circuits for signal processing. Two layers are connected using bump bonding [8].

11

1.5. Current APS architecture implementation for next generation X-ray imager

1.5.2

MIT Lincoln laboratory 3-D integrated pixel detector

Lincoln Laboratory (LL) in MIT has developed hybrid silicon-on-insulator (SOI)based APS. Figure 1.5 shows the cross-section of a 3-D integrated MIT/LL hybrid
CMOS sensor. For the X-ray detection, silicon or the compound semiconductor devices used for photosensitive region are electrically connected with the SOI based
electronics using 3-D via. Handle substrate of SOI is removed and direct metallization
is done on top tier. Detector is thinned and back-side surface is passivated for backillumination operation [9]. Intra-pixel capacitance and pixel non-uniformities limits
the detector for X-ray performance analysis [36]. Readout noise at the pedestal peakof the spectra is 12.6 e−rms and energy resolution of 3.06% (181 eV FWHM) at 5.9 keV
is realized using a single pixel with multiple sampling.

Figure 1.5: Cross-section of a 3-D integrated MIT/LL hybrid CMOS sensor. Readout
circuit and detector tires are vertically interfaced through oxide-bonded interface andelectrically connected using 3-D via. Detector tier is thinned to 50 µm for 100% fill
factor [9].

1.5.3

Max Planck Institute DEPFET X-ray APS

The depleted p-channel field effect transistor (DEPFET) silicon active pixel sensor
developed by Max Planck Institute (MPI) [37] are used in the X-ray integral field unit
for high spectral resolution and wide field imager (WFI) for covering large field ofview for X-ray detection. DEPFETs are also currently being optimized for the futureapplicaion in the international linear collider (ILC) vertex detector [38]. Figure 1.6
shows the cross-section of the DEPFET pixel. Charge particle generated are collectedin an internal gate which is a potential minimum created by side-wards depletion and12

1.5. Current APS architecture implementation for next generation X-ray imager

n-type doping under gate. The device is fully depleted to achieve a maximum signal
for a given thickness. MPI DEPFET have achieved a depletion depth upto 450 µm but
the typical pixel size for DEPFET devices are 75-100 µm.

Figure 1.6: Cross-section of a MPI DEPFET pixel sensor. Internal gate is formed
under FET gate which collects the electron creating an additional charge carriers in thechannel leading to a modulation of the current. A n+ contact is placed on both edgesof the gate to remove the charge from the internal gate. [10].

1.5.4

SAO/Sarnoff monolithic pixel detector

The Smithsonian Astrophysical Observatory (SAO) and Sarnoff corporation, together has been engaged in multi-year research in a development of a monolithic
CMOS X-ray detectors for astronomy. The SAO has demonstrated X-ray spectroscopic
performance below 200 eV with a goal to have a fano limited spectral resolution over awide range (0.1-10 keV) of X-ray energy [11]. Figure. 1.7 shows the simplified depiction of the SAO/SRI monolithic NMOS six transistor pinned photo diode called BMIII
with a serial metal insulator metal (MIM) full-well range switching circuit. These devices were fabricated on custom 30 kΩcm, 10 µm thick epitaxial Si. CMOS fabrication
process limits the depletion depths to less than 15 µm making the device unsuitable forthe detection of X-ray greater than 10 keV.

13

1.5. Current APS architecture implementation for next generation X-ray imager

Figure 1.7: SAO/Sarnoff monolithic pixel detector. BMIII pixels has 6T PPD with serial MIM full-well range switching circuits. It has separate photo node and sense nodeto perform on-chip analog CDS. Fabricated device can be front- or back-illuminated.
[11].

1.5.5

Kyoto/Shizuoka/KEK SOI based X-ray detector

SOI based monolithic pixel detector for X-ray astronomy are currently being developed at Shizuoka University, Kyoto University along with other major universities(University of Miyazaki, Tokyo University of Science, The University of Tokyo) inJapan led by high energy accelerator research organization, KEK in collaboration with
OKI semiconductor co. ltd [21], [39], [40], [41]. Figure 1.8 shows the SOI pixel(SOIPIX) detector. SOIPIX is based on a modern industry standard using CMOS technology and offers unprecedented advantages over CCDs for X-ray astronomy detector.
This thesis describes the development of future X-ray imager for astronomicalsatellite mission designed in Shizuoka University in collaboration with Kyoto University. Design specification of the X-ray detector was co-determined by the Kyoto
University and Shizuoka University considering the added performance benefits fromSOIPIX. The performance requirement for our future X-ray astronomical satellite missions are shown in Table 1.1. The designed prototype chip described in this thesis havea chip size of 2.9 mm x 2.9 mm with the pixel pitch of 40 µm. Two different typeof pixel circuit for variable in-pixel gains are implemented and effective pixel array is14

1.5. Current APS architecture implementation for next generation X-ray imager

Figure 1.8: SOI Pixel Detector. Detector uses high resistivity silicon substrate with 0.2µm low-leakage fully-depleted SOI CMOS process. BOX is the buried oxide layer.
16x6 for each type of pixel circuit. The pixel design, circuit simulations and layoutof the designed chip for the tapeout were carried-out in imaging devices laboratory at
Shizuoka University. Fabrication of designed SOI-based pixel detector with pinned
depleted diode was done by Lapis semiconductor co. ltd led by KEK. Denken co. ltd.
did the packaging of the chip and final testing and evaluation of the designed prototype
chip for the X-ray spectroscopic performance was carried out in Shizuoka University.
Evaluation results from 55 Fe and 241 Am X-ray sources are shown for the characterization of the designed sensor.
Table 1.1: Required performance of next generation X-ray astronomical detector
Parameter
Chip size
Pixel pitch
Energy range
Energy resolution
Time resolution
Readout noise

Required performance value
25 mm x 25 mm<100 µm,
Typical: 30 µm-60 µm
0.3-40 keV
140 eV @ 6 keVFull frame: < 10 ms,
Window readout: < 10 µs
Target: < 10 e−rms ,Goal: < 3 e−rms

151.6. Organization of thesis

1.6

Organization of thesis
Majority of this dissertation will be on the background, design and characteriza-tion of SOI-based pixel detector for next generation astronomical satellite. This thesis
consists of seven chapters. Chapter 1 introduced the research background and motivation for the development of detector future satellites mission. X-ray astronomicalsatellites detector requirement is also described highlighting some current progress inthe detectors design using the aspect of APS technology.
In chapter 2, design of SOI-based detector for X-ray astronomy using the 0.2 µm
CMOS fully depleted- (FD-) SOI technology is introduced. SOI pixel detector withpinned depleted diode structure is used in our designed sensor. Simulation results using
a device simulator SPECTRA are shown to summarize the detectors advantage forstable operation of circuits, high charge collection efficiency and low node capacitance.
Chapter 3 presents two different type of pixel circuits for achieving low noise
and wide range of X-ray energy detection. Working principle of both continuous time
integration and charge sensitive amplifier pixels are described. Also, complete design
technique to achieve variable in-pixel gain and their results are shown.
Design of low-noise detector and readout circuit is essential for achieving highspectral performance of X-ray detector. Chapter 4 shows the dominant noises in our
SOI-based detector circuit. A low-noise design of pixel circuit and the technique ofsystem-noise reduction are introduced.
In chapter 5, performance evaluation of variable gain pixel circuits designed using
pinned depleted diode SOI pixel is shown. Sensor linearity is measured with a whitelight generated by LB-8611A precision light box. Also, the estimation of equivalent
conversion gains for two types of pixels is shown. High conversion of the circuit isused for improved spectroscopic X-ray performance. Dark current measurement of
the designed detector presented in chapter 5 highlights the advantages of using pinned
structure nested well structure in the detector.
X-ray spectroscopic performance of the designed sensor is presented in chapter
6. Two radio isotopes (55 Fe and 241 Am) are used for the characterization of the sensor. Using low-noise design with in-pixel dual gain circuit, very high resolution X-ray
16

1.6. Organization of thesis

detection is possible. Technique to reduce the system-noise is useful and the measurement results shows a readout noise of 8.5 e−rms is achievable.
In chapter 7, a conclusion of this study and a future work is presented.

17

Chapter 2
SOI Based Pixel Detector with Pinned
Depleted Diode
2.1

Introduction
Imaging devices using SOI technology has recently emerged as serious contenderfor low-power high-performance applications [42], [43] and leading industry companies (Sony, STMircoelectronics, Samsung, etc) has been pondering the use of FD-SOI
wafers in a manufacturing image senor processors (ISPs) for a chip stacked CMOS
image sensor (CIS) [44]. In this chapter, the SOI pixel structure used for an X-ray
imaging is presented. The evolution of a nested multiple-well structure SOIPIX withpinned depleted diode using the performance benefits of conventional SOIPIX used for
the X-ray detection is described.

2.2

SOIPIX for X-ray detection
The SOI pixel detector is based on 0.2 µm CMOS fully depleted- (FD-) SOI tech-

nology [39], [21].The SOI technology offers a unique structure of two different Si
layers in a single wafer. Handle wafer of the SOI is used for the pixel detector withhigh resistivity silicon substrate. SOI CMOS readout circuits use a low to moderate resistivity substrate and are implemented on thick insulating oxide layer. Absence of extra mechanical bonding between detector and readout avoids any intra-pixel crosstalk.
For the realization of the deep depletion, a very good charge collection efficiency anda constant electric field throughout the layer, an epi silicon with a high resistivity isused [45]. Unlike the bulk CMOS, SOI CMOS circuits on the top are fully depleted toevade any latch-up mechanism and leakage path. This results SOI circuits to be more18

2.3. Conventional SOIPIX

power efficient and highly reliable to work over a large range of temperature ranging
from 4 to 600 K. Also, SOI circuits use the thin gate oxides for significantly improved
radiation tolerance [46]. Backside illumination for the X-ray photon energies less than
10 keV can be very advantageous to avoid the any absorption by the gate oxide andelectrode structure [47]. Also, backside illuminated detectors have uniform quantum
efficiency (QE) over a detection area. Much higher integration density is possible with
an emerging 3-D integration technique making a SOI as natural extension for highprocessing required in high-energy detection for any foreseeable future. Vertical integration is very much desirable in pixel application as pixel processing functionally canbe increased in the integrated circuits without the need for the increase in pixel size.

2.3

Conventional SOIPIX
Figure 2.1 shows the conventional SOI pixel structure with a high resistivity sub-strate and a p+ detector/sense node. In the figure BPW is a buried p-well. BNW isa buried n-well. And, VBB is a back bias voltage. The n-type substrate is used in thedetector for the X-ray detection where holes are collected as a carrier charge into thesense node. When a X-ray radiation is absorbed in the substrate region an equivalent amount of electron-hole pairs are generated and holes are collected into the sense
node. A BNW is placed at the pixel boundary as a channel stop to reduce the intra-pixel
interference. Collecting the charge into one pixel without share between the pixels improves the overall spectral performance. High charge collection efficiency is required
for all generated charges to be collected into a detector. Dividing charges over multiple
pixels decrease the SNR. The photosensitive region must be fully depleted for drifting
the charge towards the sense node. In order to fully deplete the substrate, high substrate voltage is applied at the back surface (VBB ). The depletion depth of the detector
when VBB is applied is given bysXD =2o r (Vbi + VBB )
qND

19

(2.1)

2.3. Conventional SOIPIX
where, o is permittivity in space, r is relative permittivity of Si, Vbi is built in potential
given by
NA ND
kT
Vbi =
ln
q
n2i

!
(2.2)

and ND is the concentration of donor atom and is defined by the detector substrate
resistivity (ρ) and is given by
ND =1
q · µD · ρ(2.3)

Higher VBB than estimated by 2.1 for the substrate depletion depth (XD ) is used in theactual measurement to make sure that all the detector area is fully depleted and to havehigh charge collection efficiency.
Because of the presence of buried oxide (BOX) in the area under the transistor,
substrate voltage acts as a back gate effecting in the threshold voltage shift and leakage
current in the transistor. However, the thick BOX (∼200 nm) at the back of the transistor has smaller impact to the circuit operation than front gate oxide (∼4 nm). However,while applying very high voltage at the substrate (VBB ) the back gate effect cannot be
neglected as it impacts negatively to the circuit performance. A buried p-well (BPW)
under the circuit area was introduced to suppress the back gate effect for the stable circuit performance. While, the introduction of a BPW minimizes the back gate effect, italso creates a capacitive coupling between BPW and SOI pixel circuits. Thus, when an
X-ray hits the detectors area the top CMOS circuit performance could still be effected
and produces an unstable circuit performance.
The BPW in the sense node needs to be large enough to increase the charge collection sensitivity area near the detection node. Increasing the BPW area in the sense
node increases the total node capacitance. Noise of the detector depends on the detector node capacitance. In the case of source amplifier type circuit the node capacitancealso determines the equivalent conversion gain. Thus, large capacitance directly implies the higher noise and low conversion gain. Trade-off between the charge collection
efficiency and noise has to be done when using the conventional type SOIPIX detector
structure.
20

2.4. SOIPIX-PDD with single n-well structure

Figure 2.1: Conventional SOIPIX. p+ is a sense node and n−− is a n-type Si substratewith high resistivity. BOX is the buried oxide layer.

2.4

SOIPIX-PDD with single n-well structure
SOIPIX series used in X-ray detection (XRPIX) have been using conventional

pixel structure. The charge sensing node is made with a BPW at the back-gate surface of the high-resistivity Si substrate. The back-gate surface is fully depleted whichleads to the large dark current due to trapped charges in the interface surface. Whilemaintaining the fundamental merit of SOIPIX, detector with a pinned depleted diodestructure is developed with an added performance benefit compared to the conventional
SOIPIX. Figure 2.2 shows the new implementation of SOIPIX using pinned depleted
diode (SOIPIX-PDD). SOIPIX-PDD uses n+ at the sense node and electron as charge
carrier.
The BPW area under the circuits is made larger and is also highly doped. BPW
is supplied with a fixed bias voltage (VBPW ) for pinning the back-gate voltage under
BOX of SOI CMOS transistors to a constant potential. This neutral region of highly
doped BPW is effective for reducing the amount of dark current generation at Si-SiO2
interface under the thick BOX by filling the interface traps with relatively high-density
holes of BPW at the Si surface. This concept works similar to pinned photo-diode in21

2.4. SOIPIX-PDD with single n-well structure

Figure 2.2: Cross-sectional view of the SOIPIX-PDD. A n+ is sense node and n−− is a
Si substrate with high resistivity. BOX is the buried oxide layer.VBB and VBPW are bias
voltages at BPW and back side respectively.
CCD and CMOS image sensors [48]. Also, BPW acts as a shielding layer between
the top SOI circuits and charge detector. The isolation helps in the stable circuit operation by reducing the threshold voltage shift and also prevents any noise and offset
generation due to coupling.
Figure 2.3 shows the SOIPIX-PDD structure with a single buried n-well (BNW)
along with its expected vertical and horizontal potential distribution. X1 -X1 ’ and X2 X2 ’ are the horizontal potential below (Z∼ 10 µm) and near the surface (Z∼ 0 µm) of
the detector respectively. X2 -X2 ’ shows that potential is fixed to -VBPW on the surface
except in the detection region. BNW creates a lateral electric field as shown by thehorizontal potential profile X1 -X1 ’. Z1 -Z1 ’ is the vertical potential along Z-axis. It
shows that sense node n+ has the highest potential. In order to minimize the leakage
current from BPW to back-side p+ layer, a sufficiently large potential barrier φb to holes
is necessary. Pinning the BPW to a fixed bias voltage provides the required potential
barrier to avoid any punch-through for current leakage.
Fabrication of the SOIPIX-PDD follows the conventional SOI process to form
the top SOI CMOS circuits. BOX layer initially formed is then opened to implant222.4. SOIPIX-PDD with single n-well structure

Figure 2.3: SOIPIX-PDD with their potential profile along X-axis and Z-axis. Potential profile on the right shows the vertical potential distribution along cross-sections
Z1 -Z1 ’ and Z2 -Z2 ’. Potential profile below the detector shows the horizontal potential
profile along cross-sections X1 -X1 ’ and X2 -X2 ’.
the p+ and n+ dopant in the detector substrate. A metallization steps is performednear the end step of fabrication. After the metallization steps is over, special process
step is required for depositing aluminum/p+ at the backside of the substrate. This
special backend process is done with laser annealing using an optical power at a very
high temperature from 600◦ C to 1000◦ C. If the deposition of p+ is not proper, it canbe a source for dark current generation. In the SOIPIX-PDD with high reisitivity nsubstrate, the formation of depletion starts from the back-side of the substrate and will
have very high electric field near backside of the substrate. The high electric field iscreated because of depletion. The e-h pair generated at the backside of the substrate
due to the dark current will not recombine. Also, the high electric field helps to detect
the X-ray with small energy showing high charge collection efficiency for soft X-ray
energy band. However, the electric field near the detector surface is low as shown in
Figure 2.4a. If the substrate near the detector surface is not fully depleted, the dark
23

2.4. SOIPIX-PDD with single n-well structure

current near the surface will have severe effect on the noise floor of the sensor. Highdark noise will be undesirable for operating the sensor at higher temperature. In orderto have low dark current near the surface, high resistivity p-substrate is used in SOIPIXPDD. Figure 2.4b shows the SOIPIX-PDD with p-substrate and its vertical potential
for different VBB . Depletion formation is front-side which makes the electric field near
the surface to be high which helps in the reduction of the the dark current generationand leakage current near the surface. Evaluation results from p-type substrate is used
for the characterization of the sensor.

(a)

(b)

Figure 2.4: Potential along Z2 -Z2 ’ axis for SOIPIX-PDD with high reisistivity n- and psubstrate. (a) SOIPIX-PDD with n-substrate along with vertical potential for different
VBB . (b) SOIPIX-PDD with p-substrate along with vertical potential for different VBB .

24

2.6. Simulation results

Table 2.1 summarizes the direct comparison of SOIPIX-PDD with high resistivity
n-substrate with high-resistivity p-susbtrate.
Table 2.1: Performance comparion of SOIPIX-PDD with high-resistivity N-substrateand P-substrate
Parameter
Depletion
Charge collection efficiency
Dark current
Leakage Current

2.5

SOIPIX-PDD: N-Type (Fz-n)
Back-side
High
High
High

SOIPIX-PDD: P-Type (Fz-p)
Front-side
Low
Low
Low

SOIPIX-PDD with multiple buried wells
The SOIPIX-PDD with multiple buried wells is shown in Figure 2.5. Detector

has two buried p-well (BPW1 and BPW2) and three buried n-well (BNW1, BNW2and BNW3). Designed multiple nested-well structure under the BOX layer createsa large step-wise lateral electric field [41]. The lateral electric field provides a fastand easy path for the generated charge by the X-ray to be successfully collected into
the detector node [49], [50]. The graded step-wise electric field helps in fast chargetransfer time and large BNW3 increases the charge sensitive area for high the collection
efficiency. The small node capacitance only due to n+ and small part of BNW nearn+ is realized by fully depleting the wells under BPW (BNW1, BNW2 and BNW3).
Low charge sensing capacitance results into a low readout noise. BPW2 and step-wiselateral electric fields helps in isolating the pixel for minimizing the inter-pixel crosstalknear the surface of the detector.

2.6

Simulation results
The designed prototype chip uses SOIPIX-PDD with multiple nested well struc-ture. It has a pixel size of 40 µm x 40 µm. In order to achieve a high quantum efficiency
for the detection of high energy X-ray (e.g. >10 keV), a detector with high resistivity and thick depletion layer is required [25], [50]. Developed detector has a high-25

2.6. Simulation results

Figure 2.5: Cross-sectional view of SOIPIX-PDD with multiple buried wells. Horizontal and vertical cross-sections are indicated for simulation.
resistivity substrate of >25 kΩcm and a thick depletion layer of 200 µm. Figure 2.6
shows the layout of the designed detector.
In order to confirm the detector performance for the target application (wide rangeof X-ray detection), potential profiles of SOIPIX-PDD with the layout structure shownin Figure 2.6 are simulated by a device simulator SPECTRA. The pattern edges of
BNW1 (octagonal, positive tone) is located at 1.5 µm, BNW2 (octagonal, positive tone)at 15 µm, BPW1 (octagonal, negative tone) at 3 µm and BPW2 at 9 µm. The voltage at
the charge detector (n+ ) is set at 3.0 V and the pinning voltage at BPW (VBPW ) is -4.0
V. Also, the voltage on the substrate at backside (VBB ) is set to -60 V to fully deplete
the detector from the surface to the backside of the substrate. The VBB is much higher
than actual calculation (∼ 5 V) is applied to make sure that all the detector area is fully
depleted and to have high charge collection efficiency.
Figure 2.7 shows the simulated potential profile in vertical and horizontal direction of SOIPIX-PDD. Potential distribution along the cross-sections Z4 -Z4 ’, Z3 -Z3 ’,
Z2 -Z2 ’ and Z1 -Z1 ’ at X = 20 µm, X = 16 µm, X = 5 µm, and X = 0.2 µm, respectively
262.6. Simulation results

Figure 2.6: Layout of SOIPIX-PDD pixel with multiple buried wells. The pixel size is
40 µm x 40 µm. n+ is a sense node. p+ is a channel stop pinned to fixed bias voltage
VBPW .
are plotted.
Figure 2.7a shows the vertical potential from the surface to 200 µm (total depletion depth) and and Figure 2.7b shows the zoomed vertical potential from the surface
to 10 µm. Potential profile along the cross-section of Z4 -Z4 ’ helps to transfer the generated charge deep inside of silicon substrate into the n+ sensing node while potentials
along Z3 -Z3 ’, Z2 -Z2 ’ and Z1 -Z1 ’ are pinned to VBPW (-4 V). This pinning voltage creates a potential barrier (φb > 2 V) sufficiently large enough to prevent the hole injection
from BPW1. Horizontal potential profile simulations along the cross-sections of X2 X2 ’ and X1 -X1 ’ are shown in Figure 2.7c. Cross-section X2 -X2 ’ at surface (Z = 10 µm)
shows the back-gate under BOX is pinned to VBPW except near the sensing node (n+ ).
The potential profile of the cross-section X1 -X1 ’ aids in the formation of lateral electricfield to collect the carrier into a detector sensing node resulting in fast and improved
charge collection.
The generated charge is directed towards the surface due to vertical potentials andthen horizontally transferred to the sense node using the surface lateral electric field.
A 3-D plot along horizontal and vertical with their potential near the surface of 10 µm

27

2.6. Simulation results

(b)

(a)

(c)

Figure 2.7: Potential profile simulation of SOIPIX-PDD. (a) Vertical potential distribution from surface to 200 µm. (b) Vertical potential distribution from surface to 10 µm.
(c) Horizontal potential distribution. Cross-sections X2 -X2 ’ is at Z = 0 µm and X1 -X1 ’is at Z = 10 µm.
is shown in Figure 2.8. The shape of the potential profile and large sensitive region
that collect carriers in the entire 3-D volume of the pixel illustrates the high chargecollection efficiency of the detector.
Electrons are randomly placed in 3D space at (X, Y, Z) = (1, 1, 190), (18, 18, 195),(24, 18, 20), (25, 25, 190), (30, 30, 190) and a hole is place at (12, 18, 5) to confirm thepotential path of the generated charge. Figure 2.9 portrays the equipotential plot for
the electron and hole path. Here, the electrons generated deep into the Si are pushed
towards the detector node and holes are drifted to the backside of a detector.
Potential profile simulation using the device simulator SPECTRA is also useful toestimate the capacitance of the n+ sensing node (CD ). The quasi-fermi level is changed
during SPECTRA simulation and the resulting changes in the accumulated electrons28

2.6. Simulation results

Figure 2.8: 3-D potential profile simulation of the SOIPIX-PDD nested well structureneat the surface with 40 µm pixel pitch. Blue line shows that an expected generated
charge will be collected at charge detector node.

(a)

(b)

Figure 2.9: 2-D (X-Z) equipotential plot. (a) Electron and hole path for Z = 0-200 µm.
(b) Electron and hole path for Z = 0-10 µm.
are calculated. The detector node capacitance is given by
CD =

Q sig
∆VNFERMI
29(2.4)

2.7. Summary
where, Q sig is quasi-accumulated electrons and ∆VNFERMI is the quasi-fermi level change.
Figure. 2.10 shows that when the quasi-fermi level is changed from 2.5 V to 1.5 V, theequivalent number of electron (∆N sig ) change is around 24000. Thus, the CD can be
estimated asq∆N sig∆VNFERMI
1.602x10−19 x24000=
2.5 − 1.5

CD == 3.8 f F

(2.5)

Figure 2.10: Estimation of detector capacitance.

2.7

Summary
SOIPIX-PDD with multiple nested wells is designed using 0.2 µm CMOS fully

depleted- (FD-) SOI technology. The designed detector offers remarkable advantages
over conventional SOIPIX detector. Pinning the BPW under BOX to a fixed bias voltage reduces the dark current generation and helps in minimizing the leakage currents.
BPW layer also isolates the detector area from top SOI CMOS circuits which helps
to achieve a stable circuit operation. BNW layer (BNW1, BNW2 and BNW3) forms
a large lateral electric field near the surface of the detector for high charge collection
efficiency. Also, fully depleted hi-resistivity p-type substrate is used for an accurate
X-ray energy measurement.
30

Chapter 3
Event-Driven Pixel Circuits for X-ray
Imaging
3.1

Introduction
Design of pixel readout circuit for realizing low-noise and wide-dynamic-range

signal detection is important for high spectral performance of the imager. This chapter
presents the pixel readout circuit used for the wide range of X-ray energy detection.
We will describe the working principle of event-driven circuit with two different pixel
circuit configuration for achieving multi in-pixel gain.
SOIPIX-PDD utilizes the added benefits of APS allowing the window readout of
the interest pixel. High time resolution is highly desirable in any future X-ray astronomical imager. Figure 3.1 shows the architecture of an event-driven pixel circuit.
Unit pixel is divided into two different parts: event detection part and signal sensing
part. The event detection part of the pixel detects the arrival of an incoming energy
signal while the signal sensing part of the pixel processes the incoming energy signal
and provides the required gain. Every pixel consists of an event trigger circuit for thedetection of the X-ray hit. Event scanner scans the position of the hit pixel and the
pixel data is readout using the pixel readout circuit. The event detection circuit also
categorizes the incoming signal into two energy groups for applying a selective gain
for wide range of X-ray detection. A detailed working principle of the event detection circuit is described in the section 3.2. Two different type of test pixel circuits are
implemented which can dynamically select the variable in-pixel gain on the event ofsignal detection. A pixel circuit with continuous time integration amplifier is explainedin the section 3.3 and a pixel circuit with charge sensitive amplifier is described in thesection 3.4.

31

3.2. Event detection circuit

Figure 3.1: Architecture of an event-driven pixel circuit. Unit pixel has an event detection and a signal sensing part. Solid lines are wired connection while dashed lines
from the logic circuits are virtual connection for the selection of a variable gain.

3.2

Event detection circuit
Figure 3.2 shows the circuit for an event detection part of the pixel. Refer to theappendix A.1 for a circuit level implementation of an in-pixel event trigger circuit.
It has comparators and logic circuits for the detection of incident high energy and to
separate the incoming energy into two energy groups. Two cascode chopper type inverters are used in series for higher sensitivity of the event detection. VT1 and VT2
are two threshold voltages. VT1 is set above the minimum noise floor to detect theincoming energy greater than minimum detectable X-ray energy. VT2 is used for determining if the incoming energy is low or high above the set threshold voltage. Eventsignals (EVENT_H, EVENT_V) are triggered after the signal arrives greater than VT1 .
After an event is detected, threshold for separating the energy level (VT2 ) is appliedand a FLAG signal is triggered. A FLAG signal is bit coded indicating for low orhigh energy. In an event driven mode of a circuit operation, signals from EVENT_H,
EVENT_V determines the position of the hit pixel and bit-coded FLAG signal is used
for the selection of the in-pixel gain setting.
32

3.2. Event detection circuit

Figure 3.2: Event detection circuit. VT1 and VT2 are threshold voltages. VX is thesignal from the detector. EVENT_H is the horizontal event and EVENT_V is thevertical event signal. FLAG is the signal for indicating low or high incoming energy.

3.2.1

Working principle

Two inverters (COMP1 and COMP2) are cascaded in series for the comparisonof incoming signals with the set threshold voltages. Capacitor C5 isolates the two
inverters and samples the offset after the reset for avoiding the false trigger. Ci is
the intrinsic capacitor of the input transistor of a comparator. RS latch and D latch
are used for event signal state and flag signal state respectively. Both latches are left
inactive during the reset phase. EN_COMP should be kept low during reset whichmakes RS-latch to be turned off which prevents the latch from getting any false data.
Two different cases of reset and signal states are
Case 1 (Reset Phase) :Figure 3.3 shows the configuration of the trigger circuit during reset phase. During a
reset phase, reset voltage from the pixel Vin (R) is sampled in the bottom plate of thecapacitor C3 and the part of the reset offest is sampled in the top plate. The switch
φRC is turned ON and voltage VRC is applied. If VC∗ is the voltage at the input of thecomparator during reset, the total net charge during reset is given by
Qnet1 = C3 (VC∗ − Vin (R)) + C4 (VC∗ − VRC ) + Ci (VC∗ − 0)
= VC∗ (C3 + C4 + Ci ) − C3 Vin (R) − C4 VRC

33

(3.1)

3.2. Event detection circuit

Figure 3.3: Case 1: Reset phase. VRC is the reset voltage for the comparator. Vin (R) is
the reset signal from the detector.
Case 2 (Signal Detection Phase) :Figure 3.4 shows the configuration of the trigger circuit during signal detection phase.
After reset phase is over, the switch φRC is turned OFF and the switch φVT 1 is turned
ON and voltage VT1 is applied. When the X-ray energy arrives into the detector, theequivalent signal voltage Vin (S) is generated in the detector. If VC is the voltage at the
input of the comparator during signal detection phase, the total net charge is given by
Qnet2 = C3 (VC − Vin (S )) + C4(VC − VT 1 ) + Ci (VC − 0)
= VC (C3 + C4 + Ci ) − C3 Vin (S ) − C4 VT 1

(3.2)

Figure 3.4: Case 2: Signal phase with VT1 selected for X-ray detection., VT1 is thethreshold voltage for signal detection.

34

3.2. Event detection circuit

From the charge conservation law, the net charge from equations 3.1 and 3.2
should be equal and is given by

Qnet1 = Qnet2
VC∗ (C3 + C4 + Ci ) − C3 Vin (R) − C4 VRC = VC (C3 + C4 + Ci ) − C3 Vin (S ) − C4 VT 1
(C3 + C4 + Ci )(VC − VC∗ ) = C3 Vin (S ) − C3 Vin (R) + C4 VT 1 − C4 VRC
C3VC − VC∗ =Vin (S ) − Vin (R)C3 + C4 + Ci
C4+
VT 1 − VRC
C3 + C4 + Ci
C3
Vin (S ) − Vin (R)VC − VC∗ =C3 + C4 + Ci

C4 
+
VT 1 − VRC(3.3)
C3
In equation 3.3, VC − VC∗ represents the amount of signal change after an X-ray isdetected. For an electron as signal charge carrier, VC∗ is greater than VC . If an X-ray isdetected, VC − VC∗ becomes less than zero and VC − VC∗ is always zero or greater thanzero when there is no event. Thus, an event signal can be represented as




C4


 “1" if Vin (S ) − Vin (R) + C3 (VT 1 − VRC ) < 0
EV ENT H,V =  “0" if Vin (S ) − Vin (R) + C4 (VT 1 − VRC ) ≥ 0
C3

(3.4)

After the event signal is detected, the threshold voltage is changed from VT1 to
VT2 for the evaluation of the signal strength. A flag signal is used for categorizing thesignal strength into two groups of low and high energy. VT2 is set to the mid energy
level of low and high energy to bit code the FLAG signal. FLAG signal is given by




C4


 “1" if Vin (S ) − Vin (R) + C3 (VT 2 − VRC ) < 0
FLAG =  “0" if Vin (S ) − Vin (R) + C4 (VT 2 − VRC ) ≥ 0
C3

(3.5)

The timing diagram of the event detection circuit is shown in Figure 3.5. After the
reset phase is over, switch φVT 1 is turned ON and wait for the signal to arrive. When
X-ray energy is injected in the detector, EVENT signal goes high indicating the arrival35

3.3. Continuous time integration variable gain pixelof X-ray event. Once the event signal is detected, switch φVT 2 is turned ON. FLAGsignal will then be bit coded to classify the energy into low and high.

Figure 3.5: Event detection timing diagram. RT is the pixel reset pulse. RST_COMP1
and RST_COMP2 are the reset pulses for the two inverters.

3.3

Continuous time integration variable gain pixel
Figure 3.6 shows the circuit for the signal sensing part of the pixel using continu-

ous time integration (CTI) amplifier for achieving variable in-pixel gain. Refer to theappendix A.2 for a circuit level implementation of pixel circuit with CTI. Circuit uses
the SOIPIX-PDD for the X-ray detection. Pixel circuit has an in-pixel amplifier andtwo sampling circuits for low and high gain signal sampling. Each pixel has embedded trigger circuit for the event detection. Reset switch (RT) of the pixel amplifier issurrounded with fixed VR voltage in the layout design to avoid the leakage current andhelps to keep the voltage at node VIN to be VR during waiting phase of the pixel for an
event arrival.

36

3.3. Continuous time integration variable gain pixel

Figure 3.6: Variable gain continuous time integration pixel circuit. RST_PD is thedetector reset transistor. RT is the reset transistor to reset charge integration pixel
amplifier.

3.3.1

Working principle

In CTI pixel, the low and high gain sampling capacitors are used as integrating capacitors where a voltage in the capacitor depends on the integration time (TINT ) during
charging. In a reset phase of the pixel, charges from both integrating capacitors (CS :CSH and CSL ) are discharged. Figure 3.7a shows the condition when switches φS H,Land φ1 are turned ON. After the reset, the voltage at CSH,L is fixed to VB_SHIFT .
Figure 3.7b shows the condition when switch φS H,L is ON and φ1 is OFF. Gainof the circuit depends on the turn-on time of the switch φS H,L . During TINT , charge
is integrated into the integrating capacitor. If gm is the transconductance of the input
transistor of the pixel amplifier with a drain current ID and TINT is the charge integration

37

3.3. Continuous time integration variable gain pixel

time, then the final output voltage is given by
ID
T INT
CS
gm VIN=T INT
CS

VH,L (T INT ) == GS VIN(3.6)

where, GS is the gain of the CTI pixel circuit and is given by
GS =gm T INT
CS

(a)

(3.7)

(b)

Figure 3.7: Working of charge integration pixel amplifier for gain sampling. (a) Discharging of integrating capacitors. Switches φS H,L and φ1 are turned ON. (b) Gainsampling in the integrating capacitor. Switch φS H,L is ON and φ1 is OFF.
The response of the pixel output for different input voltages are shown in Figure 3.8. During the integration period, gain is set by the time during which a current(ID ) flows to the capacitor CS proportional to the input voltage (VIN ). The timing diagram of CTI pixel circuit is shown in Figure 3.9. Refer to the appendix B.1 for the one
frame timing diagram of CTI pixel in-conjunction with column readout and periphery
circuit. During reset, detector floating node is reset to VRST and in-pixel charge integration amplifier is reset to VR . Both high and low gain reset values are sampled. After the
X-ray event is detected, signal value with designated gain is readout. In frame readout
mode signal with the fixed gain-setting is readout at 1 ms of accumulation time.

38

3.3. Continuous time integration variable gain pixel

Figure 3.8: Output response of the pixel with respect to time for different input voltage.
Time T1 to T2 is CS discharge period. Time T2 to T3 is gain period for the incoming
signal.

Figure 3.9: CTI pixel timing diagram

3.3.2

Estimation of conversion gain of CTI pixel circuit

The estimation of conversion gain (GC ) for a CTI pixel circuit can be straightforward if the detector capacitance is known. Figure 3.10 shows the equivalent circuit model of the SOIPIX-PDD with a source follower (SF). If CD is the detector
capacitance, Ci is the intrinsic capacitance of the input transistor of the SF, then the39

3.3. Continuous time integration variable gain pixel

conversion gain of the pixel can be estimated asGC =q
C D + Ci

(3.8)

where, q is the elementary charge (≈ 1.602x10−19 ). And, the equivalent input voltage
for the ∆QD amount of charge produced by the input energy is given by
∆Vi =

∆QD
C D + Ci

(3.9)

Figure 3.10: Equivalent circuit for the conversion gain estimation in CTI pixel.

3.3.3

Simulation results of CTI pixel circuit

Figure 3.11 shows the photo diode model used for a simulation of the CTI pixel
circuit. IT ES T is the constant current source for an equivalent X-ray signal injecting
the charge by the trapezoidal input. Equivalent charge generated by the input X-ray
energy is given by the shaded area of the trapezoid and expressed as
QC = IT ES T xT ime(3.10)For instance, an X-ray energy generated from the Cadmium-109 (109 Cd) source of 22.2
keV, silicon generates about 6082 e− corresponding to the equivalent current of 195 nA
for the time of 5 ns trapezoidal input. Table.3.1 shows the parameters used in the testbench for the simulation the CTI pixel.
40

3.3. Continuous time integration variable gain pixel

(a)

(b)

Figure 3.11: Photodiode model for pixel circuit simulation. (a) Pixel with detector
capacitor (CD ). (b) Trapezoidal test input for an equivalent input energy.
Table 3.1: Simulation parameters for the CTI pixel circuit
Parameter
Node capacitance (CD )Pixel Amplifier Current (ID )Pixel reset voltage (VRST )Pixel amplifier reset voltage (VR )

Value
5 fF
0.5 µA
3.0 V
2.5

For the characterization of the CTI pixel circuit, output after the final SF is sampled for different energy. Figure 3.12 shows the pixel output for different input energy.
Output for different integration time (0.1 µs, 0.5 µs and 1.0 µs) illustrating different
gain are plotted along side. Equivalent gain of the CTI pixel for different TINT can be
estimated using the linearity plot shown in Figure 3.12 at the particular linear energy
range. Table 3.2 shows an estimation of the gain for different TINT obtained from thelinearity plot during the simulation and Figure 3.13 shows the plot for the conversion
gain for different TINT . The output response of the gain for different TINT is linear.
Thus, a high-gain setting for a low input energy can be applied for achieving high
SNR.
Table 3.2: Estimated gain for different TINT
TINT (µs)
0.1
0.4
0.6
1.0

Gain (µV/e-)
25.94
104.41156.47253.33

TINT (µs)
0.2
0.5
0.8

41

Gain (µV/e-)
52.06
130.58206.733.3. Continuous time integration variable gain pixel

Figure 3.12: Linearity plot. Output response for different TINT simulated for wide
range of input energy.

Figure 3.13: Gain vs TINT . Gain is linear with TINT .

42

3.4. Charge sensitive amplifier dual-gain pixel

3.4

Charge sensitive amplifier dual-gain pixel
We have also developed a pixel circuit with the dual-gain charge sensitive ampli-

fier (CSA) in our prototype chip. Figure 3.14 shows a unit pixel with two selective
feedback capacitors (CFB ) C1 and C2 . Refer to the appendix A.3 for a circuit level implementation of pixel circuit with CSA. Each pixel consists of a reset transistor (RT),two sampling circuit for low- and high-gain setting, two source followers and a select switch for readout of low or high sampled gain output and an in-pixel comparator
circuit for the event detection and signal strength categorization. For the detection ofwide range of X-ray energy, SOIPIX-PDD detector is used.

Figure 3.14: Dual-gain CSA pixel circuit. CSA is in-pixel charge sensitive amplifier.
RT is the reset transistor. C1 and C2 are the selective feedback capacitors. CSL and CSH
are two sampling capacitors for low and high gain sampling, respectively. SF1 andSF2 are source followers and SEL is select switch for selecting one of the low or highgain outputs for readout.
CSA pixel circuit uses a cascode common-source amplifier and its circuit is shownin Figure 3.15a. Common-source amplifier with cascode structure is used for achieving
a high gain. Figure 3.15b shows the internal amplifier gain characteristics to output
43

3.4. Charge sensitive amplifier dual-gain pixel

voltage (VX ). Using the simple circuit topology, the open-loop DC gain of over 40 dB
is obtained for the operating range of 0.7 V to 2.8 V. A wide voltage swing of 2.1 V
can be achieved within the pixel.

(b)

(a)

Figure 3.15: Internal pixel amplifier circuit and its gain response with output voltage.
(a) Cascode common-source amplifier (b) Gain vs output voltage. Operating range(gain > 40 dB) is 0.7 V to 2.8 V.

3.4.1

Working principle

In the case of CSA pixel, the gain of the pixel amplifier is high enough to create avirtual ground at the input of the amplifier. Thus the voltage at the input node does notchange when the charge is detected. Figure 3.16 shows the path of the generated charge
from the detector. Ideally, none of the charge generated from the detector are collectedin the parasitic capacitance created in the detector node. All generated charges aretransferred to feedback capacitor. So, the feedback capacitor is solely responsible todetermine the equivalent conversion gain of the circuit.
In order to realize the two different gains, the circuit is used in two different configuration. The switch φG is used to select the total feedback capacitance in the circuit.
The conversion gains for two circuit configuration shown in Figures 3.17 and 3.18 aregiven by44

3.4. Charge sensitive amplifier dual-gain pixel

Figure 3.16: Equivalent circuit for the conversion gain estimation in CSA pixel.

Figure 3.17: High-gain configuration. φG = 0, high-gain setting. Total feedback capacitor is 0.5 fF (CFB = C1 ).

Figure 3.18: Low-gain configuration. φG = 1, low-gain setting. Total feedback capacitor is 2 fF (CFB = C1 + C2 ).

45

3.4. Charge sensitive amplifier dual-gain pixel
Case 1: φG = 0
qG AMP
Ct + (C1 )G AMP + C2
q=(For, G AMP >> 1)
C1

GC1 =

(3.11)

Case 2: φG = 1
qG AMP
Ct + (C1 + C2 )G AMPq=(For, G AMP >> 1)
C1 + C2GC2 =(3.12)

where, GC1 and GC2 are the conversion gains for high- and low-gain setting, respectively, q is the elementary charge (≈ 1.602x10−19 ), GAMP is the open loop DC gain of
the CSA, Ct is the total parasitic capacitance at the input of the CSA which includes
the SOIPIX-PDD detector capacitance (CD ) and the input capacitance (Ci ) of the internal cascode common-source amplifier. With C1 = 0.5 fF and C2 = 1.5 fF, the expected
conversion gains for Equations 3.11 and 3.12 are 320 µV/e- (GC1 ) and 80 µV/e- (GC2 ),respectively. However, in the actual implementation, the total parasitic capacitance andthe attenuation in the signal will limit the achievable ideal conversion gains. But, sufficiently large conversion gains of GC1 > 150 µV/e- and GC2 > 50 µV/e- are expectedin our experimental measurement of the designed prototype chip.
For wide range of energy detection, full linear operating range of the CSA must
be utilized. The designed CSA amplifier has a linear operating range of 2.1 V (0.7 V
to 2.8 V) for a DC gain greater than 100 (Figure 3.15b). But, the actual dynamic range
depends on different circuit voltage swing limitation on the readout path and the initial
output voltage during the reset of the detector. In order ensure the initial output voltage
to be as small as possible but higher than 0.7 V, the charge injection technique is used.
Figure3.19 shows the charge injection model after the reset phase in the CSA pixel.
The input transistor is PMOS in the designed internal CSA amplifier. The voltage (V∗i )during reset is given byVi∗ = VDD − |Vod | − |VT H,P |

46(3.13)

3.4. Charge sensitive amplifier dual-gain pixel

where, VDD is the input supply voltage to the amplifier, Vod is the overdrive voltage
and VT H,P is the threshold voltage of the input PMOS transistor. For the VDD = 3.3 V,
Vod = 0.15 V and VT H,P = -0.5 V, the input biasing voltage (V∗i ) during a reset will be
2.65 V.
After the reset, the voltage at the RT changes from VL_RST to VDD and half of thegenerated charge (∆QC ) from reset transistor is injected to the input node as shown in
Figure 3.19. This charge is reflected into the output voltage (VX ) through a feedback
capacitor (CFB ) by an equivalent gain factor. The amount of charge injection is givenby1∆QC = COX WL(|VGS | − |VT H,P |)2
1= COX WL(|Vi∗ − VL_RS T | − |VT H,P |)2(3.14)

where, W and L are the width and the length of the reset transistor and COX is the gate
oxide capacitance per unit area of the reset transistor. With the level shifting techniqueusing the charge injection, the initial output voltage of the CSA with respect to the
input voltage (V∗i ) after reset is given by
∆QC
C FB
∗
C
OX WL(|Vi − VL_RS T | − |VT H,P |)∗= Vi −
2 · C FB

VX∗ = Vi∗ −(3.15)For COX WL = 3.6 fF, CFB = 2 fF, VL_RS T = 0 V, VT H,P = -0.5 V and V∗i = 2.65 V after
reset, V∗X is estimated as
VX∗ = 2.65 −3.6(2.65 − 0 − 0.5)
2·2

= 0.715V(3.16)As the signal charge carrier in the SOIPIX-PDD is electron, the CSA output voltage increases after the energy is detected into the detector. Thus, when an X-ray energy
enters into the detector, CSA output increases above 0.715 V within its linear operating
range.
47

3.4. Charge sensitive amplifier dual-gain pixel

Figure 3.19: Charge injection model. Charge is injected from a reset transistor. ∆Q is
the amount of the charge injection after the reset switch is turned OFF.
The timing diagram in Figure 3.20 shows the working of the CSA pixel. Referto the appendix B.2 for the one frame timing diagram of CSA pixel in-conjunction
with column readout and periphery circuit. During a reset, the VX becomes equal toV∗i which is 2.65 V (Equation 3.13). VX changes to 0.715 V after the charge injection.
Both low and high gain reset signals are then sampled. The CSA pixel has in-pixel
trigger circuit and can be operated in both event-trigger and frame readout mode. In
event readout mode, CSA pixel waits for an X-ray event to be detected while in frame
readout mode, pre-determined gain is applied to the signal with an accumulation timeof 1 ms.

3.4.2

Simulation results of CSA pixel circuit

The pixel model described in section 3.3.3 is used for the simulation of CSA pixel
circuit. Table 3.3 shows the parameters used in the test-bench for the simulation.
Table 3.3: Simulation parameters for the CSA pixel circuit
Parameter
Node capacitance (CD )Reset low level voltage (VL_RST )

Value
5 fF
0V

Parameter
Pixel amplifier current (ID )High gain level shift voltage (VL )

Value
1 µA
0.8 V

For the characterization of the CSA pixel circuit, output after the SF is sampled
for different energy. Figure 3.21 shows the pixel output for two different gain configurations (CFB : 0.5 fF and 2 fF). Also, using the linearity plot, the conversion gain at48

3.4. Charge sensitive amplifier dual-gain pixel

Figure 3.20: CSA pixel timing diagram.
particular energy is estimated. The estimated conversion gain for low and high gains
obtained after the SF are 76 µV/e− and 298 µV/e− , respectively. The conversion gain
will be further influenced by the readout gain factor.

Figure 3.21: Linearity plot. Pixel output response for low and high simulated for wide
range of input energy.
49

3.5. Readout circuit

3.5

Readout circuit
Figure 3.22 shows the sensor architecture of the designed prototype chip. Eventscanner unit scans the trigger signal from 16x16 pixel array. Row and column decoder
are used for accessing the individual pixel. The readout circuit consists of a column
amplifier with programmable gain, sample and hold circuit and two output buffers.
Vreset and Vsignal are the output signals for reset and sampled signals from the output
buffer. Signals are then processed using the external evaluation board with off-chip 14
bit ADC and FPGA.

Figure 3.22: Sensor architecture. VCOM and VC are common-mode voltages of column
amplifier and output buffer, respectively.

50

3.5. Readout circuit

3.5.1

Programmable gain amplifier

Programmable gain amplifier (PGA) consists of a single ended folded cascodeamplifier with the selectable feedback capacitors. Figure 3.23 shows the circuit configuration of the PGA. Refer to the appendix A.4 for a circuit level implementation ofa folded cascode amplifier and appendix A.5 for its simulation for bode plot. Using
switches SG0 and SG1, variable gain for the readout can be selected and is shown in
Table 3.4. Gain of the PGA is given by
Gain(G PGA ) =Ci
Cf(3.17)

where, Ci is the input capacitance and C f is the feedback loop capacitance. In thisdesign, C1 = 10C0 , C2 = C0 , C3 = 3C0 and C4 = 6 C0 , where C0 is the unit capacitanceof 100 fF.
Table 3.4: Column level readout gain
SG1
0
0
1
1

SG2
0
1
0
1

Input capacitance (Ci )C1
C1 + C4X
C1 + C3 + C4

Feedback capacitance (Cf )C2 + C3 + C4
C2 + C3
X
C2

GPGA
1
4
X
19

Figure 3.23: Programmable gain amplifier. SG1 and SG2 are switches for selectable
gain.

51

3.6. Summary

3.5.2

Sample and hold circuit and unity gain amplifier

Figure 3.24 shows the column level implantation of the sample and hold (S&H)
circuit along with an unity gain amplifier (UGA). The S&H is used for the correlated
double sampling (CDS) for reset noise cancellation. UGA is designed to drive a large
load of 50 pF. Refer to the appendix A.6 for a circuit level implementation of a folded
cascode amplifier used for UGA and appendix A.7 for its simulation with a bode plot.

Figure 3.24: Column level sample and hold circuit with unity gain amplifier. CSS = 3
pF and CSR = 3 pF, are the signal and reset sampling capacitors.

3.6

Summary
Window readout of the designed detector is possible allowing in-pixel trigger cir-

cuit to be implemented inside each pixel. The readout speed of recent APSs is not
sufficient for the background noise reduction even if it is much higher than that of
CCDs. In order to realize the anti-coincidence readout, the self-trigger system detecting signals with time resolution of < 10 µs implemented in-pixel trigger circuit can
52

3.6. Summary

give the hit position information for fast readout of the X-ray hit pixel. Pixel implementation using CTI and CSA variable gain is described for realizing a high SNR anda wide range of X-ray detection. CTI pixel uses variable TINT to achieve a gain for the
input X-ray. Simulation results from CSA verifies that gain is linearly dependent on
TINT . CSA pixel circuit uses two feedback circuit configurations for dual in-pixel gain.
Very high conversion gains of more than 50 µV/e− and 150 µV/e− are expected forlow- and high-gain settings, respectively. Simulation results shows wide energy range
upto 40 keV is possible to be detected.

53

Chapter 4
Low-Noise Design and System-Noise Reduction
A low-noise design of the imager is vital for high X-ray spectroscopic performance. A noise floor of the detector determines the minimum detectable energy. A
CMOS image sensors suffers mainly from two types of noises: a fixed pattern noise
and a random noise. Unlike temporal and random noise, a fixed pattern noise (FPN)
is fixed in space. Pixel level FPN on images are induced by the device mismatch
introduced during the fabrication process. The noise introduced due to variation ofthreshold voltage of the reset transistor, input gate of SF amplifier and also different
charge injection (from reset to the floating diffusion node in the case of CTI and fromreset to the feedback capacitor in the case of CSA pixel circuit) introduces large FPN.
However, this noise can be canceled using the CDS technique [51]. In this chapter,
random noise due to dark current shot noise, thermal noise and flicker noise in the sensor using SOIPIX-PDD detector with two different pixel circuits is briefly introduced
and technique to reduce the system-noise in the sensor using the CSA pixel model is
explained.

4.1

Dark current
Dark current is an unwanted leak current that is integrated as dark charges evenwhen the subject is not illuminated [52]. Diffusion current of minority carriers undera reverse bias, generation of carriers in the inner substrate and the generated carriers
at the surface of Si-SiO2 interface are main sources of dark current. In addition toelectron-hole pairs generated by the photoelectric absorption by X-ray, dark currents
are thermally generated in the depletion layer. These dark currents are proportional to54

4.2. Thermal noise

the accumulation time (taccum ) and are temperature dependent and is given byQdark
q
Idark taccum=q

Ndark =

(4.1)

Dark shot noise occurs due to irregular fluctuation of dark current, similar to photon
shot noise. Dark shot noise can be given by the square root of average number of√generated electrons at dark ( Ndark ). Suppressing the generation of current leads to
the reduction of the dark current shot noise. Pinned structure of SOIPIX-PDD aids inthe reduction of dark current generation.

4.2

Thermal noise
The thermal noise, also called Johnson-Nyquist noise is the voltage fluctuation

caused by the random Brownian motion of electrons in a resistive medium [53] [54].
The spectrum of the thermal noise is proportional to the absolute temperature and themean square thermal noise is expressed as
2Vn,T= 4kB T ξA R · ∆ f(4.2)

where, kB is the Boltzmann constant, T is the absolute temperature, ξA is the excess
thermal noise factor, R is the resistance of the transistor and ∆ f is the frequency bandwidth. Thermal noise is a white noise which frequency spectrum is flat and the power
spectral density of the thermal noise is given as

S n,T =

2
Vn,T

∆f

= 4kB T ξA R [V 2 ]

55

(4.3)

4.3. Flicker noise

4.3

Flicker noise
Flicker noise (1/f) noise is the fluctuation in the amount of carriers in the channel

trapped at the interface of Si and SiO2 . When the transistor size is relatively large, thenoise power spectrum is inversely proportional to the frequency and is given byNf[V 2 /Hz]f
Nf 2 2
S n, fI =g [I /Hz]f m

S n, fV =

(4.4)
(4.5)

where, N f is the 1/f noise coefficient and is given by
Nf =

kf
2
COX LW(4.6)

Figure 4.1 shows the basic amplifier constituting NMOS (Mn ) and PMOS (M p )transistors. M p and Mn has the size W p /L p and Wn /Ln with transconductance as gmp
and gmn , respectively. The 1/f noise power spectrum is given by
N f,p 2
N f,n 2
gmn +
g
f
f mp
!
k f,p 2
k f,n 2
1=g +g
2
Ln Wn mn L p W p mp
f COX
!
(
!
!)
k f,p g2mp
k f,n g2mn L p W p=
1+
2
k f,p g2mp Ln Wn
f COX
LpWp
(
!
!
!
!)
k f,p g2mp
k f,n µn Wn /Ln L p W p=
1+
2
k f,p µ p W p /L p Ln Wn
f COX
LpWp

!
!
!
k f,p g2mp 
k f,n µn L p 2 


=
1+



2

k f,p µ p Ln f COX L p W p 

S n, fI =(4.7)

Equation 4.7 shows that the 1/f noise can be reduced by making the size of PMOS
large. But, with the demand of smaller and smaller pixel size in CIS, having large sizetransistor in the pixel may not always be desired. Also, large W and L imply larger
input capacitance which may ultimately increase the noise such as random telegraphsignal (RTS) noise in the current. Optimization of later factor (L p /Ln )2 in the Equation 4.7 is required for reduced low-noise design.
56

4.4. System noise reduction

Figure 4.1: Basic amplifier with NMOS and PMOS transistor.

4.4

System noise reduction
The main sources of noise in the CTI and CSA pixels are from the in-pixel am-

plifier. Also the noise from the power lines can be a dominant noise source directly
affecting the noise floor of the system. CSA pixel circuit has more influence of systemnoise as the noise coupled at the detector node is reflected into the noise floor by thegain factor provided by the feedback capacitor. The noise source in the CSA pixel isshown in Figure 4.2a. The noise of the CSA pixel in terms of equivalent number ofelectrons is expresses as
√ s
!2
!2
!2

C BPW
C BB
2
C D + C FB + Ci
1  2
2
2
2
2
Vn,CS
V
V
V
V
Nn =
1+
+
+
+
+
A
n,BPW
n,BB
n,VS S
GC
C FB
C FB
C FB
PS RR2 n,V DD
(4.8)
2
2
where, Vn,CS
A is the mean square noise from the charge amplifier, Vn,BPW is the mean2square noise coupled by the large buried p-well near the surface of the detector, Vn,BB
2
2
is the mean square noise from the back bias voltage, Vn,V
DD and Vn,VS S are the meansquare system-noise from the supply voltages of the power lines, and PSRR is thepower-supply rejection ratio of the internal amplifier.
If the power supply rejection ration (PSRR) of the charge amplifier is large enough,2
2than the noises from the power-supply (Vn,V
DD and Vn,VS S ) can be ignored. Also, the2
C BB is very small due to high reverse bias voltage, the noise coming from VBB (Vn,BB)

is also ignored in our analysis. The capacitive coupling at the detector by a large BPW
near the detection node makes the CBPW dominant factor in contributing the overall sys57

4.4. System noise reduction

(a)

(b)

Figure 4.2: Equivalent noise model of CSA SOIPIX-PDD circuit. (a) Circuit withnoise sources from BPW1, internal amplifier, VBB and power line. (b) Simplified small
signal noise model of pixel circuit. CBPW is the capacitance due to BPW1, CD is the detector capacitance, Ci is the input capacitance of internal amplifier, CS is the sampling
capacitor for low or high output from the amplifier.
2) cannot be ignored. The
tem noise in the sensor and thus the noise from VBPW (Vn,BPW

noise coupled at the sense node is increased by the gain factor (C BPW /C FB ) of CSA.
The small signal model with the dominant noise component from the internal amplifier
and the BPW1 is shown in Figure 4.2b and expression for the noise in Equation 4.8
can be simplified as
√ s
!2
!2
2
C BPW
C D + C FB + Ci
2
2
1+
Vn,CS A +Vn,BPW
Nn ≈
GC
C FB
C FB

(4.9)

The noise from the charge amplifier of CSA is dominated by the thermal andflicker noise of the transistor. The noise in CSA in terms of equivalent number of58

4.4. System noise reduction

electron (Nn,CS A ) is expresses as
√ s
!
!2
"
(
!
)#
2
C D + C FB + Ci
C D + C FB + Ci CS TCDS
C D + C FB + Ci ξA kB T
Nn,CS A =+N f  + ln
GC
C FB
CS
C FB
C FB
gm
(4.10)

where, ξA is the excess thermal noise factor, kB is the Boltzmann constant, T is theabsolute temperature in Kelvin, N f is the flicker noise coefficient, gm is the transconductance of the internal amplifier input transistor,  is the Euler’s constant, and TCDS
is the time difference between two samples in the CDS for reset noise cancellation.
Table 4.1 shows the values for the parameter in Equation 4.10 used in our simulation. Figure 4.3 shows the total noise in a CSA pixel circuit due to its internal amplifier.
The input transistor size of CSA is 1µ/1µ. The noise for CFB = 0.5 fF is calculated as
3.5 e−rms and the noise for CFB = 2 fF is 5.7 e−rms .
Table 4.1: Parameter used in calculation of total noise in the charge amplifier
Parameter
CD
CS
kB
q
TCDS

Value
4 fF
200 fF
1.38x10−23 m2 · kg · s−2 · K −1
1.602x10−19 C
1 ms

Parameter
CFB

kf
µp
T

Value
2 fF and 0.5 fF
0.577
3.08x10−27 A · F
1.0x10−2 m2 /V · s
300 K

The total noise from the system increases the minimum obtainable noise floor.
The influence of system-noise can be minimized if the signals between different pixels
are correlated. In the designed sensor, reset and signal are sampled using the global
signal and stored in the local capacitors. Individual pixel noise can be categorized
into readout noise which varies from pixel to pixel and system-noise which is common
to all the pixels. These common noise levels which are correlated can be minimized
from each pixel. For the analysis of the system-noise reduction, a hypothetical random
noise for all the pixels is plotted in Figure 4.4. Pi (N) is the pixel value after CDS anddark current offset correction, where N = 1 to 96 is the total number of pixel and i isthe particular frame of interest. System-noise with relatively lower frequency components is assumed to be superimposed in all the pixels. The mean of the pixel (except
pixel with X-ray signal) value will give the system-noise component. This mean val59

4.4. System noise reduction

Figure 4.3: Total noise in charge amplifier for different input transistor size.
ues from the remaining pixel is subtracted from the pixel of interest and is given by
Equation 4.11 where YK (i) is the new pixel value with corrected noise and will havea reduced system-noise containing noise mainly from the internal in-pixel amplifierand pinned BPW. The final rms noise is estimated using the standard deviation as by
Equation 4.12.
YK (i) = PK (i) −vut
σN x =

where, YKN = M1N
1 X
PK ( j)N − 1 j=1

M
2
1 X
YKN (i) − YKN
M − 1 j=1

PN

(4.11)(4.12)

i=1 YKN (i), N is the number if pixels and M is the number of frames.

60

4.5. Summary

Figure 4.4: Technique for system-noise reduction. P1 (1), P1 (2), P1 (N) are the hypothetical pixel with a dominant system-noise present in each pixel 1, 2 and N, respectively
for single frame. P1 (2-N) is the average of pixels from 2 to N, Y1 (1) is the final pixel
with a reduced noise.

4.5

Summary
Different noises pertained in both CTI and CSA pixel circuits were discussed.

Also, technique for system-noise reduction technique is shown. A continued innovation in the detector and the circuit design is important to bring the noise floor below
sub-electron level. However, modern X-ray detector demands the noise level to be
below 3 e−rms . The requirement of noise level for the designed detector is 10 e−rms or
below.

61

Chapter 5
Performance Evaluation of CTI and CSA
Pixel with SOIPIX-PDD Structure
5.1

Introduction
Figure 5.1 shows the chip micrograph image of the designed 16x16 SOIPIX-PDD

detector. Designed chip is fabricated on 0.2 µm FD-SOI CMOS process technology
with a substrate thickness of 200 µm. The pixel array consists of 16x6 CTI and 16x6
CSA pixel circuits along with 16x4 test pixel circuits.

Figure 5.1: Chip micrograph of the deign prototype SOIPIX-PDD detector. Chip isfabricated using 0.2 µm FD-SOI CMOS process technology.
In this chapter, the characterization of the basic pixel performance for both CTI
and CSA pixel circuit are shown. Linearity and conversion gains are evaluated for
different gains and linear response of pixel output is confirmed. Also the dark current
measurement of SOIPIX-PDD is measured and compared with a conventional SOIPIX.
62

5.2. Linearity and conversion gain

5.2

Linearity and conversion gain
Linear output for the input signal is a must for the sensor design to precisely char-acterize the circuit for different incoming X-ray energy. For the linearity measurement
white light is generated and intensity is scanned by LB-8611A precision light box (Kyoritsu, Tokyo, Japan). The light is illuminated from the backside of the chip. Refer tothe appendix C.1 for the setup detail of linearity measurement. Sensor linearity for CTI
and CSA pixels for different gain are shown in Sections 5.2.1 and 5.2.2, respectively.
Equivalent conversion gain is also estimated from the linear output response and shotnoise plot.

5.2.1

CTI pixel

The light intensity with different LUX is changed to characterize the CTI pixel
output. Gain of CTI circuit can be changed by varying TINT . Figure 5.2 shows thelinear output response for different charge integration time (TINT = 0.1 µs, 0.5 µs and1.0 µs).

Figure 5.2: Linearity plot for different gain at TINT = 0.1 µs, 0.5 µs and 1.0 µs. The
light intensity with different LUX is changed to characterize the pixel output response.

635.2. Linearity and conversion gain

The photon transfer curve is plotted for the evaluation of conversion gain (GC ).
Figures 5.3a, 5.3b and 5.3c show the photo transfer curve for TINT of 0.1 µs, 0.5 µs, and1.0 µs, respectively. The conversion with TINT of 0.1 µs, 0.5 µs and 1.0 µs are estimatedas 24 µV/e− , 122 µV/e− and 244 µV/e− . The measured gain values are different thanestimated from the simulation. This is mainly due to different node capacitance value
used for simulation than in actual design. Figure 5.3d shows the sensor output at fixed
light intensity (30 LUX) for the different TINT . Pixel output increases linearly withintegration time.

(a)

(b)

(c)

(d)

Figure 5.3: Photon transfer curve and sensor output at different TINT . (a) TINT = 0.1 µs,
conversion gain is 24 µV/e− . (b) TINT = 0.5 µs, conversion gain is 122 µV/e− . (c) TINT
= 1.0 µs, conversion gain is 244 µV/e− . And, (d) Sensor output vs TINT at 30 LUX lightintensity. Gain increase linearly with the increase in TINT .

64

5.2. Linearity and conversion gain

5.2.2

CSA pixel

Two gains can be selected using the in-pixel CFB configuration of CSA pixel.
Output response at different light intensity is plotted in Figure 5.4 for CFB of 2 fF
(low-gain setting) and 0.5 fF (high-gain setting). Output for both gains are linear with
voltage range of 0.6 V for low-gain setting and 0.8 V for high-gain setting.

Figure 5.4: Linearity plot for low- and high-gain settings in CSA pixel. The lightintensity with different LUX is changed to characterize the pixel output response for
two CFB (0.5 fF and 2 fF) configurations.
Figures 5.5a and 5.5b show the photo transfer curve for the low- and high-gain
setting. GC at low-gain setting is estimated as 52 µV/e− . And, GC at high-gain setting
is approximated as 187 µV/e− . The gain with CFB of 0.5 fF is nearly 3.6 times higher
than the gain with CFB of 2 fF. The gain ratio is smaller than initially designed (≈ 4times). This may be due to an increase in the total parasitic capacitance but the gains
are high enough for the detection of wide range of X-rays.

65

5.2. Linearity and conversion gain

(a)

(b)

Figure 5.5: Photon transfer curve of CSA pixel. (a) Low-gain setting with CFB = 2 fF.
Conversion gain is 52 µV/e− . (b) High-gain setting with CFB = 0.5 fF. Conversion gainis 187 µV/e− .

66

5.3. Dark current of SOIPIX-PDD

5.3

Dark current of SOIPIX-PDD
Dark electrons are thermally activated process and its dependence to temperature

for the SOIPIX-PDD is shown in Figure 5.6. Even when the detector is not exposed
to any radiation, dark current is observed due to defects in Si or any trapped charge
on Si-SiO2 surface. These trapped charges are released over time. Output in dark for
different accumulation times are measured at different temperatures.

Figure 5.6: Temperature dependence of detector dark current. Average dark current
from the proposed SOIPIX-PDD is compared with a conventional SOIPIX.
In Arrhenius plot (Figure 5.6) the slope of the extrapolated dashed line for the
average dark current represents the activation energy of half the bandgap energy ofsilicon (0.56 eV). Dark current of conventional SOIPIX [11] is also shown alongsidefor comparison. The pinned depleted diode structure of SOIPIX-PDD has much small
dark current. The structure becomes advantages especially at higher temperature as theneutral BPW layer on the back-gate surface of Si-SiO2 interface can reduce the darkcurrent by filling the defect with holes. Near ambient temperature (20◦ C), averagedark current density is 100 times smaller than that of conventional SOI pixel. Reduced
675.4. Summary
dark current density of 44.8 pA/cm2 is observed at -30◦ C. The temperature dependence
starts to saturate after -10◦ C. The exact reason for the saturation is still unknown. The
leakage current from the reset transistor directly connected to the detector sense node
could be one of the prime reasons of dark current reduction limitation.

5.4

Summary
The linearity measurement sensor output shows that output response is linear forthe applied gain for CTI and CSA pixels. Gain in CTI pixel is controlled by TINT andconversion gain linearly increases with different TINT . Gain is CSA pixel depends on
the CFB . Very high gain of 52 µV/e− and 187 µV/e− is achieved using a simple feedback
configuration of pixel circuit. Also, the evaluated dark current shows a significant improvement of 100 times lower dark current density at 20◦ C than conventional SOIPIX.
Also, dark is reduced to 44.8 pA/cm2 at -30◦ C.

68Chapter 6
X-ray Spectroscopic Performance
6.1

Introduction
In our experiment radioisotopes of iron-55 (55 Fe) and americium-241 (241 Am) areused for the characterization of the sensor. Refer to the appendixes C.2 and C.3 forthe detail information on 55 Fe and 241 Am implementation. Back-gate voltage of -60
V, BPW pinning voltage of -3.2 V is applied and controlled temperature of -30◦ C ismaintained through-out the measurement of X-ray spectra. An off-chip 14 bit A/Dconverter (AD9240) is used with an analog output range of 2 V peak-peak. Thus, one
analog-to-digital conversion unit (ADU) corresponds to a bin of 122 µV. All the data
presented in this chapter are from the X-ray measurement using a frame readout mode
where pre-determined gain is applied and data are sampled at one ms accumulation
time.
Equivalent energy of the incident X-ray photon is estimated using the conversion
gain (Gc ) and the ionization energy of Si (ω = 3.65 eV/e-) and expressed by Equation 6.1. The energy resolution is calculated by fitting peaks in the energy spectra (5.9
keV for 55 Fe and 13.95 keV for 241 Am) with a Gaussian distribution. Special techniqueof system noise reduction is used in CSA pixel circuit to suppress the total read noisefor an improved spectroscopic performance. The noise performance of both CTI andCSA pixel circuits are evaluated at the pedestal peak of the X-ray spectra. Full widthhalf maximum (FWHM) is evaluated from a standard deviation (σ) obtained from theGaussian fitting curve and energy resolution is estimated as shown in Equations 6.2
and 6.3.

69

6.2. CTI pixel X-ray spectroscopy

Output(ADU) · 122µV
ωGC√
FWHM (∆E) = 2 2ln2σ
Energy (eV) =Energy resolution =6.2∆E· 100%
E

(6.1)
(6.2)
(6.3)

CTI pixel X-ray spectroscopy
X-ray spectrum from 241 Am is used in our measurement for the analysis of a CTI

pixel with variable gain. Data from all the pixels (16x6) are continuously recorded withan accumulation time of 1 ms. Figure 6.1 shows the spectrum obtained from all thedata within 16x6 pixel array. A sharp peak at 13.95 keV energy is obtained. However,the spectrum contains all the data in the pixel including the shared X-ray events thathave occurred in between pixels.

Figure 6.1: 241 Am spectrum from CTI pixels with all the data from 16x6 pixel arrayincluding the shared generated charges between pixels.

70

6.2. CTI pixel X-ray spectroscopy

Pixels with shared charges from X-ray degrade the spectrum. Figure 6.2 showsdifferent random events that can occur within the pixel array. Single pixel X-ray events
are those where the X-ray generated charges are only collected in one pixel while
neighbouring pixels has no X-ray generated charges. There may be a situation where
the charges can be collected into two or more pixels. Such multi-pixel X-ray hit events
must be excluded from the analysis to fully characterize the detector and pixel circuit as
the noise from two or more pixels can statistically increase the total noise and degrade
the X-ray spectra and energy resolution. Also, the x-ray events on corner pixels are
ignored in our analysis. In order to get only single event pixel, following steps aretaken during the measurement of X-ray spectrum.
• Step 1: Data is captured in frame readout mode with 1 ms accumulation time.
• Step 2: Convolution with 3x3 matrix of unit value is performed to all data from
16x6 pixel array.
• Step 3: Boundary data are removed and corner pixels values are forced to zero
• Step 4: Matrix obtained after convolution is compared with original data anddata that matches original data are retained as single pixel event data.
• Step 5: New matrix with single pixel event is formed for further analysis.
• Step 6: The same process from step 1 to step 5 are repeated for all frames.

Figure 6.2: Random X-ray events within 16x6 pixels with different X-ray hit position.

716.2. CTI pixel X-ray spectroscopy
Figure 6.3 shows the 241 Am spectrum from CTI pixels with a single X-ray eventat 16x6 pixels for TINT of 0.1 µs. Spectrum has a clear peaks at 13.95 keV, 17.74
keV, 20.8 keV, 26.3 keV and 59.5 keV. Gaussian fit at the highest peak (13.95 keV) is
done to calculate the energy resolution. Figure 6.3a shows the spectra has the energy
resolution of 5.04% (704 eV FWHM) at 13.95 keV. Data from 241 Am is system-noise
reduced and the improved spectrum is plotted in Figure 6.3b for TINT of 0.1 µs.

(a)

(b)

Figure 6.3: 241 Am spectrum from CTI pixels with a single X-ray event at 16x6 pixels
at TINT of 0.1 µs. (a) Before system-noise reduction. (b) After system-noise reduction.

72

6.2. CTI pixel X-ray spectroscopy

X-ray spectroscopic performance of CTI pixel can further be improved by applying higher gain to the incoming signal. Figures 6.4a and 6.4b shows the spectrum fromTINT of 0.3 µs and 0.5 µs. Better energy resolution of 4.39 % (613 eV at 13.95 keV) is
achieved at higher gain when TINT is 0.5 µs. Higher sensitivity gain setting can improve
the spectroscopic performance but limits the maximum detectable X-ray energy.

(a)

(b)

Figure 6.4: 241 Am spectrum from CTI pixels with a single X-ray event at 16x6 pixels
for different TINT . (a) Spectrum for TINT = 0.3 µs. (b) Spectrum for TINT = 0.5 µs.
Table 6.1 summarizes the pulse height of 241 Am spectrum obtained from different736.2. CTI pixel X-ray spectroscopy
gains (TINT = 0.1 µs, 0.3 µs and 0.5 µs). CTI pixel circuit can detect wide range ofenergy upto 59.5 keV. Figure 6.5 is used for the calibration of input X-ray energy forthe output pulse height obtained from the sensor. Extrapolated line for each gain showsthat input X-ray energy is linear with the output signal for different gain.
Table 6.1: Pulse height of 241 Am spectrum for different TINT
Energy (keV)
13.95
17.74
20.8
26.3
59.5

Pulse height (ADU) at
TINT = 0.1 µs
735
975
1161
1533
3798

Pulse height (ADU) at
TINT = 0.3 µs
2310
3010
3560
4550
8170

Pulse height (ADU) at
TINT = 0.5 µs
3870
4980
4980
7710
X

Figure 6.5: Calibration of X-ray energy with the signal pulse height for different TINT .
Using the 241 Am spectrum from CTI pixel, conversion gain for different TINT are
estimated with the Gaussian fit at 13.95 keV. Conversion gain estimated for different
TINT from Figures 6.3b, 6.4a and 6.4b are shown in Table 6.2 and Figure 6.6 showsthat gain has linear response for applied TINT .
74

6.3. CTI pixel readout noise
Table 6.2: Equivalent conversion gain for different TINT
TINT (µs)
0.1
0.3
0.5

Pulse height at 13.95 keV (ADU)
735
2310
3870

Conversion gain (µV/e− )
23.5
73.7
123.6

Figure 6.6: Conversion gain vs TINT .

6.3

CTI pixel readout noise
Histogram at the pedestal of 241 Am spectrum is used to evaluate the readout noise.

Figure 6.7a shows the histogram at pedestal for TINT of 0.1 µs before and after systemnoise reduction. System-noise reduction technique is useful to reduce the readout noiselevel to 28.4 e−rms from 31.04 e−rms . Using a high-gain setting (TINT = 0.5 µs) noise isultimately reduced to 22.5 e−rms . However, readout noise before and after system-noise
reduction technique does not further improve the noise level as noise from the in-pixel
amplifier noise becomes dominant than the correlated system-noise.

75

6.3. CTI pixel readout noise

(a)

(b)

Figure 6.7: Noise at the pedestal peak of 241 Am spectrum from CTI pixels(a) Noisefor TINT = 0.1 µs before and after system-noise reduction. (b) Noise for TINT = 0.5 µs
before and after system-noise reduction.
Figure 6.8 shows the CTI pixel readout noise for different gain in comparison withnoise obtained from our previous designed SOI-based X-ray image sensors. Our previ-766.3. CTI pixel readout noiseous sensors (XRPIX1, XRPI2a-B, XRPIX2b-A, XRPIX2b-C, XRPIX2b-D, XRPIX3bSF) except XRPIX3b-CSA uses SF amplifier in the pixel for the readout [40] [55] [56].
CTI pixel also uses SF followed by in-pixel integrating amplifier. Noise with TINT of
0.1 µs (28.4 e−rms ) follows the expected linear drop of a readout noise with the increasein a conversion gain. But, the noise at a high-gain is still much larger than our expected
noise value at the applied gain setting. The influence of the noise in output signal before applying high-gain to the incoming signal can be the main reason for the noise to
be limited even at high sensitivity.

Figure 6.8: Comparison of readout noise of CTI pixel with out prior work.

776.4. CSA pixel X-ray spectroscopy

6.4

CSA pixel X-ray spectroscopy
CSA pixel with low- and high-settings are used to analyze the spectroscopic per-formance of 55 Fe and 241 Am radio isotopes. Similar to the X-ray spectrum analysis of
CTI pixel in frame readout mode, energy absorbed by two or more pixels are excluded.
Data from the pixel with an X-ray event only in the central pixel within 3x3 pixels (alsocalled primary pixel) which have local maximum pixel output pulse height above thesplit threshold energy are retained for the analysis.
Figure 6.9 shows the 55 Fe spectrum obtained with low-gain setting. The spectrum
has two distinct peaks of 5.9 keV and 6.4 keV produced by Mn-Kα and Mn-Kβ lines.
Spectrum are fitted with Gaussian distribution at Mn-Kα line. Mn-Kα peak is obtaiedat 687 ADU, corresponding to 5.9 keV. The estimated conversion gain is 51.8 µV/e− .
The energy resolution is 4.1% (241 eV FWHM) at 5.9 keV.

Figure 6.9: 55 Fe spectrum with single X-ray event after system-noise reduction andgain variation correction at low-gain setting.

78

6.4. CSA pixel X-ray spectroscopy

System-noise has higher influence in the CSA pixel circuit because of the feedback gain factor from the in-pixel amplifier. The system-noise reduction technique isapplied to the X-ray incoming data. Figure 6.10 shows the improved spectrum obtained after the system-noise reduction. Energy resolution is reduced to 3.3% (195 eV
FWHM) at 5.9 keV.

Figure 6.10: 55 Fe spectrum with single X-ray event after system-noise reduction andgain variation correction at low-gain setting.
The spectra obtained in Figure 6.10 are influenced by the pixel-to-pixel gain deviation. Gain deviation between the pixels should be corrected to get a purer X-ray
spectrum and higher energy resolution. Figure 6.11a shows a list of GC ’s (µV/e− ) estimated from an individual pixel. Corner pixels are ignored for X-ray spectra analysis
because it does not count the central pixel in 3x3 pixel array used in our analysis for
single pixel X-ray events. Corner pixel values are forced to zero. Each pixel within
16x6 pixel array has gain deviation (standard deviation 0.267 µV/e− ) from the mean
79

6.4. CSA pixel X-ray spectroscopy
GC value = 52.4 µV/e− ). Equivalent gain correction factors shown in Figure 6.11b are
obtained by dividing each gain to the mean value.

(a)

(b)

Figure 6.11: Pixel-to-pixel gain variation. (a) Conversion gain for low-gain setting
estimated using 55 Fe in 16x6 pixel array. (b) Gain correction factor for 16x6 pixels.
55

Fe spectrum after gain correction is plotted in Figure 6.12. Spectrum is obtainedusing the low-gain setting. Each bin uses 3 ADU in the histogram plot. Fitting with
Gaussian distribution at Mn-Kα is done. The energy resolution is improved to 3.02%(178 eV FWHM) at 5.9 keV with GC of 52.1 µV/e− calculated at 691 ADU.
The high-gain setting of a CSA pixel circuit configuration is used to further improve the spectroscopic performance. Figure 6.13 shows the spectrum using 55 Fe fromhigh-gain setting. Each bin uses 5 ADU in the histogram plot. Spectrum obtained
is system-noise reduced and pixel gain variation corrected to the incoming X-ray energy. Estimated conversion gain at 186.8 µV/e− at 2516 ADU. Gaussian fitted spectrum
shows the energy resolution of 2.89% (171eV FWHM) at 5.9 keV is obtained. This isthe best energy resolution we have achieved using the SOI-based technology used for
an X-ray imaging.
241

Am radio isotope X-ray source is used for spectroscopic analysis in CSA pixel
80

6.4. CSA pixel X-ray spectroscopy

Figure 6.12: 55 Fe spectrum with single X-ray event after system-noise reduction andgain variation correction at low-gain setting.

Figure 6.13: 55 Fe spectrum with single X-ray event after system-noise reduction andgain variation correction at high-gain setting.

81

6.4. CSA pixel X-ray spectroscopy
with low-gain setting. Figure 6.14 shows the X-ray spectrum from 241 Am with single
pixel event after system-noise reduction and gain variation correction. Spectrum hasfour characteristic peaks at 13.95 keV, 17.74 keV, 20.8 keV and 26.3 keV with thehighest count rate at 13.95 keV. The energy resolution is estimated to be 1.67 % (234eV FWHM) at 13.95 keV. The energy upto 43 keV is possible to be detected with
output voltage range of 0.6 V at low-gain setting.

Figure 6.14: 241 Am spectrum with single X-ray event after system-noise reduction andgain variation correction at low-gain setting.
X-ray detection probability for silicon thickness of 100 µm, 200 µm and 300 µm
is shown in Figure 6.15. Detection probability is almost 100% for energies less than
5 keV. However, the detection efficiency decreases drastically for higher energy range.
About 80 e-h/µm is created along the depth by high-energy charged particle [57]. 200µm Si thickness is used to detect an X-ray energy upto 50 keV. Figure 6.15 shows
the 241 Am spectrum after detection efficiency correction with Si thickness of 200 µm.
Peaks at 20.8 keV and 26.3 keV of 241 Am are clearly observed.
82

6.4. CSA pixel X-ray spectroscopy

Figure 6.15: X-ray detection probability for different Si thickness. Detection efficiencyof Si detector decreases for higher X-ray energy.

Figure 6.16: 241 Am spectrum with single X-ray event after detection efficiency correction at low-gain setting.

83

6.4. CSA pixel X-ray spectroscopy

Table 6.3 summarizes the output pulse height from different energy obtained fromspectra of 55 Fe and 241 Am at low- and high-gain setting. Figure 6.17 shows the plot forthe calibration of input X-ray energy to the output pulse height. Extrapolated lines for
low-gain (52 µV/e− ) and high-gain (187 µV/e− ) settings determined by the CSA pixel
linearity shot-noise plot in Figure 5.5 well agree with X-ray energy spectral peaks.
Table 6.3: Pulse height of 55 Fe and 241 Am spectra for low- and high-gain setting
Energy (keV)
5.9
6.4
13.95
17.74
20.8
26.3

Pulse height (ADU) at
high-gain setting
2474
2725
X
X
X
X

Pulse height (ADU) at
low-gain setting
691
763
1365
2079
2424
3081

Figure 6.17: Calibration of X-ray energy with signal output pulse height.

84

6.6. Summary

6.5

CSA pixel readout noise
Histogram at the pedestal peak of 55 Fe for low- and high-gain settings are shownin Figure 6.18. Readout noise before and after system-noise reduction are shown.
Noise for a low-gain setting with CFB = 2.0 fF after system-noise correction is 11.7
e−rms . Also, the noise before system-noise reduction at high-gain setting (CFB = 0.5 fF)
was 15.4 e−rms which is reduced to 8.51 e−rms and is plotted in Figure 6.18b.
Readout noise comparison of a CSA pixel with other SOI based X-ray imager isshown in Figure 6.19. Readout noise from a CSA pixel follows the linear decreasing
trend as expected from conversion gain vs readout noise plot. Using the high-gain
setting the noise level is 8.5 e−rms and is below than our requirement for an imager for
an astronomical missions [40] [56] [41]. Also, reduction of noise is limited at highgain setting both for CTI and CSA pixels. Residual system-noise is reduced but notcompletely removed by system-noise reduction technique.

6.6

Summary
Table 6.4 shows a performance comparison of designed CTI and CSA pixel im-

plemented using SOIPIX-PDD with the prior work of XRPIX series which uses conventional SOIPIX detector. X-ray spectroscopic performance is greatly improved andshows huge potential for the future X-ray astronomical satellite missions. Both readout noise and energy resolutions are improved in our design. Also, the X-ray spectrum showed a characteristic spectral line with very small tailing energy. It showsthat SOIPIX-PDD has very high charge collection efficiency compared to conventional
SOIPIX.
The theoretical fano-limit energy resolution with a readout noise of 8.5 e−rms at 5.9
keV is 131.2 eV. But, the measured energy resolution is 171 eV at 5.9 keV. This showsthat there are some unknown factors effecting the X-ray spectroscopic performanceand room for further design improvement in our future design.

85

6.6. Summary

(a)

(b)

Figure 6.18: Noise at the pedestal peak of 55 Fe spectrum from CSA pixels before andafter system-noise correction. (a) Noise for CFB = 2.0 fF, low-gain setting. (b) Noise
for CFB = 0.5 fF, High-gain setting.

86

6.6. Summary

Figure 6.19: Noise comparison of CSA pixel at the pedestal peak of 55 Fe with other
SOI based X-ray imager.
Table 6.4: Perforamnce comparison of CTI and CSA pixels with the prior work
SOIPIXType
Conversion
gain(µV/e− )Readoutnoise(e−rms )Energyresolution(FWHM@5.9keV)
Energyresolution(FWHM@13.95keV)

XRPIX
1-A
[40]

XRPIX
2b-CSA
[56]

XRPIX
3b
[56]

3.56

7.0

129

TINT =
0.1 µsCTI
TINT =
0.5 µs

CFB =
2 fF

CSA
CFB =
0.5 fF

17.8

23.5

123.6

52.0

187.0

68

35

28.4

24.45

11.7

8.51

N.A.

N.A.

5.4%
(320eV)

N.A.

N.A.

3.02%
(178eV)

2.89%(171eV)

10.8%(1500eV)

N.A.

N.A.

4.97%
(694eV)

4.39%(613eV)

1.67%(234eV)

N.A.

87

Chapter 7
Conclusion
X-ray detectors for astronomical satellite missions demand a high speed and ahigh performance detector to realize fano-limit energy resolution. SOIPIX-PDD withmulti-well structure using 0.2 µm CMOS fully depleted- (FD-) SOI technology is realized for the detection of a wide range of X-ray energy. A nested structure of multiple
wells is useful to realize fast and high charge collection efficiency. Small detector
node capacitance under fully depleted condition was realized for low noise. A highresistivity (>25 kΩcm) detector substrate with a deep depletion thickness of 200 µm
is used for the detection energy range greater than 10 keV. A pinned depleted diodestructure helps in a stable circuit operation and reduction of a dark current generation.
The dark current near room temperature (20◦ C) is reduced by 100 times compared toconventional SOIPIX which makes the detector to be useful even at higher temperature avoiding unnecessary cooling. Reduced dark current of 44.8 pA/cm2 at -30◦ C isrealized using the designed prototype chip. Table 7.1 summarizes the parameter in thedesigned sensor.
Table 7.1: Parameters of SOIPIX-PDD detecor
Parameter
Process technology
Wafer type
Substrate thickness
Substrate resistivity
Supply voltage
BPW Pinned Voltage (VBPW )Backgate Voltage (VBB )Chip size
Pixel array
Effective CTI pixel array
Effective CSA pixel array
Pixel size
Dark current density

Value
0.2 µm FD-SOI CMOS
Floating zone, p-type (Fz-p)
200 µm>25 kΩcm
3.3 V, 1.8 V (Analog), 1.8 V (Digital)-3.2 V-60 V
2.9 mm x 2.9 mm
16x16
16x6
16x6
40 µm x 40 µm
44.8 pA/cm2 at -30◦ C

88

CHAPTER 7. CONCLUSION

Two different types of pixel circuits are realized in the designed prototype chip.
A low-noise and a wide energy range of X-ray detection is possible using the variable
in-pixel gain circuit. Continuous time integration variable gain pixel uses the charge
integrating capacitor and integration time (TINT ) for achieving a variable gain. Table 7.2 summarizes the performance of a CTI pixel. The noise level of 22.5 e−rms withan energy resolution of 4.39% (613 eV FWHM) is realized with TINT of 0.5µs. Also,wide range energy upto 59.5 keV is detected.
Table 7.2: Performance summary of CTI pixel
TINT (µs)
0.1
0.3
0.5

Conversion gain (µV/e− )
23.5
73.7
123.6

Noise (e−rms )
28.4
24.45
22.5

Energy resolution at 13.95 keV
4.97% (694 eV FWHM)
4.5% (629 eV FWHM)
4.39% (613 eV FWHM)

CSA pixel uses two feedback capacitors configuration for achieving dual in-pixel
gain. Table 7.3 shows the performance summary of CSA pixel. With a very low
detector node capacitance and in-pixel gain selection configuration, a very high chargeto-voltage gain of 52 µV/e− and 187 µV/e− has been realized. For the detection of wide
energy range from 0.3 to 40 keV with high spectroscopic performance a high-gain in
conjunction with a low-gain setting is used. Noise level (8.5 e−rms ) below the required
target level is achieved using the high-gain setting after system-noise reduction. Theenergy resolution of 1.67% (234 eV at FWHM) at 13.95 keV with 241 Am and 2.89%(171 eV FWHM) at 5.9 keV with 55 Fe is accomplished using dual in-pixel gain of CSA
pixel circuit.
Table 7.3: Performance summary of CSA pixel
CFB
(fF)
2
0.5

Conversion gain(µV/e− )
52
187

Noise
(e−rms )11.7
8.51

Energy resolution at
5.9 keV
3.02% (178 eV FWHM)
2.89% (171 eV FWHM)

89

Energy resolution at
13.95 keV
1.67% (234 eV FWHM)
X

7.1. Future works

7.1

Future works
Current design is at early stage of development. Designing a detector with very

low node capacitance can reduce the noise in our future design. The measured energy
fano-limit is 171 eV at 5.9 keV which is higher than expected ideal fano-limit withnoise level at 8.5 e−rms . There are some unknown factors for improvements in design
for realizing higher energy resolution.
The dark current at very low temperature is limited and starts to saturate after-10◦ C and does not follow the expected decrease as shown in the Arrhenius plot (Figure.5.6). The main reason could be the leakage current from the reset transistor. In
our future design, SOIPIX-PDD with in-pixel reset at the substrate of detector will be
implemented to decrease the dark current at low temperature.
The full-well capacity of the detector is limited by the readout circuit. For example, in CSA pixel circuit the full-well for low sensitivity gain setting is 11538 e− (0.6
V at 52 µV/e− ) and high sensitivity gain setting is 4278 e− (0.8 V at 187 µV/e− ). Witha noise of 11.7 e−rms at low-gain setting and full well-capacity of 11538 e− , the dynamic
range is ∼60 dB. And the dynamic range is increased to ∼63 dB using together withhigh-gain setting. Our ultimate target is to make the noise level below 3 e− and to beable to detect upto 40 keV, making 70 dB dynamic range possible to be achieved infuture.
Our current design uses an off-chip ADC which reads the final analog output fromthe chip and digital output from ADC is then processed in FPGA. Using on-chip ADC,
we can read the data more accurately at high speed as a column level ADC design canbe implemented inside the chip. Reading the digital data without degrading the signal
integrity can be done at very high speed. This can definitely be used for high X-ray
event count rate. Our group at Shizuoka University has already designed high-speed
ADC’s for various applications of CMOS image sensors. We can implement on-chip
ADC in our future X-ray detectors.

90

Appendix A
This appendix contains transistor level diagram of different circuits used in thedesigned sensor presented in the dissertation.

91

Appendix

Figure A.1: Event trigger circuit.

92

Appendix

Figure A.2: CTI pixel circuit

93

Appendix

Figure A.3: CSA pixel circuit

94

Appendix

Figure A.4: Folded cascode column amplifier used in column PGA circuit

95

Appendix

Figure A.5: Simulation results of column amplifier

96

Appendix

Figure A.6: Folded cascode unity gain buffer amplifier

97

Appendix

Figure A.7: Simulation results of unity gain buffer amplifier

98

Appendix B
This appendix contains the timing diagram of CTI and CSA pixel in conjunction
with readout circuit timing for one complete frame.

99

Appendix

Figure B.1: CTI Timing Diagram

100Appendix

Figure B.2: CSA Timing Diagram101

Appendix C
This appendix contains the drawing of measurement setup used for the characterization of the designed chip described in the dissertation.

102

Appendix

Figure C.1: Setup for linearity measurement103Appendix

Figure C.2: 55 Fe radioisotope X-ray source mounted directly in the sensor board

104Appendix

Figure C.3: 241 Am radioisotope X-ray source mounted directly in the sensor board

105

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List of publications

List of Publications
Journal Papers
1. S. Shrestha, S. Kawahito, H. Kamehama, S. Nakanishi, K. Yasutomi, K. Kagawa, N.
Teranishi, A. Takeda, T.G. Tsuru, I. Kurachi, Y. Arai, “Silicon-On-Insulator based
Dual-Gain Charge Sensitive Pixel Detector for Low-Noise X-ray Imaging for Future
Astronomical Satellite Mission ” , Sensors 2018, 18(6), 01, June 2018.

2. H. Kamehama, S. Kawahito, S. Shrestha, S. Nakanishi, K. Yasutomi, A. Takeda,
T.G. Tsuru, Y. Arai,“A Low-Noise X-ray Astronomical SOI Pixel Detector Using a
Pinned Depleted Diode Structure ” , Sensors 2018, 18(1), 27, January 2018.

3. A. Takeda, T.G. Tsuru, T. Tanaka, H. Uchida, H. Matsumura, Y. Arai, K. Mori, Y.
Nishioka, R. Takenaka, T. Kohmura, S. Nakashima, S. Kawahito, K. Kagawa, K.
Yasutomi, H. Kamehama, S. Shrestha, “Improvement of spectroscopic performanceusing a charge-sensitive amplifier circuit for an X-ray astronomical SOI pixel
detector ” , Journal of Instrumentation (JINST), 10, C06005, pp.1-10, June 2015.

4. A. Takeda, T.G. Tsuru, T. Tanaka, H. Matsumura, Y. Arai, K. Mori, Y. Nishioka, R.
Takenaka, T. Kohmura, S. Nakashima, S. Kawahito, K. Kagawa, K. Yasutomi, H.
Kamehama, S. Shrestha,“ Development and Evaluation of an Event-Driven SOI
Pixel Detector for X-Ray Astronomy”, PoS (TIPP2014)138, pp.1-8, June 2014.

List of publications
International Symposia
1. S. Shrestha, H. Kamehama, K. Yasutomi, K. Kagawa, N. Teranishi, A. Takeda, T-G.
Tsuru, Y. Arai, S. Kawahito, “Event-Driven Dual-Gain Fully-Depleted SOI Based XRay Detector for High Energy Particle Imaging ”, 2017 International Image Sensor
Workshop (IISW 2017) , Hiroshima, Japan, 2017.6.2

2. S. Shrestha, H. Kamehama, K. Yasutomi, K. Kagawa, N. Teranishi, A. Takeda, T-G.
Tsuru, Y. Arai, S. Kawahito, “SOI based High Energy Particle Imaging with
Continuous Time Integration Type Variable Gain Pixel ”, 3rd International Workshop
on Image Sensors and Imaging Systems (IWISS2016), Tokyo, Japan, 2016.11.17

3. S. Ohmura, T-G. Tsuru, H. Matsumura, T. Tanaka, A. Takeda, H. Matsumura, M. Ito,
Y. Arai, I. Kurachi, T. Miyoshi, S. Nakashima, K. Mori, Y. Nishioka, N.
Takebayhashi, K. Noda, T. Kohmura, K, Tamasawa, Y. Ono, T. Sato, S. Kawahito,
K. Hagawa, K. Yasutomi, H. Kamehama, S. Shrestha, K. Hara, S. Honda,“Reduction of cross-talks between circuit and sensor layer in the Kyoto’s X-ray
Astronomy SOI pixel sensors with Double-SOI wafer”, Nuclear Physics A, HSTD10
proceeding, 2016.01.16

4. T-G. Tsuru, H. Matsumura, A. Takeda, T. Tanaka, S. Nakashima, Y. Arai, K. Mori,
R. Takenaka, Y. Nishioka, T. Kohmura, T. Hatsui, T. Kameshima, K. Ozaki, Y.
Kohmura, T. Wagai, D. Takei, S. Kawahito, K. Kagawa, K. Yasutomi, H.
Kamehama, S. Shrestha, “Development and Performance of Kyoto’s X-ray
Astronomical SOI pixel (SOIPIX) sensor”, SPIE Optics and Photonics, Vol. 9144
914412-1, San Diego, USA, 2015.8.9

5. S. Shrestha, H. Kamehama, K. Yasutomi, K. Kagawa, A. Takeda, T-G. Tsuru, Y.
Arai, S. Kawahito, “A low-noise wide-dynamic-range event-driven detector using
SOI pixel technology for high-energy particle imaging”, SPIE Optics and Photonics,
9593-32, San Diego, USA, 2015.8.11.

List of publications
6. S. Shrestha, “A SOI-Based Low Noise and Wide Dynamic Range Event-Driven
Detector for X-Ray Imaging”, International Workshop on SOI Pixel Detector(SOIPIX2015), Poster Sesson, Sendai, Japan, 2015.7.24.

7. H. Kamehama, S. Shrestha, K. Yasutomi, K. Kagawa, A. Takeda, T-G. Tsuru, Y.
Arai, S. Kawahito, “Fully Depleted SOI Pixel Photo Detectors with Backgate Surface
Potential Pinnning”, 2015 International Image Sensor Workshop (IISW 2015),
3.05, pp.66-69, Vaals, The Netherlands, 2015.6.8

8. H. Kamehama, S. Shrestha, K. Yasutomi, K. Kagawa, A. Takeda,T.G. Tsuru, Y.
Arai, S. Kawahito,“ Fully Depleted SOI Pixel Photo Detectors with Backgate Surface
Potential Pinning ” , AISISS 2014.

National Symposia and Workshops
1. S. Shrestha, H. Kamehama, K. Yasutomi, K. Kagawa, N. Teranishi, A. Takeda, T-G.
Tsuru, Y. Arai, S. Kawahito, “Development of Event Driven X-Ray Detector using
Fully-Depleted Silicon-On-Insulator Based Technology for High Energy Imaging”,
19th Takayanagi Kenjiro Memorial Symposium, Hamamatsu, Japan, 2017.11.21

2. S. Shrestha, H. Kamehama, K. Yasutomi, K. Kagawa, N. Teranishi, A. Takeda, T-G.
Tsuru, Y. Arai, S. Kawahito, “Wide Range X-ray SOI Pixel Detector using Variable
In-Pixel Gain Selection”, 18th Takayanagi Kenjiro Memorial Symposium,
Hamamatsu, Japan, 2016.11.15

3. S. Shrestha, H. Kamehama, K. Yasutomi, K. Kagawa, N. Teranishi, A. Takeda, T-G.
Tsuru, Y. Arai, S. Kawahito, “Development of Event Driven X-ray Detector with InPixel Gain Selection”, 第５回SOI新学術領域研究会, Hokkaido, Japan, 2016.06.28

4. 亀濱博紀， S. Shrestha, 安富啓太, 香川景一郎, 武田彩希, 鶴剛, 新井康夫,
川人祥二, “バックゲート表面電位固定構造を用いた完全空乏化 SOIピクセル

List of publications
検出器の性能評価“, 映像情報メディア学会情報センシング研究会 9 月研究会,
IST2015, 2015.09

5. Hasegawa, K. Yasutomi, H. Kamehama, S. Shrestha, Y. Hyungjune, N. Teranishi, K.
Kagawa, S. Kawahito, “Design and Evaluation of lock-in image sensors using fulldepleted SOI Pixels”, IST, 2015.05.08
6. 川人祥二，亀濱博紀,S. Shrestha, 安富啓太, 香川景一朗, 池辺将之,新井康夫, “SOI ピクセルイメージセンサと科学計測応用”, 映像情報メディア学会情報センシング研究会 3 月研究会, IST2014, 2014.04.