PCI-DAS1602/16

Specifications

Document Revision 3.3, February, 2010
© Copyright 2010, Measurement Computing Corporation

Specifications
Typical for 25 °C unless otherwise specified.
Specifications in italic text are guaranteed by design.
All specifications are subject to change without notice.

Analog input
Table 1. Analog input specifications
A/D converter type
Resolution
Number of channels
Input ranges, software
selectablePolarity
A/D pacing(software programmable)
Burst mode
A/D trigger sources
A/D triggering modes

Data transfer

A/D conversion timeThroughput
Calibration
Common mode range
CMRR @ 60 Hz
Input leakage current
Input impedance
Absolute maximum input
voltage

AD976ABN
16 bits
16 single-ended / 8 differential, software selectable±10 V, ±5 V, ±2.5 V, ±1.25 V
0 to 10 V, 0 to 5 V, 0 to 2.5 V, 0 to 1.25 V
Unipolar/bipolar, software selectable
Internal counter - 82C54.
External source (A/D EXTERNAL PACER)
Software polled
Software selectable option, rate = 5 µs
External digital (A/D EXTERNAL TRIGGER)
External analog (ANALOG TRIGGER IN)
External digital: Software configurable for:
 Edge (triggered) Level-activated (gated) Programmable polarity (rising/falling edge trigger, high/low gate)
External analog: software-configurable for:
 Positive or negative slope.
 Above or below reference Positive or negative hysteresis
 In or out of window
Trigger levels set by DAC0 and/or DAC1, 4.88 mV resolution.
Unlimited pre- and post-trigger samples. Total # of samples must be > 256. Compatible
with both Digital and Analog trigger options.
From 512 sample FIFO via interrupt w/ REPINSWInterrupt
Software polled
5 µs max
200 kHz
Auto-calibration, calibration factors for each range stored on board in non-volatile RAM.
±10 V min-70 dB±200 nA max
10 MΩ min±15 V1PCI-DAS1602/16Specifications

Accuracy
Table 2. Analog input accuracy specifications
RangeAccuracy

BIP10
BIP5
BIP2.5
BIP1.25
UNI10
UNI5
UNI2.5
UNI1.25±16 LSB±6 LSB±16 LSB±16 LSB±8 LSB±28 LSB±28 LSB±28 LSB

Accuracy Components
Gain error
Offset error
PGA linearity error
Integral linearity error
Differential linearity error

Trimmable by potentiometer to 0
Trimmable by potentiometer to 0±1.3 LSB typ , ±10.0 LSB max±0.5 LSB typ , ±3.0 LSB max±0.5 LSB typ, ±2.0 LSB max

Total board error is a combination of gain, offset, differential linearity and integral linearity error. The
theoretical absolute accuracy of the board may be calculated by summing these component errors. Worst caseerror is realized only in the unlikely event that each of the component errors is at their maximum level, andcausing error in the same direction.

Analog input drift
Table 3. Analog input drift specifications
Range

Analog input full-scale
gain drift

Analog input zero drift

Overall analog input drift± 10.00 V± 5.000 V± 2.500 V± 1.250 V
0 - 10.00 V
0 - 5.000 V
0 - 2.500 V
0 - 1.250 V

2.2 LSB/°C max
2.2 LSB/°C max
2.2 LSB/°C max
2.2 LSB/°C max
4.1 LSB/°C max
4.1 LSB/°C max
4.1 LSB/°C max
4.1 LSB/°C max

1.8 LSB/°C max
1.9 LSB/°C max
2.0 LSB/°C max
2.3 LSB/°C max
1.9 LSB/°C max
2.1 LSB/°C max
2.4 LSB/°C max
3.0 LSB/°C max

4.0 LSB/°C max
4.1 LSB/°C max
4.2 LSB/°C max
4.5 LSB/°C max
6.0 LSB/°C max
6.2 LSB/°C max
6.5 LSB/°C max
7.1 LSB/°C max

Absolute error change per °C temperature change is a combination of the Gain and Offset drift of manycomponents. The theoretical worst case error of the board may be calculated by summing these componenterrors. Worst case error is realized only in the unlikely event that each of the component errors is at theirmaximum level, and causing error in the same direction.

2PCI-DAS1602/16

Specifications

Noise performance
The following table summarizes the worst case noise performance for the PCI-DAS1602/16. Noise distribution
is determined by gathering 50000 samples with inputs tied to ground at the PCI-DAS1602/16 main connector.
Data is for both single-ended and differential modes of operation.
Table 4. Noise specifications
Range±2 counts±1 count

Max Counts

LSBrms*± 10.00 V± 5.000 V± 2.500 V± 1.250 V
0 - 10.00 V
0 - 5.000 V
0 - 2.500 V
0 - 1.250 V97%
97%
96%
96%
88%
88%
83%
83%

80%
80%
79%
79%
65%
65%
61%
61%

1111111115
151516

1.7
1.7
1.7
1.7
2.3
2.3
2.3
2.4

* Input noise is assumed to be Gaussian. An RMS noise value from a Gaussian distribution is calculated bydividing the peak-to-peak bin spread by 6.6.

Crosstalk
Crosstalk is defined here as the influence of one channel upon another when scanning two channels at thespecified per channel rate for a total of 50000 samples. A full scale 100 Hz triangle wave is input on channel 1.
Channel 0 is tied to analog ground at the 100-pin user connector. Table 5 summarizes the influence of channel 1on channel 0 and does not include the effects of noise.
Table 5. Crosstalk specifications
Range

1 kHz Crosstalk(LSB pk-pk)

10 kHz Crosstalk(LSB pk-pk)

50 kHz Crosstalk(LSB pk-pk)±10.000 V±5.000 V±2.500 V±1.250 V
0V to +10.000 V
0V to +5.000 V
0V to +2.500 V
0V to +1.250 V

4223422313754854
324181614231616163

PCI-DAS1602/16Specifications

Analog output
Table 6. Analog output specifications
D/A converter type
Resolution
Number of channels
Channel typeOutput range (each channel independentlysoftware selectable)
Data transfer
Throughput
Monotonicity
Slew rate
Settling time
Current drive
Output short-circuit duration
Output coupling
Output impedance
Output stability
CodingOutput voltage on power up and reset

AD669BR
16 bits2
Single-ended voltage output±10 V, ±5 V, 0 to 10 V, or 0 to 5 V
From 512 sample FIFO via REPOUTSW or programmed I/O. Datainterleaved for dual analog output mode.
100 kHz, 2 channels simultaneous
16 bits at 25 °C
10 V ranges: 6 V/µs
5 V ranges: 3 V/µs
13 µS max 20 V step to 0.0008%
6 µS typ 10V step to 0.0008%±5 mA minIndefinite @ 25 mA
DC0.1 ohms max
Any passive load
Offset binary
0 V ± 10 mVAccuracy
Table 7. Analog output accuracy specifications
RangeAccuracy

BIP10BIP5UNI10
UNI5±8 LSB±8 LSB±10 LSB±10 LSB

Accuracy Components
Integral linearity error
Differential linearity error±0.5 LSB typ, ±1 LSB max±0.5 LSB typ, ±1 LSB max

Analog output drift
Table 8. Analog output drift specifications
Analog output full-scale gain drift
Analog output zero drift
Overall analog output drift±0.22 LSB/°C max±0.22 LSB/°C max±0.44 LSB/°C max

Absolute error change per °C temperature change is a combination of the gain and offset drift of many
components. The theoretical worst case error of the board may be calculated by summing these component
errors. Worst case error is realized only in the unlikely event that each of the component errors is at theirmaximum level, and causing error in the same direction.

4

PCI-DAS1602/16

Specifications

Digital input / output
Table 9. Digital input/output specifications
Digital type

Number of I/O
Configuration

Input highInput low
Output highOutput low
Power-up / reset state
Pull-up/pull-down resistors
Simultaneous sample and hold trigger

82C55 emulation
Input 74LS244
Output 74LS373
24
2 banks of 8 and 2 banks of 4, or
3 banks of 8, or
2 banks of 8 with handshake
2.0 volts min, 7 volts absolute max
0.8 volts max, -0.5 volts absolute min
2.4 volts min @ -15 mA
0.5 volts max @ 64 mA
Input mode (high impedance)
Provisions have been made on the board for user installed pull-up/pulldown resistor networks
TTL output (SSH OUT).
Logic 0 = Hold
Logic 1 = Sample compatible with CIO-SSH16

Interrupts
Table 10. Interrupt specifications
Interrupt
Interrupt enable
Interrupt polarity
Interrupt sources(software programmable)

INTA# - mapped to IRQn via PCI BIOS at boot-time
Programmable through PLX9052
Active high level or active low level, programmable through PLX9052
External (rising TTL edge event)
Residual counter
A/D End-of-conversion
A/D End-of-channel-scan
A/D FIFO-not-empty
A/D FIFO-half-full
D/A FIFO-not-empty
D/A FIFO-half-full5

PCI-DAS1602/16

Specifications

Counter*Note: Pins 21, 24, and 25 are pulled to logic high via 10K resistors.
Table 11. Counter specifications
Counter type
Configuration

82C54
Two 82C54 chips containing three 16-bit down counters each

82C54A:Counter 0 — ADC residual sample
counter.
Counter 1 — ADC pacer lower
dividerCounter 2 — ADC pacer upperdivider

Source:Gate:
Output:Source:Gate:
Output:Source:Gate:
Output:

ADC Clock.
Programmable source.
End-of-Acquisition interrupt.
10 MHz oscillator
Tied to Counter 2 gate, programmable source.
Chained to Counter 2 Clock.
Counter 1 Output.
Tied to Counter 1 gate, programmable source.
ADC Pacer clock (if software selected), available at userconnector.

Source:Gate:
Output:Source:

ADC Clock.
External trigger
End-of-Acquisition interrupt.
User input at 100pin connector or internal 10MHz (softwareselectable)
User input at 100pin connector.
Available at 100pin connector.
10 MHz oscillator
Tied to Counter 2 gate, programmable source.
Chained to Counter 2 Clock.
Counter 1 Output.
Tied to Counter 1 gate, programmable source.
DAC Pacer clock, available at user connector.

82C54B:Counter 0 — pretrigger mode

Counter 0 — non-pretrigger mode:
user counter 4Counter 1 — DAC pacer lower
dividerCounter 2 — DAC pacer upperdivider
Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width highGate width low
Input highInput low
Output highOutput low
Crystal oscillator frequency
Frequency accuracy

Gate:
Output:Source:Gate:
Output:Source:Gate:
Output:10 MHz max
30 ns min
50 ns min
50 ns min
50 ns min
2.0 volts min, 5.5 volts absolute max
0.8 volts max, -0.5 volts absolute min
3.0 volts min @ -2.5 mA
0.4 volts max @ 2.5 mA
10 MHz
50 ppmPower consumption
Table 12. Power consumption specifications+5 V operating (A/D converting to FIFO)

2 A typical, 2.1 A max

6

PCI-DAS1602/16

Specifications

Environmental
Table 13. Environmental specifications
Operating temperature range
Storage temperature range
Humidity0 to 70 °C-40 to 100 °C
0 to 95% non-condensing

Mechanical
Table 14. Mechanical specifications
Card dimensions

PCI custom type card: 107 mm (H) x 18.5 mm (W) x 292 mm (L)Main connector and pin out
Table 15. Main connector specifications
Connector typeCompatible cables
Compatible accessory products(with C100FF-x cable)

100-pin high-density, Robinson-Nugent
C100FF-x
ISO-RACK16/P
ISO-DA02/P
BNC-16SE
BNC-16DI
CIO-MINI50
CIO-TERM100
SCB-50SSR-RACK24 (DADP-5037 adaptor required)
SSR-RACK08 (DADP-5037 adaptor required)
CIO-ERB24 (DADP-5037 adaptor required)
CIO-ERB08 (DADP-5037 adaptor required)

7PCI-DAS1602/16

Specifications

Table 16. 8-channel differential modePin
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950Signal Name
LLGND
CH0 HI
CH0 LOCH1 HI
CH1 LOCH2 HI
CH2 LOCH3 HI
CH3 LOCH4 HI
CH4 LOCH5 HI
CH5 LOCH6 HI
CH6 LOCH7 HI
CH7 LO
LLGND
N/C
N/C
N/C
N/C
N/C
N/CN/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
D/A GND 0
D/A OUT 0
D/A GND 1
D/A OUT 1
CTR4 CLK
CTR4 GATECTR4 OUT
A/D EXTERNAL PACER
ANALOG TRIGGER IN
D/A EXTERNAL PACER IN
A/D EXTERNAL TRIGGER IN
N/C
N/C
PC +5VSSH OUT
GND

Pin
51
52535455
5657585960616263646566
6768
697071
7273
7475
76
77
78
7980
8182838485
86878889909192939495969798991008Signal Name
FIRSTPORTA Bit 0
FIRSTPORTA Bit 1
FIRSTPORTA Bit 2
FIRSTPORTA Bit 3
FIRSTPORTA Bit 4
FIRSTPORTA Bit 5
FIRSTPORTA Bit 6
FIRSTPORTA Bit 7
FIRSTPORTB Bit 0
FIRSTPORTB Bit 1
FIRSTPORTB Bit 2
FIRSTPORTB Bit 3
FIRSTPORTB Bit 4
FIRSTPORTB Bit 5
FIRSTPORTB Bit 6
FIRSTPORTB Bit 7
FIRSTPORTC Bit 0
FIRSTPORTC Bit 1FIRSTPORTC Bit 2
FIRSTPORTC Bit 3
FIRSTPORTC Bit 4
FIRSTPORTC Bit 5
FIRSTPORTC Bit 6
FIRSTPORTC Bit 7
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/CN/C
GND
+12V
GND
-12V
N/C
N/C
A/D INTERNAL PACER OUTPUT
D/A INTERNAL PACER OUTPUT
EXTERNAL D/A PACER GATE
N/C
EXTERNAL INTERRUPT
GND

PCI-DAS1602/16

Specifications

Table 17. 16-channel single-ended modePin
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950Signal Name
LLGND
CH0 HI
CH8 HICH1 HI
CH9 HICH2 HI
CH10 HI
CH3 HI
CH11 HI
CH4 HI
CH12 HICH5 HI
CH13 HICH6 HI
CH14 HICH7 HI
CH15 HI
LLGND
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
D/A GND 0
D/A OUT 0
D/A GND 1
D/A OUT 1
CTR4 CLK
CTR4 GATECTR4 OUT
A/D EXTERNAL PACER
ANALOG TRIGGER IN
D/A EXTERNAL PACER IN
A/D EXTERNAL TRIGGER IN
N/C
N/C
PC +5VSSH OUT
GND

Pin
5152535455
5657
585960616263646566
6768697071727374757677787980818283848586878889909192939495969798991009Signal Name
FIRSTPORTA Bit 0
FIRSTPORTA Bit 1
FIRSTPORTA Bit 2
FIRSTPORTA Bit 3
FIRSTPORTA Bit 4
FIRSTPORTA Bit 5
FIRSTPORTA Bit 6
FIRSTPORTA Bit 7
FIRSTPORTB Bit 0
FIRSTPORTB Bit 1
FIRSTPORTB Bit 2
FIRSTPORTB Bit 3
FIRSTPORTB Bit 4
FIRSTPORTB Bit 5
FIRSTPORTB Bit 6
FIRSTPORTB Bit 7
FIRSTPORTC Bit 0
FIRSTPORTC Bit 1
FIRSTPORTC Bit 2
FIRSTPORTC Bit 3
FIRSTPORTC Bit 4
FIRSTPORTC Bit 5
FIRSTPORTC Bit 6
FIRSTPORTC Bit 7
N/CN/CN/CN/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
GND
+12V
GND-12V
N/C
N/C
A/D INTERNAL PACER OUTPUT
D/A INTERNAL PACER OUTPUT
EXTERNAL D/A PACER GATE
N/C
EXTERNAL INTERRUPTGND

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PCI-DAS1602_16 SPEC.doc