Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay Lines
The FDC and FDD family of fixed single in-line package (SIP) delayline products are available in a variety of types in either standard
or custom specifications.
SPICE Model is available.

FEATURES•

Miniaturized high-speed fixed delay lines that combine
ELMEC's high-density delay line elements in a single in-linepackage.

•Suitable for use with a variety of logic elements includingt h e E C L i n P S , E C L 1 0 0 K H , 1 0 K s e r i e s a s w e l l a s T T L FA S T,C M O S FA C T a n d a n a l o g c i r c u i t s .

•Since the FDC and FDD feature the same package
size (except for height) and pin configuration, withboth types combined a delay time range of 0-27ns(0-15ns in our 50Ω version) can be adjusted invarying increments of 50ps, 100ps, and 500ps.
See the following pages for detailed specifications.

COMMON SPECIFICATIONSF D C Ty p e

Waveform Distortion:
Overshoot/preshoot under ±20%
Insulation Resistance:
DC50V, over 100M
Durable Voltage:
DC50V, 1 minuteOperating Temperature Range: -40°C to +85°C
Storage Temperature Range:-40°C to +120°C

F D D Ty p e

PACKAGE DIMENSIONS & PIN CONFIGURATION
 -AX -AX

 -IN  -IN!

 -AX -AX  Unit:mm (inch)    )N 'ND /UT)N/UTA F D C Ty p e : 6 M A X ( . 2 3 6 )F D D Ty p e : 8 M A X ( . 3 1 5 )Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay Lines
SPECIFICATIONS
0ART .UMBER&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#!
&$#
&$#
&$#
&$#
&$#!
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#
&$#

2ISE 4IME  -AX
PSPSÕPS
PSÕPS
PS
PS
PSÕPS
PS
PSÕPS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
PSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS㱅ÕNSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NSÕPS
PS
NS PS PS
PS
NSÕNS
PS
NSÕNS
PS
NSÕNSPSNSÕNSPSNSÕNSPSNSÕNSPSNSÕNSPSNSÕNSPSNSÕNSPS㱅ÕNSÕNSPSNSÕNSPSNSÕNSPSNSÕNSPSNSÕNSPS)MPEDANCE$ELAY 4IME

D" 0ASSBAND

-INIMUM
'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z'(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z'(Z'(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z4EMPERATURE#OEFFICIENTÕPPM#Õ
PPM#ÕPPM#.OTE 0RODUCT NUMBERS WITH AN ASTERISK  ARE DISTRIBUTED CONSTANT TYPE DELAY LINES

Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay Lines
SPECIFICATIONS
0ART .UMBER&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$
&$$

)MPEDANCE㱅Õ

㱅Õ

$ELAY 4IME
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNSNSÕNS
NSÕNS
NSÕNSNSÕNS
NSÕNS
NSÕNSNSÕNSNSÕNS
NSÕNSNSÕNSNSÕNSNSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNSNSÕNS
NSÕNSNSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS
NSÕNS

2ISE 4IME  -AX
PS
PS
PS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
PS
PS
PS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS
NS

D" 0ASSBAND

-INIMUM
-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z-(Z4EMPERATURE#OEFFICIENTÕ
PPM#Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay LinesTYPICAL APPLICATIONS AND TERMINATION METHODS(1) Analog circuit
r:Impedance of signal source

Rin :Input adjustment resistance
Zo :Characteristics impedance of internalElements (=Output impedance)
Ro :Internal adjustment resistance (=Zo)
r+Rin=Zo=R(2) ECL (-2V termination line used)

Connect to one of the V C C , V E E or -2V lines( 4 ) LV P E C L(3) PECL

Connect to either V C C or V E E lines( 5 ) LV P E C L D i ff e r e n t i a lConnect to either 3.3V or GND

Connect to either 3.3V or GNDConnect to either 3.3V or GND( 6 ) T T L ( FA S T ) , C M O S ( FA C T )Series termination

Ro should be adjusted to a value near Zo.

Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay LinesOUTPUT WAVEFORMS (1)(1) FDC0505
Output waveform (Step function) 㪈㪅㪌㪇

Sdd21 Amplitude / Frequency㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪇㪅㪌㪇㪈㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪈㪅㪌㪇㪇㪄㪈㪄㪉㪄㪊㪄㪋㪄㪌㪄㪍㪄㪎㪄㪏㪄㪐㪄㪈㪇㪇㪉㪅㪇㪇㪇㪅㪌㪈㪈㪅㪌㪉㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (1GHz Clock)Group Delay㪈㪅㪌㪇㪈㪇㪅㪐㪇㪅㪏㪇㪅㪎㪇㪅㪍㪇㪅㪌㪇㪅㪋㪇㪅㪊㪇㪅㪉㪇㪅㪈㪇Out㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In  㪈㪅㪇㪇㪇㪅㪌㪇㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪇㪅㪌㪇㪈㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪈㪅㪌㪇㪇㪉㪅㪇㪇㪇㪅㪌㪈㪈㪅㪌㪉㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪉㪅㪌㪊㪉㪅㪌㪊(2) FDC1005
Output waveform (Step function) 㪈㪅㪌㪇

Sdd21 Amplitude / Frequency㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇
㪄㪇㪅㪌㪇
㪄㪈㪅㪇㪇
㪄㪈㪅㪌㪇
㪇㪅㪇㪇

㪇㪅㪌㪇

㪈㪅㪇㪇
㪫㫀㫄㪼㪲㫅㫊㪴

㪈㪅㪌㪇

㪉㪅㪇㪇

㪇

㪇
㪄㪈㪄㪉㪄㪊㪄㪋㪄㪌㪄㪍㪄㪎㪄㪏㪄㪐㪄㪈㪇㪇㪇㪅㪌㪈㪈㪅㪌㪉㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (1GHz Clock)Group Delay㪈㪅㪌㪇㪉㪈㪅㪏㪈㪅㪍㪈㪅㪋㪈㪅㪉㪈㪇㪅㪏㪇㪅㪍㪇㪅㪋㪇㪅㪉㪇㪇㪅㪌㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪇㪅㪌㪇㪈㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪈㪅㪌㪇㪉㪅㪇㪇㪇㪇㪅㪌㪈㪈㪅㪌㪉㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪉㪅㪌㪉㪅㪌㪊㪊Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay LinesOUTPUT WAVEFORMS (2)(3) FDC2005
Sdd21 Amplitude / Frequency

Output waveform (Step function) 㪈㪅㪌㪇㪇
㪄㪈
㪄㪉㪄㪊
㪄㪋
㪄㪌
㪄㪍㪄㪎㪄㪏㪄㪐㪄㪈㪇㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪈㪅㪇㪇㪉㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪊㪅㪇㪇㪇㪋㪅㪇㪇㪇㪅㪌㪈㪈㪅㪌㪉㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (500MHz Clock)Group Delay㪈㪅㪌㪇㪋㪊㪅㪌㪊㪉㪅㪌㪉㪈㪅㪌㪈㪇㪅㪌㪇㪇㪅㪌㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪈㪅㪇㪇㪉㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪊㪅㪇㪇㪋㪅㪇㪇㪇㪇㪅㪌㪈㪈㪅㪌㪉㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪉㪅㪌㪊㪉㪅㪌㪊(4) FDC2505A
Output waveform (Step function) 㪈㪅㪌㪇

Sdd21 Amplitude / Frequency

㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇
㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪈㪅㪇㪇㪉㪅㪇㪇㪊㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪋㪅㪇㪇㪇㪄㪈㪄㪉
㪄㪊㪄㪋
㪄㪌
㪄㪍
㪄㪎
㪄㪏
㪄㪐
㪄㪈㪇
㪇

㪌㪅㪇㪇

㪇㪅㪌

㪈
㪈㪅㪌
㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (400MHz Clock)Group Delay㪈㪅㪌㪇㪌㪋㪅㪌㪋㪊㪅㪌㪊㪉㪅㪌㪉㪈㪅㪌㪈㪇㪅㪌㪇㪇㪅㪌㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪈㪅㪇㪇㪉㪅㪇㪇㪊㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪋㪅㪇㪇㪌㪅㪇㪇㪇㪇㪅㪌㪈㪈㪅㪌㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪉㪉㪅㪌㪉㪉㪅㪌Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay LinesOUTPUT WAVEFORMS (3)(5) FDC3005A
Output waveform (Step function) 㪈㪅㪌㪇

Sdd21 Amplitude / Frequency㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇
㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇
㪄㪈㪅㪌㪇
㪇㪅㪇㪇

㪈㪅㪇㪇

㪉㪅㪇㪇

㪊㪅㪇㪇 㪋㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴

㪌㪅㪇㪇㪍㪅㪇㪇㪇㪄㪈㪄㪉㪄㪊㪄㪋
㪄㪌㪄㪍
㪄㪎
㪄㪏
㪄㪐㪄㪈㪇㪇㪇㪅㪌㪈㪈㪅㪌㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (333MHz Clock)Group Delay㪈㪅㪌㪇㪍㪇㪅㪌㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪈㪅㪇㪇㪉㪅㪇㪇㪊㪅㪇㪇 㪋㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪌㪅㪇㪇㪉㪉㪅㪌㪌㪋㪊㪉㪈㪇㪍㪅㪇㪇㪇㪇㪅㪌㪈㪈㪅㪌㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪉㪉㪅㪌(6) FDC5005
Output waveform (Step function) 㪈㪅㪌㪇

Sdd21 Amplitude / Frequency㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out

㪇㪅㪇㪇
㪄㪇㪅㪌㪇
㪄㪈㪅㪇㪇
㪄㪈㪅㪌㪇㪇㪅㪇㪇㪉㪅㪇㪇㪋㪅㪇㪇㪍㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪏㪅㪇㪇㪇㪄㪈㪄㪉㪄㪊㪄㪋㪄㪌㪄㪍
㪄㪎㪄㪏㪄㪐㪄㪈㪇㪈㪇㪅㪇㪇㪇㪇㪅㪉㪇㪅㪋㪇㪅㪍㪇㪅㪏㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (200MHz Clock)Group Delay㪈㪅㪌㪇㪈㪇㪐㪏㪎㪍㪌㪋㪊㪉㪈㪇㪇㪅㪌㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪉㪅㪇㪇㪋㪅㪇㪇㪍㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪏㪅㪇㪇㪈㪇㪅㪇㪇㪇㪇㪅㪉㪇㪅㪋㪇㪅㪍㪇㪅㪏㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪈㪈㪅㪉㪈㪈㪅㪉Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay LinesOUTPUT WAVEFORMS (4)(7) FDD10005
Sdd21 Amplitude / Frequency

Output waveform (Step function) 㪈㪅㪌㪇㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪌㪅㪇㪇㪈㪇㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪈㪌㪅㪇㪇㪇㪄㪈㪄㪉㪄㪊㪄㪋
㪄㪌
㪄㪍
㪄㪎
㪄㪏
㪄㪐
㪄㪈㪇㪇㪉㪇㪅㪇㪇㪇㪅㪈㪇㪅㪉㪇㪅㪊
㪇㪅㪋㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (100MHz Clock)Group Delay㪈㪅㪌㪇㪉㪇㪈㪏㪈㪍㪈㪋㪈㪉㪈㪇㪏㪍㪋㪉㪇㪇㪅㪌㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪌㪅㪇㪇㪈㪇㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪈㪌㪅㪇㪇㪇㪉㪇㪅㪇㪇㪇㪅㪈㪇㪅㪉㪇㪅㪊㪇㪅㪋㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪇㪅㪌㪇㪅㪍㪇㪅㪌㪇㪅㪍(8) FDD15005
Output waveform (Step function) 㪈㪅㪌㪇

Sdd21 Amplitude / Frequency㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇
㪄㪇㪅㪌㪇
㪄㪈㪅㪇㪇
㪄㪈㪅㪌㪇
㪇㪅㪇㪇

㪇
㪄㪈
㪄㪉㪄㪊
㪄㪋
㪄㪌㪄㪍㪄㪎㪄㪏㪄㪐㪄㪈㪇㪇㪌㪅㪇㪇 㪈㪇㪅㪇㪇 㪈㪌㪅㪇㪇 㪉㪇㪅㪇㪇 㪉㪌㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪇㪅㪈㪇㪅㪉㪇㪅㪊㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴Group Delay㪈㪅㪌㪇㪊㪇In㪈㪅㪇㪇
㪇㪅㪌㪇

Out㪇㪅㪇㪇
㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴

Output waveform (66.7MHz Clock)

㪇㪅㪋㪉㪌
㪉㪇
㪈㪌
㪈㪇
㪌
㪇

㪄㪈㪅㪌㪇㪇㪅㪇㪇㪌㪅㪇㪇 㪈㪇㪅㪇㪇 㪈㪌㪅㪇㪇 㪉㪇㪅㪇㪇 㪉㪌㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪇㪇㪅㪈㪇㪅㪉㪇㪅㪊㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪇㪅㪋Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay LinesOUTPUT WAVEFORMS (5)(9) FDC5010
Output waveform (Step function) 㪈㪅㪌㪇

Sdd21 Amplitude / Frequency

㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇
㪄㪇㪅㪌㪇
㪄㪈㪅㪇㪇
㪄㪈㪅㪌㪇
㪇㪅㪇㪇

㪉㪅㪇㪇

㪋㪅㪇㪇㪍㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪏㪅㪇㪇㪇㪄㪈㪄㪉㪄㪊㪄㪋㪄㪌㪄㪍㪄㪎㪄㪏㪄㪐㪄㪈㪇㪇㪈㪇㪅㪇㪇㪇㪅㪉㪇㪅㪋㪇㪅㪍㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (200MHz Clock)Group Delay㪈㪅㪌㪇㪈㪇㪐
㪏
㪎
㪍
㪌
㪋㪊㪉㪈
㪇㪇㪅㪌㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪉㪅㪇㪇㪋㪅㪇㪇㪍㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪏㪅㪇㪇㪇㪈㪇㪅㪇㪇㪇㪅㪉㪇㪅㪋㪇㪅㪍㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪇㪅㪏㪈㪇㪅㪏㪈(10) FDD10010
Output waveform (Step function)
 

㪈㪅㪌㪇

Sdd21 Amplitude / Frequency㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪌㪅㪇㪇㪈㪇㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪈㪌㪅㪇㪇㪇㪄㪈㪄㪉㪄㪊㪄㪋㪄㪌
㪄㪍㪄㪎㪄㪏㪄㪐
㪄㪈㪇㪉㪇㪅㪇㪇㪇㪇㪅㪈㪇㪅㪉㪇㪅㪊
㪇㪅㪋㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (100MHz Clock)Group Delay㪈㪅㪌㪇㪉㪇㪈㪏㪈㪍㪈㪋㪈㪉
㪈㪇
㪏
㪍
㪋
㪉㪇

㪇㪅㪌㪇

㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇

Out

㪇㪅㪇㪇
㪄㪇㪅㪌㪇
㪄㪈㪅㪇㪇
㪄㪈㪅㪌㪇㪇㪅㪇㪇

㪌㪅㪇㪇

㪈㪇㪅㪇㪇
㪫㫀㫄㪼㪲㫅㫊㪴

㪈㪌㪅㪇㪇

㪉㪇㪅㪇㪇

㪇

㪇㪅㪈

㪇㪅㪉
㪇㪅㪊
㪇㪅㪋
㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪇㪅㪌㪇㪅㪍

㪇㪅㪌㪇㪅㪍Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay LinesOUTPUT WAVEFORMS (6)(11) FDD15010
Output waveform (Step function)

Sdd21 Amplitude / Frequency

㪈㪅㪌㪇㪇
㪄㪈
㪄㪉
㪄㪊
㪄㪋
㪄㪌
㪄㪍
㪄㪎㪄㪏
㪄㪐
㪄㪈㪇

㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇
㪄㪇㪅㪌㪇
㪄㪈㪅㪇㪇
㪄㪈㪅㪌㪇
㪇㪅㪇㪇

㪇

㪌㪅㪇㪇 㪈㪇㪅㪇㪇 㪈㪌㪅㪇㪇 㪉㪇㪅㪇㪇 㪉㪌㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪇㪅㪈㪇㪅㪉㪇㪅㪊㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴

Output waveform (66.7MHz Clock)Group Delay㪈㪅㪌㪇㪊㪇㪇㪅㪌㪇

㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴In㪈㪅㪇㪇

Out㪇㪅㪇㪇
㪄㪇㪅㪌㪇
㪄㪈㪅㪇㪇
㪄㪈㪅㪌㪇
㪇㪅㪇㪇

㪇㪅㪋

㪉㪌
㪉㪇
㪈㪌
㪈㪇
㪌
㪇

㪌㪅㪇㪇 㪈㪇㪅㪇㪇 㪈㪌㪅㪇㪇 㪉㪇㪅㪇㪇 㪉㪌㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪇

㪇㪅㪈

㪇㪅㪉
㪇㪅㪊
㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪇㪅㪋(12) FDD27010
Sdd21 Amplitude / Frequency

Output waveform (Step function) 㪈㪅㪌㪇

㪇㪅㪌㪇㪤㪸㪾㫅㫀㫋㫌㪻㪼㪲㪻㪙㪴In㪈㪅㪇㪇Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪇㪅㪇㪇㪈㪇㪅㪇㪇㪉㪇㪅㪇㪇 㪊㪇㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪋㪇㪅㪇㪇㪇㪄㪈㪄㪉㪄㪊㪄㪋㪄㪌㪄㪍㪄㪎㪄㪏㪄㪐㪄㪈㪇㪇㪌㪇㪅㪇㪇㪇㪅㪇㪌㪇㪅㪈㪇㪅㪈㪌㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴Group Delay㪈㪅㪌㪇㪍㪇In㪈㪅㪇㪇㪇㪅㪌㪇Out㪇㪅㪇㪇㪄㪇㪅㪌㪇㪄㪈㪅㪇㪇㪄㪈㪅㪌㪇㪞㫉㫆㫌㫇㩷㪛㪼㫃㪸㫐㪲㫅㫊㪴

Output waveform (37MHz Clock)㪇㪅㪉㪌㪇㪋㪇㪊㪇㪉㪇㪈㪇㪇㪇㪅㪇㪇㪈㪇㪅㪇㪇 㪉㪇㪅㪇㪇 㪊㪇㪅㪇㪇 㪋㪇㪅㪇㪇 㪌㪇㪅㪇㪇㪫㫀㫄㪼㪲㫅㫊㪴㪇㪇㪅㪇㪌㪇㪅㪈㪇㪅㪈㪌
㪝㫉㪼㫈㫌㪼㫅㪺㫐㪲㪞㪟㫑㪴㪇㪅㪉Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02

Fixed Delay Lines

FDC/FDD High-Speed Fixed Delay Lines
RoHS Compliance Status
1. Compliance Status
R o H S - c o m p l i a n t c o m p o n e n t s a r e a v a i l a b l e . H o w e v e r, i f R o H S - c o m p l i a n tc o m p o n e n t s a r e n o t s p e c i f i e d a t t h e t i m e o f o r d e r, n o n - c o m p l i a n t s t o c k i t e m s
may be supplied until depleted.
2 . D i ff e r e n t i a t i n g C o m p l i a n t a n d N o n - c o m p l i a n t C o m p o n e n t sCompliant and Non-compliant Components will be differentiated by LotNumbers.
Non-compliant Components: 2-digit year/month code
Compliant Components: S+2-digit year/month code (3-digit code)
3 . Te r m i n a l P l a t i n g
Non-compliant Components: 90% Sn/10% Pb, 7μm Min
Compliant Components: Base: 100% Ni, 0.2~0.5μm
External: 100% Sn, 5~10μm

Note: Published speciﬁcations are subject to change without prior notice.
WN 124009I/12.02