REVISIONSLTR

DESCRIPTIONDATE (YR-MO-DA)APPROVEDA

Update boilerplate paragraphs to current requirements. - ro

12-06-06

C. SAFFLE

B

Update document paragraphs to current requirements. - ro

18-02-21

C. SAFFLE

24-04-25

J. ESCHMEYERC

Update JEDEC figure 1 package from MO-178-AA to MO-178.
Add typical limits to PSRR, IIB, IOS, CMRR, VOSR, and IQ tests as specified
under Table I. Update document to current requirements. - ro

CURRENT DESIGN ACTIVITY CAGE CODE 16236
HAS CHANGED NAMES TO
DLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990
Prepared in accordance with ASME Y14.24

Vendor Item Drawing

Revision Status of Sheets
REVSHEETREVCCCCCCCCCCCSHEET1234567891011

PMIC N/A
Original date ofdrawing
YY-MM-DD
06-07-07

PREPARED BY
RICK OFFICERCHECKED BY
TOM HESSAPPROVED BYRAYMOND MONNIN
SIZECAGE CODEA
REVAMSC N/A

DLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

16236
CTITLEhttps://www.dla.mil/landandmaritime

MICROCIRCUIT, CMOS, OPERATIONALAMPLIFIER, MONOLITHIC SILICONDWG NO.

PAGE

DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.

V62/06641
1 OF 115962-V020-24

1. SCOPE
1.1 Scope. This drawing documents the general requirements of a high performance CMOS operational amplifier microcircuit, with
an operating temperature range of -55°C to +125°C.
1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item
drawing establishes an administrative control number for identifying the item on the engineering documentation:
V62/06641-Drawing
number01

X

E

Device type
(See 1.2.1)

Case outline(See 1.2.2)

Lead finish(See 1.2.3)

1.2.1 Device type(s).
Device type

Generic01

OPA336-EP

Circuit function
CMOS operational amplifier

1.2.2 Case outline(s). The case outline(s) are as specified herein.
Outline letter

Number of pins

JEDEC PUB 95

X

5MO-178

Package style
Plastic small outline

1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer:
Finish designatorMaterialA
BCDEFZDLA LAND AND MARITIMECOLUMBUS, OHIO

Hot solder dip
Tin-lead plate
Gold plate
PalladiumGold flash palladium
Tin-lead alloy (BGA/CGA)
OtherSIZEACAGE CODE
16236

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PAGE 2

1.3 Absolute maximum ratings.

1/

Supply voltage (VS) .................................................................................................................. 7.5 V
Signal input terminals:
Voltage range ....................................................................................................................... -VS – 0.3 V to +VS + 0.3 V 2/
Current ................................................................................................................................. 10 mA 2/
Output short circuit ................................................................................................................... Continuous 3/
Storage temperature range (TSTG) .......................................................................................... -55°C to +125°C
Junction temperature (TJ) ........................................................................................................ +150°C
Lead temperature (soldering, 10 seconds) ............................................................................... +300°C
Electrostatic discharge rating:Charged device model (CDM) .............................................................................................. 1000 V
Human body model (HBM) ................................................................................................... 500 V
Machine model (MM) ........................................................................................................... 100 V
Package thermal impedance (θJA) ........................................................................................... 200°C/W
1.4 Recommended operating conditions. 4/
Supply voltage range (VS) ........................................................................................................ 2.3 V to 5.5 V
Operating free-air temperature range (TA) ............................................................................... -55°C to +125°C______
1/

2/
3/
4/

Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stressratings only, and functional operation of the device at these or any other conditions beyond those indicated under“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
Input terminals are diode clamped to the power supply rails. Input signals that can swing more than 0.3 V beyond thesupply rails should be current limited to 10 mA or less.
Short circuit to ground, one amplifier per package.
Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer
and/or distributor maintain no responsibility or liability for product used beyond the stated limits.

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REV CPAGE 32. APPLICABLE DOCUMENTSJEDEC Solid State Technology Association
JEDEC PUB 95–Registered and Standard Outlines for Semiconductor Devices(Copies of these documents are available online at https://www.jedec.org.)
3. REQUIREMENTS
3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as
follows:
A.
B.
C.

Manufacturer’s name, CAGE code, or logo
Pin 1 identifier
ESDS identification (optional)

3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable)
above.
3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics areas specified in 1.3, 1.4, and table I herein.
3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein.
3.5 Diagrams.
3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1.
3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2.

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PAGE 4TABLE I. Electrical performance characteristics. 1/Test

SymbolConditions 2/Temperature,TADevice
typeLimits
MinUnitMax

Offset voltage section
Input offset voltage

+25°C

VOS

01

±500-55°C to +125°C
Input offset voltage
versus power supply

PSRR

VS = 2.3 V to 5.5 V+25°C

µV

±950
01

100µV/V

25 typical150-55°C to +125°C
Channel separation, dc+25°C

01

+25°C

01

0.1 typicalInput bias current section
Input bias current

IIB±10pA±1 typical-55°C to +125°CInput offset current

+25°C

IOS

±20001±60pA±1 typical
Noise section
Input voltage noisef = 0.1 Hz to 10 Hz+25°C

01

3 typicalµVp-p+25°C

01

40 typicalnV /Input voltage noisedensityenf = 1 kHzCurrent noise densityinf = 1 kHz

Hz+25°C

01

30 typical

+25°C

01

-0.2+25°C

01

76

fA / Hz

Input voltage range section
Common mode
voltage range

VCM

Common mode
rejection ratio

CMRR-0.2 V < VCM < ( +VS ) – 1 V+VS-1VdB

86 typical
72-55°C to +125°C
Input impedance section
Differential input
impedance

3/+25°C

011013 || 2 typicalΩ || pF

Common mode input
impedance

3/+25°C011013 || 4 typicalΩ || pF

See footnotes at end of table.

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PAGE 5TABLE I. Electrical performance characteristics – Continued. 1/Test

SymbolConditions 2/

Temperature,TA

DevicetypeLimits
MinUnit
Max

Open loop gain section
Open loop voltage gain

AOL

100 mV < VO < (+VS) – 100 mV,+25°C0190dB

RL = 25 kΩ
90500 mV < VO < (+VS) – 500 mV,
RL = 5 kΩ
100 mV < VO < (+VS) – 100 mV,

82-55°C to +125°C

RL = 25 kΩ
89

500 mV < VO < (+VS) – 500 mV,
RL = 5 kΩ
Frequency response section
Gain bandwidthproduct

GBW

VS = 5 V, G = 1+25°C

01

100 typical

kHzSlew rate

SR

VS = 5 V, G = 1+25°C

01

0.03 typicalV/µs

VIN x G = VS+25°C

01

100 typicalµs

RL = 100 kΩ, AOL ≥ 70 dB+25°C

01

3 typicalmVOverload recovery time
Output section
Voltage output
swing from rail

4/VOSR100

RL = 25 kΩ, AOL ≥ 90 dB

20 typical500

RL = 5 kΩ, AOL ≥ 90 dB

70 typical
RL = 25 kΩ, AOL ≥ 82 dB

100-55°C to +125°C

500

RL = 5 kΩ, AOL ≥ 89 dB
Short circuit current

+25°C

ISC

01

±5 typicalSee footnotes at end of table.

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PAGE 6mA

TABLE I. Electrical performance characteristics – Continued. 1/Test

SymbolConditions 2/Temperature,TADevicetypeLimitsUnitMinMax

5.5

Power supply section
Specified voltage range

VSMinimum operating
voltage
Quiescent current

IQ

IO = 0+25°C

01

2.3+25°C

01

2.1 typicalV+25°C

01

35µA

(per amplifier)V

23 typical-55°C to +125°C

38

1/Testing and other quality control techniques are used to the extent deemed necessary to assure product performance overthe specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters
may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization
and/or design.

2/

Unless otherwise specified, VS = 2.3 V to 5.5 V, RL = 25 kΩ connected to VS / 2.

3/

The || symbols represent that the values and symbols are in parallel to each other.

4/

Output voltage swings are measured between the output and positive and negative power supply rails.

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PAGE 7

Case XFIGURE 1. Case outline.

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PAGE 8Case X - continued

SymbolDimensions
InchA

Millimeters

Minimum

Maximum

Minimum

Maximum.035.057

0.90

1.45

A1.043 REF

1.1 REF

A2.000 TYP.006 TYP

0.0 TYP

0.15 TYP

b.012

.020

0.3

0.5

c.003

.009

0.08

0.22

D.108.120

2.75

3.05

D1.006 REF

0.15 REF

E.057

.069

1.45

1.75

E1.102.118

2.6

3.0

E2.004 REF

0.1 REFe.037 BSC

0.95 BSC

e1.075 BSC

1.9 BSC

L.012 TYP

.024 TYP

0.3 TYP

0.6 TYPNOTES:
1. Controlling dimensions are millimeter, inch dimensions are given for reference only.
2. Body dimensions do not include mold flash, protrusion, or gate burrs. Mold flash, protrusion, and gate burrs shall not
exceed 0.25 mm (0.010 inch) per side.
3. Support pin may differ or may not be present.
4. Falls with JEDEC MO-178.

FIGURE 1. Case outline - Continued.

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PAGE 9Device type01

Case outlineX

Terminal numberTerminalsymbol

1

OUTPUT

2-VS

3+INPUT

4-INPUT

5+VSFIGURE 2. Terminal connections.

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4. VERIFICATION
4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements asindicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices,classification, packaging, and labeling of moisture sensitive devices, as applicable.
5. PREPARATION FOR DELIVERY
5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial
practices for electrostatic discharge sensitive devices.
6. NOTES
6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum.
6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book.
The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided.
6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee
of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all
current sources of supply at https://landandmaritimeapps.dla.mil/programs/smcr/.

Vendor item drawing
administrative control
number 1/Devicemanufacturer
CAGE code

Top sidemarking

Vendor part number

V62/06641-01XE

01295

OAYM

OPA336MDBVREP

1/ The vendor item drawing establishes an administrative control number for identifying
the item on the engineering documentation.

CAGE code

Source of supply

01295

Texas Instruments, Inc.
Semiconductor Group
8505 Forest Ln.
PO Box 660199
Dallas, TX 75243

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