User’s Manual

Cover

RZ/G2UL, RZ/A3UL, RZ/Five
SMARC Module Board
User’s Manual: Hardware
Renesas Microprocessor
RZ Family / RZ/G, RZ/A Series
RTK9743U11C01000BE
RTK9743F01C01000BE
RTK9763U02C01000BE
RTK9763U02C01001BE

All information contained in these materials, including products and product specifications,represents information on the product at the time of publication and is subject to change byRenesas Electronics Corp. without notice. Please review the latest information published byRenesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).

www.renesas.com

Rev.1.10

Dec, 2022

1 Renesas Electronics Corporation. All rights reserved.

Notice1.

Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products
and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of yourproduct or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the useof these circuits, software, or information.
2. Renesas Electronics hereby expressly disclaims any warranties against and liability for infringement or any other claims involving patents, copyrights,
or other intellectual property rights of third parties, by or arising from the use of Renesas Electronics products or technical information described in thisdocument, including but not limited to, the product data, drawings, charts, programs, algorithms, and application examples.
3. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics
or others.
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and all liability for any losses or damages incurred by you or third parties arising from such alteration, modification, copying or reverse engineering.
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disclaims any and all liability for any damages or losses incurred by you or any third parties arising from the use of any Renesas Electronics productthat is inconsistent with any Renesas Electronics data sheet, user’s manual or other Renesas Electronics document.
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(Note2)“Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
(Rev.5.0-1 October 2020)

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Renesas and the Renesas logo are trademarks of Renesas Electronics
Corporation. All trademarks and registered trademarks are the property of
their respective owners.

© 2022 Renesas Electronics Corporation. All rights reserved.

Trademarks (continued)
For the “Cortex” notation, it is used as follows;— Arm® Cortex®-A55— Arm® Cortex®-M33
Note that after this page, they may be noted as Cortex-A55 and Cortex-M33 respectively.
Examples of trademark or registered trademark used in the RZ/G2UL, RZ/A3UL and RZ/Five SMARC Module Board User’s Manual: Hardware;
CoreSight™: CoreSight is a trademark of Arm Limited.
MIPI®: MIPI is a registered trademark of MIPI Alliance, Inc.
eMMC™: eMMC is a trademark of MultiMediaCard Association.
OctaFlash™: OctaFlash is trademarks of Macronix International Co., Ltd
OctaRAM™ OctaRAM is trademarks of Macronix International Co., Ltd
Note that in each section of the Manual, trademark notation of ® and TM may be omitted.
All other trademarks and registered trademarks are the property of their respective owners.
AndesCore™ AX45MP is a trademark owned by Andes Technology Corporation.

© 2022 Renesas Electronics Corporation. All rights reserved.

General Precautions in the Handling of Microprocessing Unit andMicrocontroller Unit Products
The following usage notes are applicable to all Microprocessing unit and Microcontroller unit products from Renesas. For detailed usage notes on the
products covered by this document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products.
1.

Precaution against Electrostatic Discharge (ESD)
A strong electrical field, when exposed to a CMOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps
must be taken to stop the generation of static electricity as much as possible, and quickly dissipate it when it occurs. Environmental control must be
adequate. When it is dry, a humidifier should be used. This is recommended to avoid using insulators that can easily build up static electricity.
Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test andmeasurement tools including work benches and floors must be grounded. The operator must also be grounded using a wrist strap. Semiconductor
devices must not be touched with bare hands. Similar precautions must be taken for printed circuit boards with mounted semiconductor devices.

2.

Processing at power-on
The state of the product is undefined at the time when power is supplied. The states of internal circuits in the LSI are indeterminate and the states ofregister settings and pins are undefined at the time when power is supplied. In a finished product where the reset signal is applied to the external resetpin, the states of pins are not guaranteed from the time when power is supplied until the reset process is completed. In a similar way, the states of pins
in a product that is reset by an on-chip power-on reset function are not guaranteed from the time when power is supplied until the power reaches thelevel at which resetting is specified.

3.

Input of signal during power-off state
Do not input signals or an I/O pull-up power supply while the device is powered off. The current injection that results from input of such a signal or I/O
pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal
elements. Follow the guideline for input signal during power-off state as described in your product documentation.

4.

Handling of unused pins
Handle unused pins in accordance with the directions given under handling of unused pins in the manual. The input pins of CMOS products are
generally in the high-impedance state. In operation with an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of
the LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal
become possible.

5.

Clock signals
After applying a reset, only release the reset line after the operating clock signal becomes stable. When switching the clock signal during program
execution, wait until the target clock signal is stabilized. When the clock signal is generated with an external resonator or from an external oscillator
during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Additionally, when switching to a clock signal
produced with an external resonator or by an external oscillator while program execution is in progress, wait until the target clock signal is stable.

6.

Voltage application waveform at input pin
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL(Max.) and VIH (Min.) due to noise, for example, the device may malfunction. Take care to prevent chattering noise from entering the device when the
input level is fixed, and also in the transition period when the input level passes through the area between VIL (Max.) and VIH (Min.).

7.

Prohibition of access to reserved addresses
Access to reserved addresses is prohibited. The reserved addresses are provided for possible future expansion of functions. Do not access theseaddresses as the correct operation of the LSI is not guaranteed.

8.

Differences between products
Before changing from one product to another, for example to a product with a different part number, confirm that the change will not lead to problems.
The characteristics of a microprocessing unit or microcontroller unit products in the same group but having a different part number might differ in termsof internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values,
operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a systemevaluation test for the given product.

Table of Contents
1.

2.

Overview ....................................................................................................................... 7
1.1

Overview ........................................................................................................................................... 7

1.2

Configuration .................................................................................................................................... 8

1.3

Features ............................................................................................................................................ 9
1.3.1

RTK9743U11C01000BE (RZ/G2UL SMARC Module Board) ............................................... 9

1.3.2

RTK9763U02C01000BE (RZ/A3UL SMARC Module Board QSPI Edition) ........................ 10

1.3.3

RTK9763U02C01001BE (RZ/A3UL SMARC Module Board OCTAL Edition)..................... 11

1.3.4

RTK9743F01C01000BE (RZ/Five SMARC Module Board) ................................................ 12

1.4

Physical View.................................................................................................................................. 13

1.5

Block Diagram ................................................................................................................................ 15
1.5.1

RTK9743U11C01000BE (RZ/G2UL SMARC Module Board) ............................................. 15

1.5.2

RTK9763U02C01000BE (RZ/A3UL SMARC Module Board QSPI Edition) ........................ 16

1.5.3

RTK9763U02C01001BE (RZ/A3UL SMARC Module Board OCTAL Edition)..................... 17

1.5.4

RTK9743F01C01000BE (RZ/Five SMARC Module Board) ................................................ 18

1.6

Component Layout ......................................................................................................................... 19

1.7

Absolute Maximum Ratings ............................................................................................................ 22

1.8

Operating Condition ........................................................................................................................ 22

Functional Specifications ............................................................................................ 23
2.1

Overview of Functions .................................................................................................................... 23

2.2

MPU ................................................................................................................................................ 24

2.3

2.2.1

Overview of RZ/G2UL .......................................................................................................... 24

2.2.2

Overview of RZ/A3UL .......................................................................................................... 24

2.2.3

Overview of RZ/Five ............................................................................................................ 24

2.2.4

List of Pin Functions............................................................................................................. 25

Memory ........................................................................................................................................... 43
2.3.1

QSPI Flash Memory............................................................................................................. 43

2.3.2

DDR4 SDRAM ..................................................................................................................... 44

2.3.3

Octa Peripheral Interface ..................................................................................................... 45

2.4

Gigabit Ethernet Interface ............................................................................................................... 46

2.5

ADC Interface ................................................................................................................................. 48

2.6

Clock Configuration ........................................................................................................................ 49

2.7

Reset Control .................................................................................................................................. 50

2.8Power Supply Configuration ........................................................................................................... 51

2.9

PMIC ............................................................................................................................................... 53

2.10

Debug Interface .............................................................................................................................. 54

2.11

SD/MMC Host Interface .................................................................................................................. 55
2.11.1

eMMC Memory .................................................................................................................... 55

2.11.2

3.

2.12

GreenPAK ....................................................................................................................................... 57

2.13

Parallel Output Interface ................................................................................................................. 59

Operation Specifications ............................................................................................. 60
3.1

3.2

Overview of Connectors ................................................................................................................. 60
3.1.1

ADC Connector (CN1) ......................................................................................................... 61

3.1.2

JTAG Connector (CN2)........................................................................................................ 62

3.1.3

MicroSD Card Slot (CN3)..................................................................................................... 63

3.1.4

SMARC edge Connector (CN4) ........................................................................................... 64

3.1.5

FFC/FPC Connector(CN5)................................................................................................... 65

Layout of Operation Components ................................................................................................... 66
3.2.1

4.

5.

SD Card ............................................................................................................................... 56

Functions of Switches and Mode Terminals ........................................................................ 67

Parallel to HDMI Converision Board............................................................................ 70
4.1

Configuration .................................................................................................................................. 70

4.2

Features .......................................................................................................................................... 73

4.3

Physical View.................................................................................................................................. 74

4.4

Component Layout ......................................................................................................................... 75

Appendix ..................................................................................................................... 76
5.1

Type Name and Features of Each Board ....................................................................................... 76

5.2

How to Identify Each SMARC Module Board ................................................................................. 79

5.3

How to replace the SMARC Module Board .................................................................................... 80

REVISION HISTORY ......................................................................................................... 82

RZ Family / RZ/G, RZ/A Series
RZ/G2UL, RZ/A3UL, RZ/Five SMARC Module Board

1.

Overview

1.1

Overview

This document describes a specification of the RZ/G2UL, RZ/A3UL and RZ/Five SMARC Module Board to evaluate
the functions and performance of the Renesas Electronics microprocessor RZ/G2UL “R9A07G043U11GBG”,
RZ/A3UL “R9A07G063U02GBG” and RZ/Five “R9A07G043F01GBG” and evaluate application software programs.
This document introduces 4 types of the SMARC Module Boards.
However, the RZ/G2UL SMARC Module Board (RTK9743U11C01000BE) will be mainly explained here. Please referto the section 5.1 “Type Name and Features of Each Board” for the main features of each SMARC Module
Board.
The RTK9743U11C01000BE complies with the SMARC v2.1 and has following features.
● It is mounted with the following external memories.

DDR4 SDRAM: 1GB × 1pc
QSPI flash memory: 128Mb × 1pc (*1)
eMMC memory: 64GB × 1pc
OctaRAM memory: 512Mb *1pc (*2)
OctaFLASH memory: 1Gb * 1pc (*2)
● The microSD card slot is implemented and used as an eSD for boot.
● It is implemented a 5-output clock generator “5P35023”.
● It is implemented a PMIC “DA9062” as power supply circuit.
● The Ethernet PHY is implemented as standard and can send/receive data at 10/100/1000Mbps.
● Terminals not used on this board such as a USB connector, a LAN connector and a camera connector and so on areconnected to the 314-pin 0.5-mm pitch connector, which can be used in conjunction with a Carrier Board.
● The 10-pin connector for ARM Cortex Debug is implemented for connection to debug interface.
● The 6-pin connector is implemented for connection to ADC interface.
● The 45-pin FFC/FPC connector is mounted as standard for connection to parallel output interface. (*3)

Note 1.

The QSPI flash memoy is not supported on the RTK9763U02C01001BE.

Note 2.

The OctaFlash and Octa RAM memories are supportted on the RTK9763U02C01001BE.

Note 3.

The parallel output interface is not supported on the RTK9743F01C01000BE.

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1.2

1. Overview

Configuration

Figure 1.1 shows an example of system configuration using the RTK9743U11C01000BE.

RZ/G2UL SMARC Module Board
RTK9743U11C01000BE

Power supply throughUSB Type-C
AC adapter(*1)

RZ/G2ULRZ SMARC Series Carrier Board
RTK97X4XXXB00000BE(*1): Should be procured on the customer side

Figure 1.1

Host computer
SCIF download(for bootloader
programing)

Example of System Configuration Using the RTK9743U11C01000BENOTE
The above example uses RTK9743U11C01000BE.

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1. Overview

1.3

Features

1.3.1

RTK9743U11C01000BE (RZ/G2UL SMARC Module Board)

Table 1.1 shows the features of the RTK9743U11C01000BE.

Table 1.1

Features of the RTK9743U11C01000BE

Item

DetailsCPU

RZ/G2UL
Input (Xin) clock: 24MHz
Arm Cortex-A55 clock: 1.0GHz
Arm Cortex-M33 clock: 200MHz
AXI-bus clock: 200MHz
APB-bus clock: 100MHz
Internal memory
Instruction cache: 32KB
Data cache: 32KB
Power voltage: 1.1V, I/O: 3.3V
361-Pin PBGA 0.5-mm pitch

MemoryQSPI flash memory: 128Mb * 1pc
DDR4 SDRAM: 1GB * 1pc
eMMC memory: 64GB * 1pc

Clock IC

Clock generator: 1pc

Ethernet IC

Ethernet PHY: 2pcs

Connector

microSD card slot (4 bits): 1pc
10-pin connector for JTAG: 1pc
6-pin connector for ADC: 1pc
SMARC edge connector (314 pins): 1pc
FFC/FPC connector (45pin): 1pc

SwitchSystem setting DIP switch: 3 bits

Circuit board specifications

Dimensions: 82 mm * 50 mm
Mount: Double-sided mounting (6 layers)

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1.3.2

1. Overview

RTK9763U02C01000BE (RZ/A3UL SMARC Module Board QSPI Edition)

Table 1.2 shows the features of the RTK9763U02C01000BE.

Table 1.2

Features of the RTK9763U02C01000BE

Item

DetailsCPU

RZ/A3UL
Input (Xin) clock: 24MHz
Arm Cortex-A55 clock: 1.0GHz
AXI-bus clock: 200MHz
APB-bus clock: 100MHz
Internal memory
Instruction cache: 32KB
Data cache: 32KB
Power voltage: 1.1V, I/O: 3.3V
361-Pin PBGA 0.5-mm pitch

MemoryQSPI flash memory: 128Mb * 1pc
DDR4 SDRAM: 1GB * 1pc
eMMC memory: 64GB * 1pc

Clock IC

Clock generator: 1pc

Ethernet IC

Ethernet PHY: 2pcs

Connector

microSD card slot (4 bits): 1pc
10-pin connector for JTAG: 1pc
6-pin connector for ADC: 1pc
SMARC edge connector (314 pins): 1pc
FFC/FPC connector (45pin): 1pc

SwitchSystem setting DIP switch: 3 bits

Circuit board specifications

Dimensions: 82 mm * 50 mm
Mount: Double-sided mounting (6 layers)

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1.3.3

1. Overview

RTK9763U02C01001BE (RZ/A3UL SMARC Module Board OCTAL Edition)

Table 1.3 shows the features of the RTK9763U02C01001BE.

Table 1.3

Features of the RTK9763U02C01001BE

Item

DetailsCPU

RZ/A3UL
Input (Xin) clock: 24MHz
Arm Cortex-A55 clock: 1.0GHz
AXI-bus clock: 200MHz
APB-bus clock: 100MHz
Internal memory
Instruction cache: 32KB
Data cache: 32KB
Power voltage: 1.1V, I/O: 3.3V
361-Pin PBGA 0.5-mm pitch

MemoryDDR4 SDRAM: 1GB * 1pc
eMMC memory: 64GB * 1pc
OctaRAM memory: 512Mb *1pc
OctaFLASH memory: 1Gb * 1pc

Clock IC

Clock generator: 1pc

Ethernet IC

Ethernet PHY: 2pcs

Connector

microSD card slot (4 bits): 1pc
10-pin connector for JTAG: 1pc
6-pin connector for ADC: 1pc
SMARC edge connector (314 pins): 1pc
FFC/FPC connector (45pin): 1pc

SwitchSystem setting DIP switch: 3 bits

Circuit board specifications

Dimensions: 82 mm * 50 mm
Mount: Double-sided mounting (6 layers)

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1.3.4

1. Overview

RTK9743F01C01000BE (RZ/Five SMARC Module Board)

Table 1.4 shows the features of the RTK9743F01C01000BE.

Table 1.4

Features of the RTK9743F01C01000BE

Item

DetailsCPU

RZ/Five
Input (Xin) clock: 24MHz
AndesCoreTM AX45MP clock: 1.0GHz
AXI-bus clock: 200MHz
APB-bus clock: 100MHz
Internal memory
Instruction cache: 32KB
Data cache: 32KB
Power voltage: 1.1V, I/O: 3.3V
361-Pin PBGA 0.5-mm pitch

MemoryQSPI flash memory: 128Mb * 1pc
DDR4 SDRAM: 1GB * 1pc
eMMC memory: 64GB * 1pc

Clock IC

Clock generator: 1pc

Ethernet IC

Ethernet PHY: 2pcs

Connector

microSD card slot (4 bits): 1pc
10-pin connector for JTAG: 1pc
6-pin connector for ADC: 1pc
SMARC edge connector (314 pins): 1pc
FFC/FPC connector (45pin): 1pc (*1)

SwitchSystem setting DIP switch: 3 bits

Circuit board specifications

Dimensions: 82 mm * 50 mm
Mount: Double-sided mounting (6 layers)

Note 1.

The parallel output interface is not supported on the RTK9743F01C01000BE.

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1.4

1. Overview

Physical View

Figure 1.2 and Figure 1.3 show the top and bottom views of the RTK9743U11C01000BE.

Figure 1.2

Top View of the RTK9743U11C01000BE

NOTEThis picture is of the RTK9743U11C01000BE.

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Figure 1.3

1. Overview

Bottom View of the RTK9743U11C01000BE

NOTEThis picture is of the RTK9743U11C01000BE.

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1. Overview

1.5

Block Diagram

1.5.1

RTK9743U11C01000BE (RZ/G2UL SMARC Module Board)

Figure 1.4 shows the block diagram of the RTK9743U11C01000BE.

RTK9743U11C01000BE
RZ/G2UL

2

SCIF0

4

SDHI1
16

DDR4
SDRAM

DDR

3

USB1 Host

2

ANALOG
10

CSI-2
4

QSPI
flash

SPI Multi I/O
2

CAN0
JTAG

DEBUG
Ether0eMMC
memory8
Ether1
Mux

μSD

4

SDHI0

SSI1

RSPI1
24

Parallel
Output

LCDC

12

RGMII

12

RGMII

Ethernet
PHY

8Ethernet
PHY

8

4

8

GPIO

GPIO

MODE

Figure 1.4

2

CAN1

5

SMARC Edge Connector

ADC

5USB0 OTG

4

3

Block Diagram of the RTK9743U11C01000BE

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1.5.2

1. Overview

RTK9763U02C01000BE (RZ/A3UL SMARC Module Board QSPI Edition)

Figure 1.5 shows the block diagram of the RTK9763U02C01000BE.

RTK9763U02C01000BE
RZ/A3UL

2

SCIF0

4

SDHI1
16

DDR4
SDRAM

DDR

3

USB1 Host

2

ANALOG
10

CSI-2
4

QSPI
flash

SPI Multi I/O
2

CAN0
JTAG

DEBUG
Ether0eMMC
memory8
Ether1
Mux

μSD

4

SDHI0

SSI1

RSPI1
24

Parallel
Output

LCDC

12

RGMII

12

RGMII

Ethernet
PHY

8Ethernet
PHY

8

4

8

GPIO

GPIO

MODE

Figure 1.5

2

CAN1

5

SMARC Edge Connector

ADC

5USB0 OTG

4

3

Block Diagram of the RTK9763U02C01000BE

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RZ Family / RZ/G, RZ/A Series

1.5.3

1. Overview

RTK9763U02C01001BE (RZ/A3UL SMARC Module Board OCTAL Edition)

Figure 1.6 shows the block diagram of the RTK9763U02C01001BE.

RTK9763U02C01001BE
RZ/A3UL

2

SCIF0

4

SDHI1
16

DDR4
SDRAM

DDR

3

USB1 Host

2

ANALOG
10

CSI-2
8

Octa
flash

OCTA(*1)

Octa
RAM
JTAG

DEBUG
Ether0eMMC
memory8
Ether1
Mux

μSD

2

CAN1

5

4

SDHI0

SSI1

RSPI1
24

Parallel
Output

2

CAN0

LCDC

12

RGMII

12

RGMII

Ethernet
PHY

8Ethernet
PHY

8

SMARC Edge Connector

ADC

5USB0 OTG

4

8

GPIO

GPIO

MODE

4

3

(*1) The 4-bit is shared with SPI Multi I/O

Figure 1.6

Block Diagram of the RTK9763U02C01001BE

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RZ Family / RZ/G, RZ/A Series

1.5.4

1. Overview

RTK9743F01C01000BE (RZ/Five SMARC Module Board)

Figure 1.7 shows the block diagram of the RTK9743F01C01000BE.

RTK9743F01C01000BE
RZ/Five

2

SCIF0

4

SDHI1
16

DDR4
SDRAM

DDR

3

USB1 Host

2

ADC

5

USB0 OTGANALOG

4

QSPI
flash

SPI Multi I/O
2

CAN0
JTAG

DEBUG
Ether0eMMC
memory8
Ether1
Mux

μSD

4

SDHI0

SSI1

RSPI1
24

Parallel
Output

12

RGMII

12

RGMII

Ethernet
PHY

8Ethernet
PHY

8

4

8

GPIO

GPIO

MODE

Figure 1.7

2

CAN1

5

SMARC Edge Connector

10

4

3

Block Diagram of the RTK9743F01C01000BE

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RZ Family / RZ/G, RZ/A Series

1.6

1. Overview

Component Layout

Figure 1.8 and Figure 1.9 show the layout of main components of the RTK9743U11C01000BE.

CN1:
ADC connector
CN3:
microSD card slot

IC3:
OctaRAM

CN5:
FFC/FPC connector
IC9:
IC1:
QSPI flash memory
RZ/G2ULIC12:DDR Termination
Regulator

CN2:
JTAG connector

IC7:
DDR4 SDRAM

SW1:
Dip switch
X1:
XIN resonator(24MHz)

IC31:
Clock generator

IC23:
EtherPHY

Figure 1.8

IC19:
MUX

IC8:
Green PAK

IC11:
PMIC

Layout of Components of the RTK9743U11C01000BE (Top View)

NOTE
The layout of this top view is of the RTK9743U11C01000BE.

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RZ Family / RZ/G, RZ/A Series

Figure 1.9

1. Overview

Layout of Components of the RTK9743U11C01000BE (Bottom View)

NOTE
The layout of this bottom view is of the RTK9743U11C01000BE.

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RZ Family / RZ/G, RZ/A Series

1. Overview

Table 1.5 and Table 1.6 list main components mounted on the RTK9743U11C01000BE.

Table 1.5

Main Components on the RTK9743U11C01000BE (1) IC

Component Number

Component Name

Type (Manufacturer)

IC1

MPU

R9A07G043U11GBG(Renesas Electronics)

IC2(*1)

OctaFLASH Memory

MX66UW1G45GXDQ00(Macronix)

IC3(*1)

OctaRAM Memory

APS51208N-OCHx-BD(AP Memory)

IC4

Data switch IC

MAX4996LETG+(MAXIM)

IC5

GreenPAK for Power/Reset

SLG7RN45356(Renesas Electronics)

IC6

eMMC memory

MTFC64GASAQHD-IT(Micron)

IC7

DDR4 SDRAM

MT40A512M16LY-062E:E(Micron)

IC8

GreenPAK for USB/Ethernet Logic

SLG7RN45315(Renesas Electronics)IC9

QSPI flash memory

AT25QL128A_MHE(Renesas Electronics)

IC10, IC19

Quad SPDT Switch IC

STG3692QTR(STMicroelectronics)

IC11

PMIC

DA9062(Renesas Electronics)

IC12

DDR Termination Regulator

NCP51200MNTXG(On Semiconductor)

IC14

GreenPAK for Boot Mode

SLG7RN45314(Renesas Electronics)

IC22

Ethernet PHY

KSZ9131RNXC(Microchip)

IC23

Ethernet PHY

KSZ9131RNXC(Microchip)

IC31

Clock generator

5P35023B-629NLGI(Renesas Electronics)

X1

Crystal resonator for XIN

FL2400022(Diodes Inc)

IC20, IC21

Note 1.

The RTK9743U11C01000BE is not implemented.

Table 1.6

Main Components on the RTK9743U11C01000BE (2) Connector

Components Number

Component Name

Type (Manufacturer)

CN1

ADC connector(6pin)

M22-5320305(HARWIN)

CN2

JTAG connector

FTSH-105-01-F-DV-007-K(Samtec)(10pin)CN3

microSD card slot

CN4

SMARC edge connector(314pin)

CN5

FFC/FPC connector(45pin)R01UH0990EJ0110
Dec 13, 2022

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504077-1891(Molex)FH23-45S-0.3SHAW(05)(HIROSE)

Page 21 of 84

RZ Family / RZ/G, RZ/A Series

1.7

1. Overview

Absolute Maximum Ratings

Table 1.7 lists absolute maximum ratings of the RTK9743U11C01000BE.

Table 1.7

Absolute Maximum Ratings of the RTK9743U11C01000BE

SymbolItem

Rated ValueNote

VDD_INpower voltage

5.25V

Reference: Vss—

Maximum power consumption 3A

Includes continuous RZ SMARC Series Carrier Board current
consumption

Topr

Operating ambient
temperature*1

0°C to 50°C

Do not expose to condensation or corrosive gases

Tstg

Storage temperature*1-10°C to 60°C

Do not expose to condensation or corrosive gases

Note 1.

Ambient temperature is the air temperature at a position as close to the board as possible.

1.8

Operating Condition

Table 1.8 lists operating conditions of the RTK9743U11C01000BE.

Table 1.8

Operating Conditions of the RTK9743U11C01000BE

SymbolItem

Rated ValueNote

VDD_INPower volotage

3.0V to 5.25V

Reference: SMARC v2.1 specification

Topr

Operating ambient
temperature*1

0°C to 40°C

Do not expose to condensation or corrosive gases

Note 1.

Ambient temperature is the air temperature at a position as close to the board as possible.

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RZ Family / RZ/G, RZ/A Series

2. Functional Specifications

2.

Functional Specifications

2.1

Overview of Functions

Table 2.1 lists function modules of the RTK9743U11C01000BE.

Table 2.1

Function Modules of the RTK9743U11C01000BE

Section

Function

Description

2.2

MPU

RZ/G2UL
Input (Xin) clock: 24MHz
Arm Cortex-A55 clock: 1.0GHz
Arm Cortex-M33 clock: 200MHz
AXI-bus clock: 200MHz
APB-bus clock: 100MHz

2.3

QSPI flash memory: 128Mb * 1pc (*1)

MemoryDDR4 SDRAM: 1GB * 1pc
eMMC memory: 64GB * 1pc (See section 2.11 for details.)
OctaRAM memory: 512Mb *1pc (*2)
OctaFLASH memory: 1Gb * 1pc (*2)
2.4

Gigabit Ethernet
Interface

Connection between the Ethernet controller (E-MAC) and LAN connector via Ethernet PHY

2.5

ADC Interface

Connection between ADC module and connector

2.6

Clock Configuration

System clock configuration

2.7

Reset Control

Reset control for RZ/G2UL mounted on the RTK9743U11C01000BE.

2.8

Power Supply
Configuration

System power supply configuration of the RTK9743U11C01000BE and the
RTK97X4XXXB00000BE

2.9

PMIC

Connection between RZ/G2UL and PMIC

2.10

Debug Interface

Connection between Debug Interface and connector

2.11

SD/MMC Host Interface

Connection between SD/MMC Host Interface (SDHI) channel 0 and microSD card slot

2.12

GreenPAKSLG7RN45314(Boot Mode): 1pc
SLG7RN45315(USB/Etehrnet Logic): 1pc
SLG7RN45356(Power/Reset): 1pc

2.13

(*3)

—

Parallel Output Interface

Connection between Parallel Output Interface and connector

Operating specification

Connectors and switches
Details are described in Section 3

Note 1.

The QSPI flash memoy is not supported on the RTK9763U02C01001BE.

Note 2.

The OctaFlash and Octa RAM memories are supported on the RTK9763U02C01001BE.

Note 3.

The parallel output interface is not supported on the RTK9743F01C01000BE.

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RZ Family / RZ/G, RZ/A Series

2.2

MPU

2.2.1

Overview of RZ/G2UL

2. Functional Specifications

The RTK9743U11C01000BE contains a 64-bit microprocessor RZ/G2UL that runs in synchronization with the CPU
clock (max.1.0 GHz).

2.2.2

Overview of RZ/A3ULThe RTK9763U02C01000BE and RTK9763U02C01001BE contain a 64-bit microprocessor RZ/A3UL that runs insynchronization with the CPU clock (max.1.0 GHz).

2.2.3

Overview of RZ/Five

The RTK9743F01C01000BE contains a 64-bit microprocessor RZ/Five that runs in synchronization with the CPU
clock (max.1.0 GHz).

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RZ Family / RZ/G, RZ/A Series

2.2.4

2. Functional Specifications

List of Pin Functions

As described in the section1.1, RZ/G2UL is available in pin-compatible with RZ/A3UL and RZ/Five.
Table 2.2 lists pin functions of each product used in each Module Board.

Table 2.2

List of Pin Function Selection Used on Each Module Board (1/18)

Pin
Location

Pin
Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

F17

ADC_AVDD18

ADC_AVDD18

ADC_AVDD18

NC

1.8V

—

—

—

—

—

—

Note: Unused in case of
RZ/Five
B18

ADC_CH0

ADC_CH0

ADC_CH0NC

Pin connector (CN1) for ADC input

Note: Unused in case of
RZ/Five
A18

ADC_CH1

ADC_CH1

ADC_CH1NC

Pin connector (CN1) for ADC input

Note: Unused in case of
RZ/Five
A9

AUDIO_CLK1

AUDIO_CLK1

AUDIO_CLK1

AUDIO_CLK1

Connected to clock generator (IC31),
used as CD sampling rate 44.1KHz
refclock 11.2896 MHz

—

—

B8

AUDIO_CLK2

AUDIO_CLK2

AUDIO_CLK2

AUDIO_CLK2

Connected to clock generator (IC31),
used as DVD sampling rate 48.0KHz
refclock 12.2880MHz

—

—

AE22

BSCANP

BSCANP

BSCANP

BSCANP

Initial setting: 0 (Pull down), should
be controllable by resistor.

—

—

AD21

VSS

VSS

VSS

VSS

GND

—

—

AE11

CSI_CLKNCSI_CLKNCSI_CLKN

NC

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)P4

CSI1_CK-P3

CSI1_CK+

P8

CSI1_RX0-

Note: Unused in case of
RZ/Five
AD11

CSI_CLKPCSI_CLKPCSI_CLKP

NC

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

Note: Unused in case of
RZ/Five
AE12

CSI_DATA0_N

CSI_DATA0_N

CSI_DATA0_N

NC

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

Note: Unused in case of
RZ/Five

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RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (2/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

AD12

CSI_DATA0_P

CSI_DATA0_P

CSI_DATA0_P

NC

Description
Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)SMARC
Pin No.

SMARC
Pin Name

P7

CSI1_RX0+

P11

CSI1_RX1-

P10

CSI1_RX1+

P14

CSI1_RX2-

P13

CSI1_RX2+

P17

CSI1_RX3-

P16

CSI1_RX3+

—

—

—

—

Note: Unused in case of
RZ/Five
AE10

CSI_DATA1_N

CSI_DATA1_N

CSI_DATA1_N

NC

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

Note: Unused in case of
RZ/Five
AD10

CSI_DATA1_P

CSI_DATA1_P

CSI_DATA1_P

NC

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

Note: Unused in case of
RZ/Five
AE13

CSI_DATA2_N

CSI_DATA2_N

CSI_DATA2_N

ADC_CH0

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

Note: In case of RZ/Five,this pin is used as
ADC_CH0.
Removed a resiter(R8) and mounted a
resistor (R10) for
CSI/ADC options.
AD13

CSI_DATA2_P

CSI_DATA2_P

CSI_DATA2_P

ADC_CH1

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

Note: In case of RZ/Five,this pin is used as
ADC_CH1.
Removed a resiter(R9) and mounted a
resistor (R11) for
CSI/ADC options.
AE9

CSI_DATA3_N

CSI_DATA3_N

CSI_DATA3_N

NC

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

Note: Unused in case of
RZ/Five
AD9

CSI_DATA3_P

CSI_DATA3_P

CSI_DATA3_P

NC

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

Note: Unused in case of
RZ/Five
F17

ADC_AVDD18

ADC_AVDD18

ADC_AVDD18

NC

1.8V

Note: Unused in case of
RZ/Five
Y11

CSI_VDD18

CSI_VDD18

CSI_VDD18

NC

1.8V

Note: Unused in case of
RZ/Five

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RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (3/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

Y12

CSI_VDD18

CSI_VDD18

CSI_VDD18

NC

1.8V

—

—

Note: Unused in case of
RZ/Five
E25

DDR_ADDR0

DDR_ADDR0

DDR_ADDR0

SD1_CD

DDR4 SDRAM (IC7)

—

—

K25

DDR_ADDR1

DDR_ADDR1

DDR_ADDR1

DDR_ADDR1

DDR4 SDRAM (IC7)

—

—

P23

DDR_ADDR10

DDR_ADDR10

DDR_ADDR10

DDR_ADDR10

DDR4 SDRAM (IC7)

—

—

H25

DDR_ADDR11

DDR_ADDR11

DDR_ADDR11

DDR_ADDR11

DDR4 SDRAM (IC7)

—

—

N23

DDR_ADDR12

DDR_ADDR12

DDR_ADDR12

DDR_ADDR12

DDR4 SDRAM (IC7)

—

—

D23

DDR_ADDR13

DDR_ADDR13

DDR_ADDR13

DDR_ADDR13

DDR4 SDRAM (IC7)

—

—

H23

DDR_ADDR14

DDR_ADDR14

DDR_ADDR14

DDR_ADDR14

DDR4 SDRAM (IC7)

—

—

D25

DDR_ADDR15

DDR_ADDR15

DDR_ADDR15

DDR_ADDR15

DDR4 SDRAM (IC7)

—

—

C25

DDR_ADDR2

DDR_ADDR2

DDR_ADDR2

DDR_ADDR2

DDR4 SDRAM (IC7)

—

—

J25

DDR_ADDR6

DDR_ADDR6

DDR_ADDR6

DDR_ADDR6

DDR4 SDRAM (IC7)

—

—

A24

DDR_ADDR7

DDR_ADDR7

DDR_ADDR7

DDR_ADDR7

DDR4 SDRAM (IC7)

—

—

F25

DDR_ADDR8

DDR_ADDR8

DDR_ADDR8

DDR_ADDR8

DDR4 SDRAM (IC7)

—

—

B24

DDR_ADDR9

DDR_ADDR9

DDR_ADDR9

DDR_ADDR9

DDR4 SDRAM (IC7)

—

—

E24

DDR_BA0

DDR_BA0

DDR_BA0

DDR_BA0

DDR4 SDRAM (IC7)

—

—

L24

DDR_BA1

DDR_BA1

DDR_BA1

DDR_BA1

DDR4 SDRAM (IC7)

—

—

F23

DDR_BA2

DDR_BA2

DDR_BA2

DDR_BA2

DDR4 SDRAM (IC7)

—

—

A23

DDR_
CALIBRATIONDDR_CALIBRATIONDDR_CALIBRATIONDDR_CALIBRATION

DDR4 SDRAM (IC7)

—

—

J24

DDR_CAS#

DDR_CAS#

DDR_CAS#

DDR_CAS#

DDR4 SDRAM (IC7)

—

—

M25

DDR_CKE

DDR_CKE

DDR_CKE

DDR_CKE

DDR4 SDRAM (IC7)

—

—

P24

DDR_CLK_N

DDR_CLK_N

DDR_CLK_N

DDR_CLK_N

DDR4 SDRAM (IC7)

—

—

P25

DDR_CLK_P

DDR_CLK_P

DDR_CLK_P

DDR_CLK_P

DDR4 SDRAM (IC7)

—

—

N24

DDR_CS0#

DDR_CS0#

DDR_CS0#

DDR_CS0#

DDR4 SDRAM (IC7)

—

—

L23

DDR_CS1#

DDR_CS1#

DDR_CS1#

DDR_CS1#

DDR4 SDRAM (IC7)

—

—

U23

DDR_DM0

DDR_DM0

DDR_DM0

DDR_DM0

DDR4 SDRAM (IC7)

—

—

Y24

DDR_DM1

DDR_DM1

DDR_DM1

DDR_DM1

DDR4 SDRAM (IC7)

—

—

T25

DDR_DQ0

DDR_DQ0

DDR_DQ0

DDR_DQ0

DDR4 SDRAM (IC7)

—

—

W24

DDR_DQ1

DDR_DQ1

DDR_DQ1

DDR_DQ1

DDR4 SDRAM (IC7)

—

—

W23

DDR_DQ10

DDR_DQ10

DDR_DQ10

DDR_DQ10

DDR4 SDRAM (IC7)

—

—

AD25

DDR_DQ11

DDR_DQ11

DDR_DQ11

DDR_DQ11

DDR4 SDRAM (IC7)

—

—

AD23

DDR_DQ12

DDR_DQ12

DDR_DQ12

DDR_DQ12

DDR4 SDRAM (IC7)

—

—

AA23

DDR_DQ13

DDR_DQ13

DDR_DQ13

DDR_DQ13

DDR4 SDRAM (IC7)

—

—

AC24

DDR_DQ14

DDR_DQ14

DDR_DQ14

DDR_DQ14

DDR4 SDRAM (IC7)

—

—

AE24

DDR_DQ15

DDR_DQ15

DDR_DQ15

DDR_DQ15

DDR4 SDRAM (IC7)

—

—

R24

DDR_DQ2

DDR_DQ2

DDR_DQ2

DDR_DQ2

DDR4 SDRAM (IC7)

—

—

Y25

DDR_DQ3

DDR_DQ3

DDR_DQ3

DDR_DQ3

DDR4 SDRAM (IC7)

—

—

T24

DDR_DQ4

DDR_DQ4

DDR_DQ4

DDR_DQ4

DDR4 SDRAM (IC7)

—

—

U25

DDR_DQ5

DDR_DQ5

DDR_DQ5

DDR_DQ5

DDR4 SDRAM (IC7)

—

—

R25

DDR_DQ6

DDR_DQ6

DDR_DQ6

DDR_DQ6

DDR4 SDRAM (IC7)

—

—

T23

DDR_DQ7

DDR_DQ7

DDR_DQ7

DDR_DQ7

DDR4 SDRAM (IC7)

—

—

AD24

DDR_DQ8

DDR_DQ8

DDR_DQ8

DDR_DQ8

DDR4 SDRAM (IC7)

—

—

AA24

DDR_DQ9

DDR_DQ9

DDR_DQ9

DDR_DQ9

DDR4 SDRAM (IC7)——R01UH0990EJ0110
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RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (4/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

V24

DDR_DQS0_N

DDR_DQS0_N

DDR_DQS0_N

DDR_DQS0_N

DDR4 SDRAM (IC7)

—

—

V25

DDR_DQS0_P

DDR_DQS0_P

DDR_DQS0_P

DDR_DQS0_P

DDR4 SDRAM (IC7)

—

—

AB25

DDR_DQS1_N

DDR_DQS1_N

DDR_DQS1_N

DDR_DQS1_N

DDR4 SDRAM (IC7)

—

—

AB24

DDR_DQS1_P

DDR_DQS1_P

DDR_DQS1_P

DDR_DQS1_P

DDR4 SDRAM (IC7)

—

—

M24

DDR_ODT0

DDR_ODT0

DDR_ODT0

DDR_ODT0

DDR4 SDRAM (IC7)

—

—

L25

DDR_ODT1

DDR_ODT1

DDR_ODT1

DDR_ODT1

DDR4 SDRAM (IC7)

—

—

H24

DDR_RAS#

DDR_RAS#

DDR_RAS#

DDR_RAS#

DDR4 SDRAM (IC7)

—

—

B23

DDR_RESET#

DDR_RESET#

DDR_RESET#

DDR_RESET#DDR4 SDRAM (IC7)

—

—

H20

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR4 SDRAM (IC7)

—

—

K20

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR4 SDRAM (IC7)

—

—

M20

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR4 SDRAM (IC7)

—

—

R20

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR4 SDRAM (IC7)

—

—

U20

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR4 SDRAM (IC7)

—

—

W20

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR_VDDQ

DDR4 SDRAM (IC7)

—

—

G25

DDR_WE#

DDR_WE#

DDR_WE#

DDR_WE#

DDR4 SDRAM (IC7)

—

—

Y19

DEBUGENDEBUGENDEBUGENDEBUGEN

DIP_SW (SW1)

—

—

P3

PVDD182533_0

PVDD182533_0

PVDD182533_0

PVDD182533_0

Input controlling PVDD182533_0
power level with SW1-3——

High: 3.3V, Low: 1.8V
Y17

PVDD182533_1

PVDD182533_1

PVDD182533_1

PVDD182533_1

1.8V

—

—

Y3

EXCLK

EXCLK

EXCLK

EXCLK

24MHz input, connected to clock
generator (IC31) for system clock

—

—

P6

VDD18

VDD18

VDD18

VDD18

1.8V

—

—

G6

MD_BOOT0

MD_BOOT0

MD_BOOT0

MD_BOOT0

Input BOOT_SEL0#, BOOT_SEL1#
and BOOT_SEL2# logic states

—

—

C5

MD_BOOT1

MD_BOOT1

MD_BOOT1

MD_BOOT1

Input BOOT_SEL0#, BOOT_SEL1#
and BOOT_SEL2# logic states

—

—

C4

MD_BOOT2

MD_BOOT2

MD_BOOT2

MD_BOOT2

Input BOOT_SEL0#, BOOT_SEL1#
and BOOT_SEL2# logic states

—

—

F20

MD_CLKS

MD_CLKS

MD_CLKS

MD_CLKS

Initial setting: 1 (Pull Up), should becontrollable by resistor.

—

—

A22

MD_OSCDRV0

MD_OSCDRV0

MD_OSCDRV0

MD_OSCDRV0

Initial setting: 0 (Pull Down), should
be controllable by resistor.

—

—

C21

MD_OSCDRV1

MD_OSCDRV1

MD_OSCDRV1

MD_OSCDRV1

Initial setting: 0 (Pull Down), should
be controllable by resistor.

—

—

AA2

NMI

NMI

NMI

NMI

Unused——B2

OM_CS1#NC

OM_CS1#

P24_0

OctaRAM (IC3)

—

—

—

—

—

—

Note: Unused in case of
RZ/G2ULA4OM_DQSNC

OM_DQS

P24_1

OctaFlash (IC2) and OctaRAM (IC3)

Note: Unused in case of
RZ/G2UL
B4

OM_SIO4NC

OM_SIO4

P24_2

OctaFlash (IC2) and OctaRAM (IC3)

Note: Unused in case of
RZ/G2UL

R01UH0990EJ0110
Dec 13, 2022

Rev.1.10

Page 28 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (5/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

A3

OM_SIO5NC

OM_SIO5

P24_3

OctaFlash (IC2) and OctaRAM (IC3)

—

—

—

—

—

—

—

—

P108

GPIO0

Note: Unused in case of
RZ/G2ULB3

OM_SIO6NC

OM_SIO6

P24_4

OctaFlash (IC2) and OctaRAM (IC3)

Note: Unused in case of
RZ/G2ULA2

OM_SIO7NC

OM_SIO7

P24_5

OctaFlash (IC2) and OctaRAM (IC3)

Note: Unused in case of
RZ/G2ULF14

OTP_VDD18

OTP_VDD18

OTP_VDD18

NC

1.8V

Note: Unused in case of
RZ/Five
B1

P0_0/SD0_CD/
RIIC3_SDA/
MTIOC2A/
SCI0_TXD

P0_0/SD0_CD

P0_0/SD0_CD

P0_0/SD0_CD

Card Detection
High: No card, Low: Card insertd
Connected to microSD card slot(CN3) for SD0

Note: Only available
when SW_SD0_DEV_SEL(SW1-2) isdisabled else this isused for GPIO0C2

P0_1/SD0_WP/
RIIC3_SCL/
MTIOC2B/
SCI0_RXD

P0_1

P0_1

P0_1

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1), used as
CAM1_RST#

P111

GPIO3

D3

P0_2/SD1_CD/
MTIOC1A/
RIIC2_SDA/IRQ0

SD1_CD

SD1_CD

SD1_CD

Card Detection

P35

SDIO_
CD#

P0_3/SD1_WP/
MTIOC1B/
RIIC2_SCL/IRQ1

P0_3

P37

SDIO_
PWR_ENP119

GPIO11P54

SPI_CS0#

P109

GPIO1

S39

I2S0_LRCK

C3

High: No card, Low: Card inserted
Carrier Board Connector, connected
to microSD card slot (CN10) for SD1
P0_3

P0_3

Enables power to the uSD Card
Carrier Board Connector, connected
to microSD card slot (CN10) for SD1
Driven from the Reset signal due tolimited SoC IO

P1

T3

T2

N1

P4_5/
ET0_LINKSTA/MTIOC3D

P4_5/
ET0_LINKSTA

P4_5/
ET0_LINKSTA

P4_5/
ET0_LINKSTA

Ethernet PHY_0 (IC22)

P4_3/ET0_MDC/
RSPI1_SSL/
MTIOC8D/
MTIOC3B

RSPI1_SSL/
ET0_MDCRSPI1_SSL/
ET0_MDCRSPI1_SSL/
ET0_MDC

Ethernet PHY_0 (IC22)

P4_4/ET0_MDIO/MTIOC3C

P4_4/ET0_MDIO P4_4/ET0_MDIO P4_4/ET0_MDIO Ethernet PHY_0 (IC22)

Carrier Board Connector, connected
to PMOD0 connector (J1)

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1), used as
CAM1_PWR#

P3_1/
SSI1_RCK/
ET0_RX_CTL/
ET0_RX_CTL/
RX_DV/
RX_DV
SSI1_RCK/POE4#/MTIOC0B

R01UH0990EJ0110
Dec 13, 2022

Carrier Board Connector, connected
to PMOD1 connector (J2)

Rev.1.10

SSI1_RCK/
ET0_RX_CTL/
RX_DV

SSI1_RCK/
ET0_RX_CTL/
RX_DV

Ethernet PHY_0 (IC22)
Carrier Board Connector, connected
to PMOD0 connector (J1)

Page 29 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2
Pin
Location

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (6/18)

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

N2

P4_2/
ET0_RX_ERR/
RSPI1_MISO/MTIOC8C/
MTIOC3A

RSPI1_MISO

RSPI1_MISO

RSPI1_MISO

Carrier Board Connector, connected
to PMOD0 connector (J1)P57

SPI1_DIN

AD20

P10_0/
ET1_RXD3/
SSI0_BCK/IRQ4/
MTIOC6A/IRQ2

ET1_RXD3

ET1_RXD3

ET1_RXD3

Ethernet PHY_1 (IC23)

—

—

AD18

P10_1/
ET1_RX_ERR/
SSI0_RCK/
SSI3_BCK/MTIOC6B

ET1_ERR

ET1_ERR

ET1_ERR

Unused——AC20

P10_2/
ET1_MDC/
SSI0_TXD/
SSI3_RCK/MTIOC6C

ET1_MDCET1_MDCET1_MDC

Ethernet PHY_1 (IC23)

—

—

AE21

P10_3/
ET1_MDIO/
SSI0_RXD/
SSI3_TXD/
USB1_VBUSEN/
MTIOC6D

ET1_MDIO

ET1_MDIO

ET1_MDIO

Ethernet PHY_1 (IC23)

—

—

AC19

P10_4/
ET1_LINKSTA/
ADC_TRG/
SSI3_RXD/
USB1_OVRCUR

ET1_LINKSTA

ET1_LINKSTA

ET1_LINKSTA

Ethernet PHY_1 (IC23)

—

—

A10

P11_3/SSI0_RXD DISP_CLK/POE10#/
SCI1_CTS#/RTS#/
RSPI2_SSL/DISP_CLKDISP_CLK

P11_3

Connected to 45pin FFC/FPC
connector (CN5)—A10

P11_2/SSI0_TXD/POE8#/
SCI1_SCK/RSPI2_MISO/DISP_DATA0/SCIF1_TXD

DISP_DATA0DISP_DATA0—

B10

P13_1/
SCIF0_RXD/
CAN0_TX/MTIOC4B/
USB1_OVRCUR/DISP_DATA1/
SCIF1_RXD

DISP_DATA1—

A11

P16_0/SCIF1_CTS#/
CAN1_RX_DATARATE_EN/
SCI0_CTS#/RTS#/
DISP_DATA10DISP_DATA10

—

A14

B10

A11

A14

R01UH0990EJ0110
Dec 13, 2022

Note: Unused in case of
RZ/Five
P11_2

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA1

P13_1

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DATA10

P16_0

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

Rev.1.10

Page 30 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2
Pin
Location
C14

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (7/18)

Pin Name

RZ/G2UL
Pin Function

P15_0/RSPI0_CK DISP_DATA11/IRQ4/MTIOC8A/DISP_DATA11

RZ/A3UL
Pin Function

RZ/Five
Pin Function

DISP_DATA11

P15_0

Description
Connected to 45pin FFC/FPC
connector (CN5)SMARC
Pin No.

SMARC
Pin Name

—

C14

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Note: Unused in case of
RZ/Five

B14

P16_1/SCIF1_RTS#/DISP_DATA12DISP_DATA12DISP_DATA12

P16_1

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

C15

P15_1/
RSPI0_MOSI/
IRQ5/MTIOC8B/
DISP_DATA13DISP_DATA13DISP_DATA13

P15_1

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

A15

P15_3/
RSPI0_SSL/
IRQ7/MTIOC8D/DISP_DATA14DISP_DATA14

P18_0/IRQ2/
ADC_TRG/
SCI0_SCK/DISP_DATA15/
SCIF3_SCKDISP_DATA15

P15_2/
RSPI0_MISO/
IRQ6/MTIOC8C/DISP_DATA16/
SCI1_TXDDISP_DATA16

P17_0/RRRSPI2_CK/
SSI1_BCK/
CAN1_TX/MTIOC3A/
DISP_DATA17/
SCI1_RXDDISP_DATA17

P17_2/
RSPI1_MISO/
SSI1_TXD/
CAN1_TX_DATARATE_EN/
MTIOC3C/DISP_DATA18DISP_DATA18

P17_1/
RSPI1_MOSI/SSI1_RCK/CAN1_RX/MTIOC3B/
DISP_DATA19DISP_DATA19

P13_0/
SCIF0_TXD/
CAN_CLK/MTIOC4A/
USB1_VBUSEN/DISP_DATA2DISP_DATA2

P18_1/IRQ3/
SCIF3_SCK/SCI0_TXD/DISP_DATA20/
SCIF3_RXD

DISP_DATA20

DISP_DATA14

P15_3

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

F16

B15

C16

A16

B16

B11

A17

R01UH0990EJ0110
Dec 13, 2022

DISP_DATA15

P18_0

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA16

P15_2

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA17

P17_0

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DATA18

P17_2

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DATA19

P17_1

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA2

P13_0

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA20

P18_1

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

Rev.1.10

Page 31 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2
Pin
Location
B17

C17

C20

A12

B12

C17

C20

A12

B12

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (8/18)
RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

P18_2/IRQ4/
RSPI0_CK/SCI0_SCK/SCIF3_RXD/
SCI0_RXD/DISP_DATA21/
SCIF3_TXD

DISP_DATA21DISP_DATA21

P18_2

P17_3/
RSPI1_SSL/
SSI1_RXD/
CAN1_RX_DATARATE_EN/
MTIOC3D/
DISP_DATA22DISP_DATA22

P18_3/IRQ5/
RSPI0_MOSI/SCI0_TXD/SCIF3_TXD/
SCI0_CTS#/RTS#/
DISP_DATA23/
SCIF4_SCKDISP_DATA23

P13_4/
SCIF0_RTS#/
CAN0_RX_DATARATE_EN/
DISP_DATA3DISP_DATA3

P13_3/
SCIF0_CTS#/
CAN0_TX_DATARATE_EN/
MTIOC4D/
DISP_DATA4DISP_DATA4

P17_3/
RSPI1_SSL/
SSI1_RXD/
CAN1_RX_DATARATE_EN/
MTIOC3D/
DISP_DATA22DISP_DATA22

P18_3/IRQ5/
RSPI0_MOSI/SCI0_TXD/SCIF3_TXD/
SCI0_CTS#/RTS#/
DISP_DATA23/
SCIF4_SCKDISP_DATA23

P13_4/
SCIF0_RTS#/
CAN0_RX_DATARATE_EN/
DISP_DATA3DISP_DATA3

P13_3/
SCIF0_CTS#/
CAN0_TX_DATARATE_EN/
MTIOC4D/
DISP_DATA4DISP_DATA4

Pin Name

R01UH0990EJ0110
Dec 13, 2022

Description
Connected to 45pin FFC/FPC
connector (CN5)SMARC
Pin No.

SMARC
Pin Name

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Note: Unused in case of
RZ/Five

DISP_DATA22

P17_3

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DATA23

P18_3

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DATA3

P13_4

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA4

P13_3

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA22

P17_3

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DATA23

P18_3

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DATA3

P13_4

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA4

P13_3

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

Rev.1.10

Page 32 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2
Pin
Location
C11

C12

C13

A13

B13

C9

B9

C10

B22

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (9/18)
RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

P12_1/IRQ1/
SCI0_TXD/MTIOC0B/
SCIF3_RXD/
DISP_DATA5DISP_DATA5DISP_DATA5

P12_1

P13_2/
SCIF0_SCK/
CAN0_RX/MTIOC4C/DISP_DATA6DISP_DATA6

P14_0/SCIF1_TXD/
CAN1_TX/
MTIC5U/
SCI0_RXD/DISP_DATA7DISP_DATA7

P14_2/SCIF1_SCK/
ADC_TRG/
CAN1_TX_DATARATE_EN/
MTIC5W/
SCI0_SCK/DISP_DATA8/IRQ3

DISP_DATA8

P14_1/SCIF1_RXD/
CAN1_RX/MTIC5V/
SCI0_TXD/DISP_DATA9/IRQ2

DISP_DATA9

P11_1/
SSI0_RCK/POE4#/
SCI1_TXD/
RSPI2_MOSI/DISP_DEDISP_DE

Pin Name

Connected to 45pin FFC/FPC
connector (CN5)SMARC
Pin No.

SMARC
Pin Name

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

P114

GPIO4

Note: Unused in case of
RZ/Five
DISP_DATA6

P13_2

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA7

P14_0

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
DISP_DATA8

P14_2

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DATA9

P14_1

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

DISP_DE

P11_1

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

P11_0/SSI0_BCK DISP_HSYNC/POE0#/
SCI1_RXD/
RSPI2_CK/DISP_HSYNC

DISP_HSYNC

P12_0/IRQ0/
SCI0_RXD/MTIOC0A/
SCIF3_TXD/
DISP_VSYNC

DISP_VSYNC

DISP_VSYNC

P18_4/IRQ6/
RSPI0_MISO/
SCI0_RXD/
USB1_VBUSEN/
ADC_TRG/
SCI1_TXD/SCIF4_RXD

IRQ6

R01UH0990EJ0110
Dec 13, 2022

Description

P11_0

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five
P12_0

Connected to 45pin FFC/FPC
connector (CN5)

Note: Unused in case of
RZ/Five

Rev.1.10

IRQ6

IRQ6

Carrier Board Connector, connected
to PMOD0 connector (J1)

Page 33 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2
Pin
Location

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (10/18)

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

IRQ7

IRQ7

IRQ7

SMARC
Pin No.

SMARC
Pin Name

Ethernet PHY_1 (KSZ9131RNXC),
used as an intrupt signal——

Description

A21

P18_5/IRQ7/
RSPI0_SSL/
SCI0_CTS#/
RTS#/
USB1_OVRCUR/
SCI1_RXD/SCIF4_TXD

N3

P3_0/ET0_RXC/
ET0_RXC/
RX_CLK/
RX_CLK/
SSI1_BCK/
SSI1_BCK
POE0#/MTIOC0A

ET0_RXC/
RX_CLK/
SSI1_BCK

ET0_RXC/
RX_CLK/
SSI1_BCK

Ethernet PHY_0 (KSZ9131RNXC)
Carrier Board Connector, connected
to Audio Codec (IC2)S42

I2S0_CKP2

P3_2/ET0_RXD0/ ET0_RXD0/
SSI1_TXD/
SSI1_TXD
POE8#/MTIOC0C

ET0_RXD0/
SSI1_TXD

ET0_RXD0/
SSI1_TXD

Ethernet PHY_0 (KSZ9131RNXC)

S40

I2S0_
SDOUT

P3_3/ET0_RXD1/ ET0_RXD1/
SSI1_RXD/
SSI1_RXD
POE10#/MTIOC0D

ET0_RXD1/
SSI1_RXD

ET0_RXD1/
SSI1_RXD

Ethernet PHY_0 (KSZ9131RNXC)

S41

I2S0_SDIN

P4_0/ET0_RXD2/ ET0_RXD2/RRRSPI2_CK/
RSPI1_CKMTIOC8A/
MTIOC2A/
USB1_VBUSEN

ET0_RXD2/
RSPI1_CK

ET0_RXD2/
RSPI1_CKEthernet PHY_0 (KSZ9131RNXC)

P56

SPI1_CK

P4_1/ET0_RXD3/ ET0_RXD3/
RSPI1_MOSI/RSPI1_MOSIMTIOC8B/
MTIOC2B/
USB1_OVRCUR

ET0_RXD3/
RSPI1_MOSIET0_RXD3/
RSPI1_MOSI

Ethernet PHY_0 (KSZ9131RNXC)

P58

SPI1_DO

M3

P2_2/ET0_TX_
COL/SSI0_TXD/
CAN1_TX_DATARATE_EN/
MTCLKC/
SCI0_TXD/
RSPI0_MOSIET0_TX_COL

ET0_TX_COL

ET0_TX_COL

Unused——M6

P2_3/ET0_TX_
CRS/SSI0_RXD/
CAN1_RX_DATARATE_EN/
MTCLKD/
SCI0_RXD/
RSPI0_MISO

ET0_TX_CRS

ET0_TX_CRS

ET0_TX_CRS

Unused

—

—

M1

P1_1/
ET0_TX_CTL/
TX_EN/
RSPI0_MOSI/CAN0_TX/MTIOC1B

ET0_TX_CTL/
TX_EN/CAN0_TX

ET0_TX_CTL/
TX_EN/CAN0_TX

ET0_TX_CTL/
TX_EN/CAN0_
TX

Ethernet PHY_0 (KSZ9131RNXC)

P143

CAN0_TX

K6

P2_1/
ET0_TX_ERR/
SSI0_RCK/CAN1_RX/MTCLKB/
SCI0_CLK/
RSPI0_CKCAN1_RXCAN1_RXCAN1_RX

Carrier Board Connector, connected
to CAN1 connector (CN16) (*1)

P146

CAN1_RXM2

P1_0/ET0_TXC/
TX_CLK/
RSPI0_CK/CAN_CLK/MTIOC1A

ET0_TXC_TX_
CLK/P1_0

ET0_TXC_TX_
CLK/P1_0

ET0_TXC_TX_
CLK/P1_0

Ethernet PHY_0 (KSZ9131RNXC)

P113

GPIO5

R3

R2

R1

R01UH0990EJ0110
Dec 13, 2022

Rev.1.10

Carrier Board Connector, connected
to Audio Codec (IC2)Carrier Board Connector, connected
to Audio Codec (IC2)Carrier Board Connector, connected
to PMOD0 connector (J1)

Carrier Board Connector, connected
to PMOD0 connector (J1)

Carrier Board Connector, connected
to CAN0 connector (CN15) (*1)

Page 34 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2
Pin
Location
L1

L2

K1

K2

AD3

AC3

AE3

AD2

AB3

AD1

AE2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (11/18)
RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

P1_2/ET0_TXD0/
RSPI0_MISO/
CAN0_RX/MTIC5U

ET0_TXD0/CAN0_RXET0_TXD0/CAN0_RXET0_TXD0/CAN0_RXP1_3/ET0_TXD1/
RSPI0_SSL/
CAN0_TX_DATARATE_EN/
MTIC5V

ET0_TXD1/P1_3 ET0_TXD1/P1_3 ET0_TXD1/P1_3 Ethernet PHY_0 (KSZ9131RNXC)

P1_4/ET0_TXD2/
CAN0_RX_DATARATE_EN/
MTIC5W

ET0_TXD2/P1_4 ET0_TXD2/P1_4 ET0_TXD2/P1_4 Ethernet PHY_0 (KSZ9131RNXC)

P2_0/ET0_TXD3/
SSI0_BCK/
CAN1_TX/MTCLKA

ET0_TXD3/
CAN1_TX

ET0_TXD3/
CAN1_TX

ET0_TXD3/
CAN1_TX

Ethernet PHY_0 (KSZ9131RNXC)

P5_0/
USB0_VBUSEN/
SCIF2_TXD/
MTIOC7A

USB0_VBUSEN

USB0_VBUSEN

USB0_VBUSEN

Enables power to the USB0 port

Pin Name

SMARC
Pin No.

SMARC
Pin Name

Ethernet PHY_0 (KSZ9131RNXC)

P144

CAN0_RX

P114

GPIO6

P115

GPIO7

P145

CAN1_TX

P62

USB0_EN_
OC#

P118

GPIO10P62

USB0_EN_
OC#

P64

USB0_OTG_
ID

P67

USB1_EN_
OC#

P67

USB1_EN_
OC#——

Carrier Board Connector, connected
to CAN0 connector (CN15) (*1)

Carrier Board Connector, connected
to PMOD0 connector (J1)

Carrier Board Connector,connected
to PMOD0 connector (J1)

Carrier Board Connector, connected
to CAN1 connector (CN16) (*1)

Carrier Board Connector, include
gate USB0_VBUSEN state

P5_1/
IRQ2
SCIF2_RXD/
MTIOC7B/
ADC_TRG/
SCI0_CTS#/RTS#/
RSPI0_SSL/IRQ2

IRQ2

IRQ2

Ethernet PHY_0 (KSZ9131RNXC),
used as an intrupt signal
Carrier Board Connector, connected
to PMOD1 connector (J2)P5_2/
USB0_OVRCUR/SCIF2_SCK/MTIOC7C/
SSI2_BCK

USB0_OVRCUR USB0_OVRCUR

P5_3/
USB0_OTG_ID/
SCIF2_CTS#/MTIOC7D/
SSI2_RCK/
USB1_VBUSEN

USB0_OTG_ID

P5_4/
USB0_OTG_
EXICEN/SCIF2_RTS#/
SSI2_DATA/
USB1_OVRCUR

USB1_OVRCUR USB1_OVRCUR

P6_0/
USB1_VBUSEN/
RSPI2_CK/CAN_CLK/SCIF2_TXD/
MTIOC7A

USB1_VBUSEN

P6_1/
USB1_OVRCUR/
RSPI2_MOSI/CAN0_TX/SCIF2_RXD/
MTIOC7B

SD1_PWR_SEL

R01UH0990EJ0110
Dec 13, 2022

Description

USB0_OVRCUR Active low input when USB0 is overcurrent
Carrier Board Connector, include
gate USB0_OVRCUR state

USB0_OTG_ID

USB0_OTG_ID

OTG identification input
Carrier Board Connector, connected
to microUSB Type-AB connector(CN11)

USB1_OVRCUR Active low input when USB1 is overcurrent
Carrier Board Connector, include
gate USB1_OVRCUR state

USB1_VBUSEN

USB1_VBUSEN

Enables power to the USB1 port
Carrier Board Connector, include
gate USB1_VBUSEN state

SD1_PWR_SEL

SD1_PWR_SEL

Input controlling SD1_PVDD power
level
High: 3.3V, Low: 1.8V

Rev.1.10

Page 35 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2
Pin
Location
AB2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (12/18)

Pin Name
P6_2/ADC_TRG/
RSPI2_MISO/
CAN0_RX/SCIF2_SCK/MTIOC7C/IRQ2

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SD0_PWR_SEL/ SD0_PWR_SEL/ SD0_PWR_SEL/ Pin connector (CN1) for ADC
input or Input controlling
ADC_TRG
ADC_TRG
ADC_TRG

SMARC
Pin No.

SMARC
Pin Name——

SD0_PVDD power level
High: 3.3V, Low: 1.8V
Note: Only available whenuSD is being usedelse this is ADC_TRG
input

AC1

P6_3/RIIC2_SDA/ SCIF0_RXD
RSPI2_SSL/
CAN0_TX_DATARATE_EN/
SCIF2_CTS#/MTIOC7D/
SCIF0_RXD/
IRQ3

SCIF0_RXD

SCIF0_RXD

Carrier Board Connector, connected
to microUSB Type-AB connector(CN14), used as Serial Download
Mode

P141

SER3_RXAC2

P6_4/RIIC2_SCL/ SCIF0_TXD
CAN0_RX_DATARATE_EN/
SCIF2_RTS#/
ADC_TRG/
SCIF0_TXD/IRQ4

SCIF0_TXD

SCIF0_TXD

Carrier Board Connector, connected
to microUSB Type-AB connector(CN14), used as Serial Download
Mode

P140

SER3_TX

AE18

P7_0/ET1_TXC/
ET1_TXC/TX_CLK/
TX_CLK
ADC_TRG/
RSPI2_CK/CAN_CLK/MTIOC0A/
SCIF2_TXD/IRQ5

ET1_TXC/TX_CLK

ET1_TXC/TX_CLK

Ethernet PHY_1 (IC23)

—

—

AD17

P7_1/
ET1_TX_CTL/
TX_EN/
SCI1_SCK/RSPI2_MOSI/CAN0_TX/MTIOC0B/
SCIF2_RXD

ET1_TX_CTL/
TX_EN

ET1_TX_CTL/
TX_EN

ET1_TX_CTL/
TX_EN

Ethernet PHY_1 (IC23)

—

—

AD16

P7_2/ET1_TXD0/SCI1_TXD/
RSPI2_MISO/
CAN0_RX/MTIOC0C/
SCIF2_SCK

ET1_TXD0ET1_TXD0ET1_TXD0Ethernet PHY_1 (IC23)

—

—

AE16

P7_3/ET1_TXD1/SCI1_RXD/
RSPI2_SSL/
CAN0_TX_DATARATE_EN/
MTIOC0D/
SCIF2_CTS#

ET1_TXD1

ET1_TXD1

ET1_TXD1

Ethernet PHY_1 (IC23)

—

—

AD15

P7_4/ET1_TXD2/
SCI1_CTS#/
RTS#/IRQ2/
CAN0_RX_DATARATE_EN/
SCIF2_RTS#

ET1_TXD2

ET1_TXD2

ET1_TXD2

Ethernet PHY_1 (IC23)——

R01UH0990EJ0110
Dec 13, 2022

Rev.1.10

Page 36 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2
Pin
Location

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (13/18)

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

AE15

P8_0/ET1_TXD3/
SCIF0_SCK/SCIF1_RXD/
SSI1_BCK/SCI0_SCK/MTIOC7A/IRQ1

ET1_TXD3

ET1_TXD3

ET1_TXD3

Ethernet PHY_1 (IC23)

—

—

AE17

P8_1/
ET1_TX_ERR/
SCIF0_RXD/
SCIF1_TXD/
SSI1_RCK/SCI0_TXD/MTIOC7B

ET1_TX_ERR

ET1_TX_ERR

ET1_TX_ERR

Unused

—

—

AC16

P8_2/
ET1_TX_COL/
SCIF0_TXD/
SCIF1_CTS#/
SSI1_TXD/SCI0_RXD/MTIOC7C

ET1_TX_COL

ET1_TX_COL

ET1_TX_COL

Unused

—

—

AC15

P8_3/
ET1_TX_CRS/
SCIF0_CTS#/SCIF1_RTS#/
SSI1_RXD/
SCI0_CTS#/
RTS#/MTIOC7D

ET1_TX_CRS

ET1_TX_CRS

ET1_TX_CRS

Unused——AC17

P8_4/ET1_RXC/
RX_CLK/
SCIF0_RTS#

ET1_RXC/
RX_CLK

ET1_RXC/
RX_CLK

ET1_RXC/
RX_CLK

Ethernet PHY_1 (IC23)

—

—

AC18

P9_0/
ET1_RX_CTL/
RX_DV/
RSPI0_CK/SSI2_BCK/MTIOC4A/
SCIF4_SCK

ET1_RX_CTL_
RX_DV

ET1_RX_CTL_
RX_DV

ET1_RX_CTL_
RX_DV

Ethernet PHY_1 (IC23)

—

—

AE19

P9_1/ET1_RXD0/ ET1_RXD0
RSPI0_MOSI/SSI2_RCK/MTIOC4B/
SCIF4_RXD

ET1_RXD0ET1_RXD0Ethernet PHY_1 (IC23)

—

—

AD19

P9_2/ET1_RXD1/ ET1_RXD1
RSPI0_MISO/
SSI2_DATA/MTIOC4C/
SCIF4_TXD

ET1_RXD1

ET1_RXD1

Ethernet PHY_1 (IC23)

—

—

AE20

P9_3/ET1_RXD2/ ET1_RXD2
RSPI0_SSL/
IRQ3/MTIOC4D/
IRQ1

ET1_RXD2

ET1_RXD2

Ethernet PHY_1 (IC23)

—

—

L3

PLL1_AVDD18

PLL1_AVDD18

PLL1_AVDD18

PLL1_AVDD18

1.8V

—

—

U3

PLL23_AVDD18

PLL23_AVDD18

PLL23_AVDD18

PLL23_AVDD18

1.8V

—

—

T6

PLL23_DVDD11

PLL23_DVDD11

PLL23_DVDD11

PLL23_DVDD11

1.1V

—

—

N17

PLL4_AVDD18

PLL4_AVDD18

PLL4_AVDD18

PLL4_AVDD18

1.8V

—

—

Y14

PLL5_AVDD18

PLL5_AVDD18

PLL5_AVDD18

PLL5_AVDD18

1.8V

—

—

R01UH0990EJ0110
Dec 13, 2022

Rev.1.10

Page 37 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (14/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

Y15

PLL5_DVDD11

PLL5_DVDD11

PLL5_DVDD11

NC

1.1V

—

—

Note:

Unused in case of RZ/Five

F11

PLL6_AVDD18

PLL6_AVDD18

PLL6_AVDD18

PLL6_AVDD18

1.8V

—

—

W2

PRST#

PRST#

PRST#

PRST#

Connected to PMIC, used as
NRESET function

—

—

C19

PVDD

PVDD

PVDD

PVDD

3.3V

—

—

F13

PVDD

PVDD

PVDD

PVDD

3.3V

—

—

F19

PVDD

PVDD

PVDD

PVDD

3.3V

—

—

F9

PVDD

PVDD

PVDD

PVDD

3.3V

—

—

W6

PVDD

PVDD

PVDD

PVDD

3.3V

—

—

Y10

PVDD

PVDD

PVDD

PVDD

3.3V

—

—

Y18

PVDD

PVDD

PVDD

PVDD

3.3V

—

—

A7

QSPI_RESET#QSPI_RESET#QSPI_RESET#QSPI_RESET#

Octa Flash (IC2)

—

—

A6

QSPI_WP#QSPI_WP#QSPI_WP#QSPI_WP#

Unused——Note: In case of RZ/Five,this pin is used as
WDTOVF_PERROUT#. Mounted a resistor(R79) for WDTOVF
option and connected
to a logic IC for using
NRESET function of
PMIC, but the WDT
function is notavailable at this time.
C7

QSPI0_IO0

QSPI0_IO0

QSPI0_IO0

QSPI0_IO0

QSPI Flash (IC9) or OctaFlash (IC2)and OctaRAM (IC3)

—

—

A5

QSPI0_IO1

QSPI0_IO1

QSPI0_IO1

QSPI0_IO1

QSPI Flash (IC9) or OctaFlash (IC2)and OctaRAM (IC3)

—

—

B7

QSPI0_IO2

QSPI0_IO2

QSPI0_IO2

QSPI0_IO2

QSPI Flash (IC9) or OctaFlash (IC2)and OctaRAM (IC3)

—

—

C6

QSPI0_IO3

QSPI0_IO3

QSPI0_IO3

QSPI0_IO3

QSPI Flash (IC9) or OctaFlash (IC2)and OctaRAM (IC3)

—

—

B6

QSPI0_SPCLKQSPI0_SPCLKQSPI0_SPCLKQSPI0_SPCLKQSPI Flash (IC9) or OctaFlash (IC2)and OctaRAM (IC3)

—

—

B5

QSPI0_SSLQSPI0_SSLQSPI0_SSLQSPI0_SSLQSPI Flash (IC9) or OctaFlash (IC2)and OctaRAM (IC3)

—

—

B19

RIIC0_SCL

RIIC0_SCL

RIIC0_SCL

RIIC0_SCL

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)

S1

I2C_CAM_CK

B20

RIIC0_SDA

RIIC0_SDA

RIIC0_SDA

RIIC0_SDA

Carrier Board Connector, connected
to 24pin FFC/FPC connector for
MIPI-CSI (CN1)S2

I2C_CAM_DATA19

RIIC1_SCL

RIIC1_SCL

RIIC1_SCL

RIIC1_SCL

Connected to 45pin FFC/FPC
connector

S48

I2C_GP_CKCarrier Board Connector, connected
to PMOD1 connector (J2) and Audio
Codec (IC2)R01UH0990EJ0110
Dec 13, 2022

Rev.1.10

Page 38 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (15/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

A20

RIIC1_SDA

RIIC1_SDA

RIIC1_SDA

RIIC1_SDA

Description
Connected to 45pin FFC/FPC
connector

SMARC
Pin No.

SMARC
Pin Name

S39

I2C_GP_
DAT

Carrier Board Connector, connected
to PMOD1 connector (J2) and Audio
Codec (IC2)G1

SD0_CLK

SD0_CLK

SD0_CLK

SD0_CLK

eMMC Memory (IC6) or microSD
card slot (CN3)

—

—

E2

SD0_CMD

SD0_CMD

SD0_CMD

SD0_CMD

eMMC Memory (IC6) or microSD
card slot (CN3)

—

—

F1

SD0_DATA0SD0_DATA0SD0_DATA0SD0_DATA0

eMMC Memory (IC6) or microSD
card slot (CN3)

—

—

H3

SD0_DATA1

SD0_DATA1

SD0_DATA1

SD0_DATA1

eMMC Memory (IC6) or microSD
card slot (CN3)

—

—

F2

SD0_DATA2

SD0_DATA2

SD0_DATA2

SD0_DATA2

eMMC Memory (IC6) or microSD
card slot (CN3)

—

—

D2

SD0_DATA3

SD0_DATA3

SD0_DATA3

SD0_DATA3

eMMC Memory (IC6) or microSD
card slot (CN3)

—

—

E1

SD0_DATA4

SD0_DATA4

SD0_DATA4

SD0_DATA4

eMMC Memory (IC6)

—

—

D1

SD0_DATA5

SD0_DATA5

SD0_DATA5

SD0_DATA5

eMMC Memory (IC6)

—

—

E3

SD0_DATA6

SD0_DATA6

SD0_DATA6

SD0_DATA6

eMMC Memory (IC6)

—

—

F3

SD0_DATA7

SD0_DATA7

SD0_DATA7

SD0_DATA7

eMMC Memory (IC6)

—

—

G3

SD0_PVDD

SD0_PVDD

SD0_PVDD

SD0_PVDD

1.8/3.3V——

C1

SD0_RST#

SD0_RST#

SD0_RST#

SD0_RST#

eMMC Memory (IC6)

—

—

G2

SD1_CLK

SD1_CLK

SD1_CLK

SD1_CLK

Carrier Board Connector, connected
to microSD card slot (CN10) for SD1

P36

SD1_CLK

H6

SD1_CMD

SD1_CMD

SD1_CMD

SD1_CMD

Carrier Board Connector, connected
to microSD card slot (CN10) for SD1

P34

SD1_CMD

H2

SD1_DATA0

SD1_DATA0

SD1_DATA0

SD1_DATA0

Carrier Board Connector, connected
to microSD card slot (CN10) for SD1

P39

SDIO_D0

J3

SD1_DATA1SD1_DATA1SD1_DATA1SD1_DATA1

Carrier Board Connector, connected
to microSD card slot (CN10) for SD1

P40

SDIO_D1

J1

SD1_DATA2

SD1_DATA2

SD1_DATA2

SD1_DATA2

Carrier Board Connector, connected
to microSD card slot (CN10) for SD1

P41

SDIO_D2

J2

SD1_DATA3

SD1_DATA3

SD1_DATA3

SD1_DATA3

Carrier Board Connector, connected
to microSD card slot (CN10) for SD1

P42

SDIO_D3

K3

SD1_PVDD

SD1_PVDD

SD1_PVDD

SD1_PVDD

1.8/3.3V——

C8

SPI_PVDDSPI_PVDDSPI_PVDDSPI_PVDD

1.8V

—

—

U2

TCK/SWDCLK

TCK/SWDCLK

TCK/SWDCLK

TCK/SWDCLKJTAG Connector (CN2)

—

—

W1

TDI

TDI

TDI

TDI

JTAG Connector (CN2)

—

—

V2

TDO

TDO

TDO

TDO

JTAG Connector (CN2)

—

—

AD22

VSS

VSS

VSS

VSS

GND

—

—

U1

TMS/SWDIOTMS/SWDIOTMS/SWDIOTMS/SWDIOJTAG Connector (CN2)

—

—

V1

TRST#

TRST#

TRST#

TRST#

JTAG Connector (CN2)

—

—

AC9

USB_VDD18

USB_VDD18

USB_VDD18

USB_VDD18

1.8V

—

—

AC8

USB_RREF

USB_RREF

USB_RREF

USB_RREF

Connected to 1.8kΩ to GND

—

—

AC4

USB_VDD18

USB_VDD18

USB_VDD18

USB_VDD18

1.8V

—

—

AC5

USB_VDD18

USB_VDD18

USB_VDD18

USB_VDD18

1.8V

—

—

Y7

USB_VDD33

USB_VDD33

USB_VDD33

USB_VDD33

3.3V

—

—

Y8

USB_VDD33

USB_VDD33

USB_VDD33

USB_VDD33

3.3V

—

—

R01UH0990EJ0110
Dec 13, 2022

Rev.1.10

Page 39 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (16/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

AC6

VSS

VSS

VSS

VSS

GND

—

—

AC7

VSS

VSS

VSS

VSS

GND

—

—

AD4

VSS

VSS

VSS

VSS

GND

—

—

AD7

VSS

VSS

VSS

VSS

GND

—

—

AE4

VSS

VSS

VSS

VSS

GND

—

—

AE7

VSS

VSS

VSS

VSS

GND

—

—

Y9

VSS

VSS

VSS

VSS

GND

—

—

AE6

USB0_DM

USB0_DM

USB0_DM

USB0_DM

Carrier Board Connector, connected
to microUSB Type-AB connector(CN11)

P61

USB0_DM

AD6

USB0_DP

USB0_DP

USB0_DP

USB0_DP

Carrier Board Connector, connected
to microUSB Type-AB connector(CN11)

P60

USB0_DPAD8

USB0_VBUSIN

USB0_VBUSIN

USB0_VBUSIN

USB0_VBUSIN

Carrier Board Connector, connected
to microUSB Type-AB connector(CN11)

P63

USB0_VBUS
_DET

AE5

USB1_DM

USB1_DM

USB1_DM

USB1_DM

Carrier Board Connector, connected
to USB Type-A connector (CN12)

P66

USB1_DM

AD5

USB1_DP

USB1_DP

USB1_DP

USB1_DP

Carrier Board Connector, connected
to USB Type-A connector (CN12)P65

USB1_DP

K10

VDD

VDD

VDD

VDD

1.1V

—

—

K12

VDD

VDD

VDD

VDD

1.1V

—

—

K14

VDD

VDD

VDD

VDD

1.1V

—

—

K16

VDD

VDD

VDD

VDD

1.1V

—

—

L11

VDD

VDD

VDD

VDD

1.1V

—

—

L13

VDD

VDD

VDD

VDD

1.1V

—

—

L15

VDD

VDD

VDD

VDD

1.1V

—

—

M10

VDD

VDD

VDD

VDD

1.1V

—

—

M12

VDD

VDD

VDD

VDD

1.1V

—

—

M14

VDD

VDD

VDD

VDD

1.1V

—

—

M16

VDD

VDD

VDD

VDD

1.1V

—

—

N11

VDD

VDD

VDD

VDD

1.1V

—

—

N13

VDD

VDD

VDD

VDD

1.1V

—

—

N15

VDD

VDD

VDD

VDD

1.1V

—

—

P10

VDD

VDD

VDD

VDD

1.1V

—

—

P12

VDD

VDD

VDD

VDD

1.1V

—

—

P14

VDD

VDD

VDD

VDD

1.1V

—

—

P16

VDD

VDD

VDD

VDD

1.1V

—

—

R11

VDD

VDD

VDD

VDD

1.1V

—

—

R13

VDD

VDD

VDD

VDD

1.1V

—

—

R15

VDD

VDD

VDD

VDD

1.1V

—

—

T10

VDD

VDD

VDD

VDD

1.1V

—

—

T12

VDD

VDD

VDD

VDD

1.1V

—

—

T14

VDD

VDD

VDD

VDD

1.1V

—

—

T16

VDD

VDD

VDD

VDD

1.1V

—

—

A1

VSS

VSS

VSS

VSS

GND

—

—

A25

VSS

VSS

VSS

VSS

GND

—

—

R01UH0990EJ0110
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RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (17/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

A8

VSS

VSS

VSS

VSS

GND

—

—

AA25

VSS

VSS

VSS

VSS

GND

—

—

AA3

VSS

VSS

VSS

VSS

GND

—

—

AB1

VSS

VSS

VSS

VSS

GND

—

—

AB23

VSS

VSS

VSS

VSS

GND

—

—

AC10

VSS

VSS

VSS

VSS

GND

—

—

AC11

VSS

VSS

VSS

VSS

GND

—

—

AC12

VSS

VSS

VSS

VSS

GND

—

—

AC13

VSS

VSS

VSS

VSS

GND

—

—

AC14

VSS

VSS

VSS

VSS

GND

—

—

AC21

VSS

VSS

VSS

VSS

GND

—

—

AC22

VSS

VSS

VSS

VSS

GND

—

—

AC23

VSS

VSS

VSS

VSS

GND

—

—

AC25

VSS

VSS

VSS

VSS

GND

—

—

AD14

VSS

VSS

VSS

VSS

GND

—

—

AE1

VSS

VSS

VSS

VSS

GND

—

—

AE14

VSS

VSS

VSS

VSS

GND

—

—

AE23

VSS

VSS

VSS

VSS

GND

—

—

AE25

VSS

VSS

VSS

VSS

GND

—

—

AE8

VSS

VSS

VSS

VSS

GND

—

—

C18

VSS

VSS

VSS

VSS

GND

—

—

C22

VSS

VSS

VSS

VSS

GND

—

—

C23

VSS

VSS

VSS

VSS

GND

—

—

D24

VSS

VSS

VSS

VSS

GND

—

—

E23

VSS

VSS

VSS

VSS

GND

—

—

F10

VSS

VSS

VSS

VSS

GND

—

—

F12

VSS

VSS

VSS

VSS

GND

—

—

F15

VSS

VSS

VSS

VSS

GND

—

—

F18

VSS

VSS

VSS

VSS

GND

—

—

F24

VSS

VSS

VSS

VSS

GND

—

—

F6

VSS

VSS

VSS

VSS

GND

—

—

F7

VSS

VSS

VSS

VSS

GND

—

—

F8

VSS

VSS

VSS

VSS

GND

—

—

G20

VSS

VSS

VSS

VSS

GND

—

—

G23

VSS

VSS

VSS

VSS

GND

—

—

G24

VSS

VSS

VSS

VSS

GND

—

—

H1

VSS

VSS

VSS

VSS

GND

—

—

J11

VSS

VSS

VSS

VSS

GND

—

—

J13

VSS

VSS

VSS

VSS

GND

—

—

J15

VSS

VSS

VSS

VSS

GND

—

—

J17

VSS

VSS

VSS

VSS

GND

—

—

J20

VSS

VSS

VSS

VSS

GND

—

—

J23

VSS

VSS

VSS

VSS

GND

—

—

J6

VSS

VSS

VSS

VSS

GND

—

—

J9

VSS

VSS

VSS

VSS

GND

—

—

R01UH0990EJ0110
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Page 41 of 84

RZ Family / RZ/G, RZ/A Series

Table 2.2

2. Functional Specifications

List of Pin Function Selection Used on Each Module Board (18/18)

Pin
Location

Pin Name

RZ/G2UL
Pin Function

RZ/A3UL
Pin Function

RZ/Five
Pin Function

Description

SMARC
Pin No.

SMARC
Pin Name

K24

VSS

VSS

VSS

VSS

GND

—

—

L17

VSS

VSS

VSS

VSS

GND

—

—

L20

VSS

VSS

VSS

VSS

GND

—

—

L6

VSS

VSS

VSS

VSS

GND

—

—

L9

VSS

VSS

VSS

VSS

GND

—

—

M23

VSS

VSS

VSS

VSS

GND

—

—

N20

VSS

VSS

VSS

VSS

GND

—

—

N25

VSS

VSS

VSS

VSS

GND

—

—

N6

VSS

VSS

VSS

VSS

GND

—

—

N9

VSS

VSS

VSS

VSS

GND

—

—

P20

VSS

VSS

VSS

VSS

GND

—

—

R17

VSS

VSS

VSS

VSS

GND

—

—

R23

VSS

VSS

VSS

VSS

GND

—

—

R6

VSS

VSS

VSS

VSS

GND

—

—

R9

VSS

VSS

VSS

VSS

GND

—

—

T1

VSS

VSS

VSS

VSS

GND

—

—

T20

VSS

VSS

VSS

VSS

GND

—

—

U11

VSS

VSS

VSS

VSS

GND

—

—

U13

VSS

VSS

VSS

VSS

GND

—

—

U15

VSS

VSS

VSS

VSS

GND

—

—

U17

VSS

VSS

VSS

VSS

GND

—

—

U24

VSS

VSS

VSS

VSS

GND

—

—

U6

VSS

VSS

VSS

VSS

GND

—

—

U9

VSS

VSS

VSS

VSS

GND

—

—

V20

VSS

VSS

VSS

VSS

GND

—

—

V23

VSS

VSS

VSS

VSS

GND

—

—

V3

VSS

VSS

VSS

VSS

GND

—

—

V6

VSS

VSS

VSS

VSS

GND

—

—

W25

VSS

VSS

VSS

VSS

GND

—

—

W3

VSS

VSS

VSS

VSS

GND

—

—

Y1

VSS

VSS

VSS

VSS

GND

—

—

Y13

VSS

VSS

VSS

VSS

GND

—

—

Y16

VSS

VSS

VSS

VSS

GND

—

—

Y20

VSS

VSS

VSS

VSS

GND

—

—

Y23

VSS

VSS

VSS

VSS

GND

—

—

Y6

VSS

VSS

VSS

VSS

GND

—

—

B21

WDTOVF_PERROUT#WDTOVF_PERROUT#WDTOVF_PERROUT#NC

Connected to a logic IC for using
NRESET function of PMIC——

Note: Unused in case of
RZ/Five
Y2

XIN

XIN

XIN

XIN

GND (or 24MHz X'tal oscillator)

—

—

AA1

XOUT

XOUT

XOUT

XOUT

OPEN (or 24MHz X'tal oscillator)——

Note 1.

When used in combination with the RZ SMARC Series Carrier Board (P/N: RTR97X4XXXB00000BE), CAN0 and CAN1
interface cannot be used because a CAN transceiver is not fitted on the RTK97X4XXXB00000BE.

R01UH0990EJ0110
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RZ Family / RZ/G, RZ/A Series

2.3

2. Functional Specifications

MemoryQSPI flash memory and DDR4 SDRAM are mounted on the RTK9743U11C01000BE as external memories.
Please refer to the following for details.

2.3.1

QSPI Flash Memory
RZ/G2UL SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition

RZ/Five SMARC Module Board

Figure 2.1 shows a block diagram of the Serial Flash Memory Interface.
The QSPI flash memory is controlled by the SPI Multi I/O Bus Controller (SPIBSC) that is with built-in to the
RZ/G2UL. This memory supports both single data rate (SDR) and double data rate (DDR) transfers at 66 MHz and 50
MHz clock frequency.
NOTE
The pull-up resistor on the clock line “RZ_QSPI0_SPCLK” is optional.

10k

10k

R22

R57

1.8V

RZ/G2UL, RZ/A3UL, RZ/Five
SPI_PVDDQSPI0_SSLQSPI0_SPCLKQSPI0_IO0
QSPI0_IO1
QSPI0_IO2
QSPI0_IO3

Figure 2.1

Block Diagram of Serial Flash Memory I/F

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RZ Family / RZ/G, RZ/A Series

2.3.2

2. Functional Specifications

DDR4 SDRAM
RZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.2 shows a block diagram of the DDR4 SDRAM interface.
The DDR4 SDRAM is controlled by the DDR3L/DDR4 SDRAM Memory Controller (MEMC) that is with built-in to
the RZ/G2UL. This interface supports up to DDR4-1600 SDRAM, a data bus width of 16-bit and inline ECC.
This interface complies with JEDEC STANDARD JESD79-4C.

RZ/G2UL, RZ/A3UL, RZ/Five

RZ/G2UL, RZ/A3UL, RZ/Five

DDR_ADDR15
DDR_ADDR11
DDR_ADDR2
DDR_ADDR10
DDR_BA0
DDR_ADDR14
DDR_ADDR5
DDR_CAS#
DDR_ADDR3
DDR_ADDR6
DDR_ADDR8
DDR_BA2
DDR_WE#
DDR_ADDR7

DDR_DQ1
DDR_DQ3
DDR_DQ7
DDR_DQ2
DDR_DQ5
DDR_DQ0
DDR_DQ4
DDR_DQ6

DDR_DQS0_P
DDR_DQS0_N

DDR_DM0
DDR_ADDR0
DDR_ADDR12
DDR_ADDR9

DDR_CS0#
DDR_BA1
DDR_ADDR1
DDR_ADDR4
DDR_ADDR13

DDR_DQ12
DDR_DQ11
DDR_DQ15
DDR_DQ13
DDR_DQ14
DDR_DQ9
DDR_DQ8
DDR_DQ10

DDR_RESET#DDR_ODT0
DDR_CKE
DDR_CLK_N
DDR_CLK_P

Figure 2.2

22

DDR_CLK_N
DDR_CLK_P

R13

DDR_DQS1_P
DDR_DQS1_N
DDR_DM1

Block Diagram of DDR4 SDRAM

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RZ Family / RZ/G, RZ/A Series

2.3.3

2. Functional Specifications

Octa Peripheral Interface
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.3 shows a block diagram of the Octa Periphral interface.
The OctaRAM and OctaFlash memory are controlled by the Octa Memory Controller that is with built-in to the
RZ/A3UL. These memories support both single data rate (SOPI: Single Octa I/O) and double data rate (DOPI: Double
Octa I/O) transfers at 100 MHz clock frequency.

R22
10k

10k

R57
10k

R76

1.8V

RZ/A3ULSPI_PVDDQSPI_RESET#QSPI0_SSL
OM_DQSQSPI0_SPCLKQSPI0_IO0
QSPI0_IO1
QSPI0_IO2
QSPI0_IO3
OM_SIO4
OM_SIO5
OM_SIO6
OM_SIO7

10k

R77

1.8V

RZ/A3ULOM_CS1#Figure 2.3

Block Diagram of Octa Peripheral I/F

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RZ Family / RZ/G, RZ/A Series

2.4

2. Functional Specifications

Gigabit Ethernet Interface
RZ/A3UL SMARC Module Board

RZ/G2UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board

RZ/Five SMARC Module Board

OCTAL Edition

Figure 2.4 and Figure 2.5 show a block diagram of Gigabit Ethernet0 and Ethernet1 interface.
The Gigabit Ethernet Interface is controlled by the Ethernet controller (E-MAC) hat conforms to the definition of the
MAC (Media Access Control) layer that is with built-in to the RZ/G2UL. The Ethernet clock is sourced from a clock
generator connected to the Ethernet PHY.
This interface complies with IEEE802.3 PHY RGMII.

11
RZ/G2UL, RZ/A3UL, RZ/Five

SMARC Edge Connector

ET0_TXC/TX_CLK
ET0_TX_CTL/TX_EN
ET0_TXD0ET0_TXD1
ET0_TXD2
ET0_TXD3
ET0_RXC/RX_CLK
ET0_RX_CTL/RX_DV
ET0_RXD0ET0_RXD1
ET0_RXD2
ET0_RXD3

ET0_MDCET0_MDIOSLG7RN45315
4

6
IO2

GBE0_LINK_ACT#

IO4

GBE0_LINK1000#

SLG7RN45356
15
IO12

9

GBE0_LINK_LED

16

ET0_LINKSTA

GBE0_LINK100#

IO7

RZ/G2UL, RZ/A3UL, RZ/Five
IO13

RZ/G2UL, RZ/A3UL, RZ/Five Level Shifter
P5_1

Figure 2.4

ET0_LINKSTASLG7RN45315
RZ_IRQ2_ET0_INT#

12

IO9

IO0

2

ET0_INT#IN

Block Diagram of Gigabit Ethernet0 I/F

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RZ Family / RZ/G, RZ/A Series

2. Functional Specifications

11
RZ/G2UL, RZ/A3UL, RZ/Five

SMARC Edge Connector

ET1_TXC/TX_CLK
ET1_TX_CTL/TX_EN
ET1_TXD0ET1_TXD1
ET1_TXD2
ET1_TXD3
ET1_RXC/RX_CLK
ET1_RX_CTL/RX_DV
ET1_RXD0ET1_RXD1
ET1_RXD2
ET1_RXD3

ET1_MDCET1_MDIOSLG7RN45315
5

7
IO3

GBE1_LINK_ACT#

IO5

GBE1_LINK1000#

SLG7RN45356
12

10 GBE1_LINK_LED
IO9

GBE1_LINK100#

IO8

RZ/G2UL, RZ/A3UL, RZ/Five
13
IO10

RZ/G2UL, RZ/A3UL, RZ/Five Level Shifter
P18_5

Figure 2.5

ET1_LINKSTA
ET1_LINKSTASLG7RN45315
RZ_IRQ7_ET1_INT#

13

IO10

IO1

3

ET1_INT#IN

Block Diagram of Gigabit Ethernet1 I/F

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RZ Family / RZ/G, RZ/A Series

2.5

2. Functional Specifications

ADC Interface
RZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.6 shows a block diagram of the ADC interface.
When the RZ/Five is used, the pin location is different from the RZ/G2UL, so option resistors are required.
The 6-pin connector is implemented on this board and 2ch input channels can be used as the analog signal.
NOTE
ADC_TRG is only available when SD0 is used for eMMC memory (not when microSD card is used).

RZ/G2UL, RZ/A3UL, RZ/Five

Figure 2.6

Block Diagram of ADC I/F

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RZ Family / RZ/G, RZ/A Series

2.6

2. Functional Specifications

Clock Configuration
RZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.7 shows a block diagram of the Clock configuration.
NOTE
SD Interface supports UHS-I mode of 50MB/s (SDR50) and 104MB/s (SDR104).

Clock IC

Max. 125MHz

DIFF1
DIFF1BSE2
CLKINB_X1
X1

24MHz
CLKIN_X2

REF
SE1
DIFF2

Max. 125MHz
11.2896MHz
24MHz
11.2896MHz
12.2880MHz

Ethernet0 PHY
XI

Ethernet1 PHY
XI

Audio Codec
MCLK
BCLK
SCLK

RZ/G2ULEXCLKAUDIO_CLK1
AUDIO_CLK2
DDR4_SDRAM
DDR_CLK_P
CK_T
Max. 800MHz
DDR_CLK_N
CK_C
JTAG
20MHz
TCK/SWDCLK
CLK
eMMC memory
Max.133MHz
SD0_CLK
CLK
Max. 33.33MHz
SD0 card slot
(SDR 3.3V) CLK
QSPI0_SPCLK

Max. 66MHz(SDR mode)
Max. 100MHz(SDR mode)

QSPI flash memory
VCC
SD1 card slot
XI
Camera connector
MIPI_CLK_P
MIPI_CLK_N
CAM_I2C_SCL

OctaFlash
VCC
OctaRAM
VCC

SD1_CLKCSI_CLK_P
CSI_CLK_N
RIIC1_SCL
RIIC0_SCL
SSI1_BCKRSPI1_CKHDMI transceiver
DRXC_P
DRXC_NSCLK/MCLKSCLCECCLK

Max. 33.33MHz (SDR 3.3V)
Max. 1.5GHz
Max. 1MHz
Max. 1MHz
Max. 12.5MHz

12MHz

CMOS Oscillator
CLK

PMOD0

Max. 10MHz

SCK
PMOD1

SCL
Note:

Figure 2.7

shows the Carrier Board

Block Diagram of Clock Configuration

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RZ Family / RZ/G, RZ/A Series

2.7

2. Functional Specifications

Reset Control
RZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.8 shows block diagrams of a reset control for the RTK9743U11S01000BE (Evaluation board Kit for
RZ/G2UL MPU).
For the RTK9743U11C01000BE, the interfaces of DDR4 SDRAM, QSPI flash memory, eMMC memory, Ethernet andDebug are controlled by reset signal from the PMIC.
There are two types of system resets: power-on reset and reset by the button switch.

RZ/G2UL

DDR4 SDRAMRESET_N

DDR_RESET#QSPI_RESET#
SD0_RESET#
TRST#
PRST#
WDTOVF_PERROUT#RESET_BTN#QSPI flash memory
RESET#eMMC memory
RST_#

RESET_IN#

Ethernet PHY_0
RESET_N

3.3V

RESET_N

Ethernet PHY_1

CARRIER_PWR_ON

5.0V

ISL80102

3.3V

ISL80102

JTAG conn

PRESET#_18
1.8V

SLG7RN45356

VIN
VOUT
ENABLE
PG
5.0V

PMIC

DNF*

nRESET
GNDDetect(TRST#)NRESET* You can use reset signal(TRST#) from JTAG.
If you want to use TRST# signal, please see the section2.9

ISL61852
5V_BOARD

VIN

Note:

1.8V->3.3V

VIN
VOUT
ENABLE
PG

EN1
FLT1

OUT1

EN2
FLT2

OUT2

5V_PMOD

shows the Carrier Board

Figure 2.8

Block Diagram of Reset Control

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RZ Family / RZ/G, RZ/A Series

2.8

2. Functional Specifications

Power Supply Configuration
RZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.9 shows a block diagram of power configuration for the RTK9743U11S01000BE (Evaluation board Kit for
RZ/G2UL MPU).
This board has one USB Type-C receptacle for power input with USB Power Delivery. The input voltage of VBUS canbe selected between 5V and 9V.
The default setting for controlling the input voltage level is 5V (max 3A input) with SW11-4 is turned on. When theswitch is turned off, the input voltage is 9V (max 3A input). Only when the RTK9743U11S01000BE is connected toexternal devices that requires a lot of power and is expected to run out of power, the SW 11-4 is turned off.
The 5V power supply is supplied to the PMIC installed on the RTK9743U11C01000BE, and the PMIC generates thepower supply voltage for each interface.

5.0V
Note:

shows the Carrier Board

USB Type-C (CN6)VBUS

To SUB board

3.3V
5.0V 3.3V

3.3V peripheral device

1.8V

5.0V 1.8V

1.8V peripheral device
ETH_VDD

5.0V 1.2V

Ethernet PHY
RZ/G2ULPVDD[0:6]

3.3V/1.8V
3.3V/1.8V

VDDQ_DDR
5.0V 1.2V

1.1V

5.0V 1.1V

Figure 2.9

USB_VDD33[0:1]SD0_PVDD
SD1_PVDD
VDD18OTP_VDD18
PLL[1:6]_AVDD18
USB_VDD18[0:2]
VDD18
ADC_AVDD18
SPI_PVDD
CSI_VDD18[0:1]
PVDD182533_0
PVDD182533_1
DDR_VDDQ[0:5]

VDD[0:24]
PLL23_DVDD11
PLL5_DVDD11Block Diagram of Power Configuration

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RZ Family / RZ/G, RZ/A Series

2. Functional Specifications

Figure 2.10 shows block diagrams of power regulation for RTK9743U11C01000BE.

RZ/G2UL, RZ/A3UL, RZ/Five
RIIC0_SCL
RIIC0_SDL

SLG7RN45356
PMIC_NRESETSMARC Edge Connector

IN

WARM_RESET#

Note：shows the Carrier Board

RZ/G2UL, RZ/A3UL, RZ/Five

6

IO4

IO16

19

RESET_OUT#
OUT

3
IO1

WDTOVF_PERROUT#

Figure 2.10

Block Diagrams of Power Regulation

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2.9

2. Functional Specifications

PMIC
RZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.11 shows the RZ/G2UL pin assignment for PMIC.
LDO2 and LDO3 output voltage value for supply SD0_PVDD and SD1_PVDD are fixed by P6_1 and P6_2.

DA9062
BUCK1

5.0V(5.0V 5.0A)

3.3V(Dropout Typ100mV)

5.0V

SMAC
Conn.

VIN_PWR_BAD#
PGOOD

5.0V

POWER_BTN#
3.3V
1.8V

CARRIER_PWR_ON

PMIC_PGOOD

3.3V

VSYS
VDD_BUCK1VDD_ BUCK2VDD_ BUCK3
VDD_ BUCK4VDD_ LDO1
VDD_ LDO2
VDD_ LDO34
VDDIO

BUCK2
BUCK4

1.1V(1.1V 2.5A)

VDD, PLLx_VDD11

VDDQ_DDR(1.2V 2.5A)

DDR_VDDQ

1.8V(1.8V 1.5A)

VDD, PLLx_AVDD18,
CSI_VDD18(*1), USB_VDD18,
ADC_AVDD18, OTP_VDD18

3.3V( 3.3V 2.0A)

BUCK3
VLDO2 SD0_PVDD(3.3V/1.8V 0.3A)

TP

VLDO3 SD1_PVDD(3.3V/1.8V 0.3A)

nRESETREQVLDO4 ET0_PVDD(3.3V/1.8V 0.3A)

PVDD182533_1

GPIO4(Sequencer cont.)

SPI_PVDD

RZ_Px_x2
WDTOVF_PERROUT

3.3V

nIRQ
PRST_N

PRST_N
Px_x0

RZ/G2UL
RZ/A3ULRZ/Five

Px_x1
Px_x2

3.3V 3.3V 3.3V

SD0_PWR_SEL
SD1_PWR_SEL
SD0_PWR_

SW_ET0_EN
3.3V 3.3V

RZ/G2UL
RZ/A3ULPVDD182533_0
RZ/Five
SD1_PVDDnONKEYRESET_IN#
OD

PVDD, USB_VDD33
SD0_PVDDXTAL_INnRESETXTAL_OUT
GPIO0(WDKICK)GPIO1(LDO2_GPI) VBBAT

32KHz

SW
EN

VCC

VCC
VCCQ

uSD-Card
eMMC

VCC QSPI(*1)/OCTA FLASH(*2)

GPIO2(LDO3_GPI)VCC

OCTA RAM(*2)

GPIO3(LDO4_GPI)

RIIC0_SCLSCL

RIIC0_SDA

SDA

VLDO1

3.3V

ET0/1_CORE_VDD(1.2V 1.0A)

ISL80510

EN

VPP_DDR(2.5V 0.1A)

AVDDH
DVDDL,AVDDL Ether PHY 0
DVDDH
AVDDH
DVDDL,AVDDL Ether PHY 1
DVDDH
DDR_VPPNCP51200
3.3V(*1) RZ/A3UL SMARC Module Board OCTAL Edition is not supported.
(*2) RZ/G2UL SMARC Module Board, RZ/Five SMARC Module Board
and RZ/A3UL SMARC Module Board QSPI Edition are not supported.

Figure 2.11

VCC
EN

VRI
VTT

VDD, VDDQVTTR_DDR(0.6V 1.5A)

VRO VREF_DDR(0.6V 0.1A)

DDR4SDRAM

VREFCA

Block Diagram around PMIC

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2.10

2. Functional Specifications

Debug Interface
RZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.12 shows a block diagram of debug interface.
Ths interface supports JTAG and SWD and has debug support for Cortex-A55 and Cortex-M33.
The default operation for the debug interface uses pin 9 as a ground detect, although with resitor(R20) fitting options, it
is possible to use this to independently drive the JTAG_TRST#.
When debug mode is disabled (SW1-1: DEBUGEN is ON), JTAG_TRST# is permanently low.
On the other hands, when debug mode is enabled (SW1-1: DEBUGEN is OFF), JTAG_TRST# is initially low on
powerup and then ramps up to 1.8V.

RZ/G2UL, RZ/A3UL, RZ/Five
TMS_SWDIOTCK_SWDCLKTDO_SWO
TDI

VDD18

P6

TRST#

Figure 2.12

Block Diagram of Debug I/F

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2.11

SD/MMC Host Interface

2.11.1

eMMC Memory

2. Functional Specifications

RZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.13 shows a block diagram of the MMC interface.
The eMMC memory is connected to channel 0 of SD/MMC interface that is with built-in to the RZ/G2UL. This
memory is used in conjunction with SD card.
The eMMC memory may be used when
● the SW_SD0_DEV_SEL is enabled (SW1-2: Selection SD/MMC is OFF).

This interface complies with the JEDEC standard version 4.51 and supports HS200 mode.

RZ/G2UL, RZ/A3UL, RZ/Five
SD0_PVDD

SD0_RST_N

SD0_CLK

SD0_CMD

SD0_DATA0SD0_DATA1

SD0_DATA2

SD0_DATA3

RZ/G2UL, RZ/A3UL, RZ/Five
SD0_PVDD
SD0_PVDD

SD0_DATA4
SD0_DATA5
SD0_DATA6

SD0_DATA7

Figure 2.13

Block Diagram of eMMC I/F

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2.11.2

2. Functional Specifications

SD CardRZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.14 shows a block diagram of the SD0 interface.
The microSD card is connected to channel 0 of SD/MMC interface that is with built-in to the RZ/G2UL. This memoryis used in conjunction with eMMC memory.
The microSD card may be used when
● the microSD is the selected boot mode (SW11-1: ON, SW11-2: ON, SW11-3: OFF)● the SW_SD0_DEV_SEL is disabled (SW1-2: Selection SD/MMC is ON) and eMMC memory is not the selectedboot mode (SW11-1: ON, SW11-2: OFF, SW11-3: OFF).
This interface complies with the memory card standard version 3.0 and supports UHS-I mode of 50MB/s (SDR50) and104MB/s (SDR104).

RZ/G2UL, RZ/A3UL, RZ/Five
SD0_PVDD

SD0_CLK

SD0_CMD

SD0_DATA0SD0_DATA1

SD0_DATA2

SD0_DATA3

RZ/G2UL, RZ/A3UL, RZ/Five
SD0_PVDD

Figure 2.14

SD0_CD

Block Diagram of SD0 I/F

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2.12

2. Functional Specifications

GreenPAKRZ/G2UL SMARC Module Board

RZ/Five SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.15 shows a block diagram of the GreenPAK.
This board is implemented several types of the GreenPAK with integrated various peripheral functions. Table 2.3
shows a function of the each GreenPAK used with this board.
The GreenPAK is programmable device.
The SLG7RN45314 and SLG45315, SLG7RN45356 are designed based on the SLG46538.

Figure 2.15

Block Diagram of Each GreenPAK

Table 2.3

Features of Each GreenPAK

Type Name

Description

SLG7RN45314

SMARC Boot Mode
SD0_CD / GPIO4 multiplexing
SD0_PWR_SEL / ADC_TRG multiplexing
SD0_DEV_SEL (microSD card or eMMC)

SLG7RN45315

USB0/1
Logic for EN_OC#
Etehnet0/1
Logic for interrupt level shifting
LINK Active LED drive

SLG7RN45356

Reset Logic
SMARC Carrier Power ON
Ethernet0/1
LINK LED drive
LINK status inversion

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2. Functional Specifications

The pin configuration and of each GreenPAK is described in the next section. Please refer to the following data sheet
included with the design data in detail (RZ/G2UL SMARC Module Board Design Data).
● SLG7RN45314_DS_r014_12152021.pdf● SLG7RN45315_DS_r011_10292021.pdf● SLG7RN45356_DS_r010_11012021.pdf

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2.13

2. Functional Specifications

Parallel Output Interface
RZ/G2UL SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

Figure 2.16 shows a block diagram of the Parallel Output interface.
This interface is controlled by the LCD controller (LCDC) with that is built-in to the RZ/G2UL. This interface supports
RGB888 for input format.

RZ/G2UL, RZ/A3UL
DISP_DATA0DISP_DATA1DISP_DATA2DISP_DATA3DISP_DATA4DISP_DATA5DISP_DATA6DISP_DATA7DISP_DATA8DISP_DATA9DISP_DATA10DISP_DATA11DISP_DATA12DISP_DATA13DISP_DATA14DISP_DATA15DISP_DATA16DISP_DATA17DISP_DATA18DISP_DATA19DISP_DATA20
DISP_DATA21DISP_DATA22DISP_DATA23
DISP_CLKDISP_HSYNC
DISP_VSYNC
DISP_DEDISP_INTRIIC1_SCL
RIIC1_SDA

Figure 2.16

Block Diagram of Parallel Output I/F

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3. Operation Specifications

3.

Operation Specifications

3.1

Overview of Connectors

Figure 3.1 Illustrates the layout of connectors of the RTK9743U11C01000BE.

CN1:
ADC connector

CN5:
microSD card slot

CN3:
microSD card slot

CN2:
JTAG connector

CN4:
SMARC edge connector

Figure 3.1

Layout of connectors of the RTK9743U11C01000BE (Top side)

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3.1.1

3. Operation Specifications

ADC Connector (CN1)

The RTK9743U11C01000BE contains a connector of ADC interface (CN1).
Figure 3.2 illustrates the layout of the connector pins. Table 3.1 shows the assignment of the connector pins.

Top View
10

9

2

1
CN1

Figure 3.2

ADC Connector (CN1) Pin Layout Diagram

Table 3.1

ADC Connector (CN1) Pin Layout Table

Pin

Signal Name

1

PVDD

2

ADC_AVDD18

3

ADC_CH04

ADC_CH1

5

ADC_TRG

6VSS

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3.1.2

3. Operation Specifications

JTAG Connector (CN2)The RTK9743U11C01000BE contains a connector of debug interface (CN2).
Figure 3.3 illustrates the layout of the connector pins. Table 3.2 shows the assignment of the connector pins.

Figure 3.3

JTAG Connector (CN2) Pin Layout Diagram

Table 3.2

JTAG Connector (CN2) Pin Layout Table

Pin

Signal Name

1

PVDD18

2

TMS/SWDIO

3

VSS

4

TCK/SWDCLK

5

VSS

6

TDO

7

—

8

TDI

9

VSS

10

TRST#

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3.1.3

3. Operation Specifications

MicroSD Card Slot (CN3)The RTK9743U11C01000BE contains a microSD card slot (CN3).
Figure 3.4 illustrates the layout of microSD card slot pins. Table 3.3 shows the assignment of microSD card slot pins.

Figure 3.4

microSD Card Slot (CN3) Pin Layout Diagram

Table 3.3

microSD Card Slot (CN3) Pin Layout Table

Pin

Signal Name

1

SD0_DATA2

2

CD/SD0_DATA3

3

SD0_CMD

4

SD0_PVDD

5

SD0_CLK

6VSS

7

SD0_DATA08

SD0_DATA19DETECT_SWITCH

10DETECT_LEVER

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3.1.4

3. Operation Specifications

SMARC edge Connector (CN4)The RTK9743U11C01000BE can be connected to an external expansion board through the Carrier board connecting
connector (CN4).
Figure 3.5 illustrates the layout of Carrier board connecting connector pins. For the assignment of Carrier board
connecting connector pins, please refer to the section 4 “MODULE PIN-OUT MAP” of the document “SMARC
module 2.1 Specification (sget.org)”.

Figure 3.5

Layout of Carrier Board Connecting Pins

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3.1.5

3. Operation Specifications

FFC/FPC Connector(CN5)The RTK9743U11C01000BE contains a FFC/FPC Connector for the Parallel Output Interface (CN5).
Figure 3.6 illustrates the layout of the connector pins. Table 3.4 shows the assignment of the connector pins.

Figure 3.6

FFC/FPC Connector (CN5) Pin Layout Diagram

Table 3.4

FFC/FPC Connector (CN5) Pin Layout Table

Pin

Signal Name

Pin

Signal Name

1

RIIC1_SDA

24

DISP_DATA172

RIIC1_SCL25

DISP_DATA16

3

5.0V

26

DISP_DATA15

4

DISP_INT27

DISP_DATA14

5

VSS

28

DISP_DATA13

6

1.8V

29

DISP_DATA12

7

1.8V

30

DISP_DATA11

8

1.8V

31

DISP_DATA10

9

1.8V

32

DISP_DATA9

10

VSS

33

DISP_DATA8

11

3.3V

34

DISP_DATA712DISP_DE35

DISP_DATA613

DISP_VSYNC

36

DISP_DATA514DISP_HSYNC

37

DISP_DATA4

15

VSS

38

DISP_DATA316

DISP_CLK39

DISP_DATA2

17

VSS

40

DISP_DATA118

DISP_DATA23

41

DISP_DATA019

DISP_DATA22

42

3.3V

20

DISP_DATA21

43

3.3V

21

DISP_DATA20

44

VSS

22

DISP_DATA19

45

VSS

23

DISP_DATA18

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3.2

3. Operation Specifications

Layout of Operation Components

Figure 3.7 illustrates the layout of operation components of the RTK9743U11C01000BE.

Figure 3.7

Layout of Operation Components of the RTK9743U11C01000BE

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3.2.1

3. Operation Specifications

Functions of Switches and Mode Terminals

The RTK9743U11C01000BE contains one switch.
Table 3.5 lists mounted switches. Figure 3.8 shows a block diagram of the System Setting interface.
Table 3.5

Switches Mounted on the RTK9743U11C01000BE

No.

Function

Note

SW1

System setting DIP switch

For details, see Table 3.6 to Table 3.8

RZ/G2UL, RZ/A3UL, RZ/Five
DEBUGEN

MD_CLKSBSCANP
MD_OSCDRV0
MD_OSCDRV1Figure 3.8

Block Diagram of System Setting I/F

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3. Operation Specifications

Table 3.6 provides functions of the DIP switch and Figure 3.9 indicates a default terminal state.
Table 3.6

Functions of System Setting DIP Switch (SW1)No.

SettingFunction

SW1-1

OFF DEBUGEN=“H”

JTAG debugging

DEBUGEN

ON

Normal operation (default)

SW1-2

OFF Selection=“H”

Select the eMMC memory (default)

Selection SD/MMC

ON

Select the microSD card

SW1-3

OFF Selection=“H”

Select the CAN0(*1), CAN1(*1), RSPI1, SSI1 signals (default)

Selection Ethernet0/Peripherals

ON

Select the Ethernet0 signals

Note 1.

DEBUGEN=“L”

Selection=“L”

Selection=“L”

When used in combination with the RZ SMARC Series Carrier Board (P/N: RTR97X4XXXB00000BE), CAN0 and CAN1
interface cannot be used because a CAN transceiver is not fitted on the RTK97X4XXXB00000BE.

Figure 3.9

Default Setting of System Setting DIP Switch (SW1)

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3. Operation Specifications

By setting SW1-3 to the following settings, the RTK9743U11C01000BE can be used various interfaces. Table 3.7
provides functions by SW1-3. Table 3.8 provides functions of mode terminals.
Table 3.7

GPIO Signals by SW1-3Signal Name

Setting
SW1-3 =“L”

SW1-3 =“H”

P1_2

ET0_TXD0CAN0_RX(*1)

P1_3

ET0_TXD1

GPIO6

P1_4

ET0_TXD2

GPIO7

P2_0

ET0_TXD3

CAN1_TX(*1)

P3_2

ET0_RXD0

SSI1_TXD

P3_3

ET0_RXD1

SSI1_RXD

P4_0

ET0_RXD2

RSPI1_CK

P4_1

ET0_RXD3

RSPI1_MOSI

P1_0

ET0_TXC

GPIO5

P1_1

ET0_TX_CTL

CAN0_TX(*1)

P3_0

ET0_RXC

SSI1_BCK

P3_1

ET0_RX_CTL

SSI1_RCK

P4_3

ET0_MDCRSPI1_SSL

P4_4

ET0_MDIO

GPIO1

P4_5

ET0_LINKSTAGPIO11

P5_1

ET0_INT#GPIO10CAN0/1(*1)

Application

Audio

Ethernet0

PMOD0 (Type-2A)
PMOD1 (Type-6)

Note 1.

When used in combination with the RZ SMARC Series Carrier Board (P/N: RTR97X4XXXB00000BE), CAN0 and CAN1
interface cannot be used because a CAN transceiver is not fitted on the RTK97X4XXXB00000BE.

Table 3.8

Functions of System SettingNo.

SettingFunction

MD_CLKS0

MD_CLKS=“H”

SSCG ON1

MD_CLKS=“L”

SSCG OFF0

BSCANP=“H”

Select the eMMC memory

1

BSCANP=“L”

Select the SD card0

MD_OSCDRV0=“H”

Not supported

1

MD_OSCDRV0=“L”

0

MD_OSCDRV1=“H”

1

MD_OSCDRV1=“L”

BSCANP

MD_OSCDRV0

MD_OSCDRV1

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4.

4. Parallel to HDMI Converision Board

Parallel to HDMI Converision Board
RZ/G2UL SMARC Module Board

RZ/A3UL SMARC Module BoardQSPI Edition
RZ/A3UL SMARC Module Board
OCTAL Edition

4.1

Configuration

The Parallel to HDMI Conversion Board is connected to the FFC/FPC Connector (CN5) described in the section
3.1.5 to realize parallel output via the 50mm FPC.
Figure 4.1 shows an example of system configuration using the Parallel to HDMI Conversion Board.

Parallel Output

Parallel to HDMI
Conversion Board

RZ/G2UL SMARC Module Board
RTK9743U11C01000BE

50mm
FPC

Power supply throughUSB Type-C
AC adapter(*1)

RZ/G2ULRZ SMARC Series Carrier Board
RTK97X4XXXB00000BE(*1): Should be procured on the customer side

Figure 4.1

Host computer
SCIF download(for bootloader
programming)

Example of System Configuration Using the Parallel to HDMI Conversion Board

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4. Parallel to HDMI Converision Board

The connection procedure of the 50mm FPC is follows.
The top and bottom surfaces of the FPC are shown below.

Top surface

Figure 4.2

1.

Top and Bottom Views of the 50mm FPC

Lift up the actuator. Use thumb or index finger.

Figure 4.3

2.

Bottom surface

How to install the 50mm FPC (1)Fully insert the FPC in the connector parallel to mounting surface, with the exposed conductive traces facing
down

Figure 4.4

How to install the 50mm FPC (2)R01UH0990EJ0110
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3.

4. Parallel to HDMI Converision Board

Rotate down the actuator until firmly closed.

NOTE
The PFC must be fully inserted in the connector. If not fully inserted, the actuator will not close property.
Should this be the case, lift up the actuator and repeat the process (starting with Step 1 above)

Figure 4.5

4.

How to install the 50mm FPC (3)FPC Removal
1)

Lift up the actuator.

2)

Carefully remove the FPC

Figure 4.6

How to remove the 50mm FPC

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4.2

4. Parallel to HDMI Converision Board

Features

Table 4.1 shows the features of the Parallel to HDMI Conversion Board.

Table 4.1

Features of the Parallel to HDMI Conversion Board

Item

Details

Video ICHDMI transceiver: 1pc

Connector

FFC/FPC connector (45pin): 1pc
microHDMI connector: 1pc

Circuit board specifications

Dimensions: 20 mm * 40 mm
Mount: Single-sided mounting (6 layers)

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4.3

4. Parallel to HDMI Converision Board

Physical View

Figure 4.7 shows the top and bottom views of the Parallel to HDMI Conversion Board..

Figure 4.7

Top and Bottom Views of the Parallel to HDMI Conversion Board

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4.4

4. Parallel to HDMI Converision Board

Component Layout

Figure 4.8 shows the layout of main components of the Parallel to HDMI Conversion Board.

Figure 4.8

Layout of Components of the Parallel to HDMI Conversion Board (Top and bottom View)

Table 4.2 and Table 4.3 list main components mounted on the Parallel to HDMI Conversion Board.

Table 4.2

Main Components on the Parallel to HDMI Conversion Board (1) IC

Component
NumberComponent Name

Type (Manufacturer)

IC1

HDMI Transmitter

ADV7513BSWZ(Analog Devices)

Table 4.3
Components
NumberRecommended Optional
Components

Main Components on the Parallel to HDMI Conversion Board (2) Connector
Component Name

Type (Manufacturer)

CN1

FFC/FPC connector(45pin)FH23-45S-0.3SHAW(05)(HIROSE)

CN2

microHDMI connector

46765-1301 (Molex)

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5. Appendix

5.

Appendix

5.1

Type Name and Features of Each Board

This section describes the the type name and feature of each board here.
The SMARC Module Board is as follows. This picture is of the RTK9743U11C01000BE.

Figure 5.1

Top View of the SMARC Module Board

The SMARC Module Boards with RZ/G2UL, RZ/A3UL and RZ/Five are used common PCB layout and designed to be
pin-compatible and available for use.
Please refer to the section 2 “Functional Specifications” onwards for the actual functions of the board.
MemoryConfiguration

Parallel to HDMI
Conversion Board

RZ/G2UL(R9A07G043U11GBG)QSPI flash memory

Included

RZ/Five(R9A07G043F01GBG)QSPI flash memory

RZ/A3UL(R9A07G063U02GBG)QSPI flash memory

RZ/A3UL(R9A07G063U02GBG)

Octa RAM memory

Board Name

Type NameMPU

RZ/G2UL SMARC Module Board

RTK9743U11C01000BE

RZ/Five SMARC Module Board

RTK9743F01C01000BE

RZ/A3UL SMARC Module BoardQSPI Edition

RTK9763U02C01000BE

RZ/A3UL SMARC Module Board
OCTAL Edition

RTK9763U02C01001BE

DDR4 SDRAM
Not Included

DDR4 SDRAM
Included

DDR4 SDRAM
Included

Octa Flash memory
DDR4 SDRAM

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5. Appendix

The RZ SMARC Series Carrier Board is as follows. This picture is of the RTK97X4XXXB00000BE.

Figure 5.2

Top View of the RZ SMARC Series Carrier Board

Board Name

Type NameRZ SMARC Series Carrier Board

RTK97X4XXXB00000BE

The Evaluation board Kit is as follows. This board consists of the SMARC Module Board and the RZ SMARC Series
Carrier Board via a 314-pin 0.5-mm pitch connector. This picture is of the RTK9743U11S01000BE.

Figure 5.3

Top View of the Evaluation board Kit

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5. Appendix

The Evaluation board Kits are similarly designed to use a common board layout and to be pin-compatible.
MPU

Parallel to HDMI
Memory Configuration Conversion Board

Board Name

Type Name

Evaluation board Kit for RZ/G2ULMPU

RTK9743U11S01000BE RZ/G2ULQSPI flash memory(R9A07G043U11GBG) DDR4 SDRAM

Included

Evaluation board Kit for RZ/FiveMPU

RTK9743F01S01000BE

Not Included

Evaluation board Kit for RZ/A3ULMPU QSPI Edition

RTK9763U02S01000BE RZ/A3ULQSPI flash memory(R9A07G063U02GBG) DDR4 SDRAM

Included

Evaluation board Kit for RZ/A3ULMPU OCTAL Edition

RTK9763U02S01001BE RZ/A3UL
Octa RAM memory(R9A07G063U02GBG) Octa Flash memory

Included

RZ/FiveQSPI flash memory(R9A07G043F01GBG) DDR4 SDRAM

DDR4 SDRAM

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5.2

5. Appendix

How to Identify Each SMARC Module Board

The differences between each SMARC Module Board are as follows. This picture is of the RTK9743U11C01000BE.

Table 5.1

Comparison of the RTK9743U11C01000BE and the RTK9743F01C01000BE

Type Name

RTK9743U11C01000BE

RTK9743F01C01000BE

IC1

RZ/G2UL (R9A07G043U11GBG)

RZ/Five (R9A07G043F01GBG)

Table 5.1

Comparison of the RTK9743U11C01000BE and the RTK9763U02C01000BE

Type Name

RTK9743U11C01000BE

RTK9763U02C01000BE

IC1

RZ/G2UL (R9A07G043U11GBG)

RZ/A3UL (R9A07G063U02GBG)

Table 5.2

Comparison of the RTK9763U02C01000BE and the RTK9763U02C01001BE

Type Name

RTK9763U02C01000BE

RTK9763U02C01001BE

IC2

Not mounted

OctaFlash

IC3

Not mounted

OctaRAMIC9QSPI flash memory

Not mounted

Figure 5.4

Comparison of Each SMARC Module Board

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5.3

5. Appendix

How to replace the SMARC Module Board

Please be careful when replacing the board as follows.
1. Remove the four screws.
NOTE
The screw thread is a special shape, so be careful not to crush the screw thread.
Please recommend to prepare a torx screwdriver which is a “T6” head size.

Specially shaped screw threads

Figure 5.52.

How to remove the screws

Remove the screw and the SMARC Module Board will stand up at an angle. Slide it out.

Figure 5.6

How to remove the SMARC Module Board

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3.

5. Appendix

Insert the replacement the SMARC Module Board diagonally, then roll the board parallel to the RZ SMARC
Series Carrier Board and fix it with screws.

Figure 5.7

How to install the SMARC Module Board

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REVISION HISTORYREVISION HISTORYRZ Family / RZ/G, RZ/A Series
RZ/G2UL, RZ/A3UL, RZ/Five SMARC Module Board

REVISION HISTORY
Description
Rev.

Date

Page

1.00

Jun 27, 2022⎯

First edition issued

1.01

Jul 28, 2022

1.10

Dec 13, 2022

9, 15

The section title is changed from "RT9743U11C01000BE" to "RTK9743U11C01000BE"

10, 16The section title is changed from "RT9763U02C01000BE" to "RTK9763U02C01000BE"

11, 17The section title is changed from "RT9763U02C01001BE" to "RTK9763U02C01001BE"

12, 18The section title is changed from "RT9743F01C01000BE" to "RTK9743F01C01000BE"

34, 35, 42, 68,
69

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Summary

Rev.1.10

Restrictions on use are added.
When used in combination with the RZ SMARC Series Carrier Board (P/N:
RTR97X4XXXB00000BE), CAN0 and CAN1 interface cannot be used because a CAN
transceiver is not fitted on the RTK97X4XXXB00000BE.
For section "GreenPAK", the link of GreenPAK is added.

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Colophon

RZ/G2UL, RZ/A3UL, RZ/Five SMARC Module Board
User’s Manual: Hardware
Publication Date:

Rev.1.01
Rev.1.10

Jul 28, 2022
Dec 13, 2022

Published by:Renesas Electronics Corporation

Back CoverRZ Family / RZ/G, RZ/A Series

R01UH0990EJ0110