On ICI Canceller for Mobile OFDM DTVReceivers
Hai Minh TRAN*, Tomohisa WADA***Graduate School of Engineering and Science**Department of Information Engineering, University of the Ryukyus
haitran@lsi.ie.u-ryukyu.ac.jp, wada@lsi.ie.u-ryukyu.ac.jp

Abstract— In mobile environment, the performance of OFDM mobile receivers is degraded severely because ofInter-Carrier-Interference (ICI) caused by Doppler Spread. So ICI canceller is an important task for designers of mobile OFDM
receivers. [1] and [2] proposed an efficient method to reduce ICI. The main idea of this method is to linearly approximate time varying
channel within one OFDM symbol. Then a large ICI matrix equation is given. However, in [1] and [2], the estimated values of the channeltransfer function—the diagonal of the ICI matrix is corrupted by ICI. Consequently, the equalized signal still is distorted. In this paper,
we propose an iterative method to improve performance of the conventional method in [1] and [2]. We implement Jacobi iteration method
to solve the big ICI matrix equation. Thereby, we are able to implement ICI canceller by a simple FIR filter rather than finding theinverse of ICI matrix. Next, at second iteration of Jacobi method, we improve the accuracy the diagonal by removing ICI from pilotsymbols and re-estimating the channel transfer function. Simulation results for ISDB-T mode 3 demonstrated that our method could
double performance of the conventional method under TU-6 channel and Doppler Spread. The improvement is better for two paths andone path Doppler channel.

Keyword— Inter-Carrier Interference (ICI), Jacobi Iteration, Orthogonal frequency-division multiplexing (OFDM).

Hai Minh Tran was born in Hanam, Vietnam, on June 09, 1988. He received the B.S. degree from Hanoi University of Technology, Vietnam
in 2011.
He is currently a Master student in Graduate School of Engineering and Science, University of the Ryukyus. His research interests are channel
estimation with its application to digital television mobile receiver and LTE system

Tomohisa Wada received the BS degree in electronic engineering from Osaka Univ., Osaka, Japan, in 1983, M.S.E.E degree from
Stanford Univ., Stanford CA, in 1992, and Ph.D. in electronic engineering from Osaka Univ. in 1994.
He joined the ULSI Laboratory Mitsubishi Electric Corp., Itami, Japan, in 1983. From 1983 to 1999, he has been engaged in thedevelopment of CMOS/BiCMOS static RAMs, 3-D graphics controller ASIC, flash memory, low-voltage static RAM, and synchronousburst static RAMs. In 1998, he joined Mitsubishi Electric Corp., Semiconductor Group, Memory ICI Division, Itami, where he has beenworking on the development of application specific synchronous burst static RAMs. In 1999, he became an Associate Professor withthe Department of Information Engineering, Univ. of the Ryukyus, Okinawa, Japan. Since 2001, he has been a Professor at the Departmentof Information Engineering, Univ. Of the Ryukyus, Okinawa, Japan. In 2001, He was the founding member of Magna Design Net, Inc.,
which is a fab-less LSI design Company for communication related digital signal processing such as OFDM. Currently, he is also the chief
scientist of Magna Design Net, Inc. From 1999 up to now, he has been engaged in the research and development of high bandwidth communication systems suchas terrestrial video broadcasting receivers and wireless LAN. Currently, his research includes system-level large-scale VLSI design, digital signal processing forhigh-bandwidth communication, error correction algorithm and circuit, networking software and protocols.
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