IEICE TRANS. FUNDAMENTALS, VOL.E91–A, NO.9 SEPTEMBER 2008

2426

PAPER

Special Section on Nonlinear Theory and its Applications

Sensitivity Analysis and Optimization Algorithm —– Based on
Nonlinear Programming —–Masayoshi ODA†a) , Nonmember, Yoshihiro YAMAGAMI†b) , Junji KAWATA††c) , Yoshifumi NISHIO†d) , Members,
and Akio USHIDA††e) , Fellow

SUMMARY
We propose here a fully Spice-oriented design algorithmof op-amps for attaining the maximum gains under low power consumptions and assigned slew-rates. Our optimization algorithm is based on awell-known steepest descent method combining with nonlinear programming. The algorithm is realized by equivalent RC circuits with ABMs
(analog behavior models) of Spice. The gradient direction is decided by
the analysis of sensitivity circuits. The optimum parameters can be foundat the equilibrium point in the transient response of the RC circuit. Although the optimization time is much faster than the other design tools, theresults might be rough because of the simple transistor models. If muchbetter parameter values are required, they can be improved with Spice simulator and/or other tools.
key words: sensitivity analysis, steepest descent method, optimization algorithm, spice-oriented

1.

Introduction

Amplifiers are widely used as the building blocks of manyanalog circuits [1]–[4]. In this paper, we propose a fully
Spice-oriented parameter optimization algorithm for attaining the maximum gains of operational amplifiers. There
are many kinds of designing items such as the maximum
gain, low power consumption, slew-rate, phase margin,
GBW (gain band width) and so on. The circuits are usually designed by choosing the suitable resistors, bias voltages and/or sizes (lengths, widths) of MOSFETs as the optimization parameters. Traditionally, the parameters havebeen found by trial and error methods with Spice simulations and by designer’s experimental knowledge. However,
it is really time-consuming task for the circuits containing
a large number of parameters. Thus, there have been proposed some designing tools, recently. ASCO (A Spice Circuit Optimizer) [5] is based on the diﬀerential evolution algorithm, where it takes about 15 [hours] for designing a 3stage CMOS op-amp. On the other hand, FSCODE [6] isbased on both the diﬀerential evolution [7] and GA, where
Manuscript received November 26, 2007.
Manuscript revised March 12, 2008.
†
The authors are with the Department of Electrical and Electronic Engineering, Faculty of Engineering, Tokushima University,
Tokushima-shi, 770-8506 Japan.
††
The authors are with the Department of Mechanical and Electronic Engineering, Faculty of Engineering, Tokushima Bunri University, Sanuki-shi, 769-2193 Japan.
a) E-mail: oda@ee.tokushima-u.ac.jpb) E-mail: yamagami@ee.tokushima-u.ac.jpc) E-mail: kawata@fe.bunri-u.ac.jpd) E-mail: nishio@ee.tokushima-u.ac.jpe) E-mail: ushida@fe.bunri-u.ac.jp
DOI: 10.1093/ietfec/e91–a.9.2426

it takes 1,255 [secs] for designing a 2-stage CMOS op-amp.
Although their methods can precisely design the circuits satisfying many design items, they are still time-consuming,
especially for circuits having many optimization parameters. Because they use both the transient and AC analysis
of Spice to decide the optimization direction at each step ofthe evolution algorithms. Hence, we propose here a simple
fully Spice-oriented steepest descent optimization algorithm
combining with nonlinear programming [8], [9], which can
rapidly find out the rough solutions∗ . The rough solutions
are mainly due to the simple models of bipolar transistors
and MOSFETs such as Ebers-Moll and Shichman-Hodges
models neglecting the parasitic elements. Therefore, if wewant better solutions, they should be improved by the applications of Spice simulator and/or other tools with the accurate models.
Firstly, we define the objective function to be minimized as follow;
Φ(x, p), x ∈ Rn , p ∈ Rk ,

(1)

where
Φ: consists of the maximum gain, low power consumption,
slew-rate and so on.
x: circuit variables such as voltages and currents.
p: optimization parameters such as bias voltages, resistor’svalues and the dimensions of MOSFETs such as W’s [width,μm] and L’s [length, μm], and so on.
The gradient direction for attaining the maximum gain
is given bydS v (p)dpi=−, i = 1, 2, . . . , k,
ds
dpi

(2a)

where S v (p) has minus sign to the gain estimated by the sensitivity circuit, and pi is an optimization parameter. Unfortunately, it is impossible to evaluate dSdvp(p)from the sensitivity
icircuit. Therefore, we introduce here a numerical diﬀerentiation technique as follows;
S v,i (p + Δp) − S v (p)dpi=−, i = 1, 2, . . . , k,ds
Δpi
Δp = (0, 0, . . . , Δpi , . . . , 0)T(2b)with a suﬃciently small variational parameters Δp. The∗
For comparisons between Ref. [9] and our method, see Appendix A.

c 2008 The Institute of Electronics, Information and Communication Engineers
Copyright ODA et al.: SENSITIVITY ANALYSIS AND OPTIMIZATION ALGORITHM —– BASED ON NONLINEAR PROGRAMMING —–2427

relation (2b) means that “s” is an auxiliary variable, suchthat pi component of the gradient vector to −S v (p) is equal
to dpi /ds. Replacing the auxiliary variable “s = kt” withtime “t” in (2b), our steepest descent algorithm can be realized by the equivalent nonlinear RC circuits using ABMsof Spice [12]† . The circuits are driven by the controlledcurrent sources obtained from the sensitivity circuits. The
optimum parameters can be found at the equilibrium pointof the transient analysis. Moreover, for attaining both theconditions of low power consumption and assigned slewrate, we need to modify the algorithm (2b) as shown in
Sect. 2.2. The sensitivity modules of MOSFETs and bipolartransistors are given in Sect. 3. Our algorithm can be only
depend on the analysis of DC sensitivity circuits. Therefore, the capacitive elements must be replaced by equivalent
resistive elements as shown in Sect. 4. We show two illustrative examples in Sect. 5. First example is a two-stage CMOS
amplifier for attaining maximum gain under low power consumption, where the size (widths and lengths) of MOSs anda reference current are chosen as optimization parameters.
Second is the design of an operational amplifier for attaining the DC maximum gain, where the resistors are chosen
as the optimization parameters. The solutions of two examples are found quickly, which are equal to the solutions fromtransient analysis.
2.

Sensitivity Analysis and Spice-Oriented Optimization Algorithm

The steepest descent method is the most basic optimization
approach [8], [11], where the gradient direction is decided
by the solutions of sensitivity circuit. Let us derive the sensitivity circuit via tableau approach [10]. The tableau equation is given by;
⎤ ⎡
⎤⎡
⎡
⎤ ⎡ ⎤
0 ⎥⎥ ⎢⎢ i ⎥⎥ ⎢⎢ g(v, i) ⎥⎥ ⎢⎢ 0 ⎥⎥⎢⎢⎢ Ki Kv
⎥
⎢
⎢
⎥ ⎢ ⎥
⎥
⎥
⎢⎢⎢ 0
⎢
⎢
T ⎥
1 −A ⎥⎥⎥ ⎢⎢⎢ v ⎥⎥⎥ − ⎢⎢⎢ E ⎥⎥⎥⎥ = ⎢⎢⎢⎢ 0 ⎥⎥⎥⎥ . (3)
⎢⎣
⎦ ⎣
⎦⎣
⎦ ⎣ ⎦
A 0
0
AJ
vn
0
The first row corresponds to the Ohm’s law, where matrices
Ki , Kv consist of 1 and/or 0 elements, the second and thirdrows are respectively Kirchhoﬀ’s voltage and current laws,
where A is an incidence matrix. E and J show the voltage
and current source vectors. Now, let us define the sensitivity
as follow;
Sensitivity of xk to a parameter pi :Δxk

Δpi →0 Δpi.

⎡ ∂g(v, i) ⎤ ⎡ ∂g(v, i) 
⎤


⎢⎢⎢
⎥⎥⎥ ⎢⎢⎢
⎥⎥⎥
δ(i)
S
⎢⎢⎢
⎥⎥⎥

v ,i i,pi ⎥⎥⎥ ⎢⎢⎢
∂p
∂i
v
,i
⎥⎥⎥ = ⎢⎢⎢⎥⎥⎥ , (5)0 0
0 0− ⎢⎢⎢⎢
⎥
⎥⎥⎥
⎢
δ(i)
0
⎢⎢⎣
⎥⎥⎦ ⎢⎢⎣⎦Aδ(i)0where δ(i) means a delta function satisfying
δ(i) =

2.1 Sensitivity Analysis

S k,i ≡ lim

Fig. 1 Sensitivity resistors, where δ(pi ) denotes that, if the resistor ischosen as an optimization parameter, δ(pi ) = 1. Otherwise, δ(pi ) = 0.

(4)

Diﬀerentiating (3) by an optimization parameter pi , we canderive the sensitivity tableau equation as follows;⎤⎡ ∂g(v, i) 
⎤
⎡
⎤⎡

⎥⎥⎥
S
0 ⎥⎥ ⎢⎢ Si,pi ⎥⎥ ⎢⎢⎢⎢⎢⎢⎢⎢ Ki Kv
v,p
i ⎥
v ,i
⎥⎥⎥
⎥⎥⎥ ⎢⎢
⎢⎢⎢
∂v
⎥
T ⎥
0
0
⎢⎢⎢⎢ 0⎥⎥⎥⎥1 −A ⎥⎥ ⎢⎢ Sv,pi ⎥⎥ − ⎢⎢⎢
⎦ ⎢⎢
⎣
⎦⎣
0
⎥⎥⎦
⎣
A 0
0
Svn ,pi0

1 2[0, 0,... i ... k,. . . , 1 . . . , 0]T(6)

where Si,pi means the sensitivity of i for pi and so on. Thus,
we can develop the sensitivity circuit for pi parameter as the
netlist or schematic diagram. Observe that the structure ofsensitivity circuit is equal to the original circuit except thatthe nonlinear elements are replaced by the linear incremental resistors at the operating points {v0 , i0 } and the modified
sources.
Now, we summarize the algorithm for deriving the sensitivity circuit.
1. When a voltage source is chosen as an optimization parameter, the source is set to “1 [V].” The other voltage
sources are removed by the shorted-circuits.
2. When a current source is chosen as an optimization parameter, the source is set to “1 [A].” The other current
sources are removed by the opened-circuits.
3. When resistor is chosen as an optimum parameter, it isreplaced by the linear incremental
resistor coupled with


δ(i).
Other resistors area controlled source ∂g(v,i)∂p
v0 ,i0

only replaced by the incremental resistors. These transformation algorithms to resistors are shown in Fig. 1.
Example 1: Now, consider a simple example of nonlinear
circuit shown in Fig. 2(a), where the nonlinear resistor isgiven by†When we choose a larger “k,” the convergence ratio will become larger.

IEICE TRANS. FUNDAMENTALS, VOL.E91–A, NO.9 SEPTEMBER 2008

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Fig. 2 (a) Simple nonlinear resistive circuit, (b) the sensitivity circuit to
optimization parameter E.

Fig. 4

Schematic diagrams of trajectory.

as follows;

Fig. 3 (a) Simple nonlinear resistive circuit, (b) the sensitivity circuit forthe optimization parameter c3 .

i = c1 v + c3 v3 .

K2 =
(7)

Let us calculate the sensitivity S v,E = dv/dE. The sensitivity circuit as shown in Fig. 2(b) can be obtained by theabove transformation shown in Fig. 1. The source voltage
is replaced by a unit voltage, and the nonlinear resistor is
replaced by an incremental conductanceG(v0 ) = c1 + 3c3 v20(8)

at the operating voltage v0 in Fig. 2(a).
The sensitivity is given by
S v,E =

1
1/G(v0 )=.
R1 + 1/G(v0 ) 1 + R1G(v0 )dpi= K1 (pwas − pw(p + Δp)) + K2 (slwas − slw(p + Δp))ds
S v,i (p + Δp) − S v (p)
−
.
(11)
Δpi
0 : pwas > pw
K1 =A1 : pwas ≤ pw for suﬃciently large A1(9)This relation is equal to the result obtained by the diﬀerentiation dv/dE from Fig. 2(a).
Example 2: Now, consider the same circuit as Fig. 2(a), but
c3 in (7) is chosen as an optimization parameter. In thiscase, the nonlinear resistor in Fig. 3(a) is transformed into
the sensitivity element according to the third row in Fig. 1,
and we have Fig. 3(b). Thus, the sensitivity S v,c3 = dv/dc3
is given by

v30
dv 

S v,c3 ==−.
(10)
dc3 v=v0
G(v0 ) + R11
Remark that the voltage source E is removed by the shortedcircuit.
2.2 Spice-Oriented Optimization TechniqueNow, consider our optimization algorithm for attaining the
maximum gain under low power consumption and assigned
slew-rate. In this case, the steepest descent algorithm for attaining the maximum gain given by (2b) should be modified

0 : slwas > slw
A2 : slwas ≤ slw for suﬃciently large A2

Δp = (0, 0, . . . , Δpi , . . . , 0)T † ,where symbols pwas denotes an assigned low power consumption, and slwas an assigned large slew-rate. The firstand second terms in the right hand side are added to (2b).
The terms restrict the low power consumption to pwas andassigned slew-rate to slwas . The variational power and slewrate are given by pw(p + Δp), and slw(p + Δp), respectively.
The trajectory in this algorithm moves along the steepest
descent direction until the curve has reached to the hyperplane satisfying pw = pwas and/or slw = slwas . After then,it moves on the plane because the variables −pw(p + Δp)
and −slw(p + Δp) in (11) are multiplied by suﬃciently large
constants A1 , and A2 . Thus, the trajectory still moves to the
optimum point on the hyper-plane.
These schematic diagrams are shown in Figs. 4(a) and(b). Thus, we can find out the optimum point satisfying the
maximum gain under the given low power consumption andassigned slew-rate, where the slew-rate is defined [1] bydvout .
slew-rate = Max 
(12)
dt 
The slew-rate usually corresponds to the derivative of vout
at t = 0, which is given by the functions of Ik /Ck , k =1, 2, . . . , n for the capacitors†† . Replacing the variable “s”
by time “t” in (11), the algorithm is realized by RC circuit asshown in Fig. 5. where C = 1, and R0 is a suﬃciently large
dummy resistor to avoid the C-J cut-set. The controlled†
Δpi should be a small number. In our examples, we havechosen around 0.1% of pi . If it becomes larger, the steepest descentdirection may be erroneous.
††Assume that a capacitor C p gives the large eﬀect to slew-rate(12). Then, the second term in (11) is approximately replaced by
K2 (slwas − I p (p+Δp/C p ), for an assigned slew-rate slwas . If it does
not satisfy the assigned slew-rate, we need to replace the capacitor
to the other.

ODA et al.: SENSITIVITY ANALYSIS AND OPTIMIZATION ALGORITHM —– BASED ON NONLINEAR PROGRAMMING —–2429

current sources at the left hand side in Fig. 5 are obtained
from the sensitivity and the variational circuits with pi +Δpi .
Thus, the optimization parameters satisfying the above conditions can be found at the equilibrium point of the transient
analysis of (11) using Spice. Note that although C’s in Fig. 5
are set equal to “1” because of (11), the convergence ratio
will be largely increased by choosing the smaller values.
Our steepest descent algorithm based on nonlinear programming is shown by the flowchart of Fig. 6.
Algorithm
1. Firstly, set the upper and lower boundaries of optimization parameters pi , i = 1, 2, . . . , k. The lower boundary of power consumption pwas and higher boundaryof slew-rate slwas should be also set.
2. The frequency is set at the highest value in the GBW.
The capacitive elements are replaced by the equivalent

resistors whose the transformation technique is givenin the Sect. 4.
3. Formulate “k+1” sensitivity circuits corresponding to(11)† . Choose suﬃciently large constants A1 and A2 .
4. Set the initial parameter values of pi0 , i = 1, 2, . . . , kwithin the boundaries.
5. Execute the transient analysis of Spice with K1 = K2 =0. After arriving at one of the hyper-planes shown in
Fig. 4(a) or (b), K1 or K2 is set to a suﬃciently large
constant A1 or A2 .
6. The equilibrium point gives the optimization parameters satisfying the power consumption and slew-rate.
7. The phase margin is calculated by AC analysis of
Spice. If the above optimization parameters do not satisfy the phase margin, we need to change the boundaries pi , i = 1, 2, . . . , k, and go to 4. Otherwise stop.
3.

Fig. 5 A circuit configuration for attaining the maximum gain under low
power consumption and the slew-rate.

Sensitivity Modules of MOSFETs and Bipolar Transistors

Now, let us develop the sensitivity modules of MOSFETs
and bipolar transistors. Once these modules are stored inour computer library as the packages, we can easily formulate the sensitivity circuits as the netlist and/or schematic
diagram†† .
3.1 Sensitivity Modules of MOSFETs
We consider here a simple Shichman-Hodges model [1]–[4]of nMOS shown in Fig. 7(a);1. Linear region (vGS > vT , 0 < vDS < vGS − vT )
iD =

kn W
vDS
(vGS −vT )−vDS (1+λn vDS )
L
2

(13a)

2. Saturation region (vGS > vT , vDS ≥ vGS − vT )iD =Fig. 7†

Fig. 6 Flowchart of our steepest descent algorithm based on the
nonlinear programming.

kn W(vGS − vT )2 (1 + λn vDS )
2L

(13b)

(a) nMOS, (b) nMOS sensitivity module.

Since our algorithm uses numerical diﬀerentiation to “k” variables, we need “k+1” sensitivity circuits to estimate the current
sources in Fig. 5.
††
See Appendix B.

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Where the threshold voltage is given byvT = vT 0 + γ

φ − vBS −


φ ,

(13c)

and “W” and “L” are the width and length of nMOS. For
simplicity, we rewrite (13) in the following form;
iD = îD (vGS , vDS , vBS , W, L)(14)

Then, we have the following variational equation;
∂îD
∂îD
∂îD
ΔvGS +ΔvDS +
ΔvBS
∂vGS
∂vDS
∂vBS
∂îD
∂îD
ΔW +
ΔL.
(15)
+
∂W
∂L
Therefore, the sensitivity of drain current iD is given for each
optimization parameter pi
ΔiD =

∂îD
∂îD
∂îD
S v pi,GS +S v pi,DS +
Sv
∂vGS
∂vDS
∂vBS pi,BS
∂îD
∂îD
δ(pi , W) +δ(pi , L),+∂W∂L
where δ means
S iD ,pi =δ(x1 , x2 ) =10

Fig. 8 (a) NPN bipolar transistor, (b) Ebers-Moll model, (c) sensitivity
module of transistor.

Thus, the sensitivity module of NPN bipolar transistor modeled by Ebers-Moll model† is given by Fig. 8(c)†† , where
Gd1 =

∂id1
∂id2
, Gd2 =
,
∂vBE
∂vBC

and the sensitivity currents S id1 , S id2 are set by(16)

S id1 =

∂id1
∂id2
, S id2 =
.
∂vBE
∂vBE

In the same manner, we can develop PNP bipolar sensitivity
module.

for x1 = x2
for x1  x2

Thus, we have MOSFET module shown in Fig. 7(b), where

4.

∂îD
∂îD
∂îD
, G DS =, G BS =
∂vGS
∂vDS
∂vBS
∂îD
∂îD
δ(pi , W) +δ(pi , L).
S in =∂W∂L
where, for simplicity, we set the sensitivity voltages as follows;

Our Spice-oriented steepest descent method can be executed using the circuit shown in Fig. 5, where the controlledcurrent sources in the left hand side are decided by the sensitivity circuits. The circuits consist of all the resistive elements, that means our optimization method does not permit
to contain any dynamical elements such as capacitors andinductors. On the other hand, many kinds of amplifiers [4]have some capacitors, so that we need to transform them into
the approximate equivalent resistive elements as follows;


1
1 
 =
.
(19)
ZC = 
jωC
ωC

GGS =

S VGS = S v pi ,GS , S V DS = S v pi ,DS , S V BS = S v pi ,BS .
The sensitivity module of pMOS is obtained in thesame manner as nMOS. These modules can be easily developed with ABM of Spice [12].

Note that it is a function of frequency ω.

3.2 Sensitivity Modules of Bipolar Transistors
Bipolar transistors are usually modeled with Ebers-Mollmodel or Gummel-Poon model [1]–[4]. The collector current iC and base current iB are functions of vBE and vBC as
follows;
iC = îC (vBE , vBC ).
iB = îB (vBE , vBC )(17)

Therefore, the sensitivities for optimization parameters pi
are given by∂îC ∂vBE∂îC ∂vBC+∂vBE ∂pi∂vBC ∂pi≡ GiC ,vBE S v pi,BE + GiC ,vBC S v pi,BCResistive Models of Capacitors

Example 3: Consider a simple circuit containing a series
and a parallel RC circuits as shown in Fig. 9(a), where C1
and C2 correspond to the coupling and bypass capacitors in
the case of amplifiers. The frequency response curves using
the resistive models are almost exact in the mid-frequency
region except for lower and higher cut-oﬀ frequency regions. Though the model (19) might aﬀect the accuracy of
our optimization technique, we have to use the model since
the steepest decent circuit of Fig. 5 is simulated by DC analysis of Spice.

S iC ,pi =∂îB ∂vBE∂îB ∂vBC
S iB ,pi =+∂vBE ∂pi∂vBC ∂pi≡ GiB ,vBE S v pi,BE + GiB ,vBC S v pi,BC

.

(18)

†

Ebers-Moll model is given by Eq. (22) in Sect. 5.
Remark that, if the optimization parameters are diﬀerent fromthe transistor parameters, the sensitivity module corresponds to thelinear incremental model as shown in Fig. 8(c).
††ODA et al.: SENSITIVITY ANALYSIS AND OPTIMIZATION ALGORITHM —– BASED ON NONLINEAR PROGRAMMING —–2431

Fig. 9 (a) A simple RC circuit. (b) Frequency response curves. R1 =R2 = 10 [kΩ], C1 = 1 [μF], C2 = 10 [pF].

5.

Illustrative Examples

5.1 CMOS Two-Stage Amplifier
Consider a two-stage CMOS amplifier as shown in
Fig. 10(a). Let us design the circuit for attaining the maximum gain under low power consumption and a larger slewrate. We have modeled the MOSFETs using SchichmanHodges models and their sensitivity modules, where the circuit parameters are given as follows [4]:K p = 19.344 [μA], pVT 0 = −0.8311 [V], λ p = 0.1
pW9 = 10 [μm],pW8 = 50 [μm],pW1 = 50 [μm],Kn = 74.209 [μA] nVT 0 = 0.6081 [V], λn = 0.2
nW3 = 1 [μm]nW6 = 3 [μm],pL = nL = 0.1 [μm] J = 90 [μA]
Note that for these parameter values, the gain was −1.956 in
Ref. [4].
Next, we design the circuit under the objective function;
φ = {Max|gain| : Iin < I s , I p > I psl }(20)

The initial conditions are set as follows;
pW90 = 2 [μm], pW80 = pW10 = nW0 = 5 [μm]nW30 = 10 [μm], J0 = 5 [μA]
and C = 0.01 [F], R0 = 1000 [kΩ] of the steepest descentmethod in Fig. 5, where we have restricted the regions of 6
optimization parameters as follows;
0.5 [μm] < pW9, pW8, pW1, nW3, nW6 < 60 [μm].
10 [μA] < Iin < 200 [μA]
Then, we have obtained the results shown in Table 1. Where

Fig. 10 (a) Two stage CMOS amplifier. (b) Optimization of two-stage
CMOS amplifier. VDD = 2.5 [V], VS S = −2.5 [V], Frequency =100 [MHz],C0 = 0.1 [nF], C L = 1 [nF], RL = 1000 [kΩ].

No

A1

1

104
105
106
106
106
106

2

3

Table 1 Simulation results.
IS
Iin
J
GainD
(μA)
(μA)
(μA)
100.1
50.3
−57.6
50
54.6
26.7
−54.1
50
50.1
24.5
−56.8
50
49.6
25.0
−57.7
40
39.7
19.4
−55.8
30
29.8
14.5
−52.7
20
20.0
9.4
−45.6

GainT
−57.4
−54.0
−56.5
−57.4
−55.3
−51.9
−43.9

pW8
(μm)
60
7.2
24.2
60.0
60.0
60.0
26.7

A1 is a suﬃciently large constant given in (11), and the computational time was around 225–230 [sec]† . In this case, thepower consumption is given bypwas = IS (VDD − VS S )100 [μW],(21)

where IS is current from the source VDD . In the table, Iin ,GainD are the input current and gain obtained by our optimization. We can see that Iin is nearly equal to IS . GainT is
the gain obtained by the transient analysis of Spice, where
the parameters are set to those from our optimization.
We found interesting results as follows;†
The slew-rates were always larger than 1.5 [V/μsec] [6], sothat we did not choose them in the objective function. All the
results in this paper were simulated by a PC with the following
spec; CPU: PentiumM 733 (1.10 GHz), Main memory: 256 MB,
OS: Windows XP professional SP2.

IEICE TRANS. FUNDAMENTALS, VOL.E91–A, NO.9 SEPTEMBER 20082432

1. No.1 is the result from our optimization for attaining
the maximum gain without the restrictions for power
consumption and slew-rate. We have obtained the following MOS sizes;
pW8 = pW1 = nW3 = 60 [μm],pW9 = nW6 = 0.5 [μm],where we have fixed pL = nL = 0.1 [μm] for all the
MOSFETs. The input current was Iin = 100 [μA], andthe maximum gain was −59.6.
2. No.2 is the results for attaining the maximum gain under the low power consumption (IS = 50 [μA]) without
the load coupled by capacitor (C L , RL ), where we set
A1 from 104 to 106 in (11). For A1 = 104 , we had
pW8 = 7.21 [μm] and Iin = 54.6 [μA] which is diﬀerent from the assigned current IS = 50 [μA]. From theseresults, we can conclude that the constant A1 should bechosen larger than 105 .
3. No.3 is the results for the diﬀerent assigned currents
IS = 40 [μA], 30 [μA], 20 [μA]. Note that the op-amp
did not work under IS = 10 [μA]. In these optimizations, the capacitor C0 is set to


1 

 = 15.9 [Ω].
Z0 = 
jωC0 
4. We found the slew-rate becomes smaller according to
the input current. However, we had enough slew-rates
larger than 4.2 [V/μsec] [6] in all the cases.
The transient behavior of our steepest descent method
is shown in Fig. 10(b), the optimum values are obtainedby the equilibrium point.
5. Note that all the optimization parameter values are obtained on the boundaries because of the nonlinear programming.
5.2 Bipolar Operational Amplifier
Next, consider an operational amplifier [4] shown in
Fig. 11(a). We apply our optimization algorithm to design
the circuit for attaining the maximum gain, where R1 − R5 in
Fig. 11(a) are chosen as the optimization parameters.
Note that, for parameters given in Ref. [4]:R1 = 10 [kΩ], R2 = 3 [kΩ], R1 = 2.3 [kΩ], R4 = 28 [kΩ],R5 = 15.7 [kΩ], R6 = 3 [kΩ],
the gain was 7, 765, where the transistors are modeled by
Ebers-Moll model





vBE
vBC
iC = I s αF exp
− exp
,
(22a)
VT
VT





vBC
vBE
− αR exp,(22b)
iE = I s exp
VTVT
where I s = 10−12 [A], VT = 0.026, αF = 0.99, αR = 0.3.
Firstly, we have set the optimization parameter regions
as follows;

Fig. 11 (a) Bipolar operational amplifier. (b) Optimization result of
operational amplifier.

10 [kΩ] < R1 < 55 [kΩ], 1 [kΩ] < R2 < 6 [kΩ],
0.5 [kΩ] < R3 < 5 [kΩ], 40 [kΩ] < R4 < 60 [kΩ],
10 [kΩ] < R5 < 50 [kΩ], R6 = 3 [kΩ]
and applied our optimization algorithm. The optimization result from our steepest descent method is shown in
Fig. 11(b). The parameter values are
R1 = 55 [kΩ], R2 = 1.0 [kΩ], R1 = 0.5 [kΩ], R4 = 40 [kΩ],R5 = 50 [kΩ], R6 = 3 [kΩ],
and the maximum gain is equal to 30, 514. The computational time was 36.95 [sec].
Thus, our steepest descent method based nonlinear programming can quickly find out the optimum parameters.
6.

Conclusions and Remarks

In this paper, we have proposed a fully Spice-oriented design algorithm of amplifies for attaining the maximum gain,
low power consumption and assigned slew-rate. The algorithm is based on the steepest descent method which is realized by the nonlinear RC circuits using ABMs of Spice.
We found that our optimization method can find out the solutions much faster than optimizers ASCO (A SPICE Circuit Optimizer) [5] and FSCODE [6]. However, our results might be rough solutions because we are using simple
Schichman-Hodges models of MOSFETs, and Ebers-Moll

ODA et al.: SENSITIVITY ANALYSIS AND OPTIMIZATION ALGORITHM —– BASED ON NONLINEAR PROGRAMMING —–2433

models of bipolar transistors. If we want more accurate solutions, we need to improve the results by the applicationsof Spice simulator and the other tools.
Design algorithms considering the other items such as
nonlinear distortion, and pulse waveforms are future problems.

direction. It is realized by the combinations of original andthe sensitivity circuits. Thus, our method is a fully Spiceoriented algorithm compared to Ref. [9]. For example 1,
they correspond to Figs. 2(a) and (b). Since the incremental conductance (8) is decided by the voltage “v0 ” from theoriginal circuit, their circuits are coupled by an element with
ABM of Spice† , as shown in Fig. A· 1.

References[1] G. Roubik, Introduction to CMOS OP-AMPs and Comparators,
Wiley-Interscience Pub., 1999.
[2] F. Maloberti, Analog Design for CMOS VLSI Systems, KLuwer
Academic Pub., 2001.
[3] S.M. Kang and Y. Leblebici, CMOS Digital Integrated Circuits:
Analysis and Design, McGraw-Hill, 1996.
[4] A.S. Sedra and K.C. Smith, Microelectronic Circuits, Oxford Univ.
Press, 2004.
[5] http://asco.sourceforge.net/[6] FSCODE: A practical methodology for parameters design an optimization, private communication (unpublished).
[7] P. Whittle, Networks: Optimisation and Evolution, Cambridge Univ.
Press, 2007.
[8] J.A. Snyman, Practical Mathematical Optimization: An Introduction to Basic Optimization Theory and Classical and New GradientBased Algorithm, Springer, 2005.
[9] J. Guo, T. Nishi, and N. Takahashi, “A method for solving optimization problems with equality constraints by using Spice program,”
IEICE Trans. Fundamentals, vol.E86-A, no.9, pp.2325–2332, Sept.
2003.
[10] L.O. Chua and P.-M. Lin, Computer-Aided Analysis of Electronic
Circuits: Algorithms and Computational Techniques, Prentice-Hall,
1975.
[11] J. Vlach and K. Singhal, Computer Methods for Circuit Analysis
and Design, Van Nostrand Reinhold Co., 1983.
[12] MicroSim: PSpice A/D circuit Analysis User’s Guides, MicroSimCo., 1995.
[13] J.A. Connelly and P. Choi, Macromodeling with Spice, Prentice
Hall, 1992.

Appendix B: Fully Spice-Oriented Algorithm
In Sect. 3, we have developed the sensitivity devices of
MOSFET and bipolar transistor shown in Figs. 7(b) and
8(c). Their incremental elements are estimated at the operating points of the original circuit. Therefore, it is convenient
to combine them as shown in Fig. A· 2. The left hand sides
correspond the original devices and the right hand sides tothe sensitivities, and they are coupled in each others. Using these modules, we can formulate the circuit diagram
and the sensitivity circuit in the schematic form with Spice.
Thus, the optimization parameter values pi , i = 1, 2, . . . , k
are obtained by the voltages as shown in Fig. 5. We needto transform them into other parameters corresponding toresistances, widths of MOSs and so on. It can be also donewith ABMs of Spice [13]. An example of the transformationof resistance is shown in Fig. A· 3, where pi is given by voltage. Using the voltage pi and current IRi , the input-output
relation is given by
VRi = pi IRi .

(A· 3)

Where pi in the relation (A· 3) corresponds to the resistance.
In this way, we can realize the fully Spice-oriented algorithm for designing optimum circuits.

Appendix A: Comparisons between Ref. [9] and Our
MethodReference [9] proposes a new optimization technique using Spice simulator, where the objective function f (x) is
minimized under subject to the equality conditions gk (x) =0, (k = 1, 2, . . . , m). Then, they apply the Lagrange method
as follows;f¯(x) = f (x) +m

λk gk (x).

Fig. A· 1

Coupling of the original and the sensitivity circuits.

Fig. A· 2

MOSFET and bipolar transistor sensitivity modules.

(A· 1)

k=1

The minimization is attained by solving
Cj

dx j∂ f¯(x)
=−
,
dt
∂x j

(A· 2)

where the right hand term is described in the functional
form. Then, the equivalent circuit corresponding to (A· 2)
is constructed by Spice in the schematic diagram, and the
optimum point is found by the equilibrium point.
On the other hand, our optimization method uses thesensitivity circuits for the calculating the steepest descent†
ABMs have many kind of built-in functions such as Fortran language, and controlled sources VCCS, VCVS, CCCS andCCVS.

IEICE TRANS. FUNDAMENTALS, VOL.E91–A, NO.9 SEPTEMBER 2008

2434

Fig. A· 3

Resistance transformation circuit.

Masayoshi Oda
received the B.E. and the
M.E. degrees from Electorical and Electronic
Engineering from Tokushima University, Tokushima Japan, in 2005 and 2007. His research interests include the computer-aided design technology.

Yoshihiro Yamagami
graduated from the
Department of Electrical Engineering, Anan
Technical College, Tokushima, Japan, in 1982.
He joined the Department of Electrical andElectronic Engineering at Tokushima University, Tokushima, Japan, in 1984. He received
Ph.D. degree in Electrical and Electronic Engineering from Tokushima University, Tokushima, Japan, in 2006. His research interests include computer-aided simulations of nonlinear
circuits and high-speed interconnect circuits.

Junji Kawata
received the B.E., M.E.,
and Ph.D. degrees from Tokushima University,
Tokushima, Japan, in 1990, 1992 and 2001, respectively. Since 1992, he has been with the
Department of Mechanical and Electronic Engineering at Tokushima Bunri University, where
he is currently a Lecturer. His research interests
are in circuit simulation and chaotic communication. Dr. Kawata is a member of the IEEE.

Yoshifumi Nishio
received B.E., M.E.,
and Ph.D. degrees in electrical engineering from
Keio University, Yokohama Japan, in 1988,
1990, and 1993, respectively. In 1993, he joined
the Department of Electrical and Electronic Engineering at Tokushima University, Tokushima
Japan, where he is currently an Associate Professor. From May 2000 he spent a year in the
Laboratory of Nonlinear Systems (LANOS) at
the Swiss Federal Institute of Technology Lausanne (EPFL) as a Visiting Professor. His research interests include analysis and application of chaos in electrical circuits, analysis of synchronization in coupled oscillatory circuits, development of analyzing methods for nonlinear circuits, theory and applicationof cellular neural networks, and neural network architecture. He was the
Chair of the IEEE CAS Society Technical Committee on Nonlinear Circuits
and Systems (NCAS) during 2004–2005, the Steering Committee Secretaryof the IEICE Research Society of Nonlinear Theory and its Applications(NOLTA) during 2004–2007, and is currently the Secretary/Treasurer of
the IEEE CAS Society Shikoku Chapter. He was an Associate Editor of
the IEEE Transactions on Circuits and Systems–I: Regular Papers during
2004–2005, and is currently serving as an Associate Editor for the IEEE
CAS Magazine, the IEEE CAS Society Newsletter, and the RISP Journalof Signal Processing. He is also the Editor of the IEICE Fundamentals
Review and is a member of the Editorial Board of International Journal of
Circuit Theory and Applications. He is a senior member of the IEEE, anda member of the RISP.

Akio Ushidareceived the B.E. and M.E. degrees in Electrical Engineering from Tokushima
University in 1961 and 1966, respectively, andthe Dr. degree in Electrical Engineering from
University of Osaka Prefecture in 1974. He
was an Associate Professor from 1973 to 1980
at Tokushima University. From 1980 to 2003,
he was a Professor in the Department of Electrical and Electronic Engineering at Tokushima
university. Since 2003, he has been with the
Department of Mechanical and Electronic Engineering, Tokushima Bunri University. From 1974 to 1975 he spent one
year as a visiting scholar at the Department of Electrical Engineering andComputer Sciences at the University, Berkeley. His current research interests include numerical methods and computer-aided analysis of nonlinear
circuits. Dr. Ushida is a member of the IEEE.