IEICE TRANS. FUNDAMENTALS, VOL.E91–A, NO.12 DECEMBER 2008

3757

PAPER

Fast Simulation Technique of Plane Circuits via Two-Layer
CNN-Based Modeling
Yuichi TANJI†a) , Hideki ASAI†† , Members, Masayoshi ODA††† , Nonmember, Yoshifumi NISHIO††† ,and Akio USHIDA†††† , Members

SUMMARY
A fast time-domain simulation technique of plane circuits
via two-layer Cellular Neural Network (CNN) -based modeling, which isnecessary for power/signal integrity evaluation in VLSIs, printed circuitboards, and packages, is presented. Using the new notation expressed by
the two-layer CNN, 1,553 times faster simulation is achieved, comparedwith Berkeley SPICE (ngspice). In CNN community, CNNs are generally
simulated by explicit numerical integration such as the forward Euler andRunge-Kutta methods. However, since the two-layer CNN is a stiﬀ circuit,we cannot analyze it by using an explicit numerical integration method.
Hence, to analyze the two-layer CNN and reduce the computational cost,the leapfrog method is introduced. This procedure would open an application of CNN to electronic design automation area.
key words: cellular neural networks, plane circuits, signal/power integrity,
leapfrog method

1.

Introduction

VLSI implementations, potential applications for image
processing, and nonlinear wave phenomena of Cellular Neural Networks (CNNs) have attracted many interests in thelast two decades. As one of the studies, the nonlinear
wave phenomena have been analyzed via CNNs [1], [2],[8], where the partial diﬀerential equations are expressed
into CNNs, and the nonlinear phenomena are eﬃciently analyzed by the CNN universal machine [6]. On an engineering
application, the ability of solving partial diﬀerential equations quickly is profitable and there may be various applications.
In this paper, we analyze the plane circuits using a
CNN for power/signal integrity evaluation in VLSIs, packages, and printed circuit boards in the high-speed electronicsystems [3], [4]. The high-speed electronic systems suﬀer
from the inductance eﬀects. We introduce the two-layer
CNN [5] to model the inductance eﬀects using the coupling
templates.
Manuscript received December 10, 2007.
Manuscript revised April 27, 2008.
†
The author is with the Department of Reliability-based Information Systems Engineering, Kagawa University, Takamatsu-shi,
761-0396 Japan.
††
The author is with the Department of Systems Engineering,
Shizuoka University, Hamamatsu-shi, 432-8561 Japan.
†††
The authors are with the Department of Electrical and Electronic Engineering, Tokushima University, Tokushima-shi, 7708506 Japan.
††††
The author is with the Department of Mechanical and Electronic Engineering, Tokushima Bunri University, Sanuki-shi, 7692193 Japan.
a) E-mail: tanji@eng.kagawa-u.ac.jp
DOI: 10.1093/ietfec/e91–a.12.3757

The CNN universal machine simulates CNNs using theforward Euler method. However, the linear RLC models
of VLSIs, packages, and printed circuit boards are stiﬀ circuits, which prohibit use of explicit numerical integrationsuch as forward Euler method for transient simulation. Alternatively, implicit numerical integration such as backward
Euler, backward diﬀerence, and Gear methods [7], which
are used in SPICE-like simulators, are applicable, but thesemethods are computationally ineﬃcient since they need tosolve a set of linear equations. To reduce the computationalcosts, we introduce the leapfrog method [9], [11], where thestate vectors in the first and second layers of the CNN are decoupled and updated alternately in the same manner as theforward Euler method. This method is a variety of FDTD
methods [10] which are known as a Maxwell’s solver. In an
illustrative example, it is shown that the proposed procedure
via the two-layer CNN-based modeling is 1,553 times fasterthan Berkeley SPICE (ngspice). This means that we can expect further speed up if these computations are carried out
on a hardware accelerator as the CNN universal machine.
2.

Two-Layer CNN-Based Modeling of Plane Circuits

In signal/power integrity evaluation in VLSIs, packages,
and printed circuit boards of high-speed electronic systems,
analysis of a plane circuit is required. The physical phenomena on a plane circuit are governed by the Helmholtz’s
equations which are obtained from the Maxwell’s equations
on Lorentz or Coulomb gauge. However, since solving theHelmholtz’s equations requires a huge CPU cost, the planecircuit is approximated by the linear passive R, L, C, and G
elements shown in Fig. 1 [15]. The circuit shown in Fig. 1 isgoverned by the following two equations:dvi, j (t)LL= −Gvi, j (t) +ii, j (t),
(1)
dt
C
C


dii, j (t)
C
C
= −R
ii, j (t) +vi−1, j (t)
dt
L
L

(2)
+vi+1, j (t) + vi, j−1 (t) + vi, j+1 (t) − 4vi, j (t) ,where
1
t = √ τ,LC

(3)and τ and t show the actual and normalized times, respectively. Equation (1) is KCL at the node (i, j) and (2) is

c 2008 The Institute of Electronics, Information and Communication Engineers
Copyright IEICE TRANS. FUNDAMENTALS, VOL.E91–A, NO.12 DECEMBER 2008

3758

+



C2 (i, j; k, l)vy1kl (t) + I2 ,(5)

C(k,l)∈Nr (i, j)

Fig. 1

Circuit model of plane circuit.

Fig. 2Cells of two-layer CNN.

obtained from the characteristics of the four RL branches
which are connected to the node (i, j).
Consider expressing (1) and (2) by a two-layer CNN.
Cells of two-layer CNN interact each other through Am , Bm ,and Cm templates as shown in Fig. 2. The state equations of
the two-layer CNN are written by
dv x1i j (t)= −v x1i j (t)dt+A1 (i, j; k, l)vy1kl (t)+B1 (i, j; k, l)vu1kl (t)C(k,l)∈Nr (i, j)+

C1 (i, j; k, l)vy2kl (t) + I1 ,C(k,l)∈Nr (i, j)

dv x2i j (t)= −v x2i j (t)dt+A2 (i, j; k, l)vy2kl (t)C(k,l)∈Nr (i, j)+C(k,l)∈Nr (i, j)

B2 (i, j; k, l)vu2kl (t)where the matrices Am , Bm , and Cm are the matrix representations of Am (i, j; k, l), Bm (i, j; k, l), and Cm (i, j; k, l), respectively. Since the plane circuit shown in Fig. 1 is linear, theoutput functions (6) and (7) are redefined by
vy1i j (t) = v x1i j (t),vy2i j (t) = v x2i j (t).

C(k,l)∈Nr (i, j)where Nr (i, j) is the r-neighborhood of a cell C(i, j) as
Nr (i, j) = {C(k, l)| max{|k − i|, |l − j|} ≤ r. v x1i j (t), vy1i j (t), andvu1i j (t) are the internal state, output, input of a cell C(i, j) in
the first layer, respectively. v x2i j (t), vy2i j (t), and vu2i j (t) are
the internal state, output, input of a cell C(i, j) in the second layer. Am (i, j; k, l), Bm (i, j; k, l), and Cm (i, j; k, l) are thefeedback, control, and coupling templates in the m-th layer,
respectively [5]. The output functions of the two-layer CNN
are described by
1
(6)
vy1i j (t) =|v x1i j (t) + 1| − |v x1i j (t) − 1| ,21vy2i j (t) =(7)|v x2i j (t) + 1| − |v x2i j (t) − 1| .
2Comparing the circuit Eqs. (1) and (2) with (4) and (5),we can describe the cloning templates for the plane circuit
as
⎛
⎞
0
0 ⎟⎟
⎜⎜⎜ 0
⎟⎟⎟
⎜⎜⎜
A1 = ⎜⎜⎜ 0 1 − G CL 0 ⎟⎟⎟⎟ , B1 = 0,
⎝⎜
⎠⎟
0
0
0
⎛
⎞
0
0 ⎟⎟
⎜⎜⎜ 0
⎟⎟⎟
⎜⎜
L
⎟⎟⎟ , I1 = 0,(8)C1 = ⎜⎜⎜⎜ 0
0
⎟⎟⎠
C
⎜⎝
0
0
0
⎛
⎞
0
0
0 ⎟⎟
⎜⎜⎜
⎟⎟⎟
⎜⎜⎜
A2 = ⎜⎜⎜ 0 1 − R CL 0 ⎟⎟⎟⎟ , B2 = 0,
⎝⎜
⎠⎟
0
0
0
⎛
⎞
C
⎜⎜⎜ 0
0 ⎟⎟⎟⎟
⎜⎜⎜
L
⎟⎟⎟
⎜⎜
C
C
C ⎟
⎟⎟ , I2 = 0,
(9)C2 = ⎜⎜⎜⎜
−4
L
L
L ⎟
⎜⎜⎜
⎟⎟⎟⎟
⎟
⎝⎜ 0
⎠
C
0
L

(4)

(10)
(11)

Although CNN has a periodical boundary condition in
general, the circuit model of the plane circuit does not havesuch a condition. The nodes on the edge connects three or
two RL branches. Therefore, we should rewrite C2 appropriately for these nodes. If the node connects with three RL
branches, C2 is written by
⎛
⎞
C
⎜⎜⎜ 0
0 ⎟⎟⎟⎟
⎜⎜⎜
L
⎟⎟⎟
⎜⎜
C ⎟
⎟⎟ .
C2 = ⎜⎜⎜⎜ 0 −3 CL
L ⎟
⎜⎜⎜
⎟⎟⎟⎟
⎜⎝
⎟
C
0
0 ⎠
L
If the node connects two RL branches, C2 is written by

TANJI et al.: FAST SIMULATION TECHNIQUE OF PLANE CIRCUITS VIA TWO-LAYER CNN-BASED MODELING

3759

⎛
C
⎜⎜⎜ 0
⎜⎜⎜
L
⎜⎜⎜
C2 = ⎜⎜⎜ 0 −2 CL
⎜⎜⎜
⎜⎝
C
0
L

⎞
0 ⎟⎟⎟⎟⎟⎟⎟⎟
0 ⎟⎟⎟⎟ .
⎟⎟⎟⎟0 ⎠It should be noted that position of the nonzero oﬀ-diagonal
elements depends on the node.
3.

Leapfrog Method

In the CNN universal machine [6], the dynamics of CNN
is simulated by using the forward Euler method. However,if the circuit is stiﬀ, the forward Euler method may break
down. For example, we simulated the two-layer CNN corresponding to the plane circuit shown in Fig. 3(a), where theplane circuit with 3 × 4 cells is approximated by the RLC
circuit as shown in Fig. 3(b). Figure 4(a) shows the transient voltage waveform at the output resister Rout in Fig. 3(b)when a pulse is given at ‘Port1,’ where the waveform wascalculated by the forward Euler method. The result is compared with Berkeley SPICE. The response obtained from theforward Euler method is violently vibrated and the simulation would break down for a long duration. In this example,
the ratio of the maximum absolute eigenvalue to the minimum is 2.83×106 so that the circuit is stiﬀ. This is the reason
why the simulation would break down. Fortunately, with 10
times smaller time-step size than the case of Fig. 4(a), we
can obtain the reliable result as shown in Fig. 4(b). However, since it is not easy to know the appropriate time-step
size, the conventional forward Euler or Runge Kutta method
is not suitable for all the CNNs. Instead of such explicit
methods, we can use implicit numerical integration suchas backward Euler, backward diﬀerence, and Gear methods[7]. However, these methods need to solve a set of linear
equations, which prohibits the application of these methods
to large-scale problems. To analyze large-scale and stiﬀ cir-

cuits, we use the leapfrog method [11] which is a variety of
FDTD methods [10] for circuit simulation [9].
Since the center values of A1 in (8) and A2 in (9)are only non-zero, the first and second layers interact eachother through the coupling templates C1 (i, j; k, l) of (4) andC2 (i, j; k, l) of (5). If implicit numerical integration is used
for solving (4) and (5), we have to solve a set of linear equations due to these couplings. In the leapfrog method, thetwo coupled state vectors are alternately updated. Hence,the simulation points of the first layer is shifted with halfa time step to the second layer as shown in Fig. 6, whereas
the state vectors in both layers are simultaneously updated
when implicit integration is used. Since the state vectors arealternately updated in the leapfrog method, we do not haveto solve a set of linear equations, diﬀerently from the case of

(a)

(b)

Fig. 3 Modeling of plane circuit. (a) Plane circuit. (b) The equivalentcircuit.

Fig. 4 Transient waveforms calculated by the forward Euler methods.
The 10 times smaller time-step size than the case of Fig. 4(a) is used forthe forward method to obtain the result of the Fig. 4(b). In Fig. 4(b), thewaveform (Euler) obtained by the forward Euler method almost overlapsthat obtained by SPICE.

IEICE TRANS. FUNDAMENTALS, VOL.E91–A, NO.12 DECEMBER 2008

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Fig. 6 Updated points of the state vectors in implicit numerical integration and the leapfrog methods.

Fig. 5 Transient waveforms calculated by the leapfrog method. The
waveform (CNN) obtained by the leapfrog method almost overlaps thatobtained by SPICE.

the implicit integration. As a result, the leapfrog method ismuch faster than the SPICE simulation which uses implicit
numerical integration for transient analysis.
The update rules of the leapfrog method for the twolayer CNN are described by
v x1i j (ti+1 ) − v x1i j (ti )= −v x1i j (ti+1 )ti+1 − ti
A1 (i, j; k, l)vy1kl (ti+1 )++B1 (i, j; k, l)vu1kl (ti+1/2 )C(k,l)∈Nr (i, j)+

C1 (i, j; k, l)vy2kl (ti+1/2 ) + I1 ,(12)

C(k,l)∈Nr (i, j)v x2i j (ti+1/2 ) − v x2i j (ti−1/2 )= −v x2i j (ti+1/2 )ti+1/2 − ti−1/2A2 (i, j; k, l)vy2kl (ti+1/2 )+C(k,l)∈Nr (i, j)+



B2 (i, j; k, l)vu2kl (ti )C(k,l)∈Nr (i, j)+

C2 (i, j; k, l)vy1kl (ti ) + I2 .

h≤

(13)

C(k,l)∈Nr (i, j)

In (12) and (13), since A1 (i, j; i, j) and A2 (i, j; i, j) arenonzero and the other values of A templates are zero, it is
not necessary to solve a set of linear equations for updating
the state vectors.
We simulated the example of 3 × 4 cells using theleapfrog method. Figure 5 shows the transient voltage waveform at the output resister Rout shown in Fig. 3(b). To obtain
the result, the time step size was taken as 100 times larger
than the forward Euler method in the case of Fig. 4(a), whichmeans that the leapfrog method is robust for a stiﬀ problem,
though implicit integration is not used.

LminCmin ,(14)

where Lmin and Cmin are minimum inductance and capacitance,√ respectively [9]. If the normalized time of (3) is τ =1/ LminCmin , the Courant condition becomes ti+1 − ti ≤ 1.
Putting the time step size as ti+1 − ti = 1, we can obtain thediscrete time model, which is a Discrete Time CNN (DTCNN) [12], [13].
4.

C(k,l)∈Nr (i, j)It should be noted that the leapfrog method is restrictedby the Courant condition which gives the allowable largest
time step size h in order to ensure the stability. The Courant
condition is obtained as

ExamplesTo show the performance of the proposed method via twolayer CNN-based modeling, the plane circuit shown in
Fig. 3(a) was analyzed. The plane circuit is divided into
identical cells which are modeled by an RLC π-model [4],and the equivalent circuit is obtained as Fig. 3(b). Basedon the electromagnetic theory, the parameters of the RLC
π-model corresponding to a package are determined as R =1.73×10−3 [Ω], L = 2.26×10−9 [H], and C = 9.15×10−15 [F][4].
We calculated the transient responses of the CNN by
the leapfrog method and compared with Berkeley SPICE(ngspice) [14]. The CNN simulations were carried out by
Matlab 7 on Federa Core 3. The CPU times of CNN and
SPICE simulations were measured on Pentium 4 with 3 GHz
clock and 1 GByte memory.
The linear circuit shown in Fig. 3(b) was driven by acurrent source of 0.1 [ns] fall/rise time, 0.4 [ns] pulse width,
0.2 [ns] delay time, 1.0 [ns] period, and 5 [mA] amplitude at‘Port1.’ The transient analysis was carried out for the timeinterval from 0 [ns] to 2.0 [ns] using 1 [ps] time step size.
Table 1 shows the comparison of CPU times. For 320 × 320
cells, the proposed method via the two-layer CNN-basedmodeling is 1,553 times faster than ngspice. To investigate
accuracy of the proposed method, we calculated the transient waveforms for 10×10 cells. Figure 7(a) shows the transient voltage waveforms at ‘Port1.’ The result obtained via
the CNN-based modeling is almost same with the SPICE.

TANJI et al.: FAST SIMULATION TECHNIQUE OF PLANE CIRCUITS VIA TWO-LAYER CNN-BASED MODELING

3761
Table 1Comparison of CPU times for transient simulation of a plane circuit.

cells
10 × 1020 × 2040 × 4080 × 80
160 × 160
320 × 320

elements
341
1281
4961
19521
77441
308481

CNN
0.53
0.74
1.79
6.25
32.68
152.09ngspice2.33
19.567155.56
1400.1016535.75
236199.93

Speed-up
4.4
26.44
86.90
224.02505.991553.03ing ‘SPICE(0.01ps)’ with ‘CNN’ and ‘SPICE,’ we cannot
judge which is more accurate, ‘CNN’ or ‘SPICE.’ Therefore, both methods are of the same accuracy. Since eﬃciency of the proposed method is remarkable as listed inTable 1, the leapfrog method via the CNN-based modelingfor analyzing plane circuit is better than implicit/explicit numerical integration. We do not consider any parallelism of
CNN. If a hardware accelerator for simulating the two-layer
CNN is realized, further speed-up can be expected.
5.

(a)Conclusions

In this paper, a fast simulation of the plane circuits using
the CNN-based modeling has been presented, where theMaxwell’s equations of plane circuits are expressed by the
two-layer CNN and the dynamics of the two-layer CNN
is calculated by the leapfrog method. Since the proposed
method is very fast on a single processor, it might be extremely fast using any hardware accelerators. The leapfrog
method is based on the FDTD methods [10]. Therefore, thehardware accelerators would be extended to full wave analysis of electromagnetic field.
References(b)Fig. 7 Transient responses calculated by the proposed method and
SPICE. (a) The responses are calculated by h = 1 [ps]. (b) The enlarged responses of (a) and the SPICE simulation result obtained by using
h = 0.01 [ps].

Enlarging the waveforms from 1.9 [ns] to 2.0 [ns], there exist diﬀerences between the proposed method (‘CNN’) and
SPICE in Fig. 7(b), where 1 [ps] time step size was usedin both the proposed method and SPICE simulation. Using
0.01 [ps] time step, we carry out the SPICE simulation, theresult of which is shown as ‘SPICE(0.01ps)’ in Fig. 7(b).
Since a small time step is taken, ‘SPICE(0.01ps)’ would be
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Yuichi Tanji
received the B.E., M.E.,
and Ph.D. degrees from Tokushima University,
Tokushima, Japan, in 1993, 1995 and 1998, respectively. After graduation, he held Research
Associate positions at Sophia University and
Kagawa Univesity, and is currently an Associste Professor of the Department of Reliabilitybased Information Systems Engineering at Kagawa University. His research interests arein circuit simulation, artificial neural networks,
and image and signal processing. Dr. Tanji is amember of the IEEE.

Hideki Asai
received the B.E., M.E., andPh.D. degrees in electrical engineering from
Keio University, Yokohama, Japan, in 1980,
1982, and 1985, respectively. In 1985, he waswith the Department of Electrical and Electronics Engineering, Sophia University, Tokyo,
Japan. He was a Visiting Professor at Carleton
University, Ottawa, ON, Canada, and Santa
Clara University, Santa Clara, CA (1999–2000).
Since 1986, he has been with Shizuoka University, Hamamatsu, Japan, where he is currently
a Professor involved with VLSI-CAD and electrical design automation(EDA), analog circuit design, and neural networks. He is an author of thebooks, “Exercise Notes of Digital Circuits, CORONA PUBLISHING. CO.,LTD., 2001” and “Electronic Circuit Simulation Techniques, SCI TECHSPRESS, 2003.” Dr. Asai is a member of the IEEE Nonlinear Circuits andSystems Technical Committee. He was a secretary for the IEEE Circuits
and Systems Society Tokyo Chapter (1994–1995), and a chairman of theTechnical Group on Nonlinear Problems of the Institute of Electronics, Information and Communication Engineers (IEICE) (2007–2008). He is now
a chairman of the Technical Group on System Packaging CAE of JIEP. He
was the recipient of the Research Encouragement Awards on the occasionof the Takayanagi anniversary, the 50th anniversary of the founding of the
IEICE Tokai branch, and on the occasion of the Saitoh anniversary in 1988,
1989, and 1993, respectively.

Masayoshi Oda
received the B.E. andthe M.E. degrees from Electrical and Electronic
Engineering from Tokushima University, Tokushima Japan, in 2005 and 2007. His research interests include the computer-aided design technology.

Yoshifumi Nishio
received B.E., M.E.,
and Ph.D. degrees in electrical engineering from
Keio University, Yokohama Japan, in 1988,
1990, and 1993, respectively. In 1993, he joined
the Department of Electrical and Electronic Engineering at Tokushima University, Tokushima
Japan, where he is currently an Associate Professor. From May 2000 he spent a year in the
Laboratory of Nonlinear Systems (LANOS) at
the Swiss Federal Institute of Technology Lausanne (EPFL) as a Visiting Professor. His research interests include analysis and application of chaos in electrical circuits, analysis of synchronization in coupled oscillatory circuits, development of analyzing methods for nonlinear circuits, theory and applicationof cellular neural networks, and neural network architecture. He was the
Chair of the IEEE CAS Society Technical Committee on Nonlinear Circuits
and Systems (NCAS) during 2004–2005, the Steering Committee Secretaryof the IEICE Research Society of Nonlinear Theory and its Applications(NOLTA) during 2004–2007, and is currently the Secretary/Treasurer of
the IEEE CAS Society Shikoku Chapter. He was an Associate Editor of
the IEEE Transactions on Circuits and Systems–I: Regular Papers during
2004–2005, and is currently serving as an Associate Editor for the IEEE
CAS Magazine, the IEEE CAS Society Newsletter, and the RISP Journalof Signal Processing. He is also the Editor of the IEICE Fundamentals
Review and is a member of the Editorial Board of International Journal of
Circuit Theory and Applications. He is a senior member of the IEEE, anda member the RISP.

Akio Ushidareceived the B.E. and M.E.
degree in Electrical Engineering from Tokushima University in 1961 and 1966, respectively, and the Dr. degree in Electrical Engineering from University of Osaka Prefecture in
1974. From 1980 to 2003, he was a Professor
in Department of Electrical and Electronic Engineering at Tokushima University. Since 2003,
he has been with the Department of MechanicalElectronic Engineering, Tokushima Bunri University. From 1974 to 1975, he spent one year
as a visiting scholar at the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley. His current research interests include numerical methods and computer-aided analysis ofnonlinear circuits. Dr. Ushida is Senior member of the IEEE.