PCI-DAS1200/JR

Specifications

Document Revision 3.2, February, 2010
© Copyright 2010, Measurement Computing Corporation

Specifications
Typical for 25 °C unless otherwise specified.
Specifications in italic text are guaranteed by design.

Analog input
Table 1. Analog input specifications
Parameter

Specification

A/D converter type
Resolution
Number of channels
Input ranges

7800
12 bits
8 differential or 16 single-ended, software selectable
Bipolar:±10 V, ±5 V, ±2.5 V, ±1.25 V
Unipolar:0 to 10 V, 0 to 5 V, 0 to 2.5 V, 0 to 1.25 V
Software selectable
Programmable: internal counter or external source (A/D External Pacer) orsoftware polled
Software selectable option, burst rate = 3 µs
External digital: A/D External Trigger
External digital: Software enabled, rising edge, hardware trigger
Pre-trigger:
Unlimited pre- and post-trigger samples. Total # ofsamples must be > 512.
From 1024 sample FIFO via REPINSW, interrupt or software polled
3 µs
330 kHz min±1.5 LSB±0.75 LSB
±0.5 LSB typ, ±1.5 LSB max± 0.02% of reading max

A/D pacing
Burst mode
A/D trigger sources
A/D triggering modes

Data transfer
A/D conversion timeThroughput
Relative accuracy
Differential linearity error
Integral linearity error
Gain error (relative to calibration reference)
No missing codes guaranteed
Gain drift (A/D specs)
Zero drift (A/D specs)
Common mode range
CMRR @ 60 Hz
Input leakage current
Input impedance
Absolute maximum input voltage
Noise distribution:

12 bits±6 ppm/°C±1 ppm/°C
±10 V
70 dB
200 nA
10 MOhm, min±35 V
Rate = 1-330 KHz, average % ± 2 bins, average % ±1 bin, average # bins All ranges:
100% / 100% / 3 bins

1Specifications

PCI-DAS1200/JR

Digital input/output
Table 2. DIO specifications
Parameter

Specification

Digital type
Configuration
Number of I/O
Output highOutput low
Input highInput low
Power-up / reset state
Interrupts
Interrupt enable
Interrupt sources

82C55A
2 banks of 8, 2 banks of 4, programmable by bank as input or output
24 (FIRSTPORTA 0 through FIRSTPORTC 7)
3.0 volts @ -2.5 mA min
0.4 volts @ 2.5 mA max
2.0 volts min, Vcc+0.5 volts absolute max
0.8 volts max, GND-0.5 volts absolute min
Input mode (high impedance)
INTA# - mapped to IRQn via PCI BIOS at boot-time
Programmable
Residual counter, End-of-channel-scan, AD-FIFO-not-empty, AD-FIFO-half-fullCounter section
Table 3. Counter specifications
Parameter

Specification

Counter type
Configuration
82C54A:Counter 0 - ADC residual
sample counter.

82C54
Two 82C54 devices. 3 down counters per 82C54, 16 bits each

Counter 1 - ADC pacer lower
divider Source: 10 MHz oscillator
 Gate: tied to counter 2 gate, programmable source.
 Output: chained to counter 2 clock.

Counter 2 - ADC pacer upperdivider Source: counter 1 output.
 Gate: Tied to counter 1 gate, programmable source.
 Output: ADC pacer clock (if software selected), available at user connector.

82C54B:Counter 0 - pretrigger mode

Counter 0 - user counter 4(when in non-pretrigger mode)

Counter 1 - user counter 5Counter 2 - user counter 6

Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width highGate width low
Input low voltage

 Source: ADC Clock.
 Gate: Internal programmable source.
 Output: End-of-Acquisition interrupt.

 Source: ADC clock Gate: external trigger
 Output: End-of-Acquisition interrupt
 Source: User input at 100-pin connector (CLK4) or internal 10 MHz (softwareselectable)
 Gate: user input at 100-pin connector (GATE4)
 Output: available at 100-pin connector (OUT4)
 Source: user input at 100-pin connector (CLK5)
 Gate: user input at 100-pin connector (GATE5)
 Output: available at 100-pin connector (OUT5)
 Source: user input at 100-pin connector (CLK6)
 Gate: user input at 100-pin connector (GATE6)
 Output: available at 100-pin connector (OUT6)
10 MHz max
30 ns min
50 ns min
50 ns min
50 ns min
0.8 V max

2Specifications

PCI-DAS1200/JRParameter

Specification

Input high voltage
Output low voltage
Output high voltage

2.0 V min
0.4 V max
3.0 V minPower consumption
Table 4. Power consumption specifications
Parameter

Specification+5 V operating(A/D converting to FIFO)

0.8 A typical, 1.0 A max

Environmental
Table 5. Environmental specifications
Parameter

Specification

Operating temperature range
Storage temperature range
Humidity

0 to 70 °C-40 to 100 °C0 to 90% non-condensing

Main connector and pin out
Table 6. I/O connector specifications
Connector typeCompatible cableCompatible accessory products(with C100FF-x cable)

100-pin high density
C100FF-x, unshielded ribbon cable. x = length in feet
ISO-RACK16/P
CIO-ERB08 (DADP-5037 adaptor and TN-MC78M05CT voltage regulator required *)CIO-ERB24 (DADP-5037 adaptor required *)CIO-SERB24 (DADP-5037 adaptor required)
SSR-RACK08 (DADP-5037 adaptor required *)SSR-RACK24 (DADP-5037 adaptor required *)BNC-16SE
BNC-16DI
CIO-MINI50 (2 required)
CIO-TERM100 (1 required)
SCB-50 (1 required)* Details on the DADP-5037 adaptor board are available on our web site atwww.mccdaq.com/cbicatalog/cbiproduct.asp?dept_id=103&pf_id=1381

3Specifications

PCI-DAS1200/JR

8-channel differential mode pin outPin
123456789101112
13
1415
16
1718
192021
2223
2425
26
2728
2930
3132
33
34
35
36
37
38
3940
4142
4344454647484950Signal Name
LLGND
CH0 IN HI
CH0 IN LO
CH1 IN HICH1 IN LO
CH2 IN HI
CH2 IN LO
CH3 IN HI
CH3 IN LO
CH4 IN HI
CH4 IN LO
CH5 IN HI
CH5 IN LO
CH6 IN HI
CH6 IN LO
CH7 IN HI
CH7 IN LO
LLGND
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
CTR4 CLK
CTR4 GATECTR4 OUT
A/D EXTERNAL PACER
N/C
N/C
A/D EXTERNAL TRIGGER IN
N/C
N/C
PC +5V
N/C
GND

Pin
515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991004Signal Name
FIRSTPORTA Bit 0
FIRSTPORTA Bit 1
FIRSTPORTA Bit 2
FIRSTPORTA Bit 3
FIRSTPORTA Bit 4
FIRSTPORTA Bit 5
FIRSTPORTA Bit 6
FIRSTPORTA Bit 7
FIRSTPORTB Bit 0
FIRSTPORTB Bit 1
FIRSTPORTB Bit 2
FIRSTPORTB Bit 3
FIRSTPORTB Bit 4
FIRSTPORTB Bit 5
FIRSTPORTB Bit 6
FIRSTPORTB Bit 7
FIRSTPORTC Bit 0
FIRSTPORTC Bit 1
FIRSTPORTC Bit 2
FIRSTPORTC Bit 3
FIRSTPORTC Bit 4
FIRSTPORTC Bit 5FIRSTPORTC Bit 6FIRSTPORTC Bit 7N/C
N/C
N/C
N/C
N/C
CTR6 CLKCTR6 GATECTR6 OUT
N/C
N/C
CTR5 CLK
CTR5 GATE
CTR5 OUT
N/C
GND
+12V
GND
-12V
N/C
N/C
A/D INTERNAL PACER OUTPUT
N/C
N/C
N/C
N/C
GND

Specifications

PCI-DAS1200/JR

16-channel single-ended mode pin out
Pin123456789101112131415
1617181920212223242526272829303132333435363738394041424344454647484950Signal Name
LLGND
CH0 IN
CH8 IN
CH1 IN
CH9 INCH2 IN
CH10 IN
CH3 IN
CH11 IN
CH4 IN
CH12 IN
CH5 IN
CH13 IN
CH6 IN
CH14 IN
CH7 IN
CH15 IN
LLGND
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
CTR4 CLK
CTR4 GATECTR4 OUT
A/D EXTERNAL PACER
N/C
N/C
A/D EXTERNAL TRIGGER IN
N/C
N/C
PC +5V
N/C
GND

Pin
515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991005Signal Name
FIRSTPORTA Bit 0
FIRSTPORTA Bit 1
FIRSTPORTA Bit 2
FIRSTPORTA Bit 3
FIRSTPORTA Bit 4
FIRSTPORTA Bit 5
FIRSTPORTA Bit 6
FIRSTPORTA Bit 7
FIRSTPORTB Bit 0
FIRSTPORTB Bit 1
FIRSTPORTB Bit 2
FIRSTPORTB Bit 3
FIRSTPORTB Bit 4
FIRSTPORTB Bit 5
FIRSTPORTB Bit 6
FIRSTPORTB Bit 7
FIRSTPORTC Bit 0
FIRSTPORTC Bit 1
FIRSTPORTC Bit 2
FIRSTPORTC Bit 3
FIRSTPORTC Bit 4
FIRSTPORTC Bit 5
FIRSTPORTC Bit 6FIRSTPORTC Bit 7
N/C
N/C
N/C
N/C
N/C
CTR6 CLKCTR6 GATECTR6 OUT
N/C
N/C
CTR5 CLK
CTR5 GATE
CTR5 OUT
N/C
GND
+12V
GND
-12V
N/C
N/C
A/D INTERNAL PACER OUTPUT
N/C
N/C
N/C
N/C
GND

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PCI-DAS1200-JR-spec.doc