Development of MicroTCA based LLRF
control systems at cERL and STF
Feng QIU (KEK) Oct. 18, 2018

Feng QIU, PCaPAC, Taiwan, Oct. 18, 2018

1

Main Content
 Introduction of cERL and STF facilities

 Development of the µTCA Low Level RF systems
 Performance of the LLRF systems

Feng QIU, PCaPAC, Taiwan, Oct. 18, 2018

2

Facilities in KEK
 Compact ERL (cERL): Test facility for 3 GeV light source, 1.3 GHz, Superconducting (SC) and continuous wave (CW) mode.
 Super-conducting Test Facility (STF): Test facility for ILC, 1.3 GHz, SC and Pulse
mode.
Cryomodule Cool-down Test: 2016
Beam Commissioning: 2019~

Mont. Tsukuba

Tsukuba-Campus

STF：Super-conducting Test
Facility.

ILC: International Linear Collider
SuperKEKB

PF-ARPF

Compact ERL

Beam Commissioning: 2013~2018

Future 3-GeV
ERL Light Source
Feng QIU, PCaPAC, Taiwan, Oct. 18, 2018

3

cERL facility
 Injector: 4 cavities (3-SC+1-NC), Mainlinac: 2 SC cavities.
 Various of Power Sources
RF requirements
0.1 % (rms), 0.1°(rms)

GUN
8 kW SSA
25 kW Kly.

Cryomodule (ML)300 kW Kly.

16 kW SSA

8 kW SSA

Vector-sumControlling

DumpMain linac~ 20 MeVSC

Main linac

Two-cell SC

SC
Nine-cell SC

Cryomodule (injector)~3 MV/m for Injector Cavities~8.5 MV/m for main linac Cavities

4STF facility
 Motivation: Confirmation of the SC cavity technology, and cryomodule fabrication
for ILC.
 PS mode (5 Hz, ~1.65 ms). SC nine-cell cavities (QL ≈ 5e6, Eacc about 30 MV/m).
Multi-beam klystron (MBK), 10 MW (65%).
ILC main-lianc
Flat-top for beam acceleration~30 MV/m

RF requirements of ILC
0.07% (rms), 0.35°(rms)

Degradation dueto field emission!

Cryomodule Cooldown Test @ 2016

Nine-cell SC cavity (QL>5e6, Eacc>30 MV/m)Power Distribution

Capture Cryomodule

Cryomodule

5

10 MW MBK, (~65%), Toshiba E3736H

µTCA LLRF systems

Feng QIU, PCaPAC, Taiwan, Oct. 18, 20186

Diagram of LLRF system
Why LLRF?
Cavity field is easy
to be disturbed

We need datacommunication.

→Need a feedback
system to stabilize
the cavity field.

We need an FPGA
board to implement
the DSP algorithms.

7

LLRF Systems for cERL and STF
 Individual cavity control (cERL), Vector-sum control (STF).
cERL: One RF source (Kly. or SSA)
drives one cavity (except injector2 & 3).

LLRF1

LLRF
Kly. orSSA

FB

Cavity #1

Vector-sum field (LLRF needs to process lotsof signals)

LLRF2
Kly. orSSA...

STF: One RF source drives twelve cavities (actually eight).

Kly. orSSA

FB

FB

...

Cavity #2

Cavity #1

Cavity #2

Vcn
Vc1

ILC: 1-kly. 39 cavities...

Cavity #12

Vcn

Vcn

Vc 2
Vc1

We control every ( Vc1 , Vc 2 Vcn )RF requirements
0.1 % (rms), 0.1°(rms)Vc 2

We only control VS ( Vcn )RF requirements of ILC
0.07% (rms), 0.35°(rms)Feng QIU, PCaPAC, Taiwan, Oct. 18, 20188

Example: LLRF system @cERL
LLRF Cabinet
IQ Mod.
µTCA

EPICS is installed inside µTCA and is used as
the DAQ (data acquisition) system.
Thermostatic Chamber(0.1 deg.)µTCA boardµTCA FPGA board
Down-convertor
CavityPf

Virtex5-FPGADACs

DSP algorithms

ILinuxQ

4ch. DACPPC(ARM)

PrRefControl System
Studio (userinterface)

EPICSIOC

Dig.
I/O

Dig.
I/OADCs
Ethernet

FPGA(PPC)
4ch. ADC

9µTCA boards (3 types)
cERL (Type I , µTCA.0)
LLRF control
LLRF1
Kly. orSSA

STF (Type II, µTCA.4)
SFP for
optical link
RTM
(Rear Trans. Module)

FB

cERL&STF (Type III, µTCA.0)
Monitor the long-term drift(directly sampling)

LLRF control
ZynQ-7000
IFC board

Virtex-5

AD/DA
...

AD board

Cavity #1µTCA.0, Virtex-5 FPGA, 4×16-bits
ADCs, 4×16-bits DACs
TYPE
Facilities
FunctionStandard
ADC

TYPE IcERL
LLRFµTCA.0
4×16-bits(LTC2208,130MSPS)FPGADAC

Virtex-5 FX
4×16-bits(AD9783,500 MSPS)
PPC 440Wind River LinuxCPUOSµTCA.4, Zynq-700 FPGA, 12×16bits ADCs, 2×16-bits DACs
TYPE IISTF-IILLRFµTCA.414×16-bits(AD9650,105 MSPS)
Virtex-5 FX
2×16-bits(AD9783,500 MSPS)
ARM
Xilinx LinuxµTCA.0, Virtex-5 FPGA, 2×14-bits
fast ADCs (400 MHz)TYPE IIIERL & STF
MonitorµTCA.0
Cavity #1
2×14-bits(ADS5474, 400MSPS)

LLRF
Kly. or
SSA

FB

Cavity #2

VS control...

Cavity #12

Zynq-7000
N/A
Mitsubishi Electric
TOKKI System Co.,Ltd.
PPC 440Wind River Linux10

Performance of LLRF systems

Feng QIU, PCaPAC, Taiwan, Oct. 18, 201811

Performance @ cERL (RF stabilities)
Amp.

Pha.

Amp.

Pha.

Type I

RF stability

Bun.

Inj. 1

Inj. 2&3 (VS) ML1

ML2

Requirement

ΔA/A [%. rms]

0.07%

0.02%

0.02%0.01%0.01%0.1%

Δθ [°.rms]

0.04°

0.02° 0.015°

0.01°

0.01°

0.1°

The results need to be confirmed by beam energy stabilities.
Feng QIU, PCaPAC, Taiwan, Oct. 18, 201812

Performance @ cERL (Beam energy)
 Beam momentum jitter is measured by screen monitor and determined by
the peak point of the projection of the screen.
Main linac~3.0 MeVInjector
Cam 15~20 MeV

Dispersion
η=2.2mResolution
62.6 µm/pixel

Screen monitor

ΔP/P=0.0065%. rms

Feng QIU, PCaPAC, Taiwan, Oct. 18, 201813

Performance @ STF (RF Stabilities)

Type II

12 ADC channels

0.006% (rms)0.024°(rms)Vector-sum ofeight cavities

RF stability

Vector-sum (8 cavities)

Requirement

ΔA/A [%. rms]

0.006%

0.07%Δθ [°rms]

0.024°

0.35°
14

Summary LLRF control systems with µTCA standards have beendeveloped in cERL and STF.
 Performances satisfied our requirements.

Feng QIU, PCaPAC, Taiwan, Oct. 18, 201815

Thank you for your attention

Feng QIU, PCaPAC, Taiwan, Oct. 18, 201816

Back upFeng QIU, PCaPAC, Taiwan, Oct. 18, 201817

Performance @ STF (Directly Sampling) Stabilities becomes worse (directly sampling).
 Monitor the long-term drift of the master
oscillator and local oscillator (we can use digital
filter to improve the precision).

Type III

Fast ADC: 400 MHz
Conventional

Directly Sampling
RFRF
Pf

Cav

Fs

Pf

ADC

ADC

LO

Cavity #1

IF

Type III

ADC

ADC
Amplitude

6000

Backward Power
Cavity Field

Pf

Amplitude

Amplitude
Conventional
Conventional

5050
5050

5000

5040

Cav

4000

4000

2000

1000

0

Directly Sampling

5020
5020

2000

0

Direct Sampling

5030

3000

Amplitude [A.U.]

Amplitude [A.U.]

Amp. [counts]

6000

5010
5000

4990
4990
0

500

1000

11500

2000
Time step

2
Time [ms]

2500

3000

3

3500

4000

44980
4970
4960
4960
4950
900

900

Feng QIU, PCaPAC, Taiwan, Oct. 18, 2018

100011001200 1300
14001500 1600
12001500
Time stepTime[µs]

1700

1800
1800

0.1% (rms) and 0.1°(rms)18

Direct Sampling Method

Under-sampling procedure
for Direct Sampling:
0Sampling period = (24/5) * (1/1300 MHz)
23
4

1Cavity

RFADC

clock
0 1 2 3 RF period = 1/1300 MHz


The relation of fclock, fRF
and I,Q components:

fRF = 1300 MHz
No

L
Data Cycle

N
RF Period

clock
[MHz]

15

24270.83

2

419273.683314278.57

4629268.97

5729313.79

Optical Communication Test Bench in STF, KEK.

VSVSADC
CLK090

FB/
FF
DAC

O/E

DIV

STF2-LLRF (Master Unit)

E/O

ADC

VSADC
DIV

IQ MOD

DAC

ADC

CLK
STF2-LLRF (Slave Unit)

DIV = Divider
ADC = Analog to Digital Converter
DAC = Digital to Analog Converter
VS = Vector Sum
CLK = Clock
E/O = Electrical to Optical Converter
O/E = Optical to Electrical Converter
FB/FF = Feedback / Feedforward
IQ MOD = IQ Modulator