REVISIONSLTR

DESCRIPTIONDATE (YR-MO-DA)APPROVEDA

Correct case outline X package. Add radiation hardened requirements.
Add Appendix A for microcircuit die. Make corrections to pin assignments under
Figure 2. Make limit changes to ISD VIN, VIHEN, VILEN, tLOW, VOVPR, and19-06-11

C. SAFFLE

23-12-19

J. ESCHMEYER

VOVPF tests as specified under Table I. Make additions to VOUT and Thermal
pad descriptions as specified under Figure 2. - ro
Add device type 02, case outline Y, and device class P requirements.
Glass transition temperature information to paragraph 1.4. Make change to
Figure 4. - ro

B

Revision Status of Sheets
REV

B

B

B

B

B

B

B

B

B

B

B

SHEET

23

24

25

26

27

28

29

30

31

32

33

REV

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

B

SHEET

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

PMIC N/A
PREPARED BY

STANDARD
MICROCIRCUITDRAWINGRICK OFFICERDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990
https://www.dla.mil/LandandMaritime

CHECKED BYRAJESH PITHADIAAPPROVED BY

THIS DRAWING IS AVAILABLEFOR USE BY ALL DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSEAMSC N/A

CHARLES F. SAFFLEDRAWING APPROVAL DATE
19-02-04
REVISION LEVELB

MICROCIRCUIT, LINEAR, 7 V, 6 A LOAD SWITCHMONOLITHIC SILICON
SIZE
A
SHEET

DSCC FORM 2233
APR 97

CAGE CODE

67268

5962-17220

1 OF 33

DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.

5962-E072-24

1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space
application (device class V or Y) and plastic encapsulated microcircuits (PEM) (device class N) for military, terrestrial and avionics
application and device class P for space application. A choice of case outlines and lead finishes are available and are reflected in thePart or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
For device classes N and P, the user is cautioned to assure that the device is appropriate for the application environment.
1.2 PIN. The PIN is as shown in the following example:
5962

R

17220

__________ _______
FederalRHA
supplydesignator
class(see 1.2.1)\\/
Drawing number

/

01

Q

X

C

_______
Devicetype(see 1.2.2)_______
Deviceclass
designator(see 1.2.3)_________
Case
outline(see 1.2.4)________
Lead
finish(see 1.2.5)

1.2.1 RHA designator. RHA marked devices classes are N, P, Q, Y, and V and meet the MIL-PRF-38535 specified RHA levels
and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type

Generic number

01
02

Circuit function

TPS7H2201-SP
TPS7H2201-SP(QMLP)Radiation hardened 7 volt, 6 amp load switch
Radiation hardened 7 volt, 6 amp load switch

1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows:
Device class

Device requirements documentation

N or P

Certification and qualification to MIL-PRF-38535 for PEM performance environments.

Y

Certification and qualification to MIL-PRF-38535. Non hermetic flip chip technology on aceramic or organic substrate.

Q or V

Certification and qualification to MIL-PRF-38535

1.2.4 Case outline. The case outline are as designated in MIL-STD-1835 and as follows:
Outline letter

Descriptive designator

Terminals

X

See figure 1

16

Y

See figure 1

32

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

Package style
Ceramic flat pack (CFP) withintegrated thermal pads
Plastic thin shrink small outline package(TSSOP)

SIZE

5962-17220

A

REVISION LEVELBSHEET 2

1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes N, P, Q, Y, and V.
Finish designator

Material

A
B
C
D
E
F
Z

Hot solder dip
Tin-lead plate
Gold plate
PalladiumGold flash palladium
Tin-lead alloy (BGA/CGA)
Other

1.3 Absolute maximum ratings. 1/ 2/
Input voltage (VIN) .................................................................................................................... -0.3 V to 7.5 V
Output voltage (VOUT) ............................................................................................................. -0.3 V to 7.5 V
Enable and over voltage protection pins (EN, OVP) ................................................................ -0.3 V to 7.5 V
Current sense, current limit timer, retry timer, current limit andsoft start pins (CS, ILTIMER, RTIMER, IL, SS) .................................................................... -0.3 V to VIN + 0.3 V
Maximum continuous switch current (IMAX) ............................................................................. 9 A maximum
Maximum pulsed switch current (t ≤ 5 µs) (IPLS) ..................................................................... 45 A maximum
Maximum junction temperature (TJ) ......................................................................................... -55°C to +150°C
Storage temperature range ...................................................................................................... -65°C to +150°C
Case outline X:
Thermal resistance, junction-to-ambient (θJA) ..................................................................... 72.3°C/W
Thermal resistance, junction-to-case (top) (θJCtop) .............................................................. 96.1°C/W
Thermal resistance, junction-to-board (θJB) ......................................................................... 42.1°C/W
Characterization parameter, junction-to-top (ψJT) ................................................................ 3.3°C/W
Characterization parameter, junction-to-board (ψJB) .......................................................... 42.5°C/W
Thermal resistance, junction-to-case (bottom) (θJCbot) ........................................................ 0.6°C/W
Case outline Y:
Thermal resistance, junction-to-ambient (θJA) ..................................................................... 23.5°C/W
Thermal resistance, junction-to-case (top) (θJCtop) .............................................................. 11.2°C/W
Thermal resistance, junction-to-board (θJB) ......................................................................... 5.4°C/W
Characterization parameter, junction-to-top (ψJT) ................................................................ 0.1°C/W
Characterization parameter, junction-to-board (ψJB) .......................................................... 5.4°C/W
Thermal resistance, junction-to-case (bottom) (θJCbot) ........................................................ 0.5°C/W
Electrostatic discharge (ESD) rating:
Human body model (HDM) per JEDEC JS-001 ................................................................... ±4000 V 3/
Charge device model (CDM) per JEDEC JESD22-C101 ..................................................... ±750 V 4/______
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ All voltage values are with respect to network ground pin.
3/ JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
Manufacturing with less than 500 V HBM is possible with the necessary precautions.
4/ JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
Manufacturing with less than 250 V CDM is possible with the necessary precautions.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 3

1.4 Recommended operating conditions.
Input voltage (VIN) .................................................................................................................... 1.5 V to 7 V
Input voltage slew rate (SRVIN) ................................................................................................ 0.01 V/µs
Output voltage (VOUT) ............................................................................................................. 0 V to 7 V 5/
Maximum continuous switch current (IMAX) ............................................................................. 6 A
Ambient operating temperature range (TA) .............................................................................. -55°C to +125°C 6/
Glass transition temperature:
Mold compound (Tg) ............................................................................................................ 115°C 7/
1.5 Radiation features.
Device type 01 :Maximum total dose available (high dose rate = 50 – 300 rad(Si)/s) ....................................... 100 krads(Si) 8/
Maximum total dose available (low dose rate ≤ 10 mrad(Si)/s) ................................................ 100 krads(Si) 8/
Device type 02:
Maximum total dose available (dose rate = 50 - 300 rad(Si)/s) ................................................ 100 krads(Si) 9/
Heavy ion single event phenomenon (SEP):No Single event latch-up (SEL) occurs at effective LETeff (see 4.4.4.2) .............................. ≤ 75 MeV/(mg/cm2)
No Single event burnout (SEB) occurs at effective LETeff (see 4.4.4.2) .............................. ≤ 75 MeV/(mg/cm2)
No Single event gate rupture (SEGR) occurs at effective LETeff(see 4.4.4.2) .................... ≤ 75 MeV/(mg/cm2)

No Single event functional interrupt (SEFI) occurs at LETeff (see 4.4.4.2) ......................... ≤ 75 MeV/(mg/cm2)

10/
10/
10/
10/

_______
5/ This maximum VOUT voltage is only applicable when the device is disabled (EN = low). When the device is enabled(EN = high), the maximum VOUT voltage is the input voltage, VIN.
6/ In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient
temperature may have to be derated. Maximum ambient temperature TA(max) is dependent on the maximum operating
junction temperature TJ(max), the maximum power dissipation of the device in the application PD(max),
and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the equation:
TA (max) = TJ(max) – (θJA × PD(max)).
7/ Glass transition temperature (Tg) of mold compound measured specification value 115°C but, tested Tg is 135°C.
8/ The manufacturer supplying device type 01 (LBC7 process technology) has performed characterization testing in accordance with
MIL-STD-883 method 1019, and the parts exhibited no low dose rate sensitivity at a dose level of 100 krad(Si). The radiation end
points limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883, method 1019, condition
A and condition D to a maximum total dose of 100 krad(Si).
9/ Device type 02 (LBC7 process technology) supplied to this drawing has been tested with total ionizing dose (TID) test at high dose
rate (HDR) condition A per MIL-STD-883, method 1019. The TID test is performed as radiation lot acceptance testing ofthese devices to TID level 100 krads(Si) as specified herein.
10/ For more information on SEP test results, customers are requested to contact the manufacturer (see SEP table IB).

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 4

2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part ofthis drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in thesolicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONMIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDSMIL-STD-883 MIL-STD-1835 -Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.

DEPARTMENT OF DEFENSE HANDBOOKSMIL-HDBK-103 MIL-HDBK-780 -List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.

(Copies of these documents are available online at https://quicksearch.dla.mil/.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) INTERNATIONAL
ASTM F1192–

Standard Guide for the Measurement of Single Event Phenomena (SEP) from Heavy Ion Irradiationof semiconductor Devices.

(Copies of these documents are available online at https://www.astm.org.)JEDEC Solid State Technology Association
JEDEC JS-001
JESD22-C101−−

JESD 57−

JEDEC JEP 155 −JEDEC JEP 157 −Human Body Model Testing of Integrated Circuits
Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-WithstandThresholds of Microelectronics Components
Test Procedures for the Measurement of Single Event Effects in Semiconductor Devices from
Heavy Ion Irradiation
Recommended ESD Target Levels for HBM/MM Qualification
Recommended ESD-CDM Target Levels(Copies of these documents are available online at https://www.jedec.org.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specificexemption has been obtained.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 5

3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes N, P, Q, Y, and V shall be in accordance with
MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The modificationin the QM plan shall not affect the form, fit, or function as described herein.
3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions for device classes N, P,
Q, Y, and V shall be as specified in MIL-PRF-38535 and herein.
3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Timing waveform. The timing waveform shall be as specified on figure 3.
3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revisionlevel control and shall be made available to the preparing and acquiring activity upon request.
3.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the electricalperformance characteristics and post irradiation parameter limits are as specified in table IA and shall apply over the full ambient
operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electricaltests for each subgroup are defined in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also bemarked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has
the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked.
Marking for device classes N, P, Q, Y, and V shall be in accordance with MIL-PRF-38535.
\T/= TI LOGO\T/ YMLLLLSG4

YM= MONTHLY DATE CODE

1722002PYE-

LLLL

O Q MLA NNNNS= ASSEMBLY SITE CODE

O – PIN 1

Q

= QML

= LOT TRACE CODE
(PER QSS 005-120)

MLA
NNNN
MAXIMUM= COUNTRY= SERIAL NUMBER, 4 DIGIT
CHARACTERISTICS:

8 CHARACTERS- 1 ST LINE

10 CHARACTERS- 2 ND LINE

G4 MUST BE SYMBOLIZED WITH A SOLDI LINE UNDERSCORE
3.5.1 Certification/compliance mark. The certification mark for device classes N, P, Q, Y, and V shall be a "QML" or "Q" asrequired in MIL-PRF-38535.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 6

TABLE IA. Electrical performance characteristics.
Test

SymbolConditions 1/ 2/ 3/-55°C ≤ TA ≤ +125°C
unless otherwise specified

Group A
subgroups

Devicetype

LimitsIOUT = 0 mA, VIN = EN = 5 V,

1,2,301, 02

6.5

mA

1,2,3

01

250

µA

02

250

01

3.1

02

3

1

01, 023.1

1,2,3

01, 023.1

101, 023.1

1,2,3

01, 023.1

101, 023.1

1,2,3

01, 02

2.5

1

02

20

1,2,3

01, 02

2.5

1

02

20

1,2,3

01, 02

83

Min

Unit
Max

Power supplies and currents
Quiescent current

IQ

CS resistor of 20 kΩ to GND
VIN to VOUT forward leakage

IFcurrent

EN = VOUT = GND,
measured VOUT current,
1.5 V ≤ VIN ≤ 7 V

VIN off state supply current

ISD
VIN

VIN = 5 V,

1,2,3

EN = GND, VOUT = 0 V,
measured VIN current
M, D, P, L, R
VIN = 3.3 V,

mA

EN = GND, VOUT = 0 V,
measured VIN current
M, D, P, L, R
VIN = 1.8 V,
EN = GND, VOUT = 0 V,
measured VIN current
M, D, P, L, R
Reverse current protection
leakage current

IRCP

EN = 0 V, VIN = 0 to 7 V,

mA

VOUT = 0 to 7 V for
VOUT > VIN
M, D, P, L, R
EN = 7 V, VIN = 0 V,
VOUT = 0 to 7 V
M, D, P, L, R

Soft startSoft start charge current

ISS

µA

See footnote at end of table.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 7

TABLE IA. Electrical performance characteristics - Continued.
Test

SymbolConditions 1/ 2/ 3/-55°C ≤ TA ≤ +125°C
unless otherwise specified

Group A
subgroups

Devicetype

Limits

Unit

Min

Max

Enable and undervoltage lockout (EN/UVLO) input.
EN/UVLO threshold voltage,rising
EN/UVLO threshold voltage,
falling
EN/UVLO hysteresis voltage

VIHEN

1,2,3

01, 02

0.56

0.65

V

VILEN

1,2,3

01, 02

0.47

0.55

V

HYSTEN

1,2,3

01, 02124mV

EN signal low time during
cyclingtLOW

9,10,1101, 0220µs

VIN percentage for enable

VINEN

1,2,3

01, 0275%

EN pin input leakage current

IEN

1,2,3

01, 02

RTIMER = GND, IL = 1 A.
IVOUT = 2 A, see figure 3

EN = VIN = 5 V

12nAOvervoltage protection (OVP)OVPR threshold voltage, rising

VOVPR

1,2,3

01, 02

0.52

0.63

V

OVPF threshold voltage, falling

VOVPF

1,2,3

01, 02

0.5

0.59

V

1,2,3

01, 02

55

mV

1,2,3

01, 0215nA

9,10,1101, 02

5

ms

1,2,3

01, 02

9,10,1101, 02delay time

0.5 A rising step, 100 mA/µs,
1.5 V ≤ VIN ≤ 7 V, see figure 5
0.5 A falling step, 100 mA/µs,
1.5 V ≤ VIN ≤ 7 V, see figure 5

CS pin accuracy

0.75 A ≤ IVOUT ≤ 7.5 A

1,2,3

01, 02

CS pin voltage

0.75 A ≤ IVOUT ≤ 7.5 A,
no OCP

1,2,3

01, 021,2,3

01, 02OVP hysteresis voltage

HYSTOVPOVP pin input leakage current

IOVP

1.6 V < VIN < 7 V

Current limit and current senseTime for valid CS output after
enabletCSEN

CSS = 120 nF, see figure 4

Minimum VOUT current forvalid CS output
VOUT current change to CS

Current limit setting

IIL

IVOUT ≤ 1 A

750

mA
74
73

-10

10

A

IVOUT +
0.5

1 A < IVOUT ≤ 3 A

IVOUT + 1

IVOUT > 3 A

IVOUT +
1.5

DLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVEL

B%

VIN – 0.4 V

See footnote at end of table.

STANDARD
MICROCIRCUIT DRAWINGµs

SHEET 8TABLE IA. Electrical performance characteristics - Continued.
Test

SymbolConditions 1/ 2/ 3/-55°C ≤ TA ≤ +125°C
unless otherwise specified

Group A
subgroups

Devicetype

Limits

Unit

Min

Max

-20%

20%

Current limit and current sense – continued.
Programmable current limit
accuracy

1.5 V ≤ VIN ≤ 7 V

1,2,3

01, 02

Fast trip off time

VIN = 5 V, CSS = 2.7 nF

9,10,11

01

158

µs

Internal current limit timer(fast trip off current limit)

VIN = 5 V, IVOUT = 3 A,

9,10,11

01

35

µs

TimersSee figure 6.
1,2,3

01, 02

1.38

µA

4,5,6

01, 02

153

Ω

1,2,3

01, 024,5,6

01, 02

153

Ω

01

34

mΩ

IL = 6 A, ILTIMER = VIN,
10 mΩ short in 10 µs

ILTIMER charge current

IILTIMERILTIMER internal pull down
resistance

PDILTIMER

RTIMER charge current

IRTIMERRTIMER internal pull down
resistancePDRTIMER

40 mV on RLTIMER pin

RON

VIN = 7 V, IL = 7.5 A ,4lead length = 2.5 mm

5

45

6

24

40 mV on ILTIMER pin

0.7

0.7

1.38

µA

Resistance characteristics
ON – state resistance

VIN = 7 V, IL = 7.5 A

4

02

21

5

27

6

17

VIN = 5 V, IL = 7.5 A,

4lead length = 2.5 mm

5

47

6

26

VIN = 5 V, IL = 7.5 A

4

01

02

35

23

5

29

6

18

See footnote at end of table.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 9

TABLE IA. Electrical performance characteristics - Continued.
Test

SymbolConditions 1/ 2/ 3/-55°C ≤ TA ≤ +125°C
unless otherwise specified

Group A
subgroups

Devicetype

Limits
Min

Unit
Max

Resistance characteristics – continued.
ON – state resistance

RON

VIN = 3.3 V, IL = 7.5 A,

4lead length = 2.5 mm

5

52

6

28

VIN = 3.3 V, IL = 7.5 A

4

01

02

38

26

5

33

6

21

VIN = 1.8 V, IL = 7.5 A,

4lead length = 2.5 mm

5

70

6

36

VIN = 1.8 V, IL = 7.5 A

4

01

02

51

37

5

48

6

29

VIN = 1.5 V, IL = 7.5 A,

4lead length = 2.5 mm

5

87

6

44

VIN = 1.5 V, IL = 7.5 A

4

01

02

mΩ

63

46

5

59

6

36

1/ Devices supplied to this drawing have been characterized through all levels M, D, P, L and R of irradiation.
Pre and Post irradiation values are identical unless otherwise specified in Table I. When performing post irradiation electricalmeasurements for any RHA level, TA = +25°C.
2/ The manufacturer supplying device type 01 (LBC7 process technology) has performed characterization testing in accordance with
MIL-STD-883 method 1019, and the parts exhibited no low dose rate sensitivity at a dose level of 100 krad(Si). The radiation end
points limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883, method 1019, condition
A and condition D to a maximum total dose of 100 krad(Si).
3/ Device type 02 (LBC7 process technology) supplied to this drawing has been tested with total ionizing dose (TID) test at high dose
rate (HDR) condition A per MIL-STD-883, method 1019. The TID test is performed as radiation lot acceptance testing ofthese devices to TID level 100 krads(Si) as specified herein.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 10

TABLE IB. SEP test limits. 1/ 2/ 3/
Device type

SEP/SEE

Temperature (TC)01, 02

No SEL

125°C

No SEB

33°C

No SEGR

33°C

No SEFI

33°C

Conditions

Linear energy transfer (LETeff)

VIN = 7 V,

LETeff ≤ 75 MeV/(mg/cm2)

IOUT = 6 A
VIN = 7 V, 1.5 V,

LETeff ≤ 75 MeV/(mg/cm2)

IOUT = 6 A, 0 A
VIN = 7 V, 1.5 V,

LETeff ≤ 75 MeV/(mg/cm2)

IOUT = 6 A, 0 A
VIN = 7 V, 1.5 V,

LETeff ≤ 75 MeV/(mg/cm2)

IOUT = 6 A, 0 A

1/ For single event phenomena (SEP) test conditions, see 4.3 herein.
2/ Technology characterization and model verification supplemented by in-line data
may be used in lieu of end of line testing. Test plan must be approved by the technicalreview board.
3/ SEE test shall be performed in accordance with ASTM F1192 or JESD57. For more information on SEP test
results, customers are requested to contact the manufacturer.
3.6 Certificate of compliance. A certificate of compliance shall be required from a QML-38535 listed manufacturer in order tosupply to the requirements of this drawing (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA
prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets the requirements of
MIL-PRF-38535 and herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535 shall be provided with each lot of
microcircuits delivered to this drawing.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 11Case XFIGURE 1. Case outline.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 12Case X – continued.

SymbolDimensions
InchesMillimeters

Minimum

Maximum

Minimum

Maximum

A

.072

.0920

1.833

2.333

A1

.027

.047

0.690

1.190

b

.015

.019

0.382

0.482

c

.004

.007

0.097

0.177

D

.424

.443

10.76011.260

e

.047

.053

1.190

1.350

e1

.350 NOM

8.890 NOM

e2

.337

.356

8.550

9.050

E

.970

.990

24.64225.142

E1

.369

.389

9.380

9.880

E2

.250

.269

6.340

6.840

s

.033 REF

0.844 REFNOTES:
1. Controlling dimensions are millimeter, inch dimensions are given for reference only.
2. This package is hermetically sealed with a metal lid. The lid and heat slug are connected to GND pin.
3. The terminals will be gold plated.

FIGURE 1. Case outlines – continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 13Case YFIGURE 1. Case outlines - continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 14Case Y - continued

SymbolDimensions
InchesMillimeters

Minimum

Maximum

Minimum

Maximum

A

---

.047

---

1.2

A1

.002

.006

0.05

0.15

b

.007

.012

0.19

0.30

c

.006 NOM

0.15 NOM

D

.429

.437

10.9

11.1

D1

.201

.236

5.1

6.0

D2

.008 REF

0.2 REF

E

.236

.244

6.0

6.2

E1

.311 NOM.326 NOM

7.9 NOM

8.3 NOM

E2

.118

.153

3.0

3.9

E3

.035 REF

0.9 REFe.026 BSC

0.65 BSC

e1.384 BSC

9.75 BSC

L

.020

.029

0.50

0.75

NOTES:
1. Controlling dimensions are millimeter, inch dimensions are given for reference only.
2.

Dimension D body length does not include mold flash, protrusion, or gate burrs. Mold flash, protrusion, or gate burrs shallnot exceed 0.15 mm (0.006 inch) per side.

3.

For dimensions D2 and E3, features may differ and may not be present.

4.

Falls within reference to JEDEC MO-153.

FIGURE 1. Case outlines - continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 15

Device type

01

Case outline

X

Terminal
numberTerminal
symbol

1

VIN

2

VIN

3

VIN

4

VIN

5

CS

6

EN

7

OVP

8

GND

9

RTIMER

10IL

11ILTIMER

12

SS

13

VOUT

14

VOUT

15

VOUT

16

VOUT

FIGURE 2. Terminal connections.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 16

Device type

01

Case outline

X

Terminal
symbol

I/O

VIN

I

Switch input. Input bypass capacitor recommended for minimizing
VIN dip.

EN

I

Active high switch control input. Do not leave floating.

OVP

I

Overvoltage protection. Programmable using an external resistor
divider. If no OVP is desired, this pin should be connected to GND.

SS

I/O

Switch slew rate control. Can be left floating.

GND

---

Device ground.

RTIMER

I/O

Fault timer control during disabled and retry mode. Connecting thispin to GND holds the switch disabled until the EN pin is cycled.

IL

I/O

Current limiter control.

ILTIMERI

Fault timer control during limiting mode. Connecting this pin to VIN
uses the internal current limit timer.

CS

O

Current sense pin proportional to output current.

VOUT

O

Switch output. A minimum 10 µF output capacitor is recommended.

NC

---

Thermal pad---

No connect. This pin is not internally connected. It is recommended
to connect these pins to GND to prevent charge buildup; however,these pins can also be left open or tied to any voltage between GND
and VIN.
Thermal pad (exposed center pad) for heat dissipation purposes.
Thermal pad is internally connected to seal ring and GND.

Description

FIGURE 2. Terminal connections - continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 17

Device type

01

Case outline

Y

Terminal number

Terminal
symbolTerminal
numberTerminal
symbol

1

VIN

17

NC

2

VIN

18

RTIMER

3

VIN

19

NC

4

VIN

20

IL

5

VIN

21

ILTIMER

6

VIN

22

SS

7

VIN

23

VOUT

8

VIN

24

VOUT

9

VIN

25

VOUT

10

VIN

26

VOUT

11

CS

27

VOUT

12

EN

28

VOUT

13

OVP

29

VOUT

14

NC

30

VOUT

15

GND

31

VOUT

16

NC

32

VOUT

FIGURE 2. Terminal connections - continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 18

Device type02

Case outline

Y

Terminal
symbol

I/O

VIN

I

Switch input. Input bypass capacitor recommended for minimizing
VIN dip.

EN

I

Active high switch control input. Do not leave floating.

OVP

I

Overvoltage protection. Programmable using an external resistor
divider. If no OVP is desired, this pin should be connected to GND.

SS

I/O

Switch slew rate control. Can be left floating.

GND

---

Device ground.

RTIMER

I/O

IL

I/O

ILTIMERICSO

Capacitor programmed fault timer control during disabled and retry
mode. Connecting this pin to GND holds the switch disabled until the
EN pin is cycled. Do not float this pin or connect it to VIN.
Programmable using an external resistor to GND.
Do not float this pin.
Capacitor programmed fault timer control during current limiting
mode. Connecting this pin to VIN uses the internal current limit timer
and connecting this pin to GND disables the internal timer
functionality for the ILTIMER as well as retry mode. In this case, thedevice will remain at programmed current limit indefinitely in the eventof a short without going intro retry mode. Do not float this pin.
Current sense pin proportional to output current.
Connect a resistor to GND.

VOUT

O

Switch output. A minimum 10 µF output capacitor is recommended.

NC

---

Thermal pad---

No connect. This pin is not internally connected. It is recommended
to connect these pins to GND to prevent charge buildup; however,these pins can also be left open or tied to any voltage between GND
and VIN.
Thermal pad (exposed center pad) for heat dissipation purposes.
Thermal pad is internally connected to seal ring and GND.

Description

FIGURE 2. Terminal connections - continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 19

FIGURE 3. EN signal low time to restart device waveform. (tLOW)

FIGURE 4. tCSEN waveforms.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 20

FIGURE 5. VOUT current to CS change delay time.

FIGURE 6. Internal ILTIMER waveforms.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 21

4. VERIFICATION
4.1 Sampling and inspection. For device classes N, P, Q, Y, and V, sampling and inspection procedures shall be in accordancewith MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein.
4.2 Screening. For device classes N, P, Q, Y, and V, screening shall be in accordance with MIL-PRF-38535, and shall be
conducted on all devices prior to qualification and technology conformance inspection.
4.2.1 Additional criteria for device classes N, P, Q, Y and V.
a.

Test condition A, B, C and D. Burn-in test shall be performed in accordance with method 1015 of MIL-STD-883. Burn-in test
duration, test condition and test temperature, or approved alternatives shall be specified in the device manufacturer's QM
plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level controlof the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be madeavailable to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, andpower dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883.

b.

Unless otherwise specified in the QM plan, for devices class N, P, Q, Y, and V, dynamic burn-in shall be performed with test
condition D, method 1015 of MIL-STD-883.

c.

For devices class P, Y, and V, interim and post burn-in final electrical test delta parameters shall be specified in delta burn-intable IIB herein.

4.3 Qualification inspection. Qualification inspection for device classes N, P, Q, Y, and V shall be in accordance with
MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E
inspections (see 4.4.1 through 4.4.5).
4.4 Conformance inspection. Technology conformance inspection for classes N, P, Q, Y, and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein.
4.4.1 Group A inspection.
a.

Tests shall be as specified in table IIA herein.

b.

Subgroups 7 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted.

4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be
as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained underdocument revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available tothe acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as
applicable, in accordance with the intent specified in method 1005 of MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
Preconditioning shall be performed on non hermetic device classes N, P, and Y surface mount devices as specified in the
manufacturer’s QM plan. Thermal shock is not applicable to class N, P, and organic class Y.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 22

TABLE IIA. Electrical test requirements.
Test requirements

Subgroups(in accordance with MIL-PRF-38535, table III)
Deviceclass N

Deviceclass P

Deviceclass Q

Deviceclass V

Deviceclass YInterim (pre burn-in) electricalparameters, (see 4.2)

1, 2, 3,9, 10, 11

1, 2, 3,9, 10, 11

1, 2, 3,9, 10, 11

1, 2, 3,9, 10, 11

1, 2, 3,9, 10, 11

Post burn-in electricalparameters (see 4.2.1)

1, 2, 3, 4, 1/
5, 6, 9, 10,
11

1, 2, 3, 1/ 2/
4, 5, 6, 9, 10,
11

1, 2, 3, 4, 5,
6, 9, 10, 11

1, 2, 3, 4, 5, 6,
9, 10, 11

1, 2, 3, 1/ 2/
4, 5, 6,9, 10, 11
1, 2, 3, 4, 5, 6,
9, 10, 11

1, 2, 3, 1/
4, 5, 6, 9,
10, 11

Group A (Final electrical) test
requirements (see 4.4.1)

1, 2, 3, 1/
4, 5, 6,9, 10, 11
1, 2, 3, 4, 5, 6,
9, 10, 11Group C end-point electricalparameters (see 4.4.2)

1, 2, 3, 4, 5,
6, 9, 10, 11

1, 2, 3, 4, 2/
5, 6, 9, 10, 11

1, 2, 3, 4, 5, 6,
9, 10, 11Group D end-point electricalparameters (see 4.4.3)

1, 4, 91, 4, 91, 4, 91, 2, 3, 2/
4, 5, 6,9, 10, 11
1, 4, 91, 4, 9Group E end-point electricalparameters (see 4.4.4)

1, 4, 91, 4, 91, 4, 91, 4, 91, 4, 91, 2, 3, 4, 5,
6, 9, 10, 11
1, 2, 3, 4, 5,
6, 9, 10, 11

1/

PDA applies to subgroup 1.

2/

Delta limits as specified in table IIB shall be required where specified, and the delta limits shall be completed withreference to the previous electrical parameters.
TABLE IIB. Burn-in and operating life test delta parameters. TA = +25°C.
Parameters

SymbolQuiescent current

IQ

Conditions

Device type

Limit

01, 02±275 µA

01, 02±5 µA

01, 02±125 µA

01, 02±190 µA

IOUT = 0 mA,
VIN = EN = 5 V,
CS resistor of 20 kΩ to
GND

VIN to VOUT
forward leakage
current

IF

VIN off-state
supply current
Reverse current
protection leakage
current

ISD VIN
IRCP

EN = GND,VOUT = 0 V
EN = 0 V,
VIN = 0 to 7 V
VOUT = 0 to 7 V for
VOUT > VIN

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 23

4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured(see 3.5 herein).
a.

RHA levels for device classes N, P, Q, Y, and V, shall be as specified in MIL-PRF-38535 and the end-point electricalparameters subgroups shall be as specified in table IIA herein.

b.

For device classes N, P, Q, Y, and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. All device classes must meet the postirradiation end-point
electrical parameter limits as defined in table IA at TA = +25°C ±5°C, after exposure, to the subgroups specified intable IIA herein.

4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019 condition A and D for device type 01 and condition A for device type 02 and as specified herein. The total dose
requirements shall be as defined within paragraph 1.5 herein.
4.4.4.2 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be required onclass V and P devices (see 1.5 herein). SEP testing shall be performed on actual devices or technology process on the Standard
Evaluation Circuit (SEC) as approved by the qualifying activity at initial qualification and after any design or process changes which
may affect the upset or latchup characteristics. ASTM standard F1192 or JESD57 may be used as a guideline when performing
SEP testing. The test conditions for SEP are as follows:a.

The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive(i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related affects is allowed.

b.

The fluence shall be ≥ 100 errors or ≥ 107 ions/cm2.

c.

The flux shall be between 102 and 105 ions/cm2/s. The cross-section shall be verified to be flux independent bymeasuring the cross-section at two flux rates which differ by at least an order of magnitude.

d.

The particle range shall be ≥ 20 micron in silicon.

e.

The test temperature shall be +125°C ±10% for SEL.

f.

For SEP test limits, see table IB herein.

g.

For SEL test limits, see table IB herein.

h.

For SEFI test limits, see table IB herein.

5. PACKAGING
5.1 Packaging requirements. The requirements for packaging for device classes N, P, Q, Y, and V shall be in accordance with
MIL-PRF-38535.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original
equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor preparedspecification or drawing.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for theindividual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal, or emailcommunication.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 24

6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires
configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and thislist will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices(FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990, or
telephone (614) 692-0591.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply. Sources of supply for device classes N, P, Q, Y, and V are listed in MIL-HDBK-103 and QML-38535.
The vendors listed in MIL-HDBK-103 and QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land andMaritime-VA and have agreed to this drawing.
6.7 Additional information. When applicable, a copy of the following additional data shall be maintained and available fromthe device manufacturer:
a. RHA test conditions of SEP.
b. Occurrence of latch-up (SEL).
c. Occurrence of burnout (SEB).
d. Occurrence of gate rupture (SEGR).
e. Occurrence of functional interrupt (SEFI).

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 25

APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-17220
A.1 SCOPE
A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers
approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using chip
and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of military highreliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number (PIN). Whenavailable, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
A.1.2 PIN. The PIN is as shown in the following example:
5962

RFederalstock classdesignator\

RHA
designator(see A.1.2.1)

17220

\/
Drawing number

/

01

V

9

A

Devicetype(see A.1.2.2)

Deviceclass
designator(see A.1.2.3)

Die
code

Die
details(see A.1.2.4)

A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels.
A dash (-) indicates a non-RHA die.
A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type

Generic number

01

TPS7H2201-SP

Circuit function
7 volt, 6 amp load switch

A.1.2.3 Device class designator.
Device class
Q or V

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

Device requirements documentation
Certification and qualification to the die requirements of MIL-PRF-38535

SIZE

5962-17220

A

REVISION LEVELBSHEET 26

APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-17220
A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding pad
location(s) and related electrical function(s), interface materials, and other assembly related information, for each product and variant
supplied to this appendix.
A.1.2.4.1 Die physical dimensions.
Die type

Figure number

01

A-1

A.1.2.4.2 Die bonding pad locations and electrical functions.
Die type

Figure number

01

A-1

A.1.2.4.3 Interface materials.
Die type

Figure number

01

A-1

A.1.2.4.4 Assembly related information.
Die type

Figure number

01

A-1

A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details.
A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details.
A.1.5 Radiation features. See paragraph 1.5 herein for details.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 27

APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-17220
A.2 APPLICABLE DOCUMENTS.
A.2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part ofthis drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in thesolicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONMIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDSMIL-STD-883 -Test Method Standard Microcircuits.

DEPARTMENT OF DEFENSE HANDBOOKSMIL-HDBK-103 MIL-HDBK-780 -List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.

(Copies of these documents are available online at https://quicksearch.dla.mil/.)
A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specificexemption has been obtained.
A.3 REQUIREMENTS
A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein and the manufacturer’s QM plan for device classes Q and V.
A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figures A-1.
A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as
specified in A.1.2.4.2 and on figures A-1.
A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figures A1.
A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figures A-1.
A.3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.4 herein.
A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electricalperformance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this document.
A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient tomake the packaged die capable of meeting the electrical performance requirements in table IA.
A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer,
shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed in A.1.2 herein.
The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 28

APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-17220
A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate ofcompliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this appendix shall affirm
that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein.
A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be
provided with each lot of microcircuit die delivered to this drawing.
A.4 VERIFICATION
A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM plan shallnot affect the form, fit, or function as described herein.
A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the
manufacturer’s QM plan. As a minimum, it shall consist of:a.

Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, method 5007.

b.

100% wafer probe (see paragraph A.3.4 herein).

c.

100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the alternate
procedures allowed in MIL-STD-883, method 5004.

A.4.3 Conformance inspection.
A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see A.3.5
herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of packaged die
shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4, 4.4.4.1, and 4.4.4.2
herein.
A.5 DIE CARRIER
A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or as
specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical andelectrostatic protection.
A.6 NOTES
A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and logistics
purposes.
A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime -VA, Columbus, Ohio,
43218-3990 or telephone (614)-692-0591.
A.6.3 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in
MIL-HDBK-103 and QML-38535. The vendors listed within MIL-HDBK-103 and QML-38535 have submitted a certificate ofcompliance (see A.3.6 herein) to DLA Land and Maritime -VA and have agreed to this drawing.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 29

APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-17220
Bond pad coordinates in microns
DESCRIPTIONPAD NUMBER

X MIN

Y MIN

X MAX

Y MAX

VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
AVDD
AVDD
CS
EN
OVP
GND
GND
RTIMERIL
ILTIMER
SS
VOUT
VOUT
VOUT
VOUT

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35

679.75286.85286.85679.75286.85679.75286.85679.75286.85679.75286.85679.75286.85679.75286.85679.75286.85679.75286.85679.75
61.1
61.1
61.1
61.1
61.1
452.45641.953103.23683.43683.43683.43457.43064.53457.43064.55529
5529
5343.55343.55157.15157.14970.65
4970.654053
4053
3867.53867.53681.13681.13494.653494.652572.852572.852384.852384.852046.7
1857.21645.31080.75
451.4
61.1
61.1
61.1
652.7
1221.41715.652384.852384.852572.852572.85

835.25442.35442.35835.25442.35835.25442.35835.25442.35835.25442.35835.25442.35835.25442.35835.25442.35835.25442.35835.25
216.6
216.6
216.6
216.6
216.6
607.95797.453258.73838.93838.93838.93612.93220
3612.93220

5684.55684.55499
5499
5312.65312.65126.155126.154208.54208.54023
4023
3836.63836.63650.153650.152728.35
2728.35
2540.35
2540.35
2202.2
2012.71800.81236.25
606.9
216.6
216.6
216.6
808.2
1376.91871.152540.35
2540.35
2728.35
2728.35

FIGURE A-1. Die bonding pad locations and electrical functions.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 30

APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-17220
Bond pad coordinates in microns
DESCRIPTION
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT

PAD
NUMBER
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51

X MIN

Y MIN

X MAX

Y MAX

3457.43064.53457.43064.53457.43064.53457.43064.53457.43064.53457.43064.53457.43064.53457.43064.53494.653494.653681.13681.13867.53867.54053
4053
4970.65
4970.655157.15157.15343.55343.55529
5529

3612.93220
3612.93220
3612.93220
3612.93220
3612.93220
3612.93220
3612.93220
3612.93220

3650.153650.153836.63836.64023
4023
4208.54208.55126.155126.155312.65312.65499
5499
5684.55684.5FIGURE A-1. Die bonding pad locations and electrical functions - continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 31

APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-17220

FIGURE A-1. Die bonding pad locations and electrical functions - continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 32

APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-17220

Die physical dimensions :Die size: 3510 µm x 5670 µm
Die thickness: 15 mils ±1 milsInterface materials.
Top metallization: Al
Backside metallization: Bare backGlassivation.
Type: Nitride
Thickness: 11 kÅ
Substrate: Single crystal silicon
Assembly related information.
Substrate potential: Ground
Special assembly instructions: None

FIGURE A-1. Die bonding pad locations and electrical functions - continued.

STANDARD
MICROCIRCUIT DRAWINGDLA LAND AND MARITIMECOLUMBUS, OHIO 43218-3990

DSCC FORM 2234
APR 97

SIZE

5962-17220

A

REVISION LEVELBSHEET 33

STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 23-12-19
Approved sources of supply for SMD 5962-17220 are listed below for immediate acquisition information only andshall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will berevised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and acertificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information
bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime
maintains an online database of all current sources of supply at https://landandmaritimeapps.dla.mil/programs/smcr/.
Standard
microcircuit drawing
PIN 1/

VendorCAGE
numberVendorsimilar
PIN 2/

5962-1722001VXC

01295

TPS7H2201-SP

5962R1722001VXC

01295

TPS7H2201-RHA

5962R1722001V9A

01295

TPS7H2201-KGD

5962R1722002PYE

01295

TPS7H2201-QMLP

1/ The lead finish shown for each PIN is the most readily
available from the manufacturer listed for that part.
If the desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may notsatisfy the performance requirements of this drawing.

Vendor CAGE
number01295

Vendor nameand address
Texas Instruments Incorporated
Semiconductor Group
8505 Forest Lane
P.O. Box 660199
Dallas, TX 75243

The information contained herein is disseminated for convenience only and theGovernment assumes no liability whatsoever for any inaccuracies in theinformation bulletin.