COMMON INFORMATION
TB451
Rev.0.00
Dec 8, 2014

PCB Assembly Guidelines for Intersil Wafer Level Chip Scale Package Devices

Introduction
There is an industry-wide trend towards using the smallest
package possible for a given pin count. This is driven primarily
by the handheld products market where the trend towards
thinner, lighter, and low electrical parasitic packages is
extremely important. The Wafer Level Chip Scale Package(WLCSP) offers the smallest footprint per pin count at a given
pitch. Intersil's WLCSP allows direct connections between
silicon IC and printed circuit board (PCB) through solder ballsby directly connecting solder balls on the silicon die tocorresponding metal pads on the PCB. Figure 1 displays apicture of an Intersil WLCSP part.
Some salient features and advantages of Intersil's WLCSP are
as follows:

SOLDER BALL: Sn/Ag/Cu
TOP METAL LAYERPASSIVATIONSILICON

UNDER BUMP METAL (UBM)POLYIMIDE REPASSIVATIONMARKING SURFACEFIGURE 2. CROSS SECTION OF INTERSIL’S WLCSP(BALL ON PAD VERSION)• Saves board real-estate by providing smallest footprint
per I/O• Ball pitch of 0.5mm or 0.4mm allows assembly withstandard SMT equipment

SOLDER JOINTSOLDER MASKINTERSIL WLCSP• No underfill is required (See “Frequently Asked Questions”
on page 5.)

PCB• Completely lead-free and RoHS compliant• MSL1 moisture sensitivity at +260°C per JEDEC J-STD-020• Better electrical parasitics due to elimination of wires andleads• Shipped in tape and reel per EIA 481-1

PCB MOUNTING PADS

FIGURE 3. INTERSIL’S WLCSP MOUNTED ON PCBIntersil's WLCSP Package Data
Table 1 lists Intersil's WLCSP bump count options.
TABLE 1. PACKAGE OFFERINGSFIGURE 1. INTERSIL WLCSPThe purpose of this technical brief is to outline the basic
guidelines to use the Intersil WLCSP package to ensure
consistent PCB assembly necessary to achieve high yield andreliability.
Figure 2 shows a cross section of Intersil's WLCSP. Figure 3
shows Intersil WLCSP mounted on PCB.

TB451 Rev.0.00
Dec 8, 2014

BUMP COUNTARRAY TYPE

4

2x2

6

2x3

8

3x3

9

3x3

10

3x4

16

4x4

20

4x5

25

5x5

30

5x6

36

6x6

42

6x7

49

7x7

56

7x8

64

8x8

72

8x9

Page 1 of 6

PCB Assembly Guidelines for Intersil
Wafer Level Chip Scale Package
TABLE 1. PACKAGE OFFERINGS (Continued)

TABLE 2. PCB MOUNTING PAD AND STENCIL PARAMETERS

BUMP COUNTARRAY TYPE

81

9x9

Mounting Pad Shape

Round

90

9x10

Mounting Pad Material

Copper100

10x10

Pad Finish

110

10x11

OSP or Ni-Au (Au <0.5micron to
avoid solder joint embrittlement)

121

11x11

Nominal PCB Pad Diameter

280µm for 0.5mm pitch and 240µm
for 0.4mm pitch (+0/-25µm)

Pad thickness<1 oz. (30µm)

Key Considerations for WLCSP Application
on PCBDESCRIPTION

0.4mm AND 0.5mm PITCH

Clearance between Mounting Pad 1 mil optimum (Figure 6)
and Solder Mask (in NSMD)(25µm)• PCB mounting pads need to be controlled in terms of shapes
and sizes, since they control the final dimensions of the solder
joint between board and package.

Stencil Fabrication• Solder paste deposit used to attach the Intersil WLCSP devices
to the board which subsequently becomes part of the solder
joint, must be defined and controlled.

Laser cut stainless steel followed byelectropolish; chemical etch method
not recommended

Stencil Thickness

0.100mm to 0.125mm

Stencil Apertures

5º tapered, trapezoidal square
0.25mmx0.25mm (±0.025mm)• Solder reflow process that forms the final solder joint should
comply with standard JEDEC reflow profiles and solder paste
manufacturing recommendations.
• Small size of the devices and solder balls require automatic
pick-and-place equipment and handling.
• Subsequent paragraphs provide more details on these items.
• WLCSP products (like other surface mount products) should
not be subjected to wave solder on the PCB side that has thepart mounted to it.

Printed Circuit Board (PCB)
Design Parameters
Key Considerations• Table 2 lists recommended PCB mounting pad and solder
paste printing stencil parameters.
• Non-Solder Mask Defined (NSMD) or Metal Pad Defined pad
construction is preferred over Solder Mask Defined (SMD)
construction.
• Symmetric placement of exit traces recommended (in case of
NSMD) to avoid component rotation during reflow due tosurface tension of molten solder.
• Via-in-pad structures may be used for higher bump countdevices when escape routing is not adequate between pads.
• For dog-bone type via connections, vias connected to the PCB
mounting pads using traces should have a minimum length of
10 mils (0.254mm) for the connecting trace and should notexceed 2/3 of the pad diameter for the via diameter. (SeeFigure 4.)

TB451 Rev.0.00
Dec 8, 2014

10 mils (0.254mm)
MINIMUM

MOUNTING PAD

VIA

FIGURE 4. MOUNTING PAD TO VIAIntersil WLCSP mounting pads that are directly connected to aground plane or power plane are to be connected with amaximum of two traces of 10 mils (0.254mm) minimum length.
The two traces should be at least 90° apart. (See Figure 5.)
10 mils (0.254mm)
MINIMUM

MOUNTING PAD

VSS/VCC PLANE

FIGURE 5. MOUNTING PAD TO VSS/VCC PLANEPCB Solder Mask Opening
The PCB solder mask opening shall be larger than the PCB
mounting pad (NSMD) by 1 mil (0.0254mm) per side as shown in
Figure 6.

Page 2 of 6

PCB Assembly Guidelines for Intersil
Wafer Level Chip Scale Package
OPTIMUM 1 mil (0.025mm) CLEARANCE BETWEENMOUNTING PAD AND SOLDER MASK

Typical Assembly Flow for Surface Mount ofIntersil WLCSPFigure 7 outlines important considerations for using Intersil
WLCSP packages within the typical process flow.

10 mils (0.254mm)
MINIMUM

SOLDER PASTE
PRINTING
MOUNTING PAD

STEP 1SOLDER MASKVSS/VCC PLANEVISUALINSPECTION

FIGURE 6. SOLDER MASK TO MOUNTING PAD CLEARANCE FOR
NSMD PAD

Artwork Critical Dimension Check
During the data conversion from design software to PCB
fabrication artwork the critical dimensions may be changed byrounding-off errors in the software. The critical dimensions need
to be verified on the artwork before PCB manufacturing.
1. Mounting pad to mounting pad pitch

SOLDER DEPOSITHEIGHT INSPECTIONPICK AND PLACEWLCSPSTEP 2

VISUALINSPECTION
X-RAY
INSPECTION

2. Mounting pad diameter
3. Solder mask opening

REFLOW

STEP 3

FINAL/X-RAY
INSPECTIONSTEP 4

4. Alignment of solder mask opening with mounting pad

Intersil WLCSP Mounting
Guideline

FIGURE 7. ASSEMBLY PROCESS FLOW

Typical Assembly Procedures

Step 1: Stencil for Solder Paste Printing

The assembly procedure for Intersil WLCSP packages iscompatible with industry standard surface mount procedures, as
exemplified in IPC-CM-770 and IPC-A-610 class 2 standards.
Modern practice usually includes a controlled environment with atemperature of +22ºC ±3ºC and a relative humidity of 50%±10%. ESD protection should be used in all process steps.

Solder paste printing is performed using a stencil using astandard stencil printer. The squeegee speed and pressure
should be adjusted per solder paste manufacturer's
recommendation. The PCB should be supported during theprinting process to prevent bending of the PCB.
Use of type 3 (25 micron to 45 micron particle size range) or finersolder paste is recommended.
The solder paste height should be measured as needed toconfirm stencil thickness and tolerance of ±0.5 mil (±0.012mm)
per Figures 8A and 8B.

FIGURE 8A. SOLDER PASTER PATTERN - TOP VIEW
STENCIL THICKNESS WITH
TOLERANCE OF ±0.5 mils(±0.013mm)

FIGURE 8B. CROSS-SECTION (AA FROM Figure 8A) OF SOLDER
PASTE DEPOSIT

TB451 Rev.0.00
Dec 8, 2014

Page 3 of 6

PCB Assembly Guidelines for Intersil
Wafer Level Chip Scale Package
The PCB should be transferred to the pick-and-place machine
within the time limit specified by the solder paste manufacturer
after solder paste printing.

Step 2: Pick-and-Place• Place the Intersil WLCSP on PCB according to the parts list andthe assembly drawing using a pick and place machine with
optical alignment.
• Verify Intersil WLCSP alignment using package orientation
pin 1 marker.
• It is not recommended to use chipshooters without adequate
adjustments to minimize vibrations and placer errors.
• Ensure minimal force is used for pick-and-place of the Intersil
WLCSP to avoid physical damage. Z-height control method ispreferred over force control.
• Maximum Z axis force on the WLCSP should be 10N.
• It is recommended that bumps be dipped into solder paste on
PCB to greater than 20% of paste block height.
• Side view of Intersil WLCSP placement on PCB is shown in
Figure 9.

Step 3: Reflow and Cleaning
Intersil WLCSP's are compatible with industry standard reflow
and cleaning processes and are qualified per J-STD-020. Actual
board assembly profiles should be developed based on specificprocess needs and board designs and should not exceed theparameters provided in the aforementioned standard.

Step 4: Final/X-Ray Inspection
Verify assembly quality using available inspection techniquessuch as transmission X-ray inspection. The side view of the final
configuration is shown in Figure 10. There should be no shorts,
no solder bridging between solder bumps and no loose solder
balls under or around the WLCSP device.
NOTE: Intersil WLCSP parts do not require underfill, and are
qualified without the use of it. Use of underfill in application, if
desired by the end-user, should involve careful selection of thematerial so as to avoid problems caused by a mismatchedmaterial choice.
SOLDER JOINTINTERSIL WLCSPSOLDER BALL/BUMP
INTERSIL WLCSPPCBSOLDER MASKSOLDER PASTE

PCB MOUNTING PADS

FIGURE 10. INTERSIL WLCSP MOUNTED TO A PCB BOARD
PCB
SOLDER MASK

Board-Level Reliability Data
PCB MOUNTING PADS

Intersil WLCSP tests and passing criteria are shown in Table 3.

FIGURE 9. INTERSIL WLCSP PLACEMENT ON MOUNTING PAD
WITH SOLDER PASTE - SIDE VIEWTABLE 3. BOARD LEVEL RELIABILITY DATA FOR INTERSIL'S WLCSPTB451 Rev.0.00
Dec 8, 2014

RELIABILITY TESTRESULT

HAST

Passed +130°C/85% RH for 96 hrs

TC

Passed 500 cycles of -40°C to +125°C

THB

Passed +85°C/85% RH for 1000 hrs

HTOL

Passed 1000 hrs at +125°C

HTS

Passed 1000 hrs at +150°C

Page 4 of 6

PCB Assembly Guidelines for Intersil
Wafer Level Chip Scale Package

Frequently Asked Questions

Thermal Characteristics
Intersil WLCSP thermal impedance data is listed in Table 4.
TABLE 4. THERMAL IMPEDANCE DATA IN NATURAL CONVECTION(STILL AIR) PER JESD 51-7 AND JESD 51-9
BUMP
COUNT

DIE SIZE X DIE SIZE(mm)
Y (mm)

PITCH
(mm)

JEDEC
PCB
TYPE

TJA
Psi-JB(°C/W) (°C/W)

8

3

3

0.5

2S2P +
vias

74.2

33.4

16

1.65

1.65

0.4

2S2P +
vias

59.6

-

36

5

5

0.5

2S2P +
vias

39.9

15.2

ReworkRework procedures are identical to BGA.
Rework profile should duplicate original reflow profile used inassembly.
Rework system should include localized convection heating,bottom side heating and a pick-and-place device. System should
also provide thermal profile capability.

TB451 Rev.0.00
Dec 8, 2014

Question: Does WLCSP package require use of underfill uponboard mount?
Answer: No. Intersil WLCSP packages are qualified to be usedwithout any underfill. However, customers may use it based on
their preference while taking precaution to ensure properties of
the underfill, for example Tg and CTE, do not negatively impact
reliability of the WLCSP.
Question: Will the WLCSP package get damaged during board
mount?
Answer: WLCSP is basically silicon die with solder bumps which
can be damaged if mishandled or subjected to excessive
mechanical force. Board mounting performed per Intersil’s SMT
guideline will ensure such issues do not occur. Manually
removing and reattaching a WLCSP will pose very high risk ofdamaging the package
Question: Is there a marking or traceability information on the
WLCSP package?
Answer: Yes. The unbumped side of the package is laser marked
with pin 1 identification, product code and manufacturing batch
traceability information.
Question: Does the WLCSP package have backside coating?
Answer: Backside coating is offered selectively for certain
products or package size. Contact intersil.com/support for moredetails.

Page 5 of 6

Notice1.

Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible forthe incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by
you or third parties arising from the use of these circuits, software, or information.

2.

Renesas Electronics hereby expressly disclaims any warranties against and liability for infringement or any other claims involving patents, copyrights, or other intellectual property rights of third parties, by orarising from the use of Renesas Electronics products or technical information described in this document, including but not limited to, the product data, drawings, charts, programs, algorithms, and application
examples.

3.

No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others.

4.

You shall not alter, modify, copy, or reverse engineer any Renesas Electronics product, whether in whole or in part. Renesas Electronics disclaims any and all liability for any losses or damages incurred by

5.

Renesas Electronics products are classified according to the following two quality grades: “Standard” and “High Quality”. The intended applications for each Renesas Electronics product depends on theyou or third parties arising from such alteration, modification, copying or reverse engineering.

product’s quality grade, as indicated below.
"Standard":

Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronicequipment; industrial robots; etc.

"High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control (traffic lights); large-scale communication equipment; key financial terminal systems; safety control equipment; etc.
Unless expressly designated as a high reliability product or a product for harsh environments in a Renesas Electronics data sheet or other Renesas Electronics document, Renesas Electronics products are
not intended or authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems; surgical implantations; etc.), or may cause
serious property damage (space system; undersea repeaters; nuclear power control systems; aircraft control systems; key plant systems; military equipment; etc.). Renesas Electronics disclaims any and all
liability for any damages or losses incurred by you or any third parties arising from the use of any Renesas Electronics product that is inconsistent with any Renesas Electronics data sheet, user’s manual orother Renesas Electronics document.
6.

When using Renesas Electronics products, refer to the latest product information (data sheets, user’s manuals, application notes, “General Notes for Handling and Using Semiconductor Devices” in thereliability handbook, etc.), and ensure that usage conditions are within the ranges specified by Renesas Electronics with respect to maximum ratings, operating power supply voltage range, heat dissipation
characteristics, installation, etc. Renesas Electronics disclaims any and all liability for any malfunctions, failure or accident arising out of the use of Renesas Electronics products outside of such specified
ranges.

7.

Although Renesas Electronics endeavors to improve the quality and reliability of Renesas Electronics products, semiconductor products have specific characteristics, such as the occurrence of failure at a
certain rate and malfunctions under certain use conditions. Unless designated as a high reliability product or a product for harsh environments in a Renesas Electronics data sheet or other Renesas
Electronics document, Renesas Electronics products are not subject to radiation resistance design. You are responsible for implementing safety measures to guard against the possibility of bodily injury, injury
or damage caused by fire, and/or danger to the public in the event of a failure or malfunction of Renesas Electronics products, such as safety design for hardware and software, including but not limited to
redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficultand impractical, you are responsible for evaluating the safety of the final products or systems manufactured by you.

8.

Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. You are responsible for carefully andsufficiently investigating applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive, and using Renesas Electronics
products in compliance with all these applicable laws and regulations. Renesas Electronics disclaims any and all liability for damages or losses occurring as a result of your noncompliance with applicablelaws and regulations.

9.

Renesas Electronics products and technologies shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws
or regulations. You shall comply with any applicable export control laws and regulations promulgated and administered by the governments of any countries asserting jurisdiction over the parties ortransactions.

10. It is the responsibility of the buyer or distributor of Renesas Electronics products, or any other party who distributes, disposes of, or otherwise sells or transfers the product to a third party, to notify such third
party in advance of the contents and conditions set forth in this document.
11. This document shall not be reprinted, reproduced or duplicated in any form, in whole or in part, without prior written consent of Renesas Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products.
(Note 1)

“Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its directly or indirectly controlled subsidiaries.

(Note 2)

“Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
(Rev.4.0-1 November 2017)

http://www.renesas.com

SALES OFFICES
Refer to "http://www.renesas.com/" for the latest and detailed information.
Renesas Electronics America Inc.
1001 Murphy Ranch Road, Milpitas, CA 95035, U.S.A.
Tel: +1-408-432-8888, Fax: +1-408-434-5351
Renesas Electronics Canada Limited
9251 Yonge Street, Suite 8309 Richmond Hill, Ontario Canada L4C 9T3
Tel: +1-905-237-2004
Renesas Electronics Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K
Tel: +44-1628-651-700, Fax: +44-1628-651-804
Renesas Electronics Europe GmbH
Arcadiastrasse 10, 40472 Düsseldorf, Germany
Tel: +49-211-6503-0, Fax: +49-211-6503-1327
Renesas Electronics (China) Co., Ltd.
Room 1709 Quantum Plaza, No.27 ZhichunLu, Haidian District, Beijing, 100191 P. R. China
Tel: +86-10-8235-1155, Fax: +86-10-8235-7679
Renesas Electronics (Shanghai) Co., Ltd.
Unit 301, Tower A, Central Towers, 555 Langao Road, Putuo District, Shanghai, 200333 P. R. China
Tel: +86-21-2226-0888, Fax: +86-21-2226-0999
Renesas Electronics Hong Kong Limited
Unit 1601-1611, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong
Tel: +852-2265-6688, Fax: +852 2886-9022
Renesas Electronics Taiwan Co., Ltd.
13F, No. 363, Fu Shing North Road, Taipei 10543, Taiwan
Tel: +886-2-8175-9600, Fax: +886 2-8175-9670
Renesas Electronics Singapore Pte. Ltd.
80 Bendemeer Road, Unit #06-02 Hyflux Innovation Centre, Singapore 339949
Tel: +65-6213-0200, Fax: +65-6213-0300
Renesas Electronics Malaysia Sdn.Bhd.
Unit 1207, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: +60-3-7955-9390, Fax: +60-3-7955-9510
Renesas Electronics India Pvt. Ltd.
No.777C, 100 Feet Road, HAL 2nd Stage, Indiranagar, Bangalore 560 038, India
Tel: +91-80-67208700, Fax: +91-80-67208777
Renesas Electronics Korea Co., Ltd.
17F, KAMCO Yangjae Tower, 262, Gangnam-daero, Gangnam-gu, Seoul, 06265 Korea
Tel: +82-2-558-3737, Fax: +82-2-558-5338© 2018 Renesas Electronics Corporation. All rights reserved.
Colophon 7.0