What is VisualSim• System-level modeling and simulation software.
• Systems architecture exploration.
• For electronics, software, network and semiconductors.
• Analyze timing, power, and functionality.
• Validate specification for non-functional
need- requirements, cost, resources etc

Mirabilis Design Inc.
Quick Reference Card

 Blocks are color coded (Yellow – Traffic Generation /and restart from that point onwards. The sim times atprocessors and network nodes.
Traffic Reader/ Database, Red –Power Management,
which to save are set in PauseSimulationAt.txt which isPartitioning across AI tiles, Tensors, Deep Learning
variable list, ExpressionList, Blue – Behavior Mapping,located in the same directory as the model.
Units, CPU, GPU, DSP etc
Queuing/System/Server resources).
 Select the functions that need acceleration.
 Block Parameters
Generate document, test bench and UPF power table for VisualSim Cloud• Can reference a parameter or data structure field.
implementation and communication• Online version of the tool, that user can run without Ports
 Create custom and classified libraries and share it withinstalling the VisualSim in the local system.
• Input, Output or multiport (input-output).
others by encrypting the library.
• Requires OpenWebstart and Java 17 or higher.
Examples of Usage• Polymorphic –scalar, string or Software modeling for the hardware components with
• User can share the model from installed tool by export to• Aerospace - avionics, flight control, inertial
data structures.
simplified methods without affecting the accuracy.
web optioin and the user with VisualSim cloud can use
 Block Ports
navigation, communication, radar Run Complex models with different combination ofthat file to run and analyse the deisgn• If port has specific data type, then data coming
parameters as a batch run and compare results from• Communication- Software-Defined Radio, DSP-based
through the connected port must be the same type.
different runs.
communication systems, Antenna, 5G• Direction can be modified (Customize Ports).
 Debug and verify the design using diagnostic feature. Parser and External tool support• Networking - Custom protocols, arbitration,• Configure > Ports – Can add in/out ports to
Validate whether it meets the requirement or not.
• In built parser to convert files from external software orflow control
ExpressionList and Script blocks.
hardware to VisualSim.
• Automotive - Networks, security, safety, ECU•
Wires
ARXML,
AXI,
GEM5,
GCC
and
Spike
Working with VisualSim• Compute - SoC, processor, FPGA, TPU, HPC, media
 Represent a connection between ports.
1. Draw a block diagram of your proposed system on paper. • External tool to VisualSim, Support files from otherservers, switch
 Does not introduce any delays.
2. Open a new Block Diagram Editor.
softwaretoload
inVisualSim
models.
• Storage - SSD, HDD, NAS, DDRs, LPDDRs, HBM
 To connect port-to-port, press and hold at a port,
3. Drag blocks from the library, set parameters, andWhat can you do in VisualSim?
then drag, and release when connected to theconnect to create an architecture.
Batch Run and Multi Core Processing
other port.
• Resource sizing and capacity planning
4. Define the Task Graph of the system behavior. The• Batch Run
 If connected, line is thick, else thin.
 Size to support use cases and workloads
sensors and input interface must be defined in the Inbuilt Post Processor allows user to create batch files
 Combination of components, topology, speeds, width,• Relations
architecture
for a particular model to run multiple combinations of
bandwidth, buffers, cache, memory and power states 5. Map each task to an element or master in the Connect multiple input and Output ports.
parameters.
 Verify that the statistics meets the requirements.
architecture
 To connect, hold “Ctrl” key, and drag from relation
 Validate the system stability.
• Failure analysis
6. Simulate the system model for various configurations,to port.
 Enables recrusive analysis and comparison with
topologies, workload, and use cases.
 Timing and throughput when processing/ storage/
 Can connect relation to relation to arrange wiring.
different runs.
7. Define the requirements in the Diagnostic format.
network failure, change in software scheduling, Combine plots from different runs in a single window. • Annotation
network intrusion, reduced power and modify memory Require Diagnostic block in model Represent comments and documentation about the• Simulation on Multi core
8. Open the model in the Post Processor after adding thetables.
model.

Post
processor
creates
files
to
run
the
batch
simulation
PlotManager in the model. Define the list of parameters• Abstract design to cycle accurate design.
 Multiple annotation can be added and placed
on
the
local
systembyassigning
differentruns
toand the ranges of values to simulate. Select the plots and Build models in different levels of abstraction to focus
anywhere in the model to describe each block anddifferent cores of the system.
display to show. An Index file with the list of all possibleon specific part of the system or function.
flow.
 Increases paralleslism and fast simulation.
runs and a few other configuration files are created.
 Hybrid processor with cycle accurate memory
9. Run the Thread Sim from the command-line to distributearchitecture.
Block folders
GUI Concepts
the selected simulation runs across all available cores.
 Model behavioural components as resources to• Document – Describe the model• Block
10.
Review the generated statistics text files,
analyse timing and power.
• Model Setup – Basic model requirementsDefinesbasicfunctionality
suchastraffic,
FIFO,
recommendations
ontherequirements
andcompare• Power management, sizing and generation• Traffic – Generate transactions
arbitration, processor, storage, and statistics
plots using Post Processor
 Experiment with different sets of power states andgeneration.
11.
Auto-SaveisasettingintheConfig.Properties• Results – Output the simulation results
power management based on capacity and utilization
 Contains input/output ports, parameters.
that determines how often the currently modified file is• File IO – Read or write data from or into files andExtend the battery life.
 Initializes block based on the parameters andbeing saved to <User Home>/.VisualSim/ directory. The
database Size the power generator and battery.
functionality.
 Metrics for instant, total, average and individual device file name is name+time_and_date.xml. Note: The file is• Behavior – Implement the logic for the model Logic executes when inputs are received.
never deleted.
power.
• Mapper – Map the task to the resource Inputs can be read from files
Save and restarts is an option to save the state• Hardware-software partitioning and Task graph analysis 12.
• Resource – Consume time, quantity, and power Contains optional timing and power.
of the simulation at distinct points during a simulation
 Sequence the threads and processes across multiple• Power – Generate, store, consume, manage, and1

Mirabilis Design Inc.
Quick Reference Card(a) Block Name for Resources, Script, Architecture andis for the whole model.
• Listen to block: Right-click on the block and select Listen
Application-specific blocks must be unique in entire
 Block variables are defined and used in Script andto Block. Shows the sequence of execution in block.
model
ExpressionList blocks.
Verify if operation is correct. Listen to block can be Example: Buffer_Usage in Egress Queues or
enabled for every block except hierarchical blocks.
(b) Variables:
device available flag.
• Script Tracer: captures the execution of multiple scripts
i. Global must be unique in the entire modeland write the content in one file. Trace file will be saved • Transaction or Data Structureii.Local and Global names cannot overlapin (User folder)/.VisualSim. Helps to check if dependent Container with fields of any data type.
iii.Local and Block variable can overlap if
blocks have deadlock or error.
 Represent data details, control, and simulator
they are not in the same window or BDE• Listen to port: Right-click on the port and select. Check if
details.
(c) Parameters
the field values are correct.
 Example: Data, Priority, Command, Source,
i. Link from block in lower-level hierarchy to the• Animate Execution: Debug -> Animate Execution.
Destination, Time Stampparameter in the next-level above. Never jump from a
Shows order of execution. Identify if blocks are not• SampleDS = {Source_Name = “Sensor1”,
lower-level block or hierarchy to top-level parameter
executing, executing too many times or executing in
Destination_Name = “DRAM”,
ii. SharedParameter are stopTime and tResolution
the wrong order.
Priority= 1,(d)Instantiating simulator
User Documentation
DataSize= 64 ,• Block Breakpoints: Right-click on block and selecti. Required in top-level of Model, Dynamic Instantiation(a)Annotation: Provides textual information in the
CRC= “F822”,
Breakpoint. Stops model at a specific time in the block.
and Class
Block Diagram Window. (b)Block Documentation:
Length= 80}
Do a Listen to Block or Port at any block
Available in all blocks. Details of the block activity• Pause and resume: Stop and step through each event in • RegEx (Regular Expressions)and internal expressions can be added. Generated with
ii. Note: All parameters of the lower-level Simulators are Used in Parameter (Processed once at startup),
Export to Web. (c)Comments (/*….*/): Comments can be in the model PauseSimulationAt.txt and store in same
ignoreddirectory as model. Simulation stops at each timestamp
ExpressionList (Every entry), and Script
parameter, variable list, and any expression or script.
(e)Ports
to save current state of variables, queues, and Script line.
(Every entry or loop).
i. i. Input connect to output, except between block output
Simulation can be started from any of the specified time Collection of Math, Logic, Statistics, power access,and window output
Library Management
points.
resource internal access, array processing, andii. Multiport and In-Out port allows input and output• Creating Reusable Blocks or Class• Digital Debugger-> Pause / Summary – Only / Run: Pauseprogramming option for popular GUI functions.
of a device to be connected
stop simulation and restart. Summary –consolidated
1. Select blocks and parameters by left click and drag.
 Example: Buffer=getBlockStatus(“Egress”);(f) Zero-delay loop
value of time/number of executions of all blocks. Run2. Click Graph > Create Hierarchy, Disconnect alla = x.cos(90)i. When the wires between a set of ports areblock execution sequence.
connections to the created Hierarchical Block.
 Can include parameters, variables, and fields inconsidered a loop and there is no delay
3. Right-click the block and select ‘convert to class’.
• Diagnostic: Add requirements and constraints in a text
the expression.
interrupting this loop, a zero-delay loop error will
4. Right-click the block and select Open Block.
file and link it to the Diagnostic block. Simulation will
 Parameters can be used in LHS ( not in ExpressionLists
be generated
5. File > Save As (Directory must be undergenerate statistics and recommendation files, user canor Script blocks )ii.
To resolve this, add a Delay block with a value of 0.0
CLASSPATH – VS_AR) and select “Save Submodel Only”.
check if the requirements are met.
• Script(g) Virtual Connection
6. save the file with .xml extension.
• Additional: Text Display, Plotter, statistics, and Programming language for modelingi. IN, OUT, Script to Virtual Connection and scripts.
• Import Custom Blocks in Model
fileWriter to trace intermediate activity.
 Used to define algorithm and common data
Target names can be local (same window) or
1. Graph > Instantiate Class.
processing operations.
Methodology Concepts
global (entire model). Multiple Sources can go to a
2. Browse and select .xml file. Commit.
 Supports RegEx and common C functions.
• Parameters
single Script or OUT block.
• Adding Reusable Blocks to UserLibrary Blocking and non-blocking timing.
 Constants during simulation.
ii. Node block- connection-less. No wiring
1. Add block to model.
 Supports Virtual Connection
 Model Setup -> Parameter / Range / Pulldown.
required. Connections attribute are captured
2. Right-click block and select "Save Block in Library“.
 Can be modelled to implement any algorithm or logic
 Example: Processor_Clock = 250.0,
in the database associated with the Routing
3. UserLibrary.xml is opened and select File > Save.
 Can define Queue within a script
Traffic_Interval = 1.0e-6
Table.
4. Block available in Folder > UserLibrary.
 Can access and remove content of a Queue blockiii. Mapper-to-SystemResource: Names must match• Variables
virtually.
Debugging(h) Random Number Generators
 Similar to programming variables or hardware
 Power calculations can be made for the application or• Block highlighting: When error occurs, the block withi. No seed- random() and Gaussian. This means
registers.
algorithm implemented in the script.
that results from every run are different. It is
the error is highlighted in red. Narrows down which Defined in VariableList (Types – local and global).
not deterministic.
block has the error.
 Script block can define a global variable which can beii. Seed- rand, irand. Define model_seed as a
• Error Messages: Provide block location in designused in other blocks with the help of RegEx commands Scopeparameter with a value of seed(Long Value). For
The scope of names plays a major role in VisualSim. Herehierarchy and error details.
 Local is accessed only in current window and global
every seed value, the outputs will be deterministic
are the important items.
report• Hardware setup –Device modeling and overall systemsetup• ProcessorGenerator – New processor templateand models of commercial processors.
• Cycle_Accurate_Processor – Pipeline stages for
microarchitecture design.
• Memory – Model statistical and cycle-accurate
Memory and cache• Hardware Device – DMA, Buses and peripherals• Interfaces and Buses – Standards-based buses,
interconnects, and networks

2

Mirabilis Design Inc.
Quick Reference Cardacross any number of runsoRandom Early Detection• Failure Analysis
Connect Behavior and Architecture Inject fault or error into the system to observe the• Examples: Image read, decode, rotate, and transpose on • The following are the different Scheduling algorithms
stability.
supported :Modeling Methodology
ARM.
 Can be a data error, unsupported size, variable packet • Concept: (a) Used to add timing and power for eacho
FIFO
• Select the methodology for your system.
arrival rate, link failure, resource failure, etc.
o
FCFS
• Criteria for selection – Familiarity with modeling
function. (b) Mapper block (Behavior flow) sends
 Blocks: Traffic, Expression list, scriptoRound Robinmethod, shared resources across flows or hardware
transaction to SystemResource or Processor (Actual
Modeling DetailsoWeighted Round Robinor software only.
Hardware Unit). (c) Can be a static (fixed mapping) orWorkloadoDeficit Round Robin• In-Line Flow Descriptions
dynamic (resource selection is based on task type, first• Examples: Traffic to represent trigger behavior flow,oWeighted Fair Queuing Typical for stochastic studies, protocol, andavailable resource or prior executions).
network traffic, instruction sequence, Read/Writeo
Strict Priority
Ingress-Egress models.
• Block: (a) Behaviour: Mappers, SoftwareMapper,
request, Customers arriving at a bank teller.
 Shared resources accessed by individual flowoRound Robin Priority
DynamicMapper. (b) Architecture: SystemResource,• Description: Data Structure sent out to emulate thein a central location.
• If the user selects Deficit round robin or Weighted fair
SystemResource_Extend, SystemResource_Done
 Main blocks: Traffic, packet attributes (ExpressionList),
packet/command/customer.
queueing, a field called Task_Size is necessary.
• Operation: (a) Required fields for the SystemResource
timing (Queue, Server), and Script for arbitration• Blocks: Two main types – Distribution based (Traffic
are A_Time field has execution time, A_Priority field has• Separation of Behavior and Architecture
block), Trace file based (TrafficReader).
the task Priority, and A_Task_ID field has task identifier. Queuing Resources with pre-determined processing time Y-chart design approach• Use Script block to generate custom traffic.
• Examples: (a) Bus or network delay, processing with no(b) Mapping name must match a SystemResource. (c) Behavior flow is the sequence of functional operation
Workload Attributes
Mapper (behavior control block) sends the transaction to pre-emption.(b) Cross a traffic intersection. (c) All
in concurrent threads. No algorithm details or delays• Examples: Defines the workload such as priority, data
hardware blocks that consume time. Model time – andthe SystemResource or SystemResource_Extend
considered.
size, data value, type, address.
partition-based scheduling.
(followed by Done block) for processing.
 Architecture describes the platform – electronics,• Concept: (a) Update existing or new fields of incoming•
Concept:(a) Combines the queue and the processing in a
RTOS, and middleware.
Resources
transaction. (b) Use RegEx, parameters, fields and For each task in the flow, use mapper block to• Examples: (a) Processor, memory, bus, queue and switch. single block. (b) Has multiple concurrent flows
variables to provide computed values or to selectlink to SystemResource or Processor.
represented. (c) Slot based schedule provides different(b) Bank teller, shop-floor employee, toll road. (c)options.
 Main fields: Timing (A_Delay), Priority (A_Priority),
processing time for each queue in order.
Concept: Defines the entities that consume time and• Blocks: (a) ExpressionList and Script. (b) Support blocks
Task ID (A_Task_Address), and• Block: Server
quantity resources.
Task Name (A_Task_Name).
are Boolean switch, fork, and join.
• Input and Output: Transactions• Queueing Resource with time not known in advance.
• Hardware-only flow
In-line behavior and architecture• Key Fields: Queue_Number_Field (A_Task_Address),
Examples: (a) FIFO, Processor, (b) Bank teller, Traffic Architecture is built using cycle-accurate• Examples: Multi-port network switch, DSP functions in an intersection. Concept: (a) FIFO to wait for previous
Priority (A_Priority), Max_Queue_Length (Can be a
hardware blocks.
FPGA, manufacturing flow.
Parameter), Number_of_Queues (Can be a Parameter),transaction
tocomplete
processing.
(b)
Processingtime Traffic triggers the Processor, DMA or• Concept: Define the sequence of activity with queues,
Time_Field (A_Time)is performed out.
Device Interface.
arbitration, flow control, and processing times.
•
Blocks:SystemResource,
SystemResource_Extend,
Accessa shared System Resource from multiple
 Traffic can be data arriving at an interface,• Blocks: Traffic, ExpressionList, Script, Queue, Server
SystemResource_Done, Queues, Servers,
concurrent flows
Instruction sequence to a processor and Read/Write
Behavior Flow, Process, Thread and Tasks
to Memory.
QuantityResource• Examples: (a) Model the Y-chart concept of separating• Examples: Imaging pipeline, Customer consumption of Main blocks: Processor, Memory, Cache, DMA,
• Operation: (a) Transaction is first placed in the queue. (b) the behavior and architecture. (b) Processor, sharedBus, Switch, Bridge.
resources at a restaurant.
Queue is ordered based on priority of each transaction.
robot on a shop-floor.
 Define Accelerator: DeviceInterface +• Concept: (a) List the sequence of functional processing(c) Transaction at head of the queue is delayed before• Concept: (a) Modeling of Hardware Resources such as
SystemResource + Bus Link for resource access.
on the data. (b) without the functional description. (c)being sent out.
Processor, Cache, Bus, DRAM, and Accelerators. (b)• Software and hardware
Can be hardware or software implementation.
Consumes time period as defined in the behavior flow.
Scheduler Block with added functionalities
 Instruction sequence and processing elements• Block: ExpressionList, Mapper, Script, FSM, Fork, and(c) Select scheduling from FCFS, Round-Robin, and pre•Providesmore
schedulingalgorithms
for
the
user
to
 Define software functionality using the Instruction set
Join.
emption. (d) Simplify the flows without having multiplechoose from. The following are the different Queueand Instruction mix table.
• Operation: (a) Behavior flow is modeled with Expression
flows connected with wires to a single Server. (e) Support
rejection mechanisms supported : Generate tasks based on the instruction mix table andList and Mapper blocks. (b) Each function in thepreemption across request from multiple flows.
o
Incoming Token Rejected/ Tail drop
allocate task to specific resource or processing element
sequence can update field values. (c) and decision trees•
Blocks: SystemResourceoLowestPriority
Token
Rejected
based on the allocation algorithm.
and map to the SystemResource. (d) Use Fork and Join
• Input and Output: Block receives and sends completed
 Main Blocks: Processor, System Resource, Mapper,oRandom Drop on fullfor visual appeal.
Dynamic Mapper, Task Generator, Instruction Set
transactions virtually from or to the Mapper blocks.
oDrop front on full3

Mirabilis Design Inc.
Quick Reference Card

• Operation: (a) Arriving transaction are stored in theQueue. (b) Head of the queue gets delayed by the
A_Time. (c) Return to Mapper. (d) Time_Type is set to“Relative_Time”, then A_Time is seconds. Time_Type isset to Number_Clocks, then the A_Time is number ofclocks and is multiple by Clock_Speed.
• Key Parameters
 SchedulerName: Name referenced by Mappers
 Clock_Rate_Mhz (Can be a Model Parameter)
 Time_Type (Relative Time or Number_Clocks)
 Max_Scheduler_Length (Can be a model parameter)
Extend SystemResource timing with more architecture
details• Examples: (a) Cache and memory hierarchy.
(b) Separate the behavior flow or data flow from thearchitecture definition.
Use as a processing resource when processing time isunknown and the processing has dependency on someother processing.
For example, usage can be a processor: as processor
requests memory devices for accessing the data, time
taken for memory device supply data is unknown.
• Concept: SystemResource is the Processor and
Bus/Cache/Memory can be attached to the output.
• Blocks: SystemResource_Extend andSystemResource_Done (terminate a task).
• Input and Output: Block receives transaction virtuallyfrom Mappers, delays internally, and then sends to
output port. SystemResource_Done receives thetransaction and returns to the Mapper to complete thearchitecture operation.
• Operation: (a) Same operation as SystemResource.
(b) Difference is that the delayed transaction is sent to
output port for executing additional blocks. Return toMapper when encounters Done.
• Key Parameters: Same as SystemResource.
• Choose nonblocking_FCFS type if none of the packets
have to wait for it’s chance• For plotting power consumed by this block, use thefollowing format in power table:
Scheduler_(SystemResource_Extend_Name)Power• Examples: Generators, Battery, hardware systems
that consume power, power management algorithms

and scalability. (c) Example utilization of a resource• ExpressionList – Create variables that can be used
• Concept: (a) Used to understand all the parts of theabove 90% suggests that the resource is being
for the state power and transition.
power system for non-functional analysis. (b) The
over utilized and the user must increase the Battery: (a) Battery type (b) Charging mechanism –focus is on consumption, sizing the devices, losses,
processing speed or reduce the workload arrival
standard, threshold before charging starts, turbo
battery life, and so on. This does not focus on the change
time. (d) Buffer occupancy is the minimum queuecharging.
in Voltage or current.
depth required to prevent data loss.
•
Generator:
Defineattributes
ofthechargersuchas(c) LDO Efficiency is a variable that modifies the amount• Bottleneck or Problem: (a) Bottlenecks are identified
Sun activity, motor rotations, and so on.
of power consumed by a device in a state. (d) Determine
by continuous increase in latency. (b) Must check•
Temperature
and
Heat:
Plot
the
heat
dissipation
andminimum power needed to run the system. (e) Provide
buffer usage and utilization for all resources in thetemperatureoftheentiresystemwhile
eachdeviceinput to mechanical team for cooling.
flow to determine actual bottleneck.
consumes
power.
Also
provides
the
max
and
averageof• Blocks: PowerTable, Battery, and Energy Harvesters.
temperature and heat of each device in the system.
Glossary• Input and Output:
Input and output:• Modeling Concept: Type of modeling approach.
• PowerTable comprises the following three output
Power_input: power consumption from the power• Simulator: Model of computation that determines theports: (a) Instant power output sends out thetable’s instant_pwr_out portinteraction between blocks.
instantaneous power consumption of all
State_Change_input: state change of each device from • Discrete-event or Digital: Sequence of synchronous
devices at this level and the levels below inPower table’s state_change port(same-time) events executing between asynchronous
the tree. (b) Average power output sends the
Temp_output: temperature value
average power consumed by the devices(different but not periodic) time.
Heat_output: heat dissipation value
over time. (c) State change in comma-separated• Behavior: Sequence of tasks that describe a process orlist of time, hierarchy name, device name, the new state
Device_output:max and mean values of each device atapplication. Focused on the flows and the delay toand the power consumed.
the end of simulation.
complete a task. Does not include the functional details• Battery comprises the following ports: (a)like the math and algorithms.
From_powerTable – Receives the current
Statistics• Architecture: Platform to execute the application. Can
load from the PowerTable. (b) Battery_Charge_Input• Two types: (a) Statistics block: Input values arecontain hardware, network, middleware and RTOS.
– Receives the charge from the charging
aggregated to generate statistics on demand.
•
Timing: Measured in seconds.
source. (c) Battery_External_Aging –(b) Reports with list of pre-defined statistics for• Data: Size is always in bytes.
Percentage of battery loss as a double.
Resources and hardware.
• Power: Consumption of energy by a device.
Represents external factors – shock and• List of Outputs Available: (a) Utilizations (Min,• Functionality: Behavior of a certain sequence ofdropping battery. Reduces battery life by
Max, Mean, and Standard Deviation). (b) Occupancy
percentage. (d) Available_Energy_Capacity(watt-Hr)
tasks.
(Min, Max, Mean, and Standard Deviation). (c) Number • Stochastic: Using random values to define the time andprovides energy available in the battery. (e)of Transactions Entered, Exited, and Rejected.
Battery_Life_Remaining(%) – Output battery charge
other attributes.
(d) Instantaneous and Average Power consumption
remaining. (f) stats – outputs initial and final states, and• Process: Sequence of tasks. Typically for a behavior flow.
for system, subsystem, and components. (e) Battery
warnings.
Can be implemented in hardware or software
Life in Percentage, Available Charge, and Discharge.
• Key parameters• Task: Part of a behavior flow. Defines a specific action.
•
CustomOutput:Computelatencyandthroughputin PowerTable• Thread: A behavior flow that executes on a single
ExpressionList and send to Plotter.
• Power_Manager_Table: Define the list of states forprocessor.
•
SavingStatistics:
Statistics
can
be
saved
as
text,
csv,
all devices, special states (Existing, On and Off), and• Traffic: Start of an activity.
transition time between states. Define any
and .plt (Plot format) files located in any directory.
parameter that is required – can reference a
The Digital simulatior supports to store the statistics in a • Traffic attributes: Details of the traffic.
variable.
file by enabling writeStatsToFile parameter. The statistics • Workload: Alternate term of traffic.
State – Can be any list. Active state and standby
from Architecture Setup will be saved in a file and placed • Statistics: Recording of the model activities andstates must be defined in the On and Off stateinterpreting them in a decision form.
in the Result folder which will be in the model location.
columns.
• Plotting: Display the statistics.
• Interpretation: (a) Statistics like utilization, Queue
Existing- Initial state.
 Latency can be end to end latency of the system or
length vs throughput, (b) Data size vs latency,• Delay_to_Change_State – Time in a state before
latency across a particular block.
instantaneous power consumption, and so ontransition to lower power state.
 Throughput can be extracted by the specific field of
are used to decide the efficiency, resource usage,
4

Mirabilis Design Inc.
Quick Reference Card
received at Pop. (c) Used when the processing delay isthe data structure coming out of the block.
Input/Output: (a) Can add as many ports as required forblock. Used by Mappers, RegEx function, and othernot known in advance.
connection by right-clicking and selecting “Configure
SystemResource block to call this block.
Key Blocks
Input/Output: (a) Input: Transactions (b) Pop_Input:• Scheduler_Type: FCFS, Preemptive or Round-Robin.
Traffic: Outputs a new Data Structure (DS) at time intervals Ports”.
Note that Type need not be defined. (b) Ports receive Data Integer or array (Queue, position) (c) Output: Transactions, • Maximum_Scheduler_Length: Queue length
specified by the "Time_Distribution" setting.
(d) reject_output: Transactions
Input/Output: Output is a transaction. Can also be called a Structure or a value of any data type (Polymorphic).
Reports: Number_Entered, Number_Exited,(c) With multiple input port, block executes the expression Key Data Structure fields
packet or data request.
Number_Rejected, Occupancy, Utilization, Delay
Key Traffic block Parameters: (a)Data_Structure_Name: Set after all ports receive data. (d) In the expression, the data • Priority_Field, Queue_Number_Field
SystemResource_Extend
on a port is identified by port name +”.” + field name. (e)Key Queue block Parameters
to “Header” or “Processor_DS”. (b)Start_Time: Offset for• Same as SystemResource.
Numberand order of items in Output_Values,• Max_Queue_Length: The maximum queue length forthe first transaction. (c)Value_1 and Value_2 are used in• No support for Pre-emption.
Output_Ports,
andOutput_Condition
must
match.
(f)All
the distributions. (d) Distributions: single transaction,
each queue (can be a parameter).
• Cannot call another SystemResource.
output ports must be listed. (g) Output_Condition is atransactions at fixed interval (Value_1), exponential• Number_of_Queue: Number of independent queues (can• Can add more processing activity at the output port.
Booleanthatdetermines
if
data
is
to
be
sent
on
a
particular
distribution, uniform between Value1 and Value2, andbe a parameter).
port.
• Return to Mapper when output flow encounters anormal with mean Value_1 and standard deviation of• Queue_Reject_Mechanism : Incoming Token rejected or
SystemResource_Done.
Value_2. (e) FileOrURL: If we want to read the traffic from Fork and Join: (a) Fork: Outputs a single transaction into
• Queue_Type: choose between FIFO or LIFO
two output transactions. (b) Join: Combines two
Input/Output:
file , then provide the address of the file here. (f)• Initial_Queue_State: Refers to the first transaction when • Transactions, Task_Plot
incoming transactions into one flow.
Random_Seed: the value defined by default is 123457L.
queue is empty – output if none are waiting or wait until Key SystemResource block Parameters:
Used to determine the beginning random sequence of data Input/Output: Transactions.
a pop has been received.
Note: There is no delay between input and output, andstructures generated. (g) Number_of_Transactions:• Resource_Name: Name of this SystemResource block.
between output ports. Fork output is first the top port and Reports: Number_Entered, Number_Exited,
Specifies the max number allowed and by default it isUsed by Mappers, RegEx function, and other
Number_Rejected, Occupancy, Utilization, Delaythen the lower. Join sends out the transaction in
MaxInt whose value is 2147483647
SystemResource block to call this block.
the order received.
Server: (a) Combines a queue and a processing time delay. • Scheduler_Type: FCFS or Round-Robin or nonTrafficReader:(b) Used when the processing time is known in advance.
SoftwareMapper and Dynamic Mapper: (a) Sends theImport trace files from network sniffer orblocking_FCFS
If the transaction can be preempted, use SystemResource.
transaction to the Processor (DynamicMapper only),
hardware capture.
• Maximum_Scheduler_Length: Queue length
Input/Output: Transactions
Input/Output: Output the next row as a data structure for SystemResource or SystemResource_Extend.
Reports:
Key Data Structure fields Queue_Number_Field(b) Mapper block immediately sends the transaction to
every input.
Number_Entered, Number_Exited, Number_Rejected,(A_Task_Address),
Priority(A_Priority),theResource.
Database: Lookup table containing rows and columns.
Occupancy, Utilization, Delay
Max_Queue_Length (Can be a Parameter),
Input/Output: Transactions
Each row is a data structure and the field names are thePowerTable: Study and model the power infrastructure,
Number_of_Queues
(Can
be
a
Parameter),Key
Data
Structure
fields:(a)
A_Time,A_Priority,
A_Task_ID
columns.
Determine the consumption by operations on resources,
Time_Field (A_Time)
for SystemResource, (b) Task_Instruction, Task_Priority,
Input/Output: Transactions
and Design the best power management algorithm.
Key
Serverblock
Parameters
Task_ID,
Task_Name,
Task_Destination
for
Processor
Key Database block Parameters
Input/Output: Output: Instantaneous Power output,
Key
Mapperblock
Parameters•
Number_of_Queues:
Numberofindependent
queuesin• Linking_Name: Name to link multiple Database blocks
Average Power output, Device State change.
•
Target_Resource:
Identifies
theSystemResource.
thisblock.
using the same table.
Key PowerTable block Parameters• Queue_Type: choose between FIFO, LIFO or SLOT• fileOrURL: file name containing the table (.txt, .csv, .xml). • Task_Number: The Task_Number is the position on• Manager_Setup: Contains the list of states andtheY-axis.
• Max_Queue_Length: Maximum queue length for each
• Data_Structure_Text: Table values or ‘extern’ - toassociated power levels, reference to the Active (On)• Task_Priority: Used to reorder the input queue and forQueue.
reference another database block.
and Standby (Off), transition time from one state topreempting the current task.
• Time_Field: Predetermined delay time, can be a field or• Input_Fields: List of incoming data structure fields foranother and parameters.
• Task_Time: Processing time at the SystemResource.
double value.
lookup.
Delay_to_Change_State: Time in a state before changing• Mutual Exclusion enabled (SoftwareMapper):Reports: Number_Entered, Number_Exited,• Lookup_Fields: List of column names to match withto another state.
Number_Rejected, Occupancy, Utilization, Delay
Transaction cannot be pre-empted.
Input_Fields in same order.
• Expression_List: Computes expression for variables that
• QueueTaskNow: SoftwareMapper can be queued locally SystemResource: (a) Used when multiple flows need
• Output_Expression: Specifies the match type and theare used in the Manager Setup. (a) stateChange- RegEx
to access a single resource. (b) Used whenuntil Resource or available or sent immediately.
value to be placed on the output port.
function to change the state in ExpressionList or Script.
pre-emption
isrequired.
(c)
Model
stop
executionif• Database_Lookup (DynamicMapper): Database Name
• Mode: Search (Read), Update (Write), or delete(b) AsyncStateChange can be define externally using an
queue overflows (error will be thrown).
that contains the attribute values. Matched by the(Remove).
FSM, or Verilog/C/Script blocks.
Input/Output:
Transactions,Task_Plot
Task_Name.
Reports: Cumulative power consumption per device,
ExpressionList: Execute a sequence of expression in-order.
Key SystemResource block Parameters:
Cumulative power consumption per device at a particular
Can be used to update field, compute statistics, and make Queue: (a) Defines a buffer or a FIFO/LIFO in the flow.
• Resource_Name: Name of this SystemResource(b) Removes the first transaction when trigger isstate, Cumulative power consumption of all devices,
decisions.
5Mirabilis Design Inc.
Quick Reference Card

Average power consumption of all devices, State
Instruction_Set: Lists the instruction for each execution• Ports – input – A multiport which means that each port • Basic required fields common to all blocks - A_Sourcechange details of a device.
unit of the processor.
or relation can be connected directly to this port and is(starting device), A_Destination (final point such as atreated as a unique dataset.
memory or display or HDMI), A_Command (action to be Error: Missing semicolon at the end of a line, columns are
Script: (a) Implements the VisualSim Script language. Thismissing, instruction not foundtaken- Read, Write, Erase, Prefetch, and so on).
language combines standard programming constructs with Statistics
Demo:VS_AR\doc\Training_Material\Architecture\Setup\In• Each hardware block must have a unique name.
• Compiles the statistics for a sequence of scalar valuesthe RegEx functions and is fully integrated with the
str_Set.xml
integer, double or long.
graphical editor. (b) Supports blocking and non-blocking
ArchitectureSetup: Handles all the address mapping,• Ports
wait statements, ability to create or wait for events, androuting, debug messages, plotting and statistics generation. Integrated_Cache:o stats_data - An input port for the data samples.
has multiple threads defined and call between threads andPorts:
The cache can be used as a stochastic cache block or cycleo stats_trigger - An input port that triggers the current
modules. (c) Supports the following Methods:• plots_out - Generates the values for eachaccurate cache block by a parameter that the user canstatistics to be placed on the output port.
(a)WAIT(<time> or <event> or <clock rate Mhz>): A delay
Statistics_to_Plot name as a separate dataset.
select in drop-down menu( Stochastic_or_Address_Based).
o stats_reset – An input port that resets all internalthat holds the Script from operating on any data structure
Ports:• internal_stats_out - Generates all the general statistics
statistics.
until the time has expired. (b)SEND(<port name> or <label
for the number of times specified in the• fm_cache, to_cache – Connects to bus or lower-levelo histo_output - The values can be plotted on a
Number_of_Samples.
cache closer to processor
name> or <block name>): Send to a port, virtual
histogram Plotter block in VisualSim.
• util_stats_out – Generates all the utilization statistics for • miss_in, miss_out – Connects to bus or next level cacheconnection, another Script or to a LABEL. (c)QUEUE(<queue
o output - Outputs the current Statistics when trigger on
the number of times specified in thethat is closer to memory
name>, <token>, <priority>, <queue operation>): Storesthe stats_trigger port.
Number_of_Samples.
•stats – Sends out debug messages and statistics
and removes the token in the Queue in a FIFO method. The
ResourceStatistics
Error: Invalid architecture block name used, routing table Key Data Structure fields: A_Source, A_Command, A_Bytes,
queue is reordered based on the priority of the incoming• Generates and resets statistics for one or many
conflicts, field name mapping conflict.
A_Address
token.(d)TIMEQ (<queue name>, <token>, <priority>,
Schedulers and Smart Resources in the model.
Demo:VS_AR\doc\Training_Material\Architecture\Setup\A Error: Invalid higher memory name<queue operation>, <delay expression> or <clock_hertz>): • Ports - Stats_Out - Output a data structure for a single
rch_Setup.xml
Used to define, put, pop time, and do processing in a Timed queue statistics.
DeviceInterface: Enables users to connect custom blocks to Coherence Cache: Enables multi-core architecture to
Queue. (e)EVENT(<Event Name>,) or newEvent(<event• Resource_List : Specifies the Names of Resources
the bus, not needed for standard hw blocks.
access shared memory with data consistency. Support
name>) or <event name>.event(): Creates a new Event. (f) • ResourceLength_List : Length of all resources in thePorts:MESI coherence protocol in both snooping and directoryPLOT(<plot_name>,<destination>,<plot_color>,
Resource List
• input, output – Connected to device or logic blocks
based architecture.
<plot_offset>,<plot_value 1.0 or 0.0>): Plots timing• Number_of_Samples : defines how many stats output
Ports:• fm_bus, to_bus – Input connected to the bus port,
diagrams or latency or resource activity. (g)has to be done within the simulation time
Output connected to the bus• input, output – Connects to processor or bus which• Statistics : Boolean field which when enabled generates TimingDiagram: Generates timing diagram for key arch
CLOCK(“MyEvent”) : This is an added variation of EVENT
connects lower level caches.
the statistics and resets when disabledthat selectively fires a WAIT (“MyEvent”) or TIMEQ• To_Bus, Fm_Bus – Connects to bus or interconnect thatblocks. Connects output port to timed plotter.
Key Hardware Blocks(“MyEvent”). This acts as a virtual clock.Input/Output:
allows data transfer to higher level cache or main
Note:
Transactions , values of any data type
memory.
Processor: Models commercial and proprietary processors.
• Architecture setup is required for all hardware modelling. Ports:
Key Data Structure fields: A_Source, A_Command,
Key Script block Parameters: SelfStart - Create a new
A_Bytes, A_Address
parameter called SelfStart and set the value to true to start • Must use Processor_DS as the Data Structure.
• instr_in, instr_out – Connects to any VisualSim library• All hardware blocks have the data structure as the input
Snooping protocol connects to coherent buses such as ACE.
execution of script without a need for trigger.
block
and output.
Directory based protocol connects to NoC.
Reports: Statistics for internal queue, generate plot.
• bus_in, bus_out – Bus input and output ports• Listen to block on Architecture Setup by selecting the
TaskGenerator: Generates profile based sequence of• bus_in2, bus_out2 – Bus input and output ports
Key Plotterslisten to option. This provides details about the block
instructions to emulate the software task on the processor.
•
reject_out
–
When
the
instruction
queue
is
full,
the
TextDisplay
activity.
Ports:
incoming data structure is not executed and placed on• Display the values arriving on the input port in a text
• Customizable hardware blocks have ports at the bottom• port- receives data structure with A_Task_Namethis port
display dialog
for debug messages and statistics.
containing the name of the task
Key Data Structure fields:• Ports – input – Default input port
• Standard block statistics are output at Architecture• port2 – outputs ds with updated instruction field
A_Source, A_Destination, A_Variables, A_Hop,
TimeDataPlotter
Setup.
• debug – Outputs status and debug information
A_Instruction and A_Priority• Depicts latency, throughput, and other variables that
• Buses use multiport. So, input and output of device,
Key Data Structure fields:
Dependencies: Instruction_Set
vary against time
bridge and other buses must be connected to the same Error: Missing Instruction_Set or an instruction, processor A_TaskName, A_Instruction• Ports – input – accepts multiple datasets
port.
clock speed less than cache speed, pipeline stalled for than Key Parameters:
HistogramPlotter• CycleAccurateCache, CycleAccurateDRAM, Interfaces and 5000 cycles for response from external data request
Block_Name, My_Path, mode of operation and• Plots a histogram using the input data
Buses have debug and statistics ports.
Demo:VS_AR\doc\Training_Material\Architecture\Setup\Ti Instruction_Mix_Fileming_Diagram.xml
6Mirabilis Design Inc.
Quick Reference Card

Bridge: Connects two buses• stats_out – Connects to a text display to observe theRAM: Combines the memory controller and memory array • port - outputs the debug messages
statistics of TileLink
Key Data Structure fields: A_Address_Col, A_Address_Row , Ports:
to model SRAM, DRAM, Flash, and ROM• port, port2 – Connects to one bus
A_Command, A_Bytes• plot – connects to a Time Data Plotter to display activity
Ports:
Dependency: Connected to Memory_Controller• port3, port4 – Connects to another bus
diagram• input, output – Connects to a bus
Key Data Structure fields: A_Command, A_Source,• status – receives message about bridge operation• input2, output2 – Connects to a bus
A_Destination, A_Bytes
BusArbiter: Provides arbitration for bus and combines with Key Data Structure fields: A_Source, A_Destination• output3- ds with write operation and A_Task_Field is
Key Parameters: Speed, Bus_Width
Key Parameters:
multiple instances of the BusInterface to create a Sharedfalse is sent here
Dependency: TileLink Client, TileLink Manager
Bridge_Speed_in_Mhz, Bridge_Width_in_Bytes,
Bus topology.
Key Data Structure fields: A_Source, A_Destination,
Overhead_Cycles
Ports:
NoC: It is a scalable interconnect for an SoC to enable data
A_Command, A_Bytes, A_Bytes_Remaining andtransfer between multiple devices and the memory.
• input - Connected to the top port of the BusInterface
AFDXSwitch:
A_Bytes_Sent
Error: Invalid parameters, invalid access time entry.
Standard: ARINC Specification 664 Part 7, a profiled version Ports:• input1, output1 - Defines the custom logic whenof an IEEE 802.3 network per parts 1 & 2• Master NIU: Connects master devices to the router
Arbitration Mode is set to Custom
Memory_Controller: Emulates the memory controller at
Ports: Debugo Device_In, Device_Out – Receives and Sends
Key Data Structure fields:
cycle accurate level.
Key Data Structure fields: Task_Source, Task_Destination,transactions to Device.
A_Source, A_Destination, A_Command, A_Task_Flag,
Standard: EDEC/JESD Standard
Task_Type, Task_Sizeo NW_Out, NW_In – Send and receive packets from
A_Bytes, A_Bytes_Remaining
Ports:
Dependencies: AFDXNode, AFDXTraffic, and AFDXConfig
router.
• rd_wr_data_fm_bus, rd_wr_data_resp_to_bus - receives Key Parameters:
blocks• Slave NIU: Connects Slave devices to the routerthe read request or writes data from the bus port ,sends Bus_Speed_Mhz, Bus_Size_Bytes, Width_Bytes,
Arbiter_Modeo Device_In, Device_Out – Receives and Sends
AMBA_AHB: High performance buses for interconnecting
the read data out and the acknowledgement out for
Dependency: BusInterface
transactions to Device.
peripheral IP to any independent processor/memory
write through this port to the bus
o NW_Out, NW_In – Send and receive packets fromsubsystems within a SoC.
• rd_data_fm_mem, rd_wr_data_to_mem - receives the BusInterface: Connects devices to the bus
router.
Ports:
read data returned from the DRAM block and sends out Ports:• Router: transfer data to other routers or devices.
Port1,port3,port5,port7- connects to master• input1, output1: Connects to a device/bus - can be
the transaction to the DRAMo Device_Port_In, Device_Port_Out – connects to masterPort2,port4,port6,port8- connects to slave
Master or slave• ctrl_fm_mem, ctrl_to_mem - sends and receives control
or slave NIU.
Key Data Structure fields: A_Command, A_Source,• input2, output2: Connects to a device/bus- can besignals such as tRAS, tRP, tRCD to memory or from theo Device2_Port_In, Device2_Port_Out – connects to
A_Destination, A_Hop, A_Bytes, A_Bytes_Sent,
master or slave
memorymaster or slave NIU.
A_Bytes_Remaining, A_Task_Flag, A_Prefetch, A_Interrupt• child_in, child_out – Provides the connection to other• status - outputs the debugging messages when theo North_In, North_Out, South_In, South_Out, East_In,businterfaces and the BusArbiter.
AMBA_AXI: Advanced high performance on chip
DEBUG parameter is true
East_Out, West_In, West_Out – directional ports to
Key Data Structure fields:interconnect protocol to enable data transfer between SoC
Key Data Structure fields:
connect an adjacent router.
A_Source, A_Hop, A_Destination, A_Bytes,
devices.
A_Address_Col, A_Address_Row, A_Bytes_Total,• Wire: Connects two router ports.
A_Bytes_Remaining, A_Bytes_Sent, A_CommandPorts:
A_Mem_IDo Delay_In, Delay_Out – forward the data from input to
Dependency: BusArbiter
Key Parameters:• All input ports (left side) are connected to masters
output.
DRAM_Type, Controller_Speed_Mhz, Mfg_Suggest_Timing, Error:• All output ports (right side) are connected to slaves
invalid bus name, similar bus port names
Extra_Timing, Memory_Width_Bytes ,• When using AXI bus, make sure to give the value for the Key Data Structure fields: A_Command, A_Destination,
A_BytesCommand_Buffer_Length, Burst_Length
DMA:parameter Threshold_Trans_T_Bytes_F as true
Key Parameters: Flit_Size_Bytes, Buffer Size, QoS
Error: invalid DRAM typePorts:• When using AXI bus, generate traffics with an offset
Dependency:
Master NIU, Slave_NIU, Wire, Router
CycleAccurateDRAM: Captures the functionality and• Req, Dout – Receives transactions, Sends out• stats_out – Outputs the statistics
AVB: Designs a completely new AVB-based network toaccurate timing of many variations of DRAM.
transactions,
Key Data Structure fields: A_Command, A_Source,
integrate all the equipment, upgrade existing networks,
Ports:• Ack, Din – Sends dma requests to the device, Connects to A_Destination, A_Bytes, A_Priority
and design the electronics that are used in such networks.
• port_1, port_2 - receives the read request or write data
bus.
TileLink: It is a chip-scale cache coherent interconnect
Standard: IEEE 802.1BA
from the memory controller and sends out data to• reject – Sends out transactions when the channel buffer standard. It enables coherent memory access in an SoC• StreamRPmemory controller
overflowswhich contains multi core processor, accelerators, DMA
o TG_in, TG_rtn – Receives traffic, Sends out• fm_ctrl, to_ctrl - receives the RAS, RP, RCD commands
Key Data Structure fields: (with database dependency)
and IO devices.
transactions
from the memory controller and sends the RAS, RP, RCD A_Task_Name, A_Instruction
Ports:ostrm_rtn, strm_out – Receives returned transactions,
response commands back to the memory controller
Key Data Structure fields: (without database)• All Multi ports (left side) are connected to TileLink Client
Sends out traffic• port_4, port_3 - connected to external logic for reading A_DMA_Command, A_DMA_Destination, A_Priority,• All Multi ports (Right side) are connected to TileLink•
AVB_Nodedata from an address location and making a read request A_DMA_Bytes, A_DMA_Channel, A_DMA_Burst_Bytes.
Manageror write data to an address location
7

Mirabilis Design Inc.
Quick Reference Cardo port_in, port_out – Receives transactions, Sends
transactions• AVB_Traffico net_tg_in, net_tg_out – Receives traffic, Sends out
generated traffico data_out – Sends out latency of the transaction• AVB_Statso stats_in – Receives transactions
Dependencies : AVB Traffic, AVB SRP, AVB Node, AVB
Bridge. Network Setup, Config table, AVB Statistics
CAN: Based on the Bosch specification and theinternational standard defined in the ISO 11898-1 andcombines both the standards in a single block.
Standard: ISO 11898-1
Ports:• CAN_Nodeo node_in, node_out – Receives messages, sends
messageso rx,tx – Connects to CAN_Bus wire port
• CAN_Buso wire – Helps in connections
Fibre_Channel:
Ports:• FC_N_Node:o Device_In, Device_Out – Receives and Sends
transactions to Deviceo frm_switch, to_switch – Receives and Sends
transactions to switcho Debug – Enable debug and connect text display tocapture debug information• FC_96_Nodes• FC_Link• FC_Switch• FC_Config• FC_Traffico net_tg_in, net_tg_out
o data_out• ASM_Traffico net_tg_in, net_tg_out
o data_out
Dependencies: ConfigTable, DeviceInterface block
PCIe_Bus: Provides a scalable, high-speed, serial I/O bus
that maintains backward compatibility with PCI
applications and drivers.
Ports:• All input ports (left side) are connected to masters• All output ports (right side) are connected to slaves

the standards which define mechanisms for the timenode (existing), adding a link, removing a node, or• stats, msg_out – Sends out Statistics (Data Structure)sensitive transmission of data over Ethernet network.
removing a link.
information, Debugging (String) Information.
Has multiple gateways through which sensors, Ethernet
o stats_input, stats_output - Generates statistics reports
Key Parameters: Number_of_Lanes, Max_Payload_Size,traffic etc. are connected
for the referenced routing table, driven by the type of
Max_Payload_Req_Size
Key features:'stats_input'
UCIe: It is a die to die interconnect to integrate various(a)IEEE 802.1Qbv• Routing_Table
chiplets. It provides high bandwidth with low power and(b)IEEE 802.1Qbu
o No ports
low latency data transfer between chiplets.
(c)IEEE 802.3br• Multicast
Ports:(d)IEEE 802.1Qcao fr_layer, to_layer - From the Application layer, To the• multi-ports (input and output) connected to a chiplet.
(e)IEEE 802.1Qcc
Application layer• Debug_port – sends debug messages about UCIe(f)IEEE 802.1Qcio fr_Node, to_Node – From the Node block, To the Nodeprocessing.
(g)IEEE 802.1Qch
block
Key Data Structure fields: A_Command, A_Source,(h)IEEE 802.1AS• Switch_Four_X_One
A_Destination, A_Byteso zero_input - input port Zero for data tokens
Key Parameters: Max_Link_Speed_GTps,o one_input - input port One for data tokens
Networking:
Max_Read_Req_Size_Bytes, Buffer_Size_Byteso two_input - input port Two for data tokens
Ports:
PCI_RAD: It is an arbitration based bus which is used foro three_input - input port Three for data tokens• Ethernet_Trafficinterconnecting peripheral chips to any independento control - Input port for control tokens, which selects
o net_tg_in, net_tg_out - Returns the AVB stream statusprocessor/memory subsystems
the output based on the matching with the relative
to the block, all the stream traffic will be output at thisKey features:switch address.
port(a)Implements arbitration algorithm according to which
o no_output - If the control port value is out of theo data_out - outputs the traffic streams that treat thismasters are given access to the bus
Switch_Address range, then the incoming token isblock as the Listener(b)Terminate/Wait: It is possible to terminate the current
placed on this port.
access by a master or make that master wait for a specified • Layer_Protocoloswitch_output - If the control port value is out of theods_up_input,
ds_up_output
Input
port
for
connection
cyclesSwitch_Address range, then the incoming token isfrom upper Layer_Protocol, Output port for(e)Provides block debug featureplaced on this port.
connection from this block to the upper
Layer_Protocol
TimeTriggeredEthernet: Provides the capability foro ds_dn_input, ds_dn_output - Input port for connection
deterministic, synchronous, and congestion-freefrom upper Layer_Protocol, Output port forcommunication, unaffected by any asynchronous Ethernet
connection to lower Layer_Protocol or Node.
traffic load.
o up_ext_output, dn_ext_output - Output port forStandard: IEEE 802.3external processing in the Up direction, Output port forPorts:
external processing in the Down direction.
• TTE_Traffic• Layer_Completeo net_tg_in, net_tg_out – Receives and sends
o input - Input port to Layer_Complete fromtransactions
Protocol_Layer block.
o data_out – Outputs the traffic streams• Layer_Table• TTE_Nodeo No ports
o port_in, port_out – Input and output interfaces to the• NODE
upper layers of the protocol stacko route_input, route_output – Receives and sends• TTE_Statspacketso stats_in – Input from the Node or TrafficGenerator
o node_input, node_output – Receives and sends
o Error: Multiple RiO_Node, Serial switch blocks withpackets
similar name, error due to missing architecture setup• NODE_Master
TSN: Implements IEEE standard called IEEE 802.1Q Timeo request_input - updating the referenced routing table
Sensitive Networking
in terms of recalculating the routing table, adding a
TSN is a set of standards defined by Time-Sensitive
Networking task group of the IEEE 802.1 working group,8