REFERENCE GUIDEINTRODUCTION TO THE CONCEPTS AND USING VISUALSIMMIRABILIS DESIGN INC.

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TABLE OF CONTENTS
12

3

SCOPE AND PURPOSE OF THE DOCUMENT............................................. 17
1.1

INTRODUCTION .......................................................................................................... 17

1.2

SCOPE ...................................................................................................................... 17

STARTING VISUALSIM .................................................................................. 18
2.1

RUNNING VISUALSIM ARCHITECT ............................................................................... 18

2.2

RUNNING VISUALSIM CLOUD ...................................................................................... 18

2.3

RUNNING VISUALSIM POST PROCESSOR .................................................................... 19

VISUALSIM PRODUCTS, EDITORS, AND TOOLS....................................... 21
3.1

HOME PAGE .............................................................................................................. 21

3.2

BLOCK DIAGRAM EDITOR ........................................................................................... 25

3.2.1

Menu Commands .................................................................................................... 26

3.2.2

Details of Menu and Toolbar Operation ................................................................... 31

3.2.3

Listeners .................................................................................................................. 38

3.2.4

Folders and Tree ..................................................................................................... 39

3.3

TEXT EDITOR AND LISTENER WINDOWS ...................................................................... 39

3.3.1

Introduction .............................................................................................................. 39

3.3.2

Commands .............................................................................................................. 39

3.3.3

Quick Key Commands ............................................................................................. 39

3.4

PLOTTERS AND VISUALSIM POST PROCESSOR ............................................................ 40

3.4.1

Introduction .............................................................................................................. 40

3.4.2

Post Processor Plot Window .................................................................................... 42

3.4.3

Using Plot ................................................................................................................ 43

3.4.4

Commands Configuring the Axes ............................................................................ 47

3.4.5

Commands for Plotting Data .................................................................................... 48

3.5

VISUALSIM POST PROCESSOR ................................................................................... 51

3.5.1

Introduction .............................................................................................................. 51

3.5.2

Key Features ........................................................................................................... 51

3.5.3

Quick Key Command ............................................................................................... 51

3.5.4

Usage ...................................................................................................................... 52

4

3.5.5

VisualSim Architect Models...................................................................................... 53

3.5.6

Usage ...................................................................................................................... 53

3.5.7

Post Processor Activity ............................................................................................ 53

3.5.8

Packaging and Archiving ......................................................................................... 55

3.6

ICON EDITOR ............................................................................................................. 55

3.7

EXPRESSION EVALUATOR .......................................................................................... 56

3.8

SIMULATION COCKPIT ................................................................................................ 57

3.8.1

Operation ................................................................................................................. 57

3.8.2

Listen to the Manager and Simulator ....................................................................... 58

3.8.3

Pause and Resume ................................................................................................. 58

3.8.4

Simulation Parameters............................................................................................. 58

3.8.5

Plot viewers in the Simulation Cockpit ..................................................................... 59

PARSERS ....................................................................................................... 60
4.1

ARXML PARSER ....................................................................................................... 60

4.2

AXI PARSER .............................................................................................................. 62

4.2.1

Parameter configuration in model: ........................................................................... 62

4.2.2

Python File Update .................................................................................................. 62

4.2.3

Parser ...................................................................................................................... 63

4.3

GEM5 PARSER.......................................................................................................... 63

4.4

GCC PARSER ........................................................................................................... 65

4.4.1

Binary and disassembly files .................................................................................... 65

4.4.2

GCC file parsing ...................................................................................................... 66

4.5

5

XML COMPARATOR ................................................................................................... 67

BLOCKS.......................................................................................................... 69
5.1

BLOCK EXECUTION SEMANTICS .................................................................................. 69

5.2

BLOCK LAYOUT ......................................................................................................... 70

5.3

BLOCK CONTEXT MENU ............................................................................................. 71

5.3.1

Customize................................................................................................................ 71

5.3.2

Customize Name ..................................................................................................... 74

5.3.3

Get Documentation .................................................................................................. 74

5.3.4

Send to Back ........................................................................................................... 74

5.3.5

Bring to Front ........................................................................................................... 74

5.3.6

Save Block in Library ............................................................................................... 74

5.3.7

Listen to Block ......................................................................................................... 74

5.3.8

Set Breakpoint ......................................................................................................... 75

5.3.9

Convert to Class ...................................................................................................... 75

5.3.10 Class Action - Create Instance (Ctrl+N) ................................................................... 75
5.3.11 Class Action - Create Subclass (Ctrl+U) .................................................................. 75
5.3.12 Convert to Instance.................................................................................................. 75
5.3.13 Open Block .............................................................................................................. 76
5.3.14 Open Instance ......................................................................................................... 76
5.3.15 Appearance - Edit Custom Icon (Icon Editor) ........................................................... 76
5.3.16 Appearance - Remove Custom Icon ........................................................................ 76
5.3.17 Appearance – Flip Ports Horizontally ....................................................................... 76
5.3.18 Appearance – Flip Ports Vertically ........................................................................... 76
5.3.19 Appearance – Rotate Ports Clockwise ..................................................................... 76
5.3.20 Appearance – Rotate Ports Counterclockwise ......................................................... 77
5.4

6

7

SETTING UP A BLOCK ................................................................................................. 77

5.4.1

Blocks Overview ...................................................................................................... 77

5.4.2

Updating Parameters and adding additional parameters.......................................... 78

5.4.3

Updating Ports and adding additional ports.............................................................. 78

5.4.4

Setting Port Types ................................................................................................... 79

5.4.5

Linking Parameters .................................................................................................. 80

5.4.6

Block Documentation ............................................................................................... 81

5.4.7

Icon Display value.................................................................................................... 81

5.4.8

Tooltip value ............................................................................................................ 81

5.4.9

Creating Generic Port Icon ...................................................................................... 81

HIERARCHICAL BLOCK SEMANTICS ......................................................... 83
6.1

USING HIERARCHICAL BLOCKS ................................................................................... 83

6.2

MODEL EXECUTION SEMANTICS ................................................................................. 85

6.3

MODEL EXECUTION FLOWCHART ................................................................................ 86

6.4

CREATE SUB-MODEL ................................................................................................. 87

DYNAMIC INSTANTIATION ........................................................................... 88
7.1

INTRODUCTION .......................................................................................................... 88

7.2

8

9

EXAMPLE .................................................................................................................. 88

7.2.1

How To .................................................................................................................... 90

7.2.2

Requirements .......................................................................................................... 90

7.2.3

Example of the Dynamic Instantiation ...................................................................... 91

BLOCK, SUB-MODELS (CLASSES) AND INHERITANCE ........................... 93
8.1

INTRODUCTION .......................................................................................................... 93

8.2

EXAMPLE OF CLASSES ............................................................................................... 94

8.2.1

Overriding Parameter Values in Instances ............................................................. 101

8.2.2

Subclass and Inheritance ....................................................................................... 102

8.2.3

Sub-Models ........................................................................................................... 104

CLASSES AND LIBRARIES ........................................................................ 106
9.1

CREATE CLASS- SEQUENCE OF OPERATIONS ............................................................ 106

9.2

CREATE LIBRARY AND INSTANTIATE IN USER_LIBRARY .............................................. 107

9.3

EXAMPLE OF CREATING A NEW CLASS BLOCK ........................................................... 107

9.4

ANNOTATING THE CLASS.......................................................................................... 110

9.5

INSTANTIATING THE CLASS IN MODEL........................................................................ 110

9.6

TEST THE NEW CLASS BLOCK: ................................................................................. 111

10 LIBRARY MANAGEMENT ........................................................................... 113
10.1

INTRODUCTION ........................................................................................................ 113

10.2

VERSION CONTROL ................................................................................................. 113

10.3

LIBRARY STORAGE .................................................................................................. 113

10.4

USER LIBRARY ........................................................................................................ 115

11 LIBRARY FOLDER ORGANIZATION .......................................................... 116
11.1

MODEL / DOCUMENT / MODELSETUP ........................................................................ 116

11.2

TRAFFIC / SOURCE .................................................................................................. 117

11.3

FAILURE ANALYSER ................................................................................................. 118

11.4

RESULTS ................................................................................................................ 118

11.5

BEHAVIOR ............................................................................................................... 119

11.6

MAPPERS................................................................................................................ 121

11.7

RESOURCES ........................................................................................................... 121

11.8

POWER ................................................................................................................... 122

11.9

HARDWARE SETUP .................................................................................................. 123

11.10

PROCESSOR GENERATOR ........................................................................................ 124

11.11

MICROARCHITECTURE COMPONENTS ....................................................................... 124

11.12

MEMORY ................................................................................................................. 125

11.13

HARDWARE DEVICES ............................................................................................... 126

11.14

INTERFACES AND BUSES .......................................................................................... 126

11.15

SYSTEM_LANGUAGE................................................................................................ 127

11.16

HARDWARE LANGUAGE ............................................................................................ 127

11.17

MATH_OPERATIONS ................................................................................................ 128

11.18

ALGORITHMIC .......................................................................................................... 129

11.19

USERLIBRARY ......................................................................................................... 129

12 AUTO-SAVE.................................................................................................. 130
13 SIMULATION TECHNOLOGY ...................................................................... 131
13.1

INTRODUCTION ........................................................................................................ 131

13.2

MODELS OF COMPUTATION ...................................................................................... 131

13.3

SIMULATORS- HOW TO SELECT THE RIGHT ONE? ....................................................... 132

13.4

SIMULATORS ........................................................................................................... 133

13.4.2 Choosing Models of Computation .......................................................................... 137

14 CONCEPT OF TIME ..................................................................................... 139
14.1

INTRODUCTION ........................................................................................................ 139

14.2

TIME RESOLUTION ................................................................................................... 139

14.3

SIMULATION TIME .................................................................................................... 140

14.4

RELATIVE VS CLOCK TIME ........................................................................................ 140

14.5

COMPUTING TIME .................................................................................................... 140

14.6

CLOCK SYNCHRONIZATION ....................................................................................... 141

14.7

MODEL EVENT......................................................................................................... 141

15 DATA STRUCTURES ................................................................................... 143
15.1

INTRODUCTION ........................................................................................................ 143

15.2

LAYOUT .................................................................................................................. 143

15.3

SUPPORTED DATA TYPES ........................................................................................ 145

15.4

PORT TYPING .......................................................................................................... 146

15.5

DATA STRUCTURE TEMPLATE LOCATION ................................................................... 146

15.6

DATA STRUCTURE DEFINITIONS AND EXAMPLE .......................................................... 146

15.6.1 Text Example ......................................................................................................... 147
15.6.2 Java Example ........................................................................................................ 147
15.6.3 Finding the Data Structure Template ..................................................................... 148
15.7

PATH DEFINITION .................................................................................................... 148

15.8

CONSTRUCTION....................................................................................................... 149

15.8.1 Compiling Java Data Structure .............................................................................. 149

16 PROCESSOR_DS ......................................................................................... 150
16.1

INTRODUCTION ........................................................................................................ 150

16.2

USAGE OF DATA STRUCTURE FIELDS IN THE MODEL .................................................. 154

16.3

PROCESSOR_DS EXAMPLE ...................................................................................... 157

17 PARAMETERS.............................................................................................. 159
17.1

INTRODUCTION ........................................................................................................ 159

17.2

PARAMETER VALUES ............................................................................................... 159

17.3

CREATION ............................................................................................................... 160

17.4

USING PARAMETERS................................................................................................ 160

17.5

LINKING PARAMETERS UP/ DOWN THE MODEL HIERARCHY ........................................ 163

17.6

PARAMETERS AS VARIABLES .................................................................................... 164

17.7

SHARED PARAMETERS ............................................................................................. 164

17.8

SPECIAL PARAMETERS ............................................................................................ 165

17.9

PARAMETER VALUE ON THE ICON ............................................................................. 165

18 CONFIGURING PORTS AND MAKING CONNECTIONS ........................... 167
18.1

INTRODUCTION ........................................................................................................ 167

18.2

EDITING .................................................................................................................. 167

18.3

ADDING A PORT ....................................................................................................... 169

18.4

REMOVING PORTS ................................................................................................... 170

18.5

POLYMORPHIC PORT TYPES..................................................................................... 170

18.6

PORTS .................................................................................................................... 171

18.7

RELATION AND LINK ................................................................................................. 171

18.8

POINT-TO-POINT BLOCK CONNECTIONS .................................................................... 172

18.9

MAKING CONNECTIONS ............................................................................................ 173

18.10VIRTUAL CONNECTIONS ........................................................................................... 173

18.11

ADDING PARAMETERS TO LINKS AND PORTS ............................................................. 173

18.12

CREATING GENERIC PORT ICON ............................................................................... 174

19 MODEL VARIABLE ...................................................................................... 176
19.1

INTRODUCTION ........................................................................................................ 176

19.2

VARIABLE TYPES ..................................................................................................... 176

19.3

VARIABLE DATA TYPES ............................................................................................ 177

19.4

VARIABLE NAMES .................................................................................................... 177

19.5

INITIALIZE VARIABLE ................................................................................................ 178

19.6

CHECKERS .............................................................................................................. 179

19.7

ACCESSING LOCAL VARIABLES ................................................................................. 180

19.8

THINGS TO REMEMBER ............................................................................................ 180

19.9

POINTER / REFERENCE TO A VARIABLE ..................................................................... 181

20 FILE PATHS .................................................................................................. 183
21 REGEX LANGUAGE .................................................................................... 184
21.1

COMPUTATION USING REGEX ................................................................................... 184

21.2

CASTING AND CONVERSIONS ................................................................................... 185

21.3

REGEX FUNCTIONS- QUEUE AND SYSTEMRESOURCE; METHODS ............................... 186

21.3.1 Mapping Functions to Blocks for getBlockStatus.................................................... 186
21.3.2 getBlockStatus Functions ...................................................................................... 187
21.3.3 getBlockStatus format and example....................................................................... 188
21.4

MATH FUNCTIONS ................................................................................................... 190

22 ACCELERATING MODEL SIMULATION PERFORMANCE ....................... 195
23 PAUSE AND RESUME FUNCTION WITH DEBUGGING FACILITY ........... 197
23.1

HOW TO USE PAUSE AND RESUME FUNCTION ........................................................... 197

23.2

STEPS: ................................................................................................................... 197

24 DATA TYPES ................................................................................................ 198
24.1

SCALAR AND NUMERICAL VALUES ............................................................................ 198

24.2

STRING CONSTANTS ................................................................................................ 198

24.3

ARRAYS .................................................................................................................. 199

24.4

MATRICES ............................................................................................................... 203

24.5

DATA STRUCTURE OR TRANSACTION OR RECORD TOKEN .......................................... 206

24.6

INVOKING METHODS ................................................................................................ 208

24.7

DEFINING FUNCTIONS .............................................................................................. 209

24.8

FIXED POINT NUMBERS............................................................................................ 212

24.9

SPECIAL FUNCTIONS................................................................................................ 214

24.10

DISTRIBUTIONS ....................................................................................................... 215

24.11

PROPERTY() ............................................................................................................ 216

24.12

REMAINDER()........................................................................................................... 216

24.13

POWER AND MODULO .............................................................................................. 217

25 MODELING LANGUAGES ........................................................................... 219
26 DATA STRUCTURES EXPRESSION LANGUAGE ..................................... 223
26.1

FORMAT FOR THE STATEMENT BLOCKS..................................................................... 226

27 DIFFERENCES BETWEEN SCRIPT AND C PROGRAMMING .................. 229
28 SELECTING THE RIGHT BLOCK FOR YOUR MODEL .............................. 230
28.1

TRAFFIC GENERATION ............................................................................................. 230

28.2

VARIABLES .............................................................................................................. 231

28.3

PLOTTING ............................................................................................................... 233

28.4

STATISTICS ............................................................................................................. 235

28.5

POWER STATISTICS ................................................................................................. 236

28.6

RESOURCES AND HARDWARE .................................................................................. 237

28.7

UTILITIES AND FUNCTIONS ....................................................................................... 240

29 ERROR MESSAGES .................................................................................... 241
30 MODEL-LEVEL DEBUGGING ...................................................................... 242
30.1

MODEL ANIMATION .................................................................................................. 243

30.2

DISPLAY AND STATISTICS ......................................................................................... 243

30.3

LISTEN TO SIMULATOR ............................................................................................. 244

30.4

LISTEN TO PORT ...................................................................................................... 244

30.5

LISTEN TO BLOCK .................................................................................................... 244

30.6

SCRIPT PROFILER FOR THE SCRIPT BLOCK AND SMART CONTROLLER......................... 245

30.7

LISTEN TO FILE FOR SCRIPT BLOCK AND SMART CONTROLLER ................................... 245

30.8

DEBUGGING VARIABLE ............................................................................................. 246

30.9

DEBUGGING A NEW MODEL ...................................................................................... 247

30.10

DIGITAL DEBUGGING ................................................................................................ 248

30.11

SETTING BREAKPOINTS............................................................................................ 249

30.11.1
30.12

Set Breakpoints context menu choice ............................................................ 249

PAUSE AND RESUME FUNCTION WITH DEBUGGING FACILITY ....................................... 250

30.12.1

How to Use Pause and Resume Function ...................................................... 250

30.12.2

Steps:............................................................................................................. 251

30.13

TESTING THE RTL ................................................................................................... 251

30.14

HOW TO DEBUG- USING THE METHODOLOGY PROVIDED ............................................. 251

30.14.1

INTRODUCTION ........................................................................................... 251

30.14.2

Animate.......................................................................................................... 252

30.14.3

Listen To Simulator ........................................................................................ 252

30.14.4

Listen To Port................................................................................................. 253

30.14.5

Listen To Block .............................................................................................. 253

30.14.6

Tracer ............................................................................................................ 253

Difficulties in debugging any system and how it is different from debugging a regularpiece Java or C/C++ code. ................................................................................................ 254
30.14.7 .............................................................................................................................. 254
30.14.8

Sequence for debugging ................................................................................ 254

31 SOFTWARE MODELING .............................................................................. 256
31.1

TASK GRAPH APPROACH ......................................................................................... 256

31.2

TASK GENERATOR APPROACH ................................................................................. 257

31.3

TRACE APROACH..................................................................................................... 257

31.4

MICROARCHITECTURE APPROACH ............................................................................ 258

32 INTRODUCTION TO FINITE STATE MACHINE .......................................... 259
32.1

FINITE STATE MACHINE............................................................................................ 259

32.1.1 FSM-Controller ...................................................................................................... 259
32.1.2 Guard Expressions ................................................................................................ 259
32.1.3 Actions ................................................................................................................... 260
32.2

EXECUTION ............................................................................................................. 260

32.3

FINITESTATEMACHINE ............................................................................................. 261

33 VISUALSIM CLOUD AND FILE EXPORT TO WEB .................................... 262
33.1

HOW TO ACCESS VISUALSIM CLOUD ......................................................................... 262

33.2

EXPORT MODEL TO WEB. (DISABLED IN THE CURRENT VERSION. IT WILL BE AVAILABLE IN

THE FUTURE RELEASE) ............................................................................................................ 262

34 VISUALSIM® INTERFACE WITH FPGA...................................................... 264
34.1

VISUALSIM FPGA INTERFACE APPLICATIONS ............................................................ 264

34.2

HARDWARE AND SOFTWARE REQUIREMENTS ............................................................ 265

34.3

VISUALSIM FPGA INTERFACE KIT............................................................................. 265

34.4

HOW INTERFACE WORKS ......................................................................................... 265

34.4.1 Procedure to Run Example .................................................................................... 266
34.5

CONFIGURING FPGA AND SOURCE FILES ................................................................. 268

34.6

POSSIBLE ERRORS .................................................................................................. 271

34.7

APPENDIX ............................................................................................................... 272

35 QEMU GUIDE................................................................................................ 274
35.1

STEPS TO INSTALL QEMU ON UBUNTU ....................................................................... 274

35.2

DOWNLOAD BENCHMARK TO RUN THE PROGRAM ....................................................... 275

35.3

STEPS TO COMPILE AND RUN C PROGRAM FOR X86 AND ARM ................................... 275

36 VISUALSIM GEM5-ARM INTEGRATION..................................................... 283
36.1

INSTALLATION STEPS FOR UBUNTU OS ..................................................................... 283

ASSUMPTION: THE USER HAS INSTALLED JAVA VERSION 14 OR LATER AND VISUALSIM ARCHITECT.
283
36.2

INSTALLATION STEPS FOR CENTOS 8.3 .................................................................... 283

ASSUMPTION: THE USER HAS INSTALLED JAVA VERSION 14 OR LATER AND VISUALSIM ARCHITECT.
283
36.3

RUN THE GEM5 WITH VISUALSIM .............................................................................. 284

36.4

TRACE GENERATION FROM GEM5:............................................................................ 285

36.5

DEBUG GEM5 USING GDB: ........................................................................................ 285

36.6

DEBUG GEM5 USING GRAPHICAL GDB: ...................................................................... 288

36.7

RUNNING THE GEM5 IN SYSTEM CALL EMULATION (SE) MODE ................................... 291

36.8

RUN THE GEM5 (SE MODE) IN MULTI-CORE .............................................................. 292

36.9

RUNNING THE GEM5 IN FULL SYSTEM (FS) MODE ..................................................... 293

37 GEM5 WITH RISCV ...................................................................................... 299
37.1

FOR UBUNTU 18.04 INSTALLATION STEPS ................................................................. 299

37.2

RUN THE GEM5 <-> VISUALSIM (NORMAL RUN WITHOUT DEBUGGER) .......................... 299

37.3

RUN WITH DEBUGGER -COMMAND LINE:..................................................................... 301

37.4

RUN WITH DEBUGGER - GRAPHICAL GDB:................................................................... 304

37.5

RUNNING THE GEM5 IN SYSTEM CALL EMULATION (SE) MODE ................................... 306

37.6

RUNNING THE GEM5 (SE MODE) IN MULTI-CORE ....................................................... 307

37.7

RUNNING THE GEM5 IN FULL SYSTEM (FS) MODE ..................................................... 308

38 SPIKE TO VISUALSIM ................................................................................. 309

TABLE OF FIGURESFIGURE 1.

VISUALSIM PLOT APPLICATION WINDOW ..................................................................... 41

FIGURE 2.

APPLETVIEWER ......................................................................................................... 44

FIGURE 3.

ZOOM IN.................................................................................................................... 45

FIGURE 4.

PLOT ........................................................................................................................ 46

FIGURE 5.

SIMULATION COCKPIT ................................................................................................ 57

FIGURE 6.

BLOCK EXECUTION SEMANTICS .................................................................................. 70

FIGURE 7.

BLOCK ATTRIBUTES ................................................................................................... 70

FIGURE 8.

BLOCK CONTEXT MENU ............................................................................................. 71

FIGURE 9.

PORTS THAT CANNOT BE EDITED................................................................................. 72

FIGURE 10.

SET PORTS TO BLOCK ........................................................................................... 79

FIGURE 11.

LINKING PARAMETER ............................................................................................. 80

FIGURE 12.

HIERARCHICAL BLOCK -> OPEN BLOCK ................................................................... 83

FIGURE 13.

ADDING BLOCKS TO A HIERARCHICAL BLOCK ........................................................... 84

FIGURE 14.

MODEL EXECUTION SEMANTICS ............................................................................. 86

FIGURE 15.

MODEL EXECUTION FLOWCHART ............................................................................ 86

FIGURE 16.

A MODEL USING THE DYNAMIC INSTANTIATION BLOCK .............................................. 88

FIGURE 17.

CONFIGURE PARAMETERS FOR DYNAMIC INSTANTIATION ......................................... 89

FIGURE 18.

DYNAMIC INSTANTIATION EXAMPLE IN VISUALSIM .................................................... 91

FIGURE 19.

LIBRARY FOLDER ORGANIZATION.......................................................................... 116

FIGURE 20.

BLOCKS IN DOCUMENT/ MODEL / MODELSETUP LIBRARY FOLDERS ........................ 117

FIGURE 21.

BLOCKS IN SOURCE LIBRARY ............................................................................... 118

FIGURE 22.

BLOCKS IN RESULT LIBRARY ................................................................................ 119

FIGURE 23.

CONTROL FLOW BLOCKS ...................................................................................... 120

FIGURE 24.

MAPPERS ............................................................................................................ 121

FIGURE 25.

BLOCKS IN RESOURCE LIBRARY ............................................................................ 122

FIGURE 26.

POWER ............................................................................................................... 123

FIGURE 27.

HARDWARE SETUP .............................................................................................. 123

FIGURE 28.

PROCESSOR GENERATOR .................................................................................... 124

FIGURE 29.

MEMORY ............................................................................................................. 125

FIGURE 30.

BLOCKS IN HARDWARE DEVICES........................................................................... 126

FIGURE 31.

INTERFACES AND BUSES ...................................................................................... 127

FIGURE 32.

INTERFACE BLOCKS ............................................................................................. 128

FIGURE 33.

MATH OPERATIONS LISTING ................................................................................. 128

FIGURE 34.

CONFIGURE PORTS ............................................................................................... 95

FIGURE 35.

HIERARCHICAL MODEL TO CREATE A CLASS ............................................................ 96

FIGURE 36.

A POOR DESIGN OF A DIVERSITY COMMUNICATION SYSTEM ....................................... 97

FIGURE 37.

CREATING AND USING A CHANNEL CLASS .............................................................. 100

FIGURE 38.

THE ICON CHANGED FOR THE CLASS ..................................................................... 100

FIGURE 39.

MODEL WITH THE ICONS OF THE INSTANCE ............................................................ 101

FIGURE 40.

THE MODEL WITH A SUBCLASS OF THE CHANNEL WITH NO OVERRIDES ..................... 102

FIGURE 41.

THE SUBCLASS WITH OVERRIDES THAT ADD SINUSOIDAL INTERFERENCES ............... 103

FIGURE 42.

A MODEL USING THE SUBCLASS FORM AND A PLOT OF THE EXECUTION .................... 104

FIGURE 43.

CREATE A BLOCK DIAGRAM .................................................................................. 109

FIGURE 44.

BLOCK ATTRIBUTES ............................................................................................. 109

FIGURE 45.

MAKING THE CONNECTION AND SELECT+ALL ........................................................ 109

FIGURE 46.

CREATE A CLASS ................................................................................................. 110

FIGURE 47.

INSTANTIATE CLASS TO IMPORT A CLASS .............................................................. 111

FIGURE 48.

VISUALSIM RECOMMENDED DIRECTORY STRUCTURE ............................................ 114

FIGURE 49.

LIBRARY INTEGRATION BETWEEN CENTRAL AND LOCAL SYSTEM............................. 114

FIGURE 50.

SIMPLE EXAMPLE ................................................................................................. 115

FIGURE 51.

SIMPLE EXAMPLE OF A VISUALSIM MODEL EXECUTION CONTROL WINDOW ............... 115

FIGURE 52.

VISUAL NOTATION AND TERMINOLOGY ................................................................... 115

FIGURE 53.

RELATIONSHIP GROUPS ....................................................................................... 115

FIGURE 54.

EXAMPLE TOPOLOGY. .......................................................................................... 115

FIGURE 55.

SINE WAVE GENERATOR TOPOLOGY. ..................................................................... 115

FIGURE 56.

VERTEX EXAMPLE................................................................................................ 115

FIGURE 57.

EXAMPLE OF A FUNCTION BEING PASSED FROM ONE ACTOR TO ANOTHER ................ 211

FIGURE 58.

ELABORATE USE .................................................................................................. 211

FIGURE 59.

USING PARAMETERS IN EXPRESSIONS .................................................................. 161

FIGURE 60.

USING PARAMETERS TO SET BLOCK ATTRIBUTES ................................................... 162

FIGURE 61.

LINKING PARAMETERS ......................................................................................... 164

FIGURE 62.

USING PARAMETERS TO SET THE ICON COLOR ....................................................... 166

FIGURE 63.

CONFIGURE PORTS FOR THE BLOCK ...................................................................... 167

FIGURE 64.

PORTS THAT CANNOT BE EDITED ........................................................................... 167

FIGURE 65.

BLOCK-TO-BLOCK CONNECTIONS ......................................................................... 172

FIGURE 66.

VISUALSIM MODELING LANGUAGES ...................................................................... 219

FIGURE 67.

LIST OF APPLICATION INTERFACE BLOCKS............................................................. 221

FIGURE 68.

POST PROCESSING LATENCY ................................. ERROR! BOOKMARK NOT DEFINED.

FIGURE 69.

POST PROCESSING HISTOGRAM ............................. ERROR! BOOKMARK NOT DEFINED.

FIGURE 70.

MODEL PLOT ......................................................... ERROR! BOOKMARK NOT DEFINED.

FIGURE 71.

HARDWARE MODELING LIBRARY ............................. ERROR! BOOKMARK NOT DEFINED.

FIGURE 72.

LIST OF HARDWARE BUSES .................................... ERROR! BOOKMARK NOT DEFINED.

FIGURE 73.

CYCLE-ACCURATE CACHE AND MEMORY MODELS ... ERROR! BOOKMARK NOT DEFINED.

FIGURE 74.

MODEL ANIMATION .............................................................................................. 243

FIGURE 75.

ANNOTATION WITH LINEREADER PLUS PROCESSING BLOCK ................................... 258

FIGURE 76.

FINITESTATEMACHINE ILLUSTRATION .................................................................... 261

FIGURE 77.

EXPORT TO WEB DIALOG WINDOW ......................... ERROR! BOOKMARK NOT DEFINED.

FIGURE 78.

VISUALSIM INTERFACE WITH FPGA ...................................................................... 264

FIGURE 79.

VISUALSIM MODEL............................................................................................... 267

FIGURE 80.

CONFIGURING DATAGRAM WRITER BLOCK ............................................................ 267

FIGURE 81.

CONFIGURING DATAGRAM READER....................................................................... 268

FIGURE 82.

GENERATE BITSTREAM ........................................................................................ 269

FIGURE 83.

GENERATE BITSTREAM ........................................................................................ 269

FIGURE 84.

EXPORT HARDWARE ............................................................................................ 270

FIGURE 85.

LAUNCH SDK ...................................................................................................... 270

FIGURE 86.

PROJECT EXPLORER............................................................................................ 271

FIGURE 87.

CANNOT EXPORT HARDWARE............................................................................... 272

FIGURE 88.

OPEN BLOCK DESIGN .......................................................................................... 273

FIGURE 89.

SHOW IP STATUS ................................................................................................ 273

FIGURE 90.

UPDATE SELECTED .............................................................................................. 273

FIGURE 91.

RECOMMENDATION ENGINE BLOCK......................... ERROR! BOOKMARK NOT DEFINED.

1 Scope and Purpose of the Document
1.1 Introduction
Mirabilis Design provides systems engineering solutions for performance analysis, power
estimation, and architecture exploration of electronics and real-time software. Mirabilis’ product
VisualSim is used for performance, functional, and power exploration of network of systems,
large systems, sub-systems, components (IC, SoC, FPGA, and boards) and real-time software.
VisualSim models are constructed in a graphical block diagram editor using a parameterized
modeling blocks library.

1.2 ScopeThis document provides the information required to enable the reader to construct systemmodels, execute simulations, and analyze the results with an intent to optimize thespecification. This document explains the basic components in this framework, the simulator,
modeling language, and provides an overview of the libraries.
The intended audience for this document is an engineer or researcher who wishes to constructmodels in VisualSim, debug these models, and conduct analysis. The goal of the exploration
is to architect the right product, that is one which minimizes product failures and has not beenover or under designed.

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2 Starting VisualSim
2.1

Running VisualSim Architect

To start VisualSim Architect, do the following:
1. The user needs to start the License Server located in the Web Server or local
system.
2. To start the License Manager, locate the install directory and navigate to VS_LM.
a. From a Command-line, system-prompt or shell window, type StartServer.bat(Windows) or StartServer.sh (UNIX) once you changed the directory to
VS_LM. You can also start the License Server by double clicking the fileStartServer.bat (Windows).
3. To start Architect, do one of the following:a. Double-click Architect VisualSim Architect in the Application Menu.
b. Double-click VisualSim.bat (WINDOWS) or VisualSim.sh (UNIX) in the
VisualSim directory viewer.
c. From a Command-line or system-prompt or shell window, go to the VisualSim
install and type VisualSim.bat (Windows) and VisualSim.sh (UNIX).

2.2 Running VisualSim Cloud
Prerequisite for VisualSim Cloud:
OpenWebStart - https://openwebstart.com/download/Java 17 - https://www.oracle.com/java/technologies/javase/jdk17-archive-downloads.html
Download Startermodel.jnlp using VisualSim Cloud login.
To start VisualSim Cloud, do the following:⇒ Double-click on Startermodel.jnlp from your local drive. Click yes on java security
warnings.
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2.3

Running VisualSim Post Processor

To start the Post Processor, do the following:⇒ Double-click PostProcessor.bat (WINDOWS) or PostProcessor.sh (UNIX) in the Post
Processor directory.
From a Command-line, system-prompt or shell window, go to the Post Processor install andtype PostProcessor.bat (Windows) or PostProcessor.sh (UNIX).

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3 VisualSim Products, Editors, and Tools
3.1 Home Page
The home page of the tool provides the graphical interface to the user to access all the features in
VisualSim. The following image shows the overview of the home page and the features available
in the tool.

Figure 1.

Tool Home pageThe top section of the home page provides the following access:1. New Model : Opens a Block Diagram Editor, where user can drag and drop library
blocks and create their own design, and utilize the complete modeling features ofVisualSim.
2. Open Model: Allows user to open an existing model in the system. By default it will
go to the VS_AR (Home directory of the tool) folder, where user can access thedemo folder which contain demo models for different applications and protocols.
User can also navigate to other directories where they can find VisulaSim models,
text file or plot files that can be opened by VisualSim.
3. Text Editor: Opens the Text editor window which allows user to write scripts ,algorithms, and documentation. But ultimately this feature is used to write codes in
VisualSim script language for any logic.
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4.

Expression Evaluator: Opens a window where user can try different RegEx andmathematical operations supported by VisualSim. User can use this feature toevaluate their logic, verify the RegEx format/usage, and try experimenting with theregex to see if it can be used in your Script or Expression List logic.

5. Search Bar: Search the models that you accessed before by typing their name.
6. Recent: This section list the recent model that are accessed by the user. It avoids
the need to open the frequently used model by navigating to the specific directoryeach time.
7. Pinned: This section allows the user to pin specific models to easily access themwhenever they need.

Figure 2.

Model Pinning in Home page

8. Auto Save: This section will contain the list of models that are auto saved while theuser was using it. This auto save feature save the model periodically if the user
makes some changes to the model but not saved in the local directory. It helps theuser to have a backup if the lost the design by accident, like closing the model
without saving it.
The top right section provides access to the demo models based on the application, library andtechnology. User can access this section to navigate to the model that best suits for theirrequirement.

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Figure 3.

Demo model classifactions

The left section of the tool home page contains some of the important features and setting ofVisualSim.
1. Models: This section allows the user to access the Recent model list, Pinnedmodel list and auto saved model list.
2. Learn VisualSim: This section provides access to the documents, training
materials, and tutorials of VisualSim, where users can learn about VisualSim
features, usage of the tool and usage of internal functionality.
3. Post Processor: This allows users to perform post analysis of a design, which
includes creating batch file to run multiple combination of parameters andcomparing the results of multiple runs.
4. Parser: The user can use this section to generate files for a specific application
which can be used as an input file in the model. It supports parsing for ARXML,
AXI, Gem5 and GCC and XML comparator. For more details visit the Parser
section in this document.
5. Settings: This section contains the VisualSim Settings and the user can modify
certain attributes for the correct function. (Default values works in most cases,
modify it only if it is necessary). The settings will be updated once the tool is closed
and reopened.

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Figure 4.

VisualSim Settings configuration

1. User can import C if the class files are outside of VS_AR directory. This
allows the model to load up the class files without causing any error.
2. The default locations and additional parameters for the simulator files areprovided, such as Verilog, C++ compiler and System C.
3. User can select the default browser to open the web pages.
4. The Auto Save Frequency parameter defines the auto save time for themodels being built or being open in VisualSim.
5. Users can select the language of their choice.
6. License server type of the current system can be selected.
7. License server name of this system will be displayed.
2. Release Notes: User can view the latest updates and features supported in thecurrent version VisualSim.
3. About: opens the company website for more detailed information.
4. Contact Support: Allows users to contact the support team through a mailingservice.

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3.2 Block Diagram Editor
The Block Diagram Editor (BDE) is the main editor in the VisualSim Architect environment.
Users construct, debug, validate, and optimize the models of their system in this environment.
Simulations to validate the model and get early feedback on the architecture are conductedfrom the Editor. After the model is stable and simulations are restricted to parameter changes,
the Batch Mode can be used for large scale system analysis.

In the BDE, select blocks from the core libraries, place them on the BDE canvas, and thenconnect the blocks to represent the functions of the system. Group the various functions of thesystem to form a hierarchical model representing a sub system. Make use of hierarchy andaggregation to manage the complexity of large systems. Include adjustable parameters in any
level so as to easily modify the system performance as per the requirement. Users can alterrandom number seeds to investigate system stability through analysis of variance. Prior tosimulation, assign each parameter a value to execute a simulation over a range of conditions.
Moreover, easily incorporate measured characteristics of the system, such as traffic traces, into
VisualSim models.

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3.2.1 Menu Commands
Menu

Sub Menu

Explanation

ShortcutOpen File

Select and open an existing model, text or html Ctrl+O
file on a local or networked disk.

New

Open a new Block Diagram Editor (BDE), Icon
Editor, FSM-Controller, FiniteStateMachine,
Text Editor, Expression Evaluator or Tcl
Evaluator.

Open Template

Select and open existing models that are listed

Listin the template page for different applications.

Save

Save the active file with its current file name, Ctrl+S
location, and format.

File

Save asSave by opening a window to change the file
name, location or format.

Print

Print the active file. User can change the print Ctrl+P
options.

ImportImport an existing file.

ExportExport to png, gif Page (Different from the
dynamic Export to HTML), and Save in Library(Saves the entire model content as a library in
User_Library).

Recent Files

View a list of the last 10 files that are saved for
you to easily select.

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Menu

Sub Menu

Explanation

Shortcut

Close

Close the active window.

Ctrl+W

Exit

Close the application.

Block Diagram

Switch from the existing window to Block

EditorDiagram Editor window. This feature isdisabled.

Simulation

View Simulation Cockpit of the model to modify

Cockpitthe parameters and to run the model. Thisfeature is being disabled from the next release.

Zoom In

View a smaller part of the diagram in the screen Ctrl+Shift+
view.

Equal
SymbolView
Zoom Reset

Reset the screen view to the original size.

Zoom Fit

Fit the content of the block diagram into the Ctrl+Shift+
viewable page.

Ctrl+M

Minus
SymbolZoom Out

View a larger part of the diagram in the screen Ctrl+Minus
view.

Full Screen

SymbolHide the menu and folder bar to display themodel to cover the full screen.

Edit

Undo

Last action disappears from the screen.

Ctrl+Z

Redo

Repeats your last action.

Ctrl+Y

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Menu

Sub Menu

Explanation

Shortcut

Cut

Removes the selection from the active file and Ctrl+X
places it on the clipboard.

Copy

Copies the selection to the clipboard.

Ctrl+C

Paste

Inserts the selected contents to the clipboard.

Ctrl+V

Send to Back

When the blocks are overlapped, select the Ctrl+B
required block, and click Send to Back to place
the block behind the adjacent block.

Bring to Front

When the blocks are overlapped, select the Ctrl+R
required block and click Bring to Front to place
the block in front of the adjacent block.

Find

Search for a keyword among the model blocks, Ctrl+F
parameters, expression, and memories.

Automatic

Rearranges

Layoutconnectivity, and relations in the model. DO

thelayoutoftheblocks, Ctrl+T

NOT USE. THIS IS A PROTOTYPE

GraphConfigure

Automatic Layout configuration. DO NOT USE.

LayoutTHIS IS A PROTOTYPE.

Instantiate Class

Select the class file to be placed in the BDE.
This can be a Java class or an XML class. Use
the File Selector to select the file. The file must
be located in a directory that is within the
CLASSPATH.
Example: VisualSim.actor.lib.AbsoluteValue

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Menu

Sub Menu

Explanation

Shortcut

CreateHierarchy

Select the blocks, connections, and parametersand create a Hierarchical_Block.
Note: All parameters that are used in theselected blocks must be included in theselection; else multiple errors are generated. In
some cases, the creation may have errors. All
the connected wires must be selected so thatthe input/output ports for this hierarchical block
will be generated automatically. All the createdports are consolidated at the top-left of thescreen within the hierarchical block.

Xml Comparator

Compares the current Model with anothermodel file.

New input port

Places an input port in the BDE.

New output port

Places an output port in the BDE.

New

Places an input/output port in the BDE.

input/output port
New input

Places an input multiport in the BDE.

multiport
New output

Places an output multiport in the BDE.

multiport

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Menu

Sub Menu

Explanation

ShortcutNew

Places an input/output multiport in the BDE.

input/output
mulitport
New Relation

Places a Relation (black diamond) in the BDE.

Listen toThis is a dialog window that is linked to the

Simulator

Digital Debug setting of the Digital Simulator.
This displays the block activity and usage
statistics.

Debug

AnimateSet time to view the dynamic operation of the

Executionsystem model. Current window in the model isanimated by highlighting the executing block.

Stop Animating

Turns-off the animation.

Generate

This is used with the C, Application Interface,

Wrapper

SystemC, and Verilog links. This generates therequired code files to interface with the thirdparty code and simulator. A single selection
generates a wrapper for all the links.

InterfaceCompileThis goes through a sequence to compile theWrappercode generated by “Generate Wrapper” alongwith the user code. A single selection compiles
all the blocks that have wrappers generated.

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Menu

Sub Menu

Export to Html

Explanation

ShortcutThis Menu item enables the user to open any modeland generates an html document. The tool
generates a separate page for each Hierarchicallevel. The page contains all the parameters, images,
blocks, and any documentation described using
Annotations. At the bottom of each page, the Applet
containing the model is included. On the top page ofthe model, the simulation is executable. For all otherpages, the view of the model alone is provided. When
this export occurs, a separate html page is createdfor each Hierarchical block. The model that shows onthese pages will not simulate. The top-level BDE thatis exported will have the simulation ability.

Help

About

View a brief description about the company andproduct.

Help

View a brief description about the company andproduct.

3.2.2 Details of Menu and Toolbar Operation
3.2.2.1 Open a New Window(Includes Block Diagram, Expression Evaluator, and Text Editor)
1. In your Mirabilis Design VisualSim program, click File > New.
2. From this menu, select the window of choice – Block Diagram, Expression Evaluator, or
Text Editor.
3. A new window is displayed.
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3.2.2.2 Existing Window (Model, Hierarchical Block, and URL)

1. In your Mirabilis Design VisualSim program, click File, and then click either Open File.
a) In the Look in list, click the drive or folder location that contains the files.
b) In the folder list, locate and open the folder that contains the file.
c) Select the file, and then click Open.
In addition, quick keys can be used:
1. CTRL+O – To open a file.
3.2.2.3 To open recently opened models – Recent Files
You can select from a list of most recently saved models.
3.2.2.4 Saving Options (Model, Block Diagram, FSM, and Text Editor)
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1. To quickly save a document, click Save on the Standard Toolbar or CTRL+S or click
File and then click Save.
2. To save the models in a different location, use the procedure below.
a. On the File menu, click Save As.
b. In the File name box, enter a new name for the file.
c. Click Save.
3.2.2.5 Editing Options (Model, Block Diagram, FSM, and Text Editor)

To move or copy a single item:
1. Select the item you want to move or copy.
2. Do one of the following:⇒

To move the item, click

Cut on the Standard toolbar.

⇒

To copy the item, click

Copy on the Standard toolbar.

3.

If you want to move or copy the item to another document, switch to the document.

4.

Click where you want the item to appear.

5.

Click

Paste on the Standard toolbar.

Alternate methods:•

Use the Cut, Copy, and Paste functions in the Edit Menu.

•

Use Cut (CTRL+X), Copy (CTRL+C) and Paste (CTRL+V).

To undo or redo an operation on a model:
1. Clickundo orredo in the Edit Menu or from the Toolbar.

To delete a block or link:
1. Select the block, state, link or transition you want to delete.
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2. Press DELETE on keyboard, or click Delete or on the Edit menu, click Delete.
3.2.2.6 Zoom In or Out of a model

1. You can “Zoom In” to get a closer view of the model or FSM or “zoom out” to see moreof the hierarchy at a reduced size.
2. Click Zoom In

and Zoom Out

on the standard toolbar.

3. In addition, you can Zoom To Fit to view the entire model or FSM on the screen.
4. Click Zoom To Fit

on the standard toolbar

5. Finally you can also Zoom Reset to bring the view back to the previously saved state.
6. Click the Zoom Reseton the standard toolbar.

7. In addition to the standard toolbar option, you can also click View on the Menu andselect the item.
8. Finally, you can also use the shortcut keys – Zoom in (CTRL+SHIFT+=), Zoom Out(CTRL+-), Zoom Reset (CTRL+M), and Zoom to Fit (CTRL+SIFT+-) to achieve the same
result.
3.2.2.7 Stop and Resume

The simulation can be executed from the BDE window also. These operations are similar tothe operations in the Simulation Cockpit:⇒ Click GO

to start the simulation.

⇒ Click STOP

to terminate the simulation and not continue further.

⇒ Click PAUSE

to temporarily halt the simulation.

⇒ Click RESUME

to restart the simulation from the point where it was paused earlier.

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The simulation can be stopped at any time. The displays can be viewed. The simulation canbe resumed from that point forward.
3.2.2.8 Editorial Functions

VisualSim provides the following Editorial functions:.
Automatic Layout: This modifies the layout of the blocks and parameters in the current window.
Do not use this feature as it incorrectly applies the layout for certain types of models.
Find: Search for a word among all the items in the model including the block names,
expressions, parameters, memories, and annotations. This does not find the keyword in classfiles.
Import a Library: If you want to import a library acquired from another install of VisualSim or
hand coded XML file, select Import Library from the File -> Import. Now, select the XML file.
Save in Library: The current model and its entire hierarchical list can be saved in the local
library as a block. This is done by clicking the “Save in Library” on File -> Export.
Create Hierarchy: A section of the current window can be made into a hierarchical block by
selecting the set of blocks and the relations and clicking “Create Hierarchy” in the Graph Menu.
This function creates a new block with all of these selected blocks inside. All the required port
for the interfaces are automatically created. It is important to select the links connected to theports at the periphery of the area selected. This ensures that the correct ports are generated.
Instantiate Entity: This instantiates a sub-model or class as a block in the BDE window.

3.2.2.9 Xml Comparator
Xml Comparator can be used to compare two model XML files. The user selects a second
model xml file to compare with the current open model file. The results of the comparison are
stored in the separate folder in the same directory with the name- (Model Name)_XML_Comparator.

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NOTE: A file path or file name containing hypen or special character should not be selected
for comparison. If selected, an Illegal Action Exception will be thrown.
Steps to perform the comparison•

Select the Xml Comparator for the Graph menu.

•

Select another xml file for comparison.

•

Go to the location of the Model xml file.

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••

Go into the folder (Model Name)_XML_Comparator created in the location.
Open the .txt file contained in the folder to view the result.

Figure 1•

Figure 1 shows the result of the comparison between two models

3.2.2.10 Model Hierarchy:

The model hierarchy can be viewed in two ways.
⇒

Click the Tab on the left section of BDE that says Tree. You can now select and viewany Hierarchical block in the model.

⇒

Click theicon to see more details about inside of each hierarchical block.

⇒You can drag and drop entities from the hierarchy diagram on to the canvas.

⇒

Click theoricons to see the characteristics of the entity.

3.2.2.11 Find
This resides above the Library folder list. This is used to search all the blocks in the library folder
list.
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3.2.2.12 System Functions
Compile and Generate Wrapper in ModelBuilder

The Generate Wrapper option generates all the required interface blocks to construct a
VisualSIm block out of existing Custom C, Custom C++, SystemC, and Verilog wrapper. A noteon the Command-line indicates that the operation has completed.
The Compile option compiles all the custom-coded block in the model. Current support is for
C, C++, SystemC, and Verilog. The output window indicates when the compile is completed.
Memory Management or Garbage Collect

Operation: Select the Garbage Collect icon () in the standard toolbar.

Details: This is useful when there are custom-coded blocks. Use the Garbage collection at
regular intervals and before starting a simulation.
Export to Html
Operation: Generate a document from the model.
Details: This Menu item enables the user to open any model and generate a html document.
The tool generates separate pages for each Hierarchical level. The page contains all theparameters, blocks, and any documentation described using Annotations. At the bottom of eachpage, the Applet containing the model is included.

3.2.3 Listeners•

Listen to Block: Right click the required block and select Listen to Block. The Pop up text
window displays the progression of execution in the block. Then run the model. Thisfeature is not available for Hierarchical blocks and instantiated hierarchical classes. If you
need to see the details of operation within a Hierarchical block, you need to Open Blockand select the block to view the execution details. If you need to view the detailed
operation of a Instantiated class, you need to select Open Instance and select the block toview the execution details.

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•

Listen to Port: Right click the required port and select Listen to port. The Pop up text
window displays each Token passing through the port. You can also add a “relation” infront of the port then connect a Text_Display to this relation to view the activity.

3.2.4 Folders and Tree
Folders:The list of pre-built and user library are provided in the Library folder on the left-side of
the Block Diagram Editor. Double-Click on any of the names to see the library blocks listed below.
To use a block, simply select the block name in the Library and drag-n-drop the block into the
Editor space.
Tree:The Tree tab allows the user to view the list of Hierarchical blocks in the model. The user
can click on a name and the respective hierarchical block opens. After the block is open, go backto the original Window, select, and drag-n-drop the hierarchical into the canvas.
Find: The Find function in the Folder can search the entire library table and find the block thatmatches the search word. Currently this only searches for an exact match.

3.3 Text Editor and Listener Windows
3.3.1 Introduction
The text editor is used extensively for authoring code in the Script. It is also used to view text files.
The Listener windows use the Text Editor. So, all the commands listed below are supported bythose Listener also.

3.3.2 Commands
All the File, Edit, and Help commands match the Block Diagram Editor.

3.3.3 Quick Key Commands
The Text Editor does not have the Menu Bar. The user will have to know that CTRL+C, X, V, CTRL+F,H arefor copy, cut, paste, find, and Find & Replace.
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3.4 Plotters and VisualSim Post Processor
3.4.1 Introduction
VisualSim Plot provides comprehensive charting and analysis capability that enables themodeler to remain within the VisualSim environment for all complex analysis. The Plot graphs
are instantiated in a model and are displayed as independent viewers when a simulation isstarted. The independent Post Processor application allows the user to set the view vs. save
options for the plots and the plot file name. An associated index file allows for the plots frommultiple runs to be combined and viewed in a single display. The graphs can be generatedusing various Display blocks in VisualSim and by importing XML data files from an externalsource. The graphs can also be embedded in an HTML executable specification as a JavaApplet. Plot includes all the format functions required to modify the view. A variety of charts
including, XY, bar, histogram, timeline, and signal are available.
VisualSim Plotting is a set of two-dimensional signal plotters that enhance the capability of the
VisualSim simulation platform. Plotting is sometimes viewed as a "post" modeling activity. You
can use the VisualSim Plot and the Post Processor application to graphically display andanalyze data collected from the simulation. The Plotters can organize results into a variety ofx-y graphs and histogram plots for graphical display. An XML extension language for plot data
has been created and is available for the user to extend.

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Figure 5.

VisualSim Post Processor Window

The following are the key properties of the product:•

Embeddable in applets or applications•

Auto-ranging•

Automatic or manual labeling of axes•

Automatic or manual tick marks•

Logarithmic axes•

Live, animated plots•

Zooming upto the resolution•

Various plot styles: connected lines, scatter plot, bars, and so on•

Various point styles: none, dots, points, and unique marks•

Multiple data sets and a legend
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•Color or black and white plotting•

Error bars•

Editable plots•

XML language for specifying plots•

Within a folder if there are multiple files having same name with consecutive numbering like
myfile_1, myfile_2, myfile_3, then on selection, all 3 plots will be combined into a single plot
and thus a single metric can be compared for different test cases easily.

3.4.2 Post Processor Plot Window

File
Edit

Edit

Reference Guide

Open, Save, SaveAs, Export, Print and Close

FormatModify the layout of the plot.

Clear

Empties the plot.

Fill

Populate the plot.
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Reset Axis

Reset axis to include allvalues.

Activity

About

View a brief description about
the company and product.

Configure Model

Configure

a

model

to

generate batch file and index
file.
Open Plot Index

Select an index file toe viewplots associated with eachrun.

Combine Simulation Plots

Creates a plot will all the
combintions of particular plot
in a single window.

3.4.3 Using Plot
3.4.3.1 Zooming and filling

To zoom in, drag the left mouse button down and to the right to draw a box around an area thatyou want to see. To zoom out, drag the left mouse button up and to the right. To just fill thedrawing area with the available data, type Control-I, invoke the fill command.
3.4.3.2

Printing and exporting

The File menu includes a Print and Export command. The Print command works as you expect.
The export command produces a png, gif, and black-and-white encapsulated PostScript file
(EPS) suitable for inclusion in word processors and Web Pages.

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Note: At this time, the EPS file does not include preview data. This can make it somewhat
awkward to work with in a word processor, as it will not be displayed by the word processor
while editing (however it prints correctly). It is easy to add the preview data using the freely
available program Ghostview 1. Just open the file using Ghostview and, under the edit menu,
select "Add EPS Preview." Export facilities are also available from a small set of key bindings,
which permits them to be invoked from applets (which have no menu bar) and from the invoked
VisualSim Plot.
Note further that with applets, you may find it best to click near the title rather than clicking
inside the graph itself and then type the command.
Exporting to the clipboard and to standard output, in theory, is allowed for applets, unlike writing
to a file. Thus, these key bindings provide a simple mechanism to obtain a high-resolution
image of the plot from an applet, suitable for incorporation in a document. However, in somebrowsers, exporting to standard out triggers a security violation. You can use Sun'sappletviewer instead.

Figure 6.

AppletViewer

1 Ghostview is available in http://www.cs.wisc.edu/~ghost.

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Figure 7.

Zoom in.

To zoom in, drag the left mouse button down and to the right to draw a box around the region
you wish to see in more detail.
1. Control-c: Export the plot to the clipboard.
2. Shift-d: Dump the plot to a standard output.
3. Shift-e: Export the plot to a standard output in EPS format.
4. Shift-f: Fill the plot.
3.4.3.3 Editing the data

You can modify the data that is plotted by editing the plot file.
3.4.3.4 Modifying the format

You can control how data is displayed by invoking the Format command in the Edit menu or
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left, are the dialog and the plot before changes are made, and at the right are after changes
are made. In particular, the stems are added, the lines connecting the data points are added,
and the data points are rendered with points. Use the Save or Save As command in the Filemenu to save the modified plot. More sophisticated control over the plot can be had by editing
the Plot file, which is a text file.
The entries in the format dialog are all straightforward to use except the "X Ticks" and "Y Ticks"
entries. These are used to specify how the axes are labeled. The tick marks for the axes areusually computed automatically from the ranges of the data. Every attempt is made to choose
reasonable positions for the tick marks regardless of the data ranges (powers of ten multipliedby 1, 2, or 5 are used).
To change what tick marks are included and how they are labeled, enter into the "X Ticks" or"Y Ticks" entry boxes a string of the following form:
label position, label position, ...
A label is a string that must be surrounded by quotation marks if it contains any spaces. A
position is a number giving the location of the tick mark along the axis. For example, a horizontal
axis for a frequency domain plot may have tick marks as follows:
XTicks: -PI -3.14159, -PI/ 2 -1.570795, 0 0, PI/ 2 1.570795, PI
3.14159

Tick marks could also denote years, months, days of the week, and so on.

Figure 8.
Reference Guide

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The above plot displays the Control data using the Format command in the Edit menu.

3.4.4 Commands Configuring the Axes
The following commands are understood by the Application. These commands can be placedin a file and then read as a local file or via a URL. The recognized commands include:•

TitleText: string•

XLabel: string•

YLabel: string

These commands provide a title and labels for the X (horizontal) and Y (vertical) axes. A stringis simply a sequence of characters, possibly including spaces. There is no need here to
surround them with quotation marks, and in fact, if you do, the quotation marks will be includedin the labels.
The ranges of the X and Y axes can be optionally given by commands like:•

XRange: min, max•

YRange: min, max

The arguments min and max are numbers, possibly including a sign and a decimal point. If they
are not specified, then the ranges are computed automatically from the data and padded slightly
so that datapoints are not plotted on the axes.
The tick marks for the axes are usually computed automatically from the ranges. Every attempt
is made to choose reasonable positions for the tick marks regardless of the data ranges(powers of ten multiplied by 1, 2, or 5 are used). However, they can also be specified explicitly
using commands such as:•

XTicks: label position, label position, ...

•YTicks: label position, label position, ...

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A label is a string that must be surrounded by quotation marks if it contains any spaces. A
position is a number giving the location of the tick mark along the axis. For example, a horizontal
axis for a frequency domain plot might have tick marks as follows:
XTicks: -PI -3.14159, -PI/ 2 -1.570795, 0 0, PI/ 2 1.570795, PI
3.14159

Tick marks could also denote years, months, days of the week, and so on.
By default, tick marks are connected by a light grey background grid. This grid can be turned
off with the following command:•

Grid: off

It can be turned back on with the grid.
•

Grid: onAlso, by default, the first ten data sets are shown each in a unique color. The use of color canbe turned off with the command:•

Color: off

It can be turned back on with a check box in the Format window.
•

Color: on

3.4.5 Commands for Plotting Data
The following set of commands are understood by the Application support:•

Specification of data to be plotted•

Control over how the data is shown

The style of marks used to denote a data point is defined by one of the following commands:♦ Marks: none
♦ Marks: points♦ Marks: dots
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♦ Marks: various♦

Marks: pixels

Here, points are small dots, while dots are larger. If various is specified, then unique marks areused for the first ten data sets, and then recycled. If pixels are specified, then a single pixel isdrawn.
Using no marks is useful when lines connect the points in a plot, which is done by default. If
the above directive appears before any DataSet directive, then it specifies the default for alldata sets. If it appears after a DataSet directive, then it applies only to that data set.
To disable connecting lines, use:♦Lines: off

To re-enable them, use♦

Lines: on

You can also specify "impulses", which are lines drawn from a plotted point down to the x axis.
Plots with impulses are often called "stem plots." These are off by default, but can be turned onwith the command:♦

Impulses: onor back off with the command♦

Impulses: off

If that command appears before any DataSet directive, then the command applies to alldatasets. Otherwise, it applies only to the current data set.
To create a bar graph, turn off lines and use any of the following commands:♦ Bars: on♦ Bars: width♦ Bars: width, offset

The width is a real number specifying the width of the bars in the units of the x axis. The
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previous one. This allows bars to "peek out" from behind the ones in front. Note that the forwardmost data set is the first one. To turn off bars, use:♦

Bars: off

To specify data to be plotted, start a data set with the following command:♦ DataSet: string

Here, string is a label that appears in the legend. It is not necessary to enclose the string inquotation marks.
To start a new dataset without giving it a name, use:♦

DataSet:In this case, no item appears in the legend.
If the following directive occurs:♦ ReuseDataSets: onthen datasets with the same name are merged. This makes it easier to combine multiple data
files that contain the same datasets into one file. By default, this capability is turned off, so
datasets with the same name are not merged.
The data itself is given by a sequence of commands with one of the following forms:♦ x, y♦ draw: x, y
♦ move: x, y
♦ x, y, yLowErrorBar, yHighErrorBar♦ draw: x, y, yLowErrorBar, yHighErrorBar♦ move: x, y, yLowErrorBar, yHighErrorBar

The draw command is optional, so the first two forms are equivalent. The move command
causes a break in connected points, if lines are being drawn between points. The numbers x
and y are arbitrary numbers as supported by the Double parser in Java (e.g. "1. 2", "6.39e-15",
and so on.). If there are four numbers, then the last two numbers are assumed to be the lower
and upper values for error bars. The numbers can be separated by commas, spaces or tabs.
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3.5 VisualSim Post Processor
3.5.1 Introduction
VisualSim Post Processor application is a network-based application that can be shared acrossa division or a corporation. VisualSim Post Processor is platform and OS-independent, enabling
different users to maintain the same experience. In addition, a mobile provision enables the
Post Processor to be used offline. This enables flexible usage during travel, design review, andremote presentations.

3.5.2 Key Features
1. Uses an open XML DTD for data management with a .plt extension.
2. Graphical user interface with built-in error checking.
3. Manages the plot selection for viewing and display.
4. Configure a model to save the plots in a specific destination directory.
5. Creates an index for all the simulation runs of the model along with the associated plot.
6. Open plots from different simulation runs simultaneously for easy comparison.
7. Combine datasets from multiple plots into a single graph (Future release).

3.5.3 Quick Key Command
File

Edit

Reference Guide

Same as the Block Diagram Operations
ExportExport plot image as a eps, gif, and png.

FormatModify the layout of the plot.

Clear

Empties the plot.

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Reset Axis

Reset axis to include all values.

About

View a brief description about the company
and product.

Configure Model

Create an index for the plot and select thesimulation parameters to save.

Activity

Open Plot Index

Select plots from multiple simulations to
combine and view.

Combine Simulation Plot all the individual plots in a directory in
Plotsa single window.

3.5.4 Usage
To understand the usage of the Post Processor, let us look at the example available in the Post
Processor install under Model_Plots.
•

Step 1: From the VisualSim Architect Block Diagram Editor, add the PlotManager block(Results > PlotManager) to VME_Bus_Model1.xml. The Plot_Path is updated to thedestination of the output plot files (make sure the path is added within “” and the slashes
are backward slashes).

•

Step 2: From the Post Processor window, select Configure Model. Now, select the
VME_Bus_Model1.xml. Click the parameters that are varied to create the different uniquesimulation runs of the model. Also specify which plots need to be viewed and which one
must be saved. Click OK or Apply + OK. This creates an index file and a Batch file in thedestination directory.

•

Step 3: Now run the simulation in batch or interactive mode by varying the selectedparameters. If parameters not selected in Step 2 are used, these runs are not to be treatedas unique. Other runs could overwrite the plots from these runs.
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•

Step 4: Now return to the Post Processor. Select Open Plot Index, select the
VME_Bus_Model1_Index.xml that is located in the destination directory. For Plotconfiguration file, select any plot in the destination directory related to the model. The list of
simulations runs for the model and the associated plots are listed. Select any number ofruns and any plot. Click View Plot. The plots are now displayed as separate windows. Click
View Selected Traces. The plots are displayed in a single window for comparison.

3.5.5 VisualSim Architect Models
VisualSim Post Processor works with two Display (Unbuffered and Buffered), TimeDataPlotter,
Histogram Plotter, XYPlotter, DS_TimeDataPlotter, DS_XYPlotter, ArrayPLotter and BarGraph
blocks of the VisualSim model. The Display blocks are supported for the purpose of setting
View and Save only. They can not be opened with VisualSim Post Processor. The graphs are
stored in XML files with a .plt extension. Simulation results from a single model are stored
together and are tagged with the simulation run ID and the plot name. A simulation index filemaintains the connection between the simulation run and the graphs. The simulation runs are
uniquely identified by the variation of the parameter.

3.5.6 Usage
VisualSim provides all the standard graphical user interface capability. These include edit
functions such as open a new plot file (single file), print, save, and export to eps format. The
format functions provide the ability to modify the view of a single plot. The Activity menu
configures simulation model and opens the index file containing references to plot data.

3.5.7 Post Processor Activity
Configure Model- This is used to configure a model to generate Batch file and Index file. Stepby-step instruction:
1. Add PlotManager block in VisualSim Block Diagram of the model to be configured.

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2. Specify output directory path in the PlotManager block parameter Plot_Path (path withindouble quotes and the slashes in backward slash).
3. Select Configure Model from the main Post Processor application window.
4. From the parameter list, select the parameters that are modified during this batch run ofsimulation results. Leave out parameters that are not modified during this run. You canalways go back and redo this listing for a different run.
5. Format for parameter Range and step: Range can support range of parameter as startand and end range with colon eg: 10:100. Range also support all possible values eg: 10,
25, 50, 100. For Range format the Step must be set with the a value that increase forevery run. For all possible values the Step must have None.

In this case the Latency range is from 1 to 20 and the step is 5, so the bath mode simulation
will create runs as 1, 6, 11 and 16 for latency. For Sim_Time the defined values will be used
for each run.
6. For each plot in the model, you can view (during the simulation), save or both. Select theradio button to enable this.

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7. Click OK. You will get a pop window that says Batch File Generated.
Open Plot Index - This opens the reference to the simulations and their respective plots.
1. After completing the simulation runs, return to the Post Processor.
2. Select Open Plot Index.
3. Select the index file . (Model name _Index.xml)
4. Select any one of the plot file in Plot configuration file selection window.
5. A list of simulations runs identified by the values of the selected parameters are displayedon the top-half of the window. A list of the plots is displayed in the bottom.
6. Select one or more simulation runs and one or more plots (all is also an option).
7. Click View Plots, the selected plots open in separate windows.
8. Click View Selcted Traces to get the plots in a single window.
9. Sometimes, a blank plotter screen may appear. Click on Format  Fill to view the Files.
Note: All plot windows appear one on top of the other.

3.5.8 Packaging and Archiving
To package and ship the simulation results, simply tar or zip the output directory. This can be
shipped to the end-user. The end-user then unzips the content. The model index is containedin the package and can be used for viewing the graphs.

3.6 Icon Editor
This Editor is used to create custom icons for the blocks. This editor has a number of standard
shapes, lines, colors, and functions to access block parameters.
If editing a block in a model, then the resulting icon details are stored in the model XML file. If
a new icon is being constructed, the resulting icon is stored in an XML format.

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An icon can be constructed using shapes such as lines, circles, and rectangles. Alternately,
there can be an image used for the icon. The one restriction is that the icon must be in thesame directory as the XML file containing the reference.

3.7 Expression Evaluator
This uses the extensive expression language available in VisualSim to evaluate equations andalgorithm. This can be used for conducting quick studies that are algorithm in nature and do
not require simulation. Also, this can be used to test a sequence of expressions and see if theywork before using in the Script Block. This supports variables defined in the environment andcan be used with any of the functions in the RegEx language. Below is an example:

Notice that the errors in the expressions are also displayed here. This can be used to fine tune
your sequences. This window does not support C language functions such as while, if-else,and switch-case.
To learn more about the RegEx language, refer to the RegEx Expression documentation in
Learn VisualSim section of tool front page.
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3.8 Simulation Cockpit

Figure 9.

Simulation Cockpit

The simulation cockpit provides a single window to set parameter values, simulate, listen to
simulator activity, and view the plotted result. The Simulation Cockpit has been included with
VisualSim as a legacy support.

3.8.1 Operation
These functions are the buttons in the Simulation Cockpit.
⇒ Click GO⇒ Click STOP
⇒ Click PAUSE

Reference Guideto start the simulation.
to terminate the simulation and not continue further.
to temporarily halt the simulation.

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⇒ Click RESUME

to restart the simulation from the point where it was paused

earlier.

3.8.2 Listen to the Manager and Simulator
Operation: Click Debug in the Menu of the Simulation Cockpit and then click Listen toManager/Simulator.
Details: The Listen to Manager has been disabled to speed up the simulation. Futureapplications of this interface are being considered. The Listen to Simulator can report thesequence of block execution and the model profile statistics at the end of the simulation. The
setting of the Digital Simulator determines the output. Other simulators do not provide any data
to this window.


Note

The Listen to Simulator is used in conjunction with the Digital debugger. Refer tothe Digital debugger under Model debugging sections.

3.8.3 Pause and Resume
The simulation can be paused at any time. The display can be viewed and the simulation canbe resumed from that point forward.

For the Pause and Resume to work effectively, the Listen to Manager Dialog

Note

Pause request is lost.

window must be started. The simulation is faster than the keyboard access and the

3.8.4 Simulation Parameters
Modify the values of the parameters in the Simulation Cockpit and restart the simulation. There
are two types of parameters that can be finalized prior to simulation - Simulation parameters
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and Model parameters. The Simulation parameters modify the actions of the kernel while themodel parameters modify the operating of the simulation.

3.8.5 Plot viewers in the Simulation Cockpit
Export : Click thisicon to export the plot to different file type. Specify location and filename and click Export.
Save : Click thisicon to save the data into a file. Specify location and file name and click

OK.
Print : Click theicon to print the window. In the Print window, select printer, and then click

OK.
Rescale : Click theicon to rescale the plot to fit the data.

Format : Click theicon, specify the various attributes, and click OK.

Reset : Click theReference Guide

icon to reset X and Y axis to their original values.

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4 Parsers
The VisualSim Architect provides different parser for specific purpose that can be used in the
VisualSim environment. For example, if the user has to generate a file for a model input and it
requires aspecific format then these parser helps user to obtain the files in the required format by
reducing the amount of time spend on modifying and updating the files. Other caser are likegenerating a file for analysis such as axi parser and XML comparator.

4.1 ARXML parser
The parser takes a ARXML (Autosar XML) file as input which contains the data in a package
format. The parser extract the data information using the tag list file (arxml_parser_tag_list.csv)
that user kept in the folder where the .arxml fie is located, and then it provide the output files thatcan be loaded to a model such as AUTOSAR.
How to use it:
Selest Parser in tool home page and select Arxml Parser option.

Figure 10. ARXML parser Window
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Select Browse and choose the ARXML file that you want to parse. Once the file is selected, Clickgenerate.

The format of the arxml_parser_tag_list.csv file to extract the data from the arxml file.

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Once the parsing is completed successful message is printed in the command line the output
CSV files are gerenated in the local directorty.

Output fileFigure 11. ARXM parsing results

4.2 AXI parser
The AXI parser allows user to create GNU plot of the transactions happened between the masterdevices and slave devices. By configuring the Ports_to_Plot and Enable_Plots parameter in AXI
block user can obtain the data files. User must have GNU plot software to view the result.

4.2.1 Parameter configuration in model:
Ports_to_Plot = {1,1}// {Master, slave} single master single slave format= {{1,1},{1,3},{2,1}} // multi master multi slave format
Enable_Plots = true// false will disable the plot generation

After the simulation is completed the files can be located in a result directory (Model
Name)Result, which will be in the model directory.

4.2.2 Python File Update
User have to update the python file if the data generated AXI bus name is other than “AXI”.
Example “AXI_Top”. In such case, please go to the folder \VS_AR\VisualSim\parser\AXI_Parser
and edit the file “plt_file_generator.py” using a test editor as follows.
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Check for the string “AXI_” in the file and replace the word AXI with the bus name (11 locations
uses bus name in the python file). For example, if bus name is “AX_Top”, replace AXI_ to
AXI_Top_. Once the changes are made save the file and open the tool.

4.2.3 Parser
Go to the tool page and select the Parser, then select AXI Parser in the pull down option.

Figure 12. AXI pasreser window

Select the folder which contain the data files in AXI raw data folder.
Update the Masters/Slaves option according to the number of master and slave configured in themodel. Format is Master_1,Master_2, Slave_1,Slave_2 .
If user entered wrong name like Master 14 but that is not configured in the model during
simulation it will throw an error. Please update the master salve name correctly.
Select the speed at the bus was simulated. Eg: 100, which is 100Mhz.
Once the parmaters are configured correctly click Generate. You will get a gnu plot file in the
result directory where the data files are stored. User can view the plot in GNU plot software.

4.3 GEM5 parser
The Gem5 parser helps the user to generate the trace file that can be used to run an application
program in Hybrid processor. Select parser from tool home page and select Gem5 Parser option.

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Figure 13. Gem5 Parser window

Select the gem5 executed trace in Gem5 Output file section, and select the istruction set file forthe target processor in ISA text file section.

Figure 14. Gem5 executed trace format

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Figure 15. Instruction set file format

Once you selected the file, select Generate.

4.4 GCC Parser
The GCC parser helps the user to convert the compiled disaassembly file into the trace file thatcan be loaded to the micro- architecture processor model. The binary file and the dissasembly file
must be generated for a target processor in linux.

4.4.1 Binary and disassembly files
The following command is an example for a arm cortex A77 processor.
aarch64-none-linux-gnu-gcc -mtune=cortex-a77 -mcpu=cortex-a77 -O3 -static -o dpt dpt.c -lm
This will provide a binary file which must be used to generate the disassembly. The following
command convert the compiled binary code into diassembly.
aarch64-none-linux-gnu-objdump -d dpt | tee cmdPrint_dpt.txt
In this case the binary file name is dpt and the disassembly file name is cmdPrint_dpt.txt
Once the disassembly file is generated use that file in the GCC parser. The followng image shows
the disassembly file format.

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Figure 16. Disassambly file format for GCC parser

4.4.2 GCC file parsing
Select Parser in the tool page and select GCC Parser in the pull down option.

Figure 17. GCC parser window

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Select the disassembly file generated using the commands mentioned in the previous sub sectionin the gcc disassembly file option. Click Generate, once the parsing is completed a file named
Trace_1.txt will be generated in the same folder.

Figure 18. GCC parser output file

4.5 XML comparator
The XML comparatro performs comparision between two xml files to observe the difference
between two models in different aspects, such as parameters, variables, etc. Select Parser in toolhome page and select XML comparator option.

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Figure 19. XML comparator window

Select the xml files that you want to compare in XML file 1 and XML File 2 oprions. Clickgenerate.
Once the comparison is complete a folder with (Model Name)_XML_Comparator will be
generated in the XML File 1’s local directory. The comparison file can be located in this directory.

Figure 20. XML comparator result

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5 Blocks
A block is a basic modeling component available in VisualSim. Every icon in VisualSim isconsidered a block. A block contains an icon, ports, parameters, and logic inside. The user canmodify the parameters. Associated with each are a standard documentation and the ability for theuser to create custom documentation. Some of the blocks have the ability to add additional ports.
The user can change the graphic image of the icon using the Custom_Icon option. If an attributesuch as a rectangle is covering a Block, right-click on the attribute and “Send to Back”.

5.1 Block Execution Semantics
VisualSim supports a common set of block execution semantics. Here we focus on the Digitaldomain. A Digital library block can optionally execute the following internal methods:
initialize () Initialize Block parameters, attributes, memories, and so on
prefire()Pre-Fire Block once per simulation iteration

fire()

Fire Block, input Tokens processed, outputs generated

postfire()

Post-Fire Block, iterations, scheduled events

wrapup()Wrap-Up Block, free memory, collect ending stats

It is not necessary to become familiar with the details of internal block execution, unless one isplanning to create their own custom blocks. The typical block that are shipped with VisualSim
executes the initialize() and fire() methods. In the initialize () method, blockparameters, and block menu entries are read, as the block is initialized into the modeling space.
In the fire() method, input port Tokens are processed, and output port Tokens are generated
based on the Block functionality. Graphically, block execution looks similar to the following
image:

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Figure 21.

Block Execution Semantics

5.2 Block Layout
A typical Digital Block contains the following attributes:

Figure 22.

Block Attributes

The user notices that a “Name” sometimes appears on top of the block symbol. This text
typically describes the beginning of the first statement, or other parameter of the block, so theuser can quickly identify the block functionality without having to open it.
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5.3 Block Context Menu

Figure 23.

Block Context Menu

The Block Context Menu options are explained in the following sections:

5.3.1

Customize

The Customize Parameters is available for the parameters, blocks, modules, and ports. This
Configure option is used to modify or add parameters to the block. After the parameters are
modified, click Commit to update the model or click Cancel to retain the current settings.
The Ports is available for the blocks, and modules. Click in the cell to be edited. Some
properties may not be editable because they are part of block definition. These cells have a red
background and ignore any attempts at editing as shown below.
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Figure 24.

Ports that cannot be edited

Name – Names must not contain a period or a space, must not be blank, and should be unique.
Input, Output, Multiport – Checkboxes that determines if a port is input, output, or both.
Type – The type can be given by any expression that can be evaluated (this expression iscalled a “prototype”). For example, you can specify the type to be double by giving the string“0.0” (or any other number with a decimal point). However, this does not look very good as adesignator for a type. The VisualSim expression language defines the constant “double” toequal “0.0”. Thus, the preferred way to specify that a port has type double is to give its type as“double”.
The primitive types include:• Data Structure• boolean• complex• double• fixedpoint• float• general• int• long• matrix• object• scalar• string• unknown• unsignedByte• xmltoken• {int}• [double]• {x = double, y = double}
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The constant “unknown” has a rather special behavior, in that it sets the type of the port to be
unknown, allowing type resolution to infer it. The constant “matrix” designates a matrix without
specifying an element type, in contrast to, for example, “[double]”, which specifies a double
matrix (see below). Similarly, the constant “scalar” designates a scalar of any type (double, int,
long, etc.). The constant “general” designates any type.
As the type is given by a “prototype”, any data type that can be given in an expression can be
specified as a type. For structured types, follow the same syntax as in expressions. For
example:{double} – double array[int]- int matrix{field1 = string, field2 = int} – For Data Structure
Direction – The Direction determines which side of the icon the port is located on. Clicking inthis cell brings up a menu that provides the means to select a specific side, that is. NORTH,
EAST, SOUTH, and WEST. DEFAULT can also be selected. Below are the defaults:o Input ports are usually on the West side.
o Output ports are usually on the East side.
o Ports that are both an input and an output are located on the South side.
Show Name – Enabling this option causes the name of the port to be displayed. Disabling it
removes the name from the display.
Hide – Disabling this option causes the port to be displayed. Enabling removes the port fromthe display.
Units – The units specification for the port. This is currently not being used.
Remote Types – This column is used to define the data types on the remote system orapplication. This is used to define the data types for the Verilog, Application Interface, andSystemC only. This is a string field and must be enclosed by “”. The content in this column text
depends on the type of block and the interface.

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5.3.2Customize Name

This feature is available for the parameters, blocks, modules, and ports. This function is called
to modify the name of this entity. After the name has been modified, click Commit to update
the model or click Cancel to retain the current settings.

5.3.3

Get Documentation

This feature is available for the blocks and modules. This function opens a new window thatprovides access to the complete documentation associated with that block. If there is no
documentation provided for the entity, then a dialog window appears indicating that there is no
documentation available or the default documentation for the base compone is shown, such as
Hierarchical block. The Customize Documentation enables the user to override the default
documentation and add their own information. This is associated with that block in the model.
Note that once the user selects the Customize Documentation item, the documentation shows
the new format. To undo this option, the user must go to Remove Custom Documentation.

5.3.4

Send to Back

This moves the selected block behind whatevber is in front. For example, it can be a Annotation
or a Rectangle.

5.3.5

Bring to Front

This moves the selected block to the front.

5.3.6

Save Block in Library

The selected block can be saved in the local library. This is a useful way to store the frequently
used blocks in a local list.

5.3.7

Listen to BlockThis feature is available for the blocks and modules. A new text window opens. This featureenables the user to view the progression of the execution through the selected block. This
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feature is not available for Hierarchical blocks. It is supported for regular blocks and instantiatedhierarchical classes. If you need to see the details of operation within a Hierarchical block, youneed to Open Block and select the block to view the execution details. If you need to view thedetailed operation of a Instantiated class, you need to select Open Instance and select theblock to view the execution details.

5.3.8

Set Breakpoint

This feature allows the user to set the breakpoints at any block. This feature is available only
for Digital and Untimed Digital Domains. This can be used to move the simulation to a particularpoint in the simulation and then debugging operation such as a listen to block.

5.3.9

Convert to ClassThis feature converts this block into a class. A class is a master version of the block. This classcan be instantiated multiple times in the model. Changes made to this class block (identified bya blue halo), are replicated to all linked instances. The information in the XML for the instances
are all linked to this class block.

5.3.10Class Action - Create Instance (Ctrl+N)

This creates an instance of the class block.

5.3.11

Class Action - Create Subclass (Ctrl+U)

This creates a subclass of the class block. Instances can also be created of the sub-classes.
Changes made to this block propagate to the instances. Changes made to the class block arepropagated to this block.

5.3.12

Convert to InstanceThis converts the class or subclass back to an instance.

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5.3.13

Open BlockThis feature is available for hierarchical blocks and those shipped with source code. All otherblocks show up with an error message.

5.3.14

Open InstanceThis opens the details of the instance and not the original class. This is very important formodels constructed with XML classes. The instance code must not be modified. Modify thecode in the block definition. If the instance code is modified, the reference to the original classis disconnected. Use the Instance to do Listen to Block/Port for debugging in the model.

5.3.15

Appearance - Edit Custom Icon (Icon Editor)

This menu item is used to replace the current icon for the selected block with a custom drawn
icon. This item opens the Icon editor. The user can create a custom icon in the Editor and saveit in the XML file along with the current model.

5.3.16

Appearance - Remove Custom Icon

This restores the original icon and removes the custom icon.

5.3.17

Appearance – Flip Ports Horizontally

The ports will be reordered by flipping the ports in horizontal axis.

5.3.18

Appearance – Flip Ports Vertically

The ports will be reordered by flipping the ports in Vertical axis.

5.3.19Appearance – Rotate Ports Clockwise

The ports will be reordered by Rotating the ports of the block in clockwise direction.

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5.3.20

Appearance – Rotate Ports Counterclockwise

The ports will be reordered by Rotating the ports of the block in counter clockwise direction.

5.4 Setting up a Block5.4.1 Blocks Overview
1.

All Data Structures enter on the top-left (input port) and exit on the top-right (output port).
Blocks have parameters that can be populated by the user. There is a format for fillingthe values for every block, most of the block have default values or comments about theparameter. The block documentation has example values for each parameter2.

The traffic is the stimulus that goes through from block to block. The input into a blockcauses the block to fire, meaning that the block takes the content of the input; does
modification to the content or does some action based on the content; and then places
it on the output port.

3.

Block Parameter entry rules:
a. Any parameter field that is shaded blue is a string expression. All values placed
within this string do not require “” around them.
b. If the entry is an expression and the background of the parameter space is not
blue, the complete expression must be enclosed in a “”.
c. If the entry is a number or a parameter, then no quotes are required.
d. Memories and field names must be always within “”, if the parameter field is notshaded blue.
e. ExpressionList, Script, and Smart Controller blocks support multiple input ports.
Hence the field names on any input port must be identified with the prefix of“port_name.”. For example, input.INDEX is the INDEX field in the Data Structure
arriving on the port called “input”.
f.

The Script block also supports a generic port, called port_token, that represents
any input port, and the current executing thread.

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g. In the Basic Processing and Resource blocks, there can be only a single input
port. Here, the field name does not contain the “port_name” prefix.

5.4.2 Updating Parameters and adding additional parameters
To set up a block in VisualSim, double click the library and select the required block. Drag anddrop the block into the BDE and double click the block to set the parameters. You can also rightclick and select Customize > Configure. The Edit Parameter window is displayed. Set values
for the predefined parameters. You can create a new parameter for the block. To add a newparameter, click Add, enter the parameter name, default value and class. Click OK.

5.4.3 Updating Ports and adding additional ports
You can add ports to block. By default, every input port is located on the left hand side of theblock and the output port is on the right hand side of the block. To add a port, right click theblock and select Customize > Ports. Click Add and a new entry is created. Enter the name ofthe port and select the type of the port. The type of the port is described in detail as follows:
If input is selected, the new port is created on the left side (default-West) of block.
If output is selected, the new port is created on the right side (default-East) of the block.
If multiport is selected, the new port is created on the left side (default-West) of the block.
If both input and output are selected, the new port is created at the bottom (default-South) of
the block.

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Figure 25.

Set Ports to Block

User can also change the direction of the port to North, East, South or West. There are options
to display the port name or hide it. Units or the Remote type can also be set.
Port data type- general (Default). In most cases, the port type does not have to be changed.
It can be maintained in the default state. There are certain instances when the connected input
port has a fixed data type. In that case, the output port connected to it must be modified.
Show Name – To display the port name
Hide - To hide the port name.
Remote Types- This column is used to define the data types on the remote system orapplication. This is used to define the data types for Verilog, Application Interface, and SystemC
blocks only. This is a string field and must be fully contained within “”. The content in this column
text depends on the type of block and the interface.

5.4.4 Setting Port Types
Some block ports may have pre-defined data types. For example, the plotter input and the pop
input of the Queues. In these cases, the ports connected to these fixed data types must be
modified. If the ports are not correctly specified, an exception is reported. To modify the port
type, right-click on the block to "Customize > Ports". To see the current type prior to modifying,
context display by passing the mouse pointer over the specific ports. If the connected ports
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have type General, then no change is required. If either the input or output type has a specific
type set, then the other one must also match this value. If a port has type Unknown, and isconnected to a type of General, then set the Unknown to General.

5.4.5 Linking Parameters
Block Parameter is the default parameter available in a block. User can also add or
remove(added parameter) block parameter. Model Parameter is available in the VisualSim
library: Model Setup > Parameter=. How to set a model parameter to the model is explained
below.
To set a new parameter to model, drag and drop the model parameter from Model Setup >Parameter=. Right click the model parameter and select Customize Name. Enter the name ofthe parameter and click Commit to display the name in BDE. Now, double click the Parameter:
to set the value for the parameter. Copy the model parameter name and paste it in the blockparameter. Now you have successfully linked a model parameter with a block parameter.

Figure 26.

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5.4.6 Block Documentation
Every block in VisualSim contains block documentation. To view the block documentation rightclick the block and select Documentation > Get Documentation.
User can create documentation for a custom block or hierarchy based block. To create a new
document, right click the block and select Open Block. A new BDE is opened. Right click in thewhite space and select Documentation > Customize Documentation. Enter the new
documentation details and click Commit. Save the model.

5.4.7 Icon Display value
By default, the block icon has the name of the block instance. This is unique in the model
window. It is possible to display something different by adding a line to the XML as follows:<display name="This is a test of the display system."/>Where the item in “” is the value to be displayed on top of the icon. In this case, the Block
Instance name is replaced with this value.

5.4.8 Tooltip value
It is possible to customize the tooltip, which is the string that appears when you move the mouseover a block. To do this, add a parameter called _explanation, with a default value without any “”and class as VisualSim.kernel.util.StringAttribute. The default value is displayed as the tooltip.

5.4.9 Creating Generic Port Icon
Port icons are dynamically created in VisualSim during the block instantiation on the Block
Diagram Editor. The icon and color for Input, Output, Input/Output, and none port types are fixedand cannot be modified by the user. For a number of reasons, the user might want to keep thelook of the port different from the standard view. A generic icon of rectangular shape and green fillis provided. The port icon looks the same for input, output, and input/output. The users can modify
their port icon to this generic type by doing the following:

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1. Drag a block into the BDE.
2. Right-click on the port and select “Configure”.
3. Now click Add.
4. Enter the following information.
1. Name: _icon ; Value: true; Class: VisualSim.kernel.util.StringAttribute
5. Click OK.
6. Click OK.
7. Now, you see that the port icon has changed to a green rectangle.
You can do the same thing by updating the xml file:<port name="input" class="VisualSim.actor.TypedIOPort"><property name="input"/><property name="_icon" class="VisualSim.kernel.util.StringAttribute" value="true"></property></port>You need to add the property name _icon with the associated class and value to each port thatneeds to be converted to this generic icon.

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6 Hierarchical Block Semantics
6.1 Using Hierarchical blocks
A Hierarchical block is a container of a number of basic and other Hierarchical blocks. A
hierarchical block is used when the Editor Window runs out of space, or combines blocks that
perform a specific function. Each level of a Hierarchy must have the same simulator. Levels
below and above this Hierarchy can have a different simulator, as far as they conform to thesimulator rules.

Figure 27.
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To create a hierarchical block, drag "Hierarchical Block" from the Library Full Library > Model>
Hierarchical Blocks into an existing BDE window. To view the inside of the Hierarchical block,right-click the icon and select “Open Block”. Select the input and output Toolbar Icons to add
input and output ports. These are displayed as input/output ports at the parent level model.
Example of a simple Hierarchical Block is shown in Figure 13.

Figure 28.

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Port Type (input (input), output (output)) are set by right-click in white space or by selecting
the icons from Menu/Toolbar. See notes on "Configure Ports" for more details.
Simulator Type None is required if the Hierarchical Block is using the same time semantics as
the parent window. For example, this block is a Digital and parent is Digital. Mixed domain
modeling requires a simulator to be defined with the hierarchical block and is discussed as
separate topics. For example, a DSP Algorithm (Untimed Digital Simulator) can exist within a
Digital.
In terms of model execution, Hierarchical blocks initialize, the first time they receive an input
Token. In terms of animation, one can animate a single hierarchical block, using the sameprocedure as a flat model topology.

6.2 Model Execution Semantics
The Digital domain execution is a sequence of synchronous block execution between
asynchronous time. This means that blocks with no delay are all executed at the same time(synchronous time) in the flow order. When a flow encounters a relation or a branch, it returns
to the last branch and picks another flow to execute. It continues to do this until no more blocks
can be executed at that time. At that point, it looks at the Master calendar and determines thenext time point where there are asynchronous events. VisualSim schedules all delays andevents on a master calendar queue in the Digital domain. All events executed on the master
calendar queue are deterministic, meaning that the simulation executes the events, whether
synchronous or asynchronous, in the same order each time the simulation is run. This isimportant for model development, repeatability during model validation, and obtain the sametiming results for every run.
Synchronous Events: Synchronous events occur at the same simulation time, meaning morethan one event is scheduled on the calendar queue for the same simulation time.
Asynchronous Events: Asynchronous events occur at a future simulation time, relative to thecurrent simulation time and by implication there are no outstanding synchronous events.

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Discrete Events
3
2
1
0

1.0

2.0

3.0

4.0

Sim Time (Sec)Asynchronous

Synchronous

Figure 29.

Model Execution Semantics

6.3 Model Execution Flowchart
This figure depicts the overall model execution flowchart which combines the Model Execution
semantics and Block Execution semantics, shown in the previous two pages.

Figure 30.

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6.4 Create Sub-Model
This feature converts this block into a Sub-model or class. A class is a master version of theblock. This class can be instantiated multiple times in the model. Changes made to this classblock (identified by a blue halo), are replicated to all linked instances. The information in the XML
for the instances are all linked to this class block. More information on this is provided by the SubModel documentation page.

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7 Dynamic Instantiation
7.1 Introduction
VisualSim includes a number of Advanced Function Blocks, that operate on the structure of themodel rather than on data. These higher-order components help significantly in building large
designs where the model structure scales. The most important of them is the Dynamic
Instantiation. All other higher-order or Hierarchical blocks are considered experimental and are
not guaranteed to work all the time. Using this block, the model can scale to any number of
instances of an identical component by varying a parameter value. Each instance can haveparameter values that are unique and can be accessed uniquely by an instance parameter.

Figure 31.

A model using the Dynamic Instantiation block

7.2 Example
Consider a model which has the five instances of the Channel class wired in parallel. Thismodel has the feature that the number of instances is hardwired into the diagram. It is awkward,
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therefore, to change this number, and particularly awkward to create a larger number of
instances. This problem is solved by the Dynamic Instantiation block. A model equivalent tothat is created using the Dynamic Instantiation block as shown in Figure 16.
The above figure shows a model using the Dynamic Instantiation block which permits thenumber of instances of the channel to change by simply changing one parameter.
The Dynamic Instantiation is a hierarchical block into which we have inserted a single instanceof the Channel.
The Dynamic Instantiation block has two parameters, nInstances and instance, as shown inthe below figure.

Figure 32.

Configure Parameters for Dynamic Instantiation

The first parameter of the Dynamic Instantiation block specifies the number of instances while
the second parameter is available to the model builder to identify the individual instance.

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The first of these specifies the number of instances to create. At run time, this block replicatesitself nInstances parameter value, connecting the inputs and outputs to the same sources anddestinations as the first (prototype) instance. In Figure 16, notice that the input of the Dynamic
Instantiation is connected to a relation (the black diamond), and the output is connected directly
to a multiport input of the AddSubtract block. As a consequence, the multiple instances are
wired in a manner similar to the above figure, where the same input value is broadcast to all
instances, but distinct output values are supplied to the AddSubtract block.
The model is better in Figure 16 because now we can change the number of instances bychanging one parameter value. The instances can also be customized on a per-instance basisby expressing their parameter values in terms of the instance parameter of the Dynamic
Instantiation block. Try, for example, making the noisePower parameter of the InstanceOf
Channel actor depend on instance. For example, set it to "instance * 0.1" and then set
nInstances to 1. You see a clean sine wave when you run the model.

7.2.1 How To
Dynamic Instance (DI) block is located in the Full Library > Model Setup. Use this block in thesame way that a Hierarchical Block is used. The SelectInstance is located in the Full Library> Model Setup library. The SelectInstance is required on the input side and the output side of
the DI block to indicate the specific instance to be accessed.

7.2.2 Requirements
To access each instance of the Dynamic Instantiation (DI) block, a SelectInstance block must
be placed on the input and output of the DI block. On the input, this block picks the instancefrom a value in the incoming Field or Variable, please select Conversion Type as
DS(0)_to_DS(n). On the output, the block combines multiple instances to an output, please
select Conversion Type as DS(n)_to_DS(0).

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7.2.3 Example of the Dynamic Instantiation
To view an example of a Dynamic Instantiation model in VisualSim, view the Dynamic
Instantiation Usage Page, locate the following file in VisualSim directory VS_AR\doc\Training_Material\How_to_tasks\DI\DI.htm. Examples models are available in the same directory.
One of these examples is described here.

Figure 33.

Dynamic Instantiation Example in VisualSim

In this simple model, there are 4 instances of the DI block. A traffic generator creates DS. The
field "Channel" of the Stop_n_Wait DS provides a random number between 0 to 3. In the
SelectInstance block, the value of the Channel field specifies the instance that this DS is sent to.
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instances and sends them out on a single instance link, as is visible from the Display output. Also
notice that any parameters can be added just as in the Hierarchical Block.

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8 Block, Sub-Models (Classes) and Inheritance
8.1 Introduction
Blocks are the basic elements in VisualSim, used to construct a model. Blocks can be definedusing Java, C/C++ enclosed in a Java Wrapper, Hierarchical block within a model, and ahierarchical block saved as a separate file called sub-model or class. Class and Sub-Model are
the same and are used interchangeably.
One of the major capabilities in VisualSim is the ability to define block-oriented classes withinstances and subclasses along with inheritance. The key idea is that you can specify that acomponent definition is a class, in which case all instances and subclasses inherit its structure.
This improves modularity in designs. We illustrate this capability with an example.
Classes are especially useful when you need to instantiate a block multiples times in a modelor used repeatedly in many models. This can be a component in your designs or a reporting
utility.
Classes are the base entities. When the class is instantiated, the user can only modify thevalues of the parameters and not the topology or the existing list of parameters. The user can
add additional details within the Instance. These details are maintained only for that particularmodel and does not affect the base Class.
If these new changes become the basis for another reusable block, then you can define thisnew block as a sub-class. The sub-class refers to the class for the basic details. Only theincremental details are stored in the sub-class.
A class or sub-class can be easily converted into a instance for use in a particular model. Thisis useful when a model needs to be shipped to another person that does not have access to
the libraries.
The class also plays a significant role in the development of a user library. The following section
discusses the construction of classes, use of the class in models, creation of libraries, andmaking the library in the Library Folder.
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Before we get into the details, here is an example of the classes and the role they play in
VisualSim modeling.

8.2 Example of Classes
Follow the steps to create the model:
1. Drag the Digital Simulator block from Model Setup > Digital Simulator.
2. Drag the Sinewave block from Full Library > Source > Clock.
3. Drag the SequencePlotter block from Full Library > Result > Plotter.
4. Create a Hierarchical block.
a) Drag the AddSubtract block from Math_Operations > Math and Trig.
b) Drag the Gaussian block from Math_Operations > Distributions.
c) Drag a parameter from Model Setup > Parameter=. Right click the parameterand select Customize Name. The Rename Parameter window is displayed. Now
enter the name of the parameter as noisePower and enable Show Name.
d) Double click the parameter named noisePower and enter the value 0.01.
e) Now select all the blocks (Mentioned in points a to d). The selected blocks arehighlighted in yellow color. Now click Graph > Create Hierarchy. The Hierarchicalblock is displayed. (To view the blocks, right click the Hierarchical block andselect Open Block.)
5. Right click the Hierarchical block and select Customize Name. Rename the Hierarchicalblock as Channel.



Hierarchical block is referred as Channel block in following sections.

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6. Configure the Ports for the Hierarchical as described below:a) Right click the Channel block and select Customize > Ports. The Configure Ports
window is displayed as shown below:

Figure 34.

Configure Portsb) Click Add to add a new port.
c) Enter the name of the port in Name. For example, IN, OUT.
d) Enable the Input option in case of input port and Output option in case of Output
port. Select the type if necessary.
e) Click Commit to submit.
7. Now connect the output of the Sinewave block to the input of Channel block.
8. Connect output of the Channel block to the input of the SequencePlotter.
9. The Channel Hierarchical block icon can be changed by doing a right click on channel>Appearance->Edit Cuostom Icon
Refer the following image for more details:

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Figure 35.

Hierarchical Model to create a Class

Consider the model in Figure 35. Suppose that we wish to create multiple instances of thechannel, as shown in figure 36.

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Figure 36.

A poor design of a diversity communication system

The above is a poor design of a diversity communication system that has multiple copies of thechannel that are defined.
In the above figure, the Sinewave signal passes through five distinct channels (note the use ofa relation to broadcast the same signal to each of the five channels). The outputs of thechannels are added together and plotted. The result is a significantly cleaner sinewave thanthe one that results from one channel alone. However, this is a poor design, for two reasons.
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First, the number of channels is hardwired into the diagram. We deal with that problem in thenext section. Second, each of the channels is a copy of the hierarchical block in figure 36. This
results in a far less maintainable or scalable model than we would like. Consider, for example,
what it would take to change the design of the channel. Each of the five copies would have to
be changed individually.
A better solution is to define a channel class or Sub Model. To do this, begin with the design infigure 35 and remove the connections to the channel, as shown in figure.

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Figure 37.

Creating and using a Channel Class

Then right click and select "Convert to Class". (Note that if you fail to first remove theconnections, you get an error message when you try to convert to class. A class is not permitted
to have connections.) The block icon acquires a blue halo, which serves as a visual indicationthat it is a class, rather than an ordinary block (which is an instance). Classes play no role in
the execution of the model, and merely serve as definitions of components that must then be
instantiated. By convention, we put classes at the top of the model, near the simulator, as theyfunction as declarations.
After you have a class, you can create an instance by right clicking and selecting "Class Actions> Create Instance" or press Control-N. Do these five times to create five instances of the class,as shown in figure 37. It is in fact, a much better design and to verify this, try making a change
to the class. For example, by creating a custom icon for it, as shown in figure:

Figure 38.

The icon changed for the class

Note that changes to the base class propagate to the instances of the class. A more subtle
advantage is that the XML file representation of the model is much smaller, since the design ofthe class is given only once rather than five times.
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If you look inside any of the instances (or the class), you find the same channel model. In fact,
you see the class definition. Any change you make inside this hierarchical model will be
automatically propagated to all the instances. Try changing the value of the noisePowerparameter, for example.

8.2.1 Overriding Parameter Values in Instances
By default, all instances of a Channel have the same icon and the same parameter values.
However, each instance can be customized by overriding these values. In the below figure:

Figure 39.

Model with the icons of the instance

The above figure shows a Model with the icons of the instance changed to override parametervalues in the class.
For example, we have modified the custom icons so that each has a different color, and thefifth one has an extra graphical element. To do this, just right click the icon of the instance andselect "Appearance > Edit Custom Icon."

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8.2.2 Subclass and Inheritance
Suppose now that we wish to modify some of the channels to add interference in the form of
another sinewave. A good way to do this is to create a subclass of the Channel class, as shownin figure.

Figure 40.

The model with a subclass of the channel with nooverrides

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A subclass is created by right clicking the class icon and selecting "Class Actions > Create
Subclass." The resulting icon for the subclass appears right on top of the icon for the class, so
it needs to be moved over, as shown in the figure.
Looking inside the subclass reveals that it contains all the elements of the class, but with theiricons now surrounded by a dashed pink outline. These elements are inherited. They cannot be
removed from the subclass (try to do so, and you get an error message). You can, however,change their parameter values and add additional elements. Consider the design shown inbelow figure.

Figure 41.

The subclass with overrides that add sinusoidal
interferences

The above figure adds an additional pair of parameters named "interferenceAmplitude" and"interferenceFrequency" and an additional pair of actors implementing the interference. A
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model that replaces the last channel with an instance of the subclass is shown in the below
figure.

Figure 42.

A model using the subclass form and a plot of theexecution

The above model is along with a plot where you can see the sinusoidal interference.
An instance of a class may be created anywhere in a hierarchical model that is either in thesame composite as the class or in a composite contained by that composite. To put an instanceinto a submodel, simply copy (or cut) an instance from the composite where the class is, andthen paste that instance into the composite.

8.2.3 Sub-Models
Sub-models are an extension to the above class concept. This is a mechanism to provide areuse and sharing of modeling components developed by team members. These are classes
that are usually well understood and standard elements that require changes to parametervalues only.
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Classes are maintained within the model where they are used. Sub-models are stand-alone
XML files that contain the model definition and a list of parameters. The procedure is still thesame. The list of these sub-models can be maintained on an html page with links that can be
opened from within VisualSim. Similar to Classes, multiple instances of the same class can
exist in a model and each of these instances can have different values for the parameters andicons.

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9 Classes and Libraries
Before constructing classes, there are certain procedures to follow. If constructing a class using
Java or C++, visit the respective documentation for details. For all blocks, there are some basic
rules:-

Edit the VS_Model_Library variable in the VisualSim.bat (.sh) file. This is located in the
VS_AR directory. The location of this directory becomes the baseline for all your libraries
and custom blocks. The blocks are referenced relative to this base directory.

-

If you have C/C+/SystemC blocks, you should also configure the VS_C_Library variable.
This is the baseline for all the C++ files and the associated compiled code.

-

If you have Java or custom XML class blocks, make sure the base path is included in
the CLASSPATH of VisualSIm.bat (.sh). All Java and XML classes are accessed relative
to this CLASSPATH directory.

9.1 Create Class- Sequence of operations
1. Assemble the initial block diagram
Use the library blocks to assemble the model.
Create a Hierarchical block of this block diagram.
2. Create a class
Convert the Hierarchical block into a Class.
Save as a sub-model.
3. Instantiate a new class for use in a model
To use the Class, you need to instantiate the block in the model using Graph> Instantiate.
Entity. Make sure the Class is located within the VS_Model_Library directory.
4. To test the class
Test the class by constructing a simple model around it.
5. Save in Library. Right-click the block and select Save Block in Library.

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9.2 Create Library and Instantiate in User_Library
Create a Library

1.

Right-click the User_Library in the Folder and select ‘Open for Editing’.
Using Graph > Instantiate Class and entering VisualSim.moml.EntityLibrary, create a new
folder.
Note: Make sure the Library name does not end in a numeral.
Convert to Class
Save as sub-modelDo a File > Open and select this file for editing.
Add the blocks that are part of this library.
Note: Make sure there is a Digital Simulator in this library folder. This is needed or you
receive an error each time you open VisualSim.
Import Library into the User_library

2.

Right-click the User_Library and select ‘Open for Editing’.
Using Graph > Instantiate Class, select the library created above.
Select Save.
View the Library3.

Restart VisualSim
The new library is visible in the User_Library.
Rules:
1. Make sure that the library blocks and the library file are located in the same directory. This
becomes easy to ship to others.
2. When shipping the library, make sure to zip the file relative to the VS_Model_Library
directory. Similarly, when the file is extracted, make sure to extract at the
VS_Model_Library level.
A tutorial on creating the Class is provided.

9.3 Example of Creating a New Class BlockOpen the above saved Class and assemble the following sequence.
•

Open a New Block Diagram Editor
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•

Instantiate a Digital Simulation and a new Parameter (SimTime).

•

Add blocks – Source >Traffic > Traffic, Defining_Flow > Processing and an output port into themodel.

•

Edit the Parameters of the Processing block as shown in figure 44.

•

Select all the items in the block diagram and select Graph->Create Hierarchy.

•

A new Hierarchical block appears with a port.

•

Remove the wire between the block and the port.

•

Select the Hierarchical and Right-click to ‘Convert to Class’.

•Open the Hierarchical ‘class’ and do a File->Save As.

•

Select the directory under VS_Model_Library folder to save the file. Make sure to click “Saveas sub-model” option. Name the file Traffic_Gen.xml.

Notes:The “Open Block” shows the original version; whose content should not be modified by the user
after it has been qualified. When you do an “Open Instance” for a Hierarchical block in a model,
you are opening an instance of the block in the model. You have a local instance where you
can add additional parameter or blocks to the model. You cannot modify the original block
content. Any changes to the original Class is propagated to all models that use the block.
Notes:o When you have global variables, Smart_Controllers and Schedulers, it is essential tohave their names tied to the Block_Name such that they stay unique in the model.
Otherwise the user gets an error when multiple instances are assembled.
o When you have a Script block such as a Script or Smart Controller, do not modify the
Expression Script inside the Instance. This detaches the code from the original. Thus,
any changes to the original are not reflected here.
o When creating a new variation of a class; do not open a model containing this block andtry to save it as a new class + sub-model. This creates a class of an instance of a classand makes the solution very messy. Use the sub-class approach for doing this.

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Figure 43.

Create a Block Diagram

Figure 44.

Figure 45.

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Block Attributes

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Figure 46.

Create a Class

9.4 Annotating the Class
There are two things to make the Class block interesting. The first is the tooltip and the second is
the block icon. The tooltip is done by adding a parameter with name _explanation, value in string
without “” and class as VisualSim.kernel.util.StringAttribute. The icon can be updated by a rightclick on the white space and selecting Edit Custom Icon. Make sure to Save the model after this.

9.5 Instantiating the Class in Model
A block that has been compiled to a .class (Java code version) file or a hierarchical block thatis contained in a .xml file may be instantiated from ModelBuilder via Graph > Instantiate Entity
and used in the model.
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To instantiate an entity, follow these steps

1. Start up VisualSim and do File > New > Block Diagram Editor.
2. In the Block Diagram Editor, select Graph > Instantiate Class. Select the class file bytraversing through the directory folders. The class must be in a Hierarchy within aClasspath location. It is best to place it within the VS_Model_Lib variable.

3. Click OK.
4. The new block is displayed in the BDE.

Figure 47.

Instantiate Class to import a Class

9.6 Test the New Class Block:
1. After instantiating the Traffic block, drag the Digital Simulator, parameter, Server,
and a TextDisplay to the BDE.
2. Set the parameter to SimTime and assign a value of 10.0.
3. Link the SimTime parameter to the stopTime of the Digital Simulator.
4. Set the parameters of the Server.
5. Connect all the blocks as shown in the figure.
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6. Select GO toolbar button to start the simulation.
7. You should see the Header Data Structure in the display.

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10 Library Management
10.1

Introduction

Library management is an important enabler of IP reuse and sharing across the corporation.
Library management is the organization of the key modeling components and system that areassembled with these systems. The library management system contains the following parts:•

Version control•

Library storage and Directory structure•

Accessing from the Graphical Editor

10.2

Version Control

The version control typically is the corporate storage environment. The solution utilizes a serverand client solution. Typical VisualSim components and models are worked on by a single user.
So, the version control, as in maintaining revisions, is not very critical. Users can manually
maintain various versions in the environment.

10.3

Library Storage

The establishment of a centralized library management structure for a company is important andessential. Mirabilis Design prescribes a standard approach. The central library is accessible by all
and can be stored in a version control system. There is a base directory which is<VisualSim_Top>. Within this top directory, there are two sub-structures - components andmodels.

•Components contain the basic components such as network node, traffic, processor, bus,
and statistics creator. The Components can have sub-directories within them for different
types of devices.

•

Model contains platforms, boards, sub-systems, systems and networked systems. Thesecan be organized within the model folder based on projects.

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VisualSim
Top
Components

Bus

ModelsTraffic

Figure 48.

Project 1

Project 2

VisualSim Recommended Directory Structure

It is best to create a local copy of this directory for use within VisualSim. This ensures thatconnectivity losses do not stall creation. The top directory and the names of the directoryorganization with this top is identical between the central and local structure. Users can depend
on version control tools to check in and check out the latest revisions of the files.

Local System
Windows
C:\library\VisualSim_To

Central Systemp

Version Control Server

Synchronize using/library/VisualSim_Top

Version Control
SolutionUNIX/user/home/VisualSim_Top

Figure 49.
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10.4

User Library

Each user has a User Library, stored in $HOME/.VisualSim/UserLibrary.xml.
In the Block Diagram Editor, the User_Library is visible at the bottom of the library palette on the left. After aclass has been instantiated, to add it to the User Library, right click the block, and select "Save block in
Library".

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11 Library Folder Organization
In VisualSim, blocks are grouped together based on functionality and arranged in the Library.
VisualSim contains the following libraries:

Figure 50.

11.1

Library Folder Organization

Model / Document / ModelSetup

Model / Document / ModelSetup are overhead components used to setup the model. These
include drawing tools, simulators, Variable, parameters, hierarchical, and FSM blocks.
Draw Tools – Contains Annotation, Arc, Arrow, Image, Line, Polygon, Rectangle, Eclipse,
ModelID.
Parameter – Used for analyzing the performance of the system by fixing their value for asimulation run.
Simulator – Translates the graphical depiction of the system into a form suitable for simulation
execution, and executes simulation of the system model.
Variable – Variable that is initialized and updated during the simulation.
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Hierarchical – Grouping a set of functional blocks that combine to define a function or device.
FSM – Basic block for Finite State Machine operation.
Utility – Allows the user to determine the current values of Variable and the list of virtualconnections. It also has content for checking the type and the units.

Figure 51.

11.2

Blocks in Document/ Model / ModelSetup Library Folders

Traffic / Source

User can generate traffic using a standard distribution, sequences, trace files, clocks, andcustom distributions.
Clock – Generate all possible clock inputs.
Event – Generate the input according to the Event set.
File Import – Input can be generated according to the file input,
Traffic – Generate input as per the specified DS and time distribution.

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Figure 52.

11.3

Blocks in Source Library

Failure Analyser

The Network Failure block allows user to inject different type of failure in the network to observe
the stability of the design.

11.4

Results

The Results Library is used to evaluate the effectiveness of the system model and to estimate
the performance.
Plot Manager- Link to the Post Processor.
3D Interactive Creator- Create visual and animated displays.
Statistics Generator - Generate statistics on all resources and hardware blocks.

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Plotter - A complete collection of Array plotter, Bar Graph, Histogram plotter, matrix Viewer, Realtime plotters, and so on.
Text – A complete collection of text displays, monitor value, file writers, and so on.

Figure 53.

11.5

Blocks in Result Library

Behavior

Behavior is used in,•

defining expressions,•evaluating assignments,•

making control decisions and assigning values to a Field or Variable,•

randomizing Field values,•

calculating processing cycles on a scheduler or Queue blocks,

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computing statistics such as latency (TNow - TIME), utilization and throughput and•creating assumption values.

Control Flow blocks are used to makes decisions, create loops and take branches.

Figure 54.

Control Flow blocks

Access the ExpressionEvaluator from the File->New->ExpressionEvaluator. This window allows the user toexperiment with a sequence of math and logic expression.

ExpressionEvaluator- Enter a sequence of assignment statements that are executed in orderand the output is controlled by an evaluating an expression.
Script- Programming block to describe behavior using the VisualSim script format and RegEx
functions.
Database block - A high-performance lookup table with search, read/write/erase functionality.
Processing- Enter a sequence of assignment statements to be executed in order.
Basic Processing – Contains all decision making and control flow blocks such ExpresionList,
Case_Switch, and while.
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Virtual Connection – Connections between different parts of the model using names. Two ofthese Virtual Connection blocks- IN and OUT are in Behavior. The other two blocks are located inthe Virtual Connection Folder in Defining Flow Folder.
FSM – Basic block for Finite State Machine operation.

11.6

Mappers

Mapper blocks define the connectivity between the behavior flow and the architecture flow, andwithin the architecture flow using a named connection. The connection can be static, that is to asingle scheduler, or dynamic is based on the value of the input field content.

Figure 55.

11.7•

Mappers

Resources

Resources model the physical aspects of the system. In the performance of a systemdesign, a model platform is described using the physical components such as Queue,
Schedulers, Flow Control, and Associated Arbitration Policies. There are two ways todefine resources - Active and Passive. Active resources consume time while passive
resources consume quantity. Passive resources can be created using Arrays, Databaseblock, or Quantity-shared Resources. All other blocks under resources are categorized
as Active.

•

Queues and Servers – Queues with advanced content handling for both time-based andevent-based. Define complex arbitration schemes that are dependent on external activity
for timing and pop.

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•

Channel - The Channel block can be used to model a DMA channel, wireless channel or abus. The channel block contains a queue and multiple channels.

•

Event Queue - Queue stores the incoming data structure and pop it out on the arrival of a
trigger. The blocks in this folder have single and multiple concurrent queues with priority.

•

Timed Queue - Queue stores the incoming data structure and pop it out after a predetermined delay. The blocks in this folder have single and multiple concurrent queues
with priority enabled. Two variations of these blocks are also available- one with a single
queue and multiple parallel time resources; and another scheduler that supports slotbased time allocation.

•

Quantity Based - A polymorphic quantity-shared resource for N-identical resources,
which enqueues input tokens in either a FIFO, or LIFO, order depending on the"Queuing_Discipline" parameter attribute.

•

SystemResource – Defines the execution of a process in a data structure in a variety ofpre-defined scheduling schemes. This block separates the behavior flow or data flow fromthe architecture definition. SystemResource block can be used to link multiple concurrent
behavior flows into a single block.

Figure 56.

11.8

Blocks in Resource library

PowerPower Modeling Library blocks are available in this library folder.
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PowerTable – Blocks are used to evaluate the following for individual devices - battery discharge,
instantaneous power, average power, and so on.

Figure 57.

11.9

Power

Hardware Setup

The Hardware setup provides the list of library blocks that must be or may be included as part of acycle accurate system model. ArchitectureSetup block handles all the address mapping, routing,plotting, statistics and debugging for the Hardware Modeling components. There can be multiple
ArchitectureSetup blocks in a model. Each block instance must have an unique name. All Bus andHardware blocks must be associated with one of the ArchitectureSetup.
Device Interface block helps the designer to model custom device interfaces and custom
hardware components. Hardware setup block set also includes few utility library blocks such as
VCD writer, Timing Diagram generator, and clock align.

Figure 58.
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11.10

Processor Generator

The Processor block set is used to model variations of commercial and proprietary processors.
The Processor generator block set also includes an Instruction set block. The Instruction_Set
block can be used to define a set of instructions for each execution unit of the processor. It canalso bunch together execution units with a common reference name. This reference name can beused in the Processor pipeline definition. The Processor block can have cache definitions within
and also refer to an external cache or memory blocks. The last block is the Task_Generator blockthat generates an array of instructions based on the profile provided in the Instruction_Mix_Table.

Figure 59.

11.11

Processor Generator

MicroArchitecture Components

Micorarchitecture library allows user to create an existing architecture or a custom architecture ina low level design. The blocks performs behavioral computation, maintain processor states, andperform branch mispredictions and flushes based on the computed values.

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Figure 60. Microarchitecture Components

11.12

MemoryThis library folder has the configurable libraries of cache, Memory and Memory controllers. Typesof Memory technologies supported are SRAM, SDRAM, DDR, DDR2, DDR3, DDR4, DDR5,LPDDR, LPDDR2, LPDDR3, LPDDR4 and LPDDR5.

Figure 61.

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11.13

Hardware Devices

Hardware Device blockset includes library blocks of Custom Bus arbiter, Custom Bus Interface,
DMA Controller, Blocking Switch, Bridge, Crossbar, and Switch.

Figure 62.

11.14

Blocks in Hardware Devices

Interfaces and Buses

Interfaces and Buses blockset includes list of advanced bus and interface technologies. This
includes library blocks of AFDX, AMBA, AVB, Autosar, CAN, Switched Ethernet, Fibre Channel,
FireWire, FlexRay, PCI, PCIe, RapidIO, Spacewire, TTEthernet, Wireless, and networking library
blocks.

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Figure 63.

Interfaces and BusesThe Wireless Sensor networks library contains a separate simulator that allows communication
wirelessly between the channel and the operating blocks. This library contains different
antennas and channels.

11.15

System_Language

The System_Language blocks are available under Full Library > System_Language folder. These
blocks provide an interface to easily import C code, applications written in C or C++, Python,
MatLab, and Satellite Toolkit. The Interfaces require the licenses for MatLab and Satellite Toolkit.

11.16

Hardware Language

The Hardware Language blocks are available under Full Library > Hardware Language libraryfolder. Interfaces are provided to run VisualSim in co-simulation with Verilog and SystemC. The
Interfaces require the licenses for Verilog.

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Figure 64.

11.17

Interface Blocks

Math_Operations

The Math_Operations blocks are available in Full Library > Math Operations. This library
contains Array, Boolean and Logic blocks that are required for the operation of system model.

Figure 65.
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11.18

Algorithmic

The Algorithmic blocks are available under Full Library > Algorithmic. This library contains
blocks to generate events and wave-forms. It also contains image processing, Petri net, andsignal processing blocks.

11.19

UserLibrary

The User Library is maintained in the $User Home/.VisualSim/User_Library.xml file. Users
can add Hierarchical folders with this Library. In addition, the user can add libraries using theBlock Diaagram Editor.

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12 Auto-Save
VisualSim provides the ability for the user to continuously save the currently open model, if they
are modified. The interval between the saves is set in the VSconfig.properties. The format is:
Auto_Save_Time=2
Where the number on the RHS is the time interval between saves.
The intermediate xml files are saved in the <User Home>/.VisualSim directory. The format is asfollows:
Scheduler_SW_FCFS_Preempt_20151127_143903.xml
WhereFile Name: Scheduler_SW_FCFS_Preempt
Date: 20151127- Here is it 2015 November 27
Time: 143903 is 2:39:03 PM
Note: The intermediate files are not deleted when the model is saved or VisualSim is closed.

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13 Simulation Technology
13.1

Introduction

The simulators implement various models of computation. Most of these models of computation
can be viewed as a framework for component-based design, where the framework defines theinteraction mechanism between the components. VisualSim consists of four major simulators

Digital

Digital Untimed

Continuous Time

Finite State Machine

SystemC

Except for the Finite State Machine, all the simulators implement their own scheduling between
blocks and do not rely on threads. These usually results in a highly efficient execution. The FSM
simulator is in a category by itself, as the components are not producers and consumers of data,but rather are states.

13.2

Models of Computation

A Model of Computation gives an interaction mechanism for components to deal with concurrency
and time. The utility of a model of computation stems from the modeling properties that apply toall similar models. For many models of computation these properties are derived through formal
mathematics. Depending on the model of computation, the model may be deterministic, staticallyschedulable, or time safe. Because of its modeling properties, a model of computation represents
a style of modeling that is useful in any circumstance where those properties are desirable. In
other words, models of computation form design patterns of component interaction, in the same
sense that Gamma and others. describe design patterns in object oriented languages.
For a particular application, an appropriate model of computation does not impose unnecessary
constraints, and at the same time constrained enough to result in useful derived properties.

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13.3

Simulators- How to select the right one?

1. What are Models of Computation: Govern interaction of components in a model. The
simulators share kernel, event queue, and some libraries. The transfer of data and theexchange of timing events between simulators are transparent to the user.
2. Single Kernel vs. Co-Simulation: Synchronization has to be done externally and by eachindependent kernel. Having independent threads running. SDF + DE in VisualSim vs.
VisualSim + VHDL are the difference.
3. Discrete-Event: Execution of synchronous events between asynchronous times. The Calendar
Queue maintains sequences of events on a time line. This is similar to Hyperformix
Workbench, OPNeT, BONeS, Verilog, and VHDL.
4. Finite State Machine: Case statement in a graphical form defining sequential control logic.
The entities represent states and connections represent transitions between states. The
execution is a strictly ordered sequence of state transitions. This is similar to Statemate,
OPNeT, and Summit Visual FSM.
5. Synchronous Data Flow: Can specify a priori the number of input samples consumed on each
input and the number of output samples produced on each output each time the block is
invoked. The execution is statistical and determined prior to execution. This similar to SPW.
Cossap or Synopsys System Studio is a small variation to this in the sense that Cossap
evaluates a large number of inputs at every port before moving to the next port/block. This isextremely fast if the model is flow-through. This slows down if there are control elements suchas loop-back.
6. Continuous Time: Simulator finds a fixed-point, i.e., a set of continuous-time functions thatsatisfy all the relations. This solves algebraic or differential relations between inputs andoutputs. This is similar to Spice, Simulink and AMS. To determine the best variation of theContinuous Time simulator for your application, refer to Chapter 1, Section 2.4.
7. FSM Hierarchical: A FSM Hierarchical is one that switches between these simple models
when the system transitions between regimes or states. A CT + FSM creates a modal model.
8. Mixed-Signal: Embedded systems frequently contain components that are best modeled using
differential equations, such as MEMS and other mechanical components, analog circuits, andReference Guide- 132 Mirabilis Design Inc

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microwave circuits. These components, however, interact with an electronic system that may
serve as a controller or a recipient of sensor data. This electronic system may be digital. Joint
modeling of a continuous subsystem with digital electronics is known as mixed signal
modeling.

13.4

Simulators

In this section, we describe models of computation that are implemented in VisualSim simulators.
13.4.1.1 Continuous Time (CT)In the CT simulator (continuous time), actors represent components that interact via continuoustime signals. Actors typically specify algebraic or differential relations between inputs and outputs.
The job of the director in the simulator is to find a fixed-point, that is, a set of continuous-timefunctions that satisfy all the relations.
The CT simulator includes an extensible set of differential equation solvers. The simulator,
therefore, is useful for modeling physical systems with linear or nonlinear algebraic/differential
equation descriptions, such as analog circuits and many mechanical systems. Its model ofcomputation is similar to that used in Simulink, Saber, and VHDL-AMS, and is closely related tothat in Spice circuit simulators.
Embedded systems frequently contain components that are best modeled using differential
equations, such as MEMS and other mechanical components, analog circuits, and microwave
circuits. These components, however, interact with an electronic system that may serve as acontroller or a recipient of sensor data. This electronic system may be digital. Joint modeling of acontinuous subsystem with digital electronics is known as mixed signal modeling. The CT
simulator is designed to interoperate with other VisualSim simulators, such as Digital, to achieve
mixed signal modeling. To support such mixed-modeling, the CT simulator models the discrete
events as Dirac delta functions. It also includes the ability to precisely detect threshold crossingsto produce discrete events. Physical systems often have simple models that are only valid over acertain regime of operation. Outside that regime, another model may be appropriate. A modal
model is one that switches between these simple models when the system transitions between
regimes. The CT simulator interoperates with the FSM simulator to create modal models.
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13.4.1.2 Digital (DE)In the discrete-event (DE) simulator, the actors communicate via sequences of events placed intime, along a real time line. An event consists of a value and time stamp. Actors can either beprocesses that react to events (implemented as Java threads) or functions that fire when new
events are supplied. This model of computation is popular for specifying digital hardware and for
simulating telecommunications systems, and has been realized in a large number of simulation
environments, simulation languages, and hardware description languages, including VHDL and
Verilog.
DE models are excellent descriptions of concurrent hardware, although increasingly the globallyconsistent notion of time is problematic. In particular, it over-specifies (or over-models) systems
where maintaining such a globally consistent notion is difficult, including large VLSI chips withhigh clock rates. Every event is placed precisely on a globally consistent time line.
The DE simulator implements a sophisticated discrete-event simulator. Other DE simulators ingeneral need to maintain a global queue of pending events sorted by time stamp (this is called apriority queue). This is expensive, as inserting new events into the list requires searching for theright position at which to insert it. The VisualSim DE simulator uses a calendar queue data
structure for the global event queue. A calendar queue may be thought of as a hash-table thatuses quantized time as a hashing function. As such, both enqueue and dequeue operations canbe done in time that is independent of the number of events in the queue.
In addition, the DE simulator gives deterministic semantics to simultaneous events, unlike mostcompeting discrete-event simulators. This means that for any two events with the same timestamp, the order in which they are processed can be inferred from the structure of the model. Thisis done by analyzing the graph structure of the model for data precedence so that in the event ofsimultaneous time stamps, events can be sorted according to a secondary criterion given by theirprecedence relationships. VHDL, for example, uses delta time to accomplish the same objective.
13.4.1.3 Finite State Machine (FSM)
The finite-state machine (FSM) simulator is radically different from the other VisualSim simulators.
The entities in this simulator represent not block/actor but rather state and the connections
represent transitions between states. Execution is a strictly ordered sequence of state transitions.
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The FSM simulator leverages the built-in Expression Language in VisualSim to evaluate guards,
which determine when state transitions can be taken.
FSM models are excellent for control logic in embedded systems, particularly safety-criticalsystems. FSM models are amenable to in-depth formal analysis, and thus can be used to avoid
surprising behavior.
FSM models have a number of key weaknesses. First, at a very fundamental level, they are notas expressive as the other models of computation described here. They are not sufficiently rich todescribe all partial recursive functions. However, this weakness is acceptable in light of the formal
analysis that becomes possible. Many questions about designs are decidable for FSMs andundecidable for other models of computation. A second key weakness is that the number of states
can get very large even in the face of only modest complexity. This makes the models unwieldy.
Both problems can often be solved by using FSMs in combination with concurrent models ofcomputation. This was first noted by David Harel, who introduced Statechart formalism.
Statecharts combine a loose version of synchronous-reactive modeling (described below) with
FSM. FSMs have also been combined with differential equations, yielding the so-called hybrid
systems model of computation.
The FSM simulator in VisualSim can be hierarchically combined with other simulators. We call the
resulting formalism “*charts” (pronounced “starcharts”) where the star represents a wildcard. As
most other simulators represent concurrent computations, *charts model concurrent finite statemachines with a variety of concurrency semantics. When combined with CT, they yield hybrid
systems and modal models. When combined with SDF (described below), they yield somethingclose to Statecharts.
13.4.1.4 Untimed Digital or Synchronous Data Flow
The synchronous dataflow (SDF) simulator handles regular computations that operate on
streams. Dataflow models are popular in signal processing. Dataflow models construct processes
as sequences of atomic actor firings. Synchronous dataflow (SDF) is a particularly restricted
special case with the extremely useful property that deadlock and boundedness are decidable.
Moreover, the schedule of firings, parallel or sequential, is computable statically, making SDF
extremely useful specification formalism for embedded real-time software and for hardware.
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Certain generalizations sometimes yield to similar analysis. Boolean dataflow (BDF) models
sometimes yield to deadlock and boundedness analysis, although fundamentally these questions
are undecidable. Dynamic dataflow (DDF) uses only run-time analysis, and thus makes noattempt to statically answer questions about deadlock and boundedness.
13.4.1.5 SystemC
SystemC is an event-driven simulator providing hardware-oriented constructs within the context of
C++ as a class library implemented in standard C++. SystemC use spans design and verificationfrom concept to implementation in hardware and software. SystemC provides an interoperable
modeling platform which enables the development and exchange of very fast system-level C++
models. It also provides a stable platform for development of system-level tools.
The library provides a set of data types implementing various data representations needed for
hardware modeling and certain types of software programming. These include 2-valued and 4valued bit vectors of arbitrary width, and fixed-point representations. Also included in the corelanguage are modules and ports for representing structure, as well as interfaces and channels
that describe communication. Finally, the library includes a set of built-in primitive channels thathave wide use such as signals and FIFOs.
A SystemC system consists of a set of one or more modules. Modules provide the ability todescribe structure. Modules may contain processes, ports, internal data, channels, and instancesof other modules. All processes are conceptually concurrent and can be used to model thefunctionality of the module. Ports are objects through which the module communicates with othermodules. The internal data and channels provide for communication between processes andmaintaining module state. Module instances provide for hierarchical structures. The interface,port, and channel structure provides for great flexibility in modeling communication and in modelrefinement.
13.4.1.6 Wireless Sensor networks

Modeling of wireless sensor networks requires sophisticated modeling of communication
channels, sensor channels, ad-hoc networking protocols, localization strategies, media
access control protocols, energy consumption in sensor nodes, and so on. This modeling
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framework is designed to support a component-based construction of such models. It is
intended to share models of disjoint aspects of the sensor nets problem and to build models
that include sophisticated elements from several aspects.

13.4.2Choosing Models of Computation

The rich variety of concurrent models of computation outlined in the previous section can bedaunting to a designer faced with having to select them. Most designers today do not face thischoice because they get exposed to only one or two.
Embedded software and digital electronics designers exclusively utilize the Discrete-Event
simulator while DSP and image processing architects utilize the Synchronous Data Flow.
Protocols are best done using the combination of Discrete-Event and Finite State Machine while
MEMS and control systems prefer Continuous Time and Finite State Machine. A special case of
combining simulators is the Continuous Time and Finite State Machine. This combination iscalled a Hybrid System.
There are three CT Simulators:oooCTMultiSolverSimulators - Top-level director only
CTSimulators - Top-level or inside a composite actor
CTEmbeddedSimulators - Contained only in a CTCompositeActor

In terms of mixing models of computation, all the directors can execute composite actors that
implement other models of computation, as long as the composite actors are properly connected.
Only CTMixedSignalDirector and CTEmbeddedDirector can be contained by other domains. The
outside domain of a composite actor with CTMixedSignalDirector can be Discrete Event. The
outside domain of a composite actor with CTEmbeddedDirector must also be CT or FSM, if theoutside domain of the FSM model is CT.
An essential difference between concurrent models of computation is their modeling of time.
Some are very explicit by taking time to be a real number that advances uniformly, and placing
events on a time line (Discrete-Event) or evolving continuous signals along the time line
(Continuous Time). Others are abstract and take time to be discrete (Synchronous Data Flow).
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A grand unified approach to modeling would seek a concurrent model of computation that serves
all purposes. This could be accomplished by creating a melange, a mixture of all of the above, butsuch a mixture would be extremely complex and difficult to use. Another alternative would be tochoose one concurrent model of computation, say the Continuous-Event, and show that all theothers are subsumed as special cases. This is relatively easy to do, in theory. Most of thesemodels of computation are sufficiently expressive to be able to subsume most of the others.
However, this fails to acknowledge the strengths and weaknesses of each model of computation.
Thus, to design interesting systems, designers need to use heterogeneous models.
The approach used in VisualSim is to provide in the infrastructure an abstract semantics, rather
than a unifying model of computation. It is “abstract” in the sense that it is not a complete model ofcomputation. For example, the abstract semantics of the block package asserts that blocks “fire,”
but it says nothing about when they fire. This makes it possible to define blocks that can operate
in several simulators (we call these simulator polymorphic blocks).

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14 Concept of Time
14.1

Introduction

The Simulator controls the concept of time and the advancement of the simulations schedule.
As VisualSim is a multi-domain simulator, the time is synchronized across multiple simulations.
Some Simulators such as the un-timed digital have no concept of time. These Simulators movethe data token from one output port to the next input port.
During model initialization, a topology map of the entire model is constructed. Each
Hierarchical block can contain a Simulator icon instance. This partitions the model structure
for the local simulators to handle the processing and the master simulator to manage the central
communication and the Master Clock. For time-based Simulators such as Discrete-event
Simulator, it is important to add a Simulator icon to each level of the Hierarchy for large
models. This keeps the events occurring at that level of hierarchy local and maintains a smaller
calendar of events, thus increasing simulation performance.
Sub-models or classes must always have a Simulator instantiated in them.

14.2

Time Resolution

Time Resolution of the Simulator is provided as an attribute of the Simulator icon. This is adouble value which defaults to 1.0e-12. The Time Resolution of the Simulator must be
smaller than the smallest delay in the model. Zero is not a possible value. If the smallest timein your model is 0.1 ns, then the Time Resolution must be smaller than 0.05 ns. The Time
Resolution is used to resolve any contention occurring at the same time.
Note: If you have identical results for different time resolutions, the time resolution must always
be of the form 1.0e(x) which x is a positive or negative integer. The time resolution cannot be
0.5e-11 or something similar. It must always be 1.0e(x).
Blocks in different levels of the hierarchy or even within the same hierarchy can be fired insynchronous time. This means that there is no advance in time between the individual firing.
This is called concurrent operation. In real life this would be a processor which is acting on
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instructions in two Execution Units, while another Execution Unit is waiting for a Cache
access.

14.3

Simulation Time

The simulation time depends on the number of events in the model and the time resolution. The
StopTime in the Continuous and Digital simulator depend on the time resolution. The largest
simulation time can be derived using the following formula:
TimeResolution = 1.0e-12
Bits = floor(-1 * log2(TimeResolution)) + 1 = 40.0
maximumGain = 52 – Bits = 12
stopTime = 0.90 * pow(2.0, maximumGain) = 3686.4
The simulation stops at this point and any remaining events are not completed.
If all the activities in the model finish prior to the StopTime and there are no more items remaining,
the clock simply jumps to the StopTime and the simulation ends.

14.4

Relative vs Clock TimeThe Digital Simulator operates on “Relative Time” and “Clocks”. In Relative Time, timeadvances in the model using a delay value. The delay value has a base of seconds. If themodel is clock-driven, there are inherent clock cycles and clock edges. This means that every
block in the model is synchronized to a clock and fires at the clock edge. Models can be a
combination of clock and Relative Time.

14.5

Computing Time

One unit of time is one second and one unit of data size is one byte. One nanosecond isdenoted by 1.0e-9 while, 8 bits is denoted as 1 byte. The clock generated and any mathcalculations can be accurate to a resolution of 1.0e-14. So, the clock generated can be at leastas accurate as the hardware clock.
Values are stored in VisualSim at a resolution of 1.0e-20. Calculations are performed at theaccuracy of 1.0e-14. When you use a time value in any delay block, the expression is first
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calculated with the calculation accuracy and then rounded to time resolution. If you are using
multiple of a clock value for the delay, it is best to create another clock with the required value.
For example, the time resolution is 1.0e-13. 1.0e-13 is the resolution of the number inside theWAIT(x) statement or Delay block. x is rounded internally according to time resolution to be usedby WAIT(x). The value of x in other parts of the model has the original resolution of 1.0e-14. Whenx is multiplied with N, and the N*x is used inside WAIT(N*x), the result N*x is rounded again
according to 1.0e-13. But in the calculation of N*x, the resolution is 1.0e-14.

14.6

Clock Synchronization

The WAIT (time) and TIMEQ function in the Script support clock synchronization for an integer
and long value. If the time value is a double, then the simulator is delayed by this value. If the
WAIT() uses an integer, then the value is treated as a clock speed. This means that function will
delay to the clock boundary. For example, if the value is 1000000. This is considered as the
speed of the clock in hertz. In this case, the delay value is (1.0/1000000) or 1.0e-6 or 1 microsecond. The use of an integer or long value as the clock value in Hertz for the WAIT() or TIMEQ()
delay argument causes the statement to execute at exactly the clock rate based on the simulation
time. There is no need to perform any other clock synchronization.

14.7

Model Event

A Model Event is similar to a time event, except generated by the user, and can occur at any
time between blocks. In other words, a model condition triggers a Model Event forsynchronizing between blocks, or within clock-driven processes. The most common use is togenerate clocks from a single block to multiple blocks that are waiting for a clock event. Model
Events can be generated from any RegEx block using the following RegEx function:
newEvent (“MyEvent”)
The argument of newEvent must evaluate to a string name. The string argument can becomposed of newEvent(MyParameter + “_MyEvent”) notation for events inside a hierarchicalblock. This function can be applied in ExpressionList, Script or Smart_Controller Blocks. The

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Script and Smart_Controller blocks also support the following syntax which executes locally in
the Script or Smart_Controller block.
EVENT (“MyEvent”)

This notation is preferred over the newEvent() RegEx notation, for faster execution. In acorresponding Script or Smart_Controller block, the user needs a matching syntax as follows:
WAIT (“MyEvent”)

This statement continues processing on the next statement after it receives a newEvent() or
EVENT(). If the newEvent() or EVENT() is generated before the WAIT() on event, characterized
as a string argument, then the WAIT()immediately goes to the next statement. Finally, if two
newEvent()s or EVENT()s are generated prior to a WAIT (“MyEvent”) only one will execute
similar to an ‘OR’ of pending events. This is done to prevent the unintentional build up of eventsin a model that may not execute as expected.

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15 Data Structures
15.1

Introduction

Data Structures are the signals or transactions that propagate from block to block along thewires between ports. Data Structures are the equivalent to a packet on a network or a collectionof wires/pins on a chip or a message between methods in software. The Data Structure
contains a number of fields with unique names.
Every block in a model operates and makes decisions on the content of the Data Structures.
For example a Traffic Generator would create a Data Structure with certain content, at a certain
time and transfer it to the next block, which could be a queue. The queue block could reorderthe queue storage based on the field of this data structure called “Priority”.
Data Structure fields can be manipulated by the ExpressionList, Script, and Custom-coded
blocks. All other blocks use the field values to make decisions such as routing, execute,Reador Write operations and implement delays.

15.2

LayoutA data structure contains a number of rows and each row contains a Field name and a Value.
A Data Structure in VisualSim looks like this:Field Name

Field Value{BLOCK"Traffic"

DELTA

0.0

DS_NAME"DS_Traffic"

Field1

1.0

Field2"str"

Field3

True

ID

1

INDEX

0

TIME

1.0E-10}

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All data structures comprise six (6) header rows. These are:Field Name

Field Description

Type

BLOCK

Name of Source Block

String

DS_NAME

Name of Data Structure Template

String

DELTA

User Settable Field. This field can beused to store intermediate values thatmight be needed for a calculationelsewhere in the model.

DoubleTIME

Simulation time when DS was
created. This is a time stamp that can
Doublebe used to compute the latency and/or
to determine deadline triggers.

INDEX

User Settable Field. This field can beused to store intermediate values thatmight be needed for a calculationelsewhere in the model.

ID

Unique ID of each Data Structure fromeach source. This is a increasing
Integersequence number.

Integer

The remaining are user-defined fields. There can be any number of user-defined fields. The
types of the user-defined fields are inferred from the initial value. The three user-defined fields
from the above example are:Data Structure Field Name

Field Type

Field Value

Field1

Double1.0

Field2Stringstr

Field3

Booleantrue

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15.3 Supported Data Types
The fields of the data structure support the following data types:

Data Type

ExampleInteger

20

Long

2L

Double1.0

String“L2_Cache”

Booleantrue or false

Data Structure{FldA=1, Fld2=3}

Binary String

4’b100 (string for the Verilog format)(Available only in the Data Structure
blocks and is being deprecated.)Array{1.0, 2.0} or {{1.0,2.0},{3.0,4.0}}

Matrix[1, 2; 3, 4]Complex

4 + 2jFixed Point

fix(.37665, 6, 2)

Embedded Data Structure

Data_Structure “Processor_DS” or Data_Struct“C:.VisualSim.VS_AR.VisualSim.data.Processor_DS”

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15.4

Port Typing

The “Type System” in VisualSim follows a hierarchical pattern that determines the automatic
casting in an expression. All block ports are polymorphic, meaning that their type is defined at
run-time based on the arriving data token. The default polymorphic setting for the port is'unknown' or 'general'.
Some blocks have preset port types for the input and output ports. These types cannot be
modified by the user. The ports connected to these ports must be modified. The data type of
the ports connected to these preset port must match the preset type. To change the port data
type, right-click on the block and select “Configure Ports” in the context menu of the block.
Common ports requiring this modification includes the “priority” ports of the TimedQueue andthe “input” ports of the TimeDataPlotter blocks.

15.5

Data Structure Template Location

Text-based Data Structure can be located anywhere in the File System that can be accessedby VisualSim. If the txt file is located in <VS Home>/VisualSim/data, else the path must be
provided. Java class definition of Data Structure must always be located in the <VSHome>/VisualSim/data directory.


Note

15.6

The data structures shipped with VisualSim are either located in the <VSHome>/VisualSim/data directory or in the directory containing the model.

Data Structure Definitions and Example

There are three ways of constructing a Data Structure definition:o Text or CSV format fileo Traffic Block Windowo Java class file

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15.6.1

Text Example

File Name:Stop_n_Wait.txt
Rules: Each row is a field. Spaces are required between columns. The line must end with asemi-colon. The advantage of the text version of the Data Structure is that it can be dynamicallymodified and used without recompiling.
// Name

Type

Value

Uniform_Rand_Length

int

1 ;

/* Field Comment*/

Uniform_Rand_Noise

int

2 ;

/* Field Comment*/

Channelint

3 ;/* Field Comment*/

Packet_Bytes

int

4 ;

/* Field Comment*/

Time_Stamp

double5.0 ;/* Field Comment*/

Packet

Data_Struct “Processor_DS” ; /* Field Comment

15.6.2

Comment*/

Java Example

File: Stop_n_Wait.javaRule: Data Structure fields are concatenated like a string.
//Type Name

Value

Comment

private String Transaction_Name="App_0" ;/** Transaction Name (IORead, etc. ) */private int Transaction_Bytes=0;/** Transaction Size in Bytes*/

private String Source_Name

="P0"

;

/** Source Name, used in routing*/

private int Source_ID

=

1

;

/** corresponds to Processor ID*/

private String Destination_Name= "Bus";/* Destination Name, used in routing*/

private int Destination_ID=1;/* Destination Processor ID*/

private String DMA_Channel_Name = "DMA_Channel" ; /* DMA Channel Name*/private int DMA_Channel_ID*/

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The last line must end with a ";" outside the "", as this indicates the end ofthe string.

Note

Save this file in the $VS/VisualSim/data directory only.
To compile, use javac in the Java JDK bin folder

15.6.3Finding the Data Structure Template

The blocks first look for a class definition in the VisualSim/data directory and then a text fileversion of the Data Structure. It accepts the first file with the matching name of the Data
Structure that it finds in the CLASSPATH. The CLASSPATH is defined in the VisualSim.bat/sh
file.

15.7

Path Definition

There are three ways to define the path to the Data Structure definition.
1. Data_Structure_FileName (Definition is in VisualSim/data directory of the install)
2. User_Library.Data_Structure_FileName (Definition is in <VS Home>)
3. C:.VisualSim.Data_Structure_FileName (External to VisualSim- Windows)
orUser.VisualSim.Data_Structure_FileName (External to VisualSim- UNIX)The Data Structure definition location is required for the following blocks:
o Traffic
o TriggeredTraffico VariableList- Initial Valueo Script Blocko ExpressionList
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o RegEx function- newToken

15.8

Construction

The Data Structures are generated by the Source blocks (Traffic, TriggeredTraffic,
Transaction_Sequence, and Script).


Note

It is recommend to define all the data structures in a single location. New fields
can be created in the ExpressionList and Script blocks.

The sequence of events is as follows:
1. Create a Data Structure template as a txt or a Java file.
2. Enter the name and, optional path, in the traffic generator block.
3. Customize field values to create scenarios.
4. Use the values to make decisions or conduct operations in the model.

15.8.1

Compiling Java Data Structure

To compile the java file, run "javac VisualSim\data\MyDS.java" from the root of the VisualSim
install. If javac is not recognized, make sure that the jdk/bin directory is included in the PATH.

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16 Processor_DS
16.1

Introduction

The Processor_DS is the Data Structure Template used by the Hardware Modeling blocks. The
following are the fields.
Field Name

Type

Value

A_Address_Min

int

1

A_Address_Max

int

100

Comment

Can store Address. This is not being
used by any IP block.
Can store Address. Used in the
Memory Controller for the Bank
Number.

A_Addr_Ctrl_Flag

Booleantrue

Address or Control Flag; Used to
distinguish between Read and Write in
the Memory Controller. True is read.

A_Address

Long

0L

A_Branch

Booleanfalse

Address value in long data type, usedby processor, cache and memory.
Instruction Branch; Used in theprocessor block to determine whether
the branch has been taken or not.

A_Bytesint

8

Data size in Bytes. This is the total sizeof the transaction. Used in all the IP
blocks for the size of the transaction.

A_Bytes_Remaining

int

4

Remaining data in Bytes whentransaction is fragmented.

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Field Name

Type

Value

Comment

A_Bytes_Sent

int

4

Transaction data size in Bytes for thisfragment.

A_Command

StringRead

Commands are typically Read, Write,
Prefetch, and so on. The user can put
any value in it as described for thecustomer blocks.

A_D_Addr

Long

0L

Used for data cache address

A_DataStringMyDataUser Data. This is not being used by Ip
block currently.

A_First_WordbooleantrueFirst word for a transaction. This isused internally in bus and memory
blocks. The Bus sets this flag for the
first word when it sends it to the
Cache/DRAM blocks. It is used in the
HW_DRAM to determine whether theword is the first or not.

A_Instruction

array{"ADD","ADD"}

Instructions. This is the list of
instructions for the Processor to
execute. It is also the instruction used
to identify the matching task in the
DMA Database.

A_Instruction_Reorder

array

{1,1}

(Optional Field) Enable or disable outof-order execution. This determines
how many newer instructions can
execute before the current one must

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Field Name

Type

Value

Comment

execute. The possible values are 0 and
1 where 1 means everything must
execute in order and 0 means thatanyone can go ahead. There must be a
one-to-one correspondence between
this and the A_Instruction. Additional
values of 23… are possible. 2 indicatesthat next two instructions can execute
before the Processor has to wait for thecurrent instruction to execute.
A_Interrupt

BooleanfalseInterrupt flag for DMA requests andPrefetch. Set by Processor or cache
block; Decision made on what to returnat the cache and DRAM blocks; Sets it
to true when we need to get only one
word back.

A_Prefetch

booleanfalse

Prefetch Flag. Same as A_Interrupt but
the request is for a whole line as
opposed to a word. Used between theprocessor and cache; and cache andDRAM.

A_I_Addr

Long

0L

Used for Instruction cache address

A_IDX

int

0

Index number of the current Instructionin the A_Instruction array.

A_IDY
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int

0

Last index of a multi-instruction access.
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Field Name

Type

Value

Comment

A_Priority

int0Transaction Priority

A_Proc_Return

int

-1

Processor Return ID and usedinternally for decisions

A_Return

int-1

Return ID

A_Protocol_State

String

MyStateProtocol State -- FSM Map. Not used.

A_Task_Flag

Booleanfalse

Indicates a required return for a Writetransaction

A_Task_Name

StringName

Unique Task Name

A_Task_ID

long0

Unique Task ID

A_Task_Addressint

1Unique Task Address

A_Task_Source

String

Src

Transaction Source

A_Source

String

Src

Transaction Source

A_Hop

StringHop

Next Intermediate Device name

A_Status

StringStatusRouting Status

A_Destination

StringDest

Transaction Destination

A_TimeDouble0.0Internal Timestamp

A_Variables

Int

16

Number of Software Variables

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16.2

Usage of Data Structure fields in the Model

A_Address_Min – It holds the starting bus or memory address.
A_Address_Max – It holds the ending bus or memory address.
A_Address_Control_Flag - Used internally by the Linear, PCI, and AHB buses.
A_Address – Instruction, Data or Device Address, used by the hardware devices such asprocessor, cache and memory.
A_Branch - Instruction Branch, used internally by the processor when an instruction arrives
and the branch needs to be taken. If "true', the processor pipeline is flushed.
A_Bytes - Total Number of Bytes in a transaction. This is typically the number of bytes
requested from the Slave.
A_Bytes_Remaining - When partial transfers are made, the bytes remaining to be transferred
are maintained in this field. This is used by the Bus to know if all the transfers are complete fora Write/Read. The Slave looks for the A_Bytes_Remaining=0 to know that the transfer iscomplete.
A_Bytes_Sent - Actual number of bytes transferred in the current transaction. This is used forpartial data transfer. For a Bus, this is equal to the burst size.
A_Command – It holds the Request type. The standard ones are Read, Write, Prefetch, andErase. Others can be added by the user as required. Read, Write, and Prefetch are special
keywords that are understood by the Bus and Memory for processing.
A_D_Addr – Data cache address, used internally by the processor when an instruction arrives.
A_Data - Contains the user data.
A_First_Word - This is enabled or true for the first transaction in a multi-transfer sequence. Allother transfers in this sequence have false.
A_Instruction - An array of instructions that need to be executed on the Processor. The
instruction names in this field must match the list in the Instruction Set of the target processor.
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The Load/Store instruction does not contain the “#” in this field. The # is annotated on theInstruction_Set lookup.
A_Instruction_Reorder – (Optional field) An array corresponding to the list of instructions. The
default of all "1"s means that all the instructions are executed sequentially. All "0" allows
complete out-of-order execution. When an instruction completes, it sets the corresponding
value to "0". If the value is "2", it means that two instructions before must have completed before
this current one can execute. You can have any combinations of 0, 1,2,.....
A_Interrupt - This is linked to the A_Prefetch. If A_Prefetch is set to "true" and A_Interrupt" is
set to false, this is the very first prefetch for this task. If A_Prefetch and A_Interrupt are true, it
is an ongoing prefetch. For the DMA, this operates without the A_Prefetch flag. It is a goodpractice not to change these fields.
A_Prefetch - If A_Prefetch is set to "true" and A_Interrupt" is set to false, then it is the very firstprefetch for this task. If A_Prefetch and A_Interrupt are true, it is an ongoing prefetch. It is agood practice not to change these fields. This is set to false for cache misses and retrieving
one word.
A_I_Addr – Instruction cache address, used internally by the processor when an instruction
arrives.
A_IDX - Current instruction index in the A_Instruction array.
A_IDY – This is used for managing multiple instruction dispatch per cycle. Specifies the last
instruction index is the set that has been dispatched for the current cycle.
A_Priority - Priority of the current transaction. It is used for queue reordering and bus
preemption.
A_Proc_Return - This specifies a return ID when the processor sends the request to a bus,
DMA, slave or any other device. When the user goes to a “task", this specifies where to return
it. This is used by the Processor and DMA block.

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A_Return - This is an index to the Pipeline on return. This tells which stage of the pipeline thistask is returning too. The user should not modify this. A positive number indicates it is waiting
and a negative number means it is ignored.
A_Protocol_State - This is used for the pipeline and is used internally by the processor andLinear Bus.
A_Task_Flag - This is used for the pipeline and is used internally by the processor and Linear
Bus.
A_Task_Address - This is used for the pipeline and is used internally by the processor andLinear Bus.
A_Task_Source - This is used by the Bus to keep track of intermediate information. Do notchange.
A_Task_Name - Unique Processor Task Name. This is an identifier at the Processor on whichtask is executing. This is used by the DMA to determine the sequence of operations to be
performed based on a match of the Task Name and the instruction Name.
A_Task_ID - Unique Processor Task ID and each task coming into the processor should havea unique number for multiple task execution on the processor.
A_Source - Transmitting block name. If the processing is sending a read request to the Slave,the Processor name is the Source. On the return, the Slave name is the Source. Used forrouting on the Bus
A_Hop - Used for routing across the Bus. This is used to determine what the intermediate node
is in the transfer between devices.
A_Status - Routing Status and is maintained with the Bus Arbiter. This is not a user-editable
field
A_Destination – This is used to determine where to send this data structure next. It could be
Processor, bus, dma, memory or any other hardware deviceUsed for Routing, destination
where the request has to be sent.
A_Time - Internal Timestamp
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A_Variables - Number of Software Variables. This determines the hit or miss at the Registers
and D_Cache.

16.3

Processor_DS Example

OUTPUT AT TIME------ 0.10 ns ------{A_Addr_Ctrl_Flag= true,A_Address_Max= 100,

A_Address_Min= 1,

A_Address= 0L,

A_Branch= false,A_Bytes= 8,

A_Bytes_Remaining= 4,

A_Bytes_Sent= 4,

A_Command= "Read",A_D_Addr= 0L,

A_Data= "MyData",

A_Destination= "Dest",A_First_Word= true,A_Hop= "Hop",

A_IDX

= 0,

A_IDY

= 0,

A_I_Addr= 0L,

A_Instruction= {"ADD", "ADD"},// Optional field

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A_Interrupt= false,A_Prefetch= false,A_Priority= 0,

A_Proc_Return= -1,

A_Protocol_State= "MyState",

A_Return= -1,

A_Source= "Src",A_Status= "Status",

A_Task_Address= 1,

A_Task_Flag= false,A_Task_ID= 0L,

A_Task_Name= "Name",A_Task_Source= "Src",

A_Time= 0.0,

A_Variables

= 16,

BLOCK

= "Trans_Src",

DELTA= 0.0,

DS_NAME= "Processor_DS",

ID

= 1,

INDEX

= 0,

TIME

= 1.0E-10}

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17 Parameters
17.1

Introduction

Parameters are constants defined in the model window or a block. Parameters are constantsand do not change during a simulation. Parameters are evaluated at the start of an execution
and the value is maintained until the end of the simulation. Each block has a defined set ofparameters that are associated with the operation of the block. The users can add parameters
to both model windows and blocks. Parameters define attributes such as the processor speed,
queue depth or simulation time, or run-time conditions such as Traffic_ON.


Seed

17.2

Parameters are used to specify attributes such as the processor speed, queue
depth or simulation time, or run-time conditions such Traffic_ON.

Parameter Values

The values of the parameters can be scalar, strings, file names, colors, expressions, andfunctions. All data types are supported in the parameters.

Strings must be enclosed in "Quote" marks. Integers should not haveTypesappended at end of the number. Booleans should be lowercase 'true' ordecimal points. Doubles should have decimal points. Longs should have "L"'false'.

Expression in parameters can be an arithmetic or logical operation. The parameter expressions
can contain values from other parameters.
Type

ExampleString“Queue1”“file://C:/VisualSim/filename.txt”

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Type

ExampleInteger1

Double

1.0

Long

123L

Boolean

true

Array

{1,2,3}Matrix[1,2;3,4]Note: Can contain any data type

Expression(Parameter1==4)?Parameter2:Parameter4

Data Structure{first=1,second=”name”}

17.3

Creation

To add a new model parameter:
1. Drag-n-Drop the block from the Library Folder Model Setup >Parameter ('parameter=') into
an open Block Diagram Editor window.
2. Right-click to select Customize Name of the parameter and enter a name. A new parametername must be unique, else the BDE will generate an exception.
3. Double click the new parameter name to set the value of the parameter.
For a block, double click on the block and select Add. Enter the parameter name and value.

17.4

Using Parameters

Parameters can be on the Right-Hand Side of an expression and as a block parameter value.

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Figure 66.

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Figure 67.

Using Parameters to set Block attributes

Parameters can be concatenated with strings to form the Destination Name for Virtual
Connections and the file names for file access blocks.
Parameters of a block at the top-level of the model, parameters of a hierarchical block or
parameters of a block within a hierarchical block can be accessed from any other block or
parameter. The format is as follows:
MyBlock::MyBlock_Param
Example: Server::Number_of_Queues
Where Server is the block name and Number_of_Queues is the parameter name. Now, if you
have to access a parameter from a Hierarchical block, you provide the complete path containing
all the intermediate Hierarchical block starting from the top-level.
My_HBlock::My_HBlock2::BlockName::Low_Level_Param
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The BlockName will be the name appearing above the block. Parameters in a hierarchical blockthat are not linked to top-level parameters and parameters of a block cannot be accessed fromanother hierarchical level. The value of the parameter in hierarchy or parameter of a block can beaccessed from the batch-mode simulation using the following format:
Hierarchical block: <window1_name.window2_name.Parameter_name>
Block: <Window1_name.block_name.Parameter_name>

When defining parameter values for the batch-mode simulation, the “ of astring value must be followed by a \”. For example, a value of “MyName”

Batch-Mode

17.5

must be defined as “\”MyName”\”.

Linking Parameters Up/ Down the Model Hierarchy

The value of a parameter can be set in the parameter or can reference a parameter name in
the block that this parameter is contained. This can be block parameter that refers to aparameter in the window or a parameter window reference a parameter in the window that
contains this block.



Values of parameters flow top-down and never bottom-up.

Value Flow

Blocks can link to top level system model parameters by entering the name of the top levelparameter in the Block parameters. In the case below, the top level parameter
Processor_Speed' is passed to 'Hierarchical_Block' ARM_Speed' (Value 133.0).

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Figure 68.

17.6

Linking Parameters

Parameters as Variables

Parameters are constants and, as such, are evaluated at the start of the execution and remain
the same until the end of the simulation. SetVariable block can modify the value of a parameter
during the simulation. The modified value is recognized by the algorithmic blocks, Expression
and, interactive display block. Traffic, Resources, Hardware, and Behavior blocks do notrecognize the modified value.

17.7

Shared Parameters

Parameters can be defined at one-level of the hierarchy and reused many levels below in thehierarchy. A parameter at a lower-hierarchy can link to the top-level parameter and get the toplevel value, provided there is no other parameter that matches the name in the hierarchy
between the two-levels. A special case of the shared parameter is the stopTime of the Digital
simulator. The user can set value at the top-level and all Digital simulators in the model adopt
this value. There is also a standard parameter in the folder called SharedParameter.
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17.8

Special Parameters

The “Parameter=” is the most-commonly used parameter. There are other parameter types
such as FileParameter (with a browse button), StringParameter (no double-quotes required),and ColorParameter.

17.9

Parameter Value on the Icon

The Appearance > Edit Custom Icon has ParameterValue to display the value of a parameteron the block icon. The ParameterExpression can be used to combine values of multiple
Parameters in an expression and the resulting value is displayed.
It is also possible to modify the color of the icon dynamically during the simulation. The fillColorparameter

of

the

icon

building

attributes

can

be

a

transitional-if

statement(x==y?red:(x==z)?blue:black). When the SetVariable block modifies the parameter value of x,
the icon color is modified.

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Figure 69.

Using Parameters to set the Icon color

In the example, the colors are identified by a type - idle, busy, full or halt. As the queue sizechanges, the icons on the lower part of the screen change color based on the new value of theQueue length.

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18 Configuring Ports and Making Connections
18.1

Introduction

The Configure Ports dialog supports adding, removing, and changing key properties of ports ofan entity. It displays the ports of an actor in tabular form with each row representing a port andeach column a particular property of a port. An example is shown below:

Figure 70.

Configure ports for the block

To configure the ports, right click the block and select Customize > Ports. Editing a cell does
not immediately cause the corresponding port property to be changed. Click the Apply button
to modify the port properties. Click Commit to dismiss after any table modifications are applied.
Clicking Cancel causes any pending table modifications to be discarded and the dialog
dismissed.

18.2

Editing

For the most part, editing the port properties is straight forward. Just click in the cell to be edited
and an obvious interaction ensures. Some properties may not be editable because they arepart of a class definition, so immutable. These cells have a red background and ignore any
attempts at editing as shown below.

Figure 71.
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Name - Names must not contain a period, must not be blank, and must be unique.
Input, Output, Multiport - Checkboxes that determines if a port is input, output, or both.
Type - The type can be given by any expression that can be evaluated (this expression is calleda "prototype"). For example, you can specify the type to be double by giving the string "0.0" (orany other number with a decimal point). However, this does not look very good as a designator
for a type. The VisualSim expression language defines the constant "double" to equal "0.0".
Thus, the preferred way to specify that a port has type double is to give its type as "double".
The primitive types include:• Data Structure• boolean• complex• double• fixedpoint• float• general• int• long• matrix• object• scalar• string• unknown• unsignedByte• xmltoken• {int}• [double]• {x = double, y = double}
The constant "unknown" has a rather special behavior, in that it sets the type of the port to be
unknown, allowing type resolution to infer it. The constant "matrix" designates a matrix without
specifying an element type, in contrast to, for example, "[double]", which specifies a double
matrix (see below). Similarly, the constant "scalar" designates a scalar of any type (double, int,
long, and so on.). The constant "general" designates any type.

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As the type is given by a "prototype", any data type that can be given in an expression can be
specified as a type. For structured types, follow the same syntax as in expressions. For
example:{double} - double array[int]- int matrix{field1 = string, field2 = int} – For Data Structure
Direction - The Cardinal Direction determines which side of the icon the port is located on.
Clicking in this cell brings up a menu that provides the means to select a specific side, that is
NORTH, EAST, SOUTH, and WEST. DEFAULT can also be selected. Below are the defaults:o Input ports are usually on the West side.
o Output ports are usually on the East side.
o Ports that are both an input and an output are located on the South side.
Show Name – Enabling this option causes the name of the port to be displayed. Disabling
removes the name from the display.
Hide - Enabling this option causes the port to be hidden.
Units - The units specification for the port. This column is not currently being used.
Remote Types- This column is used to define the data types on the remote system orapplication. This is used to define the data types for the Verilog and SystemC_Cosim only. Thisis a string field and must be fully contained within “”. The content in this column text depends
on the type of block and the interface.

18.3

Adding a port

To add a port, click Add in Figure 63. This adds a new row with either default, or unspecified
cells. Edit the cells as required for the new port.

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18.4

Removing ports

Select the row that contains the port to be removed. On a Windows platform, selecting a row is
accomplished with a double-mouse click in the row. On a Mac platform, selecting a row is
accomplished with a command-click in the row. When a row is selected, the name of the port
is displayed in the Remove button. Click Remove to remove the port from the table.

18.5

Polymorphic Port Types

Most VisualSim blocks can accept several token types on an input port to trigger normal
operation. Blocks have polymorphic input and output ports to allow the user more flexibility inimplementing their design. While most of the time the queue data tokens are Data Structures,
there may be instances where Int Token(s), or Double Token(s) are more appropriate. For
example, the Boolean_Trigger Block can accept any data token on the input, output, or 'control'
port.
The 'control' port does not care what data token enters. It is just used to control the flow oftokens from the input to output, based on the Boolean_Trigger menu attribute setting (See Full
Library -> Delay and Utilities -> Switching folder):Input_First_Next_Control
Control_First_Next_Input
Input_or_Control_First
Polymorphic port types reduce the number of library blocks needed by approximately fifty to
sixty percent, while maintaining the same functionality, and a high level of simulation
performance.
To understand the polymorphism system, run the model under
VS_AR\doc\Training_Material\Teaching\Type\

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18.6

Ports

There are six different types of ports. For more details on Ports, refer to the section on
Configuring Ports later in this Chapter.
⇒ The six ports are Input, Output, Multiport Input, Multiport Output, Input/Output, andMultiport Input/Output.
⇒ Single Input and Output ports can be selected from the toolbar. The remaining must be
selected from the Menu.
⇒ Single ports are solid and Multiports are hollow.
⇒ View details below on Configuring Ports.

18.7

Relation and Link

Links are the wires between various blocks in the diagram. The relation is the Black Diamondthat enables broadcast from a single port. The links simply transfer data structures and objects
from one port to another. There are no attributes and parameters associated with links andrelations.
⇒ External ports and relations can be created from the toolbar. View details below on
Configuring Ports.
⇒ Control-click to create new relations. The relation provides the ability to connect multiple
links to a single input. Alternatively you can click the Black Diamond in the standard
toolbar.
⇒ Drag connections from one port to another. Control-drag to create a connection startingat a relation or an external port.
⇒ To broadcast a value from a single port, connect to a diamond relation.

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Point-to-Point Block Connections

18.8

After drag-n-dropping several Blocks into the Block Diagram Editor, including hierarchical
Blocks, it is easy to inter-connect the Blocks together. For a simple output port to single input
port connections, one just drags from either the input, or output port, to the other port. If an
output port must go to more than one input port, then one must add a "Relation" connection
into the Block Diagram Editor by pushing the black diamond ICONin the top menu bar, andthe BDE will add a new relation in the middle of the open window. You then connect each input
and output port(s) to the added "Relation". You can also make a connection from a "Relation"
to an input or output port, simply by holding-down the "CTRL" key before dragging to the input
or output port.

Figure 72.

Block-to-block Connections

In terms of Hierarchical blocks, one must first add the input and output ports by right-mouseclick "Open Block" and then return to the top level to connect the ports. Finally, one can leave
non-mandatory input and any output ports "open" and the simulation runs fine.
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18.9

Making Connections

To connect the input (black) port to an output (black) port, select the input, hold down the leftbutton and drag over the output port.
To connect multiple wires, between multiple sets of input and output that meet at a point, a
relation (black diamond) must be used. Connect each input and output port to the relation. It
is not sufficient to have the wire go over the Relation. The wires must be connected to therelation.
In a Hierarchical block, you can connect a BDE port to a block port by holding the CTRL buttonand drawing the wire. Alternately, you can use the normal approach to connect the input/output
port of a block to the BDE port.
When you connect a multi-port (white) of a Hierarchical block to another block, you must always
connect the output port to the multi-port and then the input port to the multi-port. If this process
is not followed, data may not go across the interface.

18.10

Virtual Connections

A unique connection in VisualSim is the ability to communicate between two points in the model
without the use of wires. The communication can be between a Script and a IN block or an
OUT to an IN block. This communication is done using destination name matching. The
destination types can be local (same window) and global (full model).

18.11

Adding Parameters to Links and Ports

An annotated display and tooltip of the ports can be defined by adding a parameter called_showInfo and _explanation respectively to the port. The color and tooltip of the link can be
modified by using _color and _explanation respectively. To add a parameter, rght-click to“Configure”. Click Add to create a parameter.
An explanation of the three parameters is given below.
⇒(Block, Port and Link) The tooltip is done by adding a parameter name _explanation,
value as a string without “” and the class VisualSim.kernel.util.StringAttribute.

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⇒(Link only) For the color, you add _color giving a color name for the value (string without“”) and then making the class to be VisualSim.kernel.util.StringAttribute. The following
is the list of color values: black, blue, cyan, darkgray, darkgrey, gray, grey, green,lightgray, lightgrey, magenta, orange, pink, red, white and yellow.

⇒(Port only) A annotation can be displayed on a port by adding a parameter _showInfo,value as any data type and the default Class VisualSim.data.expr.Parameter.

Creating Generic Port Icon

18.12

Port icons are dynamically created in VisualSim during the block instantiation on the Block
Diagram Editor. The icon and color for Input, Output, Input/Output, and none port types are fixedand cannot be modified by the user. For a number of reasons, the user might want to keep thelook of the port different from the standard view. A generic icon of rectangular shape and green fillis provided. The port icon looks the same for input, Output, and input/output. Users can modify
their port icon to this generic type by doing the following:
1. Drag a block into the BDE.
2. Right-click on the port and select “Configure”.
3. Now click Add.
4. Enter the following informationa. Name: _icon ; Value: true; Class: VisualSim.kernel.util.StringAttribute
5. Click OK.
6. Click OK.
7. Now, you see that the port icon has changed to a green rectangle.
You can do the above graphical function by updating the xml file:<port name="input" class="VisualSim.actor.TypedIOPort"><property name="input"/><property name="_icon" class="VisualSim.kernel.util.StringAttribute" value="true"></property></port>Reference Guide- 174 Mirabilis Design Inc

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You need to add the property name _icon with the associated class and value to each port thatneeds to be converted to this generic icon.

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19 Model Variable
19.1

Introduction

Memories in VisualSim are programming variables or hardware registers or lookup tables. They
can contain any data type. Memories can be accessed using Variable blocks, Expression_List,, and Script/Smart_Controller library blocks. Variable are defined as global, local and block in
VisualSim. The initialization, access, and data types are identical in all cases.

19.2

Variable Typeso Global - Global variable can be defined anywhere in a model using the VariableList
block. These Variable locations are visible throughout the model.

o Local - Local variable are defined and used in the same block diagram window. They
are defined in the VariableList. The main advantage of Local Variable is that multiple
instances of a Hierarchical Block can be added to a model without being concerned thatthe different Hierarchical Block variables interact with each other. Local variables canbe accessed from other model locations by using concatenating the model name andall the levels of hierarchy leading to the Variable location. The model name, level, andVariable name are separated by “.”.
o Block - This is a special form of Variable that is defined and used entirely within a block.
The Script, ExpressionList and Smart_Controller allow the creation of a Block Variable.
This can be accessed within a single instance of the respective block. The DS
Language-based Statement blocks have a Block Variable called DSNow that holds theincoming Data Structure.

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19.3

Variable Data Types

Data Type

Example

Int

123

Long

123L

Double12.3

String“string”

Booleantrue/false

Binary string

4’b101 (Verilog format)

Data Structures{field1=1,field2=1.0}

ArraysnewArray(10,1)

Array values can contain any of the above data types.

19.4

Variable Names

Memories can have any name. Local Variable names in different BDE can have the samenames. Local and Global Variable name cannot be the same. Also, Variable names cannot be
the same as the Block names for the Hardware Script, Smart_Controller, Queue or
SystemResource blocks. You can define a Variable name as a concatenation of three stringsor less. These strings can have parameters in them. Once defined, the Variable can beaccessed on the LHS and RHS from any block by using the name. If the name is aconcatenation of strings, you can create a reference to these memories by using thereadVariable or writeVariable RegEx function.

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19.5

Initialize Variable

The Variable must be initialized before being used. Global and Local Variable are defined inthe VariableList block using the following format.
Format: Variable_Name Variable_Type Initial_Value
Examples are:Var_name local 1 (Var_name is a local Variable of type int)
Var_name global 1.0 (Var_name is global Variable of type double)
Initial_Value formats are:Data Type

ExampleInteger

1

Long

1L

Double1.0

StringAny string

Booleantrue or false

Binary String

Array

Array

4’b101 (This is being deprecated and should not be
used.){1.0, 2.0}
{10:Processor_DS} (Creates an array of 10 indices withinitial value Processor_DS. Processor_DS is a data
structure definition in $VS/VisualSim/data. If the file is not

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Data Type

Examplein this location, this defaults to a string “Processor_DS”.
If the Data Structure definition is in a different location,access it as User_Library.Processor_DS or
C:.VS_Lib.Proc_DS.) Processor_DS here can also be
replaced with any other data type.

Data Structure

OthersProcessor_DS or User_Library.Processor_DS or
C:.VS_Lib.Proc_DS
Parameters or Variable, which references a value.

Block variables must be defined in the ExpressionList or Script. It is best to define the variable in
the top-section of the script for read-ability. In these blocks, the memories can be dynamicallycreated in the code or assignment. If the variable is not initialized but used, it is essential to assign
a value that can be statically mapped to a data type. Otherwise an error message is generated.

19.6

Checkers

There are two blocks and a RegEx function to check the content of the variable at any time. The
two blocks are the Variable_Monitor and the Variable_Dump. The RegEx is called
readAllVariable().
The Variable_Monitor block monitors the local and global variable names listed in theTrace_Name parameter. The block lists the accessing block name, current value, and variablename. The fields called Read_Variable_Name and Write_Variable_Name indicate whether a reador Write has occurred.
The Variable_Dump block outputs the current value in all the global and local variables in themodel. For every input trigger of the block, the name and content are output. The output is a data
structure with each field representing one of the memories. Global memories are identified by thename while the local memories have the complete hierarchical path plus name. The field names
are the memory names while the value is the current content.
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The readAllVariable is simply assigned as followings: Value = readAllvariable().

19.7

Accessing Local Variables

Local memories can be accessed within the same hierarchical windows. If you need to access a
local variable from another hierarchical block or anywhere else in the model, the following RegEx
approach must be utilized.

StringName = local_variable + “My_Local_Variable_Name” orStringName = (Block_Path + “My_Local_Variable_Name”).StringName.read()
You can do a similar operation to overwrite the content of this variable by doing the following:
StringName =“My_Variable_Name”
MyVariableToken =StringName.write(Token)

Where Token is the new value.
If you would like to access a Block Variable in a Script or Smart Controller, use the following
format:StringName = “My_Block_Variable_Name”
MyVariableToken = StringName.read(Block_Name)
Where Block_Name is the name of the Script block. It is not recommended to overwrite the valueof the Block Variable from outside the block, as it is very difficult to debug.

19.8

Things to Remember

o Variables must be initialized before being accessed for the first time.
o If the variable has not been initialized before use, the RHS reference to the name istreated as a String while a LHS usage generates an error saying “Cannot write to astring on LHS”.

o Variable names are Case-Sensitive.
o Variable names must be Strings and cannot be Parameters.
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o A parameter on the LHS generates an exception, as a parameter cannot be changed
during a simulation.

o Names of Global and Local variables cannot be the same. Local names can be thesame provided they are not in the same BDE.

o The current content in all variable locations can be accessed using the Variable_Dump
blocks available in Full Library /Model/ Utility/ Checkers library folder. You can also use
the RegEx function, readAllVariables() to access the list of all the local and global
variables in the model with the full path for the local variable. . In addition, users can use
RegEx functions to monitor variable, or Script execution for specific simulation times.

19.9

Pointer / Reference to a Variable

In the Script, Smart_Controller and ExpressionList blocks, you can create reference name to avariable (local and global). This capability is important where the name of the variable iscomposed of multiple strings concatenated together. This is a convenience feature that enables
a concatenated name to be used in an expression without using readVariable every time. In
these blocks,
Ref_Var = readVariable(“GlobalVariableName”) or
Ref_Var = (“GlobalVariableName”).read()
is a reference to the GlobalVariableName location. If you would like to access the variable in a
new variable, use
Ref_Var = newToken(readVariable(“GlobalVariableName”))
Note: If you place the GlobalVariableName or the Ref_Mem on the LHS of an equation andhave an assignment on the RHS, the reference is lost and the two behave like independent
variables.
For example, this is correct:
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Ref_Var = readVariable(“GlobalVariableName”)
Ref_Var.incr()
Other_Variable = Ref_Var + 2
This is incorrect and delinks the variable.
Ref_Var = readVariable(“GlobalVariableName”)
Ref_Var = Ref_Var.incr() /* Creates new variable and referenceis lost */*/GlobalVariableName = Ref_Var + 2 /* Delinks original reference

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20 File Paths
There are a few file path methods in VisualSim. The following blocks support the URI standard of
the Web. For more information on URI, click here.
Plotters:

Text

Content Management

TimeDataPlotter

FileWriter

Database

XYPlotter

File Reader

Transaction_Sequence

Histogram

Traffic_Reader

DS_TimeDataPlotter

TextDisplay

DS_XYPlotter

TextDisplay

These blocks follow the following formats:•

File name: The file is in the same directory as the model XML.

•./File Name: The file is in the same directory as the model XML. This is the Unix format.

•../File_Location/File name: The file is located in a different directory but in the same disk.
This is the Unix format.

•

VS (or $VS) + File Path + File Name: This uses the VisualSim constant string (VS) that
represents the install location of VS_AR.

•

Absolute Path: This includes the file path + file name from the base of the disk.

•

File:/(Absolute Path): This is the URI format. This includes the file path + file name fromthe base of the disk. An alternate format can also contain ///.

•

$CLASSPATH + File Path + File Name: The CLASSPATH is defined in the batch script(VisualSim.bat for Windows and VisualSim.sh for UNIX). The system searches in all the
directories in the CLASSPATH list. For any block that needs to write, the file must exist.

•

http://URL: This format is used to find a file that is on a Web Server. This format is toaccess data files located on remote Web servers. This is format is used when the model
must be used when the model is embedded in the html page and is viewed using
VisualSim Explorer. This format is only available for reading. Write is not permitted on
Web Servers.

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21 RegEx Language
The RegEx is a collection of Mathematical, Logical, Statistical, and Algorithm-SpecificFunctions. These can be used in scripts and expressions to accelerate model construction andfor fast simulation execution. The RegEx functions work with most data types and have a
specific format.

21.1

Computation using RegEx

The RegEx can be used in parameter fields to compute the value at the start of the simulation
based on other parameters. The RegEx can also be used in the FSM for the actions. In the
Script, Smart Controller, Processor, and ExpressionList blocks, RegEx can be used in methods
and on the Right Hand Side (RHS) of an equation. The equation can have any number ofoperators and variables and combine Data Structure Fields, Memories, Values andParameters. A complex expression can combine the built-in functions in any order, as far as
they confirm to the data types. The Left Hand Side (LHS) of the equation can only be a Field
or Variable. There are two types of formats:
Scalar and String Data types- Integer, Double and Long
X = Y + Z

Boolean
X = (Boolean function)?Value1:Value2

where X is assigned the value1 or value 2 depending on the Boolean function resolving to trueand false respectively. Value1 and Value2 can be any expression containing variables, Fields,
Parameters, and Values.
Arrays
1. Array(i) = Array(j) - Y + Z where Y and Z can reference an Array location,
parameters, variables, and values. The data types can be scalar, Boolean or string datatypes. The indices i and j, must be an integer type and can be a value, variable,parameter or field.
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2. Val = Array(i)(j) + Y + Z. This is a definition for a multi-dimension array. The
indices i and j, must be integer and can be a value, variable, parameter or field. The
assignment of value to a particular index in a multi dimension array requires temporary
variables to update the sub array. For example A = {{1,2,1},{4,5,6}}, to update index(0,2), please follow the following flow.
a. Temp = A(0)b. Temp(2) = Temp(2) + Y + Z
c. A(0) = Temp

21.2

Casting and Conversions

When an operator involves two distinct types, the expression language has to make a decision
about which type to use to implement the operation. If one of the two types can be converted
without loss into the other, then it will be. For instance, int can be converted losslessly to double,
so 1.0/2 results in 2 being first converted to 2.0, so the result is 0.5.

Among the scalar types, unsignedByte can be converted to anything else,
int can be converted to double, and double can be converted to complex.
Note that long cannot be converted to double without loss, nor vice versa.
So, an expression like 2.0/2L yields the following error message:

NoteError evaluating expression "2.0/2L"
It is because the divide method is not supported between Double '2.0' andLong '2L' as the operation between these types cannot be resolved
losslessly.

All scalar types have limited precision and magnitude. As a result of this, Arithmetic
Operations are subject to underflow and overflow. For Double Numbers, overflow resultsin the corresponding positive or negative infinity. Underflow (that is, the precision does not
suffice to represent the result) yields zero.

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For integer types and fixedpoint, overflow results in wraparound. For instance, while the valueof MaxInt is 2147483647, the expression is “MaxInt + 1 yields –2147483648”. Similarly, while
MaxUnsignedByte has value 255ub, “MaxUnsignedByte + 1ub” has value 0ub.
However the “MaxUnsignedByte + 1” yields 256, which is an int and not anunsignedByte. This is because MaxUnsignedByte can be losslessly
converted to an int, so the addition is int addition, not unsignedByte
addition. Note that these relational operators check the values whenpossible, irrespective of type.

NoteSo, for example,>> 1 == 1.0
returns true
To check for equality of both type and value, use the equals() method, as in>> 1.equals(1.0)
false

21.3
21.3.1RegEx Functions- Queue and SystemResource; Methods
Mapping Functions to Blocks for getBlockStatus

VisualSim provides a number of special functions for accessing the content of Queues. The
following functions are used:•

getBlockStatus: This is used to get a variety of information from the block. Below are someusage examples. There are three variations of these functions - 2, 3, and 4 variables. The
function returns the value to the LHS after performing certain operations on the selected
Queue. The queue number starts from 1 and the positions in each queue also start from 1.
Blocks Supported: SystemResource_Extend, SystemResource, Layer_Protocol,
Node_Master, Queue, Server, Channel_N, Script, Smart_Controller, DRAM, Processor,
Linear Bus, Cache, and DMA.
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•

QUEUE: This is used to define, put, pop, and do processing in a Queue defined entirely with a
Script. The queue number starts from 1 and the positions in each queue also start from 1.
Blocks Supported: Script•

TIMEQ: This is used to define, put, pop time, and do processing in a Timed Queue definedentirely with a Script. The queue number starts from 1 and the positions in each queue also
start from 1.
Blocks Supported: Script•

getDeviceStatus: This function returns the status (either free or currently active) for a specificdevice. The free means that there is space available in the input Queue.
Blocks Supported: DRAM, Processor, Linear Bus, Cache and DMA•

getResourceLength: This functions gets the length of the queue. The queue number start from
1 and the positions in each queue also start from 1.
Blocks Supported: Queue

21.3.2

getBlockStatus Functions

Operation

Explanation

copy

Returns the copy of the data structure at the head of queue .

takeRemoves data structure at the position without updating the statistics or placing iton the output port.
Note: In the Script block, the QUEUE and TIMEQ methods make these data
structures available to the next statement line.

pop

Removes the head of the Queue and places it on the output port. Updates statistics
Note: In the Script block, the QUEUE and TIMEQ methods make these data
structures available to the next statement line.

stats

Output the statistics for the queue or set of queues.
–(Queue Number) set the statistics and (Queue Number) reset the statistics
For all the Queues, Queue Number= Number Of Queues +1-(Queue Number) set the stastistics and (QueueNumber ) reset the statistics.

lengthCurrent length of the queue.

array

If current length > 0, then true, else false. Position 0 is always false as the Queue
number start from 1.

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Operation

Explanation

copy.fieldname

Returns the value in the field (fieldname) of all the data structure in the selectedQueue

21.3.3getBlockStatus format and example

x= getBlockStatus(“Block_Name”, “Queue Name”, Type, Queue Number, Position in Queue)
Type is copy, take, pop, stats, length, array and copy.fieldname where fieldname is a name of the
field in the Data Structure.
Return values for each type are:•copy: data structure•

take: data structure. Statistics are not updated for this data structure.

•

pop: data structure•

Stats: data structure or array of data structure, if all Queue requested•

Length: integer value•

Array: Boolean array•copy.fieldname: Array with any data type

Queue Name is only applicable for queues in the Script and Smart Controller.
Queue Number and Position in Queue are only applicable for Queue blocks, Server andChannel_N. First Queue is 1 and the First position in the Queue is 1.
Block/ Function

Function Details

SystemResource_Extend

getBlockStatus (“SystemResource Name”, “Any value”, Type, Any value,

SystemResource

Any value)
Type can be “length and “stats”. Does not require Queue number orPosition

Queue

getBlockStatus(“Queue_Name”, “Any value”, Type, Queue Number,
Position in Queue)
Type:
Copy - Requires Queue Number, Position in Queue

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Block/ Function

Function Details
take- Requires Queue Number, Position in Queue
pop- Requires Queue Number, Position in Queuestats- Requires Queue Number, Position in Queue is ignored
length- Requires Queue Number, Position in Queue is ignored
array- Does not require Queue number or Position
Copy.fieldName- Require Queue number, Position in Queue is ignored

ServergetBlockStatus(“Server_Name”, “Any value”, Type, Queue Number,
Position in Queue)Type:
copy: Requires Queue Number, Position in Queuestats: Requires Queue Number, Position in Queue is ignored
length: Requires Queue Number, Position in Queue is ignored
array: Does not require Queue number or Position
Copy.fieldName: Require Queue number, Position in Queue is ignored

Channel_N

getBlockStatus(“Channel_Name”, “Any value”, Type, Channel Number,
Position in Channel)Type:copy: Requires Channel Number, Position in Channel
stats: Requires Channel Number, Position in Channel is ignored
length: Requires Channel Number, Position in Channel is ignored
array: Does not require Channel Number or Position

Layer_Protocol

getBlockStatus(“Layer_Protocol_Name”, “Any value”, Type, Index, Positionin Queue)Type:stats: To get statistics, use 1 and for reset use -1 in Index. Position in
Queue is ignored
length: To get length, Up Queue use 1 and for Down Queue use 2 in Index
field. Position in Channel is ignored

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Block/ Function

Function Details

Script, Smart_Controller

getBlockStatus(“Script_Name”, “Input_Queue”, Type, Any value, Any value)(Input_Queue)Type:length: Does not require Queue Number or Position in Queue

Any value means that the user enters a value but the value is ignored.

21.4

Math Functions

VisualSim provides inbuilt mathematical functions for the users to perform various calculations on
the algorithm design of a system. It helps the user to implement the algorithm quickly by avoiding
the logic realization using script coding.
Function/RegEx
Abs
double/int/long/complex
Return Type: double/ int/long(complex returns double)
Angle
complex
Return Type: double in the range [pi, pi]

Explanation
Absolute value complex

Examplex = abs(-2.0)
= 2.0

case:
angle / argument of thecomplex number:x = angle(2.0+1.0i)= 0.46

Ceiling function, which
returns the smallest
ceil
doubleReturn Type: double(closest to negative infinity)

x = ceil(1.7)= 2.0

double value that is notless than the argument andis an integer.

comparedouble, double
Return Type: int

Compare two numbers,
returning-1 if if the first argument isless than;0, if the first argument
is equal to;
1 if the first argument is

x = compare(1.5,2.0)= -1

greater than the second;
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conjugate
complex
Return Type: complex

Complex conjugate

x = conjugate(2.0+1.0i)= 2.0 - 1.0i

Return true if the argument

Token.equivalent(Token Argument)

exp
double / complex
Return Type: double in therange[0.0, infinity] / complex

is equivalent value of thex = 2.equivalent(2.0)

Token, else false. The

true

Token and Argument canbe of different

x = 2.equivalent(2L)

types. Supported types

true

are int, long, double, or

x = 2.equivalent("2")

string.

true

Exponential function(e^argument) complexcase:

x = exp(-1)= 0.367

Floor function, which is thefloor
doubleReturn Type: double

largest (closest to positive
infinity) value not greaterthan the argument that is

x = floor(2.4)= 2.0

an integer.
gaussian
double, double / double, double, int,
/ double, double, int, int
Return Type: double / {double} /[double]imag
complex
Return Type: double
isInfinite
doubleReturn Type: boolean
isNaN
doubleReturn Type: boolean

Reference Guide

One or more Gaussian
random variables with thespecified mean andstandard deviation.
Imaginary partReturn true if the argument
is infinite

x = gaussian(4.0,2.5)= 7.6282997399571
x = imag(1.0+2.0i)= 2.0
x = isInfinite(2.0)= falseReturn true if the argument
is "not a number"- 191 Mirabilis Design Inc

x = isNaN(1.0)= false

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log
double / complex
Return Type: double / complex

Natural logarithm complex
x = log(1.5)= 0.405

case:

log10
doubleReturn Type: double

Log base 10

log2
doubleReturn Type: double

Log base 2

max
double, double/int, int/long,
long/unsignedByte,
unsignedByte/{double}/{int}/{long}/{unsignedByte}
Return Type: double / int / long /unsignedByte
mindouble, double/int, int/ long,
long/unsignedByte,
unsignedByte/{double}/ {int}/{long}/{unsignedByte}
Return Type: double/int/
long/unsignedByte
pow
double, double/complex, complex
Return Type: double/complex
randomno arguments/int/int, int
Return Type: double/{double}/[double]
real
complex
Return Type: double

Reference Guide

Maximum

Minimum

First argument to the powerof the second
One or more random
numbers between 0.0 and
1.0Real part- 192 Mirabilis Design Inc

x = log10(1.5)= 0.176x = log2(1.5)= 0.584a = {2L,3L,1L,5L,2L,4L}
x = max(a)= 5L

a = {2.0,3.0,1.0,5.0,4.0}
x = min(a)= 1.0

x = pow(3,2)= 9.0

x = random()= 0.4649
x = random(1)= {0.646}

x = real(3.0+5.0i)= 3.0

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remainder
double, double
Return Type: double

Remainder after division,according to the IEEE 754
floating-point standard

x = remainder(9,2)= 1.0Round to the nearest long,choosing the next greater
integer when exactly inbetween, and throwing an
rounddoubleReturn Type: longexception if out of range. If

x = round(1.6)= 2L

the argument is NaN, theresult is 0L. If the argument
is out of range, the result iseither MaxLong / MinLong,
depending on the sign.
Round to the nearest int,choosing the next greater
integer when exactly inbetween, and throwing anroundToInt
doubleReturn Type: int

exception if out of range. If
the argument is NaN, thex = roundToInt(1.4)=1result is 0. If the argument
is out of range, the result iseither MaxInt / MinInt,
depending on the sign.

sgn
doubleReturn Type: int

sqrt
double/complex
Return Type: double/complex
Reference Guide-1 if the argument isnegative, 1 otherwise

x = sgn(-9)= -1
x = sgn(9)=1Square root. If theargument is double withvalue less than zero, then
- 193 Mirabilis Design Inc

x = sqrt(9)=32003-2022

the result is NaN. complex
case:
toDegrees
doubleReturn Type: double

Convert radians to degrees

toRadians
doubleReturn Type: double

Convert degrees to radians

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x = toDegrees(3.0)= 171.88

x = toRadians(1)= 0.0174

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22 Accelerating Model Simulation Performance
Models in VisualSim can be developed in three ways:
1. You can make the model very verbose. This means that you build the model with many
blocks. This allows the user to understand the flows, debugging based on functionality andalso for transferring a specification to other team members. This model can have many realtime viewers. This model is not expected to be very fast and speed is not a consideration
here. This model is also very quick to develop because all the library blocks are available.
2. Simulation depends greatly on the number of blocks in a model. You can reduce the numberof blocks by creating the functionality using Script. These models take much longer todevelop because every line has to be analyzed with the profiler to get maximum performanceout of the design.
3. Another way to build the model is to use Java or C++ code. Java code is preferred because all
the same functions from the GUI are available from the code. C++ is preferred for areas
where there is no timing, just functionality.
Below are recommendations to accelerate an existing model.
1. Minimize the number of simulation time events, which can take the form of scheduled eventsin schedulers or Script block WAIT() or TIMEQ() functions. This has the biggest impact on
performance.
2. Minimize the number of blocks, which minimizes the number of port to port events. These
events are approximately 60% faster than simulation time events.
3. Reduce the size of the Data Structure by eliminating non-required fields. The number of fields
have a direct correlation to simulation. When the data structure is modified or routed tomultiple destinations they need to be modified. This has to be done for every transaction andwill slowdown the simulation. This problem is very specific to the “ExpressionList”, and Script
blocks.
4. In the case of processor designs, storing the large instruction array (data structure field 500 to5000) in a global variable reduces duplication of large arrays. This is faster than appending to
the main data structure.
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5. Minimize the number of ports added to key blocks. Internally, the simulator must search eachport multiple times to determine which ports have tokens.
6. If one knows that the fields have not changed in the Data Structure being passed through themodel, then one can add a parameter to the Script called Duplicate_Input, and set it to false.
This does not duplicate the incoming Data Structure and improves performance.
7. If one knows the fields have not changed in the Data Structure being passed through themodel, then one can add an argument to the Script SEND (output, MyToken, no_dup)
function, and it does not duplicate the outgoing Data Structure.
8. In the Script, minimizing the number of statements improves overall performance. Also, thetype of statement has an impact. For example, Boolean decisions are faster than statements.
9. In the Script, use of events to trigger the next activity or to initiate an acknowledgment. This isfaster than input port processing of a block. If the event arrives via EVENT() before executing
WAIT(“MyEvent”) or TIMEQ(“MyEvent”) executes, this results in 10X faster performance forthis function alone.
10. User can add Profile_File parameter to the Script to see exactly how long a statement takes to
execute to further refine the logic, flow. One can see the average time for each instruction,and the number of times it was executed. This can also be used for code coverage
investigations.
11. In the Script, consider use of the CLOCK() event, which is like an EVENT(), except the event
is only issued if the referenced WAIT() or TIMEQ() has a data structure waiting. Think of thisas issuing a clock only if the register equivalent WAIT() or TIMEQ() has some data to beprocessed. It is a selective event, and improves performance as it does not process nonexisting data.

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23 Pause and Resume function with Debugging facility
VisualSim Architect has a debugging and step simulation facility that allows users to specify timestamps to pause simulation and enables the user to save the simulation data and restart from thattime stamp even after closing the tool. This feature enables the user to save the simulation data
every day or every time they close the software when they have to run large simulation models fordays. This eliminates the requirement of running simulation continuously till the simulation end
point is reached.
The pause and resume functions can also be used for debugging facility as well. User can pause
for a given timestamp and analyze the system response and continue simulation step by step.
The system can be analyzed for required functionality and also helps the designer to identify if the
crucial tasks are being executed in the given timing deadlines.

23.1

How to Use Pause and Resume Function

Current version supports models with SystemResource, Servers, Queues, and Script.
Make sure you have the file PauseSimulationAt.txt in the same directory, this file must have thetimestamps for pausing simulation, example 10e-6.

23.2

Steps:

1. Run Simulation by clicking the green arrow button in tool bar or press CTRL+R.
2. Pause Simulation by clicking the Pause button in tool bar
3. Click on Save As.
4. Select the check box “Save Simulation Data”.
5. Give Name for the model with .xml extension.
6. Click on Ok.
7. .bin file is created in the same directory and this file has the Simulation data.
8. Close VisualSim Architect.
9. Start VisualSim Architect.
10. Open the .xml file saved in the previous step.
11. Model starts running from the time stamp where it was stopped. The Model runs till it
reaches the next time stamp for pause.

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24 Data Types
24.1

Scalar and Numerical Valueso Numerical values without decimal points, such as "10" or "-3" are integers of type int.
o Numerical values with decimal points, such as "10.0" or "3.14159" are of type double.
o Numerical values without decimal points followed by the character "l" (el) or "L" are oftype long.

o Unsigned integers followed by "µb" or "UB" are of type unsignedByte, as in "5µb". An
unsignedByte has a value between 0 and 255.
o Numbers of type int, long, or unsignedByte can be specified in decimal, octal orhexadecimal. Numbers beginning with a leading “0” are octal numbers. Numbers
beginning with a leading “0x” is hexadecimal numbers. For example, "012" and "0xA"
are both equal to the integer 10.
o A complex is defined by appending an "i" or a "j" to a double for the imaginary part. This
gives a purely imaginary complex number which can then leverage the polymorphic

operations in the Token classes to create a general complex number. Thus "2 + 3i"
results in the expected complex number. You can optionally write this as "2 + 3*i".
Scalar values use a 64 bit with 54 bits mantissa, 1 bit mantissa sign, 8 bits exponent and 1
bit exp sign. All numerical values are stored as tokens which contain the values, in theabove format, and the type. All math operations are done with full resolution. Basic mathfunctions are built into the token for simulation speed. For all other basic functions, Javamath and Java extended math are used. All other functions are custom built in the RegEx
language.

24.2

String Constants

Anything between double quotes, "...", is interpreted as a string constant. The built-in stringvalued constants are shown in the RegEx section of this document.
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24.3

ArraysArrays are specified with curly brackets, for example, "{1, 2, 3}" is an array of integer, while"{"x", "y", "z"}" is an array of string. The types are denoted "{int}" and "{string}" respectively. "{1,2, 3}" is a single-dimension array while "{{1, 2, 3},{4,5,6}}" is a multi-dimension array. An arrayis an ordered list of tokens of any type, with the only constraint being that the elements all havethe same type. If an array is given with mixed types, the expression evaluator attempts tolosslessly convert the elements to a common type. Thus, for example,{1, 2.3}

has value{1.0, 2.3}

Its type is {double}. The elements of the array can be given by expressions, as in the example"{2*pi, 3*pi}”. The elements of an array can be accessed as follows:>> {1.0, 2.3}(1)2.3

which yields 2.3.

Note that indexing begins at 0. All array operations are listed in the RegEx section.

Note
An array can be accessed by the name and index as follows:
Single-dimension:>> x = {1.0, 2.3}
{1.0, 2.3}>> x(0)
1.0

Multi-dimension:
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>> a = {{1,2,3},{4,5,6}}{{1, 2, 3}, {4, 5, 6}}>> a(0)(0)1Arithmetic operations on arrays are carried out element-by-element, as shown by thefollowing examples:>> {1, 2}*{2, 2}{2, 4}>> {1, 2}+{2, 2}{3, 4}>> {1, 2}-{2, 2}{-1, 0}>> {1, 2}^2
{1, 4}>> {1, 2}%{2, 2}{1, 0}An array can be checked for equality with another array as follows:>> {1, 2}=={2, 2}

false>> {1, 2}!={2, 2}

true

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For other comparisons of arrays, use compare() function. As with scalars, testing for equality
using the == or != operators tests the values, independent of type. For example,>> {1, 2}=={1.0, 2.0}
true

You can extract a subarray by invoking subarray() method as follows:>> {1, 2, 3, 4}.subarray(2, 2){3, 4}

The first argument is the starting index of the subarray and the second argument is the length.
You can also extract non-contiguous elements from an array using extract() method. Thismethod has two forms:
1. The first form takes a boolean array of the same length as the original array whichindicates which elements to extract, as in the following example:>> {"red","green","blue"}.extract({true,false,true}){"red", "blue"}

2. The second form takes an array of integers giving the indices to extract, as in thefollowing example:>> {"red","green","blue"}.extract({2,0,1,1}){"blue", "red", "green", "green"}
To add an additional item to the array, you use the append function.
There are a few variations also available.
Single Array>> a = {1,2,3}{1, 2, 3}>> a = a.append(4){1, 2, 3, 4}
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Multi-dimension Array>> a = {{1,2,3},{4,5,6}}{{1, 2, 3}, {4, 5, 6}}>> a = append(a,7){{1, 2, 3, 7}, {4, 5, 6, 7}}>> a = a.append({7,8,9,10}){{1, 2, 3, 7}, {4, 5, 6, 7}, {7, 8, 9, 10}}
To search the array, you can use the find (returns an index) or search(list of values).

>> a = {true,false,false}{true, false, false}>> b = find(a){0}>> a = {1,2,3,4}{1, 2, 3, 4}>> x = find(a,2){1}Reference Guide- 202 Mirabilis Design Inc

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>> b = {{1,2,3},{4,5,6}}{{1, 2, 3}, {4, 5, 6}}>> x = find(b(1),4){0}>> a{1, 2, 3, 4}>> X=search(a, 3,1)
2

24.4

Matrices

In VisualSim, arrays are ordered as sets of tokens. VisualSim also supports matrices, which
are more specialized than arrays. They contain only certain primitive types, currently Boolean,complex, double, fixedpoint, int, and long. UnsignedByte matrices are not supported. Matrices
cannot contain arbitrary tokens, so they cannot, for example, contain matrices. They areintended for data intensive computations.
Matrices are specified with square brackets, using commas to separate row elements andsemicolons to separate rows. For example, "[1, 2, 3; 4, 5, 5+1]" gives a two by three integer
matrix (2 rows and 3 columns). Note that an array or matrix element can be given by an
expression. A row vector can be given as "[1, 2, 3]" and a column vector as "[1; 2; 3]". Some
MATLAB-style array constructors are supported. For example, "[1:2:9]" gives an array of odd
numbers from 1 to 9, and is equivalent to "[1, 3, 5, 7, 9]." Similarly, "[1:2:9; 2:2:10]" is equivalent
to "[1, 3, 5, 7, 9; 2, 4, 6, 8, 10]." In the syntax "[p:q:r]", p is the first element, q is the step between
elements, and r is an upper bound on the last element. That is, the matrix does not contain anelement larger than r. If a matrix with mixed types is specified, then the elements are converted
to a common type, if possible. Thus, for example, "[1.0, 1]" is equivalent to "[1.0, 1.0]," but "[1.0,Reference Guide- 203 Mirabilis Design Inc

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1L]" is illegal (because there is no common type to which both elements can be converted
losslessly).
Reference to elements of matrices have the form "matrix(n, m)" or "name(n, m)" where nameis the name of a matrix variable in scope, n is the row index, and m is the column index. Index
numbers start with zero, as in Java, not 1, as in MATLAB. For example,>> [1, 2; 3, 4](0,0)
1>> a = [1, 2; 3, 4][1, 2; 3, 4]>> a(1,1)
4

Matrix multiplication works as expected. For example, (as seen in the expression evaluator)>> [1, 2; 3, 4]*[2, 2; 2, 2][6, 6; 14, 14]

Of course, if the dimensions of the matrix do not match, then you get an error message. To doelement wise multiplication, use the multiplyElements() function. Matrix addition andsubtraction are element wise, as expected, but the division operator is not supported. Element
wise division can be accomplished with the divideElements() function, and multiplication bya matrix inverse can be accomplished using the inverse() function. A matrix can be raised
to an int or unsignedByte power, which is equivalent to multiplying it by itself some number oftimes. For instance,>> [3, 0; 0, 3]^3
[27, 0; 0, 27]

A matrix can also be multiplied or divided by a scalar, as follows:>> [3, 0; 0, 3]*3
[9, 0; 0, 9]
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A matrix can be added to a scalar. It can also be subtracted from a scalar, or have a scalar
subtracted from it. For instance,>> 1-[3, 0; 0, 3][-2, 1; 1, -2]

A matrix can be checked for equality with another matrix as follows:>> [3, 0; 0, 3]!=[3, 0; 0, 6]
true>> [3, 0; 0, 3]==[3, 0; 0, 3]
true

For other comparisons of matrices, use the compare() function. As with scalars, testing forequality using the == or != operators tests the values, independent of type. For example,>> [1, 2]==[1.0, 2.0]
true

To get type-specific equality tests, use the equals() method, as in the following examples:>> [1, 2].equals([1.0, 2.0])
false>> [1.0, 2.0].equals([1.0, 2.0])
true
>>


CautionExpressionList and Script blocks do not support the assignment of values to amatrix. You cannot have an existing matrix on the LHS of an expression.

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24.5

Data Structure or Transaction or Record Token

A Data Structure is a class type containing named fields and associated value. The value ofeach field can have a distinct type. Data Structures are delimited by curly braces, with eachfield given a name. For example, "{a=1, b="foo"}" is a data structure with two fields, named "a"and "b", with values 1 (an integer) and "foo" (a string), respectively. The value of a field can be
an arbitrary expression, and data structures can be nested (a field of A data structure may be
A data structure).
Fields may be accessed using the period operator. For example,{a=1,b=2}.ayields 1. You can optionally write this as if it were a method call:{a=1,b=2}.a()The arithmetic operators +, -, *, /, and % can be applied to data structures. If the data structures
do not have identical fields, then the operator is applied only to the fields that match, and theresult contains only the fields that match. Thus, for example,{foodCost=40, hotelCost=100} + {foodCost=20, taxiCost=20}

yields the result{foodCost=60}

You can think of an operation as a set intersection, where the operation specifies how to merge
the values of the intersecting fields. You can also form an intersection without applying an
operation. In this case, using the intersect() function, you form a data structure that has only
the common fields of two specified data structures, with the values taken from the first data
structure. For example,>> intersect({a=1, c=2}, {a=3, b=4}){a=1}

Data structures can be joined (think of a set union) without any operation being applied by using
the merge() function. This function takes two arguments, both of which are data structures. If
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the two data structures have common fields, then the field value from the first data structure isused. For example,
merge({a=1, b=2}, {a=3, c=3})

yields the result {a=1, b=2, c=3}.
Data structures can be compared, as in the following examples:>> {a=1, b=2}!={a=1, b=2}
false>> {a=1, b=2}!={a=1, c=2}
true

Note that two data structures are equal only if they have the same field labels and the values
match. As with scalars, the values match irrespective of type. For example:>> {a=1, b=2}=={a=1.0, b=2.0+0.0i}
true

The order of the fields is irrelevant. Hence>> {a=1, b=2}=={b=2, a=1}
true

Moreover, data structure fields are reported in alphabetical order, irrespective of the order inwhich they are defined. For example,>> {b=2, a=1}
{a=1, b=2}

To get type-specific equality tests, use the equals() method, as in the following examples:>> {a=1, b=2}.equals({a=1.0, b=2.0+0.0i})false>> {a=1, b=2}.equals({b=2, a=1})
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true
>>

24.6

Invoking Methods

Every element and sub-expression in an expression represents an instance of the Token classin VisualSim (or more likely, a class derived from Token). The expression language supports
invocation of any method of a given token, as long as the arguments of the method are of type
Token and the return type is Token (or a class derived from Token, or something that theexpression parser can easily convert to a token, such as a string, double, int, and so on.). The
syntax for this is (token).methodName(args), where methodName is the name of the method
and args is a comma-separated set of arguments. Each argument can itself be an expression.
Note that the parentheses around the token are not required, but might be useful for clarity. As
an example, the Array Token and Data Structure classes have a length() method, illustrated by
the following examples:{1, 2, 3}.length(){a=1, b=2, c=3}.length()each of which returns the integer 3.
The MatrixToken classes have three particularly useful methods, illustrated in the following
examples:[1, 2; 3, 4; 5, 6].getRowCount()which returns 3, and[1, 2; 3, 4; 5, 6].getColumnCount()which returns 2, and[1, 2; 3, 4; 5, 6].toArray()which returns {1, 2, 3, 4, 5, 6}. The latter function can be particularly useful for creating arrays
using MATLAB-style syntax. For example, to obtain an array with the integers from 1 to 100,
you can enter:
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[1:1:5].toArray()>>{1,2,3,4,5}[1:2:5].toArray()>> {1, 3, 5}

Defining Functions

24.7

The expression language supports definition of functions. The syntax is:function(arg1:Type, arg2:Type...)function bodywhere "function" is the keyword for defining a function. The type of an argument can be left
unspecified, in which case the expression language attempts to infer it. The function body gives
an expression that defines the return value of the function. The return type is always inferred
based on the argument type and the expression. For example:
function(x:double) x*5.0

defines a function that takes a double argument, multiplies it by 5.0, and returns a double. The
return value of the above expression is the function itself. Thus, for example, the expression
evaluator yields:>> function(x:double) x*5.0(function(x:double) (x*5.0))>>

To apply the function to an argument, simply do>> (function(x:double) x*5.0) (10.0)
50.0>>

Alternatively, in the expression evaluator, you can assign the function to a variable, and thenuse the variable name to apply the function. For example,
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>> f = function(x:double) x*5.0(function(x:double) (x*5.0))>> f(10)50.0>>

Functions can be passed as arguments to certain "higher-order functions" that have been
defined. For example, the iterate() function takes three arguments, a function, an integer, andan initial value to apply the function. It applies the function first to the initial value, then to theresult of the application, and finally to that result, collecting the results into an array whose
length is given by the second argument. For example, to get an array whose values are
multiples of 3, try>> iterate(function(x:int) x+3, 5, 0){0, 3, 6, 9, 12}

The function given as an argument simply adds three to its argument. The result is the specified
initial value (0) followed by the result of applying the function once to that initial value, thentwice, then three times, and so on.
Another useful higher-order function is the map() function. This one takes a function and anarray as arguments, and simply applies the function to each element of the array to construct
a result array. For example,>> map(function(x:int) x+3, {0, 2, 3}){3, 5, 6}

A typical use of functions in a VisualSim model is to define a parameter in a model whose value
is a function. Suppose that the parameter named "f" has value "function(x:double) x*5.0". Then
within the scope of that parameter, the expression "f(10.0)" yields the result 50.0.
Functions can also be passed along connections in a VisualSim model. Consider the model
shown in figure.

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Figure 73.

Example of a function being passed from one actor toanother

The Const actor defines a function that simply squares the argument. Its output, therefore, is atoken with type function. That token is fed to the "f" input of the Expression actor. The
expression uses this function by applying it to the token provided on the "y" input. That token,
in turn, is supplied by the Ramp block, so the result is the curve shown in the plot on the right.
A more elaborate use is shown in the following figure:

Figure 74.

Elaborate use

The Const actor produces a function, which is then used by the Expression actor to create newfunction, which is finally used by Expression2 to perform a calculation. The calculation
performed here adds the output of the Ramp to the square of the output of the Ramp.
Functions can be recursive, as illustrated by the following (rather arcane) example:
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>> fact = function(x:int,f:(function(x,f) int)) (x<1?1:x*f(x-1,f))(function(x:int, f:function(a0:general, a1:general) int)(x<1)?1:(x*f((x-1), f)))>> factorial = function(x:int) fact(x,fact)(function(x:int) (function(x:int, f:function(a0:general,

a1:general) int) (x<1)?1:(x*f((x-1), f)))(x, (function(x:int,

f:function(a0:general, a1:general) int) (x<1)?1:(x*f((x-1), f)))))>> map(factorial, [1:1:5].toArray()){1, 2, 6, 24, 120}>>

The first expression defines a function named "fact" that takes a function as an argument, andif the argument is greater than or equal to 1, uses that function recursively. The second
expression defines a new function "factorial" using "fact." The final command applies thefactorial function to an array to compute factorials.

24.8

Fixed Point Numbers

VisualSim includes a preliminary fixed point data type. We represent a fixed point value in theexpression language using the following format:
fix(value, totalBits, integerBits)Thus, a fixed point value of 5.375 that uses 8 bit precision of which 4 bits are used to represent
the (signed) integer part can be represented as:fix(5.375, 8, 4)

The value can also be a matrix of doubles. The values are rounded, yielding the nearest value
representable with the specified precision. If the value to represent is out of range, then it issaturated, meaning that the maximum or minimum fixed point value is returned, depending on
the sign of the specified value. For example,
fix(5.375, 8, 3)
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yields 3.968758, the maximum value possible with (8/3) precision.
In addition to the fix() function, the expression language offers a quantize() function. The
arguments are the same as those of the fix() function, but the return type is a DoubleToken or
DoubleMatrixToken instead of a FixToken or FixMatrixToken. This function can therefore beused to quantize double-precision values without ever explicitly working with the fixed-point
representation.
To make the FixToken accessible within the expression language, the following functions areavailable:
To create a single FixPoint Token using the expression language:fix(5.34, 10, 4)This creates a FixToken. In this case, we try to fit the number 5.34 into a 10 bit representation
with 4 bits used in the integer part. This may lead to quantization errors. By default the round
quantizer is used.
To create a Matrix with FixPoint values using the expression language:fix([ -.040609, -.001628, .17853 ], 10, 2)This creates a FixMatrixToken with 1 row and 3 columns, in which each element is a FixPoint
value with precision (10/2). The resulting FixMatrixToken tries to fit each element of the given
double matrix into a 10 bit representation with 2 bits used for the integer part. By default, theround quantizer is used.
To create a single DoubleToken, which is the quantized version of the double value given, use
the expression language:
quantize(5.34, 10, 4)This creates a DoubleToken. The resulting DoubleToken contains the double value obtainedby fitting the number 5.34 into a 10 bit representation with 4 bits used in the integer part. This
may lead to quantization errors. By default the round quantizer is used.
To create a Matrix with doubles quantized to a particular precision using the expression
language:
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quantize([ -.040609, -.001628, .17853 ], 10, 2)This creates a DoubleMatrixToken with 1 row and 3 columns. The elements of the token are
obtained by fitting the given matrix elements into a 10 bit representation with 2 bits used for the
integer part. Instead of being a fixed point value, the values are converted back to their double
representation and by default the round quantizer is used.

24.9

Special Functions

Few functions have sufficiently subtle properties that require further explanation. That
explanation is here.
eval()The built-in function eval()evaluates a string as an expression in the expression language. For
example,eval("[1.0, 2.0; 3.0, 4.0]")

returns a matrix of doubles. The following combination can be used to read parameters froma file:eval(readFile("filename"))where the filename can be relative to the current working directory (where VisualSim wasstarted, as reported by the property user.dir). The user's home directory (as reported by theproperty user.home), or the classpath, includes the directory tree in which VisualSim is
installed.

Note

If eval() is used in an expression, it is impossible for the type system to infer any
more specific output type than general. If you need the output type to be more
specific, then you need to cast the result of eval().

Note that if eval() is used in an expression, it is impossible for the type system to infer any more
specific output type than general. If you need the output type to be more specific, then you
need to cast the result of eval(). For example, to force it to type double:
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>> cast(double, eval("pi/2"))
1.5707963267949
traceEvaluation()

The traceEvaluation() function evaluates an expression given as a string, much like eval(), butinstead of reporting the result, reports exactly how the expression was evaluated. This can beused to debug expressions, particularly when the expression language is extended by users.

24.10

Distributions

VisualSim provides a large number of distributions as blocks and in the RegEx. The random
numbers generated can be arrays or single values. There are two types of RegEx random
distributions - Random and Gaussian.

To see the distribution seed, the user must have a top-level parameter called

Seed

Processing blocks have the model seed as the parameter of each block. Thesemodel_seed with value of seed(integer value). The Traffic block and the Basic
blocks do not use the model_seed parameter.

The RegEx distribution functions use a different seed for each run. To make each simulation
run have the same seed, the user must have a top-level parameter called model_seed. The
parameter value is seed (integer value). The Traffic and the Basic Processing blocks have themodel seed as the parameter of each block. These blocks do not use the model_seedparameter.
The functions random() and gaussian() return one or more random numbers. With minimum
number of arguments (zero or two, respectively), they return a single number. With one
additional argument, they return an array of the specified length. With a second additional
argument, they return a matrix with the specified number of rows and columns.
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The irand and rand have two arguments and return an integer and double value respectively.
There is also a random distribution associated with the integer token which can be used to
speed up the random number generation.
There is a key subtlety when using these functions in VisualSim. In particular; they areevaluated only when the expression within which they appear is evaluated. For example, if thevalue parameter of the Const block is set to "random()", then its output is a random constant,that is, it does not change on each firing. The same is true for parameter also. If the model seedis not set, the output changes on successive runs of the model. In contrast, if this is used in an
ExpressionList or Script block, then each firing triggers an evaluation of the expression, andconsequently results in a new random number.

24.11

property()

The property() function accesses system properties by name. Some possibly useful systemproperties are:o VisualSim.VS.dir: The directory in which VisualSim is installed.
o VisualSim.VS.dirAsURL: The directory in which VisualSim is installed, but represented
as an URL.
o user.dir: The current working directory, which is usually the directory in which thecurrent executable was started.

24.12

remainder()This function computes the remainder operation on two arguments as prescribed by the IEEE
754 standard, which is not the same as the modulo operation computed by the % operator. The
result of remainder(x, y) is (x-yn), where n is the integer closest to the exact value of x/y. If two
integers are equally close, then n is the integer that is even. This yields results that may besurprising, as indicated by the following examples:>> remainder(1,2)
1.0

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>> remainder(3,2)-1.0Compare this to>> 3%2
1which is different in two ways. The result numerically different and is of type int, whereas
remainder() always yields a result of type double.
If either argument is NaN, or the first argument is infinite, or the second argument is positive
zero or negative zero, then the result is NaN.
If the first argument is finite and the second argument is infinite, then the result is the same as
the first argument.

24.13

Power and Modulo

The ^ operator computes "to the power of" or exponentiation where the exponent can only be
an int or an unsignedByte.
The unsignedByte, int and long types can only represent integer numbers. Operations on thesetypes are integer operations, which can sometimes lead to unexpected results. For instance,
1/2 yields 0 if 1 and 2 are integers, whereas 1.0/2.0 yields 0.5. The exponentiation operator '^'when used with negative exponents can similarly yield unexpected results. For example, 2^-1
is 0 because the result is computed as 1/(2^1).
The % operation is a Modulo or Remainder Operation. The result is the remainder after
division. The sign of the result is the same as that of the dividend (the left argument).

>> 3.0 % 2.0
1.0>> -3.0 % 2.0
Example-1.0 >> -3.0 % -2.0

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-1.0>> 3.0 % -2.0
1.0
The magnitude of the result is always less than the magnitude of the divisor (the rightargument). Note that when this operator is used on doubles, the result is not the same as that
produced by the remainder() function. For instance,>> remainder(-3.0, 2.0)
1.0
The remainder() function calculates the IEEE 754 standard remainder operation. It uses arounding division rather than a truncating division, and hence the sign can be positive or
negative, depending on complicated rules. For example, counter intuitively,>> remainder(3.0, 2.0)
-1.0

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25 Modeling Languages
VisualSim offers a number of methods to construct the model. The fastest way is to use theblocks. Blocks are the components, probes and simulators used to assemble a model andinstrument the model for generating analysis output. The blocks provide the required modelingconcepts required to describe the system, generate traffic, generate statistics, and makedecisions. The Resources, Traffic and Statistics Generation are best built using blocks. The
behavior, algorithms and arbitration schemes can be described using ExpressionList blocks,
Script, or a commercial programming language such as Python, C, C++, SystemC and Verilog.
For the ExpressionList blocks and the Script, VisualSim provides an extensive collection ofmathematical, logical and custom functions called RegEx.

Figure 75.

VisualSim Modeling Languages

1. RegEx Expression: This is the underlying expression description language in
VisualSim engine. The Expression is used in Parameter definitions of all blocks and for
the Actions in the FSM. This language contains a large number of functions andmethods that are optimized for generating model information and for operating at

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extremely high performance. The RegEx can use parameters, variables, and data
structure fields. All data types are supported. There are four types of RegEx:
a. Operators: Mathematical, logical, DSP, trigonometric, and imaging functions.
b. Transaction if statement: (a > b)? value1: value2.
c. Methods: getBlockStatus(Queue,”copy”,1)d. Function: array.length()
2. Expression Blocks: The ExpressionList blocks use the RegEx in an Expression
containing a RHS and LHS. In this block, the variables and parameters are identified bytheir name. The data structure is identified by the port on which it arrived. So, the fieldof the data structure arriving on input1 is input1.field. These blocks can have any numberof input and output ports. All inputs have to arrive for the block to start executing thelines of expression. All lines of expressions are executed in sequence listed in the block
window. The block can send a value, data structure, field, variable or the result of an
expression on each port. The ExpressionList block can control whether a value must be
sent on an output using the condition. There are no restrictions on the number of values
and operands on each expression line.
3. DS Expression Language: This language is used in the Basic Processing blocks andare distinguished as the Yellow shaded. This is an easy-to-use subset of the RegEx.
There are fixed number of items in an expression line. The block can use theparameters, memories, and data structure fields. The number of input and output ports
are fixed. This block is best suited for a casual user. The expression describes Standard,
Mathematical, and Logical operations. The operations can be conducted on Scalar
Values, that is Integer, Doubles, and Long. There are a number of pre-defined casting
provided (no user intervention required) and certain specific function provided (likegetting time value, generating distributions and so on). The language does not allow forany extensions, no adding input/output ports and no Array processing (Add, subtractetc.) are allowed in these blocks. The DS Expression has a fixed format namely,(X=Y op Z) or ((X logic_op Z) && or || (A logic_op Z)
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4. Scripting (Script block): This is a C-like language that is fully integrated with theRegEx. There are three variations of the block - Script can handle timing,
Virtual_Machine_Untimed

is

a

high

performance

untimed

block

and

the

Smart_Controller is a subset used in conjunction with the Queue blocks.

Figure 76.

List of Application Interface Blocks

5. Custom C-Code: This block allows the user to import C/C++ code that has been
constructed to describe a behavior. The block can maintain state information duringruns, count cycles, and have multiple input and output ports. The block defines the codesource file and the expected input and return values. A wrapper code is generated tointegrate this code without modifying the source.
6. SystemC: This block allows the integration of SystemC, TLM 1.0, and TLM 2.0 blocks
into VisualSim. The block provides a graphical entry to integrate SystemC models andrun it in VisualSim. The SystemC simulator is shipped with VisualSim.
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7. Verilog: This provides a co-simulation with the commercial simulators such as
ModelSim. This block generates a VPI2.0 wrapper to integrate the two simulators
together. The block synchronizes time across the two simulator.
8. MatLab: This block allows the user to dynamically send functions and values to theexternal simulator and return with a result.
9. Python: This block allows the user to create a script and run it as part of a model.

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26 Data Structures Expression Language
The Data Structure expression is a simplified expression mechanism and is used by theStatement blocks. These include the:Statement
If_ElseIf_Else_Statement
Statement_Delay,
Statement_Switch
Statement_Select
While
Case_Switch
InsertSelect
The Expression can be of two types - One/Two variable or three variables. The spacing
between all variables and between operators is required. If the spacing is not correct between
the variable, errors are generated. The two options are just different ways of expressing thesame operations. This is along the lines of action statements in C programming.
The format can either be

X = Y op Z

or

X op = YThe Statement blocks can accept Data Structure Fields, Memories, Parameters, Numerical
Values, and String Constants.

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The Expression Language provides Arithmetic, Logical/Binary, and Statistical Operators. The
use of these different operators is shown in the Example Section below. The following tablesummarizes them:+, -, *, /sqrt (square-root)
Arithmetic^ (Power)% (Modulo)! (invert)&& (AND)|| (OR)== (equals)

Logical!= (Not equal)> (Greater than)< (Less than)& (AND)

Binary| (OR)# (XOR)

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~ (NOT)>> (Shift right)<< (Shift left)

irand (integer random)
rand (double random)
Statistical

Norm (normal distribution)
exp (exponential distribution)++ (Increment)--(Decrement)+= (add RHS to LHS)-= (Sub RHS from LHS)*= (LHS = LHS* RHS)

Combined op + =/= (LHS=LHS/RHS)%= (LHS= LHS Module RHS)&= (AND)|= (OR)~= (XOR)

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TNow is the current simulation time.
TReal() is the current wall clock in msec

Time Values
Can be used on the RHS only

TNano() is the last wall clock in nanosec.
TNanoDelta() is the difference of current
TNano and specific time in TNano
format. Eg: a = TNano(); b =TNanoDelta(a)TRealDelta() is the difference of current
TReal and specific time in TReal format.
Eg: a = TReal(); b = TRealDelta(a)26.1Format for the Statement Blocks

The format for the Statement blocks is as follows:

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Option 1

LHS: X Field

Assignment

Can contain a=

RHS: YCan contain,

RHS: Operation
Arithmetic:

RHS: ZCan contain,

field name of thevalues, Time,values, Time,

incoming data

parameter, fieldstructure orname of thevariable.

incoming data

& (AND), | (OR), ~incoming data

structure or(NOT), ! (invert),

structure orvariable.

‘xor’ (Exclusive OR)

variable.

+, -, *, /, 1/, %, ^parameter, field

Logical:name of the

Logical Shift:<<’, ‘<<=’, ‘>>’, ‘>>=’.
Data Types

Space isData Types

Space is required on

Data Types

supported:

required on

supported:either side of the

supported:

Integer, double,
Boolean, binary,long.

either sides of
the “=”.

Integer, double,“operator”.

Integer, double,

Boolean, binary,

Boolean, binary,

long.

long.

Notes:
1.

Data type casting is from right to left. The “Z” data type is converted to “Y” data type before

processing.

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LHS: X Field

Operation +RHS: Y

Assignment

Distributions:

Can contain a field name of
the incoming data structure

irand(lower, upper),=rand(lower, upper), exp(mean),or variable.

norm(mean, std dev).
Arithmetic:=, +=, -=, *=, /=, 1/=, %=,Can contain a field name of
the incoming data structure
or variable.

!, ^, sqrt, ~, &, |, xor
Logical:Integer, double, Boolean,binary and long.

Reference Guide

parameter, field name of theincoming data structure or‘&=’, ‘|=’, ‘~=’, ‘xor=’

Data Types supported:

Can contain, values, Time,Space is required oneither sides of the “=”.

- 228 Mirabilis Design Inc

variable.

Data Types supported:
Integer, double, Boolean,binary and long.

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27 Differences between Script and C Programming
The Script works like a function block in C programming or script. The simple logic
expressions use a C/C++ syntax. Following are few differences:
1. The ‘;’ is optional at the end of each line.
2. There must be only one operation per line. This can be an expression, LABEL(), or curly
brackets{ }.
3. Declaration are done by Name = value. The data type is polymorphic, meaning that thedata type is identified with the first incoming value.
4. Declarations can be anywhere in the code but must be before it is used in an expression
on the Left Hand Side (LHS).
5. SWITCH-CASE is all capital.
6. CASE has CASE: LABEL.
7. End of each CASE requires a GTO(LABEL).
8. The last CASE must be CASE: DEFAULT.
9. No pointers are supported and only a reference name for a variable is supported.
10. There must be at least one statement line between { and }.
11. Two { in sequence are not allowed. There must be at least one statement in between.

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28 Selecting the right block for your model
VisualSim has a number of library blocks. After you understand the operation of a block, you canapply it in many ways. We have created a table that provides guidance on the use of VisualSim.

28.1

Traffic Generation

ActionBlocksFixed Rate with fixed size

Traffic (Set Distribution to

For example, Sensor, I/O

Fixed)

Clock

Traffic (or) Clock

Packet-based network traffic

Transaction_Sequence (or)Variable data size

Single_Event +Example Model

TriggeredTraffic +ExpressionList (generate sizeand delay to next) + Delay inthe loop-back to start next
sequence
Multiple instance of any traffic

Dynamic Instantiation + (Anygeneration

combination of blocks inside)

Bursty traffic + periodic

Transaction_Sequenceinterval(Time_Field) + Delay in theloop-back to start new
sequence

Sequence of operations.

Transaction_Sequence

For example, Read, Write,(Time_Field) + Delay in theread, Readloop-back to start new

For example, 32, 64, 128, 256

sequence

Bytes
Custom Distribution

Transaction_Sequence(Time_ and Probability_Field)

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ActionBlocksExample Model+ Delay in the loop-back tostart new sequence
Custom Distribution withTransaction_Sequencevariable delay(Probability_Field) + Delay inthe loop-back to start next row

Trace- Network and hardware

Traffic_Reader

Use traffic generated from

File Reader

another model
Read from file and use theTransaction_Sequence

content for the delay between
transactions
Start a model execution

Single_Event

Read from csv/Excel file

Database,
Transaction_Sequence andExcel_to_DS

28.2

Variables

ActionBlocksExample Model

Constants or fixed values.

Parameter

Value needs to be changed
for each run and stays
constant in a single simulation
Register or variable

Variable

Flags for setting system

Variablecondition
For example, Resource
availability.

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ActionBlocksExample Model

Storing same states of

Variable (array type)multiple devices
For example, Queue length ofmulti-core.
Storing intermediate values

Data Structure field

associated with a specifictransaction
For example, Device trace.
For example, Time arrived at
a port or processor.
Attributes of a transaction

Data Structure field

For example, Data size,
priority, source, destination
Fragment number, last

Data Structure field

fragment indicator
Communication information

Variablefrom one part of the system toanother instantaneously
For example, Queue length of
an ingress port.
Send notification from one

Event (not a block)device to the next one
Trigger the sending of the

Event (not a block)next transaction based oncompletion of prior transaction

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28.3

Plotting

ActionBlocksExample Model

Latency

ExpessionList +TimeDataPlotter
For example, TNow –input.TIME as output value

Throughput

Variable- Increment eachcompleted size into a variablelocation
Display: ExpresionList +TextDisplay (end of sim)
Plotting: Trigger (Traffic) +ExpressionList +TimeDataPlotter

Read_Latency

ExpressionList +TimeDataPlotter
Probe at Source in returnpath.

Write_Latency

ExpressionList +TimeDataPlotter
If acknowledge required(A_Task_Flag==true), thenprobe at source, else probe atdestination (like DRAM)

Custom calculation plot

Variable (store results, can be(separate based on packet

a array) ExpressionList +size)

TimeDataPlotter (might needtrigger for regular output)

Timing Diagram

Reference Guide

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ActionBlocksExample Model

Processor, Cache, DRAM,
Linear_Bus, AHB, APB, PCI,
PCIx, CA_DRAM,
Memory_Controller, AXI
Extract fields to plot

ExpressionList block(output_values to specific field
like input.ID) +TimeDataPlotter

Two data sets against each

ExpressionList block (twootheroutput ports) + XYPlotter(Throughput vs. packet size)
Any dynamic variable

Variable + ExpressionList(update)Display: ExpressionList +TextDisplay (or)TimeDataPlotter

HistogramStatistics + Histogram(or)
Variable + ExpressionList +HistogramMultiple dataset from different

TimeDataPlotter or XYPlotter

blocks(each dataset comes from adifferent block or connected toa relation)

Multiple dataset from a single

DS_XYPlotter (for different x

block output

and y values) (or)DS_TimeDataPlotter (for yvalue vs. time)

Use data structure input but

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ActionBlocksExample Model

arriving from the same block

DS_TimeData (for y value vs.

output.

time)

Set specific color for each

DS_XYPlotter (for different x

dataset arriving from the same and y values) (or)block output.

DS_TimeDataPlotter (for yvalue vs. time)

28.4

Statistics

ActionBlock

Example Model

Generate statistics for custom

Statistics + TextDisplay (or)valuesStatistics + Histogram

Statistics for Server, QueueResourceStatistics +and SystemResource

TextDisplay

Hardware Blocks:

ArchitectureSetup

Processor, Cache, DRAM,(internal_stats_out,

Linear_bus, AHB, APB, PCI,

util_stats_out)

PCIx, DMA_Controller,(or)

Req_Ack_Node, CoreConnect

ArchitectureSetup(Statistics_to_plot parameter+ plots_out)- Must set thewidth of output link to thenumber of items to be plotted.
Use a Relation block (black
diamond) and double click on
the relation to set the width.

Other Hardware:

Connect blocks’ status port to

Rapid IO, Switch Ethernet,

TextDisplay

VME, 1553B

Set Sim_Time parameter toend time

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28.5

Power Statistics

ActionBlocksExample Model

Average PowerPowerTable (middle port) +TimeDataPlotter

Instant PowerPowerTable (top port) +TimeDataPlotter

State Change of each device

PowerTable (lower port) +TextDisplay

Power/device

Use RegEx powerManager
and Cumulative +TimeDataPlotter
Eg: A =
powerManager(“Manager_1”)
P = (A.Device).Cummulative

Bar graph of Power/device

RegEx powerManager andCummulative +TimeDataPlotter

Bar graph of power/Device as

RegEx powerManager, anda percentage(Cumulative/total
Cumulative)*100 for
Percentage + TimeDataPlotter

Check Deadline for task

For scheduler, (Time Finish –completion

Time Activation) >Task_Deadline

VCD output

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ActionBlocksWrite data structure for use

FileWriter

Example Model

later or in another model
Write to Excel

CSVWriter

Write to XML

DS_to_XML

Write to file any text display or Use the Save setting of the
plot

28.6

plotters

Resources and Hardware

ActionBlocksExample Model

DMA

Channel (statistical) (or)DMA + DMADatabase (or)DMA + ExpressionList

SwitchSwitch (or) SystemResource(Blocking) (or)Non_Blocking_Switch (or)Server (Non-blocking)Multi-core with a pool of cores

Server_N_Resource

for first come-first serve
Multi-core with assignment to

SystemResource (or) Server

specific coresMulti-core with selection ofGroup of SystemResource (or)first available

Server + RegEx Queue Name
+ “_Length” to find the first 0

Wireless/wired channels with

Channel + Channel_Complete

error detection and+ Database (error probability)

retransmission

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ActionBlocksExample Model

Wireless channels with errors

Channel + Channel_Complete

but no retransmission(all data sent to accept port
and rejected afterchannel_complete) (or) Server(rejected after block)

RTOS

SystemResorce (or) Queue +Smart_Controller (or) Server(Slot Mode)

Scheduling- First come-First

SystemResource or

Serve or Round Robin

SuystemResource_Extend

Scheduling- Any algorithm

Queue + Smart_Controller

Scheduling- Preemption

SystemResource

Memory allocation &DRAM (or)deallocation

CycleAccurateDRAM +Memory_Controller (or)Counter (Memory) +ExpressionList (to check foravailable memory) + Queue

Cache

Cache (or) IntegratedCache(or) Memory + ExpressionList(generate hit-ratio and see if it
is below a threshold)

Processor

Processor (See all Processor
examples in Block
Documentation for different
configurations) (or) Traffic (or)Traffic_Reader (Trace file
input) (or) SystemResource(or) Server (or) Computer
Model

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ActionBlocksExample Model

Thread Management

Queue + Smart_Controller (forcoordinating the threads)

Timer

ServerI/O and any form of interface

Traffic (or)Transaction_Sequence (or)Traffic_Reader (or)SystemResource

Multichannel I/O

Server_N_Resource (or)Server (or) Channel

Fiber Channel

Channel (or) FC_Switch

Disk

DRAM (or) use Disk Template

Flash

DRAM + Script (custom
controller) (or) Flash templateNon-blocking switch

Non_Blocking_Switch (or)ServerIngress/Egress Ports

Server (for known delay) (or)Queue + Smart_Controller (forcustom arbitration, with traffic
management) or
SystemResource (for single
port)

SATA

Queue + Smart_Controller

Arbiter/Scheduler

SystemResource (or) Queue +Smart_Controller

Manage resource quantity

Quantity_Based_Resourcewith intelligent data
organization on physicalmedia
Memory (or) Storage (or)Quantity_Based_Resource

Archive
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28.7

Utilities and Functions

ActionBlock

Example Model

Fragmenting

While (Requires field to
identify each fragment andanother field to denote lastfragment)

Defragment

ExpressionList (Look for lastfragment field)

Routing or path selection

Database (lookup or routing)Redirect or select a flow

Virtual Connection (IN, OUT,
Mux and Demux)

Goto

Virtual Connection (IN, OUT,
Mux and Demux)

Wait for control to send output

Boolean_Switch

Manage clock boundary

ClockAligntransition
Manage clock boundary

ClockAligntransition and do a calculation
before output

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29 Error messages
There are three types of errors in VisualSim.
1. The first is a Syntax Error which means that information in the block fields has beenentered incorrectly. VisualSim does not allow the user to continue until the error iscorrected.
2. The second is a Run-Time Error which is identified when the model starts executing.
These are the errors that require some basic understanding to detect.
a. Data Type Error: All blocks have ports that identify the data type at runtime. Some
block ports might be assigned a specific data type, typically Double or Boolean. If
a block is pre-assigned a fixed data type, this port type cannot be modified. The data
type for the port attached to it must be modified. The port type is modified by rightclicking the block and then selecting “Configure Port”. The Type can be modified
by selecting the appropriate data type from the list.
b. Channel not in range: This indicates that the input port listed requires to beconnected but is currently open. This port is a required port and must have an input
for the block to fire.
c. Null: This is typically the most difficult error to detect. If this occurs for the
Display_Fast (Buffered), then simply delete the block, and replace it with a new one.
If this is for any other block, this indicates that a port is not connected in the data
flow. Look at all the wires and identify the ones that are thin as opposed to fat. Thiswire will not be connected.
3. The third type of error is an activity in the model that causes an error. For example, thequeue may overflow due to the arrival rate being too high. This requires the queue depth
to be increased or the input rate to be reduced. These are design consideration errors.

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30 Model-level Debugging
VisualSim has a number of graphical and textual debugging built into the environment. In
addition, the user can attach third-party code-level debuggers to the environment debugging
block level details. You can easily debug your models in VisualSim by using a combination oftechniques. The easiest and fastest way to "see" what the model is doing in terms of block
execution is to use the visual animation through Model Animation. Next, one can find the Data
Structures being sent through the model, using the "Listen to Port" feature on any output port
in the model.
The key capability available includes:
o Listen to Port: All blocks including Class instances, except Hierarchical blocks, Rightclick on the port to select "Listen to Port". You have to click the inner-most point of theport to get the Menu.
o Listen to Block: All blocks, except Hierarchical blocks and Class instance, Right-clickon the block to select "Listen to Block". If you need to see the details of operation withina Hierarchical block, you need to select Open Block and select the block to view theexecution details. If you need to view the detailed operation of a Instantiated class, youneed to select Open Instance and select the block to view the execution details.
o Listen to Simulator: This feature provides a sequence of execution for the selected

simulation. This is also integrated with the Digital Debugging utility in the Digital
simulator. This window displays the usage statistics, current block execution, and modelsummary information. From the Debug Menu, select "Listen to Simulator" and selectthe debugging option in Digital simulator parameter “digitalDebugger”.

o Animated Debugging: Animate the model by selecting Debug >"Animate Execution"and specifying a time in ms. Select "Stop Animation" to bring the model execution backto the regular mode.
o Breakpoints: The model can be stopped by setting a Breakpoint on a block by rightclicking the block and select "Set Breakpoint". Refer 40.12 Setting Breakpoints.

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o ShowTypes: Drag and drop this block to see the individual port types. If the port typemis matches, error is generated. This block helps in indentifying the non native

connection of ports.

30.1

Model Animation

You can animate block diagrams to debug your simulation or simply to view the dynamic
operation of the system model. VisualSim animates a model by highlighting the executing block,based on the 'Debug/Animate Execution' time setting (msec). One can also turn off animationby using the main menu bar 'Debug/Stop Animating'. The figure below illustrates
Statement_Select Block is currently firing with animation enabled.

Figure 77.

Model Animation

The animation can be paused. At that point, either you can start the simulation, stop the animation
or start other debugging operations.

30.2

Display and Statistics

Operation: Select the display block from the Library palette. Drag the block onto the canvas.
Connect the block to the input and output as required in the model.
Explanation: Display, and statistics are provided as extract information from the model during
simulation. These blocks can embedded in the simulation model during construction. These
entities will extract the appropriate fields in the data structure or the entire object and display
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them. The change in these values can be viewed while the simulation is being executed.
Moreover, all the SmartBlocks have built-in statistics gathering.

30.3

Listen to Simulator

Operation: In the menu of the Simulation Cockpit, select the Listen to Manager and Listen
to Simulator under Debug menu.
Explanation: The internal operations of each block and the model, itself, can be viewed byturning on the “Listen to Simulator”. The Listen to Manager records the activities at thesimulation kernel level. This records the specific models that are fired and kernel activities for
total debugging.

30.4

Listen to Port

"Listen to Port" can be enabled in the Block Diagram Editor, simply by right-mouse clicking
over the desired port. Listen to Port then opens a separate window, identifying the output port
location in the top bar of each window. You can open as many "Listen to Port" windows asneeded to monitor a simulation. After the simulation is started, each Token passing through aport is displayed in "Listen to Port" window. If the Token type is IntToken, DoubleToken or
BooleanToken, then one sees the value. If the Token type is RecordToken or StringToken, then
one sees either a simple string, or the Data Structure in an Array. If there is no output on the"Listen to Port" window, make sure the right port was selected, or alternatively this indicatesthat the model did not generate any output from this block. If there is no output, then one needs
to check the ports, or virtual connections, driving this block to see that they are being activatedcorrectly. If the ports driving the block seem to be correct, then experiment with "Listen to Block"on that block.

30.5

Listen to Block"Listen to Block" can be enabled in the Block Diagram Editor, simply by right-mouse clicking
the desired block. "Listen to Block" provides more insight into the internal block operation, andmay explain why an expected output port did not fire as anticipated. For example, if one is using
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If_Else Block, and a Data Structure did not appear on the "true" output, then one can view the"If-else" decisions being made internally, simply by performing "Listen to Block". In addition toblock level information, "Listen to Block" provides simulator level information relative tomethods being fired, and so on. Simulator information is probably most useful for evaluating
your custom blocks in the simulation environment.
This feature is not available for Hierarchical and instantiated hierarchical class blocks. If you
need to see the details of operation within a Hierarchical block, you need to Open Block andselect the block to view the execution details. If you need to view the detailed operation of a
Instantiated class, you need to select Open Instance and select the block to view the execution
details.

30.6

Script Profiler for the Script block and Smart Controller

The Script Profiler is embedded in the block execution and keeps track of the number of times
a statement executes and also the average time the statement took to execute down to thenano-second level. This feature provides all users with the detailed execution information about
their script. In addition, it provides the script address, and the script statement associated withthat address. If the number of times executed equals 0, then this provides feedback on whethera certain function is even executed. This may be useful information, sometimes referred to ascode coverage in lower level verification testing.
Profile_File: The Script Profiler can be turned on by adding a parameter to the Script andSmart_Controller block called “Profile_File”. This identifies the name of the file to be generated
by the profiler. If the parameter does not exist, or is set to “none”, then the Script Profiler isturned off. A typical Profile_File, Block_Name + “_Profiler.txt”.
Path:One can place the entire path in “Profile_File” variable, or add the “Path” variable. A
typical path, “C:/VisualSim/Profiles”. If just a file name is used then the file will created under
VS_AR.

30.7

Listen to File for Script block and Smart Controller

The Listen to File is a text based version of listen to block.
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Listen_to_File: The Listen to File can be turned on by adding a parameter to the Script andSmart_Controller block called “Listen_to_File”. This identifies the name of the file to begenerated. If the parameter does not exist, or is set to “none”, then Listen to File is turned off.
A typical Listen_to_File value is Block_Name + “_Listen_to_File.txt”.
Path: One can place the entire path in “Listen_to_File” variable, or add the “Path” variable. A
typical path is “C:/VisualSim/Listen_to_Files”.

30.8

Debugging Variable

There are two blocks - Variable_Dump and Variable_Monitor Block for viewing variable
content. Variable_Dump can generate the value in a variable location when triggered on the
input port. The variable name is specified in the parameter and can be a location or thecomplete list of global, local or block variable. If the default is retained, the complete list of all
variables is printed out. The Variable_Monitor Block can monitor individual variables by nameor by triggering the input port of this block. One can list "all" variable names, to get values onan output port, each time it is triggered. The Variable_Monitor Block has a parameter entry that
one can enter a comma separated list of variable names to monitor as the simulation executes.
Each time the list of internal variable names are accessed, read or write, then it will generate a
trace Data Structure on its output. The primary difference between the blocks is that the
Variable_Dump requires a trigger to generate the variable values while Variable_Monitor will
generate the values every time variable is accessed.
One might also use the Read_Variable Block. Each Data Structure triggered on the input gives
the current value of the named-variable on its output. You can also have multiple
Read_Variable Blocks in the model to read the same variable location. One could "Listen toPort" on the output of Read_Variable to see the variable values as the simulation runs.

Read_Variable block is in Model >Variables.
Finally, one might use the IN Block, then you can trigger from any number of OUT blocks within
the model, which triggers the IN Block (assumes OUT and IN names match and of same type
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(local or global)). When the IN Block is triggered it reads the variable parameter name entered(local or global) and sends to its output. Though this block was created for easier plotting, itworks equally well for variable monitoring. IN Block can perform conversions, such as integer
to double.

IN is in Defining Flow -> IN.

30.9

Debugging a New ModelIf you are debugging a new model, then there are some things you can do while still constructing
the model:•

Workload Generator -- After adding the workload generator, or trace file that generates
composite Data Structures, it might be helpful to test that this portion of the model isgenerating the necessary workload, using "Listen to Port", or adding a Text_Display Block.
This save time later, when more behavioral and architectural blocks are in the model.

•

Hierarchical Block -- For each hierarchical block used in the model, it might be useful to
debug each hierarchical block before adding it to the top level model. To debug ahierarchical block, one needs to add a Digital Simulator to the block, possibly disconnect
input and output ports of the block, and add a simple traffic generator to test thefunctionality of the blocks. After debug is completed on the hierarchical block, then one
needs to remove the Digital Simulator, reconnect the external input and output ports, touse it in the top level system model.
After the top-level system model is constructed that is items (1) and (2) are completed,then one can begin to look at the following items:•

Data Structure Flow – The Traffic blocks generate the data structure. To check thecorrectness of the field values, use "Listen to Port", "Listen to Block", or add Display Blockat the output of a block.

•

Behavioral, Architectural Processing -- Now begin to focus on the functionality of the
behavioral aspects of the model, the state machines (if any), algorithm validity, and so on.
A behavioral portion of a model typically has pure function associated with it, and nodelays. To check out the behavioral portion, one can use "Listen to Port", "Listen to Block",

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or TextDisplay Block to check the Data Structure flow within state machines, protocol, or
algorithms. The architectural aspects of the model can be debugged in terms of Data
Structure flow, similar to the behavioral debugging. An architectural portion of a model
typically has architectural delay.

VisualSim has a number of debugger features and methodology that simplifies model
development and refinement.

30.10

Digital Debugging

This is a graphical editor version of the popular textual debuggers. In the Digital Simulationmode, users can get model summary, the firing order of the blocks and perform step-by-stepevaluation of the model. To enable this feature, select Pause, Summary_Only or Run in the
Digital Simulator icon. If the top-level simulator is enabled, all lower-level simulators must be
set to Off.
The debug mode can be triggered when the "DigitalDebuggingExpr" parameter evaluates totrue. This parameter is a condition and can contain any RegEx function. You can use keywords
such as TNow, RegEx functions such as "getBlockStatus", global and local (requires the
Window name.variable_name) memories and number accesses to a block name.
To view the debugging activity, select Listen to Simulator in Debug menu at the current or
top-level. The debugging can be turned on at the top-level to view activity for the entire modelor can be done at any Hierarchical window.
When the expression evaluates to false, the model continues running as before.
Note: To stop the simulation, while debugging, you need to press Stop and Play/Go twice.
The debugger parameters are:o Off: This disables the debugging mode and is recommended when the model is runningin batch mode or when running interactive simulation of a complete model.

o Pause: This turns on the debugger to stop at every block in the model flow. The GO
button must be selected to continue the simulation after the model stops at each block.

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Use Listen to Simulator to determine which block is currently being fired. This provides
a model summary at the end of the simulation (see Summary_Only).
o Summary_Only: At the end of the simulation, this generates a list of all the blocks inthis Hierarchy. For each block, the output shows the number of times the block was
fired, the average execution time for each firing, and the total time spent in that block. It
also lists all blocks that are not used in the model. Some blocks do not get fired by aport. These will show in the inactive list. Example of these blocks are IN, OUT,

SystemResource, and Init_variable.
o Run: This mode outputs the order in which each block is fired in the model. This provides

a model summary at the end of the simulation (see Summary_Only). This does not stop
the simulation at every block.

30.11
30.11.1

Setting Breakpoints
Set Breakpoints context menu choice

The context menu for actors includes a "Set Breakpoints" menu choice.
"Set Breakpoints" is currently only implemented for the Digital and SDF domain. "before iterate"and "after iterate" work with SDF. In the case of the Digital Simulator, you can “Stop on Entry
to Block” or “Stop before Executing Timed Activity”. After the simulation stops at a breakpoint,
you can unselect the breakpoint choice.
The Set Breakpoints facility stops the model at a specific point in a specific actor. This is
helpful if there are multiple instances of an actor within a model.
⇒ Start ModelBuilder from within a debugger⇒ Open an SDF model
Warning: Save your model before running with breakpoints set because saving in the middle
of a debugging session may not work.
⇒ Right click an actor in an SDF model, select Set Breakpoints > before iterate.
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⇒ Run the model.
⇒ The model stops when it hits the breakpoint.
A message appears in the status bar at the bottom of the ModelBuilder graph display.
The actor with the breakpoint is highlighted in magenta.
⇒ Click Run again to continue execution.

30.12

Pause and Resume function with Debugging facility

Pause and Resume function is a debugging and step simulation facility that allows users tospecify time stamps to pause simulation and save the simulation data, events and status in a file.
The saved model can be restarted from that simulation time. This feature is handy to debug
simulations that run for a large period of time. Moreover the user can analyze system behavior atvarious points in the simulation.
The pause and resume function can also be used for debugging. User can pause at a timestamp
and analyze the system response and continue simulation step by step from that point onwards.
The system can be analyzed for required functionality and also helps the designer to identify if the
crucial tasks are being executed within the deadlines.

30.12.1

How to Use Pause and Resume Function

The latest version of Pause and Restart supports the following library blocks - SystemResource,
SystemResource_Extend, Server, Queue, Script, ExpressionList, Database, Delay, SingleEvent,
Smart Controller, Traffic and File Reader.
The PauseSimulationAt.txt file must be located in the same directory. This file contains thetimestamps at which the simulation activity needs to be saved.
Note: The simulation pauses at the closest event after the time value in the PauseSimulationAt.txt
file. This means that the simulation may not stop at the exact timestamp.

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30.12.2

Steps:

Manual Mode
12. Save your current model.
13. Run Simulation by clicking the green arrow button in the tool bar or press CTRL+R.
14. Pause Simulation by clicking Pause button in tool bar.
15. Click Save As.
16. Select the check box “Save Simulation Data”.
17. Give Name for the model with .xml extension
18. Click Ok.
19. .bin file is created in the same directory and this file has the Simulation data.
20. Continue the simulation and repeat the above process to stop the simulation at additionaltimes.
To start the simulation at a specific point,
1. Open the saved file for that simulation point.
2. Model starts running from the time stamp where it was stopped.
3. The model runs to completion, if the PauseSimulationAt.txt file does not exist or the user
does not Pause the simulation.

30.13

Testing the RTL

Hardware designs are built to a specification. Due to Clock-based accuracy requirements and theneed to migrate the design components from specification to implementation, a VCD writer isprovided as a standard block in the library. This block can be used to generate vcd files and theresulting values can be used as the golden reference to validate the implementation. An example
is provided in VisualSim to show the application of this block in a real example. The generated
vcd file can be viewed by any standard waveform viewer. The generated file can support integer,
wire, register, and double.

30.14
30.14.1

How to Debug- Using the methodology provided
INTRODUCTION

Models constructed in VisualSim can help you make better design specification decisions.
Evaluations of system specification using VisualSim performance, power and architectural models
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can help eliminate clearly inferior choices, point out major problem areas, and evaluate a varietyof cost, performance and partitioning trade-offs. Simulation is cheaper and faster than building
hardware prototypes and can also help with software development, debugging, testing,documentation, and maintenance. This document will provide the information on how the models
are debugged. It also explains the various methods of debugging a model.
METHODS TO DEBUG
AnimateListen to Simulator
Listen to Port
Listen to Block
Tracer

30.14.2

AnimateWhen there is an error in the model we should identify where the error has occurred, so Animate
will help you to trace the path and to capture the block where the error has occurred.
To enable this feature
Go to Debug >> Animate Execution from the menu
Click OK
Then Run the modelNow you can notice the animation over the blocks which helps you to capture the error.

30.14.3

Listen To Simulator

Listen to Simulator will help you to get the detailed analysis on the model. It summarizes the firing
order of the block and performs step by step evaluation of the model.
To enable this feature
Go to Configure >> Digital Debugger >> Summary_only in the Digital Simulator
To view the debugging information, select Debug >> Listen to Simulator from the menu.
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Then run the model.
This will help you to view the summarized result of the model.

30.14.4

Listen To Port

Listen to Port will help you to find out the incoming/outgoing data of that particular port of theblock along with the time, which will be useful for identifying the missing data.
To enable this feature
Right click on the port and select Listen to Port
Then Run the model
The tokens that are sent/received are displayed.

30.14.5

Listen To Block

Listen to Block will help you to get the detailed analysis of the data present in the block at aparticular time. It also displays the input and output of that block along with the time. It is basicallyused for ExpressionList, Script, Smart Controller where it displays the result for each of thestatements.
To enable this feature
Right click on the block and select Listen to Block
Then Run the model
The tokens that are present in the block are displayed along with the input and output.

30.14.6

Tracer

The Tracer Block is similar to the Listen To Block feature. When the Tracer Block is instantiated in
the model, it captures the information of multiple scripts when they are executed and writes theminto a text file. It is used to check the communication between different scripts in the model andReference Guide- 253 Mirabilis Design Inc

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also the sequence of execution. It writes into a text file called VisualSimTraceLog.txt in .Visualsim
folder under user directory (for windows C:\Users typical user directory). In the Log file we could
see what happens when a data structure comes into each of the script blocks and how theexecution flows within. This makes debugging easy.

30.14.7

Difficulties in debugging any system and how it is different fromdebugging a regular piece Java or C/C++ code.
Software systems are complex and debugging is hard. This is especially true for embedded
systems where there may be real-time constraints on when data is received or sent, the timing ofinterrupts, and so on. This means that traditional techniques, such as breakpoints or changing tocode to print out state information, cannot be used because they will drastically change the timing
and therefore the behavior of the program. Program flow is often controlled by asynchronous andexternal events, for example inputs from touch sensors and other peripherals whereas while
debugging a java code it will be either a compile time error or a run time error.
Generally, these two scenarios are encountered:
Syntax error: Consists of grammatical errors or incorrect use of syntax in code.
Logical error: More difficult to rectify as it involves correcting logic in the code itself. The
program may still run with a logical error, it will not run with a syntax error though.
This can be fixed by means of traditional techniques such as breakpoints or changing to code toprint out state information.

30.14.8

Sequence for debugging

With the help of Display Stack Trace find out the error block.
The animate can also be used to track down the bug in the model so that we can find whichblock has to be modified.
Perform Listen to port/block at the particular block.
Check for the correct values in the fields
Check the expected order of execution.

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Debugging feature used
SCENARIO 1
Click on the Display Stack Trace and check where the error has occurred. Use the exaplanation
given int the error and update the changes. In some case the error message will have suggestion
to try on.
SCENARIO 2
Even if the model runs we will get some incorrect output so to rectify that we need to first animate
the model while running and then check whether it is traversing through all the blocks if not weneed to stop the process and make changes in the block by using Listen to Port/Block.

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31 Software Modeling
Software modeling for a target hardware platform is a complex process, one has to identify andrepresent the software component and their relationship with the each hardware devices.
VisualSim provides four ways to model the software without compromising the accuracy.

31.1

Task Graph Approach

The task graph method allows the user to define the sequence of operation with or without
dependent flows, where each operation assign the task to specific hardware resource in thedesign. This make sure the tasks are processed according to the software sequence that are
implemented using the mapper and system resource combination. The design can containhierarchical order of task graph to replicate the software flow and each task can be assigned
to particular resource or a resource in pool of hardwares. The designer can determine thecomplete flow, number of hardware component, and scheduling or dispatch of task toappropriate hardware unit. The following image shows an implementation of taskgraph based
processing where each operation sends request to the dispacter and the tasks are dispatched
to predefined hardware components according to the functions.

Figure 78. Task Graph Based Software modeling.

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31.2

Task Generator Approach

Task Generator method allows user to define the application programas a combination of
instructions. A Instruction Mix table will contain a task or list of taks, instruction types, and thecorresponding instructions in each type. A task will be defined with percentage of each type of
instructions. This helps the user to recreate the instruction profile for an application to analyse theperformance of the entire design by feeding the tasks to appropriate hardware unit such as
Processor and DSP.

Figure 79. Task Generator Based Software modeling

31.3

Trace Aproach

The trace based modling helps the user to optimize the specific device in the entire design. The
trace can be obtained from the real hardware or cycle accurate design model. The trace file willcontain the the instruction sequence of an application program that ran on a specific hardware. By
feeding this seuqnce into the hardware design the user can observe the impact of each hardware
components and optimize them to get improved performance. The trace will contain the I cacheaddress, Instruction and D cache address for each instruction that are executed.

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Figure 80. Trace Based Software modeling

31.4

Microarchitecture Approach

The micorachitecture method generates the instructions for a giver application program. The
disassembly code is generated through the gcc compiler and the the instructions are fetched,decoded, issued, executed based on the functions defined in the application program. The control
flow of instructions are handled by the computed result and system handler. The helps the user tomodel and anlayse the entire system in low level design.

Figure 81. Low level software modeling

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32 Introduction to Finite State Machine
Finite State Machines (FSM’s) are used extensively in designing sequential control logic. FSM
is a very intuitive way to capture control logic and easier to communicate a design. The
VisualSim philosophy of hierarchical composition of heterogeneous models of computation
allows embedding hierarchical FSMs within a variety of concurrency models. FSM model iscontained by an instance of FSM Block. The FSM model reacts to inputs of the FSM block bymaking state transitions. Actions such as sending tokens to the output ports of the FSM block
can be associated with state transitions.
Expressions give the guards for state transitions, as well as the values used in actions that
produce outputs and actions. This sets the values of parameters in the refinements ofdestination states. The exceptions are parameters that are strictly string parameters, in whichcase the value of the parameter is the literal string, not the string interpreted as an expression,as for example the function parameter of the TrigFunction actor, which can take on only "sin,""cos," "tan", "asin", "acos", and "atan" as values.

32.1
32.1.1Finite State Machine
FSM-Controller

The FSM Block contains states and transitions. The State has two ports: incomingPort, whichlinks to incoming transitions to the state, and outgoingPort, which links to transitions going out
from the state. The Transition links to two ports - the outgoing port of its source state and theincoming port of its destination state. The two ports of the States are not displayed on the circle.

32.1.2

Guard Expressions

The guard of a transition is specified by its guardExpression string attribute. Guard expressions
are parsed and evaluated using the RegEx expression language. Guard expressions mustevaluate to a Boolean value. A transition is enabled if its guard expression evaluates to true.
Parameters of the FSM block and input variables (defined below) can be used in guard
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2003-2022expressions. Input variables represent the status and input value for each input port of the FSM
block.

32.1.3

Actions

A transition can have a set of actions that produce output tokens or set parameters of the FSM
block. A transition has an outputActions attribute and allows the user to specify a list of
semicolon separated output actions of the form destination = expression. The expression canuse parameters of the FSM block and input variables.

32.2

Execution

The methods that define the execution of an FSM block are implemented as follows:Preinitialize: Create receivers and input variables for each input port; set current state to theinitial state as specified by the initialStateName attribute.
Initialize: perform simulator-specific initialization by calling the initialize (Block) method of the
Simulator. Note that in the example given in AMI Coder of the Simulation Domain
documentation under FSM, the Simulator is the Untimed Digital Simulator.
Prefire: always return true. An FSM block is always ready to fire.
Fire: set the values of input variables; choose the enabled transition among the outgoingtransitions of the current state; execute the choice actions of the chosen transition.
Postfire: execute the commit actions of the last chosen transition; change state to thedestination state of that transition.
Non-deterministic FSMs are currently not allowed. The fire() method checks whether there ismore than one enabled transition from the current state. An exception is thrown if there are
more than one transition from any state. In the case when there is no enabled transition, theFSM will stay in its current state.

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32.3

FiniteStateMachine

Figure 82.

FiniteStateMachine Illustration

The FSM simulator supports the *charts formalism with modal models. The concept of modal
model is illustrated in Figure 76. M is a modal model with two operation modes. The modes are
represented by states of FSM that controls mode switching. Each mode has a refinement thatspecifies the behavior of the mode. In VisualSim, a FiniteStateMachine is an entity in the Base
Blocks and uses the FSM simulator internally. The refinement in the States and the Transitions
can either be another FSM or a Block Diagram.

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33 VisualSim Cloud and File Export to Web
VisualSim Cloud support allows the user to launch the full featured VisualSim in Online Web
version. This makes the user to access the tool, build the model and run simulation without
installing the tool in the local system.

33.1

How to access VisualSim Cloud

The user have to get login credentials by registering for the VisualSim cloud here. Once thecredentials are received through the mail, please use that in the same page to login.
Once you login, the site will give you clear instructions on what to do. The prerequisite for
VisualSim cloud are

OpenWebStart - https://openwebstart.com/download/Java 17 - https://www.oracle.com/java/technologies/javase/jdk17-archive-downloads.html
Once you have these and you launched the tool from the web page the Startermodel.jnlp will
be downloaded. Go to the downloaded location and double-click on Startermodel.jnlp . Click
yes on java security warnings.
Now the VisualSim Cloud version is available for the user.

33.2

Export model to web. (Disabled in the current version. It will beavailable in the future release)

User can share the model to someone else in the team or company, where they do not want toinstall the tool in the local system. The user have to export the model to web and share the html
page, by this way the can share the model access them using VisualSim cloud.
To Export a model to web, open the model in VisualSim Tool and select File-> Export->Export toWeb.
Then user will get the following window and update them as mentioned below.

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Figure 83. Model export to web configuration.

Click Browse on directoryToExportTo option and select the model directory. Enable
openCompositeBeforeExport, runBeforeExport, showInBrowser and CopyJavaScriptFiles in thewindow. Click Commit.
Now the Index file for this model is created in the specified directory.
By sharing this index.html file the user can launch the model suing VisualSim cloud.
Once they click launch, the jnlp file can be downloaded in the local system, and then by double
clicking them the VisualSim cloud will open the model.

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34 VisualSim® Interface with FPGA
We describe the integration of the VisualSim modeling environment with FPGA-in-the-loop. Here
we have considered Xilinx Zynq 7000 platform board as the example device that communicateswith VisualSim®. However the source code and the setup is completely generic. This interface
has been demonstrated on Xilinx Zynq 7000 platform board (Zybo board), using the Vivado tool
suite from Xilinx and the accompanying Xilinx SDK. The version of Xilinx tool used is Vivado 10.2.
Using this interface the designer can communicate in both direction between VisualSim and theFPGA boards.

Figure 84.

34.1

VisualSim Interface with FPGA

VisualSim FPGA Interface applications

VisualSim FPGA Interface can be used for System level analysis of Embedded Systems including
performance, protocol checking, power, and for generating test scenarios for the target FPGA.
VisualSim can generate verities of test scenarios very quickly and enables the user to validate
application on FPGA covering all corner cases.
VisualSim FPGA interface allows users to adopt below mentioned applications but it is not
restricted.
•

Generating and running system level scenarios
o VisualSim can be used to generate system level scenarios from the systemdefinition.
o Transferring the data to the FPGA to run actual data through the system.
o Transfer the data back to VisualSim to perform analysis and display the informationin user readable format.

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••Run performance simulations on the actual hardware systemo VisualSim to generate complex use case scenarios that define performance bottle
necks.
o Run these scenarios on the actual hardware system.
o Collect process and display the results, so system level optimizations can be
performed.
Run power scenarios on the actual hardware
o Generate complex power scenarios for the system.
o Run these scenarios on the actual hardware.
o Collect process and display the results, so system issues can be identified andfixed.

34.2

Hardware and Software Requirements

The FPGA must have a microprocessor, Ethernet Port and a Ethernet MAC core on the device.
Example Hardware and Softwares are as follows; Xilinx Zynq 7000, SmartFusion2, Xilinx Vivado.

34.3

VisualSim FPGA Interface Kit

VisualSim FPGA Interface Kit provides all the interface files and demo examples. As VisualSim
FPGA Interface Kit is provided as completely configurable, users can compile the interface basedon their requirements.

34.4

How Interface Works

The Zynq platform has an ARM processor and an FPGA as part of its architecture. This interface
uses the ARM processor to enable the interface, so the users can use all of the FPGA for theirlogic, except for a small layer to communicate with the interface.
The software running on the ARM processor is a lwIP Echo Server. The lwIP Echo server
application starts an echo server at port 7. Any data sent to this port is accepted by the FPGA,
processed by the FPGA and sent back through this interface.
By default, the program assigns the following settings to the board:
IP Address: 192.168.1.10
Netmask : 255.255.255.0
Gateway : 192.168.1.1
MAC address: 00:0a:35:00:01:02
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These settings can be changed in the file main.c.
platform.c implements processor and platform dependent functions.
The file platform_config.h is generated based on the hardware design. It makes two assumptions:
The timer has its interrupt line connected to the interrupt controller, and all the Ethernet
peripherals (xps_ethernetlite or xps_ll_temac) accessible from the processor can be used withlwIP.

34.4.1
•
•
•
•
•
•
•
•
•

Procedure to Run Example
Import the Vivado project into the Vivado tool suite.
Make the required changes to the project to suit the hardware being used for the demo.
Compile the project in Vivado.
Launch the SDK from Vivado, so all the required board support packages are exported to
the SDK.
Import the SDK project into the SDK.
Make the required changes in the SDK to match the paths of the new packages that weregenerated for the board being used.
Compile the software.
Program the FPGA with the generated bit stream.
Then launch the software to run on the FPGA and monitor using a telnet from the host PC.

To communicate with FPGA, VisualSim uses UDP socket ports and the user can send packet
data from VisualSim to FPGA using VisualSim’s “Datagram Writer” library block and receives
packet from FPGA using “Datagram Reader” library block. Sample VisualSim model andconfiguration of Datagram Writer and Datagram Reader is shown in below figure.

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Figure 85.

VisualSim Model

VisualSim Datagram Writer and Datagram Reader play a very important role in VisualSim FPGA
interface. Datagram Writer and Datagram Reader should be configured with right Socket number
and Remote/Local address.

Figure 86.

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Figure 87.

Configuring Datagram Reader

The blocks connected after Datagram Reader correspond to the subsystems that are connected
to FPGA platform and does processing based on the data from FPGA. In this example, we haveconnected a Server that models a simple buffer and it delays the incoming data based on the data
size and buffer speed MHz.

34.5

Configuring FPGA and Source Files

We have created a sample Vivado project that works with VisualSim. Import the Vivado project
into Xilinx Vivado tool suite. To Import the project, please click on File > Open Project and selectmirab_eth.xpr and click Ok. Now the project has been loaded into Vivado design suite.
Now we need to generate bit stream for programming FPGA. Click on Run Implementation fromthe menu bar Flow > Run Implementation or click on the green arrow button on the tool bar.
After successful Implementation Run, generate bit stream by selecting Generate Bitstream Option
as shown below.

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Figure 88.

Generate Bitstream

After successful Bitstream generation, we need to export hardware description file for SDK. To
perform this, click on File  Export Hardware. As the original project was compiled using Vivado
10.2, users with latest version of Vivado need to upgrade IP and generate a new block diagram.
Refer appendix 1 for more details on updating IP and block diagram generation.
When you click on Export Hardware, Vivado Suite will open as if you want to generate output
products or to Skip generation of output products.

Figure 89.

Generate Bitstream

Click Generate output Products.
After generating output products for hardware, select the export location as local to project.

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Figure 90.

Export Hardware

Click OK.
Now we need to launch Xilinx SDK. Make sure that you have installed Xilinx SDK package during
installation procedure.
As we need all the board support packages in SDK, launch Xilinx SDK from Vivado Design suite.
Click on File > Launch SDK. This opens Xilinx SDK, make the required changes in the SDK tomatch the paths of the new packages that were generated for the board being used. By default you
can select the exported location as Local to project as shown below.

Figure 91.

Launch SDK

Click on Ok.

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The source files are listed under TestApp1, select TestApp1 in Project Explorer as shown below.

Figure 92.

Project Explorer

To compile source file, click the Run menu from the Menu bar or Run button on the Tool Bar.
Now program the FPGA with the generated bitstream by clicking on Tools > Program Device.
Launch the software to run on the FPGA and monitor using a telnet from the host PC.

34.6

Possible Errors

1. Failed to create a new socket on port {Port Number}.
Solution: This error appears if the Datagram Writer local socket number and Datagram.
Reader local socket number are same. Make sure that both are different.
2. Blank Report display.
Solution: This is due to incorrect remote address/IP address or Remote socket number
defined in Datagram Writer.

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34.7

Appendix

1. For the users with Vivado design suite above 10.2, follow the steps mentioned below to
upgrade IP and to generate new block diagram.
If you are running Vivado design suite above 10.2 you may receive a message as mentioned
below while performing Export Hardware.

Figure 93.

Cannot Export Hardware

At this point, click on Open Block Design from the flow navigator as shown below.

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Figure 94.

Open Block Design

Click on Show IP Status

Figure 95.

Show IP Status

Click on Update Selected

Figure 96.

Update Selected

This updates the existing IPs.

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35 Qemu Guide
For Ubuntu 18.04

35.1

Steps to install qemu on Ubuntu

1) Download and install QEMU from source code.
2) Site referred - https://wiki.qemu.org/Hosts/Linux#Getting_the_source_code.
sudo apt-get install git libglib2.0-dev libfdt-dev libpixman-1-dev zlib1g-dev
sudo apt-get install git-email
sudo apt-get install libaio-dev libbluetooth-dev libbrlapi-dev libbz2-dev
sudo apt-get install libcap-dev libcap-ng-dev libcurl4-gnutls-dev libgtk-3-dev
sudo apt-get install libibverbs-dev libjpeg8-dev libncurses5-dev libnuma-dev
sudo apt-get install librbd-dev librdmacm-dev
sudo apt-get install libsasl2-dev libsdl1.2-dev libseccomp-dev libsnappy-dev libssh2-1-dev
sudo apt-get install libvde-dev libvdeplug-dev libvte-2.91-dev libxen-dev liblzo2-dev
sudo apt-get install valgrind xfslibs-dev
sudo apt-get install libnfs-dev libiscsi-dev
3)
4)
5)
6)
7)
8)
9)

git clone git://git.qemu-project.org/qemu.git# Switch to the QEMU root directory.
cd qemu# Prepare a native debug build.
mkdir -p bin/debug/native
cd bin/debug/native# Configure QEMU and start the build. This will build for all the target list – ARM, x86-64,
RISCV, PowerPC , SPARC etc.
10) ../../../configure --enable-debug11) make12) # Return to the QEMU root directory.
13) cd ../../..

---------------------------------------------------********************--------------------------------------------

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Download benchmark to run the program

35.2

1) Download the STREAM benchmarking suite:a. Download stream.c from here: https://www.cs.virginia.edu/stream/FTP/Code/stream.cb. Download mysecond.c from here (not required, but just to be safe):
https://www.cs.virginia.edu/stream/FTP/Code/mysecond.c
2) Or create your own C program and run against the different architectures in the next steps.
---------------------------------------------******************-----------------------------------------------

Steps to compile and Run C program for x86 and ARM

35.3
•
•
•

Test Code used – stream.c -download from the above or create your own testcode
Connect to the test code directory
Create log-file for either of the architectures –x86 or ARM

1) x86a) Compile the program
elc1@ubuntu:~/QEMU/tests$ gcc stream.c -o stream-x86
user defined test code: gcc filename.c -o filenameb) Run the program
elc1@ubuntu:~/QEMU/tests$ ./ stream -x86------------------------------------------------------------STREAM version $Revision: 5.10 $------------------------------------------------------------This system uses 8 bytes per array element.
------------------------------------------------------------Array size = 10000000 (elements), Offset = 0 (elements)
Memory per array = 76.3 MiB (= 0.1 GiB).
Total memory required = 228.9 MiB (= 0.2 GiB).
Each kernel will be executed 10 times.

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The *best* time for each kernel (excluding the first iteration)
will be used to compute the reported bandwidth.
------------------------------------------------------------Your clock granularity/precision appears to be 1 microseconds.
Each test below will take on the order of 197978 microseconds.
(= 197978 clock ticks)
Increase the size of the arrays if this shows thatyou are not getting at least 20 clock ticks per test.
------------------------------------------------------------WARNING -- The above is only a rough guideline.
For best results, please be sure you know the
precision of your system timer.
------------------------------------------------------------Function Best Rate MB/s Avg time Min time Max timeCopy:
5549.6 0.029829 0.028831 0.032965
Scale:
5217.2 0.031839 0.030668 0.033178
Add:
7839.0 0.032011 0.030616 0.034741
Triad:
7401.3 0.033327 0.032427 0.033997------------------------------------------------------------Solution Validates: avg error less than 1.000000e-13 on all three arrays-------------------------------------------------------------c) Check the type of the binary thus generated (output is shown below)
elc1@ubuntu:~/QEMU/tests$ file stream-x86
stream-x86: ELF 64-bit LSB shared object, x86-64, version 1 (SYSV),
dynamically linked, interpreter /lib64/ld-linux-x86-64.so.2, for GNU/Linux
3.2.0, BuildID[sha1]=7ff9b39569aef2b4fea79b0913eb1674335d11f3, notstrippedd) Generate the instruction trace along with running the executable onemulated x86 architecture.
-d flag specifies the type of logs required (it will help to generate
the log). The entire list can be obtained by specifying -d help. We
will use -d strace.
For assembly code – in_asm-D flag specifies the location where the logs should be written.
Use the following command (It will generate the logfile-x86-64)
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The entire list can be obtained by specifying -d help
elc1@ubuntu:~/QEMU/tests$/home/elc1/QEMU/qemu/bin/debug/native/x86_64-linux-user/qemu-x86_64-d help
Log items (comma separated):
out_asmshow generated host assembly code for each compiled TB
in_asmshow target assembly code for each compiled TB
opshow micro ops for each compiled TB
op_optshow micro ops after optimization
op_indshow micro ops before indirect lowering
int
show interrupts/exceptions in short format
execshow trace before each executed TB (lots of logs)
cpu
show CPU registers before entering a TB (lots of logs)
fpu
include FPU registers in the 'cpu' logging
mmu
log MMU-related activities
pcall
x86 only: show protected mode far calls/returns/exceptions
cpu_resetshow CPU state before CPU resets
unimp
log unimplemented functionality
guest_errors log when the guest OS does something invalid (egaccessing a
non-existent register)
page
dump pages at beginning of user mode emulationnochaindo not chain compiled TBs so that "exec" and "cpu" showcomplete traces
stracelog every user-mode syscall, its input, and its result
trace:PATTERN enable trace events
Use "-d trace:help" to get a list of trace events.
elc1@ubuntu:~/QEMU/tests$/home/elc1/QEMU/qemu/bin/debug/native/x86_64-linux-user/qemux86_64 -d strace -D /home/elc1/QEMU/tests/logfile-stream-x86_64./stream-x86
Explanation on the above command
Path to qemu-x86_64: /home/elc1/QEMU/qemu/bin/debug/native/x86_64linux-user/qemu-x86_64
Type of Log: -d strace
Path to Output file: -D /home/elc1/QEMU/tests/logfile-stream-x86_64
This will create the logfile in the given location. For example here /home/elc1/QEMU/tests/
Output file name: logfile-stream-x86_64
Executable file name: ./stream-x86
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2) ARM -32bit
Install arm compiler: sudo apt-get install gcc-arm-none-eabia) Compile the program
elc1@ubuntu:~/QEMU/tests$ arm-none-eabi-gcc --specs=rdimon.specs
filename.c -o filename-arm –staticb) Check the type of the binary thus generated (output is shown below)
elc1@ubuntu:~/QEMU/tests$ file filename-arm
filename -arm: ELF 32-bit LSB executable, ARM, EABI5 version 1 (SYSV),
statically linked, with debug_info, not strippedc) (not necessary – if want to see the output )Execute the binary on
emulated ARM architecture using qemu
/home/elc1/QEMU/qemu/bin/debug/native/arm-linux-user/qemu-arm ./filename –armd) Generate the instruction trace along with running the executable onemulated x86 architecture.
-d flag specifies the type of logs required (it will help togenerate the log). The entire list can be obtained by specifying -d help.
We will use -d in_asm.
-D flag specifies the location where the logs should be written.
Use the following command(It will generate the logfile-arm)
elc1@ubuntu:~/QEMU/tests$/home/elc1/QEMU/qemu/bin/debug/native/arm-linux-user/qemu-arm -d
in_asm -D /home/elc1/QEMU/tests/logfilename ./filename-arm
Explanation on the above command
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Path to qemu-arm: /home/elc1/QEMU/qemu/bin/debug/native/arm-linuxuser/qemu-arm
Type of Log: -d in_asm
Path to Output file: /home/elc1/QEMU/tests/
this will create the logfile in the given location. For example here /home/elc1/QEMU/tests/
Output file name: logfilename
Executable file name: ./filename-arm
3) ARM -64bit
Install arm-64bit compiler: sudo apt-get install gcc-aarch64-linux-gnu g++aarch64-linux-gnu
I.

compile the program
elc1@ubuntu:~/QEMU/tests$ aarch64-linux-gnu-gcc hello.c -o hello

II.

Check the type of the binary thus generated (output is shown below)
a. compile the program dynamically – (already done in step I.)
elc1@ubuntu:~/QEMU/tests$ file hello
64-bit LSB executable, ARM aarch64, version 1 (SYSV),
dynamically linked, interpreter /lib/ld-linux-aarch64.so.1, for
GNU/Linux 3.7.0,
BuildID[sha1]=0a161541c986a6a5ea1cea24eb19579ce9f64fdb, notstrippedb. compile the program statically
elc1@ubuntu:~/QEMU/tests$ aarch64-linux-gnu-gcc hello.c -ohello -static
elc1@ubuntu:~/QEMU/tests$ file hello
hello: ELF 64-bit LSB executable, ARM aarch64, version 1 (SYSV),
statically linked, for GNU/Linux 3.7.0,
BuildID[sha1]=dc9c2aac0c174d49749a1b3b47175f7a759547da, notstripped

III.

(not necessary – if want to see the output )Execute the binary on
emulated ARM architecture using qemu
$ /home/elc1/QEMU/qemu/bin/debug/native/aarch64-linux-user /qemuaarch64./hello

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IV.

Generate the instruction trace along with running the executable onemulated x86 architecture.
-d flag specifies the type of logs required (it will help togenerate the log). The entire list can be obtained by specifying -d help.
We will use -d in_asm.
-D flag specifies the location where the logs should be written.
Use the following command(It will generate the logfile-arm)
elc1@ubuntu:~/QEMU/tests$/home/elc1/QEMU/qemu/bin/debug/native/aarch64-linux-user /qemuaarch64 -d in_asm -D /home/elc1/QEMU/tests/logfile-arm64 ./hello
Hello world! - this will create the logfile in the given location.For example
here - /home/elc1/QEMU/tests/4) PowerPc -32bit
Install arm compiler: sudo apt-get install gcc-4.8-powerpc-linux-gnu
I.

compile the program
elc1@ubuntu:~/QEMU/tests$ powerpc-linux-gnu-gcc-4.8 hello.c -o hello

II.

Check the type of the binary thus generated (output is shown below)
a. compile the program dynamically – already done in above step
elc1@ubuntu:~/QEMU/tests$ file hello
hello: ELF 32-bit MSB executable, PowerPC or cisco 4500, version
1 (SYSV), dynamically linked, interpreter /lib/ld.so.1, for GNU/Linux
3.2.0,
BuildID[sha1]=2d8db2bb6dc97b29db5527e284bb0d56cf71f3b6, notstrippedb. compile the program statically
elc1@ubuntu:~/QEMU/tests$ powerpc-linux-gnu-gcc-4.8 hello.c o hello -static
elc1@ubuntu:~/QEMU/tests$ file hello

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hello: ELF 32-bit MSB executable, PowerPC or cisco 4500, version
1 (SYSV), statically linked, for GNU/Linux 3.2.0,
BuildID[sha1]=081f2652a0604602668cecf1f1011f0bd17b5756, notstripped
III.

(not necessary – if want to see the output )Execute the binary on
emulated architecture using qemu
$ /home/elc1/QEMU/qemu/bin/debug/native/ppc-linux-user/qemu-ppc./helloIV.

Generate the instruction trace along with running the executable onemulated x86 architecture.
-d flag specifies the type of logs required (it will help togenerate the log). The entire list can be obtained by specifying -d help.
We will use -d in_asm.
-D flag specifies the location where the logs should be written.
Use the following command(It will generate the logfile-arm)
elc1@ubuntu:~/QEMU/tests$/home/elc1/QEMU/qemu/bin/debug/native/ppc-linux-user/qemu-ppc -d
in_asm -D /home/elc1/QEMU/tests/logfile-pp32 ./hello
Hello world! - this will create the logfile in the given location.For example
here - /home/elc1/QEMU/tests/5) PowerPc -64bit
Install arm compiler: sudo apt-get install gcc-4.8-powerpc64le-linux-gnu
I.

compile the program
elc1@ubuntu:~/QEMU/tests$ powerpc64le-linux-gnu-gcc-4.8 hello.c -ohello-ppc64

II.

Check the type of the binary thus generated (output is shown below)
a. compile the program dynamically- (already done in above step)

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elc1@ubuntu:~/QEMU/tests$ file hello-ppc64
hello-ppc64: ELF 64-bit LSB executable, 64-bit PowerPC or cisco
7500, version 1 (GNU/Linux), dynamically linked for GNU/Linux
3.2.0,
BuildID[sha1]=1a89598dc9eccc38b264d9a0e22741e422866dbd,
not strippedb. compile the program statically
elc1@ubuntu:~/QEMU/tests$ powerpc64le-linux-gnu-gcc-4.8
hello.c -o hello-ppc64 –static
elc1@ubuntu:~/QEMU/tests$ file hello-ppc64
hello-ppc64: ELF 64-bit LSB executable, 64-bit PowerPC or cisco
7500, version 1 (GNU/Linux), statically linked, for GNU/Linux 3.2.0,
BuildID[sha1]=1a89598dc9eccc38b264d9a0e22741e422866dbd,
not strippedIII.

(not necessary – if want to see the output )Execute the binary on
emulated ARM architecture using qemu
$ /home/elc1/QEMU/qemu/bin/debug/native/ ppc64le-linux-user/qemuppc64le . / hello-ppc64

IV.

Generate the instruction trace along with running the executable onemulated x86 architecture.
-d flag specifies the type of logs required (it will help togenerate the log). The entire list can be obtained by specifying -d help.
We will use -d in_asm.
-D flag specifies the location where the logs should be written.
Use the following command(It will generate the logfile-arm)
elc1@ubuntu:~/QEMU/tests$/home/elc1/QEMU/qemu/bin/debug/native/ ppc64le-linuxuser/qemu-ppc64le -d in_asm -D/home/elc1/QEMU/tests/logfile-ppc64 ./hello-ppc64
Hello world! - this will create the logfile in the given location.For
example here - /home/elc1/QEMU/tests/

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36 VisualSim Gem5-Arm Integration
Note: To build gem5, you will need the following software:
•

git

•

gcc/g++ (version >=5)•

Python (3.6+),•

SCons(3.0 or greater),

•

SWIG,

•

zlib,

•

m4, and lastly•

protobuf (2.1+) if you want trace capture and playback support.

Please see http://www.gem5.org/documentation/general_docs/building for more details concerning theminimum versions of the aforementioned tools.
The below information specify the gem5 version and the gem5 build on OS-------------------------------Gem5 - :Branches: stable - v21.0.0.0
package - git clone https://gem5.googlesource.com/public/gem5
OS - Centos-8.3
python version - python 3.6
gcc version - gcc 8.3

36.1 Installation steps for Ubuntu OS
Assumption: The user has installed Java version 14 or later and VisualSim Architect.
1.
2.
3.
4.

$ sudo apt install git$ sudo apt install build-essential git m4 scons zlib1g zlib1g-dev libprotobuf-dev protobuf-compiler libprotocdev libgoogle-perftools-dev python3-dev python python3-six python-is-python3 libboost-all-dev pkg-config$ sudo apt-get install swig
Connect to gem5 directory and typea. $ scons build/ARM/gem5.opt -j2---------------------------------------**********************************-------------------------------------

36.2 Installation steps for CentOS 8.3
Assumption: The user has installed Java version 14 or later and VisualSim Architect.
1.
2.

$ sudo yum groupinstall "Development Tools"$ sudo dnf update

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3.
4.
5.
6.
7.
8.

$ sudo dnf config-manager --set-enabled powertools$ sudo yum install swig
$ sudo yum install zlib-devel$ python --version
Python 3.6.8
Note: (optional) If python --version does not points to python3.6 or more, then create a symbolic links asfollow -:a. $ which python/usr/bin/python
b. $ which python3.6/usr/bin/python3.6
c. $ sudo ln -s /usr/bin/python3.6 /usr/bin/python
9. $ sudo yum install python3-devel
10. $ sudo python -m pip install scons
11. $ sudo dnf -y install protobuf-devel
a.
b.
c.

On cmdline: - Installing:
protobuf-devel
Installing dependencies:
protobuf
protobuf-compiler

x86_64

3.5.0-13.el8

powertools

357 k

x86_64x86_64

3.5.0-13.el8
3.5.0-13.el8

appstream
powertools

892 k
789 k

12. $ sudo dnf install https://extras.getpagespeed.com/release-el8-latest.rpm
13. $ sudo dnf install gperftools-devel
14. $ sudo yum install libpng-devel
15. $ sudo yum -y install hdf5-devel
16. Connect to gem5 directory and typea. $ scons build/ARM/gem5.opt -j2-------------------------------****************************------------------------------------

36.3 Run the Gem5 with Visualsim
1) Connect to gem5 directory on terminal and type$ ./interactive_sim.py

2) Now open the model from VisualSim - demo/interfaces/gem5/gem5_demo.xml
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3) Specify the gem5 folder path in GEM5Wrapper parameter pipePathPrefix in the model.

4) Run the model.
-------------------------------------------***************--------------------------------------

36.4 Trace Generation from Gem5:
1) Generate trace using debug flags – In gem5 these are the flags used
a. DRAM debug flag – gives memory details
b. Exec debug flag - based on the exact instruction the CPU is executing, shows details of how each
instruction is executed by the simulated CPU.
2) Edit interactive_sim.py. Enable the Exec flag as shown below (DRAM flag is enabled by default).

3) Now run the interactive_sim.py again (same steps as described in section 49.3)
4) The output is generated in file temp_pipe, in gem5 directory.
-------------------------*********************************-------------------------------------------

36.5 Debug Gem5 using gdb:
1) $ gdb --args ./build/ARM/gem5.opt2) (gdb) run --debug-break=1000 --debug-flags=DRAM --interactive ./configs/example/se_vs.py --cputype=TimingSimpleCPU --cpu-clock=1GHz --sys-clock=1GHz --caches --l1i_size=16kB --l1d_size=16kB --mem-

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3)
4)
5)
6)
7)

type=DDR3_1600_8x8 -c ../MiBench/consumer/jpeg/jpeg-6a/cjpeg -o '-dct int -progressive -opt -outfile../MiBench/consumer/jpeg/output_large_encode.jpeg ../MiBench/consumer/jpeg/input_large.ppm'
Run the visualsim model
Debug the code using gdb commands such as (n, p, f, bt, step, b main, c)
After debugging type continue or c on the terminal, for rest of iteration to finished up
Plots will be displayed.
For more information refer:
https://www.gem5.org/documentation/general_docs/debugging_and_testing/debugging/debugger_based_debugging

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------------------------------------------***********************--------------------------------------------

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36.6 Debug Gem5 using graphical gdb:
1) $ gdb -tui --args ./build/ARM/gem5.opt2) (gdb) run --debug-break=1000 --debug-flags=DRAM --interactive ./configs/example/se_vs.py --cputype=TimingSimpleCPU --cpu-clock=1GHz --sys-clock=1GHz --caches --l1i_size=16kB --l1d_size=16kB --memtype=DDR3_1600_8x8 -c ../MiBench/consumer/jpeg/jpeg-6a/cjpeg -o '-dct int -progressive -opt -outfile../MiBench/consumer/jpeg/output_large_encode.jpeg ../MiBench/consumer/jpeg/input_large.ppm'
3) Run the visualsim model4) Debug the code using gdb commands such as (n, p, f, bt, step, b main, c)5) After debugging type continue or c on the terminal, for rest of iteration to finished up6) Plots will be displayed.
7) For more information refer the site : http://beej.us/guide/bggdb/#qref
8) NOTE: All the normal gdb commands will work in GUI mode, and additionally the arrow keys andpgup/pgdown keys will scroll the source window (when it has focus, which it does by default).

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Reference Guide- 289 Mirabilis Design Inc

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------------------------------------------***********************-------------------------------------------

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36.7 Running the Gem5 in System Call Emulation (SE) Mode
The SE mode simulation focuses on the CPU and memory system, and does not emulate the entire system. In thismode, one only needs to specify the binary file to be simulated. This binary file can be statically/dynamically linked.
configs/examples/se.py is used for configuring and running simulations in this mode. What follows is probably thesimplest example of how to use se.py. The binary file to simulate is specified with option -c.
1) cd to the gem5 directory on terminal and use the below command to run the hello arm executable.
a) $ ./build/ARM/gem5.opt ./configs/example/se.py -c ./tests/test-progs/hello/bin/arm/linux/hello
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 2 2014 00:06:39
gem5 started Mar 4 2014 10:52:10
gem5 executing on $command line: ./build/ARM/gem5.opt ./configs/example/se.py -c ./tests/testprogs/hello/bin/arm/linux/hello
Global frequency set at 1000000000000 ticks per second
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000**** REAL SIMULATION ****
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
Exiting @ tick 3233000 because target called exit()
2) For statistics refer to this location –> /home/elc1/gem5/gem5-ptolemy-master/gem5stable_2015_09_03/m5out /stats.txt3) Detailed Information - http://mail.gem5.org/Running_gem54) Create your own executable for arm (additional information for trying out more experiments )Install ARM compiler $ sudo apt-get install gcc-arm-linux-gnueabihf gcc-aarch64-linux-gnu
a.
b.
c.

Compile the C program : $ arm-linux-gnueabihf-gcc filename.c -o filename-arm –static$ file filename
Run the gem5 $ ./build/ARM/gem5.opt ./configs/example/se.py -c path to the arm executables----------------------------------*******************---------------------------------------

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36.8 Run the Gem5 (SE mode) in Multi-Core1) cd to the gem5 directory on terminal and use the below command to run the hello arm executable.
elc1@ubuntu:~/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03$ ./build/ARM/gem5.opt
configs/example/se.py --num-cpus=2 -c './tests/test-progs/hello/bin/arm/linux/hello;./tests/testprogs/hello/bin/arm/linux/hello'
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Sep 22 2020 19:37:46
gem5 started Nov 6 2020 00:42:37
gem5 executing on ubuntu
command line: ./build/ARM/gem5.opt configs/example/se.py --num-cpus=2 -c './tests/testprogs/hello/bin/arm/linux/hello;./tests/test-progs/hello/bin/arm/linux/hello'
Global frequency set at 1000000000000 ticks per second
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (512 Mbytes)
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
0: system.remote_gdb.listener: listening for remote gdb #1 on port 7001*** REAL SIMULATION ***info: Entering event queue @ 0. Starting simulation...
Hello world!
Hello world!
Exiting @ tick 2924500 because target called exit()
2) For statistics refer –> m5_out/Stats.txt3) Create your own executable for arm (additional information for trying out more experiments )Install ARM compiler$ sudo apt-get install gcc-arm-linux-gnueabihf gcc-aarch64-linux-gnu
a.
b.
c.

Compile the C program : $ arm-linux-gnueabihf-gcc filename.c -o filename-arm –static$ file filename
Run the gem5

$ ./build/ARM/gem5.opt configs/example/se.py --num-cpus=2 -c ‘path to the testcode; path to thetestcode ‘-----------------------------******************-------------------------------------

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36.9 Running the Gem5 in Full System (FS) ModeIn the FS mode, the complete system can be modeled in an OS-based simulation environment. In order to simulate
using the FS mode, For full system mode, you can use the file configs/example/fs.py for configuration and simulation..
After downloading and extracting ARM full system files, we let gem5 know the location of our disks and binaries
directories, i.e. the path to the aarch-system-2014-10 directory.
36.9.1.1 Booting Linux•

Detailed information :https://www.youtube.com/watch?v=gd_DtxQD5kc&feature=youtu.be&ab_channel=BenPayne-

http://mail.gem5.org/Running_gem5

36.9.1.1.1 Steps to download the full system file
1)
2)
3)
4)

Connect to gem5 directory
elc1@ubuntu:~/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03$ mkdir full_system_images
elc1@ubuntu:~/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03$ cd full_system_images/
elc1@ubuntu:~/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03/full_system_images$ wget
http://www.m5sim.org/dist/current/arm/aarch-system-2014-10.tar.bz2--2020-10-09 06:27:43-- http://www.m5sim.org/dist/current/arm/aarch-system-2014-10.tar.bz2
Resolving www.m5sim.org (www.m5sim.org)... 141.212.113.198
Connecting to www.m5sim.org (www.m5sim.org)|141.212.113.198|:80... connected.
HTTP request sent, awaiting response... 200 OK
Length: 280811500 (268M) [application/x-bzip2]
Saving to: ‘aarch-system-2014-10.tar.bz2’
aarch-system-2014-10. 100%[==================>] 267.80M 4.36MB/s in 50s
2020-10-09 06:28:35 (5.30 MB/s) - ‘aarch-system-2014-10.tar.bz2’ saved [280811500/280811500]

5) elc1@ubuntu:~/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03/full_system_images$ tar jxf aarchsystem-2014-10.tar.bz26) echo "export M5_PATH=/home/elc1/gem5/gem5-ptolemymaster/gem5stable_2015_09_03/full_system_images/" >> ~/.bashrc
7) Note: M5_PATH=path to the full system image directory8) elc1@ubuntu:~/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03/full_system_images$ source~/.bashrc-to refresh it9) elc1@ubuntu:~/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03/full_system_images$ echo
$M5_PATH/home/elc1/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03/full_system_images------------------------------------**************-------------------------

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36.9.1.1.2 Steps to boot Linux on gem5
1) $ cd /home/elc1/gem5/gem5-ptolemy-master/gem5-stable_2015_09_03
2) $ ./build/ARM/gem5.opt configs/example/fs.py --disk-image=/home/elc1/full_system_image/disks/aarch32ubuntu-natty-headless.img
gem5 Simulator System
Copyright (c) 2001-2006
The Regents of The University of Michigan
All Rights Reserved

gem5 compiled Aug 16 2006 18:51:57
gem5 started Wed Aug 16 21:53:38 2006
gem5 executing on zeepcommand line: ./build/ARM/gem5.debug configs/example/fs.py
0: system.tsunami.io.rtc: Real-time clock set to Sun Jan 1 00:00:00 2006
Listening for console connection on port 3456
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
warn: Entering event queue @ 0. Starting simulation...
<...simulation continues...>Note: --disk-image=path to the full system image directory
By default, the fs.py script boots Linux and starts a shell on the system console. To keep console traffic separate fromsimulator input and output, this simulated console is associated with a TCP port. To interact with the console, youmust connect to the port using a program such as telnet , for example:
Open new terminal and type3) $ telnet localhost 3456
Here 3456 is a port number on gem5 terminal
elc1@ubuntu:~$ telnet 127.0.0.1 3457
Trying 127.0.0.1...
Connected to 127.0.0.1.
Escape character is '^]'.
==== m5 slave terminal: Terminal 0 ====
Booting Linux on physical CPU 0x0
Initializing cgroup subsys cpuset
Linux version 3.13.0-rc2 (tony@vamp) (gcc version 4.8.2 (Ubuntu/Linaro 4.8.2-16ubuntu4) ) #1 SMP PREEMPT Mon Oct 13 15:09:23 EDT 2014
Kernel was built at commit id ''CPU: ARMv7 Processor [410fc0f0] revision 0 (ARMv7), cr=10c53c7d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: V2P-CA15
bootconsole [earlycon0] enabled

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Memory policy: Data cache writealloc
kdebugv2m: Following are test values to confirm proper working
kdebugv2m: Ranges 42000000 0
kdebugv2m: Regs 30000000 1000000
kdebugv2m: Virtual-Reg f0000000
kdebugv2m: pci node addr_cells 3
kdebugv2m: pci node size_cells 2
kdebugv2m: motherboard addr_cells 2
On node 0 totalpages: 131072
free_area_init_node: node 0, pgdat 8072dcc0, node_mem_map 8078f000
Normal zone: 1024 pages used for memmap
Normal zone: 0 pages reserved
Normal zone: 131072 pages, LIFO batch:31
sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956969942ns
PERCPU: Embedded 8 pages/cpu @80b97000 s11648 r8192 d12928 u32768
pcpu-alloc: s11648 r8192 d12928 u32768 alloc=8*4096
pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048
Kernel command line: earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=512MB root=/dev/sda1
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 495584K/524288K available (5248K kernel code, 249K rwdata, 1540K rodata, 295K init, 368K bss, 28704K reserved, 0K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xa0800000 - 0xff000000 (1512 MB)
lowmem : 0x80000000 - 0xa0000000 ( 512 MB)
pkmap : 0x7fe00000 - 0x80000000 ( 2 MB)
modules : 0x7f000000 - 0x7fe00000 ( 14 MB).text : 0x80008000 - 0x806a942c (6790 kB).init : 0x806aa000 - 0x806f3d80 ( 296 kB).data : 0x806f4000 - 0x80732754 ( 250 kB).bss : 0x80732754 - 0x8078e9d8 ( 369 kB)
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Preemptible hierarchical RCU implementation.
RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=1.
NR_IRQS:16 nr_irqs:16 16
Architected cp15 timer(s) running at 25.16MHz (phys).
sched_clock: 56 bits at 25MHz, resolution 39ns, wraps every 2730666655744ns
Switching to timer-based delay loop
Console: colour dummy device 80x30
Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
CPU0: update cpu_power 1024
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x804fee68 - 0x804fee9c
Brought up 1 CPUs
SMP: Total of 1 processors activated.
CPU: All CPU(s) started in SVC mode.
VFP support v0.3: implementor 41 architecture 4 part 30 variant a rev 0
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/aaci@040000
of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/mmci@050000
of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000

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of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
hw-breakpoint: Debug register access (0xee113e93) caused undefined instruction on CPU 0
hw-breakpoint: Debug register access (0xee013e90) caused undefined instruction on CPU 0
hw-breakpoint: Debug register access (0xee003e17) caused undefined instruction on CPU 0
hw-breakpoint: CPU 0 failed to disable vector catch
Serial: AMBA PL011 UART driver
1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
console [ttyAMA0] enabledconsole [ttyAMA0] enabled
bootconsole [earlycon0] disabled
bootconsole [earlycon0] disabled
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io 0x0000-0xffffffff]
pci_bus 0000:00: root bus resource [mem 0x00000000-0xffffffff]
pci_bus 0000:00: root bus resource [bus 00-ff]
pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
PCI: bus0: Fast back to back transfers disabled
pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
pci 0000:00:01.0: BAR 4: assigned [io 0x2f000000-0x2f00000f]
pci 0000:00:01.0: BAR 0: assigned [io 0x2f000010-0x2f000017]
pci 0000:00:01.0: BAR 2: assigned [io 0x2f000018-0x2f00001f]
pci 0000:00:01.0: BAR 1: assigned [io 0x2f000020-0x2f000023]
pci 0000:00:01.0: BAR 3: assigned [io 0x2f000024-0x2f000027]
pci_bus 0000:00: resource 4 [io 0x0000-0xffffffff]
pci_bus 0000:00: resource 5 [mem 0x00000000-0xffffffff]
PCI map irq: slot 0, pin 1, devslot 0, irq: 68
PCI map irq: slot 1, pin 2, devslot 1, irq: 69
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
pps_core: LinuxPPS API ver. 1 registeredpps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
PTP clock support registered
Advanced Linux Sound Architecture Driver Initialized.
Switched to clocksource arch_sys_counter
NET: Registered protocol family 2
TCP established hash table entries: 4096 (order: 2, 16384 bytes)
TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
TCP: reno registered
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.

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RPC: Registered tcp NFSv4.1 backchannel transport module.
PCI: CLS 64 bytes, default 64
hw perfevents: enabled with ARMv7_Cortex_A15 PMU driver, 1 counters available
jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
msgmni has been set to 967
io scheduler noop registered (default)
brd: module loaded
loop: module loaded
ata_piix 0000:00:01.0: version 2.13
PCI: enabling device 0000:00:01.0 (0040 -> 0041)
scsi0 : ata_piix
scsi1 : ata_piix
ata1: PATA max UDMA/33 cmd 0x2f000010 ctl 0x2f000020 bmdma 0x2f000000 irq 69
ata2: PATA max UDMA/33 cmd 0x2f000018 ctl 0x2f000024 bmdma 0x2f000008 irq 69
e100: Intel(R) PRO/100 Network Driver, 3.5.24-k2-NAPI
e100: Copyright(c) 1999-2006 Intel Corporation
e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
e1000: Copyright (c) 1999-2006 Intel Corporation.
PCI: enabling device 0000:00:00.0 (0040 -> 0042)
ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
ata1.00: 6291936 sectors, multi 0: LBA
ata1.00: configured for UDMA/33
scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
sd 0:0:0:0: [sda] 6291936 512-byte logical blocks: (3.22 GB/3.00 GiB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sda: sda1
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:0: [sda] Attached SCSI disk
e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-ke1000e: Copyright(c) 1999 - 2013 Intel Corporation.
igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
igb: Copyright (c) 2007-2013 Intel Corporation.
igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.0.2-k
igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver - version 3.15.1-kixgbe: Copyright (c) 1999-2013 Intel Corporation.
ixgbevf: Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver - version 2.11.3-k
ixgbevf: Copyright (c) 2009 - 2012 Intel Corporation.
ixgb: Intel(R) PRO/10GbE Network Driver - version 1.0.135-k2-NAPI
ixgb: Copyright (c) 1999-2008 Intel Corporation.
smsc911x: Driver version 2008-10-21
smsc911x 1a000000.ethernet (unregistered net_device): couldn't get clock -2
nxp-isp1760 1b000000.usb: NXP ISP1760 USB Host Controller
nxp-isp1760 1b000000.usb: new USB bus registered, assigned bus number 1
nxp-isp1760 1b000000.usb: Scratch test failed.
nxp-isp1760 1b000000.usb: can't setup: -19
nxp-isp1760 1b000000.usb: USB bus 1 deregisteredusbcore: registered new interface driver usb-storage
mousedev: PS/2 mouse device common for all mice
rtc-pl031 1c170000.rtc: rtc core: registered pl031 as rtc0
usbcore: registered new interface driver usbhid
usbhid: USB HID core driverashmem: initialized
logger: created 256K log 'log_main'
logger: created 256K log 'log_events'
logger: created 256K log 'log_radio'
logger: created 256K log 'log_system'

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oprofile: using timer interrupt.
TCP: cubic registered
NET: Registered protocol family 10
NET: Registered protocol family 17
rtc-pl031 1c170000.rtc: setting system clock to 2009-01-01 00:00:00 UTC (1230768000)
ALSA device list:
No soundcards found.
input: AT Raw Set 2 keyboard as /devices/smb.14/motherboard.15/iofpga.17/1c060000.kmi/serio0/input/input0
input: touchkitPS/2 eGalax Touchscreen as /devices/smb.14/motherboard.15/iofpga.17/1c070000.kmi/serio1/input/input2
kjournald starting. Commit interval 5 seconds
EXT3-fs (sda1): using internal journal
EXT3-fs (sda1): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 8:1.
Freeing unused kernel memory: 292K (806aa000 - 806f3000)
random: init urandom read with 14 bits of entropy available
input: AT Raw Set 2 keyboard as /devices/smb.14/motherboard.15/iofpga.17/1c060000.kmi/serio0/input/input0
input: touchkitPS/2 eGalax Touchscreen as /devices/smb.14/motherboard.15/iofpga.17/1c070000.kmi/serio1/input/input2
kjournald starting. Commit interval 5 seconds
EXT3-fs (sda1): using internal journal
EXT3-fs (sda1): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 8:1.
Freeing unused kernel memory: 292K (806aa000 - 806f3000)
random: init urandom read with 14 bits of entropy available
Ubuntu 11.04 gem5sim ttySA0
this will take 30 mins4) gem5sim login: root
root
Welcome to Ubuntu 11.04 (GNU/Linux 3.13.0-rc2 armv7l)* Documentation: https://help.ubuntu.com/
The programs included with the Ubuntu system are free software;
the exact distribution terms for each program are described in theindividual files in /usr/share/doc/*/copyright.
Ubuntu comes with ABSOLUTELY NO WARRANTY, to the extent permitted byapplicable law.
root@gem5sim:~#root@gem5sim:~#-----------------------------*******************---------------------------------------------

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37 GEM5 with RISCV
Download the zip file from (details of ftp or github)Two option for the user:
1) Directly run the command without the build – Extract the patch
GEM5_Patch_Java_14.zip in the Ubuntu and run commands directly from section
50.22) If the user experiences trouble while running directly without building the gem5
from scratch then follow the steps from the section 50.1

37.1

For Ubuntu 18.04 installation steps

1. Assumption: The user has installed Java 14 and VisualSim 2030.
2. mkdir gem5
3. cd gem5
4. sudo apt-get install gcc-riscv64-linux-gnu g++-riscv64-linux-gnu
5. sudo apt install build-essential git m4 scons zlib1g zlib1g-dev libprotobuf-dev
protobuf-compiler libprotoc-dev libgoogle-perftools-dev python-dev python
6. sudo apt-get install libpython3.8-dev
7. sudo apt-get install swig--- if swig is not installed
8. scons build/RISCV/gem5.opt –jn -> (n = 1,2,3 ….number of processor)
9. if there is no error on the terminal then build is complete.

37.2

Run the Gem5 <-> VisualSim (normal run without debugger)1) cd to the gem5 location on terminal and type$ ./interactive_sim.py(this start the gem5 simulator)
2) After Redirecting Stdout shows on terminal, run visualsim model by following
below steps
3) Now open the model in the VisualSim under
demo/interfaces/gem5/gem5_demo.xml
4) Give the correct path in gem5 wrapper block parameter where gem5 is located.
5) Provide parameter gem5iteration = integer number (of your choice)
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6) Run the model
7) Check the plots display and below screenshots

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-------------------------------------------***************--------------------------------------

37.3

Run with debugger -command line:

1) cd to gem5 directory $ gdb --args ./build/RISCV/gem5.opt2) wait for gdb to open up , use run command (step 3) after gdb shows3) (gdb) run --debug-break=1000 --debug-flags=DRAM --interactive./configs/example/se_vs.py --cpu-type=TimingSimpleCPU --cpu-clock=1GHz -sys-clock=1GHz --caches --l1i_size=16kB --l1d_size=16kB --memtype=DDR3_1600_8x8 -c ../MiBench/consumer/jpeg/jpeg-6a/cjpeg -o '-dct int progressive -opt -outfile../MiBench/consumer/jpeg/output_large_encode.jpeg../MiBench/consumer/jpeg/input_large.ppm'
4) Wait for gdb() to show on terminal
5) After Redirecting Stdout shows on terminal, run visualsim model by following
below steps6) Run the visualsim model
7) Now debug the code using gdb commands such as (n, p, f, bt, step, b main, c)8) After debugging type continue or c on the terminal, for rest of iteration to finishedup
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9) Plots will be displayed.
10) For more information refer:

https://www.gem5.org/documentation/general_docs/debugging_and_testing/debug
ging/debugger_based_debugging

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------------------------------------------***********************--------------------------------------------

37.4

Run with debugger - graphical gdb:

1) cd to gem directory$ gdb -tui --args ./build/RISCV/gem5.opt2) wait for gdb to open up , use run command (step 3) after gdb shows3) (gdb) run --debug-break=1000 --debug-flags=DRAM --interactive./configs/example/se_vs.py --cpu-type=TimingSimpleCPU --cpu-clock=1GHz -sys-clock=1GHz --caches --l1i_size=16kB --l1d_size=16kB --memtype=DDR3_1600_8x8 -c ../MiBench/consumer/jpeg/jpeg-6a/cjpeg -o '-dct int progressive -opt -outfile../MiBench/consumer/jpeg/output_large_encode.jpeg../MiBench/consumer/jpeg/input_large.ppm'
4) After Redirecting Stdout shows on terminal, run visualsim model by following
below steps5) Run the visualsim model
6) Now debug the code using gdb commands such as (n, p, f, bt, step, b main, c)7) After debugging type continue or c on the terminal, for rest of iteration to finishedup8) Plots will be displayed.
9) For more information refer: http://beej.us/guide/bggdb/#qref10) NOTE: All the normal gdb commands will work in GUI mode, and additionally thearrow keys and pgup/pgdown keys will scroll the source window (when it has
focus, which it does by default).

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------------------------------------------***********************-------------------------------------------

37.5

Running the Gem5 in System Call Emulation (SE) Mode

The SE mode simulation focuses on the CPU and memory system, and does not emulate the entire system.
In this mode, one only needs to specify the binary file to be simulated. This binary file can bestatically/dynamically linked. configs/examples/se.py is used for configuring and running simulations in thismode. What follows is probably the simplest example of how to use se.py. The binary file to simulated isspecified with option -c.
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1) cd to the gem5 location on terminal and use the below command to run the hello
arm executable.
$ elc1@ubuntu:~/gem5-RISCV/gem5$ ./build/RISCV/gem5.opt./configs/example/se.py -c ./tests/test-progs/hello/bin/riscv/linux/hello

2) For statistics refer –> /gem5/m5out /stats.txt---------------------------------*************************---------------------------------------

37.6

Running the Gem5 (SE mode) in Multi-core1) cd to the gem5 location on terminal and use the below command to run the
hello arm executable.
$ elc1@ubuntu:~/gem5-RISCV/gem5$ ./build/RISCV/gem5.opt
configs/example/se.py --num-cpus=2 -c './tests/testprogs/hello/bin/riscv/linux/hello;./tests/test-progs/hello/bin/riscv/linux/hello'
elc1@ubuntu:~/gem5-RISCV/gem5$ ./build/RISCV/gem5.opt configs/example/se.py --num-cpus=2 -c'./tests/test-progs/hello/bin/riscv/linux/hello;./tests/test-progs/hello/bin/riscv/linux/hello'
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.

gem5 version 20.1.0.0
gem5 compiled Nov 2 2020 17:05:29
gem5 started Nov 6 2020 18:52:21
gem5 executing on ubuntu, pid 2526
command line: ./build/RISCV/gem5.opt configs/example/se.py --num-cpus=2 -c './tests/testprogs/hello/bin/riscv/linux/hello;./tests/test-progs/hello/bin/riscv/linux/hello'
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.slave is deprecated. `slave` is now called `cpu_side_ports`
warn: membus.master is deprecated. `master` is now called `mem_side_ports`
Global frequency set at 1000000000000 ticks per second
warn: No dot file generated. Please install pydot to generate the dot file and pdf.
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (512 Mbytes)
0: system.remote_gdb: listening for remote gdb on port 7003
0: system.remote_gdb: listening for remote gdb on port 7004**** REAL SIMULATION ****
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
info: Increasing stack size by one page.
Hello world!
Hello world!

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Exiting @ tick 3339000 because exiting with last active thread context

When number of cores = 4./build/RISCV/gem5.opt configs/example/se.py --num-cpus=4 -c './tests/testprogs/hello/bin/riscv/linux/hello;./tests/testprogs/hello/bin/riscv/linux/hello;./tests/testprogs/hello/bin/riscv/linux/hello;./tests/test-progs/hello/bin/riscv/linux/hello'2) For statistics refer –> /gem5/m5out /stats.txt---------------------------------*************************---------------------------------------

37.7

Running the Gem5 in Full System (FS) ModeAs currently gem5 supports the RISC-V ISA only in SE mode,

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38 Spike to VisualSim
Spike is a functional RISC-V ISA simulator with full system emulation. We provide the support torun the extracted trace from Spike in the VisualSim Processor model.
The user must run the source code in Spike (linux environment) and extract the erxecuted traceusing the following steps.
1. Compile the source code using the following command:
riscv64-unknown-elf-gcc ./Source_Code/main.c
2. Run the compiled binary using spike simulator and generate the log file using thefollowing command. (a.out is the compiler output)./riscv-isa-sim/build/spike -l --log-commits --isa=RV64IMAC ./riscv-pk/build/pk a.out
2>gcc_out.log
3. Parse the log file using the Spike trace parser in \VS_AR\VisualSim\parser\
4. Use the command line with following format to generate the CSV file VisualSim
model.
Spike_Trace_Parser.py <trace name> <trace path> <_start label starting instr
address in hex (0x...)> <isa path><trace name> : This is the name of the trace. Pennant or Stream etc. It can be any
name. This name will be used to create the output file.
<trace path> : This is the path to the spike output log trace. Example:
D:\Projects\Trace\rvv_test_vector\rvv_test_vector\stream\gcc_out4\gcc_out.log<_start label starting instr address in hex (0x...)> : Open the objdump of thebinary and look for _start label. The starting address in that label needs to be entered.
<isa path> : This is the path to the file riscv_isa_boom.txt
Example format:
Spike_Trace_Parser.py

stream

D:\Projects\Trxace\rvv_test_vector\rvv_test_vector\stream\gcc_out4\gcc_out.log
0x10a2c

D:\Projects\Samsung_SAIT\riscv_isa_boom.txt

5. The parser will provide the CSV file in the same folder where the log file is located.
6. Use this file name in dynamic mapper to assign each instruction to a target RISCV
core.
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Add model image with dynamic mapper and processor coeres

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