TDA7375V
2 x 35W dual/quad power amplifier for car radio1■FEATURES

Figure 1. Package

HIGH OUTPUT POWER CAPABILITY:– 2 x 40W max./4
– 2 x 35W/4 EIAJ
– 2 x 35W/4 EIAJ
– 2 x 25W/4 @14.4V, 1KHz, 10%– 4 x 7W/4 @14.4V,1KHz, 10%– 4 x 12W/2 @14.4V, 1KHz, 10%■ MINIMUM EXTERNAL COMPONENTS
COUNT:– NO BOOTSTRAP CAPACITORS– NO BOUCHEROT CELLS– INTERNALLY FIXED GAIN (26dB BTL)
■ ST-BY FUNCTION (CMOS COMPATIBLE)■NO AUDIBLE POP DURING ST-BYOPERATIONS■DIAGNOSTICS FACILITY FOR:
– CLIPPING– OUT TO GND SHORT– OUT TO VS SHORT– SOFT SHORT AT TURN-ON– THERMAL SHUTDOWN PROXIMITYMULTIWATT15Table 1. Order Codes

2Part NumberPackage

TDA7375V

MULTIWATT 15 (Vertical)

PROTECTIONS:OUPUT AC/DC SHORT CIRCUIT– TO GND– TO VS– ACROSS THE LOAD
■ SOFT SHORT AT TURN-ON■ OVERRATING CHIP TEMPERATURE WITH
■ SOFT THERMAL LIMITER■ LOAD DUMP VOLTAGESURGE■ VERY INDUCTIVE LOADS■ FORTUITOUS OPEN GND■ REVERSED BATTERY■ ESD■Figure 2. Block Diagram

September 2013

Rev. 51/15

TDA7375V

3DESCRIPTIONThe TDA7375V is a new technology class AB car radio amplifier able to work either in DUAL BRIDGE or
QUAD SINGLE ENDED configuration.
The exclusive fully complementary structure of the output stage and the internally fixed gain guarantees
the highest possible power performances with extremely reduced component count.
The on-board clip detector simplifies gain compression operation. The fault diagnostics makes it possible
to detect mistakes during car radio set assembly and wiring in the car.
Table 2. Absolute Maximum Ratings
SymbolParameter

Value

Unit

18

V

Vop

Operating Supply Voltage

VSDC Supply Voltage

28

VVpeakPeak Supply Voltage (for t = 50ms)

50

V

IO

Output Peak Current (not repetitive t = 100s)

4.5

AIO

Output Peak Current (repetitive f > 10Hz)

3.5

APtot

Power Dissipation (Tcase = 85°C)

36W

Tstg, Tj

Storage and Junction Temperature-40 to 150

C

Table 3. Thermal Data
SymbolRth j-caseParameter
Thermal Resistance Junction-case

Figure 3. Pin Connection (Top view)

2/15max

Value

Unit1.8°C/W

TDA7375V
Table 4. Electrical Characteristcs (Refer to the test circuit, VS = 14.4V; RL = 4; f = 1KHz; Tamb = 25°C,
unless otherwise specified)SymbolParameter

VS

Supply Voltage Range

Id

Total Quiescent Drain Current

VOS

Output Offset Voltage

POOutput Power

Test Condition

Min.

Typ.

8
RL = Max.

Unit

18V

150mA

150mV

THD = 10%; RL = 4Bridge
Single Ended
Single Ended, RL = 2

236.5

25712WWW

VS = 14.4V, Bridge

3640W

3235W

PO maxMax. Output Power (***)

PO EIAJEIAJ Output Power (***)

VS = 13.7V, Bridge

THD

Distortion

RL = 4
Single Ended, PO = 0.1 to 4W
Bridge, PO = 0.1 to 10W

0.020.03

f = 1KHz Single Ended

70dB

f = 10KHz Single Ended

60dB

60dB

CT

Cross Talk

f = 1KHz Bridge

55

f = 10KHz Bridge
RIN
GV

Input Impedance

Voltage Gain

GV

Voltage Gain Match

EIN

Input Noise Voltage

0.3%%dB

Single Ended

2030K

Bridge1015K

Single Ended

192021Bridge

252627dB

0.5dB

Rg = 0; ”A” weighted, S.E.
Non Inverting Channels
Inverting Channels
BridgeRg = 0; 22Hz to 22KHz

SVR

Supply Voltage Rejection

Rg = 0; f = 300Hz50

ASB

Stand-by Attenuation

PO = 1W

80

ISB

ST-BY Current Consumption

VST-BY = 0 to 1.5V

VSB

ST-BY In Threshold Voltage

VSB

ST-BY Out Threshold Voltage

Ipin7

ST-BY Pin Current

dB

25

VV

3.5

VdB

90

dB
100
1.5

3.5

AV
V

Play Mode Vpin7 = 5V50

AMax Driving Curr. Under Fault (*)

5mA

cd offClipping Detector Output
Average Current

d = 1% (**)

90

A

Icd onClipping Detector Output
Average Current

d = 5% (**)

160

A

Vsat pin10

Voltage Saturation on pin 10

Sink Current at Pin 10 = 1mA

I0.7V(*) See built-in S/C protection description(**) Pin 10 Pulled-up to 5V with 10K; RL = 4(***) Saturated square wave output.

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TDA7375V

4

STANDARD TEST AND APPLICATION CIRCUIT

Figure 4. Quad Stereo
10K R1ST-BY
C710μFIN FL

413731C1 0.22μF
IN FR

512C4 0.22μF

OUT FLC9 2200μF

OUT FR

C11 2200μF

OUT RLC12 2200μF

OUT RR15IN RR

11C3 0.22μF

Note:
C9, C10, C11, C12 could be reduced
if the 2W operation is not required.

C10 2200μF
2C2 0.22μF
IN RL

VS
C51000μF

C6100nF

6148109C8 47μF

DIAGNOSTICS

D94AU063A

Figure 5. Double Bridge
10K R1ST-BY
C510μF
IN L

74C1 0.47μF

IN R

3131OUT L

5212C2 0.47μF

1511OUT R
146C8 47μF

VSC31000μF

C4100nF

8910
DIAGNOSTICS

D94AU064A

Figure 6. Stereo/Bridge
10K
ST-BY

VS10μF

IN L100nF
7413310.22μF
IN L

2200μF5212152200μF

0.22μF
IN BRIDGE
0.47μF

1000μF

8OUT ROUTBRIDGE

116OUT L

9101447μF
DIAGNOSTICS

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D94AU065A

TDA7375V
Figure 7. P.C. Board and Component Layout of the fig.4

Figure 8. P.C. Board and Component Layout of the fig.5

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TDA7375V
Figure 9. Quiescent Drain Current vs. Supply
Voltage (Single Ended and Bridge).

Figure 12. Output Power vs. Supply Voltage

Figure 10. Quiescent Output Voltage vs.
Supply Voltage (Single Ended andBridge).

Figure 13. OutputPower vs. Supply VoltageFigure 11. Output Power vs. Supply Voltage

Figure 14. Distortion vs. Output Power

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TDA7375V
Figure 15. Distortion vs. Output Power

Figure 18. Supply Voltage Rejection vs.
Frequency

Figure 16. Distortion vs. Output Power

Figure 19. Supply Voltage Rejection vs.
Frequency

Figure 17. Cross-talk vs. Frequency

Figure 20. Stand-by Attenuation vs. Threshold
Voltage

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TDA7375V
Figure 21. Total Power Dissipation andEfficiency vs. Output Power5

Figure 22. Total Power Dissipation andEfficiency vs. Output Power

GENERAL STRUCTURE

5.1 High Application Flexibility
The availability of 4 independent channels makes it possible to accomplish several kinds of applications
ranging from 4 speakers stereo (F/R) to 2 speakers bridge solutions.
In case of working in single ended conditions the polarity of the speakers driven by the inverting amplifiermust be reversed respect to those driven by non inverting channels. This is to avoid phase inconveniencescausing sound alterations especially during the reproduction of low frequencies.
5.2 Easy Single Ended to Bridge Transition
The change from single ended to bridge configurations is made simply by means of a short circuit acrossthe inputs, that is no need of further external components.
5.3 Gain Internally Fixed to 20dB in Single Ended, 26dB in Bridge
Advantages of this design choice are in terms of:■componentsand space saving■

output noise, supply voltage rejection and distortion optimization.

5.4 Silent Turn On/Off and Muting/Stand-by Function
The stand-by can be easily activated by means of a CMOS level applied to pin 7 through a RC filter.
Under stand-by condition the device is turned off completely (supply current = 1A typ.; output attenuation= 80dB min.). Every ON/OFF operation is virtually pop free. Furthemore, at turn-on the device stays inmuting condition for a time determined by the value assigned to the SVR capacitor.
While in muting the device outputs becomes insensitive to any kinds of signal that may be present at theinput terminals. In other words every transient coming from previous stages produces no unplesantacoustic effect to the speakers.
5.5 STAND-BY DRIVING (pin 7)
Some precautions have to be taken in the definition of stand-by driving networks: pin 7 cannot be directly

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driven by a voltage source whose current capability is higher than 5mA. In practical cases a series resistance has always to be inserted, having it the double purpose of limiting the current at pin 7 and to smooth
down the stand-by ON/OFF transitions - in combination with a capacitor - for output pop prevention.
In any case, a capacitor of at least 100nF from pin 7 to S-GND, with no resistance in between, is necessary
to ensure correct turn-on.
5.6 OUTPUT STAGE
The fully complementary output stage was made possible by the development of a new component: theST exclusive power ICV PNP.
A novel design based upon the connection shown in fig. 23 has then allowed the full exploitation of its possibilities. The clear advantagesthis new approach has over classical output stages are as follows:
5.6.1 Rail-to-Rail Output Voltage Swing With No Need of Bootstrap Capacitors.
The output swing is limited only by the VCEsat of the output transistors, which is in the range of 0.3 (Rsat)
each. Classical solutions adopting composite PNP-NPN for the upper output stage have higher saturation
loss on the top side of the waveform.
This unbalanced saturation causes a significant power reduction. The only way to recover power consistsof the addition of expensive bootstrap capacitors.
5.6.2 Absolute Stability Without Any External Compensation.
Referring to the circuit of fig. 23 the gain VOut/VIn is greater than unity, approximately 1+R2/R1. The DC
output (VCC/2) is fixed by an auxiliary amplifier common to all the channels.
By controlling the amount of this local feedbackit is possible to force the loop gain (A*) to less than unity
at frequency for which the phase shift is 180°. This means that the output buffer is intrinsically stableand
not prone to oscillation.
Most remarkably, the above feature has been achieved in spite of the very low closed loop gain of theamplifier. In contrast, with the classical PNP-NPN stage, the solution adopted for reducing the gain at highfrequencies makes use of external RC networks, namely the Boucherot cells.
5.7 BUILT–IN SHORTCIRCUIT PROTECTION
Figure 23. The New Output Stage

Reliable and safe operation, in presence of all kinds of short circuit involving the outputs is assured by
BUILT-IN protectors. Additionally to the AC/DC short circuit to GND, to VS, across the speaker, a SOFTSHORT condition is signalled out during the TURN-ON PHASE so assuring correct operation for the de-

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TDA7375V
vice itself and for the loudspeaker.
This particular kind of protection acts in a way to avoid that the device is turned on (by ST-BY) when aresistive path (less than 16 ohms) is present between the output and GND. As the involved circuitry is normally disabled when a current higher than 5mA is flowing into the ST-BY pin, it is important, in order not
to disable it, to have the external current source driving the ST-BY pin limited to 5mA.
This extra function becomes particularly attractive when, in the single ended configuration, one capacitor
is shared between two outputs (see fig. 24). Supposing that the output capacitor Cout for anyreason isshorted, the loudspeaker will not be damaged being this soft short circuit condition revealed.
Figure 24. Single ended configuaration circuit

5.7.1 Diagnostics Facility
The TDA7375 is equipped with a diagnostic circuitry able to detect the following events:■

Clipping in the output signal■

Thermal shutdown■

Output fault:– short to GND– short to VS– soft short at turn on
The information is available across an open collector output (pin 10) through a current sinking when theevent is detected A current sinking at pin 10 is triggered when a certain distortion level is reached at anyof the outputs. This function allows gain compression possibility whenever the amplifier is overdriven.
5.7.2 Thermal Shutdown
In this case the output 10 will signal the proximity of the junction temperature to the shutdown threshold.
Typically current sinking at pin 10 will start ~10°C before the shutdown threshold is reached.
Figure 25. Clipping Detection Waveforms

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TDA7375V
Figure 26. Output Fault Waveforms (see fig. 27)

Figure 27. Fault Waveforms

5.8 HANDLING OF THE DIAGNOSTICS INFORMATIONAs various kinds of information is available at the same pin (clipping detection, output fault, thermal proximity), this signal must be handled properly in order to discriminate each event.
This could be done by taking into account the different timing of the diagnostic output during each case.
Normally the clip detector signalling produces a low level at pin 10 that is shorter than that present underfaulty conditions; based on this assumption an interface circuitry to differentiate the information is represented in the schematic of fig. 29.

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TDA7375V
Figure 28. Waveforms

Figure 29. Interface circuitry to differentiate the information schematic

5.9 PCB-LAYOUT GROUNDING (general rules)
The device has 2 distinct ground leads, P-GND (POWER GROUND) and S-GND (SIGNAL GROUND)
which are practically disconnected from each other at chip level. Proper operation requires that P-GND
and S-GND leads be connected together on the PCB-layout by means of reasonably low-resistancetracks.
As for the PCB-ground configuration, a star-like arrangement whose center is represented by the supplyfiltering electrolytic capacitor ground is highly advisable. In such context, at least 2 separate paths haveto be provided, one for P-GND and one for S-GND. The correct ground assignments are as follows:
STANDBY CAPACITOR, pin 7 (or any other standby driving networks): on S-GND
SVR CAPACITOR (pin 6): on S-GND and to be placed as close as possible to the device.
INPUT SIGNAL GROUND (from active/passive signal processor stages): on S-GND.
SUPPLY FILTERING CAPACITORS (pins 3,13): on P-GND.
The (-) terminal of the electrolytic capacitor has to be directly tied to the battery (-) line and this should
represent the starting point for all the ground paths.
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TDA7375V

6PACKAGE INFORMATION

In order to meet environmental requirements, ST (also) offers these devices in ECOPACK® packages.
ECOPACK® packages are lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 30. Multiwatt 15 Mechanical Data & Package Dimensions
DIM.

mm
MIN.

TYP.

inch
MAX.

MIN.

TYP.

A5MAX.
0.197

B

2.65

C

1.6

DOUTLINE AND
MECHANICAL DATA0.104
0.063

10.039

E

0.49

0.55

0.019

0.022

F

0.66

0.75

0.026

0.030

G

1.02

1.27

1.52

0.040

0.050

0.060

G1

17.53

17.78

18.03

0.690

0.700

0.710

H1

19.6

0.772

H2

20.2

0.795

L

21.9

22.2

22.5

0.862

0.874

0.886

L1

21.7

22.1

22.5

0.854

0.87

0.886

L2

17.65

18.1

0.695

L3

17.25

17.5

17.75

0.679

0.689

0.699

L4

10.3

10.7

10.9

0.406

0.421

0.429

0.191

0.713

L7

2.65

2.9

0.104

M

4.25

4.55

4.85

0.167

0.179

0.114M1

4.73

5.08

5.43

0.186

0.200

S

1.9

2.6

0.075

0.102

S1

1.9

2.6

0.075

0.102

Dia1

3.65

3.85

0.144

0.152

0.214

Multiwatt15 (Vertical)

0016036 J

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TDA7375V

7

REVISION HISTORY

Table 5. Revision History

14/15

Date

Revision

Description of Changes

July 2004

2

First Issue in EDOCSMarch 2005

3

Changed the Style-sheet in compliance to the new “Corporate TechnicalPubblications Design Guide”.
Deleted package Multiwatt15 Horizontal.

01-Jul-2008

4

Updated the root part number in the title of the cover page.
Added Ecopack information in “PACKAGE INFORMATION” section.

20-Sep-2013

5

Updated Disclaimer.

TDA7375V

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