Integrated DeviceTechnology
ANALOG AND RF|INTERFACE AND CONNECTIVITYRAPIDIO FOR SERVER AND
SUPERCOMPUTING• Scalability- Peer-to-peer, “any-to-any” topologies from 1Gbps
to 20 Gbps with native processor interface- Mesh, star, dual star, hypercube, etc.
- Scales to 64k processing nodes, 66 bit
memory addressing- 3-layer protocol terminated in hardware withno software intervention- Direct processor interface up to 20 Gbps
with NO NIC- Smallest form factor with 1/10th footprint perGflop in ARM based server vs. x 86 with EthernetNIC.
• Latency- 100 ns cut through latency for switches- End-to-end sub microsecond packet termination
latency with reliable transmission, orders ofmagnitude better than ethernet• Power- Typical power approximately 300 mW per
10 Gbps in switch- No additional power from NICs meaning
approximately 1/10th the power required forscale out with Ethernet systems requiring NICs
- Lowest power per payload bit vs. otherinterconnect protocols
PROTOCOL COMPARISON
48
SRIO 10xN 4 x 10.3125G
SRIO 4 x 6.25G
PCI Express 2 4 x 5G
10G Ethernet UDP

Bandwidth (Gbps)

401618|MEMORY AND LOGIC|POWER MANAGEMENT|

TIMING AND SYNCHRONIZATION

RapidIO for Multi Processor Systems
RapidIO is the interconnect that was developed for peer-to-peer inter-processor communication
between devices on a board, between boards across a backplane and between chassis throughcabling. RapidIO is optimized for low latency, low power interconnect in embedded systems wherethousands of processors need to communicate in a system with “any-to-any” traffic. RapidIO’s largest
market was in wireless bases station where it is used to connect large number of processing nodes
with up to 20 Gbps interconnect directly on processors without NICs, adaptors and software intervention. This provides a uniform interconnect inside the system in very tight small form factors. All of these
attributes have emerged as major requirements in both servers and supercomputing systems today.
RapidIO also addresses the overall energy requirements of both data centers and supercomputing.

RapidIO: the Ideal Scalable Interconnect for Servers and Super Computing
Historically, a server was a computer connected to an ethernet network with network interface controller. Over time this LAN topology was pushed inside the rack with large quantities of processors allconnected to a top-of-rack switch through NIC’s. This in effect collapses a LAN based topology into arack, but carries all the drawbacks of the historic architecture. RapidIO has solved the multi processor
problem by addressing the interconnect problem from the processor to processor angle rather than theprocessor to “network” angle. RapidIO-connected servers and supercomputers can use both backplane based and top-of-rack-based switching with latencies as low as 100ns through switches and lessthan 1 microsecond end-to-end between processing nodes.

The New Wave: X86, ARM and PowerPC based Servers with RapidIO

1680RapidIO® Interconnect forServers and Supercomputing

1101001000

10000

PDU Size (Bytes)

Up to 20 Gbps per port with native processor
interface• Highest protocol efficiency in embedded systems
with 94% payload versus header efficiency• Serial RapidIO standard supports arbitrary system
topology with true peer-to-peer networking• Twice the performance per link compared to10 Gb Ethernet• RapidIO messaging support for transfers of large
blocks of data, superior to PCIe and 10 GbE intarget applications

Servers can be designed with processors from all vendors, either with native RapidIO interface or withexternal connect with IDT PCIe® to S-RIO bridging devices. ARM and PowerPC based processors areavailable in the industry with 20 Gbps RapidIO interfaces. This allows for highly dense scalable server systems with low power and small form factors for x86 based RapidIO servers. Supercomputing
systems based on RapidIO and ARM processors are leading the industry for energy efficiency withproducts that are as high as twice the energy efficiency of the top tier of the Green 500.

Interconnect: Scalability-Latency-Hardware Termination
SCALABILITY

LOW LATENCYHARDWARE
TERMINATED

GUARANTEEDDELIVERYEthernet

PCIePCIeEthernetin s/w onlyRapidIO interconnect combines the best attributes of PCIe and Ethernet in a multi-processor fabric
IDT | INTEGRATED DEVICE TECHNOLOGYRAPIDIO FOR SERVERS AND SUPER COMPUTING PRODUCT BRIEF 1

Integrated DeviceTechnology
ANALOG AND RF|RapidIO® Interconnect for Servers and Supercomputing

INTERFACE AND CONNECTIVITY|MEMORY AND LOGIC|POWER MANAGEMENT|TIMING AND SYNCHRONIZATIONRAPIDIO GEN2 FEATURES• 20 Gbps per port with native Processor interface
on integrated SoC’s• Production switching and bridging porfolio withover 6 million devices shipped connecting over30 million processing nodes

PPCCPU• 100ns cut through latency through switches

ARMCPU• Sub microsecond latency for end-to-end
transactions

40Gbps S-RIO
Per port to front panel• 100 cm long reach per lane over 2 connector
across backplanes @ 6.25 Gbaud• Built-in reliable transmission

CPUNICServerRapidIOSwitch• 2W for PCIe2 to S-RIO2 NIC• Top-of-rack scalable RapidIO switch devices
available from industry with 20 Gbps per port

X86

PCIe- S-RIO• 300 mW per 10 Gbps

Scalable Server Design with multiple processor options: X86, PowerPC, ARM• Extensive portfolio of switches and bridging
products in production.
RAPIDIO 10xN TECHNOLOGYENHANCEMENTS• 40 Gbps per port with native Processor interface
on integrated SoC’s

ARM
CPU

ARM
CPU

ARM
CPUARM
CPUARM• Large Lane Count 40 Gbps backplane switching• PCIe 3 to S-RIO 10xN NICsARM• 100 cm long reach over 2 connector acrossbackplanes @ 10.3125 GbaudARM

CPU

CPU

ARM
CPU

RAPIDIOSWITCH

ARM

CPU

CPU

ARM

ARM
40Gbps S-RIOCPU
Per port to front panelCPU• 64/67 encoding for greater efficiency over8b/10b encoding

ARM
CPU

TARGET APPLICATIONS• Super Computer

RapidIO
Backplane
Switch20-40Gbps
per Port

ARM

CPU

ARM
CPU

ARM
CPU

ARM
CPU

ARM based Server with Rapid IO!

• Blade Server• Micro Server• Top-of-Rack RapidIO switching

RapidIO vs. Ethernet Processor Access• X86, ARM, PowerPC based servers
Ethernet
LAN
Interconnect

PCI Express
Gen2Processor
X86
35 x 35

PCI Express
Gen2@16Gbps

SouthBridge
27 X 27Ethernet
NIC
25 x 25

10Gb
Ethernet

RapidIO vs. Ethernet Processor Acccess
Form Factor 10x

Long Latency Path

Integrated
Rapid IO

ARM

Discover what IDT know-how
can do for you:www.IDT.com/go/rapidio

LatencySouth(ns)Bridge27x27

RapidIO

Integrated
RapidIO

Ethernet
Processor
Rapid IOLAN Direct
X86
Processor Processor
Interconnect
35x35Interconnect

PCI Express
20Gen2Gbps
Ethernet

>1000

Form
Rapid
IO Factor<10010x

PCI Express
Gen2 @ 16

Interconnect
BoardGbp
psIncremental
Power
Discrete Ethernet
Density
NIC (w)
Devicesfactor

10 Gb
Ethernet

25x2510x2~101x0>0.25

Short Latency PathLong Latency Path
Footprint, latency, power comparison
with x86 + Ethernet Server
Latency

Board

Incremental

Interconnect

IntegratedRa idIO
RapidI

RapidIO(ns)DensityDiscretePower2 Gbps
20DirectfactorDevices
(W)
Rapi
p dIO
Processor
Processor
ARM
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters
Interconnectof the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer
products. The information contained herein is provided without representation or warranty of any kind, whether
express or implied, including,but not limited to, thesuitability of IDT’s products
an implied
Ethernet>1000
10x
2 for any particular purpose,~10warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably
expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.

Form factor 1x

Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. © Copyright 2010. All rights reserved.

IDT | INTEGRATED DEVICE TECHNOLOGYPB_RapidIO_SERVERS_REVA_0913

RapidIO<1000 PRODUCT >0.25
RAPIDIO FORSERVERS AND
SUPER 1x
COMPUTING
BRIEF 2

Short Latency Path