A Functional Unit with Small Variety of Highly Reliable Cells
Kazunori Suzuki, Takashi Nakada, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima, NAIST{kazunori-s, nakada, m-naka, ger, nakashim}@is.naist.jp

Background and Highly Reliable Cells(HRCs)
Abstract
Recently, the miniaturization process has brought an increase in
the failure rate of transistors. We propose new standard cells
called Highly Reliable Cells (HRCs) to decrease the failure rate.
HRCs can correct and detect transistor faults. A functional unit
with HRCs achieves higher fault tolerance. The area of the unit isapproximately 1.4 times larger compared to traditional cells.
HRCs increasing rate to the total cell variety is a small, to increase the reliability of the circuit. HRCs output the correct valueor the wrong value. The wrong value will indicate that the circuit
had faults and the result is not valid.
・Three features of HRCs;

Basic idea of HRCs
・A positive and negative logic is used in input and output
・Transmission gates are used as base elements- The amount of transistors is higher than in traditional cells- By using transmission gates, we can arrange transistors evenly(A) An HRC will work correctly even if one transistor has a fault(B) If more than two transistors have faults, an HRC will output the wrong value(C) If the input contains the wrong value, the output will be the wrong value

XYX

OUT

Y

(A)

X

OUT

Y(B)

OUT

(A) Traditional cell(C)(B) HRCs (LEOR)

Behavior of HRCs
With single fault

With the wrong value=0Transistor Aweak 1=1=1・The situation that transistor A
has a fault
・The input is (X,X,Y,Y)=(0,1,1,0)}=0・When the input contains the wrong
value, this cell outputs the wrong
value

weak 1=1

・This cell works correctly undersingle fault
Output of EOR}

weak 0=1

not
operate- Only NMOS is working- NMOS outputs normal 0 and weak 1
which cancels each other, resulting
EOR outputs weak 0 the wrong
value
EOR outputs weak 0

normal 0=0- EOR outputs weak1 the correct
value- EOR outputs 0
weak 1
・The nature of NMOS makes it
hard to pass a high value=1・When input is (X,X,Y,Y)=(1,0,1,1)

Output of EOR

The correct value and the wrong value

Implementation of 64bit comparators

・When either of transistors in transmission gate has a fault- An HRC works correctly and outputs either (0,1) or (1,0)- The output (0,1) or (1,0) are called the correct value

64bit comparator(traditional cell)・ When both of transistors in transmission gate have faults- An HRC work incorrectly and outputs either (0,0) or (1,1)- The output (0,0) or (1,1) are called the wrong value
10
10SXXYYS10XX

S 11Y

S 1works
0 Y incorrectly

64bit comparator(HRC)Triple
ModularRedundancy(TMR)

64bit comparator(traditional cell)
64bit comparator(traditional cell)(B) SingleComparator

64bit comparator(HRC)(A) Triple comparators with TMR

Final
SelectCircuit(FSL)(C) Double comparators with FSL

・We evaluated three 64bit comparators
Puts the wrong value(A) Triple traditional cell comparators with TMR(B) A single HRC comparator(C) Double HRC comparators with the Final Select Circuit (FSL)

Proposed new fault model

Evaluation

・ Two types of open faults are assumed in the proposed fault

Thenumberoftransistors
inasingle
・Circuit
Area #Trans. Delay[ps]HRC is approximately equal to triple
Traditional 432 5364 1063.3
traditional cell; however the delay
Single HRC 312 5472
923.9
of a single HRC is lower than tradiDouble HRC 624 11200 1017.7
tional cellmodel- One of the lines in the cell has come down (× in Figures)- An open fault has assumed between the source and the drain ofthe MOS ( in Figures)

・ The open fault probability per unit area is used in a calculation

the failure rate ofwhole curcuitof fault tolerance- One unit area includes 16 transistors
533 34

625

21
126

BOUTX

4Y
748(A) NAND Layout

9 16 131520
172235 3637 38
23

52A

728

11132721229

EOR

1830 318Y
3 19

14 10EOR

632

X

2439 40(B) HRCs Layout (LEOR)

・On 1Fit, double HRC comparators
tolerates 67 times more openfaults per unit area than triple
traditional cell comparators

10-3
10-6
10-9
10-12

10-15 -8
10

1Fit

1 failure- 1Fit = 109 hours of operation

Traditional
Single HRC
Double HRC

10-4
open faults per unit area

100・We made a chip which contains asingle HRC comparator with single
fault and observed that the circuit
outputs the wrong value