IEEE PEDS 2019, Toulouse, France
9 – 12 July 2019

Pure Sinusoidal Output Current-Source Inverter Using
New Current Waveform Generation Technique
Eka Rakhman Priandana1*, Toshihiko Noguchi2
Graduate School of Science and Technology, Shizuoka University
Hamamatsu, Japan1
eka.rakhman.priandana.17@shizuoka.ac.jp, 2noguchi.toshihiko@shizuoka.ac.jp

Keywords-current-source inverter; staircase multilevel current;
linear compensating current; superimposition; efficiency;
harmonics; simulation.

Iolinear...

Abstract-A novel technique which is able to generate a puresinusoidal output current waveform for the single-phase currentsource inverter is proposed in this paper. The proposed techniqueincorporates a staircase multilevel current waveform generator
and a class-D amplifier-based linear compensating current
waveform generator. This linear compensating current issuperimposed onto the staircase current waveform in order toreform the output current to a pure sinusoidal waveform. All
generated dc link currents are maintained by sensing the load
voltage. Therefore, regardless of the load condition, the output
current waveform is always constructed on the same number oflevels. As a result, the proposed system has efficiency up to 90%
and less than 2% output total harmonic distortion without usinglarge output capacitor filter according to computer simulation.

IoM-1
Io2

...

Current Sources

0~I/M

Polarity
Alternator

I/M

Switching Modules

I/M

I/M

QB

QA

...

vo
io Load
Co

QM-1

Q2

Q1

QC

QD

Fig. 1. Generalized concept of hybrid multilevel current-source inverter.

I.

INTRODUCTION

Basically, the power inverters are operated based on theswitching action in order to optimize the dc-to-ac conversion
efficiency, but the output passive filters are indispensable
required to reduce the harmonics caused by the switchingaction. On the other hand, the linear amplifiers can generate apure sinusoidal waveform, but with very poor power
conversion efficiency. Therefore, they are not suitable to be
applied as power inverters [1].
The main target for the power converter development isgenerating pure sinusoidal waveform with low total harmonic
distortion (THD) without utilizing large output passive filters
and without sacrificing the efficiency. Methods to achieve thisgoal are either using high-frequency pulse-width modulation(PWM) techniques or employing multilevel techniques.
However, each technique has own disadvantage. The highfrequency switching techniques lead to high switching losses,
while the multilevel techniques lead to high conduction losses[2].
Eka Rakhman Priandana is with National Laboratory for Energy
Conversion Technology (B2TKE) from Agency for The Assessment andApplication of Technology (BPPT). Gedung Energi 620-625, Cluster 5
Puspiptek Serpong, Tangerang Selatan, Banten 15314, Indonesia. E-mail:eka.priandana@bppt.go.id.
Toshihiko Noguchi is with Department of Engineering, Electric andElectronics Engineering Course, Graduate School of Integrated Science andTechnology, Shizuoka University. 3-5-1 Johoku, Naka-Ku, Hamamatsu,
Shizuoka 432-8561, Japan. E-mail: noguchi.toshihiko@shizuoka.ac.jp.

Power inverter can be broadly classified into two types, they
are voltage-source inverter (VSI) and current-source inverter(CSI). The VSI system has been widely developed andcurrently is the most applied in industries. Unfortunately, thiskind of inverter will encounter problem while supplying heavy
inductive loads such as ac motors. The VSI does not haverobust self-protection from short circuit load and has high dv/dt
or di/dt transient behavior.
Meanwhile, the current-source inverter (CSI) is less applied
due to main disadvantages: high conduction losses and low
power density. The highest efficiency can be achieved only if
the CSI supplies heavy load. Nonetheless, its advantage suchas having natural protection from short circuit and low dv/dt ordi/dt cannot be neglected. Therefore, the further CSI
development is still required in order to provide an alternative
solution in power electronics.
Recently, the authors [3] have reported a new concept of a
hybrid multilevel CSI by combining staircase current
waveform generator with a linear current waveform generator
as described in Fig. 1. However, the actual implementation of
the proposed idea is still unclear from the viewpoint of current
generation and power source configuration. The system canbe improved if only a single power source is used.
This paper proposes new technique to generate puresinusoidal output for multilevel CSI by adopting Fig. 1
concept. The circuit in Fig. 1 is modified by means ofreplacing the current source with a buck chopper circuit.
Therefore, multiple buck chopper-based current sources can

978-1-5386-6499-5/19/$31.00 ©2019 IEEEIEEE PEDS 2019, Toulouse, France
9 – 12 July 2019

IL
L

IN

OUT
D3

Q1
D1

D2
Q2

Fig. 3. DC current module circuit.
TABLE IDC CURRENT MODULE OPERATION PRINCIPLE
Q1
0
SwitchingX

Fig. 2. Operation principle of the hybrid multilevel CSI.

draw power from single power source. The buck choppers
which commanded to generate constant current are operated byswitching modules to generate staircase current waveform,
while the remaining buck chopper is operated using class-D
amplifier technique in order to generate linear current.
This paper is organized as follows: first, the operation
principle and circuit configuration of the proposed circuit are
introduced. Next, the control and switching strategies areelaborated. In order to evaluate and compare the fundamental
operation, several multilevel CSI operations of the proposed
circuit are demonstrated by computer simulations. From thesimulation results, the output current is constructed on thesame number of levels regardless of the load condition.
Moreover, the THD of the load voltage is still below 2%
although a small capacitor is used. And the most important isthe efficiency of the proposed system can reach up to 90%.
II.

OPERATION PRINCIPLE & CIRCUIT CONFIGURATION

A. Operation Principle
A multilevel CSI is a power electronic device which canprovide desired alternating current level at the output using
multiple lower level dc currents as an input. Mostly, in thevoltage-source inverter topology, a two-level inverter is usedin order to generate the ac voltage from dc voltage. On theother hand, in the current-source topology, a high number oflevels is needed in order to reduce the conduction losses. As
described in Fig. 1, the proposed hybrid multilevel CSI
consists of constant current sources, a linear current source,
switching modules, and a polarity converter (or inverter) that
represented by a H-bridge circuit. The number of the current
sources and the switching modules corresponds to the numberof CSI levels that expressed by
M = (Nlevel – 1) / 2,

(1)

where the M is defined as the number of stages.

Q2
X
0
1

Output0
IL0

X = don’t care.

The stage M represents the number of current sources andswitching modules that needed by a multilevel CSI system.
Each current source generates equal small amount of theconstant current, while each switching module preserves theflowing current continuation by whether delivering forward to
the load or circulating back to the source.
Fig. 2 illustrates the operation principle of the hybrid
multilevel CSI. For this instance, the operation of 13-level ispresented. In the case of 13-level, by using (1) the number ofrequired stages is six. The first five stages are used forgenerating staircase current waveform, meanwhile theremaining one stage is required for generating linear current
waveform. In order to generate pure sinusoidal current
waveform, after all generated currents are connected in a dc
link node, a H-bridge is utilized to alternate the polarity of thecurrent whenever the zero-crossing of the reference is
detected. Therefore, all currents are generated in unipolar
form and no bipolar source is utilized. Because of using linear
current as compensator, a smaller output capacitor is required
for smoothing the waveform from high-frequency very-lowamplitude ripples.
B. DC Current Module
As shown in Fig. 1, the dc current sources are indispensable
in the CSI system. A dc current source can be constructed by
employing dc voltage source buck chopper [4][5][6]. In order
to compact the circuit, the switching module part is combinedwith the buck chopper circuit. This merged circuit is called dc
current module as depicted in Fig. 3. The operation principleof this circuit is explained in Table I. As described, this dc
current module represents the number of stages M.
The buck chopper part consists of a controlled power switch
Q1, a smoothing inductor L, and a freewheeling diode D1. The
chopper switch is used for converting the voltage source to a
current source by regulating the dc current flowing through thesmoothing inductor. To reduce the smoothing inductor size,

978-1-5386-6499-5/19/$31.00 ©2019 IEEEIEEE PEDS 2019, Toulouse, France
9 – 12 July 2019

DC Current
Module-1

QB

QA

DC Current
Module-(M-1)

DC Current
Module-M
DC Source

Im/M

...

...

DC Current
Module-2

Im/M

Im/M

vo
io Load0~Im/M

Co

...

QD

QC

Fig. 4. Proposed design.

the high switching frequency PWM operation is applied.
Freewheeling diode is used to keep continuous current flowing
through the smoothing inductor.
The switching module part consists of a controlled powerswitch Q2 and two reverse-blocking diodes, i.e. D2 and D3.
The switching module part directs the current from thesmoothing inductor whether flowing forward to the load or
circulating back to the chopper. The switching module partworks based on the comparison between the absolute value ofthe reference sinusoidal with the current limit of each stage.
Therefore, this part employs low switching frequency
operation.
C. Proposed Design
By multiplying the dc current module to the desired numberof stages, and then connected with a H-bridge and a powersource, the final proposed system is shown in Fig. 4. In thisfigure, the load is supplied by a current io so that gives the loada potential difference of vo. Because of io is ac current,
therefore it has a maximum or peak value of Im where equals
to io√2, and this value is divided equally to several dc current
modules that corresponds to the desired level. For example, if
the desired level is 13-level, then the Im is divided by six. The
dc current module number 1 through 5 are commanded togenerate a constant current of Im/6 amperes, while the dc
current module number 6 is commanded to generate linear
current that vary from 0 ampere to Im/6 amperes.
D. Conduction Losses of The Proposed System
As explained before that for the N-level CSI with M DC
current modules, if the maximum amplitude of N-level output
current is Im, then the flowing current through each DC current
module is expressed as
IDCM = Im / M.

(2)

If each DC current module is assumed to have resistance of
RDCM, the module conduction losses (PDCM) caused by thiscurrent is expressed as
=

=

.

(3)

Fig. 5. Conduction losses characteristic of the proposed system.
IL
VREF

+–

PIC

√2/M

IREF

–
+

PIC

+
–

RMS

Plant

vo

Fig. 6. General scheme of the proposed system current controller.

The total conduction losses due to the DC current modules
in a N-level CSI can be expressed as
_

=

×

=

.

(4)

Referring to (1), the lowest N-level number is three. If eachconduction losses of several N-level CSI are normalized to 3level CSI, then the higher number of levels gives lower
conduction losses as shown in Fig. 5 [4]. However, the power
losses are not only from conduction losses, but also fromswitching losses. Therefore, it is important to test several
multilevel CSIs with different number of levels in order toevaluate and compare the total losses of the proposed circuit.
III.

CONTROL & SWITCHING STRATEGIES

A. Output Control
In order to maintain the output stability, the rms value of theload voltage is sensed and controlled. Fig. 6 shows the generalscheme of the proposed system controller. This rms value isthen subtracted with the voltage reference VREF in order toproduce an error. Next, this error is amplified with first
proportional-integral (PI) controller to generate rms current
reference. In order to determine the peak current value, it has
to be multiplied by √2. This peak current value is then divided
by number of stages M to result the current reference IREF foreach buck chopper of the dc current module.
Each buck chopper control scheme is simply subtracting thecurrent reference with the sensed smoothing inductor current
and results an error. This error is then amplified with second
PI controller to generate PWM reference. Next, this PWM

978-1-5386-6499-5/19/$31.00 ©2019 IEEEIEEE PEDS 2019, Toulouse, France
9 – 12 July 2019

IL
L

POWER IN

POWER OUT

Q1+
IREF –

PIC

+

D1

–

Fig. 8. Class-D amplifier-based linear current generator.

Fig. 7. Staircase current waveform generation.

reference is compared with high-speed frequency sawtooth
waveform to generate PWM waveform for corresponding buckchopper.
B. Staircase Current Generator
The staircase current generator works based on thecomparison between the reference with the limit of each stage.
The reference of this generator is obtained from IREF multipliedby sinusoidal 1 volt ac peak-to-peak. The zero-crossing of thisreference signal is used for inverting the polarity of the Hbridge circuit so that the load is supplied by the ac current.
Fig. 7 describes how the staircase current waveform and thelinear current reference are generated. After applied as apolarity inverter, the reference is converted to absolute value
and becomes a full-wave rectifier waveform. The on-off
command for each dc current module depends on the reference
that exceed the corresponding limit of each stage. The given
limits are from IREF/M to (M – 1)IREF/M consecutively. Whenthe reference exceeds the first limit, it commands the first stageof dc current module to deliver its current to the load as wellas subtracts the reference with IREF/M and results a residualreference. Next, when the reference reaches the second stage
limit, it triggers the second stage of dc current module as wellas subtracts the previous residual reference with IREF/M again
and results a new residual reference. This process is carriedout repeatedly until the reference exceeds the last limit and theresidual reference is completely formed as a linear current
reference for class-D amplifier. As shown in Fig. 7, thestaircase current waveform is formed from the summation of
the outputs of each dc current module.
C. Class-D Amplifier-Based Linear Current Generator
A class-D amplifier or switching amplifier is an electronic
amplifier in which the amplifying devices operate as electronic

switches, and not as linear gain devices as in other amplifiers[7]. They operate by rapidly switching back and forth between
the supply rails, being fed by a modulator using pulse width,
pulse density, or related techniques to encode the reference
input signal into a pulse train. As depicted in Fig. 8, the mostbasic way of creating the PWM signal is to use a highspeed
comparator that compares a high frequency triangular or
sawtooth wave with the reference input. This generates aseries of pulses of which the duty cycle is directly proportionalwith the instantaneous value of the reference signal. The
comparator then drives the power switch of the buck chopper
part of the last dc current module via a gate driver. This
produces an amplified replica of the PWM signal of thecomparator. The smoothing inductor removes the highfrequency switching components of the PWM signal andrecovers the linear current. In order to make the linear current
output accurately and precisely, a current close loop control isapplied.
D. Proposed Control System and Overlap Time
Compensation
Fig. 9 shows the complete control system for the proposed
circuit which is a combination between Fig. 6, theimplementation of Fig. 7, and Fig. 8. All terminals of eachcomparator output are connected to the corresponding powerdevices of the dc current module that depicted in Fig. 3 andFig. 4. Technically, this control scheme is divided into fivegroups of function, they are: (a) output control, (b) buckchopper current control, (c) polarity inverter, (d) staircase
current waveform generator, and (e) class-D amplifier-based
linear current waveform generator.
In order to preserve the current continuation that always
required by CSI system, the polarity inverter includes overlap
time compensator which is shown in Fig. 10 [8]. Whenever thepolarity changes, it is necessary shorting the H-bridge legs fora few microseconds to avoid the CSI system destruction. The
overlap time duration depends on the turn-on and turn-off
delays of the utilized switching device.
IV.

SIMULATION RESULTS

In order to examine the proper operation of the proposed
technique of the multilevel CSI, the 13-level, 17-level, and 21level CSI configurations, as shown in Figs. 11 – 14, were
simulated by PSIM software. The simulation parameters arelisted in Table II. There were two types of simulation. First
simulation intended to verify the proposed technique could

978-1-5386-6499-5/19/$31.00 ©2019 IEEEIEEE PEDS 2019, Toulouse, France
9 – 12 July 2019

–

PIC

+
–

–

PIC

VREF

IL(M-1)

PIC

–+

1/M

1/M

+

PIC

+–

+

√2

Q2-2

–
+–

3/M

+

Q2-3

–
+–

...

–

PIC

...

(b)

Q2-1

–

2/M

–

...

...

–

Q1-(M-1)

+

1/M

+

IL3

+

+

(d)
1/M
+–

–

Q1-3

|ABS|

IL2

+

Q1-2

QA
QB
QC
QD

+
–

1/M

+

...

Q1-1

(c)

AC 1 Vpp

IL1(M-1)/M+

Q2-(M-1)

–
+–

RMS

vo

(a)

ILM

–

+

PIC

+

Q1-M

–

(e)

Fig. 9. Proposed control system.
QA

TABLE IISIMULATION PARAMETERS

DELAY
QB

AC

+
–

QC

QB

QA

DELAY
QD
vo
io

Load
Co

QC

DC Voltage
Inductor
Filter Capacitor
Load (light)
Load (heavy)
IGBT VCE ON
IGBT RCE ON

200 V
560 µH / 0.09 Ω
6.8 uF / 1mΩ
10 Ω / 1 mH
5 Ω / 0.5 mH
1.4 V
20 mΩ

IGBT VD
IGBT RD
Diode VF
Diode RD
Sawtooth Freq.
Line Frequency
Output Voltage

1.0 V
20 mΩ
1.0 V
20 mΩ
30 kHz
60 Hz
100 V

QD

Fig. 10. Overlap time compensation.

give better efficiency and better THD results although using
small filter capacitor. To provide the information, the load
current and voltage, the load current prior to be filtered, thestaircase current and linear current, and the dc input current
waveforms are presented.
From the simulation results, it is shown that the load current
prior to be filtered by capacitor was a summation between
staircase and linear currents. Due to high switching frequency
modulation prohibition in the current inversion process, thecurrent was formed in pure sinusoidal with accumulated small
ripple at the peak of the waveform. This output waveform isobviously different from the conventional output waveformwhich was showing high frequency modulation as reported by[4]. Therefore, the utilized output filter capacitor for this
proposed system was smaller than utilized in the conventionalone.
The second simulation intended to verify the performance ofthe control system, where the output is maintained precisely
and accurately. To perform this simulation, the load was
suddenly changed from 10 Ω / 1 mH to 5 Ω / 0.5 mH. Fig. 14

Fig. 11. 13-level CSI simulation result.

shows the dynamic response of the proposed 13-level hybrid
multilevel CSI. An excellent transient characteristic of the
proposed technique can be confirmed. It is shown thatregardless of the load condition, the current was constructed on
the same number of levels.
Table III reported the results comparison between 13-level,
17-level, and 21-level CSI from the measured quantities.
Despite not significant, the higher number of levels gave better
result and the proposed technique has met the requirements.

978-1-5386-6499-5/19/$31.00 ©2019 IEEEIEEE PEDS 2019, Toulouse, France
9 – 12 July 2019V.

CONCLUSION

A new technique on generating a pure sinusoidal output
current for multilevel CSI system using class-D amplifierbased linear compensator has been presented with simulation
results. By enlarging the number of levels, the efficiency ofthe proposed hybrid multilevel CSI can be improved. Becauseof using the switching-based current source generator, theefficiency can be guaranteed up to 90%.
The linear current compensator gave better THD and led toreduced output filter size. Smaller capacitor is possible to be
utilized on the CSI with higher number of levels. In order toverify the simulations, the proposed circuit conducted byproposed technique is currently being investigated in several
hardware experimental setups.

Fig. 12. 17-level CSI simulation result.

ACKNOWLEDGMENT
Eka Rakhman Priandana was supported by Noguchi
Laboratory of Shizuoka University and by Research andInnovation in Science and Technology Project (RISET-PRO),
Ministry of Research, Technology, and Higher Education ofIndonesia. Any opinions, findings, and conclusions expressedin this material are those of the authors, and do not necessarilyreflect the views of the funding agencies. Authors also would
like to gratitude anonymous reviewers for their very helpful
and constructive comments, which improved this manuscriptfrom the original.
REFERENCES[1]

Fig. 13. 21-level CSI simulation result.

Fig. 14. 13-level CSI dynamic response.
TABLE IIISIMULATION RECORDED DATA

Load current
Load voltage
DC current
THD-I after filtering
THD-I before filtering
THD-V
Efficiency

13-level
20.0 A
100.1 V11.2 A
1.65 %
4.19 %
1.94 %
89.4 %

Number of Levels
17-level
20.1 A
100.7 V11.3 A
1.03 %
3.45 %
1.35 %
89.6 %

21-level
20.1 A
100.4 V11.2 A
0.56 %
2.87 %
0.70 %
90.0 %

T. Noguchi, Y. Iwata and S. Yamaguchi, "Pure sinusoidal output currentsource inverter using inductor modules," 2017 IEEE 12th International
Conference on Power Electronics and Drive Systems (PEDS), Honolulu,
HI, 2017, pp. 869-874.
[2] B. P. McGrath and D. G. Holmes, "Natural Current Balancing ofMulticell Current Source Converters," in IEEE Transactions on PowerElectronics, vol. 23, no. 3, pp. 1239-1246, May 2008.
[3] S. Yamaguchi, T. Noguchi, A. Ikegami, “Hybrid Current-Source Inverterwith High-Efficiency Characteristic and Low-Distortion Output,” IEEJ
Proceedings of Annual Conference, 2013, C4-2.
[4] Suroso and T. Noguchi, “New H-Bridge Multilevel Current-Source
PWM Inverter with Reduced Switching Device Count,” Proceeding of
IEEJ International Power Electronics Conference, 2010 pp. 1228-1235.
[5] Suroso and T. Noguchi, "Common-emitter topology of multilevel
current-source pulse width modulation inverter with chopper-based dc
current sources," in IET Power Electronics, vol. 4, no. 7, pp. 759-766,
Aug. 2011.
[6] T. Noguchi and Suroso, “Review of Novel Multilevel Current-Source
Inverters with H-Bridge and Common-Emitter Based Topologies,” IEEE
Energy Conversion Congress and Exposition, vol. 5, 2010, pp. 40064011.
[7] Y. Kang, T. Ge, H. He and J. S. Chang, "A review of audio Class D
amplifiers," 2016 International Symposium on Integrated Circuits(ISIC), Singapore, 2016, pp. 1-4.
[8] S. Woolaghan and N. Schofield, "Current Source Inverters for PM
machine control," 2009 IEEE International Electric Machines and Drives
Conference, Miami, FL, 2009, pp. 702-708.
[9] J. Lai and F. Z. Peng, “Multilevel converter-a new breed of power
converters,” IEEE Transactions on Industry Applications, vol. 32, no. 5,
1996, pp. 509-517.
[10] J. Rodriguez, J. S. Lai, and F. Z. Peng, “Multilevel inverter: a survey of
topologies, controls, and application,” IEEE Trans. on Industrial
Electronics,” vol. 49, no. 4, p.p. 724-738, August 2002.

978-1-5386-6499-5/19/$31.00 ©2019 IEEE