QSFP+ Series
QD1300-QSF-LC.S10 Series
Single-Mode 40GBASE-LR4
QSFP+ Transceiver
RoHS6 CompliantFeatures◆

Compliant to the IEEE 802.3ba(40GBASE-LR4)◆Compliant to the QSFP+ MSA SFF-8436
Specification◆Up to 10km over SMF◆

DFBs and PIN monitor photodiodes array forApplicationstransmitter section◆ 40GBASE‐LR4 Ethernet links◆

PIN detectors and TIAs array for receiver section◆Four 10Gbps CWDM channels in the 1300nm
band◆

I2C interface with integrated Digital Diagnostic◆

40G Telecom connections

Monitoring◆OTN OTU3◆

Utilizes two standard LC optical connector◆

Operating Case Temperature: 0℃~+70℃◆ Infiniband QDR and DDRinterconnects Client‐side

Ordering Information
Part No.

DataRate

FiberDistance*(note2)

InterfaceTemp.

DDMI

QD1300-QSF-LC.S10*(note1)

40Gbps

SMF

10km

LC

0℃~+70℃

Yes

Note1: Standard version
Note2: Over SMF

Data Controls Inc.
Page 1 of 7

V2.e

QSFP+ Series
Regulatory Compliance*
Product Certificate

Certificate Number

Applicable Standard
EN 60950-1:2006+A11+A1+A12+A2

TUV

EN 60825-1:2014

R50135086

EN 60825-2:2004+A1+A2
UL

E317337

EMC CEAE 50384190 0001

‘FCC
FDAROHSWTF14F0514417E//UL 60950-1
CSA C22.2 No. 60950-1-07
EN 55032:2012
EN 55032:2015
EN 55024:2010
EN 55024:2010+A1
47 CFR PART 15 OCT., 2013
CDRH 1040.10
2011/65/EU*The above certificate number updated to June 2018, because some certificate will be updated every year, suchas FDA and ROHS. For the latest certification information, please check with Data Controls Inc.

Absolute Maximum Ratings
Parameter

Symbol

Min.

Max.

Unit

Storage Temperature

Ts-40

+85°C

Supply Voltage

Vcc

-0.5

3.6

V

Operating Relative Humidity

RH

585%

*Exceeding any one of these values may destroy the device immediately.

Recommended Operating Conditions
Parameter

SymbolMin.

Operating Case Temperature

TC0

Power Supply Voltage

Vcc

3.15

Power Supply Current

TypicalMax.

Unit

70°C

3.45

VIcc

1100mA

Power Dissipation

PD

3.5

W

Aggregate Bit Rate

BRAVE

41.25(40GE)
43.018(OTU3)

Gbps

Lane Bit Rate

BRLANE

10.3125(40GE)
10.7546(OTU3)

Gbps

3.3

Performance Specifications - ElectricalParameter
Single ended input
voltage tolerance

SymbolMin.
Typ.
Transmitter-0.3

Data Controls Inc.
Page 2 of 7Max4Unit

Notes

V

Referred toTP1 signal
commonV2.e

QSFP+ Series
Differential Input
amplitude

150

AC common mode input
voltage tolerance

15Input Impedance(Differential)
TX Disable
TX FAULT

1000

100

mvp-p

Zin

85

115

DisableVIH

2Vcc+0.3

Enable

VIL

00.8

Fault

VOH

2.4

Vcc+0.3

Normal

VOL

00.8

mV

RMSohms

Rin > 100
kohms @ DC

VVReceiver
Single ended output
voltage-0.3

4V

Differential output
amplitude

290

1000

mvp-p

AC common mode
voltage

7.5mV

Termination mismatch
at 1MHz5%

115

ohms

Output Impedance(Differential)

Zout

85

Output Rise/Fall Time

tr/tf

30LOS

VOH

2.4

Vcc+0.3

V

Normal

VOL

00.8

V

RX_LOS

100

Referred toignal common

RMS

ps

10%~90%

Optical and Electrical Characteristics
Parameter

SymbolMin.

Typical

Max.

Unit

SMF

L-

10-km

Aggregate Bit Rate

BRAVE

-

41.25

-

Gbps

Per Lane Bit Rate

BRLANE-

10.3125-Gbps

1264.5

1271

1277.51284.51291

1297.51304.51311

1317.51324.51331

1337.5

Transmitter
Channels wavelength

λC

nm-20dB spectral width∆λ--1nm

Average Launch Power, Each
Lane*(note3)

Pout/lane

-7

-

2.3

dBm

Transmit OMA, per Lane

TX_OMA/lane-4

-

3.5

dBm

Extinction Ratio

Er3.5

--dB

Output Optical Eye*(note4)

IEEE 802.3ba-2010 Compliant

Receiver
Data Controls Inc.
Page 3 of 7

V2.e

QSFP+ Series
Channels wavelength

λC

Damage Threshold1264.5

1271

1277.51284.51291

1297.51304.51311

1317.51324.51331

1337.5

5.5

--dBm

nm

Receiver sensitivity in OMA, eachlane

Pmins---11.5

dBm

Maximum Receive Power, eachlane

Pmax

2.3--dBm

Receiver reflectanceRr---26

dB

LOS De-Assert

LOSD

-11.5

dBm

LOS Assert

LOSA

LOS Hysteresis-24dBm0.5

dB

Note3: Output is coupled into a 9/125μm Single-Mode fiber.
Note4: Filtered, measured with a PRBS 231-1 test pattern @10.3125Gbps

Functional Description of Transceiver

Data Controls Inc.
Page 4 of 7

V2.e

QSFP+ Series
QSFP+ Transceiver Electrical Pad Layout

Pin Arrangement and Definition
Pin123456789Symbol

Description

PlugSequence

LVTTL-I

GND
Tx2n
Tx2p
GNDTx4n
Tx4p
GND
ModSelL

GroundTransmitter Inverted Data Input
Transmitter Non-Inverted Data Input
GroundTransmitter Inverted Data Input
Transmitter Non-Inverted Data Input
GroundModule Select13313313

LVTTL-I

ResetL

Module Reset

3VccRx+3.3V Power Supply Receiver

222-wire serial interface clock
2-wire serial interface data
GroundReceiver Non-Inverted Data Output
Receiver Inverted Data Output

331331CML-O
CML-O

SCLSDA
GND
Rx3p
Rx3n

CML-O

GND
Rx1p

GroundReceiver Non-Inverted Data Output

13Receiver Inverted Data Output
GroundGroundReceiver Inverted Data Output
Receiver Non-Inverted Data Output
GroundReceiver Inverted Data Output

3113313Logic
CML-I
CML-I
CML-I
CML-I

10111213
1415
1617

LVCMOS- I/O
LVCMOS- I/O

18
19
20
21
2223
24

CML-O

CML-O

Rx1n
GND
GND
Rx2n
Rx2p
GND
Rx4n

25

CML-O

Rx4p

Receiver Non-Inverted Data Output

3GND

Ground

126

CML-O
CML-O

Data Controls Inc.
Page 5 of 7

Notes
11111111V2.eQSFP+ Series
27

LVTTL-OModPrsL

Module Present

328

LVTTL-OIntLInterrupt

329

VccTx+3.3V Power supply transmitter

2230

Vcc1+3.3V Power supply

22LPModeLow Power Mode

3GND

Ground131

LVTTL-I

3233

CML-I

Tx3p

Transmitter Non-Inverted Data Input

334

CML-I

Tx3n

Transmitter Inverted Data Input

3GND

Ground

13536

CML-I

Tx1p

Transmitter Non-Inverted Data Input

337

CML-I

Tx1n

Transmitter Inverted Data Input

3GND

Ground138111

1: GND is the symbol for signal and supply (power) common for the QSFP+ module. All are common
within the QSFP+ module and all module voltages are referenced to this potential unless otherwise
noted. Connect these directly to the host board signal-common ground plane.
2: Vcc Rx, Vcc1 and Vcc Tx are the receiver and transmitter power supplies and shall be applied
concurrently. Requirements defined for the host side of the Host Edge Card Connector are listed inTable 6. Recommended host board power supply filtering is shown in Figures 3 and 4. Vcc Rx Vcc1and Vcc Tx may be internally connected within the QSFP+ Module in any combination. The connector
pins are each rated for a maximum current of 500mA.

Mechanical Specifications*This 2D drawing only for reference, please check with Data Controls Inc before
ordering.

Data Controls Inc.
Page 6 of 7

V2.e

QSFP+ Series
Obtaining Document
You can visit our website: https://www.dci.jp
Or contact Data Controls Inc.. Listed at the end of the documentation to get the latest documents.

Revision History
Revision

Revision History

Release Date

V1.a
V1.b
V1.c
V1.dV1.e
V1.fPreliminary.
Correct digital interface.
Update optical characters, photo,
Update photo.
Update stg. Temp & functional figure.
Update TC, ICC&PowerDissipation

July 2, 2012
Aug 7, 2012
Oct 18, 2012
Oct 30, 2012
Nov 1, 2012
Jan 25, 2013

V1.g
V2.a
V2.b

Released
Add input and output amplitude
Update storage temperature and regulatory compliance.

Feb 21,2014
June 9, 2014
Apr 15, 2015

V2.c
V2.d
V2.e

Update Icc, LOSA, operating temperature and structure

Sep 30, 2016
Mar 1, 2018
August 27, 2018

Update 2D drawing and picture.
Updated the regulatory compliance.

Notice:Data Controls Inc. reserves the right to make changes or discontinue any optical link product orservice identified in this publication, without notice, in order to improve design and/or performance.
Applications that are described herein for any of the optical link products are for illustrative
purposes only. Data Controls Inc. makes no representation or warranty that such applications will
be suitable for the specified use without further testing or modification.

Contact:
Add: 8F VORT Asakusabashi Ekimae Bldg V, 1-20-4 Yanagibashi,
Taito-ku , Tokyo 111-0052, JAPAN
Tel:+81-3-5829-5805

Fax:+81-3-5829-5806

E-mail: info@dci.jp

WEB: https://www.dci.jp

Data Controls Inc.
Page 7 of 7

V2.e