11th ACM/IEEE Workshop on Variability Modeling and Characterization (VMC)
thCo-located with the 37 ACM/IEEE ICCAD, November 8, 2018, San Diego, CA, USA

AgendaTime
1:00pm – 1:10pm
1:10pm – 2:00pm
2:00pm – 2:50pm
2:50pm – 3:50pm
3:50pm – 4:40pm
4:40pm – 5:30pm

5:30pm – 5:50pm
5:50pm – 6:00pm

Title
Welcome Note and Opening Remarks
Machine Learning in Semiconductor Manufacturing
and Test: Can Deep Learning Save The Day?
Data-Efficient Machine Learning for Variation-Aware
Design Automation: A Tensor Perspective
Poster Pitches/Coffee Break/Poster Viewing
Lithography Optimizations through Machine Learning
Application of Boolean Sampling and Learning to theError Localization and Correction in Semiconductor
Designs
Panel: Machine Learning and VMC
Wrap-up and Closing Remarks

Speaker
Takashi Sato, Kyoto U., Japan
Yiorgos Makris , UT Dallas, USA
Zheng Zhang, UCSB, USA

Youngsoo Shin, KAIST, Korea
Victor Kravets, IBM Research, USA

Invited Speakers
Takashi Sato, Kyoto U., Japan

Abstracts of Invited Talks
Title: Machine Learning in Semiconductor Manufacturing and Test: Can Deep Learning Save The Day?
Speaker: Yiorgos Makris, UT Dallas, USA
Time: 1:10pm – 2:00pm
Abstract: While many applications of machine learning in various semiconductor manufacturing andtesting tasks have been heavily researched over the last two decades, few have actually seen the light of
day in a real production environment. Recently, the popularity of contemporary artificial intelligence
methods, such as deep learning, has reignited the enthusiasm and reinvigorated the discussion regarding
the potential of statistical and machine learning-based solutions towards reducing test cost, increasing
test quality, improving test floor logistics and providing guidance to both designers and processengineers. In this presentation, we will first review the key challenges in transitioning machine learningbased solutions from a research to a production environment; then, we will discuss the main advantagesof contemporary methods, such as deep learning, over traditional machine learning solutions. Ultimately,
the intention of this presentation is to caution against considering deep learning a panacea to test (and,thereby, prevent disappointment), as well as to steer attention towards the true operational challenges
which need to be addressed in order for any machine learning or statistical solution, traditional orcontemporary, to be effective in a real production environment.

11th ACM/IEEE Workshop on Variability Modeling and Characterization (VMC)
thCo-located with the 37 ACM/IEEE ICCAD, November 8, 2018, San Diego, CA, USA
Title: Data-Efficient Machine Learning for Variation-Aware Design Automation: A Tensor Perspective
Speaker: Zheng Zhang, Assistant Professor of ECE, UCSB
Time: 2:00pm – 2:50pm
Abstract: While machine learning is a valuable tool for vast engineering applications, many popolar
machine learning algorithms (e.g., deep learning) may not be directly applied to electronic desginautomation. These popular machine learning frameworks oginated from big-data applications, and theiroverly parameterized algorithm models usually requires a huge amount of training data. However, EDA
problems normally have limited simulation or measurement data, and obtaining each piece of data is
expensive or time-consuming. Therefore, this talk focuses on "data-efficient" machine learning -- how can
we build machine learning models with a small number of training data for EDA problems? We specificallyinvestigate tensor computation techniques to address this challenge, which allows efficient compressionof high-volume data or extract information of big data from a small amount of samples. Two EDA
problems will be demonstrated: tensor methods for high-dimensional uncertainty quantification, andBayesian tensor completion for variation data prediction.
Title: Lithography Optimizations through Machine Learning
Speaker: Youngsoo Shin, Korea Advanced Institute of Science and Technology, Korea
Time: 3:30pm – 4:20pm
Abstract: Machine learning is an ideal toolbox to quickly predict the result of a complicated and timeconsuming process. Two example applications of machine learning for lithography optimizations
arereviewed in this talk: optical proximity correction (OPC) and etch proximity correction (EPC). In OPC
application, extracting polar Fourier transform (PFT) signals for each edge segment to be corrected anduse them to drive a machine learning network helps reduce the number of network input parameters while
accurate mask bias value is obtained. In EPC application, a network is constructed to predict etch bias
values from actual measurement. EPC based on this network is shown to provide a more accurate EPC
solution than EPC methods based on rules or models.
Title: Machine Learning for Variability Modeling and Mitigation of Energy-Constrained Systems
Speaker: Mehdi Tahoori, Karlsruhe Institute of Technology
Time: Cancelled
Abstract: Energy-constrained Systems-on-Chips (SoC) are becoming major components of many
emerging applications, especially in the Internet of Things (IoT) domain. Although the best energy
efficiency is achieved when the SoC operates in the near-threshold region, the best operating point for
maximum energy efficiency could vary depending on process corner, operating temperature, runningworkload, and the power-gating state (power modes) of various SoC components. In this talk we review
various machine-learning based schemes, both after the manufacturing (during testing) and at runtime topredict and tune the SoC to the most energy efficient operation point.

11th ACM/IEEE Workshop on Variability Modeling and Characterization (VMC)
thCo-located with the 37 ACM/IEEE ICCAD, November 8, 2018, San Diego, CA, USA
Title: Application of Boolean Sampling and Learning to the Error Localization and Correction in
Semiconductor Designs.
Speaker: Victor Kravets, IBM Research, USA
Time: 4:20pm – 5:10pm
Abstract: Many things can go wrong when designing and manufacturing semiconductor chips, including
errors in design specification and failures due to process variability. For the reasons of cost-saving in thedesign development cycle, it is therefore desirable and often time-critical to have methods that track down
and correct functional problems within a design. In this presentation, we describe how rigor of Boolean
reasoning can help in localizing and correcting design errors. We examine how Boolean rigor adapts to
the knowledge of a design's behavior. A new sampling technique is introduced that make the process ofsolving functional queries about the design computationally scalable. It is used in the development of a
new engineering change order engine, that has been successful in producing rectifications that meet
designer's estimate of the smallest change.

Posters
1. Variability in Thermo-mechanical Stress Applied to the Wire Bonding Junction of PowerMOSFET, Toshiki Kanamoto, Kazuaki Nomiya, Koki Kasai, Atsushi Kurokawa, Masashi Imai
(Hirosaki University, Japan), Tsuneo Munakata (JEDAT Inc., Japan)
2. Execution time Variation-aware Dynamical scheduling method, Ryota Tsuchihashi, Komei
Nomura, Yasuhiro Takashima (University of Kitakyushu, Japan), Yuichi Nakamura (NEC Corp.,
Japan)
3. Initial Parameter Extraction Procedure for Surface-Potential-Based SiC MOSFET Model,
Michihiro Shintani (NAIST, Japan), Takashi Sato (Kyoto University, Japan)
4. Variation-aware Equivalent Circuit Modelling of Micro-scale Piezoelectric Energy
Harvesters, Wajih Syed, Alabi Bojesomo, Abe Elfadel (Khalifa University, United Arab Emirates)

Program Committee
Co-chairs:
Abe Elfadel, Khalifa University, UAE
Takashi Sato, Kyoto University, Japan
Rasit O. Topaloglu, IBM, USA
Members:
Yu Cao, Arizona State University, USA
Chris Kim, University of Minnesota, USA
Colin McAndrew, Freescale, USA
Subhashish Mitra, Stanford University, USA

Hidetoshi Onodera, Kyoto University, JapanDavid Pan, UT Texas, USA
Vijay Reddy, Texas Instruments, USA