LTC3118
18V, 2A Buck-Boost DC/DC
Converter with Low Loss
Dual Input PowerPath
Description

Features
Integrated High Efficiency Dual Input PowerPath™
Plus Buck-Boost DC/DC Converter
nn Ideal Diode or Priority V Select ModesIN
nn V
IN1 and VIN2 Range: 2.2V to 18V
nn V
OUT Range: 2V to 18V
nn Either V Can Be Above, Below or Equal to V
IN
OUT
nn Generates 5V at 2A for V > 6VIN
nn 1.2MHz Low Noise Fixed Frequency Operation
nn Current Mode Control
nn All Internal N-Channel MOSFETs
nn Pin-Selectable PWM or Burst Mode® Operationnn Accurate, Independent RUN Pin Thresholds
nn Up to 94% Efficiency
nn V and VIN
OUT Power Good Indicators
nn I of 50µA in Sleep, 2µA in ShutdownQ
nn 4mm × 5mm 24-Lead QFN or 28-Lead TSSOP Packages
nnApplications
Systems with Multiple Input Sources
Back Up Power Systems
nn Wall Adapter or Li-Ion(s) Input to 5V
OUT
nn Battery or Super Capacitor Input for Reserve Powernn Replace Diode-OR Designs with Higher Efficiency,
Flexibility and Performancenn
nn

The LTC®3118 is a dual-input, wide voltage range synchronous buck-boost DC/DC converter with an intelligent,integrated, low loss PowerPath control. The unique powerswitch architecture provides efficient operation from either
input source to a programmable output voltage above,
below or equal to the input. Voltage capability of up to 18V
provides flexibility and voltage margin for a wide variety
of applications and power sources.
The LTC3118 uses a low noise, current mode architecturewith a fixed 1.2MHz PWM mode frequency that minimizes
the solution footprint. For high efficiency at light loads,
automatic Burst Mode operation can be selected consuming only 50µA of quiescent current in sleep.
System level features include ideal diode or VIN priority
modes, VIN and VOUT power good indicators, accurate RUN
comparators to program independent UVLO thresholds,
and output disconnect in shutdown. Other features include
2µA shutdown current, short-circuit protection, soft-start,
current limit and thermal overload protection.
The LTC3118 is offered in thermally enhanced 24-lead
4mm × 5mm QFN and 28-lead TSSOP packages.
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
and PowerPath and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners. Protected by U.S. Patents, including 7709976.

Typical Application
3.3µH
0.1µF
VIN1

22µF 47nF

VIN1 BST1

SW2 BST2 VOUT

SW1

400k

CM1
10nF
10nF
VIN2

FB

CN1
CN2

VOUT
5V
100µF

5VOUT
AC-COUPLED
500mV/DIV

VIN1 = 5V, VIN2 = 12V, VOUT = 5V AT 1A

100k
LTC3118

VC

CP2

CM2
47nF

22pF

CP1

VIN2

22µF

Input Switchover Response

0.1µF

PGND VCC

GND
4.7µF

V1GD
V2GD
PGD
MODE
SEL
RUN1
RUN2

40.2k

1.8nF

INDICATORSCONTROL
SIGNALS

SW1
10V/DIV
SEL
5V/DIV

SELECT VIN2

SELECT VIN1

100µs/DIV

3118 TA01b

3118 TA01a

3118faFor more information www.linear.com/LTC3118

1

LTC3118
Absolute Maximum Ratings (Note 1)
VIN1, VIN2 Voltage........................................ –0.3V to 20V
VOUT Voltage............................................... –0.3V to 20V
SW1 DC Voltage (Note 4)................–0.3V to (VIN1 + 0.3V)or (VIN2 + 0.3V)
SW2 DC Voltage (Note 4).............–0.3V to (VOUT + 0.3V)
BST1 Voltage...................... (SW1 – 0.3V) to (SW1 + 6V)
BST2 Voltage .....................(SW2 – 0.3V) to (SW2 + 6V)
RUN1, RUN2 Voltage................................... –0.3V to 20V
PGD, V1GD, V2GD Voltage.......................... –0.3V to 20V
CM1, CM2 Voltage........................................ –0.3 to 20V

CP1 Voltage......................... (VIN1 – 0.3V) to (VIN1 + 6V)
CP2 Voltage......................... (VIN2 – 0.3V) to (VIN2 + 6V)
VCC, CN1, CN2 Voltage.................................... –0.3 to 6V
MODE, SEL, FB, VC Voltage............................ –0.3 to 6V
Operating Junction Temperature Range (Notes 2, 3)
LTC3118E/LTC3118I............................ –40°C to 125°C
LTC3118H........................................... –40°C to 150°C
LTC3118MP......................................... –55°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) TSSOP....... 300°C

Pin Configuration
CN2

27 CN224 23 22 21 20CP1

3

26 PGND

CM2

2

CN1

28 CM2

CN1

CP1

TOP VIEW

1

CM1

TOP VIEW
CM1

SEL 1

19 CP2SEL

425 CP2

VIN1 218 VIN2VIN1

524 VIN2

RUN1 317 SW1RUN1

616 BST1

RUN2

7

VCC

8

21 BST2MODE

920 SW2

GND 1019 VOUT

GND 11

18 PGND

VC 12

17 PGND

FB 13

16 PGD

V1GD 14

15 V2GD

25
PGND

RUN2 4VCC 515 BST2
14 SW2

MODE 6

13 VOUT

PGD

V2GD

V1GD

9 10 11 12
FB

8
VC

GND 7

UFD PACKAGE
24-LEAD (4mm × 5mm) PLASTIC QFNTJMAX = 150°C, θJC = 3.4°C/W, θJA = 43°C/W
EXPOSED PAD (PIN 25) IS PGND, MUST BE SOLDERED TO PCB

29
PGND

23 SW122 BST1

FE PACKAGE
28-LEAD PLASTIC TSSOPTJMAX = 150°C, θJC = 5°C/W, θJA = 30°C/W
EXPOSED PAD (PIN 29) IS PGND, MUST BE SOLDERED TO PCB

Order Information
LEAD FREE FINISH

TAPE AND REELPART MARKING*PACKAGE DESCRIPTIONTEMPERATURE RANGE

LTC3118EUFD#PBF
LTC3118IUFD#PBF
LTC3118HUFD#PBF
LTC3118MPUFD#PBF
LTC3118EFE#PBF
LTC3118IFE#PBF
LTC3118HFE#PBF
LTC3118MPFE#PBF

LTC3118EUFD#TRPBF
LTC3118IUFD#TRPBF
LTC3118HUFD#TRPBF
LTC3118MPUFD#TRPBF
LTC3118EFE#TRPBF
LTC3118IFE#TRPBF
LTC3118HFE#TRPBF
LTC3118MPFE#TRPBF

3118
3118
3118
3118
3118FE
3118FE
3118FE
3118FE

24-Lead (4mm × 5mm) Plastic QFN
24-Lead (4mm × 5mm) Plastic QFN
24-Lead (4mm × 5mm) Plastic QFN
24-Lead (4mm × 5mm) Plastic QFN
28-Lead Plastic TSSOP
28-Lead Plastic TSSOP
28-Lead Plastic TSSOP
28-Lead Plastic TSSOP–40°C to 125°C–40°C to 125°C–40°C to 150°C–55°C to 150°C–40°C to 125°C–40°C to 125°C–40°C to 150°C–55°C to 150°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/2

For more information www.linear.com/LTC3118

3118faLTC3118
Electrical Characteristics

The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TJ ≈ TA = 25°C (Note 2). Unless otherwise noted, VIN1 or VIN2 = 5V, VOUT = 5V.
PARAMETERCONDITIONS

Input Operating Voltage Range

VIN1 or VIN2, VCC ≥ 2.5V

Output Operating Voltage

MAX

UNITS

l

MIN
2.2

TYP

18

V

l

2

18

V

2.2

2.35

2.5

V

2.2

2.5

2.65

V

Undervoltage Lockout Threshold on VCC

VCC Rising, VIN = 2.5VlMinimum VIN Start-Up Voltage

VCC Powered from VIN1 or VIN2 (IVCC = 10mA)l

Input Quiescent Current in Shutdown

RUN1 and RUN2 < 0.2V2

µA

Input Quiescent Current in Burst Mode Operation

Active VIN1 or VIN2, FB = 1.2V

50

µA

Inactive VIN1 or VIN2, FB = 1.2V

5

µA

Active VIN1 or VIN2, FB = 0.8V

12

mA

1

µA

Input Quiescent Current in PWM Mode Operation
Output Quiescent Current in Burst Mode Operation
Oscillator Frequency
Oscillator Frequency Variation

l

1000

Active VIN = 3V to 18V

Feedback Voltage

1200

1400

0.1
l

0.98

1.0

kHz
%/ V

1.02

V

Feedback Voltage Line Regulation

Active VIN = 3V to 18V

0.2%

Error Amplifier Transconductance

VC Current = ±4µA

80

µS

Feedback Pin Input Current

FB = 1V

050nA

VC Source Current

VC = 0.5V, FB = 0.8V

–14

µA

VC Sink Current

VC = 0.5V, FB = 1.2V

14

µA

RUN Pin Threshold: Accurate

RUN1 or RUN2 Rising

RUN Pin Hysteresis: Accurate

Accurate RUN (Rising – Falling)

RUN Pin Logic Threshold for VCC Enable/Shutdown
RUN Pin Leakage Current

RUN1 or RUN2 = 4V

VCC Output Voltage

IVCC = 1mA

l

1.17

1.22

1.27

170

V
mV

l

0.2

0.65

1.15

V

0.2

µA

l

3.5

3.8

4.1

V

VCC Load Regulation

IVCC = 1mA to 10mA

–1%

VCC Line Regulation

IVCC = 1mA, VIN = 5V to 18V

0.5%

VCC Current Limit

VIN > 6V

60

mA

Average Inductor Current Limit (Note 5)lOverload Current Limit (Note 5)

Current from VIN1 or VIN2

Reverse Inductor Current Limit (Note 5)

PWM Mode

Maximum Duty Cycle

3.0

3.6

5.2

A

6

A

–200

mA

Percentage of Period SW2 Is Low in Boost Mode

l

90

95

%

Percentage of Period SW1 Is High in Boost Mode

l

83

88

%

Minimum Duty Cycle

Percentage of Period SW1 Is High in Buck Model

SW1 and SW2 Forced Low Time

BST1 or BST2 Capacitor Charge Time

100

ns

N-Channel Switch Resistance

Switch A1 (From VIN1 to SW1)

80mΩ

Switch A2 (From VIN2 to SW1)

120

mΩ

Switch B (From SW1 to PGND)

80mΩ

N-Channel Switch Leakage

0

Switch C (From SW2 to PGND)

80mΩ

Switch D (From PVOUT to SW2)80mΩ

VIN2, VIN2 or VOUT = 18V

0.1

Soft-Start Time

10

1

MODE and SEL Threshold Voltage
MODE and SEL Leakage%l

Pin = 5V

0.3

µA
ms

0.75

1.2

V

0

0.5

µA
3118faFor more information www.linear.com/LTC3118

3

LTC3118
Electrical Characteristics

The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TJ ≈ TA = 25°C (Note 2). Unless otherwise noted, VIN1 or VIN2 = 5V, VOUT = 5V.
PARAMETERCONDITIONS

MIN

TYP

MAX

UNITS

VIN1 Becomes Active Input in Ideal Diode Mode

VIN2 = SEL = 5V
Rising
Falling

5
4.2

5.4
4.6

5.8
5

V
V

PGD Threshold

Percent of FB Voltage Rising

90

94

98

%

PGD Hysteresis

Percent of FB Voltage Falling–2

V1GD, V2GD, PGD Low Voltage

ISINK = 5mA

300

V1GD, V2GD, PGD Leakage

Pin = 18V

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3118 is tested under pulsed load conditions such that TJ ≈TA. The LTC3112E is guaranteed to meet specifications from 0°C to 85°C
junction temperature. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization andcorrelation with statistical process controls. The LTC3118I is guaranteed
to meet specifications over the –40°C to 125°C operating junction
temperature, the LTC3118H is guaranteed to meet specifications over the–40°C to 150°C operating junction temperature range and the LTC3118MP
is guaranteed and tested to meet specifications over the full –55°C to
150°C operating junction temperature range. High junction temperatures
degrade operating lifetimes; operating lifetime is derated for temperatures
greater than 125°C.
The maximum ambient temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal

%
mV
1

µA

resistance and other environmental factors. The junction temperature(TJ in °C) is calculated from the ambient temperature (TA in °C) and power
dissipation (PD in Watts) according to the following formula:
TJ = TA + (PD • θJA) where θJA is the thermal impedance of the package.
Note 3: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 4: Voltage transients on the switch pins beyond the DC limit specified
in the Absolute Maximum Ratings, are non disruptive to normal operation
when using good layout practices, as shown on the demo board or
described in the data sheet and application notes.
Note 5: Current measurements are performed when the LTC3118 is
not switching. The current limit values measured in operation will besomewhat higher, while the reverse current thresholds may be lower due
to the propagation delay of the comparators and inductor value.

3118fa4

For more information www.linear.com/LTC3118

LTC3118
Typical Performance Characteristics
100

2

30

70

50

10
0.001

0.01
0.1
LOAD CURRENT (A)

1

2

5VIN
12VIN
18VIN

30
20

10

0

0
0.0001

0.001

0.01
0.1
LOAD CURRENT (A)

3
PWM

20

2

10
0
0.0001

0.001

0.01
0.1
LOAD CURRENT (A)

1

4

70
PWM

60
50
40

2
3.6VIN
5VIN
12VIN

20
10

10

3

30

1

LOSS

0

0
0.0001

0.001

0.01
0.1
LOAD CURRENT (A)170

2.7VIN
5VIN
3
12VIN

40

2

30
PWM

20

1
LOSS

10
0
0.0001

0.001

0.01
0.1
LOAD CURRENT (A)13118 G07

070

VIN1, LOAD = 500mA
VIN2, LOAD = 500mA
VIN1, LOAD = 1A
VIN2, LOAD = 1A2

4

6

10 12 148
INPUT VOLTAGE (V)

0

16

18

3118 G06

3.3VOUT Efficiency vs VIN1 or VIN2
Voltage with 500mA and 1A Load
Current
100

5

4

70
60

3
2.7VIN
5VIN
12VIN

50
40

2

30
20

1

PWM

10
10

80

BURST

80
EFFICIENCY (%)

4

18

85

75

0
0.0001

LOSS
0.001

0.01
0.1
LOAD CURRENT (A)1

103118 G08

095
PWM POWER LOSS (W)80

PWM POWER LOSS (W)EFFICIENCY (%)

90

50

10

100

5

16

90

VOUT = 3.3V Efficiency and Power
Loss vs Load Current from VIN2

BURST

60

10 12 148
INPUT VOLTAGE (V)3118 G05

VOUT = 3.3V Efficiency and Power
Loss vs Load Current from VIN1
90

6

95

1

LOSS

3118 G04

100

4

100

5

80
EFFICIENCY (%)

EFFICIENCY (%)

60

23118 G03

PWM POWER LOSS (W)70

PWM POWER LOSS (W)4

3.6VIN
5VIN
12VIN

70

BURST

90

80

VIN1, LOAD = 500mA
VIN2, LOAD = 500mA
VIN1, LOAD = 1A
VIN2, LOAD = 1A

5VOUT Efficiency vs VIN1 or VIN2
Voltage with 500mA and 1A Load
Current

100

5
BURST

30

80

VOUT = 5V, Efficiency and Power
Loss vs Load Current from VIN2

100

40

85

3118 G02

VOUT = 5V, Efficiency and Power
Loss vs Load Current from VIN1

50

90

75

0
10

1

3118 G01

90

1

LOSS

10

LOSS

0
0.0001

PWM

40

1

20

3

60

95

EFFICIENCY (%)

40

4

EFFICIENCY (%)

50

3

80
EFFICIENCY (%)

5VIN
12VIN
18VIN

PWM

100

PWM POWER LOSS (W)70

PWM POWER LOSS (W)

4

60

5
BURST

90

80
EFFICIENCY (%)

100

5
BURST

90

12VOUT Efficiency vs VIN1 or VIN2
Voltage with 500mA and 1A Load
Current

VOUT = 12V, Efficiency and Power
Loss vs Load Current from VIN2

EFFICIENCY (%)

VOUT = 12V, Efficiency and Power
Loss vs Load Current from VIN1

TA = 25°C, unless otherwise noted.

90
85
80
VIN1, LOAD = 500mA
VIN2, LOAD = 500mA
VIN1, LOAD = 1A
VIN2, LOAD = 1A

75
70

2

4

6

8
10 12 14INPUT VOLTAGE (V)16183118 G09

3118faFor more information www.linear.com/LTC3118

5

LTC3118
Typical Performance Characteristics
Die Temperature Rise vs Load
Current, VOUT = 5V, 4-Layer
LTC3118 Demo Board

90
80
70
60
50
40
30
20

VIN = 5V
VIN = 12V
VIN = 18V

10
0

0

0.5

1
1.5
LOAD CURRENT (A)

2.5

2

100
90
80
70
60
50
40
30
20

VIN = 3.6V
VIN = 5V
VIN = 12V

10
0

0

0.5

1
1.5
LOAD CURRENT (A)

2

70
60
50
40
30
20

0

280
12VOUTL = 6.8µH

210
140
70

4

6
8
10 12 14
VIN1 OR VIN2 VOLTAGE (V)

16

2.5

12VOUTL = 6.8µH

1.5
1.0

2

4

6
8
10 12 14
VIN1 OR VIN2 VOLTAGE (V)

1

3

6
9
12
15
STAND-OFF VOLTAGE (V)183118 G16

1
REVERSE3118 G15

Normalized N-MOSFET
Resistance vs VCC

Normalized N-Channel MOSFET
Resistance vs Die Temperature

1.3

1.4

1.2

1.3

1.1
1.0
0.9
0.8
0.7

0

2

–1
–50 –30 –10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)

18

16

NORMALIZED RESISTANCE

10

33118 G14NORMALIZED RESISTANCE

100

125°C
150°C
175°C

AVERAGE

4

03118 G13

25°C
50°C
75°C
100°C

2.5

2

OVERLOAD

5

5VOUT
L = 3.3µH

2.0

N-Channel MOSFET Leakage
vs Die Temperature and Stand-Off
Voltage1000

1
1.5
LOAD CURRENT (A)6
DIODE FROM VOUT = 5V
TO VCC

3.0

0

18

0.5

3118 G120.5
20Inductor Overload, Average andReverse Current Limits
vs Temperature

INDUCTOR CURRENT (A)350

VIN = 2.7V
VIN = 5V
VIN = 12V

10

3.5
5VOUT
L = 3.3µH

MAXIMUM LOAD CURRENT (A)PWM TO BURST THRESHOLD (mA)

80

Maximum Load Current vs VIN in
PWM Mode

420

LEAKAGE CURRENT (µA)

903118 G11

PWM to Burst Mode Thresholds
vs VIN

0

100

2.5

3118 G100

Die Temperature Rise vs Load
Current, VOUT = 3.3V, 4-Layer
LTC3118 Demo Board
DIE TEMPERATURE RISE FROM AMBIENT (°C)

100

DIE TEMPERATURE RISE FROM AMBIENT (°C)

DIE TEMPERATURE RISE FROM AMBIENT (°C)

Die Temperature Rise vs Load
Current, VOUT = 12V, 4-Layer
LTC3118 Demo Board

0.6
2.5

1.2
1.1
1.0
0.9
0.8
0.7

3

3.5
4
4.5
VCC VOLTAGE (V)5

5.5
3118 G17

0.6
–50

0

50
100
TEMPERATURE (°C)

1503118 G18

3118fa6

For more information www.linear.com/LTC3118

LTC3118
Typical Performance Characteristics
FB Program Voltage
vs Temperature
1.025

3.9

1.020

3.7

1.015

3.9

3.8

1.005
1.000
0.995
0.990

VCC VOLTAGE (V)

3.5

1.010

VCC VOLTAGE (V)FB VOLTAGE (V)VCC vs Supply Current (VIN > 5V)
Showing Current Limit

VCC vs Active VIN

3.3
3.1
2.9
2.7

0.985

0.975
–50

3.5

0

50
100
TEMPERATURE (°C)

2.3

150

2

4

6
8
10 12 14ACTIVE VIN VOLTAGE (V)

3.4

18

16

3118 G19

250

MODE and SEL Logic Thresholds

24

1.4

150
125
VOUT = 12V

100
75

VOUT = 5V

50

2

4

6
8
10 12 14ACTIVE VIN VOLTAGE (V)16

VOUT = 12V

16

VOUT = 5V

12
8

DIODE FROM VOUT = 5V TO VCC

4DIODE FROM VOUT = 5V TO VCC

25

1.2

20

0

18

2

4

6
8
10 12 14ACTIVE VIN VOLTAGE (V)16

THRESHOLD VOLTAGE (V)

VIN2 ACTIVE

8
6

2

4

6

8

10 12 14
VIN2 VOLTAGE (V)16183118 G25

50
100
TEMPERATURE (°C)

VIN UVLO RISING

4.5

VIN UVLO FALLING

4.0

1.0
0.8
VCC ON

0.6

VCC OFF

0.4

0
–50

150

RUN1 and RUN2 Current
vs Voltage

3.5
3.0
2.5
2.0
1.5
1.0

0.2
SEL = VCC

0

5.0

1.2

4

0.4

3118 G24

RUN CURRENT (µA)

16

10

FALLING

0
–50

18

1.4

VIN1 ACTIVE

RISING

0.6

RUN1 and RUN2 Thresholds for
VIN UVLO and VCC Enable

18

12

0.8

3118 G23

Active VIN in Ideal Diode Modewith Hysteresis

14

1.0

0.2

3118 G22

VIN1 VOLTAGE (V)

THRESHOLD VOLTAGE (V)QUIESCENT CURRENT (mA)QUIESCENT CURRENT (µA)

225

175

80

20
40
60
VCC SUPPLY CURRENT (mA)

3118 G21

No-Load Active VIN Current in
PWM

200

0

3118 G20

No-Load Active VIN Current in
Burst Mode

2

3.6

2.5

0.980

0

3.7

0.5
0

50
100
TEMPERATURE (°C)

1503118 G26

0

0

2

4

6
8 10 12RUN VOLTAGE (V)

14

16

18

3118 G27

3118faFor more information www.linear.com/LTC3118

7

LTC3118
Typical Performance Characteristics
12VOUTRIPPLE
100mV/DIVMINIMUM LOW TIME (ns)160

12VOUT
AC-COUPLED
500mV/DIVIL
1A/DIV

140

120

IL
1A/DIVSEL
5V/DIV

SW1
5V/DIVSW1
10V/DIV

SW2
5V/DIV1003118 G29

200ns/DIV80
2.5

12VIN2 to 5VIN1 Switchover
Waveforms, VOUT = 12V 500mA
Load

Switch and VOUT Waveforms(12VIN, 12VOUT)

SW1, SW2 Minimum Low Timevs VCC

3

3.5
4
4.5
VCC VOLTAGE (V)5

L = 6.8µH
COUT = 100µF

500µs/DIV

3118 G30

5.53118 G28

100mA to 1A Load Step PWM
Mode (12VIN, 12VOUT)

5VIN Burst Mode Waveforms
12VOUT, 50mA
12VOUTRIPPLE
100mV/DIV

12VOUT
AC-COUPLED
500mV/DIVIL
0.5A/DIVIL
1A/DIVINDUCTOR
1A/DIVSW2
10V/DIV

VC
200mV/DIVSW1
10V/DIV

L = 6.8µH
COUT = 100µF

3118 G31

500µs/DIV

L = 6.8µH
COUT = 100µF

12VIN Burst Mode Waveforms
12VOUT, 100mA
12VOUTRIPPLE
100mV/DIVIL
0.5A/DIVIL
0.5A/DIVSW2
10V/DIV

SW2
10V/DIV

SW1
10V/DIV

SW1
10V/DIV
5µs/DIV

3118 G32

18VIN Burst Mode Waveforms
12VOUT, 100mA

12VOUTRIPPLE
100mV/DIV

L = 6.8µH
COUT = 100µF

5µs/DIV

3118 G33

L = 6.8µH
COUT = 100µF

5µs/DIV

3118 G34

3118fa8

For more information www.linear.com/LTC3118

LTC3118
Typical Performance Characteristics
VOUT Short-Circuit Waveforms
Response and Recovery(12VIN, 12VOUT)

Soft-Start Waveforms with 500mA
Load (12VIN, 12VOUT)
RL = 24Ω

VOUT
5V/DIVIL
1A/DIV

VOUT
10V/DIV

VOUT
5V/DIVIL
2A/DIV

VC
500mV/DIVRUN1 OR
RUN2
5V/DIV

VC
500mV/DIV
200µs/DIV

3118 G35

VCC Short-Circuit Waveforms
Response and Recovery(12VIN, 12VOUT, 500mA Load)SHORTRELEASEDVOUT SHORTED

1ms/DIV

3118 G36

IL
1A/DIV
VCC
5V/DIVVCC
SHORTEDSHORTRELEASED
2ms/DIV

3118 G37

3118faFor more information www.linear.com/LTC3118

9

LTC3118
Pin Functions (QFN/TSSOP)
SEL (Pin 1/Pin 4): Input Select Pin.

MODE (Pin 6/Pin 9): PWM or Auto Burst Mode Select Pin.

SEL = Logic Low (ground): VIN1 priority mode, the converter will operate from VIN1 if RUN1 and VIN1 voltages
are above their respective thresholds. If these conditions
are not met, the converter will operate from VIN2 as longas RUN2 and VIN2 voltages are above their thresholds.

MODE = Logic Low (ground): Enables automatic Burst
Mode operation.

SEL = Logic High (connect to VCC): Ideal diode mode,the converter will operate from the higher voltage of VIN1
or VIN2.
VIN1 (Pin 2/Pin 5): The first input voltage source for theconverter. Connect a minimum of 22µF ceramic decoupling capacitor from this pin to ground, as close to the IC
as possible. In ideal diode mode (SEL = 1), this input will
be selected if VIN1 > VIN2, VIN1 is above its internal UVLO
threshold, and RUN1 > 1.22V. In priority mode (SEL =0), this input will be selected if VIN1 is above its internal
UVLO threshold and RUN1 > 1.22V.
Since this input has lower RDS(ON) MOSFETs between VIN1
and SW1, it should be considered for use with the source
where high efficiency is more critical.
RUN1 (Pin 3/Pin 6): Input to enable and disable the IC andprogram the UVLO threshold for VIN1. Pull RUN1 above
1.22V to enable the converter. Connecting this pin to a
resistor divider from VIN1 to ground allows programmingof VIN1’s UVLO threshold above 2.2V. Pulling both RUN1
and RUN2 to logic low states will put the IC in a low current shutdown state.
RUN2 (Pin 4/Pin 7): Input to enable and disable the IC andprogram the UVLO threshold for VIN2. Pull RUN2 above
1.22V to enable the converter. Connecting this pin to a
resistor divider from VIN2 to ground allows programmingof VIN2’s UVLO threshold above 2.2V. Pulling both RUN1
and RUN2 to logic low states will put the IC in a low current shutdown state.
VCC (Pin 5/Pin 8): Output voltage of the internal VCC regulator. This is the supply pin for the internal driver circuitry.
Bypass this output with a 4.7µF ceramic capacitor. Thispin may be back driven by an external supply, up to 5.5V.
VCC will be generated from either VIN1 or VIN2 depending
upon which input the converter is operating from.

MODE = Logic High (connect to VCC): Forces PWM mode
operation.
GND (Pin 7/Pins 10, 11): Signal Ground for the IC. Provide
a short direct PCB path from this pin to the ground plane.
VC (Pin 8/Pin 12): Output of the voltage error amplifier
used to program average inductor current. An RC fromthis pin to ground sets the voltage loop compensation.
The average current loop is internally compensated.
FB (Pin 9/Pin 13): Feedback input to the voltage error amplifier. Connect to a resistor divider from VOUT to ground.
The output voltage can be adjusted from 2V to 18V by:
VOUT = 1 + (R1/R2).
V1GD (Pin 10/Pin 14): Open-drain indicator that pulls toground when both VIN1 and RUN1 are above their respective thresholds. Connect a pull-up resistor from this pin
to a positive supply.
V2GD (Pin 11/Pin 15): Open-drain indicator that pulls toground when both VIN2 and RUN2 are above their respective thresholds. Connect a pull-up resistor from this pin
to a positive supply.
PGD (Pin 12/Pin 16): Open-drain output that pulls toground when VOUT is greater than 92% of the programmed
output voltage. Connect a pull-up resistor from this pin
to a positive supply.
VOUT (Pin 13/Pin 19): Regulated Output Voltage. Connect a minimum of 47µF ceramic or low ESR decoupling
capacitor from this pin to ground. The capacitor shouldbe placed as close to the IC as possible with short, wide
traces to VOUT and GND.
SW2 (Pin 14/Pin 20): Switch Pin. Connect to the otherside of the inductor. Keep PCB trace lengths as short andwide as possible to reduce EMI.
BST2 (Pin 15/Pin 21): Bootstrapped floating supply forhigh side N-channel MOSFET gate drive. Connect to SW2
through a 0.1µF capacitor, as close to the part as possible.
3118fa10

For more information www.linear.com/LTC3118

LTC3118
Pin Functions (QFN/TSSOP)
BST1 (Pin 16/Pin 22): Bootstrapped floating supply forhigh side N-channel MOSFET gate drive for VIN1 or VIN2.
Connect to SW1 through a 0.1µF capacitor, as close to
the part as possible. This capacitor provides gate drivefor the N-channel MOSFETs connected between SW1 andeither VIN1 or VIN2.
SW1 (Pin 17/Pin 23): Switch Pin. Connect to one side of
the inductor. Keep PCB trace lengths as short and wide
as possible to reduce EMI.
VIN2 (Pin 18/Pin 24): The second input voltage source forthe converter. Connect a minimum of 22µF ceramic decoupling capacitor from this pin to ground, as close to the IC
as possible. In ideal diode mode (SEL = 1), this input will
be selected if VIN2 > VIN1, VIN2 is above its internal UVLO
threshold, and RUN2 > 1.22V. In priority mode (SEL = 0),
this input will only be selected if VIN1 is below its internal
UVLO threshold or RUN1 < 1.05V.
Since this input has the higher RDS(ON) MOSFETs between
VIN2 and SW1, it should be considered for use with thesource where slightly lower conversion efficiency is acceptable.
CP2 (Pin 19/Pin 25): Positive pin for the VIN2 top N-channel
MOSFET charge-pump capacitor. This pin toggles between
VIN2 and VIN2 + VCC when VIN2 is active.

CN2 (Pin 20/Pin 27): Negative pin for the VIN2 top
N-channel MOSFET charge-pump capacitor. This pin isdriven between VCC and GND when VIN2 is active. Connect
a 10nF ceramic capacitor between CN2 and CP2. This pin
can be monitored to indicate operation from VIN2.
CM2 (Pin 21/Pin 28): Filter pin for the common connection of VIN2 to SW1 N-channel MOSFETs. Connect a 47nF
capacitor from this pin to the ground plane.
CM1 (Pin 22/Pin 1): Filter pin for the common connection of VIN1 to SW1 N-channel MOSFETs. Connect a 47nF
capacitor from this pin to the ground plane.
CN1 (Pin 23/Pin 2): Negative pin for the VIN1 top N-channel
MOSFET charge-pump capacitor. This pin is driven between VCC and GND when VIN1 is active. Connect a 10nF
ceramic capacitor between CN1 and CP1. This pin can bemonitored to indicate operation from VIN1.
CP1 (Pin 24/Pin 3): Positive pin for the VIN1 top N-channel
MOSFET charge-pump capacitor. This pin toggles between
VIN1 and VIN1 + VCC when VIN1 is active.
PGND (Exposed Pad Pin 25/Pins 17, 18, 26, Exposed Pad
Pin 29): Power Ground for the IC. The exposed pad must
be soldered to the PCB ground plane. It serves as thepower ground connection, and as a means of conducting
heat away from the die.

3118faFor more information www.linear.com/LTC3118

11

LTC3118
Block Diagram
2.2V TO 18V

VIN2

VOUT

2V TO 18V

L

2.2V TO 18V

VIN2

VIN1

BST1

SW1

SW2

VOUT

BST2

ISENSE

VCC
VCC

A FETsAND DRIVERSR1

AVERAGECURRENTAMPLIFIER

+
–

CM2

RCS

+
–

VIN1

gm

+
–

COUT

1V
SOFT-START
RAMP
VC

1.2MHz RAMPS/OSCILLATOR

CM1

FB

R2

PWM
COMPARATOR
D

ISWA

CP1 CP2

DDRV

3.8V REGULATOR
1.22V REFERENCE

VIN1
VIN2

VCC

VCC

ISWB

FB
B

BDRV

C

CDRV

0.92V

PGD

+
–

VSELECTCP2ADRV BDRV

SEL2

CP1

VIN1

PMP1

VIN1

CLK

+
–IREV

ISENSEVCC

CDRV DDRVDRIVERS–200mAPMP2

VIN1GOOD

V2GD

VIN1GOO2

VIN2
VCC

CN1

UP TO 18V

V1GD

PGND

CN2

VCC

SEL1
CLK

ISWA
ISWB

ISENSE

6A

+
IPEAK
–

VIN2

SWITCHCOMMANDS
UVLO
BURST

RUN

2V

+
–

IDEAL DIODE
MODE

+
–

VIN1GOOD+–

VIN2GOOD

V1PRIORITY
MODE

2.35V
VCC

SEL

RUN/SD

+
–

RUN1

+
–

RUN2
1.22V
MODE

GND
3118 BD

3118fa12

For more information www.linear.com/LTC3118

LTC3118
Operation
Introduction
The LTC3118 is a dual-input, current mode, monolithic
buck-boost DC/DC converter that can operate over a wide
input voltage range of 2.2V to 18V. The output voltage
can be programmed between 2V to 18V and deliver morethan 2A of load current. The LTC3118 operates from either
VIN1 or VIN2 depending on the state of the SEL pin. If SEL
is commanded to be a logic high, VOUT will be poweredfrom the highest valid input voltage. If SEL is a logic low,
VOUT will be powered from VIN1 (priority mode) assuming
sufficient input voltage is present. Internal, low RDS(ON)N-channel power switches reduce the solution complexity
and maximize efficiency.
A proprietary switch algorithm allows the buck-boost
converter to maintain output voltage regulation with input voltages that are above, below or equal to the output
voltage. Transitions between the step-up or step-down
operating modes are seamless and free of transients andsubharmonic switching, making this product ideal for noise
sensitive applications. The LTC3118 operates at a fixednominal switching frequency of 1.2MHz, which provides
an ideal trade-off between small solution size and highefficiency. Current mode control provides inherent input
line voltage rejection, simplified compensation and rapid
response to load transients. Burst Mode operation capability is also included in the LTC3118 and is user-selected
via the MODE input pin. In Burst Mode operation, theLTC3118 provides exceptional efficiency at light output
loads by operating the converter only when necessary tomaintain voltage regulation. At higher loads, the LTC3118
automatically transitions to fixed frequency PWM mode
when Burst Mode operation is selected.
For 5V VOUT applications, the input quiescent currents in
Burst Mode operation can be reduced with the internal
LDO regulator bootstrapped to the output voltage. If theapplication requires extremely low noise, continuous PWM
operation can also be selected via the MODE pin. The
LTC3118 also features accurate, resistor programmable
RUN comparator thresholds with hysteresis for each VIN.
This allows the buck-boost DC/DC converter to turn on
and off at user-selected voltage thresholds depending on
the power source for each VIN. With a wide voltage range
and high efficiency, the LTC3118 is well suited for many
demanding power systems.
Power Stage Topology
Figure 1 shows the topology of the dual-input LTC3118
power stage switches and their associated gate drivers.
The LTC3118 integrates independent switch paths from
VIN1 to SW1 and VIN2 to SW1 to provide isolation between
the selected input and the inactive input. This configuration
allows conversion from either input source, regardless of
their respective voltage levels, enabling ideal diode or VIN1
priority modes (see SEL pin description).

BST1
A1ON
PUMP1

CM1

VIN1

VOUT

A1

BST1

BST2
D

A2ON
PUMP2
VIN2

CM2
SW1

L

DON

SW2

A2
VCC
BON

VCC
B

CON

C

3118 F01

PGND

Figure 1. LTC3118 Dual-Input Power Stage
3118faFor more information www.linear.com/LTC3118

13

LTC3118
Operation
If operation from VIN1 is selected, PUMP1 connects the
low RDSON static switch between VIN1 and CM1 as shown.
Switch A1 is then driven on for a portion of each switchingcycle, as commanded by the PWM circuitry and poweredby the flying capacitor between BST1 and SW1. When
operating from VIN1, PUMP2 and A2 are disabled.
Operation from VIN2 is accomplished in a similar manner, except that PUMP2 connects VIN2 to CM2 and A2 iscommanded on by the PWM. With operation from VIN2,
PUMP1 and A1 are disabled providing isolation from VIN1.
PWM Mode Operation
If the MODE pin is high, or if the load current on theconverter is high enough to force PWM mode operation,
the LTC3118 operates at a fixed 1.2MHz frequency using a current mode control loop. PWM mode minimizes
output voltage ripple and yields a low noise switchingfrequency spectrum. A proprietary switching algorithm
provides seamless transitions between operating modes
and eliminates discontinuities in the average inductor
current, inductor ripple current and loop transfer function
throughout all modes of operation. These advantages
result in increased efficiency, improved loop stability andlower output voltage ripple. In PWM mode operation, both
SW1 and SW2 transition on every cycle independent of
the input and output voltages. In response to the internal
control loop command, an internal pulse width modulator
generates the appropriate switch duty cycle to maintainregulation of the output voltage.
When stepping down from a high input voltage to a lower
output voltage, the converter operates in buck mode andswitch D remains on for the entire switching cycle except
for a minimum SW2 low duration (typically 100ns). During the switch low duration, switch C is turned on which
forces SW2 low and charges the flying capacitor between
BST2 and SW2. This ensures that the switch D gate driver
power supply rail on BST2 is maintained. The duty cycle ofswitch A1 (or A2) and switch B are adjusted by the PWM
circuit to maintain output voltage regulation in buck mode.
If the input voltage is lower than the output voltage, theconverter operates in boost mode. Switch A1 (or A2)
remains on for the entire switching cycle except for theminimum switch low duration (typically 100ns). During theswitch low duration, switch B is turned on which forces
SW1 low and charges the flying capacitor between BST1
and SW1. This ensures that switch A1 (or A2) gate driver
power supply rail on BST1 is maintained. The duty cycleof switch C and switch D are adjusted by the PWM circuit
to maintain output voltage regulation in boost mode.
Oscillator
The LTC3118 operates from an internal oscillator witha nominal fixed frequency of 1.2MHz. This allows the
DC/DC converter efficiency to be maximized while stillusing small external components.
Input Select Logic and VIN Power Good Indicators
A simplified schematic diagram of the LTC3118’s input
select circuitry is shown in Figure 2. UVLO comparatorson VIN1, VIN2 and VCC set minimum operating voltages toensure proper operation. VCC must be greater than 2.35V
before operation is allowed from either input. Once VCC
is valid, one of the inputs must be greater than 2V typicalbefore the LTC3118 enables switching. Finally, the RUN
pin voltage for the particular input must be greater than
1.22V to enable operation. This condition will be met if theappropriate RUN pin is connected to its own VIN, RUN1 to
VIN1 for example, but may not be met if a resistor divider
is used to program the accurate RUN pin higher than the
VIN UVLO minimum. Detailed discussions of VCC, VIN and
RUN pin UVLOs are presented in later sections.
Once the UVLO conditions are satisfied, internal VIN1GOOD
and/or VIN2GOOD will assert and the LTC3118 is allowed
to operate. The state of each VINGOOD signal and the SEL
pin are decoded in logic to determine which input source
is selected, as shown on the table in Figure 2.
Open-drain indicator pins V1GD and V2GD are driven
by their respective internal VINGOOD signals and can beused to alert the system of undervoltage conditions on
the inputs. External pull-up resistors can be connected
between these pins and any supply voltage up to 18V.
Since these pins pull low with valid input voltages, evenin Burst Mode operation, high value resistors are recommended for applications where minimal no-load quiescentcurrent is critical.
3118fa14

For more information www.linear.com/LTC3118

LTC3118
Operation
UVLO COMPARATORS
V2GD

VIN2

+
2V

RUN2

VCC
2.35V

SEL PIN

+
1.22V

–

+

VCCGOOD

–

1
IDEAL
DIODE
MODE

VIN2GOOD

VIN1GOOD

RUN1

VIN1

INPUT VOLTAGE SELECT LOGIC

–

+
1.22V

–

0
PRIORITY
MODE

V1GD

+
2V

VIN1GOOD

VIN2GOOD

SELECTED VIN

1

1Highest VIN

1

0

VIN1

0

1

VIN2

0

0

No Switching

1

1

VIN1

1

0

VIN1

0

1

VIN2

0

0

No Switching–
3118 F02

Figure 2. Simplified Input Select Logic and VIN Power Good Indicators

If SEL is a logic low, the LTC3118 operates in VIN1 priority
mode where VIN1 is selected for operation if conditions
are met for VIN1GOOD to be high. If VIN1GOOD is low inpriority mode, the LTC3118 will revert to VIN2 operation
if VIN2(GOOD) is asserted, keeping VOUT powered.
If SEL is a logic high, the LTC3118 operates in ideal diodemode, where VOUT is powered from the highest input
voltage source with a high VINGOOD signal. An internal
comparator with 400mV hysteresis monitors the input
voltages to determine which is higher. If the state of thiscomparator changes during PWM operation, switching
will be suspended for six clock cycles before resumingfrom the other input source. An approximate 250µs filter/time constant prevents rapid transitions between inputs.

As with priority mode, if one of the VINGOOD signals is low
the LTC3118 will operate from the other input in order tokeep the output powered. If both VINGOOD signals are low
in either mode, the LTC3118 will not deliver power to VOUT.
VOUT Power Good Indicator
The VOUT power good indicator is an open-drain output
pin similar to the V1GD and V2GD pins shown in Figure 2.
PGD is driven by an internal comparator that monitors the
FB pin. If FB is below 0.92V (VOUT is 8% low) PGD will open
circuit, allowing an external resistor to pull high indicating
the output voltage is not in regulation. The power goodcomparator has internal filtering for glitch suppression.

3118faFor more information www.linear.com/LTC3118

15

LTC3118
Operation
Current Mode Control

resistor RA1 and to its output (ICOMP) through an internalfrequency compensation network comprised of RA2 and
CA. The average current amplifier’s output provides thecycle-by-cycle duty cycle command into the buck-boost
PWM circuitry.

The LTC3118 utilizes average current mode control for thepulse width modulator, as shown in Figure 3. Current mode
control, both average and the better known peak method,
enjoy some benefits compared to other control methods,
including: simplified loop compensation, rapid response
to load transients and inherent line voltage rejection.

The non-inverting reference level input to the average
current amplifier is VC and the feedback or inverting input
is driven from the inductor current sensing circuitry. The
inductor current sensing circuitry alternately measures thecurrent through switches A1 (or A2) and B. The output of
the sensing circuitry produces a voltage across resistor RCS
that resembles the inductor current waveform transformed
to a voltage. If there is an increase in the power converter
load on VOUT, the instantaneous level of VOUT will drop
slightly, which will increase the voltage level on VC by
the inverting action of the voltage error amplifier. Whenthe increase on VC first occurs, the output of the current
averaging amplifier, ICOMP, will increase momentarily tocommand a larger duty cycle. This duty cycle increase
will result in a higher inductor current level, ultimately
raising the average voltage across RCS. Once the average

Referring to Figure 3, an internal high gain transconductance error amplifier, labeled VAMP, monitors VOUT
through a voltage divider connected to the FB pin andprovides an output, VC, used by the current mode control
loop to command the appropriate inductor current level.
To ensure stability, external frequency compensation
components (RZ, CP1 and CP2) must be installed between VC and GND. The procedure for determining thesecomponents is provided in the Applications Information
section of this data sheet. VC is internally connected to thenoninverting input of a high gain, integrating, operational
amplifier, referred to in Figure 3 as IAMP. The inverting
input of the average current amplifier is connected to the
inductor current sense resistor RCS through a gain-setting
INDUCTORCURRENT
SENSE

IL

SW1

RA1
VOUT

R1

R2

RCS

FB
1V

VAMP

–
+

SW2
IAVG

CA

RA2

– IAMP
+
VC

PWM

ICOMP

TO
SWITCHES

1.2MHz RAMPS/OSCILLATOR
DRIVE LOGIC
3118 F03

RZ

CP2

CP1

Figure 3. Average Current Mode Control Loop

3118fa16

For more information www.linear.com/LTC3118

LTC3118
Operation
value of the voltage on RCS is equivalent to the VC level,
the voltage on ICOMP will revert very closely to its previous level into the PWM, and force the correct duty cycle
to maintain voltage regulation at this new higher inductor
current level. The average current amplifier is configured as
an integrator, so in steady state, the average value of thevoltage applied to its inverting input (voltage across RCS)
will be equivalent to the voltage on its noninverting input
VC. As a result, the average value of the inductor current
is controlled in order to maintain voltage regulation. The
entire current amplifier and PWM can be simplified as a
voltage controlled current source, with the driving voltage coming from VC. VC is commonly referred to as thecurrent command for this reason, and the voltage on VC
is directly proportional to average inductor current, which
can prove useful for many applications.
The voltage error amplifier monitors VOUT through a voltage
divider and makes adjustments to the current commandas necessary to maintain regulation. The voltage error
amplifier therefore controls the outer voltage regulation
loop. The average current amplifier makes adjustments
to the inductor current as directed by the voltage error
amplifier output via VC and is commonly referred to as
the inner current loop amplifier. The average current mode
control technique is similar to peak current mode control
except that the average current amplifier, by virtue of its
configuration as an integrator, controls average current
instead of the peak current. This difference eliminates thepeak-to-average current error inherent to peak current
mode control, while maintaining most of the advantages
inherent to peak current mode control.
Average current mode control requires appropriatecompensation for the inner current loop, unlike peakcurrent mode control. The compensation network musthave high DC gain to minimize VOUT regulation errors
and high bandwidth to quickly change the commanded
current level following transient load steps. The inner
loop compensation components are fixed internally on
the LTC3118. External compensation of the voltage loop
is detailed in the Applications Information section and issimilar to techniques used for peak current mode control.

Inductor Current Sense and Maximum Output Current
As part of the current control loop, the LTC3118 has current sense circuitry that measures the inductor currentof the buck-boost converter, as shown in Figure 3. This
circuitry measures the current through switches A1 (orA2) and B separately and produces proportional output
currents that are summed at the current sense resistor RCS.
Sensed A and B switch currents form a voltage replica of
the inductor current at RCS, which is used by the average
current amplifier, as described in the previous section.
The voltage amplifier output, VC, is internally clamped toa nominal value of 1V. Since the average inductor current
is proportional to VC, the 1V clamp sets the maximum
average inductor current that can be programmed by the
inner current loop. Taking into account the current sense
amplifier’s gain, and the value of RCS, the maximum average
inductor current is 3.6A typical. In buck mode, the output
current is approximately equal to the inductor current IL.
IOUT(BUCK) ≈ IL • 0.85
The 100ns SW1/SW2 forced low time on each switchingcycle briefly disconnects the inductor from VOUT and VIN,
resulting in slightly less output current in either buck or
boost mode for a given inductor current. In boost mode,the output current is related to average inductor current
and duty cycle by:
IOUT(BOOST) ≈ IL • (1 – D)
where D is the converter duty cycle.
Since the output current in boost mode is reduced by the
duty cycle (D), the output current rating in buck mode isalways greater than in boost mode. Also, because boost
mode operation requires a higher inductor current for agiven output current compared to buck mode, the efficiency
in boost mode will be lower due to higher conduction(IL² • RDS(ON)) losses in the power switches. This will further reduce the output current capability in boost mode. In
either operating mode, however, the inductor peak-to-peakripple current does not play a major role in determining
the output current capability.

3118faFor more information www.linear.com/LTC3118

17

LTC3118
Operation
The maximum load current capability in PWM mode curvesin the Typical Performance Characteristics section show
the relationship of input voltage and the ability to deliverload current at VOUT = 5V and 12V. When the input voltage
is a volt or more above VOUT in buck mode, the LTC3118
is capable of providing more than 2A of load current. In
boost mode, the output current capability is further reducedby the boost ratio or duty cycle (D) as described in thepreceding equation.
Overload Current Limit and Reverse Current
Comparators
The internal current sense waveforms are used by thepeak overload current (IPEAK) and reverse current (IREV)
comparators. The IPEAK current comparator monitors
ISENSE and interrupts normal PWM operation if the inductor current level exceeds its maximum internal threshold.
This threshold is approximately 60% above the maximum
average current level of the current control loop. If theinternal current sense waveform rises above this level, theLTC3118 will disconnect the inductor from VIN by shutting off switch A1 (or A2) to prevent higher current in the
inductor. The IPEAK circuitry is reset by the oscillator clockat the end of each switching cycle. In the event that theoverload comparator is tripped as the result of an output
short-circuit condition, where VOUT is discharged below
approximately 1V, the LTC3118 will initiate a soft-start
event keeping the on-chip power dissipation to low levels.
Once the short circuit is removed, the LTC3118 will restartin the normal fashion. If the average current loop is able
to prevent inductor current from reaching IPEAK during ashort-circuit event, soft-start will not be initiated, but the
maximum current capability of the current loop will be
reduced by 40% to reduce power dissipation.

The LTC3118 contains a reverse current comparator set toa nominal value of –200mA. If the internal current sense
waveform transitions below the internally set reverse current threshold, the LTC3118 will disconnect the inductorfrom VOUT by shutting off switch D, to prevent rapid discharge of the output capacitor. The IREV circuitry is resetby the oscillator clock at the end of the switching cycle.
Burst Mode Operation
When the MODE pin is held low, the LTC3118 is configured
for automatic Burst Mode operation. As a result, the buckboost DC/DC converter will operate with normal continuous
PWM switching above a predetermined average inductor
current and will automatically transition to power saving
Burst Mode operation below this level. Refer to the Typical
Performance Characteristics section of this data sheet todetermine the Burst Mode transition threshold for various
combinations of VIN and VOUT.
With MODE held low at light output loads, the LTC3118
will go into a standby or sleep state when the output voltage achieves its nominal regulation level. The sleep state
halts PWM switching and powers down all nonessentialfunctions of the IC, significantly reducing the quiescentcurrent of the LTC3118. This greatly improves overall
power conversion efficiency when the output load islight. Since the converter does not operate in sleep, theoutput voltage will slowly decay at a rate determined by
the output load resistance and the output capacitor value.
When the output voltage has decayed by a small amount,the LTC3118 will wake up and resume normal PWM
switching operation until the voltage on VOUT is restored
to the previous level. If the load is very light, the LTC3118
may only need to switch for a few cycles to restore VOUT,
and may sleep for extended periods of time, significantly
improving conversion efficiency.

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For more information www.linear.com/LTC3118

LTC3118
Operation
Soft-Start

Undervoltage Lockouts

The LTC3118 soft-start circuit minimizes inrush current
and output voltage overshoot on initial power up. The
required timing components for soft-start are internal to
the LTC3118 and produce typical soft-start durations ofapproximately 1ms. The internal soft-start circuit slowly
ramps the error amplifier output at VC. In doing so, thecurrent command of the IC is slowly increased, startingfrom zero. After initial power-up, soft-start can be reset by
UVLO on VCC, both VIN1GOOD and VIN2GOOD de-asserting,thermal shutdown, or a VOUT short circuit.

The LTC3118 undervoltage lockout (UVLO) circuits disable
operation of the internal power switches if both VIN1 and
VIN2 or the VCC voltages are below their respective UVLO
thresholds (see Figure 2). There are three UVLO circuits,
one for each VIN and another that monitors VCC. The VINUVLO comparators have a falling voltage threshold of 1.8V
(typical at room temperature). If both input voltages fall
below this level, switching is disabled until one VIN rises
above 2V, as long as VCC is above its UVLO threshold. The
VCC UVLO has a falling voltage threshold of 2.2V (typical).
If VCC falls below this threshold, IC operation is disabled
until VCC rises above 2.35V as long as one VIN is above
its UVLO threshold level.

VCC Regulator
An internal low dropout regulator (LDO) generates anominal 3.8V rail from the active input VIN1 or VIN2. The
VCC rail powers the internal control circuitry and powerdevice gate drivers of the LTC3118, including the BST pin
capacitors. The VCC regulator is disabled in shutdown to
reduce quiescent current and is enabled by forcing one
RUN pin above its logic threshold. The VCC regulator
includes current-limit protection to safeguard against
accidental short-circuiting of the LDO rail. In 5V VOUT applications, VCC can be powered by VOUT through an external
Schottky diode. This technique is commonly referred toas bootstrapping. Bootstrapping can provide a significant
efficiency improvement, particularly when the active VIN
is high, and also allows operation to the minimum rated
input voltage of 2V. For more information see Bootstrapping the VCC Regulator with 5V VOUT or External Supply,in the Applications Information section.

Depending on the particular application, any of these
UVLO thresholds could be the limiting factor affecting
the minimum input voltage required for operation. The
LTC3118 VCC regulator uses VIN1 or VIN2 for its power
input, whichever is active (see the Input Select Logic and
VIN Power Good Indicators section). If VCC is not bootstrapped, there exists a voltage drop between the active
VIN and VCC. The dropout voltage is proportional to theloading on VCC due to the gate charge to the internal powerswitches. The Typical Performance Characteristics sectionof this data sheet provides information on the dropout
voltage between VIN1 (or VIN2) and VCC.
In applications where VCC is bootstrapped (powered by
VOUT through a Schottky diode or auxiliary power rail),the minimum input voltage for operation (after start-up)
will be limited only by the VIN UVLO thresholds (1.8V
typical). Please note: If the bootstrap voltage is derived
from the LTC3118 VOUT and not an independent power
rail, then the minimum input voltages required for initialstart-up are still limited by the minimum VCC voltage(2.35V typical).

3118faFor more information www.linear.com/LTC3118

19

LTC3118
Operation
RUN1 and RUN2 Pin Comparators
Forcing both RUN1 and RUN2 to a logic low places the
LTC3118 in a low current shutdown state. When the voltage on either pin is brought above a 0.65V logic threshold,certain IC functions are enabled as shown in Figure 4a.
The RUN1 and RUN2 pins also include accurate internal
comparators that allow them to be used to set custom
rising and falling ON/OFF thresholds for VIN1 and VIN2,
respectively, with the addition of external resistor dividers.
If either RUN pin voltage is increased to exceed its accuratecomparator threshold (1.22V nominal), all functions of the
buck-boost converter will be enabled and switching willcommence, assuming the respective VIN and VCC UVLO
circuits are cleared (see Figure 2).
If both RUN1 and RUN2 are brought below the accuratecomparator threshold, the buck-boost converter will inhibit
switching, but the VCC regulator and control circuitry willremain powered unless both RUN pins are brought below
the logic threshold. Therefore, in order to completely
shut down the IC and reduce the VIN currents to < 2µA(typical), it is necessary to ensure that both RUN pins arebrought below the worst-case low logic threshold of 0.2V.
RUN1 and RUN2 are high voltage capable inputs but must
be connected to their respective VIN1 and VIN2 supplies
through a high value resistor greater than 200k to preventa potential latch condition at the pin. The RUN pins canbe driven above VIN or VOUT within their specified voltage
ratings. If either RUN pin is forced above 5V, it will sink asmall current, as given by the following equation:
IRUN ≈

VRUN − 5V
3MΩ

With the addition of optional resistor divider(s), as shownin Figure 4a, the RUN pin(s) can be used to establish auser-programmable turn-on and turn-off threshold.
The buck-boost converter is enabled when the voltage
on either RUN pin reaches 1.22V. Therefore, the turn-on
voltage threshold on VIN is given by: R 
VTURNON = 1.22V 1+ T  RB 

VIN2 VIN1
LOGIC
SIGNALLTC3118
VIN

ACCURATE
THRESHOLD
RUN1 OR
RUN2

RT
RB

1.22V

0.65V

–
+

ENABLE
SWITCHING–+ENABLE LDO ANDCONTROL CIRCUITS

RUN1

VIN1 ACTIVE
1M

1M

100pF

VIN2 VIN1
LOGIC
SIGNAL

CN1

RUN2

100pF

CN2
VIN2 ACTIVE

1M

100pF

1M

100pF

LOGIC
THRESHOLD(a)3118 F04c

3118 F04b

3118 F04a

(b)

(c)

Figure 4. (a) Accurate RUN1 or RUN2 Pin Comparators, (b) Manual VIN Select with Overlap Timing, (c) Active VIN Indicators

3118fa20

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LTC3118
Operation
The RUN comparators include a built-in hysteresis ofapproximately 170mV, so that the turn-off threshold will
be approximately 15% lower than the turn-on threshold.
Put another way, the internal threshold levels for the RUN
comparators to disable switching from a particular input
is 1.05V.
 R 
VTURNOFF = 1.05V 1+ T  RB 
The RUN comparator is relatively noise insensitive, butthere may be cases due to PCB layout, very large value
resistors for RT and RB (Figure 4a), or proximity to noisy
components where noise pickup is unavoidable and may
cause the turn-on or turn-off levels to be intermittent. In
these cases, a small value filter capacitor can be added
across RB to ensure proper operation.
Selecting Priority or Ideal Diode Mode Operation
Priority Mode (SEL=0)
Priority mode operation is suggested for most applications,since powering from one of the sources is typically
preferred. In priority mode, the primary input is connected
to VIN1 and the auxiliary input is connected to VIN2. The
LTC3118 will maintain operation from VIN1 until either
the RUN1 or minimum VIN1 UVLO circuits transition the
LTC3118 to VIN2 operation if valid. It is important that the
RUN1 turn-off threshold programs the minimum VIN1
above 2.5V in Priority Mode unless VCC is back-fed andheld above 2.5V. This prevents an unintended soft-start
cycle from occurring if VCC hits its UVLO threshold when
the VIN1 source is removed, before transitioning to VIN2
operation.
Depending on the maximum load current of the application,
the RUN1 and RUN2 minimum VIN turn-off thresholds
may need to set well above 2.5V to prevent VOUT fromlosing regulation, especially in step-up mode. Pleaserefer to Maximum Load Current vs VIN curves found in

the Typical Performance Characteristics. Maximum load
current capability when VIN1 or VIN2 is less than 3.8V canbe improved if VCC is boot-strapped to 5V as shown in
Figure 7.
Ideal Diode Mode (SEL=1)
Ideal Diode mode operation is available on the LTC3118 forsystems with low ESR sources or where the programmed
operating range of the two inputs can be separated as will
be discussed. In Ideal Diode mode, an internal comparator
monitors the voltage on both VIN1 and VIN2 to determine
which input is higher. The comparator has approximately
800mV of hysteresis to help prevent the part from switching
between the two inputs if the source voltages are equal. The
comparator has an approximate 250µs filter delay to prevent
rapid switching between inputs and erratic operation. Whenthe LTC3118 switches between inputs, current supplied
from one source is suspended before transitioning to theother source. Depending on the impedance of each source
and the amount of input current required to support theload on VOUT, it is possible for the voltage ripple on one
or both inputs to exceed this comparator’s hysteresis.
As an example, if both input sources have 300mΩ ofimpedance and 2A of current is being drawn from theactive source, a 600mV step will occur on the inputs
during switchover, approaching the comparator’s 800mVof typical hysteresis. When the input voltages are equal,
the LTC3118 could toggle between VIN1 and VIN2 operation
at high load currents. For such systems, operation inPriority mode is recommended, unless the RUN pins canbe programmed such that the minimum operating voltage
of one input is set above the maximum source voltage ofthe other input. As with priority mode, the minimum VIN
operating voltages should be set by their RUN pins above
VCC UVLO and higher if needed to support maximum load
current. Low ESR 100µF to 220µF aluminum electrolytic
capacitors close to both input pins help to reduce resonant
ringing during VIN switchover, due to cable inductances
found in some applications and bench evaluation set-ups.

3118faFor more information www.linear.com/LTC3118

21

LTC3118
Operation
Manual VIN Select Circuits
The SEL pin can be used to manually switch between VIN1
and VIN2, if VIN2 is connected to a voltage greater than
VIN1. In this case, both RUN pins must remain asserted
above their 1.22V thresholds. The LTC3118 will run off
VIN1 when SEL is low and the higher VIN2 source when
SEL is high.
For systems requiring manual VIN selection where therelative voltages are unknown, the RUN pins can be usedwith a few precautions. Each RUN pin contains internalfiltering to reduce the chance of unintended turn-on or
turn-off due to noise events. The turn-on delay is typically
50µs in order to manage inductive ringing during supply
plug in. Accordingly, a >100µs overlap time of asserted
RUN1 and RUN2 signals is recommended to prevent a
momentary shutdown of the IC and a subsequent softstart cycle.

If this overlap timing cannot be provided by the system
micro-controller, an external circuit similar to Figure 4b
can be added to each RUN pin. With the added circuit, VIN1
and VIN2 can be driven alternately off and on as shown.
The diode provides a faster turn-on path, where the RC
delay to GND is set to ~100µs in order to prevent VOUT
from drooping during switch-over.
Active VIN Indicator
The V1GD and V2GD indicators can be monitored todetermine if VIN1 or VIN2 have sufficient voltage based oninternal UVLO circuits and the RUN pin divider networks
as previously discussed. Some applications may require
an additional indication of which VIN is active and whichis inactive. This indication can be implemented with theCN1 and CN2 charge-pump pins and an external circuit
similar to Figure 4c. The diode and RC network provide
peak detection and filtering of the active CN pin which isswitching in PWM mode and held high in sleep. The CN
pin for the inactive VIN is held low.

Applications Information
Thermal Considerations
The power switches of the LTC3118 are designed to operate continuously with currents up to the internal current
limit thresholds. However, when operating at high current
levels, there may be significant heat generated within the
IC. In addition, the VCC regulator can generate a significant
amount of heat when the active VIN is high. This adds to thetotal power dissipation of the IC. As described elsewherein this data sheet, bootstrapping of VCC for 5V output applications can essentially eliminate this power dissipation
term and significantly improve efficiency.
Careful consideration must be given to the thermal environment of the IC in order to provide a means to remove
heat from the IC and ensure that the LTC3118 is able
to provide its full rated output current. Specifically, theexposed die attach pad of both the QFN and FE packages
must be soldered to a copper layer on the PCB to maximize
the conduction of heat out of the IC package. This can beaccomplished by utilizing multiple vias from the die attach
pad connection underneath the IC package to other PCB
layer(s) containing large copper planes. A recommended
board layout incorporating these concepts is shown in
Figure 5. Typical temperature rise versus load current
curves using the PCB in Figure 5 are given in the Typical
Performance Characteristics section.
If the IC die temperature exceeds approximately 165°C,
thermal shutdown will be invoked and all switching will
be inhibited. The part will remain disabled until the dietemperature cools by approximately 10°C, at which timea soft-start is initiated to provide a smooth recovery.

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LTC3118
Applications Information
Top Layer

2nd Layer

3rd Layer

Bottom Layer (Top View)

Figure 5. Typical 4-Layer PC Board Layout

3118faFor more information www.linear.com/LTC3118

23

LTC3118
Applications Information
Inactive VIN Leakage Currents
The inactive input (VIN1 or VIN2) consumes a small amountof bias current and will exhibit some amount of leakage
current, through the disabled switches, depending on thetemperature of the die and the average DC voltage between
the inactive VIN and SW1 (stand-off voltage). Please refer tothe Die Temperature Rise and N-Channel MOSFET leakage
curves in the Typical Performance Characteristics of thedata sheet. The stand-off voltage can be positive or negative
depending on the VIN1 and VIN2 voltages and varies with
SW1 duty cycle. Figure 6 shows typical currents into theinactive input as a function of its voltage at various levels
of inductor current as the LTC3118 operates in PWM mode
from an active 12V input and 12V output. Higher inductor
currents generally translate to higher leakage currents due
to power dissipation, resulting in a die temperature rise.

CURRENT INTO INACTIVE INPUT (µA)

100

Referring to the curves in Figure 6, leakage currents are
generally supplied from the inactive source into its respective VIN pin above a few volts. At lower voltages, it ispossible to get reverse current back-fed into the source,
causing a depleted battery or unplugged input to slowly
charge. In some cases, a dummy load resistor across theinactive input may be needed to prevent that input fromrising above its UVLO causing a momentary turn-on. A
good thermal design will help to reduce unwanted leakage
currents into or out of the inactive input, especially at highswitch currents where die temperatures increase. A tightboard layout near the VIN1/CM1 and VIN2/CM2 pins toground is advised to reduce leakage that may occur due
to SW1 edge rates and parasitic inductances in the traces.

IL = 0A
IL = 0.5A
IL = 1A
IL = 2A

80
60
40
20
0

–20

0

3

6
12
15
9
INACTIVE INPUT VOLTAGE (V)183118 F06

Figure 6. Inactive VIN Current vs Voltage and Inductor Current (IL)Active VIN = VOUT = 12V in PWM Mode

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LTC3118
Applications Information
A standard application circuit for the LTC3118 is shown on
the front page of this data sheet. The appropriate selectionof external components is dependent upon the required
performance of the IC in each particular application, given
considerations and trade-offs such as PCB area, input
and output voltage range, output voltage ripple, required
efficiency, thermal considerations and cost. This sectionof the data sheet provides some basic guidelines and considerations to aid in the selection of external components
and the design of the applications circuit.
VCC Capacitor Selection
VCC is generated by a low dropout linear regulator fromeither VIN1 or VIN2, whichever is selected. Both VCC regulators have been designed for stable operation with a wide
range of output capacitors. For most applications, a low
ESR capacitor of 4.7µF should be used. The capacitor
should be located as close to VCC as possible and connected to ground through the shortest trace possible. If
the connecting trace cannot be made short, an additional
0.1µF bypass capacitor should be connected between
VCC and ground, as close to the package pins as possible.
Bootstrapping the VCC Regulator with 5V VOUT or
External Supply
The high and low side gate drivers are powered by VCC,
which is generated from the selected VIN through aninternal linear regulator. In some applications, especiallyat high input voltages, the power dissipation in the linear
regulator can become a significant contributor to thermal
heating of the IC. The Typical Performance Characteristics
section of this data sheet provides data on VCC current in

PWM operation, which is supplied by VIN. A significant
performance advantage can be attained in applications
where VOUT is programmed to 5V, if VCC is powered by
VOUT rather than the selected VIN. This can be done byconnecting a Schottky diode from VOUT to VCC, as shownin Figure 7. With the bootstrap diode installed, the gate
driver currents are supplied by the buck-boost converter
at high efficiency rather than through the less efficientinternal linear regulator. The internal linear regulator
contains reverse blocking circuitry that allows VCC to be
driven slightly above their nominal regulation level with
only a slight amount of reverse current. Please note that thebootstrapping supply (either VOUT or a separate regulator)
must limit VCC to less than 6V.
BST, Charge Pump and CM Capacitor Selection
Small ceramic capacitors are needed to provide a sufficient amount of charge to the high side switches. As
shown in the applications circuits and the front page ofthis data sheet, small capacitors are required from BST1
to SW1, BST2 to SW2, CN1 to CP1, CN2 to CP2, CM1 to
GND and CM2 to GND. Recommended initial values for
the BST to SW capacitors are 0.1µF with > 5V rating, CN
to CP capacitors are 10nF with > 20V rating, and CM to
GND capacitors are 47nF with > 20V rating.
Inductor Selection
The choice of inductor used in LTC3118 applications
influences the maximum deliverable output current, theconverter bandwidth, the magnitude of the inductor current
ripple and the overall converter efficiency. The inductor
must have a low DC series resistance and high output

VOUT

VOUT

LTC3118VCC
4.7µF
3118 F07

Figure 7. Bootstrapping VCC

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25

LTC3118
Applications Information
current capability or efficiency will be compromised. Larger
inductor values reduce inductor current ripple, but will
not increase output current capability as is the case withpeak current mode control, as described in the Inductor
Current Sense and Maximum Output Current section ofthis data sheet. Larger value inductors also tend to havea higher DC series resistance for a given case size, which
will have a negative impact on efficiency. Larger valuesof inductance also lower the right half plane (RHP) zerofrequency when operating in boost mode, requiring theconverter bandwidth to be set lower in frequency, thereby
slowing the converter’s load transient response. Most
LTC3118 application circuits deliver the best performancewith an inductor value between 3.3µH and 10µH. In general, a 3.3µH inductor is recommended for VOUT up to 5V,
6.8µH for VOUT = 12V and 10µH for VOUT = 18V. Inductor
values for other output voltages can be scaled accordingly.
Regardless of inductor value, the saturation current rating should be such that it is greater than the worst-caseaverage inductor current plus half of the ripple current. The peak-to-peak inductor current ripple for each
operational mode can be calculated from the following
formula, where f is the switching frequency (1.2MHz),
L is the inductance in µH, and tLOW is the switch pin
minimum low time in µs. The switch pin minimum low
time is typically 0.1µs.
∆IL(P-P)BUCK =VOUT  VIN − VOUT   1  − tLOW  Amps

L 
VIN
 f

ripples at the voltage extremes (18V VIN for buck and 2.7V
VIN for boost) are:Buck = 600mA peak-to-peak
Boost = 200mA peak-to-peakOne-half of this inductor ripple current must be added tothe highest expected average inductor current in order toselect the proper saturation current rating for the inductor(about 4A).
In addition to its influence on power conversion efficiency,
the inductor DC resistance can also impact the maximum
output current capability of the buck-boost converter particularly at low input voltages. In buck mode, the output
current of the buck-boost converter is primarily limitedby the inductor current reaching the average current limit
threshold defined by VC. However, in boost mode, especially at large step-up ratios, the output current capability
can also be limited by the total resistive losses in the powerstage. These losses include switch resistances, inductor
DC resistance and PCB trace resistance. Avoid inductors
with a high DC resistance (DCR), as they can degrade themaximum output current capability from what is shownin the Typical Performance Characteristics section. As aguideline, the inductor DCR should be significantly lessthan the typical power switch resistance of 100mΩ. The
only exceptions are applications that have a maximum
output current much less than what the LTC3118 is capable of delivering.
Different inductor core materials and styles have an impact
on the size and price of an inductor at any given current
rating. Shielded construction is generally preferred as it
minimizes the chances of interference with other circuitry.
The choice of inductor style depends upon the price, sizing
and EMI requirements of a particular application. Table 1
provides a small sampling of inductors that are well suited
to many LTC3118 applications.

∆IL(P-P)BOOST =
VIN  VOUT − VIN   1  − tLOW  AmpsL  VOUT   f
It should be noted that the worst-case inductor peak-topeak inductor ripple current occurs when the duty cyclein buck mode is maximum (highest VIN), and in boost
mode when the duty cycle is 50% (VOUT = 2 • VIN). As an
example, if VIN (minimum) = 2.7V and VIN (maximum) =18V, VOUT = 5V and L = 3.3µH, the peak-to-peak inductor

Output Capacitor Selection
A low effective series resistance (ESR) output capacitor
should be connected at the output of the buck-boost converter in order to minimize output voltage ripple. Multilayer
ceramic capacitors are an excellent option as they have low
ESR and are available in small footprints. The capacitor
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LTC3118
Applications Information
Table 1. Representative Buck-Boost Surface Mount Inductors
PART NUMBER

VALUE
(µH)

DCR
(mΩ)

MAX DCCURRENT (A)SIZE(W × L × H) mm

MSS7341T
XAL7030

3.3
6.8

18
42

3.7
4.4

7×7×4
8×8×3

Coilcraftwww.coilcraft.com

SD8328

3.3
4.7

14
19

4.0
3.6

8×8×3
8×8×3

Coiltronics
www.coiltronics.com

LQH88PN
LQH88PN
LQH88PN

3.3
4.7
6.8

16
22
28

5
4.2
3.8

8×8×4
8×8×4
8×8×4

Muratawww.murata.com

CDRH8D28NP

3.3
4.7

18
25

4
3.4

8×8×3
8×8×3

Sumidawww.sumida.com

VLP840

3.3
6.8

15
24

5.2
3.6

8×8×4
8×8×4

TDK Electronics
www.tdk.co.jp

FDSD0603

3.3
6.8

23
51

5.6
3.7

7×7×3
7×7×3

Toko
www.toko.co.jp

7447789003
7447789004
7447779006

3.3
4.7
6.8

30
35
35

4.2
3.9
3.3

7×7×3
7×7×3
7 × 7 × 4.5

Würth Elektronik
www.we-online.com

value should be chosen large enough to reduce the output
voltage ripple to acceptable levels. Neglecting the capacitor’s ESR and ESL, the peak-to-peak output voltage ripple
can be calculated by the following formula, where f is thefrequency in MHz (1.2MHz), COUT is the capacitance inµF, tLOW is the switch pin minimum low time in µs (0.1µs)
and ILOAD is the output current in Amps.

It∆VP-P(BUCK) = LOAD LOW Volts
COUT

MANUFACTURER

In addition to the output voltage ripple generated acrossthe output capacitance, there is also output voltage ripple
produced across the internal resistance of the output
capacitor. The ESR-generated output voltage ripple is proportional to the series resistance of the output capacitor,
and is given by the following expressions where RESR isthe series resistance of the output capacitor and all otherterms as previously defined.

I
R∆VP-P(BUCK) = LOAD ESR ≅ ILOAD RESR Volts
1− tLOW f∆VP-P(BOOST) =I LOAD  VOUT − VIN + tLOW fVIN  Volts
fCOUT VOUT
Examining the previous equations reveals that the output
voltage ripple increases with load current and is generally higher in boost mode than in buck mode. Note thatthese equations only take into account the voltage ripple
that occurs from the inductor current to the output being
discontinuous. They provide a good approximation to theripple at any significant load current but underestimate theoutput voltage ripple at very light loads where the output
voltage ripple is dominated by the inductor current ripple.

∆VP-P(BOOST) =VILOAD RESR VOUT
≅ ILOAD RESR  OUT  Volts
VIN (1− tLOW f ) VIN In most LTC3118 applications, an output capacitor between
47µF and 100µF will work well.
Input Capacitor Selection
The VIN1 or VIN2 pin carries the full inductor current andprovides power to internal control circuits in the IC. To
minimize input voltage ripple and ensure proper operationof the IC, a low ESR bypass capacitor with a value of atleast 10µF should be located as close to the pin as possible.
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27

LTC3118
Applications Information
capacitor types that are well suited to these applications
including multilayer ceramic, low ESR tantalum, OS-CON
and POSCAP technologies. In addition, there are certain
types of electrolytic capacitors, such as solid aluminumorganic polymer capacitors, that are designed for low
ESR and high AC currents and these are also well suited
to some LTC3118 applications. Table 2 provides a partial
listing of appropriate capacitors to use. The choice of
capacitor technology is primarily dictated by a trade-off
between size, leakage current and cost. In backup power
applications, the input or output capacitor might be a superor ultra capacitor with a capacitance value measuring in
the Farad range. The selection criteria in these applications
are generally similar except that voltage ripple is generally
not a concern. Some capacitors exhibit a high DC leakage current which may preclude their consideration for
applications that require a very low quiescent current in
Burst Mode operation.

The traces connecting this capacitor to VIN1 or VIN2 andthe ground plane should be made as short as possible.
When powered through long leads or from a high ESR
power source, a larger value bulk input capacitor may berequired. In such applications, a 47µF to 100µF electrolytic
capacitor in parallel with a 1µF ceramic capacitor generally yields a high performance, low cost solution. In ideal
diode mode, the voltage ripple on each input must be kept
below the VIN comparator’s 800mV hysteresis to prevent
repetitive switching between VIN1 and VIN2 operation when
the input voltages are similar.
Recommended Input and Output Capacitors
The capacitors used to filter the input and output of the
LTC3118 must have low ESR and must be rated to handle
the large AC currents generated by the switching converters. This is important to maintain proper functioning of
the IC and to reduce output voltage ripple. There are many
Table 2. Representative Bypass and Output Capacitors
PART NUMBER

VALUE
(µF)

VOLTAGE(V)CAPACITOR TYPEESR (mΩ)SIZE(W × L × H) mm

12103D226MAT2A

2225

X5R Ceramic

3.2 × 2.5 × 2.8

AVX
www. avx.com

C2220X226K3RACTU
A700D226M016ATE030

22
22

25
16

X7R Ceramic,
Aluminum
Polymer 30mΩ

5.7 × 5 × 2.4
7.3 × 4.3 × 2.8

Kemet
www.kemet.com

GRM32ER71E226KE15L

22

25

X7R Ceramic

3.2 × 2.5 × 2.5

Muratawww.murata.com

PLV1E121MDL1

82

25

Aluminum
Polymer, 25mΩ

8×8×3

Nichiconwww.nichicon.com

ECJ-4YB1E226M

2225

X5R Ceramic

3.2 × 2.5 × 2.5

Panasonic
www.panasonic.com

25TQC22MV
16TQC100M
25SVPF47M

22
100
47

25
16
25

POSCAP, 50mΩPOSCAP, 45mΩOS-CON, 30mΩ7.3 × 4.3 × 1.9
7.3 × 4.3 × 3.1
6.6 × 6.6 × 5.9

Sanyo
www.sanyo.com

TMK325BJ226MM-T

22

25

X5R Ceramic

3.2 × 2.5 × 2.5

Taiyo Yuden
www.t-yuden.com

CKG57NX5R1E476M

4725

X5R Ceramic

6.5 × 5.5 × 5.5

TDK
www.tdk.com

MANUFACTURER

3118fa28

For more information www.linear.com/LTC3118

LTC3118
Applications Information
Ceramic capacitors are often utilized in switching converter applications due to their small size, low ESR andlow leakage currents. However, many ceramic capacitors
intended for power applications experience a significant
loss in capacitance from their rated value as the DC bias
voltage on the capacitor increases. It is not uncommon
for a small surface mount capacitor to lose more than
50% of its rated capacitance when operated near its
maximum rated voltage. This effect is generally reduced
as the case size is increased for the same nominal value
capacitor. As a result, it is often necessary to use a larger
value capacitance or a higher voltage rated capacitor thanwould ordinarily be required to actually realize the intended
capacitance at the operating voltage of the application. X5R
and X7R dielectric types are recommended as they exhibit
the best performance over the wide operating range andtemperature of the LTC3118. To verify that the intended
capacitance is achieved in the application circuit, be sure
to consult the capacitor vendor’s curve of capacitanceversus DC bias voltage.

Compensation of the Buck-Boost Converter
The LTC3118 utilizes an average current architecture to
regulate the output voltage. Average current mode control
has two loops that require frequency compensation, theinner average current loop and the outer voltage loop. The
compensation for the inner average current loop is fixedwithin the LTC3118 to simplify the loop design and provide
the highest possible bandwidth over a wide operating range.
The outer voltage loop does require external compensation
components, allowing the overall loop characteristics to
be customized for the application.
The average current mode control used in the LTC3118 canbe conceptualized as a voltage-controlled current source(VCCS), driving the output load formed primarily by RLOAD
and COUT, as shown in Figure 8.
The voltage error amplifier output (VC), provides a command input to the VCCS. The full-scale range of VC is 0.6V
(200mV to 800mV). With a full-scale command on VC,

VOUT = 5V
VOLTAGECONTROLLED
CURRENTSOURCE+–VOLTAGE
ERROR
AMP

–
+

gm

FB

R1
400k
R2
100k

1V

COUT
47µF
RCOESR
0.01Ω

RLOAD
5Ω

VC
gm = 3.6A/0.6V
RZ

800mV
GND

CP2

CP1
3118 F08

Figure 8. Simplified Representation of Average Current Mode Control Loop

3118faFor more information www.linear.com/LTC3118

29

LTC3118
Applications Information
the LTC3118 buck-boost converter will generate an average 3.6A of inductor current (typical) from the converter
making the transconductance gain 6A /V. As with peakcurrent mode control, the inner average current control
loop effectively turns the inductor into a current source overthe frequency range of interest, resulting in a frequency
response from the power stage that exhibits a single pole(–20dB / decade) roll-off. The output capacitor (COUT) andload resistance (RLOAD) form a dominant low frequency
pole, where the effective series resistance of the output
capacitor and its capacitance form a zero, usually at a highenough frequency to be ignored.
A potentially troublesome right half plane zero (RHPZ)
is also encountered if the converter is operated in boost
mode. The RHPZ causes an increase in gain, like a zero, but
a decrease in phase, like a pole. This can ultimately limit
the maximum converter bandwidth that can be achieved
with the LTC3118. The RHPZ is not present when operating in buck mode.
The overall open loop gain at DC is the product of thefollowing terms:
Voltage Error Amp Gain:gm • REA = 80µS • 5MΩ =400V(fixed)V

Voltage Divider Gain:
VFB
1V
=
VOUT
VOUT

Load Resistance:V
RLOAD = OUT
ILOAD
The frequency dependent terms that affect the loop gain
include:Output Load Pole (P1):1(application dependent)
2π • RLOAD • COUT
Right Half Plane Zero (RHPZ):
VIN 2 • RL
(application dependent)
VOUT 2 • 2π • L
Voltage Error Amplifier Compensation: 2 poles and 1 zero(application dependent)
The voltage amplifier’s frequency response is designed
to optimize the response for the overall loop. Measurement of the power stage gain over line, load, component
variation and frequency is strongly recommended prior
to loop design. The design parameters for compensation
design will focus on the series resistor and capacitors
connected from VC to ground (RZ, CP1 and CP2). Being abuck-boost converter, the target loop crossover frequency
for the compensation design will be dictated by the highest boost ratio and load current that is expected, as thiswill result in the lowest RHPZ frequency. The general goal
is to set the crossover frequency and provide sufficientphase boost using the external compensation network.

Current Loop Transconductance:
6A
gc =(fixed)V

3118fa30

For more information www.linear.com/LTC3118

LTC3118
Applications Information
Compensation Example
This section will demonstrate how to derive and selectthe compensation components for a typical LTC3118 application. Designing compensation for other applications
is a matter of substituting different values in the equations
provided based on the power stage bode plots. Since thecompensation design procedure uses a simplified modelof the LTC3118, the results from the following compensation design should always be verified with time domain
step load response tests to validate the effectiveness ofthe compensation design. It is assumed that the value
and type of output capacitor will be selected based on theguidelines provided elsewhere in this data sheet. Particularattention needs to be paid to the voltage bias effect on
ceramic capacitors typically used for output bypassing.
Similarly, it is assumed that the inductor value and current
rating has been selected as well, based on the application
requirements.

In order to account for internal IC component variations,
it is a good practice to set the converter bandwidth, orcrossover frequency, at least 4 to 5 times lower than the
RHPZ frequency, to avoid excessive phase loss from the
RHPZ when operating in boost mode. In some instancessuch as higher output voltage applications, an even greater
separation between the loop crossover frequency andthe RHPZ frequency may be necessary. In this example
design, we’ll plan to achieve a loop bandwidth (fCC) of
20kHz, well below the RHPZ frequency. The 5V, 1A design example bode plots are shown in Figure 9. The top
curve set shows the power stage gain (and phase) in buck(> 5VIN) and 3VIN boost mode operation. The DC gain inbuck mode is simply the current loop transconductance(6A/V) multiplied by the load resistance (5Ω). The VOUT
resistor divider will be accounted for in voltage amplifier
network.
Buck DC Gain:
20log ( 6A/V•5Ω ) = 29dB

Example Application Details:
VIN = 3V to 15V

In boost mode the gain is reduced by VIN / VOUT.

VOUT = 5V

Boost DC Gain at 3VIN:

Maximum IOUT (boost mode) = 1A, RLOAD = 5ΩMaximum IOUT (buck mode) = 1A, RLOAD = 5Ω(could supply 2A if VIN > 5V)
COUT = 100µF but use 66µF in calculations to accountfor DC voltage bias effects.
L = 3.3µH
Since this application includes boost mode operation, thefirst step is to calculate the worst-case RHPZ frequency
as this will dictate the maximum loop bandwidth for theconverter.
RHPZ(f) =VIN2 • RLOAD

VOUT2 • 2π • L

3V 2 • 5Ω
5V 2 • 2π • 3.3µH

 6A/V • 3V • 5Ω 
20log  = 25dB
5VThe output load pole will move depending on the output
load resistance. The power stage poles at full load areshown in the top set of curves in Figure 9.
Output Load Pole:11== 480Hz2π • RLOAD • COUT 2π • 5Ω • 66µF=

= 87kHz

3118faFor more information www.linear.com/LTC3118

31LTC3118
Applications Information
30
18

BOOST MODE

60
0

6
0

–60

–6
–12

–120

–18
–24

36
30
24
18
12
6
0
–6
–12
–18
–24
–30
–36
10Hz

–180

100Hz

1kHz
10kHz
FREQUENCY

100kHz1MHz–VC/ VOUTA

0
–20
–40
–60
–80
–100

GAIN
PHASE
100Hz

1kHz
10kHz
FREQUENCY

100kHz–120
1MHz

VOUT / VOUTABUCK MODE

210
180
120
60

BOOST MODE

0
–60
–120

GAIN
PHASE MARGIN
100Hz

PHASE MARGIN (DEG)

70
60
50
40
30
20
10
0
–10
–20
–30
–40
–50
–60
–70
10Hz

GAIN
PHASE

PHASE (DEG)

VOLTAGE LOOP GAIN (dB)

120

12

–30
–36
10Hz

TOTAL LOOP GAIN (dB)

VOUT / VC

BUCK MODE

PHASE (DEG)

POWER STAGE GAIN (dB)

24

1kHz
10kHz
FREQUENCY

100kHz–180
1MHz3118 F08

Figure 9. Bode Plot Showing Power Stage Gain (Top), VA Loop (Center), and Total Loop Gain vs Frequency

These values were verified in the top set of curves in
Figure 9. The resulting power stage crossover frequency
is around 40kHz in buck mode (VIN > 5V), 20kHz in boost
mode at 3.5VIN.
The uncompensated power stage crossover frequency
is higher than the goal of 20kHz. More importantly, theuncompensated power stage DC gain is low, especially inboost mode. A pole-zero-pole network will now be added
to the voltage amplifier to increase the DC gain, reducethe crossover frequency and reduce the overall gain athigh frequencies:

VA Pole 1 =1
2π REA CP1
3118fa32

For more information www.linear.com/LTC3118

LTC3118
Applications Information
this pole is close to DC, REA = Voltage Error Amp output
resistance, which is approximately 5MΩ. This pole ismentioned for completeness, but has no effect on theoverall loop design:

VA Zero 1 =1
2π R Z CP1

CP1 =this zero is placed below the crossover frequency to flatten
the VA gain at the crossover to improve phase margin:
VA Pole 2 =As shown, a 40kΩ value for RZ will provide –4db of gainat crossover. With RZ selected, CP1’s value is determinedby setting the Zero 1 frequency at one-tenth the crossover
frequency, or 2kHz.

1
2π R Z CP2This pole is placed above the crossover frequency to reduce
the gain to suppress noise and mitigate any RHPZ effects.
Referring to the power stage gain curves in Figure 9, theloop gain needs to be reduced by 4dB to achieve a total
loop crossover frequency of 20kHz. Assuming Zero 1 isplaced well below the crossover frequency and Pole 2 isplaced well above the crossover frequency, the voltage
amplifiers gain at crossover is given by:
VA gain at crossover:V • g •R 
20log  FB m Z  =VOUT 1V • 80µA/V • 40k 
20log  = − 4dB

5V
Where gm is the VA transconductance, VFB / VOUT is the
feedback divider gain, and RZ is the external zero resistor.

1=
2π • R Z • f ZERO1

1≅ 1.8nF
2π • 40kΩ • 2kHz
Finally, the high frequency Pole 2 is set at 10 times the
crossover frequency to provide a high frequency pole at
200kHz.
CP2 =1=
2π • R Z • f POLE2

1≅ 22pF2π • 40kΩ • 200kHz
The second set of curves in Figure 9 show the resulting VA
response to the selected values. Notice that the separation
between Zero 1 and Pole 2 provides 60 degrees phasebump near the crossover frequency.
Combining the power stage and VA frequency responses,
the measured overall loop gains are shown in the bottom setof curves of Figure 9. As shown, the crossover frequency
was reduced to 20kHz in buck mode, 10kHz in boost. The
phase margin at crossover is around 70 degrees. The
VA design provided the additional benefits of high gain(>50dB) at DC and gain attenuation above the crossover
frequency to prevent RHPZ issues.

3118faFor more information www.linear.com/LTC3118

33

LTC3118
Typical Applications
System Power (Priority) or 3-Cell Li-Ion to 5V VOUT Regulator with Automatic Burst Mode Operation

3.3µH
0.1µF
4V TO 5.5V

VIN1

+

0.1µF
BST1 SW1

SW2 BST2

5V UP TO 1.5A,
VIN > 4.5V

VOUT

232k

SYSTEM
POWER

402k
RUN1

22µF

100µF

FB

PGND
100k

100k
PGND

GND
22pF

CM1
CM2
CP1
CP2

47nF
47nF

10nF
10nF

7.5V TO 12.6V

+
+
+

22µF

V1GD
V2GD
PGD
VCC

VIN2

SEL

1.8nF

40.2k

VC

CN2
CN1

POWER GOOD
INDICATORS

4.7µF

BAT-54SCHOTTKY DIODE

MODE

523k
Li-IonLTC3118

RUN2
100k
PGND
3118 TA02a

Efficiency vs Load Current: VIN1 = 5V,
VIN2 = 10.8V, VOUT = 5V
100
90

5VOUT
TRANSIENT
200mV/DIVBURST

EFFICIENCY (%)

80
70
60

INDUCTORCURRENT
1A/DIV

PWM

50

LOAD
CURRENT
1A/DIV
VC
200mV/DIV

40
30
20

100µs/DIV

VIN1
VIN2

10
0
0.0001

100mA to 1A Load Step, VIN1 = 5V,
VOUT = 5V, Auto Burst Mode

0.001

0.01
0.1
LOAD CURRENT (A)13118 TA02c

103118 TA02b

3118fa34

For more information www.linear.com/LTC3118

LTC3118
Typical Applications
12V Wall Adapter (When Present) or 2-Cell Li-Ion to 12V VOUT Regulator with Automatic Burst Mode Operation

6.8µH
0.1µF
6V TO 8.2V

+
+

VIN1

0.1µF
BST1 SW1

SW2 BST2

Li-Ion

1100k
RUN1

22µF

FB

100k

100k

10nF

LTC3118

VC
V1GD
V2GD
PGD

10nF
CN2
CN1
10V TO 14V

SEL
MODE

750k
100µF

12V WALL
ADAPTER

60.4k

1.2nF

POWER GOOD
INDICATORS

VCC

VIN2

+

PGND

22pF

CM1
CM2
CP1
CP2

47nF

100µF

GND

PGND

47nF

12V AT 800mA

VOUT

402k

4.7µF

RUN2
100k
PGND
3118 TA03a

Efficiency vs Load Current: VIN1 = 7V,
VIN2 = 12V, VOUT = 12V
100
90

EFFICIENCY (%)

80
70

INDUCTORCURRENT
1A/DIV

60
50

PWM

2A

1A

VIN1
5V/DIVSW1
10V/DIV

40
30
VIN1
VIN2

10
0.001

0.01
0.1
LOAD CURRENT (A)1

VOUT = 12V
VIN2 = 12V
VIN1 = 6V
SWITCHOVER TO VIN2

INDUCTORCURRENT
2A/DIV

SEL

20

12VIN2 Inductive Cable Insertion
with VOUT = 12V and 800mA Load
12VOUT
TRANSIENT
500mV/DIV
VIN2 CABLE
5V/DIV INSERTION

12VOUT
TRANSIENT
500mV/DIV

BURST

00.0001

12VIN2 to 6VIN1 SEL Pin Switchoverwith VOUT = 12V and 800mA Load

500µs/DIV

3118 TA03c

100µs/DIV

3118 TA03d

103118 TA03b

3118faFor more information www.linear.com/LTC3118

35

LTC3118
Typical Applications
Dual Battery System to 3.3V VOUT, Runs from Lead Acid (Priority) When Present
Automatic Burst Mode Operation
3.3µH
0.1µF
10.5V TO 14.5V

VIN1

+

0.1µF
BST1 SW1

SW2 BST2

VOUT
232k

768k

LEAD ACID
BATTERY

22µF

RUN1

PGND

100k
GND

PGND
CM1
CM2
CP1
CP2

47nF
10nF

47pF
LTC3118

VC
V1GD
V2GD
PGD

10nF
CN2
CN1
3V TO 16.5V

VCC

18.2k

3.9nF

POWER GOOD
INDICATORS

4.7µF

SEL

VIN2

MODE

301k
STACK OF 3-10 NiMH
OR ALKALINE BATTERIES

100µF

FB

100k

47nF

3.3V UP TO 2.5A, VIN > 4.5V

22µF

RUN2
200k

–

PGND
3118 TA04a

Efficiency vs Load Current: VIN1 = 5V,
VIN2 = 12V, VOUT = 3.3V
100
90

3.3VOUT
TRANSIENT
200mV/DIVBURST

EFFICIENCY (%)

80
70

INDUCTORCURRENT
1A/DIV

60
50
40

LOAD CURRENT
1A/DIV

PWM

VC
200mV/DIV30
20

100µs/DIV

VIN1
VIN2

10
0
0.0001

100mA to 1A Load Step, VIN = 12V,
VOUT = 3.3V, Auto Burst Mode

0.001

0.01
0.1
LOAD CURRENT (A)13118 TA04c

103118 TA04b

3118fa36

For more information www.linear.com/LTC3118

LTC3118
Package Description

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
UFD Package
24-Lead Plastic QFN (4mm × 5mm)

(Reference LTC DWG # 05-08-1696 Rev A)

0.70 ±0.05

4.50 ±0.05
3.10 ±0.05
2.00 REF

2.65 ±0.05
3.65 ±0.05

PACKAGE OUTLINE

0.25 ±0.05
0.50 BSC
3.00 REF
4.10 ±0.05
5.50 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONSAPPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 ±0.10(2 SIDES)

R = 0.05 TYP

2.00 REF
R = 0.115
TYP
23

0.75 ±0.05

PIN 1 NOTCH
R = 0.20 OR C = 0.35
24
0.40 ±0.10

PIN 1
TOP MARK(NOTE 6)1
2

5.00 ±0.10(2 SIDES)

3.00 REF

3.65 ±0.10
2.65 ±0.10(UFD24) QFN 0506 REV A

0.200 REF

0.25 ±0.05

0.00 – 0.05

0.50 BSC
BOTTOM VIEW—EXPOSED PAD

NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X).
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATIONON THE TOP AND BOTTOM OF PACKAGE

3118faFor more information www.linear.com/LTC3118

37

LTC3118
Package Description

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE Package
28-Lead Plastic TSSOP (4.4mm)(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation EB

9.60 – 9.80*(.378 – .386)
4.75(.187)

4.75(.187)

28 27 26 2524 23 22 21 20 1918 17 16 15

6.60 ±0.10
4.50 ±0.102.74(.108)SEE NOTE 4

0.45 ±0.05

EXPOSEDPAD HEAT SINKON BOTTOM OFPACKAGE

6.40
2.74(.252)(.108)
BSC

1.05 ±0.10
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT

4.30 – 4.50*(.169 – .177)

0.09 – 0.20(.0035 – .0079)

0.50 – 0.75(.020 – .030)

NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN MILLIMETERS(INCHES)3. DRAWING NOT TO SCALE

1 2 3 4 5 6 7 8 9 10 11 12 13 14
0.25
REF

1.20
(.047)
MAX
0° – 8°0.65(.0256)
BSC

0.195 – 0.30(.0077 – .0118)
TYP

0.05 – 0.15(.002 – .006)
FE28 (EB) TSSOP REV K 0913

4. RECOMMENDED MINIMUM PCB METAL SIZEFOR EXPOSED PAD ATTACHMENT*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASHSHALL NOT EXCEED 0.150mm (.006") PER SIDE

3118fa38

For more information www.linear.com/LTC3118

LTC3118
Revision History
REV

DATE

DESCRIPTIONPAGE NUMBER

A

09/15

Text clarification

1

Pin name corrections for SW1, SW2, BST1 and BST2

34, 353118faInformation furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more
informationwww.linear.com/LTC3118
tion that the interconnectionof its circuits
as describedherein will not infringe on existing patent rights.

39

LTC3118
Typical Application
12V VIN to 5V VOUT Converter with Capacitor Backup
Runs from VIN1 (Priority) in Normal Mode, VIN2 During Backup Event
3.3µH
0.1µF
BST1 SW1

10.5V TO 14.5V

SW2 BST2

768k

LEAD ACID
BATTERY OR 12V
SYSTEM POWER

402k
RUN1

22µF

100k
PGND
CM1
CM2
CP1
CP2

47nF

10nF

GND
LTC3118

CAPACITORBACKUP

CN2
CN1
VIN2

+

VCC

22µF

VIN1
10V/DIV

PGND

22pF
40.2k

1.8nF

VIN2
10V/DIV

VCC BACK FED
FROM VOUT
FOR LOW VINOPERATION

POWER GOOD
INDICATORS
BAT-54SCHOTTKY DIODE

VOUT
5V/DIVINDUCTORCURRENT
1A/DIV
200ms/DIV

3118 TA05b

4.7µF

SEL

2M
10mF

VC
V1GD
V2GD
PGD

10nF
18V MAX, RUNSDOWN TO 2.2V

47µF

FB

100k

47nF

5V

VOUT

VIN1

+

10mF, 18V Back-Up Capacitor Supports
200mA Load for >1 Second

0.1µF

MODE

RUN2
PGND

40.2k

3118 TA05a

40.2k

CAN’T RUN FROM VIN2 UNTIL VOUT STARTS UP

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1A (IOUT), 40V Synchronous Buck-Boost DC/DC Converter

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LTC3115-1

2A (IOUT), 40V Synchronous Buck-Boost DC/DC Converter

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Operating Range VIN = 1.8V to 5.5V (500mV After Start-Up), VOUT = Up
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LTC3124

5A ISW, 3MHz, 2-Phase Synchronous Step-Up DC/DC
Converter, Output Disconnect, Burst Mode Operation,
Up to 95% Efficiency

Operating Range VIN = 1.8V to 5.5V (500mV After Start-Up), VOUT Up
to 15V, IQ = 25µA, ISD < 1µA, 3mm × 5mm DFN and TSSOP Packages

LTC3129200mA (IOUT), 15V Synchronous Buck-Boost DC/DC Converter

VIN = 2.42V to 15V, VOUT = 2.5V to 14V, IQ = 1.3μA, ISD = 10nA,
QFN and MSOP Packages

LTC441228V Low Loss PowerPath Controller in ThinSOT™

Operating Range 3V to 36V, IQ = 11µA, 6-Lead ThinSOT Package

LTC4417

Prioritized PowerPath Controller

VIN = 2.5V to 36V, –42V Reverse Protection, IQ = 28µA, ISD < 1µA,
QFN and SSOP Packages
3118fa40 Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC3118(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3118

LT 0915 REV A • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 2015