2-30 GHz Surface Mount Low Phase Noise Amplifier

APM-6848SM

1. Device Overview
1.1 General Description
The APM-6848SM is an integrated 2-stage broadband, low phasenoise LO driver amplifier designed to provide a saturated +20 dBm
output power from a 0-6 dBm input power with low DC power
consumption, packaged in a 4mm QFN. This amplifier uses GaAs
HBT technology for low phase noise, and is optimized to provide
enough power to drive the LO port of an S-diode mixer from 2 GHz
to 20 GHz or an H or L diode mixer from 2 GHz to 32 GHz. Thisamplifier can be operated with a variety of bias conditions including
VC=VB=5V for both low power and high power applications.

1.3 Applications

1.2 Features
▪
▪
▪
▪
▪
▪
▪
▪

▪

-165 dBc/Hz phase noise at 10
kHz offset frequency
Power and gain control+22 dB gain
Low DC power consumption
Positive-only biasing
No sequencing required
Unconditionally stable
Integrated DC blocks – No biastees or off-chip blocking required▪
▪
▪
▪

Mobile test and measurement
equipment
Radar and satellitecommunications
5G Transceivers
Driver amplifier for S, H, and L –diode mixers
Suitable as a T3 mixer driver

1.4 Functional Block Diagram

1.5 Part Ordering Options1
PartNumber
APM-6848SM
EVAL-APM-6848SM

1

Description
4x4 mm Surface
Mount
Connectorized
Evaluation Fixture

Package

GreenStatus

ProductLifecycle

ExportClassification

QFN

RoHS

Active

EAR99

EVAL

RoHS

TBD, Contact
Support

EAR99

Refer to our website for a list of definitions for terminology presented in this table.

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3.5 Electrical Specifications .................. 7

Table of Contents
1.

3.6 APM-6848SM Typical Performance
Plots ................................................... 8Device Overview ............................... 1
1.1 General Description ........................ 1

3.7 Connectorized Module APM-6848PA
Performance Plots .............................. 10

1.2 Features ....................................... 1

3.8 Time Domain Plots ........................ 10

1.3 Applications ................................... 1

3.9 Conversion Loss of Marki Mixers
Using APM-6848SM as LO Driver ....... 11

1.4 Functional Block Diagram ................ 1
1.5 Part Ordering Options ..................... 1

4.

2.1 APM-6848SM Port Diagram ........... 3
2.2 APM-6848SM Port Functions ......... 4Application Information .................... 12
4.1 APM-6848SM Application Circuit .. 12

2. APM-6848 Port Configurations andFunctions ............................................... 33.

APM-6848SM

4.2 Gain and Power Control ................ 13
5.

Mechanical Data ............................. 13

Specifications ................................... 5

5.1 APM-6848SM Package Outline
Drawing ............................................ 13

3.1 Absolute Maximum Ratings .............. 5

5.2 APM-6848SM Landing Pattern ..... 14

3.2 Package Information ....................... 5
3.3 Recommended Operating Conditions . 6
3.4 Sequencing Requirements ............... 6Revision History
Revision Code-Revision DateDecember 2019

Copyright © 2019 Marki Microwave, Inc.

CommentDatasheet Initial Release

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APM-6848SM

2. APM-6848 Port Configurations and Functions
2.1 APM-6848SM Port Diagram
A top-down port diagram of the APM-6848SM is shown below.

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APM-6848SM

2.2 APM-6848SM Port Functions
PinFunction

Description

21

RF Input

This is the RF Input port of the amplifierdie. It is internally DC blocked and RF
matched to 50 Ω.

17Collector Supply
Port 1Pad VC1 is the DC voltage supply pad forthe 1st stage of the amplifier IC. Seesection 3.6 for performance at differentbias conditions.

14

Collector Supply
Port 22

Base Supply
Port 1

4

Base Supply
Port 2

11RF Output

GND

GroundEquivalent Circuitfor Package

Pad VC2 is the DC voltage supply pad tothe 2nd stage of the amplifier IC. Larger
VC voltage will result in larger power
consumption and larger power output.
See section 3.6 for performance atdifferent bias conditions.
Pad VB1 is the DC voltage supply pad fora current mirror which controls thecollector current of the 1st stage (Ic1).
Larger voltages result in a higher current
draw through pad VC1, effectivelyfunctioning as a gain control pin for the 1ststage of the amplifier. See section 3.6 forperformance at different bias conditions.
Pad VB2 is the DC voltage supply pad fora current mirror which controls thecollector current of the 2nd stage (Ic2).
Larger voltages result in a higher current
draw through pad VC2, effectivelyfunctioning as a gain control pin for the 2ndstage of the amplifier. See section 3.6 forperformance at different bias conditions.
This is the RF Output port of the amplifierdie. It is internally DC blocked and RF
matched to 50 Ω. Must have less than
7:1 VSWR when operating with voltage
larger than 5V on VC1 or VC2.
Backside of the IC must be connected to a
DC/RF ground with high thermal andelectrical conductivity.

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3. Specifications
3.1 Absolute Maximum Ratings
The Absolute Maximum Ratings indicate limits beyond which damage may occur to thedevice. If these limits are exceeded, the device may become inoperable or have a reducedlifetime.
Parameter

Maximum RatingUnits

Collector Positive Bias Voltage (VC, VC1, VC2)

7

V

Positive Bias Current (Ic, Ic1+Ic2)

300

mA

Current Mirror Positive Bias Voltage (VB, VB1, VB2)

7

V

Current Mirror Positive Bias Current (Ib, Ib1+Ib2)

8mA

RF Input Power+20

dBm

Output Load VSWR

7:1

-Operating Temperature-40 to +125

˚CStorage Temperature-65 to +150

˚CTBD

˚C/W

𝜃JA

3.2 Package Information
Parameter

Details

RatingESD

Human Body Model (HBM), per MIL-STD-750, Method 1020

TBD

WeightEVAL-APM-6848SM

43.7g

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3.3 Recommended Operating Conditions
The Recommended Operating Conditions indicate the limits, inside which the device shouldbe operated, to guarantee the performance given in Electrical Specifications Operating
outside these limits may not necessarily cause damage to the device, but theperformance may degrade outside the limits of the electrical specifications. For limits,
above which damage may occur, see Absolute Maximum Ratings.
MinNominalMax2

Units

TA, Ambient Temperature-40+25+125°C

Positive DC Voltage (VC1)+3+5+6V

Positive DC Current (Ic1)

82140mA

Positive DC Voltage (VC2)+3+5+6V

Positive DC Current (Ic2)

82140mA

Positive DC Current Mirror Voltage (VB1)+3+5+6V

Positive DC Current Mirror Current (Ib1)

0.92

2.6mA

Positive DC Current Mirror Voltage (VB2)+3+5+6V

Positive DC Current Mirror Voltage (Ib2)

0.9

2

2.6mA

3.4 Sequencing Requirements
There is no sequencing required to power up or power down the amplifier.
Amplifier must have an output load connected when operating with a VC1, or VC2 voltage
larger than +5V.

2

Maximum recommended operating current conditions without RF input applied. Please see
typical performance plots on page 12 for relationship between RF input power and DC current
draw.

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3.5 Electrical Specifications3The electrical specifications apply at TA=+25°C in a 50Ω system.
Parameter

TestConditions

Frequency

Frequency

Min

Typical2
5V/5V bias,+6 dBm Input
PowerPsat
Small Signal Gain
Input Return Loss
Output Return Loss
Noise Figure

5V/5V bias,-25 dBm Input
PowerReverse Isolation

4Collector Current , Ic

Current Mirror Current, Ib

Input IP3 (IIP3)

Output IP3 (OIP3)

5V/4V
5V/5V
5V/6V
5V/4V
5V/5V
5V/6V

5V/5V bias,-25 dBm Input
PowerOutput P1dB

5V/5V bias

Input Power for Saturation

5V/5V bias
5V/5V bias,+9 dBm Inputpower, 4 GHz

Phase Noise @ 10 kHz
Offset2 GHz – 20 GHz

18+2120 GHz – 29 GHz

14+182 GHz – 20 GHz
20 GHz – 29 GHz
2 GHz – 20 GHz
20 GHz – 29 GHz
2 GHz – 20 GHz
20 GHz – 29 GHz

18152218
1471611MaxUnits

30GHzdB

2 GHz – 26.5 GHz

62 GHz-29 GHz

62-274367
2.9
45.2

2 GHz – 29 GHz-22 GHz – 29 GHz+202 GHz – 20 GHz+1920 GHz – 29 GHz+152 GHz – 29 GHz+4dBm

2-20 GHz-165dBc/Hz

3All Specifications and performance shown with VC1 = VC2 and VB1 = VB2
Bias conditions for Ic and Ib tested with no RF input power. See section 3.6 for DC current vs.
RF power. Bias conditions presented as VC/VB.
4Copyright © 2019 Marki Microwave, Inc.

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APM-6848SM

3.6 APM-6848SM Typical Performance Plots5

5Surface mount performance plots are taken in the EVAL-APM-6848 connectorized fixture, andinclude launch, line, and connector insertion losses.

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APM-6848SM

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APM-6848SM

3.7 Connectorized Module APM-6848PA Performance Plots6

3.8 Time Domain Plots7

6

Surface mount module APM-6848SM performance can be expected to be similar toconnectorized module performance.
7
Fast rise time is desirable for linear T3 mixer operation.

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APM-6848SM

3.9 Conversion Loss of Marki Mixers Using APM-6848SM as LO DriverCopyright © 2019 Marki Microwave, Inc.

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APM-6848SM

4. Application Information
4.1 APM-6848SM Application Circuit
Below are the recommended application circuits for the APM-6848SM.

RF input and output should be soldered to 50 Ω traces. Since this is a 2-stage
amplifier, VC and VB lines may be biased separately at different voltages for improved
efficiency (application circuit shown above), or they may be combined for convenience(below). If combined, feedback oscillations can form along the VC supply lines unlesssufficient bypass capacitance to ground is used.

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APM-6848SM

4.2 Gain and Power Control
The APM-6848 is a 2-stage amplifier integrated on a single IC. In the APM6848SM package, the user has some freedom to operate the 2 amplifier stages
independently for their application-specific needs. Please refer to section 2.2 to see thefunction of each port on the APM-6848SM, and refer to the gain and Psat plots insection 3.6 to see how bandwidth, saturated output power, and gain profile change forvarious bias conditions.
Generally, the gain of the first stage and second stage of the amplifier can becontrolled by adjusting VB1 and VB2 respectively. Increasing the voltage applied to a VB
pad increases the current drawn into the corresponding amplifier stage, which strongly
correlates to the gain of that stage, and some difference to the output power of thatstage. Increasing the voltage on a VC pad generally increases the linearity, maximum
output power, and DC power consumption of the corresponding amplifier stage.
In the case where a user wants to drive the LO port of a mixer from an initial LO
power of +9 dBm at 10 GHz, the user could apply 5V at all 4 DC ports and see anoutput power of +21.5 dBm and an overall power consumption of about 1 watt (theamplifier stages pull more DC current as the gain compresses in a high input powercondition). Alternatively, the user could apply 3.5 V – 4 V to VB1 and VC1, and 6V toVB2 and VC2 and see an output power of 22.5 dBm with very little difference in theoverall power consumption. For applications with a strict power budget and performancerequirements, optimizing the bias conditions of the amplifier can be a useful tool for thesystem designer.

5. Mechanical Data
5.1 APM-6848SM Package Outline Drawing

Notes:
1. Substrate material is Plastic.
2. I/O Leads and Die Paddle are 0.05 µm Au over 0.02 µm Pd over 0.5 µm Ni.
3. All unconnected pins should be connected to PCB RF ground.

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APM-6848SM

5.2 APM-6848SM Landing Pattern

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