GaAs Broadband Low Phase Noise Amplifier

APM-6848

1. Device Overview
1.1 General Description
The APM-6848 is an integrated 2-stage broadband, low phase noise LOdriver amplifier designed to provide a saturated +20 dBm output powerfrom a 0-5 dBm input power with low DC power consumption. Thisamplifier uses GaAs HBT technology for low phase noise, and is
optimized to provide enough power to drive the LO port of an S-diodemixer from 2 GHz to 20 GHz or of an H or L diode mixer from 2 GHz to32 GHz. This amplifier can be operated with a variety of bias conditions
for both low power and high-power applications.

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Bare Die

1.3 Applications

1.2 Features▪

PA Module▪

-165 dBc/Hz phase noise at 10 kHz
offset frequency+21 dBm output power+23 dB gain
Low DC power consumption
Positive-only biasing
No sequencing required
Unconditionally stable
Integrated DC blocks – No bias-teesor off-chip blocking required▪
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Mobile test and measurement
equipment
Radar and satellite communications
5G Transceivers
Driver amplifier for S, H, and L –diode mixersSuitable as a T3 driver

1.4 Functional Block Diagram

1.5 Part Ordering Options11Part
NumberDescription

Package

Green Status

ProductLifecycle

ExportClassification

APM-6848CH

Wire Bondable Die

Bare Die

RoHS

Active

EAR99

APM-6848PA

Connectorized
ModulePARoHS

Active

EAR99

Refer to our website for a list of definitions for terminology presented in this table.

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3.3 Recommended Operating Conditions . 7

Table of Contents
1.

3.4 Sequencing Requirements ............... 7
3.5 Electrical Specifications .................. 8

Device Overview ............................... 1

3.6 APM-6848CH Typical Performance
Plots ................................................... 9

1.1 General Description ........................ 1
1.2 Features ....................................... 1

3.7 APM-6848PA Typical Performance
Plots ................................................. 11

1.3 Applications ................................... 1
1.4 Functional Block Diagram ................ 1

3.8 Typical Performance Plots of MarkiMixers Driven With APM-6848PA........ 13

1.5 Part Ordering Options ..................... 1
2. APM-6848 Port Configurations andFunctions ............................................... 34.

2.2 APM-6848CH Port Functions .......... 4Application Information .................... 14
4.1 APM-6848CH Application Circuit ... 14

2.1 APM-6848CH Port Diagram ........... 33.

APM-6848

4.2 Gain and Power Control ................ 15
5.

Mechanical Data ............................. 15

2.3 APM-6848PA Port Diagram ............ 5

5.1 APM-6848CH Outline Drawing ...... 15

2.4 APM-6848PA Port Functions .......... 5

5.2 APM-6848PA Package Outline
Drawing ............................................ 16Specifications ................................... 6
3.1 Absolute Maximum Ratings .............. 6
3.2 Package Information ....................... 6

Revision History
Revision Code-Revision DateOctober 2019

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Comment
Datasheet Initial Release

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APM-6848

2. APM-6848 Port Configurations and Functions
2.1 APM-6848CH Port Diagram
A port diagram of the APM-6848CH is shown below.

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APM-6848

2.2 APM-6848CH Port Functions
PortFunction

Description

RF In

RF Input

This is the RF Input port of the amplifierdie. It is internally DC blocked and RF
matched to 50 Ω. RF input pad is GSG
with 175 µm pitch.

VC1

Collector Supply
Port 1Pad VC1 is the DC voltage supply pad forthe 1st stage of the amplifier IC. Seesection 3.6 for performance at differentbias conditions.

VC2

Collector Supply
Port 2

VB1

Base Supply
Port 1

VB2

Base Supply
Port 2

RF OutRF Output

GND

GroundEquivalent Circuitfor Package

Pad VC2 is the DC voltage supply pad tothe 2nd stage of the amplifier IC. Larger
VC voltage will result in larger power
consumption and larger power output.
See section 3.6 for performance atdifferent bias conditions.
Pad VB1 is the DC voltage supply pad fora current mirror which controls thecollector current of the 1st stage (Ic1).
Larger voltages result in a higher current
draw through pad VC1, effectivelyfunctioning as a gain control pin for the 1ststage of the amplifier. See section 3.6 forperformance at different bias conditions.
Pad VB2 is the DC voltage supply pad fora current mirror which controls thecollector current of the 2nd stage (Ic2).
Larger voltages result in a higher current
draw through pad VC2, effectivelyfunctioning as a gain control pin for the 2 ndstage of the amplifier. See section 3.6 forperformance at different bias conditions.
This is the RF Output port of the amplifierdie. It is internally DC blocked and RF
matched to 50 Ω. RF output pad is GSG
with 175 µm pitch. Must have less than
7:1 VSWR when operating with voltage larger than 5V on
VC1 or VC2.
Backside of the IC must be connected to a
DC/RF ground with high thermal andelectrical conductivity.

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APM-6848

2.3 APM-6848PA Port DiagramA port diagram of the APM-6848PA is shown below.

2.4 APM-6848PA Port Functions
PortFunction

RF In

RF Input

VCCollector SupplyVBBase Supply

RF OutGND

Description

Equivalent Circuitfor Package

This is the RF input port of the amplifier.
It is internally DC blocked and RF matchedto 50 Ω.
Port VC is the DC voltage supply port for
both stages of the 2-stage amplifier. The
VC port in the PA module internallyconnects to both VC1 and VC2 of the IC
described in section 2.2 of this datasheet
Port VB is the DC voltage supply port forcurrent mirrors which controls thecollector current supplied to the 2amplifier stages. Larger voltages result ina higher current draw through port VC,
effectively functioning as a gain controlpin. The VB port in the PA moduleinternally connects to both VB1 and VB2of the IC described in section 2.2 of thisdatasheet

RF Output

This is the RF output port of the amplifier.
It is internally DC blocked and RF matchedto 50 Ω. Must have less than 7:1 VSWR
when operating with voltage larger than 5V on port VC.

GroundHousing or outside of the coaxial cables
must be connected to a DC/RF ground
potential with high thermal and electricalconductivity.

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3. Specifications
3.1 Absolute Maximum Ratings
The Absolute Maximum Ratings indicate limits beyond which damage may occur to thedevice. If these limits are exceeded, the device may become inoperable or have a reduced
lifetime.
Parameter

Maximum Rating

Units

Collector Positive Bias Voltage (VC, VC1, VC2)

7V

Positive Bias Current (Ic, Ic1+Ic2)

300mA

Current Mirror Positive Bias Voltage (VB, VB1, VB2)

7V

Current Mirror Positive Bias Current (Ib, Ib1+Ib2)

8mA

RF Input Power+20dBm

Output Load VSWR

7:1

-Operating Temperature-40 to +125

˚C

Storage Temperature-65 to +150

˚C

3.2 Package Information
Parameter

Details

RatingESD

Human Body Model (HBM), per MIL-STD-750, Method 1020

TBD

WeightAPM-6848PA

14.7g

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3.3 Recommended Operating Conditions
The Recommended Operating Conditions indicate the limits, inside which the device shouldbe operated, to guarantee the performance given in Electrical Specifications Operating
outside these limits may not necessarily cause damage to the device, but theperformance may degrade outside the limits of the electrical specifications. For limits,
above which damage may occur, see Absolute Maximum Ratings.
MinNominal

Max2

Units

TA, Ambient Temperature-40+25+125°C

Positive DC Voltage (VC1)+3+5+6V

Positive DC Current (Ic1)

82140mA

Positive DC Voltage (VC2)+3+5+6V

Positive DC Current (Ic2)

82140mA

Positive DC Current Mirror Voltage (VB1)+3+5+6V

Positive DC Current Mirror Current (Ib1)

0.92

2.6mA

Positive DC Current Mirror Voltage (VB2)+3+5+6V

Positive DC Current Mirror Voltage (Ib2)

0.92

2.6mA

3.4 Sequencing Requirements
There is no sequencing required to power up or power down the amplifier.
Amplifier must have an output load connected when operating with a VC, VC1, or VC2
voltage larger than +5V.

2Maximum recommended operating current conditions without RF input applied. Please see
typical performance plots on page 12 for relationship between RF input power and DC currentdraw.

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3.5 Electrical Specifications3
The electrical specifications apply at TA=+25°C in a 50Ω system.
Min and Max limits apply only to our connectorized units and are guaranteed at TA=+25°C. Die are 100% DC tested and RF tested on a perlot basis

Parameter

Saturated OutputPowerTestConditions
5V/5Vbias, +4dBm Input
Power

Small Signal Gain
Input Return Loss
Output Return Loss
Noise Figure

5V/5Vbias,-25 dBm
Input
PowerCurrent Mirror Current,
Ib
Input IP3 (IIP3)

Output IP3 (OIP3)
Output P1dB
Input Power for
Saturation
Phase Noise @ 10 kHz
Offset2 GHz – 20 GHz

Min

Typical

18+21

14+18

20
16232111915
720 GHz – 29 GHz
2 GHz – 20 GHz
20 GHz – 29 GHz
2 GHz – 20 GHz
20 GHz – 29 GHz
2 GHz – 20 GHz
20 GHz – 29 GHz
2 GHz – 26.5 GHz

62 GHz-29 GHz

65

5V/4V
5V/5V
5V/6V
5V/4V
5V/5V
5V/6V-274367
2.9
4
5.2

5V/5Vbias,-25 dBm
Input
Power2 GHz – 29 GHz+0.5

2 GHz – 29 GHz+215V/5Vbias

2 GHz – 20 GHz+1920 GHz – 29 GHz+13Reverse Isolation

Collector Current4, Ic

Frequency

5V/5V
bias
5V/5V
bias, +9dBm Input
power

2 GHz – 29 GHz

4 GHz

UnitsdBm

dBmA

dBm

+4dBm

-165

dBc/Hz3All Specifications and performance shown with VC1 = VC2 and VB1 = VB2
Bias conditions for Ic and Ib tested with no RF input power. See section 3.6 for DC current vs.
RF power. Bias conditions presented as VC/VB.
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3.6 APM-6848CH Typical Performance Plots

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3.7 APM-6848PA Typical Performance Plots

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3.8 Typical Performance Plots of Marki Mixers Driven With APM-6848PA

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APM-6848

4. Application Information
4.1 APM-6848CH Application Circuit
Below is the recommended application circuit for the APM-6848CH.

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APM-6848

4.2 Gain and Power Control
The APM-6848 is a 2-stage amplifier integrated on a single IC. In the APM-6848PA
module, VB1 & VB2 and VC1 & VC2 are connected internally for user convenience. However, inthe APM-6848CH bare die, the user has some freedom to operate the 2 amplifier stages
independently for their application-specific needs. Please refer to section 2.2 to see the functionof each pad on the APM-6848CH, and refer to the gain and Psat plots in sections 3.6 and 3.7 tosee how bandwidth, saturated output power, and gain profile change for various bias conditions.
Generally, the gain of the first stage and second stage of the amplifier can be controlled byadjusting VB1 and VB2 respectively. Increasing the voltage applied to a VB pad increases thecurrent drawn into the corresponding amplifier stage, which strongly correlates to the gain of thatstage, and some difference to the output power of that stage. Increasing the voltage on a VC padgenerally increases the linearity, maximum output power, and DC power consumption of thecorresponding amplifier stage.
In the case where a user wants to drive the LO port of a mixer from an initial LO power of+9 dBm at 10 GHz, the user could apply 5V at all 4 DC ports and see an output power of +21.5
dBm and an overall power consumption of about 1 watt (the amplifier stages pull more DC current
as the gain compresses in a high input power condition). Alternatively, the user could apply 3.5 V– 4 V to VB1 and VC1, and 6V to VB2 and VC2 and see an output power of 22.5 dBm with very
little difference in the overall power consumption. For applications with a strict power budget andperformance requirements, optimizing the bias conditions of the amplifier can be a useful tool forthe system designer.

5. Mechanical Data
5.1 APM-6848CH Outline Drawing

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APM-6848

5.2 APM-6848PA Package Outline Drawing

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