NTT Technical Review
March 2011 Vol. 9 No. 3
Front-line Researchers akio Kashino, Senior Distinguished Researcher, NTT Communication
M
Science Laboratories

Feature Articles: System LSI Design for
Broadband Optical Access Network Systems
System LSI Design Technology for Communications Networks
Cooperative Hardware/software Design Technology
MAC LSI Design Technology for Optical Access Communications
Design Verification Using Field-programmable Gate Arrays for
Optical Access Communications SoC
10-Gbit/s Burst-mode Receiver Integrated Circuits for
Broadband Optical Access Networks

Feature Articles: R&D of Optical Component Technologies
for 100-Gbit/s Digital Coherent Communications
Optical Device Technologies for Future Network Evolution
Wavelength-tunable Lasers for Next-generation Optical Networks
Multilevel Optical Modulator
Utilizing PLC-LiNbO3 Hybrid-integration Technology
100-Gbit/s Optical Receiver Front-end Module Technology
Photodiodes and Transimpedance Amplifiers for
100-Gbit/s Digital Coherent Optical Communications

Regular Articles
Antenna Model and Its Application to System Designin the Millimeter-wave Wireless Personal Area Networks Standard
Compressed Sensing Technology for Flexible Wireless System

Global Standardization Activities
Electromagnetic Compatibility Standardization Activities
in the Telecommunication Field at the 2010 IEC/CISPR Seattle Meeting

Papers Published in Technical Journals
and Conference Proceedings
Papers Published in Technical Journals and Conference Proceedings

Front-line Researchers

Toward Life-enriching Technologies
Makio Kashino
Senior Distinguished Researcher
NTT Communication Science Laboratories
Makio Kashino, an NTT Senior Distinguished Researcher, hasenjoyed Japanese and Chinese classical literature since childhood.
He has been particularly influenced by the Zhuangzi (classicalTaoist book) by the Chinese author of the same name and the
Hojoki (An Account of My Hut) by the Japanese author and poet
Kamo no Chomei. Both of these philosophize about the impermanence of worldly things. We asked Dr. Kashino, a uniqueresearcher who attempts to explain hearing and communicationfrom the viewpoints of psychology, neuroscience, and information science, to tell us about the manner, significance, and futureof his type of research.

Probing the human mind
via an integrated approach—Dr. Kashino, could you first give us some background to your research?
Since entering NTT, I have been exclusively
researching human perception with a focus on human
auditory mechanisms. While hearing a sound may
appear to be easy, it is actually a very complex process. If you visit the Illusion Forum website [1] that
we have created, it’s plain to see, or rather, it’s plain
to hear, that this is so. In hearing, a variety of peculiar
things can occur; for example, you might hear nonexistent sounds or hear the same sound in different
ways. Such phenomena are manifestations of brain
functions that enable humans to adapt to their surroundings. In my research, I have been working toelucidate these clever neural mechanisms.
In this kind of research, I have found it essential tointegrate three approaches. The first is to quantify thefeatures of human perception, as in the case of illusions such as those that I just mentioned. The second
is to study the workings of the human brain and nervous system that serve as the hardware for achieving
those features. And the third is to comprehend theprinciples of information processing that make thosefeatures possible in the first place. In other words, we
can begin to explain the mechanisms of hearing
through the three fields of psychology, neuroscience,and information science. Let me make an analogy
here. If I were to research the flight of birds, I could
not simply analyze wing strokes and the structures ofwings and muscles: I would also need to understandthe principles of flight, that is, of aerodynamics. Only
then would I be able to apply the knowledge gained
to aircraft.
—What is your current research theme?
Well, my research is still centered on hearing, but I
am currently working to broaden the scope of mystudies. It occurred to me that this integrated approachthat I’ve developed could perhaps be used to scientifically explain heretofore elusive problems likepreferences and feelings. Let me give you three specific examples of this expanded research in ourgroup.
NTT Technical Review

Front-line Researchers

Frequency

Illusory switches in perception of the same soundSingle stream
Rhythm ofgalloping horse?

Medial geniculate body

Auditory area
Identifying neuralactivity linked to
the formation andselection ofperception

Two streams
High-pitched soundMorse code?
Low-pitched soundTime

Fig. 1. Uncovering neural information-processing principles from an illusion.

First, in relation to hearing, we’re researching theneural mechanism that enables one to selectively listen to only what one intends to hear in a mixture ofmany sounds. (Fig. 1). This cocktail party effect isoften said to be an outstanding feature of human hearing, but it tends to be deficient in some groups ofpeople such as the elderly and hearing impaired. A
hearing aid often just amplifies noise as well, resulting in no substantial improvement in hearing. In our
research on testing hearing ability, we have found thatsome people who show no apparent abnormalities inan ordinary otological test may sometimes have difficulty hearing a sound in the presence of competingsounds. We have been investigating a new hearing
test that can identify such people and we are close tofinding the cause of this phenomenon.
Cases in which a hearing problem can hinder anindividual’s full participation in society despite ample
skills or motivation are expected to multiply as weenter the aging society. The creation of a barrier-freesociety is a key objective of information and communications technology (ICT), and I think that we canhelp give many people a greater sense of purpose in
their lives if we can develop a hearing aid that lets
them hear only what they prefer to hear.
Second, we’re researching ways of quantitatively
predicting preferences in relation to music, design,
etc. For example, a person may respond favorably tocertain kinds of music saying something like “that’sgood” or “I like that music.” In such a case, the music
is probably somewhat familiar and not completely
new to the user. In other words, music that is all too
common for the listener can be boring while something that is too novel or original may turn the listener off. So how new should something be to be themost attractive?
Vol. 9 No. 3 Mar. 2011

The ability to derive this in theoretical terms would
no doubt bring big changes to the way that products
are designed and advertised. Traditionally, design andadvertising have depended on the experiences andhunches of those in charge, but a systematic approach
could make the process more efficient. All this mightsound too good to be true, but I believe that such predictions should be possible to some extent byapplying the principles of neural information processing. What we need here is some kind of proof,
and to this end, we are conducting various types ofexperiments.
Third, we’re researching subliminal signals andbody language (Fig. 2). In interpersonal communication, information that cannot be directly conveyed bywords plays an important role. In particular, the atmosphere between two people is often created by slightchanges in facial expression or tone of voice that areusually unnoticeable to either party. This type of
unconscious exchange of implicit information
between two people helps to establish smooth communication. We are now working to explain theactual mechanisms of nonverbal communication
through experiments that measure slight body movements, physiological changes, and neural activity
during interpersonal communication.
Such implicit information was probably discarded
as unnecessary in past technologies because, in conventional communication systems, it was sufficient toassess whether a phrase like “thank you” was actually
heard as “thank you”. As a consequence, informationthat could convey whether this “thank you” was actually an expression of gratitude or a sarcastic remark
was simply ignored. However, if such elements ofcommunication can be clarified, it should be possible
to achieve a form of communication with a high levelFront-line Researchers• Implicit interpersonal information (IIPI) is unconscious (implicit) body movements or physiological responses made by one or both parties
while they are communicating with each other.
• Basic hypothesis: IIPI is the foundation of subliminal signals.
• IIPI and its underlying neural and nervous-system activities can be used to clarify and appropriately control emotions and the state ofcommunication.
Neural activity: interaction of thecentral and autonomic nervous
systems of both parties

Interaction between body movements
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© CaltechSupported by JST CREST (research representative: Makio Kashino (NTT); coworkers: Shinsuke Shimojo (California Institute ofTechnology) and Katsumi Watanabe (The University of Tokyo))Fig. 2. Clarifying subliminal signals based on IIPI.

of presence such as in a videoconference system connecting remote locations via the network.
Toward a career in hearing research froman attraction to temporal flow
—What moved you to become a researcher in the fieldof hearing?
Most of my instructors and seniors in my university
research laboratory were researching topics related tovision. For example, they were studying the responseof goldfish retina cells to light, the neural activity ofmonkeys, and human visual illusions. Moreover, myadvisor was researching mathematical models ofvisual pattern recognition. I learned a lot about methodology from my involvement in these studies. However, I had developed an interest in sounds throughlistening to a wide variety of music and building electronic gadgets from discarded parts starting in myelementary school days, and what I really wanted toresearch was the perception of sound, or in otherwords, hearing. In Japan, there were not many
researchers in this area. I could therefore pursue thisinterest to my heart’s desire, which suited me perfectly.
In addition, since my childhood, I’ve been inter

ested in how one captures things that change and thenature of impermanence. Living things move andchange, and this change occurs continuously together
with a temporal flow. I found this flow to be very
appealing.
At the same time, I thought that sound, which cannot exist without incessant change, is closer in
essence to flow than vision. This is also one factor
that led me to specialize in hearing.
—What kind of researcher do you think you are?
I believe that my motivating force is a philosophicalawareness of problems, but in my case, pure speculation by itself has its limits. Come to think of it, I’ve
enjoyed doing experiments since my childhood.
What I like about experiments is that they do notalways turn out as expected. Of course, if we establish a certain hypothesis, perform an experiment totest it, and obtain a result that meets our expectations,then it’s time to celebrate! But this could also be boring in the sense of a pre-established harmony as discussed in philosophy. An unexpected result, on theother hand, can broaden our scope of thought and bemuch more interesting. If we give lots of thought toan unexpected result, we may find it to be the mostnatural outcome after all.
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Front-line Researchers

At the same time, I also enjoy theory, and it gives
me great pleasure to be able to provide a uniform
explanation for perplexing things or unrelated things
through simple principles. In short, a continuous
cycle of theory and experiment is essential to myintegrated approach.
Baseball and work: unconditioned nature—I’ve heard that pitching—as in baseball—is ahobby for you.
Yes, that’s right, but not in the sense of playing
sandlot baseball just for fun. What I pursue is simply
the act of throwing with great devotion. I do this every
day if possible. But please don’t ask me why I do it.
Perhaps I find the act of throwing one ball after
another interesting like the cycle of hypothesis andexperiment. At any rate, one throw out of maybe 30
or 40 surprises even me. But if I get all excited and try
to do it again, I end up making a throw that’s notnearly as good. This is very strange.
A ball is thrown not by the power of one’s arm but
rather by accelerating the tips of one’s fingers to theutmost through power generated by the movement of
one’s weight and the twisting of one’s lower body. An
arm that is simply shaking looks exactly like a flexible whip. However, when you consciously attempt tothrow a fast ball, excessive power will enter your arm
and shoulders, and at that instant, the power thatwould normally be conveyed by the lower part ofyour body and by your trunk will fall behind. It sohappens that when I fall into some kind of rhythm andstop worrying about my next pitch, I get this sensation of being driven only by gravity and inertia and I
end up making some incredible pitches while feelingquite relaxed.
Perhaps this is an example of unconditioned nature
as described in the Zhuangzi. In some way, you canVol. 9 No. 3 Mar. 2011

perform your best when you lose the self and do notfight the providence of nature (when you go with theflow). If, by plain luck, you were to throw a great ball,it could then be said that you already had it in you to
do so, but the problem now is whether you can invokethat ability at will. In other words, the problem is how
to coordinate with good timing the roughly 400 skeletal muscles in the human body without mutuallycancelling out the flow of power through them. It issaid that the great baseball player Ichiro, though having a thin figure, can outperform other major-league
players far superior in strength by optimizing muscle
coordination.
For this reason, I do not go out of my way to build
up my muscles, but look for ways of improving mycoordination. I feel as if I’m advancing little by little,
and I don’t think it’s altogether unrealistic to aim fora pitching speed of 130 km/h at 50 years old.
The importance of natural coordination should also
hold true in work. The more one thinks about having
to go all out, the more one’s natural pace will fallapart without any gain in performance. This also
applies to management in an organization. If superiors in their excitement to excel assign useless work,
subordinates are bound to become exhausted. Whether it be an individual or an organization, I don’t thinkthat intrinsic potential can be tapped in this way. It
must be said, however, that working in a natural way
is really difficult.
Future outlook for ICT—What do you think is the future of ICT?
The research that I conduct aims to elucidate thisprovidence of nature. In other words, I am involved inscientific research, but at the same time, I am deeply
concerned with the future of ICT. As a basic belief, I
feel that ICT is not simply a means of making life
more convenient—it must also serve to enrich thelives of human beings. And to this end, ICT must help
people achieve their intrinsic, natural state of being.
Accordingly, basic research on clarifying the providence of nature in relation to human beings should, inthe end, lead to a form of ICT that works to enrichpeople’s lives.
It would be natural to think that ICT could be used
to good effect by establishing a barrier-free society
and to assist the sensory and motor functions of theelderly. But on a long-term basis, what if suchmeasures turned out to actually weaken brain functions? My answer to this is to make use of nature andFront-line Researchers

isolate and enhance intrinsic neural and physicalfunctions. Ideally, there would be a set of tools thatcan do just that.
While it is easy to measure the efficiency andphysical performance of just about any product, it isdifficult to measure the extent to which such a product actually enriches a person’s life. It is exactly thispoint that should become a matter of importance inthe years to come. The provision of top specifications
and high quality is a matter of conscience for certain
types of enterprises, but as a natural precondition for
this, I believe that products should be designed taking
into account feelings and perception so that possessing a product brings some delight into a person’s life.
For this reason, feelings and perception should be
subjects of discussion in scientific and engineering
fields.
Today, Japan provides the fastest and most inexpensive broadband environment in the world. The optical-fiber service area covers 90% of all households,
but no more than 30% are actually making use of
these services. Why are the remaining 60% not using
broadband? No doubt price is one factor, but could
another factor be not actually being able to feel thevalue of broadband? Do these households perhaps
feel that their current way of using the web, email,and weblogs (blogs) is more than sufficient? If ahousehold were to upgrade to broadband or introduce
ICT, to what extent would the lives of its family members be enriched? Customers don’t think in theseterms, and neither, I suspect, do service providers.
Here, remote medicine, to give one example, could be
used not simply as a means of transmitting digital
medical records but also to encourage interest in
broadband and ICT. So there’s still hope. I feelstrongly that disseminating such a concrete image ofbroadband services should be the responsibility of us
basic researchers.
To young researchers—Dr. Kashino, please leave us with a message foryoung researchers.



It is often said that originality is essential for
researchers, but I feel that the meaning of this issometimes misinterpreted. In particular, in today’scompetitive society, we are made to feel like a failure
if we don’t do something different from other people,
and we start out by thinking “How can I do somethingunique?” However, great baseball players like Nomoand Ichiro were not great just because they had different forms of play. Each worked ceaselessly to optimize his individual performance and simply came toadopt that form as a result. While appearing to be
unique at first glance, their forms of play owe a lot tothe providence of nature.
I think this also holds true in research. The etymology of the word original is origin, and the origin of
ICT is to find out what is needed to enrich people’s
lives. If we return to this origin and listen carefully tothe voice of nature, I think that we should be able toperform great work.
Reference[1]

Illusion forum (in Japanese).
http://www.brl.ntt.co.jp/IllusionForum/

Kashino Makio
Senior Distinguished Researcher, NTT
Communication Science Laboratories.
He received the B.A., M.A, and Ph.D. degrees
in experimental psychology from the Universityof Tokyo in 1987, 1989, and 2000, respectively.
He joined NTT in 1989. He has also held various
posts outside NTT including those of visiting
scientist at the University of Wisconsin (1992–93), visiting professor at Tokyo Institute ofTechnology (2006–current), invited professor atl’Université Paris Descartes (2008), and project
leader of a CREST (Core Research of Evolutional
Science & Technology) project of the Japan
Science and Technology Agency (JST) (2009–
current). His research field is cognitive neuroscience of human perception and communication.

NTT Technical Review

Feature Articles: System LSI Design for Broadband
Optical Access Network Systems

System LSI Design Technology for
Communications Networks
Tsugumichi Shibata†, Mamoru Nakanishi,
and Mamoru Kitamura
Abstract

The first set of Feature Articles in this issue describes research and development of system large-scale
integration (LSI) technology (also known as system-on-a-chip (SoC) technology) and high-speed frontend electronics for optical access systems being conducted at NTT Microsystem Integration Laboratories. This article provides an overview and the other articles discuss their roles and characteristics well
as related design technology and issues.

1. Introduction
Opportunities to use a variety of applications on theInternet in daily life are increasing, and Internet
access is becoming indispensable. It is desirable forhigh-quality, convenient, and safe application services to become even more common. This is backed upby the existence of a secure, broadband network services infrastructure utilizing the low losses of opticalfiber and the broad bandwidth of light, so networking
advances should contribute to a more vibrant, rich,and plentiful society. Optical networks have various
components, each playing an important role, including (1) optical devices such as light sources, modulators, transmitters, splitters, and multiplexers; (2)electrical devices that reproduce and process signals
and communications protocol controllers; and (3)software that operates them and the communications
systems they are part of. At NTT Microsystem Integration Laboratories, one focus of our work is
research and development (R&D) of electronics forthese communications systems of these types.
Among electronic device technologies used in telecommunications systems, ones that we view as particularly important include system large-scale integration (system LSI), which is also known as systemon-a-chip (SoC) technology, which provides sophis† NTT Microsystem Integration Laboratories
Atsugi-shi, 243-0198 Japanticated communications functions, and optical frontend integrated circuits (ICs), which perform highspeed signal processing. SoC technology generally
refers to implementations that include a central processing unit (CPU), memory, and large-scale dedicated logic, along with the software to operate it(Fig. 1). SoC technology is used widely, including in
general-purpose and household products, but wefocus on applications for communications systems
using SoC devices (SoCs) that incorporate our experience and knowledge as a communications carrier
and contribute to the advancement of communications

External memory

Software
Dedicated
logic

MemoryCPU

Bus

Fig. 1. Elemental SoC architecture.

NTT Technical Review

Feature Articles

IP phone
Home LANONU

MAC LSI

Opticaltransceiver
Rx
Tx

WDM

Downstream:
TDM/WDM

OLT
Opticaltransceiver
WDM

Tx
Rx

MAC LSI

Metropolitan& corenetworks

BCDR

Upstream: TDMA
MAC LSI

Rx
Tx

WDM

BCDR: burst-mode clock and data recovery
IP:
Internet protocol
LAN: local area network
Rx:
receiver
TDM: time division multiplexing
Tx:transmitter
WDM: wavelength division multiplexing

Fig. 2. Electronic devices used in an Ethernet PON system.

systems. We are conducting R&D of SoC design
technology, including hardware and some of the software, in cooperation with other research laboratories
working in the field of communications systems.
2. SoC design for optical access networks
In Japan, most broadband access services are currently provided by fiber-to-the-home (FTTH) access,and they mostly use the GE-PON (Gigabit Ethernet
passive optical network) system [1], [2]. A block diagram of an Ethernet PON system is shown in Fig. 2.
A PON allows services to be provided to multiple
customers economically by branching a single fiber.
It requires the formation of a secure and efficient
point-to-multipoint (P2MP) connection between the
optical line terminal (OLT) on the network side andthe optical network units (ONUs) at the customers’
locations. This is done by sending upstream signals
from ONUs to the OLT by using time-division multiple access (TDMA), which is controlled using themultipoint control protocol (MPCP). The main functional components of the OLT and ONU are media
access control (MAC) LSIs, which are SoCs, andVol. 9 No. 3 Mar. 2011

optical transceivers. The MPCP processing function
is implemented in the MAC LSI. Furthermore, theoptical transceiver must be able to amplify and regenerate burst frames sent from multiple ONUs whenframes have different timings and optical intensities.
The electrical components in this optical transceiverare called the optical front-end ICs. At the beginningof system development, functions that could not be
included in the SoC were implemented using external
components, but as the technology advanced, more of
the functions could be integrated into the SoC, reducing the number of parts and overall cost.
Standardization of 10G-EPON (10-Gbit/s Ethernet
PON), the successor to GE-PON, has recently madeprogress [2]–[4]. We have responded to this by establishing technology for implementing the standard
functions of 10G-EPON in SoCs and optical frontend ICs. We have also conducted feasibility studies
on achieving more-sophisticated and higher-performance devices. Below, we discuss the characteristics
and technical directions for SoCs and optical frontend ICs in the context of Ethernet PON systems.

Feature Articles

SoftwareApplication
Higher layers
Co-design ofhardware andsoftware
MAC LSI(SoC)

Presentation

Logical link control (LLC)

SessionOperations, administration, and maintenance (OAM)

Transport

Multipoint MAC control (MPMC)

NetworkMedia access control (MAC)

Data link

Reconciliation sublayer (RS)
GMII/XGMII/XAUI
Physical coding sublayer (PCS)High-speed
circuit design

PhysicalPhysical medium attachment (PMA)
HardwareTransceiver

Physical medium dependent (PMD)
OSI Reference Model Layers

MDI
Optical distribution network (ODN)
GMII: Gigabit media independent interface
MDI: media dependant interface
OSI : open systems interconnection
XAUI: 10 Gigabit attachment unit interface
XGMII: 10 Gigabit media independent interface

Fig. 3. Architectural positioning of P2MP topologies in the IEEE 802.3ah “Ethernet in the First Mile” and theirimplementation by the transceiver and the MAC LSI.

3. Cooperative design of hardware and software
When one is implementing the required functionsin an SoC, a major issue is to develop design methods
that optimize the partitioning of functionality between
functions implemented in hardware with dedicatedlogic and functions handled by the CPU using software and to generate interfaces between them.
For communications operators like NTT, a major
concern is whether the systems being developed are
flexible enough to accommodate extensions for
future services, maintenance, and monitoring functions. Up until now, the general approach to implementing these types of flexible functionality in SoCs
has been to use software, but if cooperative design ofhardware and software were easier, then circuit configuration and control could be done in more detail,allowing one to pursue both extensibility and flexibility.
Moreover, a basic performance requirement for
OLTs, ONUs, and, in general, network switches is thecapability to process signals at wire speed. To handle
the requirements of increased traffic, transmission
capacity must be expanded and data must be processed without any frame loss, which places a demandfor increased performance on SoCs. To achieve thishigh performance, hardware techniques for increasing speed play an important role, such as using faster
algorithms for logic circuits, parallelization, andpipelining, but we believe that we should also be able
to make breakthroughs in power saving for the overall system through better cooperation between hardware and software and by controlling hardware
according to actual traffic conditions.
4. MAC LSI functionality
The P2MP architecture [5] specified in IEEE802.3ah,
the standard for Ethernet PON systems, and the way
in which the architecture is implemented using MAC
LSIs, transceivers, and other components are shownin Fig. 3. Most of the functions required by the system are implemented in the MAC LSI. Most of thefunctions required by the system are integrated on asingle chip, focusing on the various Layer 2 switch(data-link layer) functions from higher-ranking
NTT Technical Review

Feature Articles

functions such as encryption to physical-layer functions such as encoding and serial/parallel conversion.
5. Research on optical front-end ICs
NTT Microsystem Integration Laboratories,
together with the NTT Photonics Laboratories, iscontinually advancing R&D of optical front-end
technology. Optical front-end ICs, include amplifiers
that reshape in the receiver the weak signals attenuated by transmission through the fiber, digital-data
retiming and regeneration circuits, and laser-drivercircuits required to produce good quality signals in
the transmitter. In the system, these are sections withstrict analog requirements, such as sensitivity, feedback or feedforward control, and dynamic range;
moreover, they require broadband operation. Furthermore, there is the additional difficulty, mentioned
earlier, that data frames arrive at the OLT in burst
mode in the PON system. Research issues for thesecircuits are more physical compared with large-scale
SoCs, involving transistor-level circuit design, as
well as the physical layout of the circuit and packaging. The selection of semiconductor technology isalso an important factor in satisfying performancerequirements. We consider (1) compound semiconductors such as InP for heterojunction bipolar transistors (HBTs) and high electron mobility transistors(HEMTs) and GaAs for metal semiconductor field
effect transistors (MESFETs), (2) silicon bipolarjunction transistors integrated with complementary
metal-oxide semiconductor (CMOS) transistors on asingle substrate (Si BiCMOS) including silicon-germanium BiCMOS (SiGe BiCMOS), which integrates
SiGe HBTs with conventional CMOS processing,and (3) silicon CMOS (Si CMOS) from cost and performance perspectives and select the optimal technology for a given application.
In R&D of optical front-end ICs, there are two key
points to consider. First, as with other long-term basic
research, it is important to ascertain the feasibility ofthe technology. When planning and developing innovative services or systems, one must verify in advancewhether they are achievable. For example, in order toprogress from GE-PON to 10G-EPON, which is aten-fold increase in transmission capacity, it is necessary to make front-end ICs that are ten times as fast athandling received frames. In particular, the frame
header synchronization speed has a great effect on
system design with respect to transmission efficiency.
Moreover, sensitivity can have an effect on transmisVol. 9 No. 3 Mar. 2011

sion distance or the number of customers that can beaccommodated in a single optical distribution network. In this way, the performance levels achievablein the front end have a large effect on overall system
specifications, so basic research in this area is done asa precursor to standardization. By conducting R&D
in the area that is the physical bottleneck for performance, we will be able to contribute to higher system
performance and lead the industry.
The second point is that there is synergy in having
both SoC technology and front-end technology. Having experience with both makes it easier to study
overall optimizations such as controlling the front
end from the SoC or optimizing the chip partitioning
and interface implementations. We want to use thissynergy as one of our strengths in proceeding with
R&D.
6. Organization of the Feature Articles
This topic has five Feature Articles, including thisone which discussed our initiatives related to SoC
technology for optical access communications systems and optical front-end IC technology. Next,“Cooperative Hardware/software Design Technology” [6] describes a high-level design technology
using virtual hardware effectively for the initial stagesof design, including cooperative design. “MAC LSIDesign Technology for Optical Access Communications” [7] explains the LSI design process flow anddiscusses the architecture of an Ethernet PON SoC in
detail. “Design Verification Using Field-programmable Gate Arrays for Optical Access Communications
SoC” [8] introduces a technology for verifying largescale SoC functions using field programmable gatearrays before chip prototypes are created. Finally,“10-Gbit/s Burst-mode Receiver Integrated Circuits
for Broadband Optical Access Networks” [9] introduces the state of development of optical front-end IC
technology for 10G-EPON systems.
7. Future trends
At NTT Laboratories, we will continue to expand
our R&D efforts toward improving the value provided to customers and resolving business issues. To doso, we will continue development of SoC technology
in order to further increase system performance, pursue “Green of ICT” much further, and contribute to
making systems more flexible by improving customizability and other aspects (ICT: information andcommunications technology).
Feature Articles

Until now, the integration level of LSIs has
increased according to Moore’s Law* year after year,
and this has been the force behind progress in thefunctionality and performance of semiconductor
products. At the beginning of this century, there wassome serious discussion about reaching practical limits for reductions in the size of semiconductor processes, but now it appears that some of the fabrication
process problems will be solved, and the International Technology Roadmap for Semiconductors(ITRS) [10] has continued to issue roadmaps for still
finer technologies. Accordingly, there is hope forcontinued progress in SoCs and communications systems through R&D driven by leading-edge processes.
On the other hand, in addition to active R&D on
further miniaturization (more Moore), new functional
materials and devices are being developed, in synergy
with miniaturization (more than Moore), and researchon utilizing more-than-Moore technology for communications systems in the medium-to-long term will
also be important.
*

Moore’s Law: A law that states that the density of semiconductor
integration will double every 18 to 24 months.

References[1]

Technical Fundamentals Lecture: “GE-PON Technology, No. 1 to No.
5,” NTT Technical Journal, Vol. 17, No. 8–12, 2005 (in Japanese).

Tsugumichi Shibata

Executive Manager, Ubiquitous Interface Laboratory, Project Manager, First Promotion Project, NTT Microsystem Integration Laboratories.
He graduated from Tokyo National College ofTechnology in 1980 and received the B.S., M.S.,
and Ph.D. degrees in electrical engineering fromthe University of Tokyo in 1983, 1985, and 1995,
respectively. In 1985, he joined NTT, where heengaged in research on electromagnetic-field
analyses and high-speed ICs for data transmission systems. From 1996 to 1997, he was a Visiting Scholar at the University of California at Los
Angeles (UCLA), where he did research on diakoptics in numerical simulation. He was the chairof the Microwave Simulator Technical Group of
the Institute of Electronics, Information andCommunication Engineers (IEICE) from 2003 to2005 and a vice president of the IEICE Electronics Society from 2007 to 2009. He has been
serving as an Executive Committee member ofthe VLSI Symposia since 2007 and is also an
Executive Committee member of the 2010
APMC. He is a senior member of IEEE and
IEICE.



http://www.ntt.co.jp/journal/0508/files/jn200508071.pdf
http://www.ntt.co.jp/journal/0509/files/jn200509091.pdf
http://www.ntt.co.jp/journal/0510/files/jn200510067.pdf
http://www.ntt.co.jp/journal/0511/files/jn200511059.pdf
http://www.ntt.co.jp/journal/0512/files/jn200512051.pdf[2] K. Kumozaki, “Optical Access Systems: Present State and Future
Directions,” NTT Technical Review, Vol. 6, No. 5, 2008.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2008
05sf2.html[3] M. Tsubokawa, “Optical Access Network System Technologies,”
IEICE Journal, Vol. 91, No. 8, pp. 699–705, 2008 (in Japanese).
[4] J. Kani and K. Suzuki, “Standardization Trends of Next-generation 10
Gigabit-class Passive Optical Network Systems,” NTT Technical
Review, Vol. 7, No. 11, 2009.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2009
11gls.html[5] www.ieee802.org/3/index.html[6] T. Aoki, T. Ohtsuka, K. Yamazaki, S. Onishi, and A. Onozawa, “Cooperative Hardware/software Design Technology,” NTT Technical
Review, Vol. 9, No. 3, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa2.html[7] A. Miyazaki, M. Urano, H. Suto, and K. Terada, “MAC LSI Design
Technology for Optical Access Communications,” NTT Technical
Review, Vol. 9, No. 3, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa3.html[8] R. Kusaba, S. Yasuda, K. Kawai, T. Kawamura, and S. Oteru, “Design
Verification Using Field-programmable Gate Arrays for OpticalAccess Communications SoC,” NTT Technical Review, Vol. 9, No. 3,
2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa4.html[9] M. Nogawa, H. Katsurai, M. Nakamura, H. Kamitsuna, and Y. Ohtomo, “10-Gbit/s Burst-mode Receiver Integrated Circuits for Broadband Optical Access Networks,” NTT Technical Review, Vol. 9, No.
3, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa5.html[10] www.itrs.net/

Mamoru Nakanishi

Senior Research Engineer, Supervisor, First
Promotion Project, NTT Microsystem Integration Laboratories.
He received the B.E. and M.E. degrees inphysical electronics from Tokyo Institute ofTechnology in 1986 and 1988, respectively. He
joined NTT LSI Laboratories in 1988. He has
been engaged in research on highly parallelarchitectures and their applications for image
processing. He is currently engaged in SoC
development for the access networks. He is amember of IEICE, the Information Processing
Society of Japan, and the IEEE Computer Society.

Mamoru Kitamura

Director, NTT Microsystem Integration Laboratories.
He received the B.S., M.S., and Ph.D. degrees
from the University of Tokyo in 1980, 1982, and1985, respectively. He joined NTT ElectricalCommunications Laboratories, Atsugi, Kanagawa, in 1985, where he engaged in the development of LSI fabrication processes and devices fortelecommunication use. His research activities
also include access network systems and videocommunication systems.

NTT Technical Review

Feature Articles: System LSI Design for Broadband
Optical Access Network Systems

Cooperative Hardware/software
Design Technology
Takashi Aoki†, Takuya Ohtsuka, Koji Yamazaki,
Shigehiko Onishi, and Akira Onozawa
Abstract

In this article, we introduce a hardware/software co-design simulation method for testing the cooperative design of hardware and software for system-on-a-chip (SoC) devices. For SoCs, which incorporate
dedicated processing circuits and a processor, combined testing of the software running on the processor
and the operations of the dedicated circuits must be done from the initial design stages in order to reduce
the amount of redesign and the turnaround time, i.e., the number of person-hours of work required. Our
cooperative simulation method uses virtual hardware. We discuss its effectiveness by referring to realexamples.

1. Introduction
In the design of system-on-a-chip (SoC) devices, it
is extremely important to design so that the hardware,
which handles specialized processing, and the software running on the microprocessor, operate cooperatively. In other words, the design process must also
be cooperative. How can this be tested?
The microprocessor operates according to what is
written in its program (software). On the other hand,the dedicated processing circuits process data continuously according to how the hardware has been
designed and a clock signal. Thus, the operation of
the two must be checked to ensure that they do notcause a conflict, mismatch, deadlock, or other type of
performance drop. This is cooperative design evaluation.
The evaluation results can affect the system architecture greatly, so such an evaluation must be done
from the initial stages and from the top level ofdesign. However, at the top-level design stage, there
is no actual hardware. It would be nice to build an
overall prototype including both the microprocessor
and dedicated circuits, put them together and test
them, but development usually cannot wait for this.
Systems being implemented as SoCs have recently† NTT Microsystem Integration Laboratories
Atsugi-shi, 243-0198 Japan

become extremely complex, so that even building or
rebuilding a single prototype can take several weeks
or months. For this reason, it has become necessary tosimulate the hardware together with the system software before prototyping it; in other words, one must
perform a hardware/software co-design simulation.
2. Virtual hardware
To implement co-design simulation, we need asimulator for virtual hardware. Physical hardware
operates with a clock signal for input and output tothe dedicated circuits so the processor can read fromand write to it, but virtual hardware does not have aphysical clock. Instead, attention must be paid to thesequencing and dependencies of reading and writing
and to the input and output between the processor anddedicated circuits, and the simulator must be built tomaintain these relationships.
Before the design of the dedicated circuits is complete, one does not know how many clock cycles will
be required for these circuits to complete their operation. However, the correct sequencing and dependencies for reading and writing are correctly coded in thevirtual hardware, so the virtual hardware can respondto the software behavior without conflict. This makes
co-design simulation possible from the top-level
design stages.
NTT Technical Review

Feature Articles

Cooperative hardware/software design

Objectcode

Software
SoftwareSpecification

Software↓Transactor↑
RTL↓
Dedicatedcircuits

Conventional design
centered on hardware

VirtualhardwareTransaction level
modeling

Verification

Verification

Hardwarespecifications

Specification

Breadboard
test
NetlistRTL
simulation

Hardwarefunctional
designConventional design process* Netlist: A netlist describes the connectivity of an electronic design.

Verification
RTL
designLogicsynthesis
and layout
RTL simulation andbreadboard test

NetlistFig. 1. New design process that allows cooperative testing with software.

3. Issues being addressed
We have applied this type of co-design simulation
using virtual hardware to the evaluation of SoC
designs for optical access systems. As a result, wehave confirmed the usefulness of the method. The
new process is shown in Fig. 1 together with the conventional design process. The lower half of the figure
shows the conventional design process centered on
hardware. Here, the hardware was the only specification to achieve. However, in hardware/software codesign, which allows cooperative testing with thesoftware, part of the specification is achieved with
software. The hardware/software co-design process
can handle a wider specification range than the conventional design process. Moreover, whereas theconventional design process creates a hardware
netlist, the cooperative design process creates two
netlists—one for the dedicated circuits and anotherthat connects the processor and dedicated circuits—
and software object code that controls the processor’s
behavior. Therefore, Specification and Netlist are
grayed out in the lower half of Fig. 1 because they
cover different ranges to those in the upper half.
The dedicated circuits are designed according to
the conventional hardware design process: they
become more detailed in three stages from specifications to functional design and register transfer level(RTL) design. Software cooperative testing (verification) can be done at each of these three stages byVol. 9 No. 3 Mar. 2011using co-design simulation with virtual hardware.
We started by building the virtual hardware (leftmost green box in Fig. 1.) for the initial stage (specification design). This allowed early verification of the
SoC software.
Then, at the intermediate stage (functional design),
we addressed the hardware transaction-level design(second green box). This can be simulated several
times faster than when designing in detail to the RTLlevel.
Finally, at the RTL design stage, we built a mechanism called a transactor (third green box) into thesystem for sections connecting the dedicated circuitswith the processor. This enables precise final verification of the interfaces between hardware and softwarein the SoC.
4. Construction of virtual hardware
We verify the software at the specification design
stage with the goal of determining aspects such aswhether adequate performance is achieved andwhether performance will drop owing to interferencewith the dedicated circuits. The software is not executed independently, but loaded on the original SoC
architecture, which includes both the processor anddedicated circuits. Thus, we have built virtual hardware that simulates the entire SoC, as shown in
Fig. 2.
The key to building virtual hardware is the separateFeature Articles

SoftwareSourcecode/* set inputs */....
sort_start = 1;....

Sequential...

Write to address A
Register

B:_0xd307….

A:_0xd305..01
Dedicatedcircuits/* read outputs */for(i=0; i < max; i++){a = sorted_que[i];....
}Read address B

Detect at 0xd305..
/* read input */....
flg_sort = 1;....

SignalParallelprocessing

SoftwareProcessor
Bus

At 0xd307..
Memory/* run */if(flg_sort == 1){
sort();}

Dedicatedcircuits* http: //www.synopsys. com/Community/Interoperability/SystemLevelCatalyst/Pages/MVaST.aspx

Fig. 2. Virtual hardware.

parts for software and dedicated circuits, which are
where the processing that defines the functional characteristics of the SoC takes place. For our opticalaccess SoC, these characteristics were the ability tointerface with sophisticated, high-speed communication lines. The specifications for these components
are complex, so they were expressed not only in
documents, but also as source code in the C programming language. To ensure that the implementation
was faithful to the specifications, we built the dedicated circuit part of the virtual hardware by directly
using this C source code as far as possible.
The source code includes both the software thatwill be loaded by the processor in the SoC and thesoftware representing the dedicated circuits. Communication between them uses registers, which create the correspondence between variables in thesoftware and variables for the dedicated circuits, so
the address-mappings for these registers must be
managed. The mechanism of communication between
software and a dedicated circuit conducted via a register is shown in Fig. 2. When the software side writes
to address A, the dedicated circuit side detects it as
being written at address 0xd305… (in hexadecimal).
Because the dedicated circuit is always processing,the influence of the write will sooner or later be written at address 0xd307…, which is equivalent toAddress B on the software side. The software side
reads values from Address B according to the execution order and conditional judgment. The dedicated

circuit reads the value that was written earlier toAddress B, and, as a result of the dedicated circuit
procedure, its behavior when it reads Address B
reflects the software side.
The number of these registers is generally verylarge. Most of the specification is related to theseregisters, so any updates to the specifications caninvolve a significant amount of rewriting in the virtual hardware. This results in additional design work,so we used data structures, which allow us to manage
all of the registers at once and make it easy to apply
updates to the specification.
This approach can be generalized, decreasing theamount of time required from confirmation of thespecifications to system-level operation. For the current project, we were able to detect routines that were
performing inadequately several months before
beginning verification of the physical hardware.
5. Transaction-level design
In the same way that software performance can bechecked using virtual hardware, the dedicated circuits
can be simulated at the functional design stage. This
simulation is faster than RTL-stage simulation, but it
must be done using transaction level modeling (TLM)
to describe the transaction-level design.
In the past, for functional design simulations, eachof the lines between modules would be simulated
individually and in complete detail, down to individual
NTT Technical Review

Feature Articles

TLM interface

RTL interface
Block A

clk125

CLK125
LOCALTIMEPADDR2PREAD2PWRITE2PWDATA2HI2RDATA
HREADY
HRDATA
RST_PON_N
D_RAMCPE

Block B

Block A

Block B
Communication

while(1){write()....
}

while(1){read()....
}

read()
write()

clk125

Processing

Transaction
Signal waveform

Read

Write

read(addr)

write(addr, wdata)

Fig. 3. TLM interface.

clock cycles. This resulted in a number of problems.
First, a lot of work was required to complete thedetailed design before simulation could begin; moreover, component redesign because of interferencewith other blocks could have a major effect on thedesign schedule [1]. Second, a detailed simulation
could not be executed quickly and consumed muchtime. Third, the test coverage was difficult to manage [2].
To resolve these difficulties, we used SystemC [3]
TLM to structure the design file for the dedicatedcircuit section. At the functional design stage, testing
must verify points where data is exchanged between
blocks. The TLM interface between blocks A and B
is compared with the RTL interface in Fig. 3. When ablock passes the results of its processing to anotherblock, the procedure can be very long, as in the RTL
case on the left. However, this procedure can become
very simple, as shown on the right side, if theexchange is rewritten as a transaction. A transactionis the core action, such as the start or confirmation ofa transmission or reception. The events handled in asimulation using TLM are arranged beforehand, so
simulation can be done at high speed. When TLM isused, descriptors for the lines connecting blocks aremuch shorter, and this effectively reduces the amountof preparation work for simulation. Overall, theamount of descriptor code was about one-tenth of thatfor RTL, and the simulation executed about 100 times
as fast as the RTL simulation.

Vol. 9 No. 3 Mar. 2011

6. Built-in transactors
Completing an RTL design of the dedicated-circuit
section enables precise simulations to be done inblock units, but problems arise when cooperative
simulation is performed. The processor in the virtual
hardware does not have actual signal lines, so the
RTL for the dedicated circuit section cannot be connected to the virtual hardware as it is.
Thus, we built transactors into the virtual hardware,as shown in Fig. 4. Transactors are composed oflibraries provided by the existing simulation infrastructure [4]. We used library functions to code thetransactor to monitor accesses to the bus by the RTLof the dedicated circuits. When an access is detected,
a function updates the register value at the appropriate address. Figure 4 shows a transactor connecting
two simulators: the lower one simulates the dedicatedcircuits with cycle accuracy and the upper one simulates the software-equipped processor with fast TLM.
The grey areas labeled TL (transaction level) meanthat a TL connection is used when these areas are
simulated. In the processor and bus in this area, wheneach part performs communications with the otherpart, the performance is set using a TL write. The TL
connection enables communications to be performed
with transaction between connected parts (models)
and leads to high-speed simulation. On the other
hand, the area of dedicated circuits is written to
enable simulation with more detailed cycle accuracy.
There is no way to connect directly between an areathat uses TL connection when simulated and anotherFeature Articles

TLM fast simulation

SoftwareProcessor

Read

TL
Bus

read(addr) write(addr, wdata)

TL
MemoryWrite

TL

Transactor

Dedicated circuits
Cycle-accuracy simulation

TL: transaction level

Fig. 4. Built-in transactors.

area simulated with cycle accuracy because the input/
output signal formats are completely different. That is
why a transactor plays the role of a mutual conversion
function for the two communication methods.
With the earlier approach, we built a prototype
board, reproduced the RTL on a field-programmablegate array (FPGA), and loaded the software onto theprocessor to evaluate the whole system. The data for
writing the FPGA was created using computer-aided
design, and this also required several weeks of preparatory work. In comparison, using the new method,
the design for this project required only five persondays of preparation before evaluation was started.
The method cannot replace all of the testing donewith a prototype board, such as realtime signal processing, but final testing can be started several weeks
earlier; the saved time is the time that would havebeen required to prepare the data for rewriting theboard.

[2]

7. Cooperative design technology in the future[3]

In this article, we introduced an example of applying cooperative design methods to the design of an
SoC for optical access. Through this example, weshowed that system-level cooperative simulation, at alevel of precision appropriate and relevant for design
stages as they progress, is possible for the dedicatedcircuit components, from top-level design to the final
processes.
In the future, it will become more important to do
multistage cooperative simulation, from the beginning and in accordance with the design stages, when
designing SoCs. The future possibilities enabled bythis sort of design methodology are not limited to
SoCs. Large-scale systems of even more complexity
will fall into the scope of this research and we aretaking on this new challenge.
References
[1]

[4]

CoMET.
http://www.synopsys.com/Systems/VirtualPrototyping/Pages/VPTools.aspx
K. Yamazaki, T. Aoki, I. Harada, and A. Onozawa, “High-level Verification Environments Using Redundant Pattern Compression Methods,” IEICE Conf. Proc., Vol. 2009, p. 53 (in Japanese).
OSCI (Open SystemC Initiative).
http://www.systemc.org/home/
Carbon SoC Designer (in Japanese).
http://www.carbondesignsystems.co.jp/products_socd.asp

NTT Technical Review

Feature Articles

Takashi Aoki

Shigehiko Onishi

Takuya Ohtsuka

Akira Onozawa

Research Engineer, Design Technology
Research Group, Ubiquitous Interface Laboratory, NTT Microsystem Integration Laboratories.
He received the B.S. and M.S. degrees inapplied physics from Tokyo Institute of Technology in 1987 and 1989, respectively. He joined
NTT in 1989 and studied LSI design and network
design. He is a member of the Information Processing Society of Japan (IPSJ) and the PhysicalSociety of Japan.

Research Engineer, Design Technology
Research Group, Ubiquitous Interface Laboratory, NTT Microsystem Integration Laboratories.
He received the B.E. and M.E. degrees in science and engineering from Waseda University,
Tokyo, in 1997 and 1999, respectively. He joined
NTT in 1999.

Research Engineer, Ubiquitous Interface Laboratory, NTT Microsystem Integration Laboratories.
He received the B.E. and M.E. degrees from
Yokohama National University, Kanagawa, in1991 and 1993, respectively. He joined NTT in
1993. Since then, he has been working on R&D
of LSIs, speech recognition, video coding, andhigh-performance computing. He is a member of
the Institute of Electronics, Information andCommunication Engineers (IEICE) and the
Acoustical Society of Japan.

Senior Research Engineer, Supervisor, Ubiquitous Interface Laboratory, NTT Microsystem
Integration Laboratories.
He received the B.E. and M.E. degrees in electronic communication engineering and the Ph.D.
degree in information science all from Waseda
University, Tokyo, in 1983, 1985, and 2002,
respectively. He joined NTT in 1985. Since then,he has been working on R&D of LSIs and related
CAD systems. He is a member of the Associationof Computing Machinery, IEEE, IEICE, and
IPSJ.

Koji Yamazaki

Research Engineer, Design Technology
Research Group, Ubiquitous Interface Laboratory, NTT Microsystem Integration Laboratories.
He received the B.S. degree in environmental
information science from Keio University, Kanagawa, and the M.S. degree in interdisciplinary
information science from the University ofTokyo in 2000 and 2004, respectively. He joined
NTT in 2004. Since then, he has been working on
R&D of LSIs and related CAD systems. He is amember of IPSJ.

Vol. 9 No. 3 Mar. 2011

Feature Articles: System LSI Design for Broadband
Optical Access Network Systems

MAC LSI Design Technology for
Optical Access Communications
Akihiko Miyazaki†, Masami Urano, Hiroki Suto, andKazuhiko Terada
Abstract

In this article, we explain the development process and architecture of a media access control (MAC)
large-scale integrated circuit (LSI). The MAC LSI is a very important component that provides most of
the functions of an optical line terminal and optical network unit, which are the main devices in an optical access system. The required functions include the passive optical network interface, buffers, bridges,
and maintenance & authentication.

1. Introduction
The development of a large-scale integrated circuit(LSI) begins with the definition of requirements. For
this, the specifications of the systems in which the
LSI will be used must first be decided appropriately.
A media access control (MAC) LSI is a very important component in an optical access system because
these LSIs provide most of the functions of the optical line terminals (OLTs) and optical network units(ONUs), which are the main devices. The MAC LSI
is classified as a system on a chip (SoC) because it
contains a central processing unit (CPU), memory,and large-scale dedicated logic circuits. When MAC
LSI development begins, many details of the service
and system specifications are still undecided, so
while the specifications are being decided, close
communication must be kept with internal departments studying the next-generation systems. For eachsystem function, one must decide whether it will be
implemented in the LSI or by using external components. As many functions as possible should beplaced in the LSI to reduce the number of external
parts and hence the equipment cost. However, as thenumber of functions in the LSI increases, the cost of
the LSI itself also increases, so a good balance mustbe found.
† NTT Microsystem Integration Laboratories
Atsugi-shi, 243-0198 Japan

Requirements other than functionality must also be
decided appropriately, including power consumption
targets or performance parameters such as frame processing speed and processing time.
2. LSI design
After the LSI requirements have been decided, onemust decide which of the functions are to be implemented in hardware and which in software. Generally,functions that require high performance are implemented in hardware, and ones that require a flexible
configuration are done in software. For a MAC LSI,
functionality must be allocated to satisfy the requirement that all input frames can be processed, without
the speed dropping below the wire speed.
Once the hardware/software assignments have been
decided, their designs can proceed. We try to keep the
hardware design as small as possible while meetingthe performance requirements, but we must also consider the following points:(1)	Each function should be able to be modified
flexibly through configuration. This is so that,for example, if standards have not been finalized
at the development stage, they can be accommodated even if they do change without the
hardware needing to be rebuilt.
(2)	At the beginning of development, in particular,
in addition to the functions required for services,testing and debugging functions needed during
NTT Technical Review

Feature Articles

development should also be provided. Examplesof functions of this sort are a loopback for themain signal, various counters, and internal signal monitoring functions.
The software can be categorized into componentsthat access the hardware and those that do not, and thesoftware design can proceed more smoothly if the
hardware-accessing components are designed as
application programming interfaces.
3. Coding and verification
The next part of the design is coding. For the hardware, we use a register transfer level (RTL) description with a hardware description language such as
Verilog-HDL. For the software, we mainly use the C
language.
Coding is followed by verification testing. Once thehardware has been built, making further changes is
extremely expensive and time consuming, so testing
must be done before production to eliminate as many
problems as possible.
For the hardware, in addition to using logical simulation to check operations, we check some of thefunctions by actually running them using field programmable gate arrays (FPGAs) to emulate the hardware. Verification using FPGAs is discussed in detailin the fourth Feature Article in this issue, “Design
Verification Using Field-programmable Gate Arraysfor Optical Access Communications SoC” [1].
The operation of the software must ultimately bechecked on the actual hardware, but as hardware andsoftware development proceeds in parallel, the software must be tested as far as possible before thehardware is complete. For this purpose, a softwaremodel simulating the hardware is created. This isdiscussed in detail in the second Feature Article inthis issue, “Cooperative Hardware/software Design
Technology” [2].
When testing is complete, a logic-synthesis tool isused to create a netlist* from the RTL description.
Once the RTL description has passed all testing, it iscalled the clean file, and a netlist created from thisclean RTL description is passed to an LSI manufacturer for outsourced production.
4. MAC LSI architecture
Having given a step-by-step explanation of the LSI
development process above, we now describe thearchitecture of the optical access communications
MAC LSI.
Vol. 9 No. 3 Mar. 2011

There are several optical access methods, but as an
example, we describe EPON (Ethernet passive optical network) here. There are two types of EPON [4],[5]: GE-PON (Gigabit Ethernet passive optical network) with a frame rate of 1 Gbit/s and 10G-EPON at
10 Gbit/s, but most of the following description
applies to both equally. An overview of the EPON
system is shown in Fig. 1. It is composed of an OLT,
ONUs, optical fibers, and splitters. The OLT, which isusually in the provider’s central office, is connectedto the service network through the service node interface (SNI), and an ONU, which is usually on theuser’s premises, is connected to the user network
through the user network interface (UNI).
The functions required by the OLT and ONU, with
explanations, are given in Table 1. Each of thesefunctions must be implemented either in the LSI or byusing external components. For LSI implementation,
each function is designed in a cluster called a functional block. The correspondence between functional
blocks and these functions is shown in Table 1. The
functional blocks are divided into two types: (1) functional blocks that receive, process, and transmit
frames and (2) other functional blocks.
In Table 1, the dynamic bandwidth allocation(DBA) and CPU sections are of type (2) and the rest
are of type (1). The MAC LSI architecture can beformed by arranging the type (1) functional blocks inthe order of frame flow, and connecting type (2)blocks to the blocks that they control. Examples of
OLT and ONU implementations using an LSI withthis architecture are shown in Fig. 2. As shown clearly in Table 1 and Fig. 2, most of the functions of both
OLT and ONU are implemented in the MAC LSI.
The MAC LSIs for the OLT and ONU in Fig. 2 have
similar structures, but although they may share thesame name for a functional block, there are differences in the functional blocks of the OLT and ONU,
as described below.
(1)	Within the EPON system, multiple ONUs connect to a single OLT, so all blocks except the
SERDES (serializer/deserializer), SNI, andCPU in the OLT MAC LSI must be able tohandle multiple ONUs.
(2)	To implement the PON control function, thePON components of the MAC LSI for OLT and
ONU must each transmit and receive control
frames according to the well-defined sequence
for each. The PON control function is described*

Netlist: A netlist describes the connectivity of an electronic design [3].

Feature Articles

UNI
ONU

User network

Splitter

UNI

SNI
ONU

User network

Service
network

OLT

UNI
Optical fiber

ONU

User network

Fig. 1. Outline of EPON system.

Table 1. Functions of OLT and ONU and functional blocks in MAC LSI.
Function

Functional block implementing thefunction

Description

OLT
PON
Opticalinterface* transceiver

ONU

Converts optical signal to electric signal and vice versa.

(external
component)(external
component)

SERDES

Converts serial signal to parallel signal and vice versa.

SERDESSERDESPCS

Channel coding and error correction

FEC

FEC

PON control Transmits and receives MPCP frames, maintains logical link, PON, CPU
and adjusts local time for synchronization.
(software)

PON

DBA

Allocates bandwidth for upstream transmission.

DBA(not applicable)

Encryption/decryption

Performs encryption and decryption.

ENC

ENC

BufferTemporarily buffers frames and counts accumulated frames(only in ONU).

BUF,
external RAM

BUF

BridgeBridges between service network and PON (in OLT).
Bridges between user network and PON (in ONU).

BRG

BRG

VLAN

Frame processing based on VLAN tags

Priority control

Priority queuing of the frames

SNI

Interface between service network and OLT

SNI(not applicable)

UNI

Interface between user network and ONU(not applicable)

UNI

Maintenance*

Transmits and receives OAM frames.

CPU (software)

CPU (software)

Authentication

Authenticates ONUs.

CPU (software)

CPU (software)* IEEE802.3/IEEE802.3av compliant
BRG: bridge
ENC: encryption
FEC: forward error correction

OAM: operations, administration, and maintenance
PCS: physical coding sublayer
RAM: random access memory
VLAN: virtual local area network

NTT Technical Review

Feature Articles

OLT

External RAM

SNI

BUF

BRG

BUF

PON

ENC

FEC

SERDESTo ONU

Opticaltransceiver

MAC LSI for OLT
To service network

DBA
CPU(software)
LegendFrame path
Control path

ONU

UNI

BUF

BRG

BUF

PON

ENC

FEC

SERDESTo OLT

Opticaltransceiver

MAC LSI for ONU
To user networkCPU(software)

Fig. 2. Examples of MAC LSI block diagrams (top: OLT, bottom: ONU).

later.
(3)	Uplink bandwidth allocation is required only in
the OLT, so only the OLT has the DBA block.
Conversely, the ONU must notify the OLT of
accumulated frames, so the accumulated frame
calculation function is present only in the buffer(BUF) section of the ONU.
(4)	In the PON section for EPON, the downlink is acontinuous signal, but the uplink is a burst-mode
signal, so the ONU transmitter and the OLT
receiver must support burst-mode communication. Burst-mode communication is described indetail in the fifth Feature Article “10-Gbit/s
Burst-mode Receiver Integrated Circuits for
Broadband Optical Access Networks” [5].
5. PON control function
The PON control function is an important functionthat administers the OLT-ONU links. When a new
ONU connects to the PON, the PON control functions of the OLT and ONU establish a link byexchanging multipoint control protocol (MPCP) control frames in the sequence shown in Fig. 3. The
Vol. 9 No. 3 Mar. 2011

process by which a newly connected ONU establishes
a link is called discovery. Once discovery has been
completed, MPCP control frames are exchanged
periodically for link maintenance.
EPON uses time-division multiple access on the
uplink, so the OLT and ONU must be synchronized,
and this is also done by the PON control function.
With EPON, the OLT internal clock acts as master,and ONUs are notified of the time by the transmit
timestamp set in MPCP control frames. ONUs receiving this notification adjust their clocks to match. Thiscan produce some jitter in the ONU clocks, so the
ONU’s PON control function must be designed not tomalfunction owing to clock jitter.
6. Example of MAC LSI prototype
We have built a prototype LSI for a GE-PON ONU
as described here. Details of the prototype are given
in Table 2, and a photograph of the LSI mounted onan evaluation board is shown in Fig. 4.

Feature Articles

ONU

OLT

Discovery GATE
(notify upward transmission timing to unregistered ONUs)
REGISTER_REQ(register request from an unregistered ONU)REGISTER(notify that the register request has been accepted)
Normal GATE
(notify upward transminssion timing)
REGISTER_ACK(response to the REGISTER message)

Discovery handshake completed
Normal GATE
(notify upward transmission timing)

Repeat after
discovery
handshakecompletion

REPORT(notify the number of accumulated frames)

Fig. 3. Discovery handshake message exchange.

300 mm

Opticaltransceiver

MAC LSI
200 mmFig. 4. Evaluation board with MAC LSI.

NTT Technical Review

Feature Articles

Table 2. Details of the prototype.
Logic

4.5 M gates

Memory12.4 Mbit/s

Die size

9.25 mm × 9.25 mm

Total:
90 M transistors

ing will continue to increase, so design technology
and tools to handle larger-scale LSIs will also need to
be developed.
References

Power consumption 2.2 W[1]
M: million

7. Conclusions and future developments
We described the development process and architecture for a MAC LSI for optical access communications and introduced a prototype of the LSI. 1-Gbit/s
services using the GE-PON optical access systemhave been commercialized. However, the 10-Gbit/s
rate for 10G-EPON has already been standardized,
and even faster systems are expected in the future.
LSI operation speeds are expected to increase slowly
in comparison with these data transmission rates, so
new architectures may be needed to handle the rising
network speeds. Equipment cost reduction and power
consumption control will also continue to increase inimportance, so technical development be needed fortheir achievement. Finally, as functionality becomes
more complex, the scale of LSIs needed for networkAkihiko Miyazaki

Senior Research Engineer, Supervisor, Ubiquitous Interface Laboratory, NTT Microsystem
Integration Laboratories.
He received the B.S. and M.S. degrees in pureand applied sciences from the University ofTokyo in 1991 and 1993, respectively. In 1993,
he joined NTT LSI Laboratories, where he initially engaged in R&D of layout CAD algorithms
and systems. In 2000, he moved to NTT Communications and worked on developing application-platform services for enterprise customers.
In 2004, he moved to NTT Microsystem Integration Laboratories and is currently working on
developing LSIs for optical access communications. He is a member of the Institute of Electronics, Information and Communication Engineers(IEICE) and the Physical Society of Japan.

Masami Urano

Senior Research Engineer, Supervisor, Ubiquitous Interface Laboratory, NTT Microsystem
Integration Laboratories.
He received the B.E. and M.E. degrees in electrical and electronics engineering from Sophia
University, Tokyo, in 1984 and 1986, respectively. In 1986, he joined NTT Atsugi ElectricalCommunications Laboratories, where he initiallyengaged in R&D of the circuit and layout design
technology of semi-custom logic LSIs. Since
2005, he has been engaged in R&D of the circuitdesign technology of Optical Access Communication LSIs. He is a member of IEICE.

Vol. 9 No. 3 Mar. 2011

[2]

[3]
[4]

[5]

[6]

R. Kusaba, S. Yasuda, K. Kawai, T. Kawamura, and S. Oteru, “Design
Verification Using Field-programmable Gate Arrays for OpticalAccess Communications SoC,” NTT Technical Review, Vol. 9, No. 3,
2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa4.html
T. Aoki, T. Ohtsuka, K. Yamazaki, S. Onishi, and A. Onozawa, “Cooperative Hardware/software Design Technology,” NTT Technical
Review, Vol. 9, No. 3, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa2.html
Netlist. http://en.wikipedia.org/wiki/Netlist
Technical Fundamentals Lecture: “GE-PON Technology, No. 1 to No.
5,” NTT Technical Journal, Vol. 17, No. 8–12, 2005 (in Japanese).
http://www.ntt.co.jp/journal/0508/files/jn200508071.pdf
http://www.ntt.co.jp/journal/0509/files/jn200509091.pdf
http://www.ntt.co.jp/journal/0510/files/jn200510067.pdf
http://www.ntt.co.jp/journal/0511/files/jn200511059.pdf
http://www.ntt.co.jp/journal/0512/files/jn200512051.pdf
K. Kumozaki, “Optical Access Systems: Present State and Future
Directions,” NTT Technical Review, Vol. 6, No. 5, 2008.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2008
05sf2.html
M. Nogawa, H. Katsurai, M. Nakamura, H. Kamitsuna, and Y. Ohtomo, “10-Gbit/s Burst-mode Receiver Integrated Circuits for Broadband Optical Access Networks,” NTT Technical Review, Vol. 9, No.
3, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa5.html

Hiroki Suto

Senior Research Engineer, Ubiquitous Interface Laboratory, NTT Microsystem Integration
Laboratories.
He received the B.E. and M.E. degrees inapplied physics from the University of Tokyo in
1983 and 1985, respectively. He joined NTT
Atsugi Electrical Communications Laboratories
in 1985. Since then, he has been engaged in R&D
of GaAs and Si integrated circuit design for highspeed and broadband applications. He is a member of IEICE.

Kazuhiko Terada

Senior Research Engineer, Ubiquitous Interface Laboratory, NTT Microsystem Integration
Laboratories.
He received the B.E. and M.E. degrees in electrical and electronic engineering from Kyoto
University in 1997 and 1999, respectively. In
1999, he joined NTT Network Innovation Laboratories, where he engaged in R&D of WAN
interfaces based on 1- and 10-Gbit/s Ethernet
technologies. He is currently studying powerreduction technologies for next-generation optical access. He is a member of IEICE.

Feature Articles: System LSI Design for Broadband
Optical Access Network Systems

Design Verification Using Fieldprogrammable Gate Arrays for
Optical Access Communications SoC
Ritsku Kusaba†, Sadayuki Yasuda, Kenji Kawai,
Tomoaki Kawamura, and Shoko Oteru
Abstract

We describe evaluation technology that uses field-programmable gate arrays (FPGAs) to test a systemon a chip (SoC). This should reduce the time taken for testing SoCs used in optical access communications by letting us conduct tests using FPGAs in parallel with conventional testing to reduce the testingtime and improve the design quality.

1. Introduction
The process of evaluating a system on a chip (SoC)
involves verifying a register transfer level (RTL)
description. The RTL description is written in a hardware description language and created through specification design, functional design, and RTL design, as
shown in the SoC design flow in Fig. 1. The result isa verified RTL description, called a clean file, which
is used next in the large-scale integrated circuit (LSI)
production process.
SoC evaluation usually takes several times longer
than SoC design, so as the scale of designs increases,
the evaluation time is becoming a problem. Moreover, if a problem is discovered during the evaluation,
the evaluation process can take even longer because
additional checking is needed after the problem has
been fixed to ensure that revisions have not affected
other aspects of the design. Furthermore, the repair
time and cost for fixing problems found after production has begun can be very high, so as much testing as
possible must be done to eliminate these problems
beforehand.
To date, SoC testing has generally been done using
a logic simulator, which is a computer program ((a) in† NTT Microsystem Integration Laboratories
Atsugi-shi, 243-0198 Japan

Fig. 1). However, simulating the functions of a largescale device such as an SoC takes a long time, whichmakes it difficult to test all of the functionality adequately.
2. Benefits of FPGA testing
To overcome this problem with logic simulation, it
has recently become more common to conduct testing using field-programmable gate arrays (FPGAs)((b) in Fig. 1) in parallel with logic simulation. An
FPGA is an LSI [1] that can be programmed any
number of times for the desired logic. In FPGA testing, hardware with the same functionality as the SoC
is implemented by writing FPGA design data to an
FPGA mounted on an evaluation board. This data iscreated from the hardware description of the SoC
design. The functionality is then checked using measuring instruments to input data and evaluate whether
the intended output data is obtained. FPGAs canoperate several hundred times faster than a logic
simulator, so they make possible long-term, continuous testing that is difficult with simulation.
Functionality can also be evaluated under conditions closer to real ones by connecting the evaluation
board to other equipment and communicating at real
speeds. FPGA evaluation allows functionality to betested under more conditions than logic simulation
NTT Technical Review

Feature Articles

Specification
designFunctional
design(b) FPGA evaluation

RTL design

Design(a) RTL simulation

Implementation

RTL testing

Tested RTL description
Clean file

Testing

LSI
manufacturing

Fig. 1. SoC design flow.

and thereby allows for more improvements in design
quality.
Another major benefit is that in combination with
software, overall system operation can be tested. In
this article, we focus on RTL evaluation using
FPGAs.
3. Features of FPGA testing for
optical access communications SoCs
This type of FPGA testing has many benefits, butwhen used to test SoCs for optical access communications, it must support large-scale systems andhigh-speed communications and make the test shorterand easier to perform. Below, we describe how theseissues are handled.
3.1 Large-scale systems
An optical-access communications SoC requires avariety of functions, from communications using theprescribed protocol, to encryption for maintaining
security and quality-of-service control to maintain
service quality, so the design data may be largescale.
For testing, the design data must be written to
FPGAs, but a large-scale design may not fit onto asingle FPGA device. In such cases, the design data
Vol. 9 No. 3 Mar. 2011

can be divided and written to multiple FPGAs, but
this presents the additional issues of how to divide thedesign data appropriately and how to transmit highspeed signals among the devices.
Communications SoCs are usually organized toperform the prescribed processing in order according
to the signal flow for upstream and downstream signals. Thus, the design can be divided according to themajor functions to enable this sort of processing, andeach function can be implemented in a separate
FPGA (Fig. 2).
3.2 High-speed communications
The next-generation of optical access communications SoCs will send and receive data at a high wirespeed of 10 Gbit/s. FPGA testing allows the design tobe evaluated at these speeds, so this technology has
the advantage of evaluating the design under nearlyreal conditions.
When data is transmitted among multiple FPGAs,
it can be difficult to transmit or receive data between
devices in some cases owing to delay in the lines
among FPGAs or to phase differences among the
FPGA clocks. For this reason, in 10-Gbit/s processing, a 64-bit-wide data frame and control signals aresent together with the clock from the sending FPGA
to the receiving FPGA (Fig. 3). The data is written toFeature Articles

10G SNI

FPGA
for
SNI

1G SNIFPGA for
upstream
BUF

FPGA
for
bridge10G PON IF
1G PON IF

FPGA
for
FEC

FPGA forencryption

FPGA fordownstream
BUF

FPGA forPON
DBA

FPGA board

BUF: buffer
DBA: dynamic bandwidth allocation
FEC: forward error correctionG:
Gbit/sIF:interface
PON: passive optical network
SNI: system network interface

Fig. 2. Example of FPGA implementation.

Receiver FPGA
Control signal
Frame
64 bits

Transceiver FPGAFIFOCommunications
function block

Receiver FPGA’s clock

Internal clock

Phase difference

Fig. 3. Clock phase differences.

a first-in first-out (FIFO) buffer in sync with the sending FPGA’s clock. It is then read out of the buffer insync with the receiving FPGA’s clock to compensate
for any phase differences and to maintain high-speed
communications [2].
The wiring, connectors, and other aspects of the
FPGA evaluation board are also selected to handle
high-speed communications.
3.3 Reduced testing time
For large-scale SoCs, all the functional blocks aredesigned and tested in parallel. With conventional
FPGA testing, frame continuity is not achieved, and
it is impossible to test all functional blocks or the LSI

as a whole until the design data for all functional
blocks has been implemented in FPGAs. Because ofthis, if the design and testing of a particular block isdelayed and the block has not yet been implemented
in the FPGA, testing cannot begin, which creates abottleneck for the entire test schedule.
To deal with this issue, various approaches are used
to replace the FPGA that is behind schedule until it isready in order to prevent major delays in the overall
test schedule. These include using an FPGA that
implements only the minimum functionality (a substitute circuit), one that simply takes a frame from theprevious block and outputs it in a format acceptable
to the following block (through circuit), and one thatNTT Technical Review

Feature Articles

FPGA 1FPGA 2FPGA 3ThroughcircuitThroughcircuit

Loopback
circuitFPGA 1FPGA 2FPGA 3(2) Partial functional test

CompleteddesignSubstitutecircuitThroughcircuitFPGA 1FPGA 2FPGA 3(3) Functional test

CompleteddesignCompleteddesignCompleteddesign(1) Frame transmission test

Frame

Selector
Select signal

Fig. 4. Gradual FPGA testing method.

takes the output from the previous block and sends itback as input to the previous block (loop-back circuit).
Examples of applying these types of circuit at various stages of testing (gradual FPGA testing method)
are shown in Fig. 4. In the early stages of testing,none of the block designs are complete, so a throughcircuit is implemented for each one and a loop-backcircuit is used to perform a frame continuity test (1).
When the designs of some of the blocks are complete,either through or substitute circuits can be used forblocks that are still incomplete so that FPGA testingof the completed circuits can proceed (2). In this way,evaluation can proceed, starting with the blocks completed first, and at the end, when the designs and
FPGA implementations for all blocks are complete,
the overall LSI functionality is tested (3). Before thedesigns for all of the blocks are complete, testing ofindividual functional blocks can proceed (1)–(2), andwhen the design data for all of the blocks is ready,testing of the overall LSI is done. This allows testing
to be completed earlier than with previous approaches.
3.4 Easier testing
An SoC for communications processes frames fromthe communications path, performing forward error
correction (FEC) to correct errors, encryption to provide high security, etc. Testing instruments similar to
local area network (LAN) analyzers are used inVol. 9 No. 3 Mar. 2011

FPGA testing for communications SoCs, but theygenerally cannot create or receive these types offrames, so it is impossible to check functionality
without performing testing by actually connecting
together devices of the same type. To resolve thisissue, we built the test system shown in Fig. 5.
This system consists of a LAN analyzer thatembeds test data generated on a personal computer(PC) in frames and sends them to the FPGA port, andan optical line terminal (OLT) FPGA board (see“MAC LSI Design Technology for Optical AccessCommunications” [3]) with the circuit being tested aswell as circuits that encapsulate and decapsulate thetest data from the frames and send them to the test
circuit.
Test frames are encrypted and FEC-encoded using
a program running on the PC, stored in the data segments of Ethernet frames by the LAN analyzer, andinput to the OLT FPGA board. On the FPGA board,the decapsulation circuit retrieves the encrypted andFEC-encoded frames from the Ethernet frames andremoves the FEC encoding and encryption. Correct
operation can be checked by comparing the test framewith the output frame. This method makes tests simulating communication conditions easy to do using an
ordinary LAN analyzer.
4. FPGA evaluation boards
An example of an FPGA evaluation board developedFeature Articles

FEC-encoded encrypted frame in
Ethernet frame

Test emulating ONU

ONU
PC

Test patterngeneration
analysis

Decapsulation
circuitLAN
analyzer

Encapsulation
circuit

OLT(deviceunder test)

Test connecting ONU and OLT
FEC or frame encryption

ONU

OLT
(device under test)

ONU: optical network unit

Fig. 5. Test environment for connection test between ONU and OLT.

41 cm

35 cm

PON
interface

SNI

Fig. 6. PGA board for optical access network SOC.

for an optical access communications SoC is shownin Fig. 6. This evaluation board implements OLT
circuits in multiple FPGAs for FPGA testing.



5. Future developments
After an LSI has been produced, an LSI evaluation
board is constructed and the LSI’s system operation
NTT Technical Review

Feature Articles

is tested. FPGA testing know-how can also be usefulfor this. We plan to study new functionality by using
the fact that functions on the FPGA board itself canalso be modified.
References[1]

H. Matsumoto, “Latest Changes and Trends in FPGA/CPLD,” IEICE

Ritsku Kusaba

[2]

[3]

Journal, Vol. 93, No. 6, pp. 485–491, 2010 (in Japanese).
R. Kusaba, K. Kawai, S. Yasuda, S. Shigematsu, M. Nakanishi, and
M. Urano, “FPGA Design Methodology for Communication Frame
Processing,” Proc. of Integrated Circuits and Devices in Vietnam
2010, pp. 11–16, Ho Chi Minh City, Vietnam.
A Miyazaki, M. Urano, H. Suto, and K. Terada, “MAC LSI Design
Technology for Optical Access Communications,” NTT Technical
Review, Vol. 9, No. 3, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa3.html

Tomoaki Kawamura

Senior Research Engineer, Ubiquitous Interface Laboratory, NTT Microsystem Integration
Laboratories.
He received the B.E. and M.E. degrees in electrical engineering from Keio University, Kanagawa, in 1985 and 1987, respectively. He joined
NTT Telecommunication Networks Laboratory
in 1987 and studied LSI CAD and design. He isa member of the Institute of Electronics, Information and Communication Engineers (IEICE).

Senior Research Engineer, Ubiquitous Interface Laboratory, NTT Microsystem Integration
Laboratories.
He received the B.S. and M.S. degrees in electrical engineering from Tohoku University,
Miyagi, in 1988 and 1990, respectively. Sincejoining NTT in 1990, he has been engaged in
R&D of high-speed integrated circuits and highspeed switching systems. He is currently engaged
in R&D of advanced SoC LSIs. He received theBest of Conference Award from the 48th IEEE
Electronic Components and Technology Conference in 1999. He is a member of IEEE, IEICE,
and the Japan Society of Applied Physics.

Sadayuki Yasuda

Shoko Oteru

Senior Research Engineer, Ubiquitous Interface Laboratory, NTT Microsystem Integration
Laboratories.
He received the B.E. degree in electronics
engineering from Kyoto University in 1987.
Since joining NTT in 1987, he has been engaged
in R&D of high-speed CMOS/BiCMOS circuit
technology for telecommunications systems. His
current research interests include SoC LSIs for
low-power network systems. He is a member of
IEICE.

Research Engineer, Ubiquitous Interface Laboratory, NTT Microsystem Integration Laboratories.
She received the B.S. degree in physics from
Ochanomizu University, Tokyo, and the M.S.
degree in physics from the University of Tokyo in
1992 and 1994, respectively. She joined NTT
Telecommunication Networks Laboratory in
1994. She is a member of the Institute of Electronics Engineers of Japan.

Kenji Kawai

Senior Research Engineer, Ubiquitous Interface Laboratory, NTT Microsystem Integration
Laboratories.
He received the B.E. and M.E. degrees in electronic communication engineering from Waseda
University, Tokyo, in 1989 and 1991, respectively. He joined NTT LSI Laboratories, Kanagawa,in 1991. Since then, he has been engaged inresearch on the design of high-speed LSIs.

Vol. 9 No. 3 Mar. 2011

Feature Articles: System LSI Design for Broadband
Optical Access Network Systems

10-Gbit/s Burst-mode ReceiverIntegrated Circuits for Broadband
Optical Access Networks
Masafumi Nogawa†, Hiroaki Katsurai, Makoto Nakamura,
Hideki Kamitsuna, and Yusuke Ohtomo
Abstract

We introduce burst-mode receiver integrated circuits that can respond instantaneously to a suddenly
arriving optical signal and receive it correctly. They are suitable for the next-generation optical accesssystem (10G-EPON: 10-Gbit/s Ethernet passive optical network), which requires a receiver that canreceive high-speed (10-Gbit/s) optical burst signals, unlike typical receivers which receive continuous
signals.

1. Introduction

2. Receiver architecture

NTT’s FLET’S Hikari service, which is a passive
optical network (PON) system, is currently spreadingin Japan. In this service, the signal sent from a customer’s terminal (optical network unit (ONU)) to theoptical line terminal (OLT) in the central office is aburst signal. Unlike the continuous signals widelyused with Ethernet and other technologies, burst signals have no signal at all between data segments.
Moreover, the distances from customers to the central
office vary, which affects the signal strength accordingly. This is shown in Fig. 1, where the signal from
ONU 1 is strong, while that from ONU 2 is weak. For
the central office to be able to handle such customer
data, these optical burst signals with differingstrengths and timings must be converted into electrical signals of fixed intensity and timing. For the next
generation of optical access communications, thisfunctionality must be achieved for data being transmitted at ten times the current speeds.

As shown in Fig. 2, the burst-mode receiver [1], [2]for an OLT consists of an avalanche photodiode,which converts the optical signal into an electricalcurrent signal; a transimpedance amplifier (TIA),
which amplifies and converts the current signal into a
voltage signal; a limiting amplifier (LA), which converts weak and strong voltages into fixed-amplitudevoltage signals; and a clock and data recovery (CDR),
which extracts the timing clock from this signal andDownstream data(continuous signal)
Customer(ONU 1)……

Customer(ONU 2)
Upstream data
(burst signal)

Central office(OLT)

Power splitter
Customer(ONU n)† NTT Microsystem Integration Laboratories
Atsugi-shi, 243-0198 Japan

Fig. 1. PON system.

NTT Technical Review

Feature Articles

Avalanche photodiodeOptical input

B-TIA

B-LA

B-CDR

Positive signal

Negative signal
Gain control

Constant output amplitude& offset cancellation

Clock (timing) extraction& data recovery

Key techniques for a burst-mode receiverFig. 2. Burst-mode receiver.

Table 1. Specifications of burst-mode receivers in PON systems.
GE-PONIEEE 802.3ah

10G-EPON
IEEE 802.3av

1000BASEPX20-D

10GBASEPR-D3

10/1GBASEPRX-D3

Data rate

1.25 Gb/s

10.3125 Gb/s

1.25 Gb/s

Response time for TIA + LA

< 400 ns

< 800 ns

< 400 ns

Response time for CDR< 400 ns

< 400 ns

< 400 ns

Sensitivity–27 dBm–28 dBm–29.78 dBm

Overload–6 dBm

–6 dBm

–9.38 dBm

Bit error ratio< 10–12< 10–3(with FEC)

< 10–12

Maximum length of consecutive
identical digits*

5 bits

66 bits

5 bits

FEC: forward error correction*Counted using the encoding method used in the standard.

reshapes the signal waveform using the extracted
clock signal. For a burst-mode receiver, the TIA, LA,
and CDR need to be burst-mode devices, which aredenoted B-TIA, B-LA, and B-CDR, respectively.
Below, we discuss the international standard specifications and characteristics of burst-mode receivers.
3. International standard specifications
The specifications for 10-Gbit/s PON-system(10G-EPON (10-Gbit/s Ethernet PON), IEEE
802.3av) [3] burst-mode receivers, as defined byVol. 9 No. 3 Mar. 2011

IEEE, are shown in Table 1. For comparison, thetable also shows the specifications for the 1-Gbit/s
PON system (GE-PON (Gigabit Ethernet PON),
IEEE 802.3ah) [4] currently in common use. For the
10G-EPON system, both 10- and 1-Gbit/s burst signal rates are stipulated. For signals at each rate, burstmode receivers must satisfy the values in the table for
optical input sensitivity and overload (tolerance tostrong signals) just like continuous-mode receivers.
Characteristics particular to burst-mode receivers are
the response times. For 10-Gbit/s receivers, theresponse times of the TIA and LA are twice those inFeature Articles

2-step gain switching
Feedback resistor Rf
Output buffer

Avalanche
photodiode

OUTP

IN

OUTN
Dummy

Rf

Level
adjustRf switching signal
Hysteresis
comparator
Reset

IN: input
OUTP: positive output
OUTN: negative output

Fig. 3. Block diagram of B-TIA.

1-Gbit/s receivers, and the time allowed for the CDR
to extract signal timing has not changed. However,
the maximum number of consecutive identical digits(CIDs) (zero or one) has been increased to 66 bits.
This means that when a signal begins suddenly after
a period of no signal, the TIA and LA must adjust theamplification, and the CDR must match the signal
timing within a short time (although it is 1.5 times theprevious time). On the other hand, each integrated
circuit (IC) must not change state within a CID period(the same as when there is no signal) that is over 13
times longer than that specified for 1 Gbit/s. These
requirements appear to conflict: they require a fast
response while also requiring that the state does notchange.
4. Burst-mode receiver circuits
Below, we introduce receiver circuits that satisfy
the particular requirements of burst signals.
4.1 B urst-mode transimpedance amplifier (BTIA)
A block diagram of a B-TIA [5] is shown in Fig. 3.
In order to respond to a sudden input signal andinstantly set the gain optimally, the circuit switchesbetween two feedback resistor values Rf. When the
input signal is weak, a high feedback resistance isused for high gain, and when the input signal strength
exceeds a set value, the TIA switches to a low feedback resistance for lower gain. Existing circuits either
do not switch feedback resistance or vary it continuously. In the former case, when the sensitivity is set tohandle weak signals, strong signals produce signal
distortion, while when it is set to handle strong signals, the sensitivity is not enough for weak signals. In
the latter case, when the response time controlling the
feedback resistance is fast, sensitivity changes duringa CID period. If the response is made slower to prevent
this, the burst response is somewhat slower, which isa drawback. Switching between two values allows fora fast response, and a comparator that has hysteresis
is used to preserve the post-switching state, whichenables good CID reception.
4.2 Burst-mode limiting amplifier (B-LA)
A block diagram of a B-LA [6] is shown in Fig. 4.
The basic function of the LA is to receive an input
voltage signal with a varying amplitude (ranging
from small to large) and to output a fixed-amplitude
signal. For burst signals, another function is also
important: the B-LA adjusts the voltage levels of
NTT Technical Review

Feature Articles

2-stage auto-offset cancellation
INP

OUTN

INN

OUTP

Low-pass filter

Low-pass filter

Fig. 4. Block diagram of B-LA.

Pulse width distortion compensation
Pulse width
detector
Input data

Jitter reduction

Pulse width
adjusterDEC

Gating

GVCO1

Buf

GVCO2

Recovered data

Recovered clock

ControlFrequency-locked loop

Reference clock

Fig. 5. Block diagram of B-CDR.

positive and negative signals quickly (see Fig. 2),
which is called offset cancellation. When a burst signal arrives after a period of no signal, the positive
input (INP) of the LA goes to high with respect to a
fixed center level and the negative input (INN) goesto low. The LA output signal first appears when thepositive and negative signals cross, so to reduce theamount of time until a signal is output, a means of
ensuring fast offset cancellation is needed. In the first
offset cancellation stage in Fig. 4, the average level ofthe negative output of the first stage is fed back to thepositive input and vice versa. This causes both signals
to approach the same potential. We get a secondorder filter effect by connecting two such circuits inseries. With a second-order filter, the first statechange is slow and the subsequent change is fast.
Vol. 9 No. 3 Mar. 2011

Therefore, while reducing the level variation due toCID, the second-order filter can cancel the offset
quickly for both positive and negative signals at the
beginning of a burst and can reduce the time until the
burst signal is output.
4.3 Burst-mode clock and data recovery (B-CDR)
A block diagram of a B-CDR circuit [7] is shown in
Fig. 5. This CDR is based on a gated voltage-controlled oscillator (GVCO) that has the fastest synchronization time to the input signal. When the input
signal rises from low to high, a pulse is output fromthe gating circuit. When this pulse is input to a NAND
gate, which is one of the ring gates in GVCO1, theclock timing of GVCO1 adjusts to the data in thatsingle pulse. Since the matching of the timing is soFeature Articles

Avalanche photodiode

B-TIA

B-LA

B-CDR

Fig. 6. Micrographs of the receiver ICs.

fast, any jitter in the input signal appears as-is in the
output clock of GVCO1, so synchronization loss
problems may occur in later-stage circuits. Moreover,when the high width of an input signal is much
shorter than the low width, the decision circuit (DEC)produces a false detection. For this design, a second
oscillator (GVCO2) is placed in series with the first.
By inputting the output clock from GVCO1 attenuated in the buffer (Buf), we were able to obtain astable output clock that was less affected by the jitterin the input signal. Moreover, by adding a feedback
loop that monitors the input signal pulse width andcompensates for its distortion, we were able to makethe pulse widths for high and low symbols close to
one another.

measured the bit error ratio (BER) in the output signal
payload. To ensure that measurements reflected thereceiver’s longest (worst-case) possible response
time, we input a signal of the maximum strength indicated in the specifications directly before inputting asignal of the strength being measured. Points labeled
2R are the BERs for the TIA + LA output, while 3R
is the BER that also includes the CDR. For both 10
Gbit/s and 1 Gbit/s, the receive sensitivity and overload values met those in the standards specifications
shown in Table 1. The receiver can set the gain andadjust the timing within a preamble time of 200 ns.
This indicates that the receiver achieves a very fast
burst-response time of less than one sixth of the 1200
ns specified in the 10G-EPON standard.

5. Burst-mode receiver characteristics

6. Future developments

Micrographs of IC prototypes of the B-TIA, B-LA,and B-CDR for the burst-mode receiver are shown in
Fig. 6. We selected a silicon process to fabricate theseICs, putting priority on high-volume production andlow cost considering that they are for access network
services. Taking into consideration their high-frequency characteristics, we housed each IC in a package for high-speed IC applications, mounted eachpackage on an evaluation board, and evaluated theircharacteristics as a burst-mode receiver.
The evaluation results are shown in Fig. 7. We varied the power of the input optical burst signal andIn the future, we plan to use this technology in our
research and development of higher-layer LSIs topromote the use of 10G-EPON in Japan and aroundthe world and to develop circuit techniques with evenbetter energy-saving characteristics, as this becomes
more and more important.

NTT Technical Review

Feature Articles

10–1
Guard time (10 ns)

Bit error ratio

10–2

Preamble (200 ns)

Interference
burst–6 dBm10.3 G
3R

Payload (100 µs)
Measured burst

10.3 G
2R

PR-D3 (10.3 G)

10

–3

10–4
10–5

1.25 G
2R

10–6
10–7
10–8
10–9
10–10
10–11
10–12
–35

PRX-D3(1.25 G)–30

PX20-D(1.25 G)

–25

–20

–15

–10

–5

Input optical power (dBm)
G: Gbit/s

Fig. 7. Measured bit error ratio of the burst-mode receiver.

References
[1]

[2]

[3]
[4]

Y. Ohtomo, H. Kamitsuna, H. Katsurai, K. Nishimura, M. Nogawa,
M. Nakamura, S. Nishihara, T. Kurosaki, T. Ito, and A. Okada, “Highspeed Circuit Technology for 10-Gb/s Optical Burst-mode Transmission,” Proc. of OFC 2010 (invited paper), pp. 1–3, San Diego, USA,
Mar. 2010.
M. Nakamura, S. Nishihara, T. Ito, T. Kurosaki, M. Nogawa, and Y.
Ohtomo, “Burst-mode Optical Receiver ICs for Broadband AccessNetworks,” Proc. of BCTM 2010 (invited paper), 2.1, Austin, USA,
Oct. 2010.
IEEE Std 802.3av, 2009.
IEEE Std 802.3ah, 2004.

Vol. 9 No. 3 Mar. 2011

[5]

[6]

[7]

S. Nishihara, M. Nakamura, T. Ito, T. Kurosaki, Y. Ohtomo, and A.
Okada, “A SiGe BiCMOS Burst-mode Transimpedance Amplifier
Using Fast and Accurate Offset Compensation Technique for 1G/10G
Dual-rate Transceiver,” Proc. of BCTM 2009, 10.2, Capri, Italy, Oct.
2009.
M. Nogawa, K. Nishimura, J. Terada, M. Nakamura, S. Nishihara, and
Y. Ohtomo, “A 10-Gb/s Burst-mode Limiting Amplifier Using a Twostage Active Feedback Circuit,” Proc. of the 2009 Symp. VLSI circuits, p. 18, Kyoto, Japan, June 2009.
J. Terada, Y. Ohtomo, K. Nishimura, H. Katsurai, S. Kimura, and N.
Yoshimoto, “Jitter-reduction and pulse-width-distortion compensation circuits for a 10Gb/s burst-mode CDR circuit,” Proc. of ISSCC
2009, 5.8, San Francisco, USA, Feb. 2009.

Feature Articles

Masafumi Nogawa

Senior Research Engineer, Supervisor, Ubiquitous Interface Laboratory, NTT Microsystem
Integration Laboratories.
He received the B.E. and M.E. degrees in electronic engineering from Tohoku University,
Miyagi, in 1988 and 1990, respectively. He
joined NTT LSI Laboratories in 1990. Since
then, he has been engaged in R&D of high-speed,
low-power CMOS/BiCMOS LSIs for wireline
communications. From 2001 to 2002, he worked
for NTT Electronics Corporation, where he wasengaged in the development of SDH/SONET
transceiver LSIs. His current research interests
include high-speed analog front-end ICs for optical communications, particularly for PON applications. He is a member of IEEE, the Institute ofElectronics, Information and Communication
Engineers (IEICE), and the Japan Society ofApplied Physics. He received the 1995 IEICE
Young Researchers’ Award. He served as an
Associate Editor of IEICE Transactions on Electronics from 2007 to 2010 and as a member of theTechnical Program Committee of the IEEE International Solid-State Circuits Conference (ISSCC)
since 2009.

Hiroaki Katsurai

Researcher, Ubiquitous Interface Laboratory,
NTT Microsystem Integration Laboratories.
He received the B.E. degree in systems innovation and the M.E. degree in precision engineeringfrom the University of Tokyo in 2005 and 2007,
respectively. He joined NTT Microsystem Integration Laboratories in 2007. He is currently
working on the development of high-speed LSIs
for optical communications. He is a member of
IEICE.

Hideki Kamitsuna

Senior Research Engineer, Photonics Device
Laboratory, NTT Photonics Laboratories.
He received the B.S. and M.S. degrees in physics and the Dr.Eng. degree in communicationengineering from Kyushu University, Fukuoka,
in 1986, 1988, and 2004, respectively. In 1988,
he joined NTT Radio Communication Systems
Laboratories, where he was engaged in researchon MMICs. Since 1999, he has been engaged inresearch on ultrahigh-speed optical and electronic devices and ICs for optical communications systems including 10G-EPON systems at
NTT Photonics Laboratories. He received the1994 Young Engineer’s Award, the 2004 Best
Paper Award, and the 2005 Electronics SocietyAward from IEICE. He also received the 2000
European Microwave Conference (EuMC)
Microwave Prize from the 30th EuMC, Paris,
France. He is a member of IEEE and IEICE.

Yusuke Ohtomo

Senior Research Engineer, Supervisor, Ubiquitous Interface Laboratory, NTT Microsystem
Integration Laboratories.
He received the B.E., M.E., and Ph.D. degrees
in electrical engineering from Keio University,
Kanagawa, in 1983, 1985, and 1998, respectively. Since joining NTT in 1985, he has been
engaged in research on high-speed CMOS/BiCMOS circuit technology. His current researchinterests include high-speed burst-mode LSI
design. He has served on the Technical Program
Committees of several IEEE conferences, including ISSCC and the Symposium on VLSI Circuits.
He is a senior member of IEEE and IEICE.

Makoto Nakamura

Senior Research Engineer, Supervisor, Highspeed Devices and Technology Laboratory, NTT
Photonics Laboratories.
He received the B.S., M.S., and Dr.Eng.
degrees in electronics engineering from Nagoya
University, Aichi, in 1987, 1989, and 1998,
respectively. He joined NTT LSI Laboratories in1989 and engaged in R&D of timing LSIs andbroadband amplifiers for high-speed opticaltransmission systems and burst-mode transceiver
LSIs for optical access networks. From 2000 to
2002, he worked in NTT Electronics Corporation, where he was developing LSIs and modules
for optical communications. His recent work has
been in the areas of burst-mode transceivers for
optical access systems and high-speed electricaldispersion compensation ICs for long-reach optical transmission systems. He is a member of theIEEE Solid-State Circuits Society and the Photonics Society, IEICE, and the Institute of Electrical Engineers of Japan.



NTT Technical Review

Feature Articles: R&D of Optical Component Technologies
for 100-Gbit/s Digital Coherent Communications

Optical Device Technologies for
Future Network Evolution
Koichi Murata† and Takashi Saida
Abstract

This article outlines progress in optical device technologies for photonic networks, focusing on integrated optical device technologies for digital coherent optical transmission technologies. With the rapid
spread of fiber to the home (FTTH), broadband video services and mobile Internet devices now requirea highly functional optical network infrastructure with a large capacity.

1. Introduction
Communication traffic has grown owing to therapid growth of the Internet and broadband services.
The technological progress in high-speed and largecapacity optical transmission and the optical devices
for optical transmission systems have supported theevolution of information and communications technology. Trends in the transmission capacity of thecore network are shown in Fig. 1. From 1980 to thebeginning of the 1990s, electrical time domain multiplexing (ETDM) based on on-off keying was the
major technology in optical transmission systems. In
ETDM systems, high-speed optical and electricaldevices as well as optical fiber amplifiers were thekeys to achieving high-speed long-haul transmission
systems. The total transmission capacity reached 10
Gbit/s. In the 1990s, wavelength division multiplexing (WDM) led to rapid progress in transmission
capacity owing to the appearance of optical filters
providing optical multiplexing and/or demultiplexing
functions. Arrayed-waveguide grating (AWG) technology based on silica-based planar lightwave circuits (PLCs) [1] played an important role in achieving those functions with excellent stability, robustness, and reliability. Since silica-based glass waveguides are formed on the Si substrate in PLC technology, this technology can provide various functions
with a very small die area, such as optical multiplex-

ing/demultiplexing, optical switching, and opticalattenuation [2]. Here, the optical switching andattenuation is achieved by Mach-Zehnder interferometers with thermo-optic heaters. These PLC technologies are applied to key optical components for not
only core networks but also metro-area networks. For
example, reconfigurable optical add/drop multiplexers (ROADMs), which feature low latency, flexibility,
and upgradability, have been developed using PLC
technology. In an ROADM switching module, highly
integrated PLC technology containing the AWG and
optical switches and hybrid integration technology
have been used to achieve a compact and highly functional OADM [3].
The latest 40-Gbit/s × 40 wavelengths WDM system has been deployed in the core network, and totaltransmission capacity has reached 1.6 Tbit/s. To keep
up with the demand for rapid growth of communication traffic, new technologies supporting 10-Tbit/s
optical transmission systems based on 100 Gbit/s perchannel (ch) are expected. One attractive candidate
technology for 100-Gbit/s-based WDM systems isdigital coherent transmission, which combines coherent detection and digital signal processing [4]. In thenext section, we review the transmitter/receiver configurations for various optical modulation formats
and describe the integrated optical device techniques
for digital coherent technology.

† NTT Photonics Laboratories
Atsugi-shi, 243-0198 JapanNTT Technical Review

Feature Articles

1 Pbit/s

Coherent technology

100 Tbit/s

Transmission capacity

10 Tbit/s
ROADM switch module
1 Tbit/s

Wavelength
division
multiplexing

100 Gbit/s
AWG filter chip
10 Gbit/s

Time divisionmultiplexing

Optical fiber amplifier

1 Gbit/s
Optical fiber amplifier

100 Mbit/s
Laser module
1980

1990

2000

2010

2020

Year

Fig. 1. Trends in optical transmission system capacity.

2. Optical modulation formats andoptical transmitter/receiver configurations
The configurations of optical modulators andreceivers for various optical modulation formats aswell as the relationship between symbol and datatransmission rates are summarized in Fig. 2. The on
and off optical signals were generated in the opticalmodulator according to the signal information of “1”and “0” in on-off keying (OOK) direct detection
modulation. OOK was widely applied to systems
with data transmission rates up to 10 Gbit/s because
it lets us make a simple optical modulator and receiver configuration. To achieve even greater capacity
and long-distance transmission, the important technical issue is how to increase the spectral efficiency
while maintaining the tolerance of the optical signalto-noise ratio. In order to achieve this, optical phaseshift keying schemes such as differential phase shift
keying (DPSK) and differential quadrature phaseshift keying (DQPSK) have been investigated. For
example, DQPSK has been applied to the abovementioned 40-Gbit/s/ch WDM systems. In the case of
DQPSK, 2-bit signals are modulated and assigned tofour optical phases, which results in a two-foldVol. 9 No. 3 Mar. 2011

improvement in spectral efficiency compared with
OOK. DQPSK is thus able to relax the limitations on
both optical bandwidth and transmission distance due
to chromatic dispersion. Polarization division multiplexed quadrature phase shift keying (PDM-QPSK)with coherent detection is being investigated for the
next-generation 100-Gbit/s/ch systems. PDM-QPSK
multiplexes two QPSK signals in the polarization
domain. It has the great advantage of mitigating the
problems of increasing both the electrical analog
amplification bandwidth and the digital signal processing speed because it can reduce the symbol rate
to 1/4 of the data transmission rate. As shown in Fig.
2, the configurations of modulators and receivers
become complicated when phase shift keying andpolarization multiplexing are used. This indicates thathighly functional and integrated optical device technology, which provides a small size and low cost, will
be important to support future large-capacity opticaltransmission systems.
3. Digital coherent technology andoptical front-end configurations
Digital coherent technology combines coherentFeature Articles

Modulation
formats

Constellation
map

OOK

DPSK

Q

Q

‘0’

‘1’

‘0’

DQPSK
Q

‘10’

Opticalmodulator
configuration

Pol. #1
‘00’

‘10’

Q

Pol. #2
‘00’

‘10’

Q

l

l

l
‘01’

l
‘11’

l

‘01’

‘11’

1 bit/symbol

1 bit/symbol

2 bit/symbol

2 polarizations × 2 bit/symbol

1

1

1/2

1/4

OOK

‘00’

‘1’

‘11’

Symbol rate

PDM-QPSK

PSK

PSK

PSK

π/2

PSK

PSK

PSK

‘01’

π/2

π/2

PSK

LO

Opticalreceiverconfiguration

SIG

LO: local oscillator lightPol.: polarization
SIG: signal light

Fig. 2. Optical modulation formats and their optical modulator and receiver configurations.

detection and digital signal processing at the receiverside and enables us to use various modulation formats. The transmitter and receiver for a digital coherent system using PDM-QPSK modulation format are
shown in Figs. 3 and 4, respectively. Here, the signal
data transmission rate is 128 Gbit/s when a forward
error correction code that allows a 20% increase in
the data rate is used. The transmitter consists of adigital signal processor, a light source, an opticalmodulator, and modulator drivers, as shown in Fig. 3.
Here, the optical modulator comprises two QPSK
modulators and a polarization beam combiner (PBC).
On the other hand, the receiver consists of a local
oscillator (LO) light source, optical receiver frontend, analog/digital convertors (ADCs), and a digital
signal processor, as shown in Fig. 4. First, the opticalphase information is recovered by mixing the input
optical signal with the LO light, and then the signals
are converted into electrical signals and linearly
amplified in the front-end. After that, the electricalsignals are sampled by the ADCs, and the original
data signals are then recovered in the digital signal
processor by using a phase and amplitude estimation
algorithm. Here, the use of the digital signal processing has three important features, which is quite different from the previous technologies: 1) stable phasesynchronization between the received optical signal
and the local light as well as stable polarization
demultiplexing, 2) both adaptive polarization dispersion compensation and chromatic dispersion compensation through the use of sophisticated digital filter technology, and 3) flexible selection of various
modulation formats with minimum modification of
the hardware.

NTT Technical Review

Feature Articles

PDM-QPSK optical modulator module
XI
32 Gbit/s
32 Gbit/s

XQ

64 Gbit/s
QPSK modulator(X-polarization)

DigitalsignalprocessorLightsource

QPSK
modulator(Y-polarization)YIPBC
PDM-QPSK signal
128 Gbit/s
64 Gbit/s

32 Gbit/s
32 Gbit/s

YQ

Opticalmodulator

Electronic
devices
Opticaldevices

Optical modulator
drivers

Electricalsignals
Opticalsignals

XI, XQ, YI, YQ: in-phase and quadrature components on the X and Y axes, respectively.

Fig. 3. Digital coherent transmitter for PDM-QPSK. (DP (dual polarization), shown in the photograph, is equivalent to PDM)).

64 Gbit/s

32 Gbit/s

32 Gbit/s

128 Gbit/s
PDM-QPSK
input signal

90°
opticalhybrid

PBS

XI

TIA

ADC

XQ

TIA

ADC
Digitalsignalprocessor

PDM-QPSK
integrated receiver
Local
light
sourceNarrow-linewidth
tunable laser array

LO light source

90°
opticalhybrid

BS

XI

TIA

ADC

XQ

TIA

ADC

Optical receiver front-end

BS: beam splitter
PBS: polarization beam splitter
TIA: transimpedance amplifierElectronic
devices

Electricalsignals

Opticaldevices

OpticalsignalsFig. 4. Digital coherent receiver for the PDM-QPSK.

4. Optical modulator for 100-Gbit/s
digital coherent technology
Mach-Zehnder interferometers have been widelyused as optical amplitude modulators for conventional OOK systems. In this case, the optical phasedifference of the interferometer is controlled byVol. 9 No. 3 Mar. 2011

external data signals. When the phase difference is 0°,
the output optical signal is on, while when the phasedifference is 180°, the output optical signal amplitude
is off. On the other hand, in QPSK modulation, thephase of the interferometer must be controlled in therange from 0° to 360°, which means that QPSK optical modulators require twice the driving voltage thatFeature Articles

conventional amplitude modulators do. In addition, apolarization multiplexing function, which combines
two QPSK signals in the X and Y polarizations, isindispensable for PDM-QPSK signal generation.
Therefore, the PDM-QPSK optical modulator mustsatisfy two requirements: a low driving voltage andthe integration of two QPSK modulators and a PBC.
As the material for conventional optical modulators,
LiNbO3 has been widely used. It features low chirp
and low insertion-loss characteristics. However, there
are technical issues in the monolithic integration of acomplicated low-loss waveguide and PBC in order toconstruct a complicated optical modulator for PDMQPSK. NTT Photonics Laboratories has been investigating PLC-LiNbO3 hybrid technology for thosecomplicated multilevel optical formats [5], [6]. In thistechnology, various kinds of optical components like
optical couplers, PBCs, and splitters are monolithically integrated on the PLC, while LiNbO3 is justused for optical phase modulation. Since a PLC canprovide various functions in a small size with highreliability, hybrid technology is advantageous interms of flexibility for various modulation formats,like PSK and QAM (quadrature amplitude modulation), and scalability to advanced modulation formats[5], [6].
5. Optical receiver devices for 100-bit/s
digital coherent technology
Key optical devices for the digital coherent receiver
are the optical receiver front-end and LO light source,
as shown in Fig. 4. The receiver front-end consists of
optical polarization splitters, 90° optical hybrids,
photodiodes, and transimpedance amplifiers (TIAs)[7]. To make small low-cost receivers, technology for
integrating these optical and electrical devices is ofgreat importance. The passive optical circuits, fordemultiplexing polarization components and mixers
for mixing an optical signal with an LO light, arerequired to have a high polarization extinction ratio at
the polarization demultiplexers and a low phase error
at the mixers. They have conventionally been implemented using optical fiber or free-space optics technologies. However, those technologies cannot easily
provide stable operation with a small size. One promising approach is the application of PLC technology
to the monolithic integration of these two functions
because a PLC can monolithically integrate 90°
hybrids, couplers, and a polarization beam splitter(PBS) on a single Si-substrate [8]. As for the conversion of optical signals to electrical ones in the front

end receiver, the following three performances are
required: 1) broadband characteristics able to handle
a data rate of 32 Gbit/s, 2) a wide dynamic range forthe optical signal input intensity, and 3) linear amplification with low variation in output voltage swing,phase, and skew in each output channel. The TIA isrequired to provide not only the functions of autogain control and output voltage swing adjustment, butalso high-gain, broad-bandwidth, low waveform distortion, and low dynamic skew at the same time. To
cope with these requirements, several TIAs that use
high-speed and high-breakdown voltage device technologies such as SiGe BiCMOS (bipolar complementary metal oxide semiconductor) and InP HBTs (heterojunction bipolar transistors) are being investigated.
As for the LO light source, both low phase noise,i.e., narrow spectral line width and high output power,
are required because the optical frequency stability
affects the phase extraction stability, especially inintradyne coherent detection, and high LO light
power is useful for obtaining higher signal input sensitivity. NTT Photonics Laboratories has alreadydemonstrated an L-band tunable laser diode array
module that provides a narrow linewidth of less than
580 kHz and high fiber output power of 20 mW [9].
An integrable tunable laser assembly, which integrates light wavelength control with a tunable laser
source in one module, will be important for achievinga small transmitter and receiver board. Standardization for the abovementioned optical components for
100-Gbit/s/channel digital coherent transmission,
such as optical modulators, integrated optical frontends, and LO light sources, is currently under way in
the Optical Internetworking Forum (OIF) [10]. We
will continue to improve our optical device and integration technologies to obtain much higher performance and to contribute to future network evolution
by providing new optical device technologies.
6. Conclusions
A 100-Gbit/s/channel system based on digital
coherent technology is considered to be a promising
candidate for next-generation large-capacity longdistance optical communication systems. The opticalcomponents required for such systems, such as a
PDM-QPSK optical modulator, integrated receiver,and local light source, are under development. Optoelectrical integration technologies, which enable us
to construct small, low-cost, and highly functional
optical components, will play an important role in
NTT Technical Review

Feature Articles

providing cost-effective transmission equipment for
future 100-Gbit/s/ch and post-100-Gbit/s/ch opticalcommunications.
References
[1]
[2]

[3]
[4]

[5]

H. Takahashi, I. Nishi, and Y. Hibino, “10GHz Spacing Optical Frequency Division Multiplexer Based on Arrayed-waveguide Grating,”
IEE Electronics Letters, Vol. 28, No. 4, pp. 380–382, 1992.
S. Suzuki and A. Sugita, “Recent Progress in Silica-based PlanarLightwave Circuits (PLCs),” NTT Technical Review, Vol. 3, No. 7, pp.
12–16, 2005.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2005
07012.pdf
Y. Hibino, “Photonic Integration Technologies for Large-capacity
Telecommunication Networks,” Proc. of LEOS Annual Meeting
2009, Paper PLE3, Belek-Antalya, Turkey, 2009.
Y. Miyamoto and S. Suzuki, “Advanced Optical Modulation andMultiplexing Technologies for High-capacity OTN Based on 100
Gb/s Channel and Beyond,” IEEE Commun. Mag., Vol. 48, No. 3, pp.
S65–S72, 2010.
S. Mino, K. Murata, T. Saida, and I. Ogawa, “Coherent Optical Com-

Koichi Murata

Group Leader, Senior Research Engineer,
Supervisor, High-speed Circuits and Design
Optical Research Group, High-speed Devices
and Technology Laboratory, NTT Photonics
Laboratories.
He received the B.S. and M.S. degrees inmechanical engineering and the Dr.Eng. degree
in electrical and electronics engineering from
Nagoya University, Aichi, in 1987, 1989, and2003, respectively. In 1989, he joined NTT LSILaboratories, Atsugi. He has been engaged in
R&D of ultrahigh-speed digital ICs for opticalcommunication systems. His current researchinterests include optoelectronic IC design andhigh-speed optical transmission systems. He is amember of IEEE and the Institute of Electronics,
Information and Communication Engineers(IEICE).

Vol. 9 No. 3 Mar. 2011

ponent Technologies for WDM Transmission Systems,” 7960-07,
SPICE Photonics West, San Francisco, USA, Jan. 2011.
[6] S. Mino, H. Yamazaki, T. Goh, and T. Yamada, “Multilevel Optical
Modulator Utilizing PLC-LiNbO3 Hybrid-integration Technology,”
NTT Technical Review, Vol. 9, No. 3, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa8.html[7] K. Sano, T. Yoshimatsu, H. Fukuyama, and Y. Muramoto, “Photodiodes and Transimpedance Amplifiers for 100-Gbit/s Digital Coherent
Optical Communications,” NTT Technical Review, Vol. 9, No. 3,
2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
03fa10.html[8] Y. Sakamaki, H. Yamazaki, T. Mizuno, T. Goh, Y. Nasu, T. Hashimoto,
S. Kamei, K. Hattori, H. Takahashi, T. Kobayashi, and M. Ishikawa,“Dual Polarisation Optical Hybrid Using Silica-based Planar Lightwave Circuit Technology for Digital Coherent Receiver,” IEE Electron. Lett., Vol. 46, No. 1, pp. 58–60, 2010.
[9] H. Ishii, K. Kasaya, and H. Oohashi, “Spectral Linewidth Reduction
in Widely Wavelength Tunable DFB Laser Array,” IEEE J. Sel. Topics
in Quantum Electron., Vol. 15, No. 3, pp. 514–520, 2009.
[10] Optical Internetworking Forum.
http://www.oiforum.com/public/impagreements.html

Takashi Saida

Senior Research Engineer, Lightwave Component Research Group, Photonics Integration
Laboratory, NTT Photonics Laboratories.
He received the B.S., M.S., and Dr.Eng.
degrees in electrical engineering from the University of Tokyo in 1993, 1995, and 1998, respectively. He joined NTT Opto-Electronics Laboratories, Ibaraki, in 1998. Since then, he has been
engaged in R&D of integrated optical circuits
and devices. From 2002 to 2003, he was a visiting scholar at Stanford University, USA. His
current research interest includes integrated optical devices for high-speed optical transmission
systems. He is a member of IEEE, IEICE, theOptical Society of America, and the Japan Society of Applied Physics.

Feature Articles: R&D of Optical Component Technologies
for 100-Gbit/s Digital Coherent Communications

Wavelength-tunable Lasers for
Next-generation Optical Networks
Hiroyuki Ishii†, Kazuo Kasaya, and Hiromi Oohashi
Abstract

Wavelength-tunable lasers are key components as light sources in large-capacity optical core networks
that use dense wavelength-division-multiplexing techniques. In next-generation optical networks, anadvanced modulation/detection technique will be used, and low phase-noise characteristics will beessential for tunable laser sources. This article reviews techniques for reducing the phase noise of tunable
lasers and describes a narrow-linewidth tunable distributed feedback laser array that we have developed.

1. Introduction
The rapid increase in Internet traffic has accelerated
the growing demand for greater traffic capacity inrecent years. Dense wavelength-division-multiplexing (DWDM) techniques have been developed toincrease the transmission capacity by increasing thenumber of wavelength channels. In commercial photonic network systems, 80–100 wavelength channels
are multiplexed on one optical fiber. Early DWDM
systems used fixed-wavelength lasers as light sources, which meant that many kinds of optical transceivers were needed for the wavelength channels. The useof tunable lasers, which can operate at any channel
wavelength, means that only one kind of transceiveris needed, so the inventory cost can be reduced. Various kinds of tunable laser have already been developed for this purpose [1]. Tunable lasers are now
widely used as light sources in DWDM systems.
However, it is difficult to increase the number ofwavelength channels and thus further expand thetransmission capacity owing to the wavelength range
limitation of the optical fiber amplifier. Therefore, a
lot of research has concentrated on increasing thesignal data rate per wavelength channel. In commercial systems, the fastest data rate per channel is 40
Gbit/s. In next-generation systems, it will be 100† NTT Photonics Laboratories
Atsugi-shi, 243-0198 Japan

Gbit/s, and an advanced modulation/detection technique, namely a digital coherent system, is expected
to be used. In such systems, the tunable lasers areused both as a light source in the transmitter and as alocal oscillator in the receiver. In digital coherent
systems, the light sources must have low phase-noisecharacteristics because the phase of the lightwave isused as information.
This article reviews techniques for reducing thephase noise of tunable lasers. The required performance of the light source in digital coherent systems
is described, and the development status of an applicable tunable laser is reported. Moreover, narrowlinewidth operation is demonstrated in a widely tunable laser array with stable lasing characteristics.
2. Light sources in digital coherent systems
An intensity modulation/direct detection (IM/DD)
technique called on-off keying (OOK) is used in optical networks with a data rate of 10 Gbit/s or less. As
shown in Fig. 1(a), in OOK a data bit [1, 0] is allocated to the intensity of the light. The IM/DD method
is widely used because it has the simplest opticalcomponent configuration and the most cost-effective
method. However, it is difficult to use IM/DD for
long-haul transmission with a data rate over 10 Gbit/s
because of various limitations such as fiber dispersion, limited wavelength channel spacing, and the
speed limitations of electrical circuits. To avoid these
NTT Technical Review

Feature Articles

OOK

Q

1

0

1

00

01

1
0

I
(a)

01
3π/4

5π/4
00

Q

11
π/4

QPSK
11

I
7π/4
10

Constellation

Waveform(b)

Fig. 1. Modulation format for (a) OOK and (b) QPSK.
(Q axis: quadrature component, I axis: in-phasecomponent).

limitations, a phase-shift-keying/differential detection method is used in 40 Gbit/s systems, and a phaseshift-keying/digital coherent detection method will
be used in next-generation 100-Gbit/s systems. To
make best use of the limited wavelength resource, amultilevel modulation format is used in 100-Gbit/s
systems. Quadrature phase shift keying (QPSK) is afour-level modulation format. As shown in Fig. 1(b),four phase states [p/4, 3p/4, 5p/4, 7p/4] of the lightwave are allocated to two data bits [11, 01, 00, 10]. As
a result, the data rate is twice that of a binary modulation signal for the same baud rate. Polarization multiplexing is also used, so the data rate is doubled. Thus,
the four-level modulation format and polarization
multiplexing enable four 25-Gbaud signals to generate a 100-Gbit/s data signal. Since the baud rate issuppressed to only 25 Gbaud, the modulation spectrum bandwidth is also suppressed to less than 50
GHz. Therefore, this method can be introduced into a
DWDM system with a 50-GHz grid spacing. On thereceiver side, the phase state of the signal is detectedwith a coherent detection scheme, where the relative
phase of the signal is compared with the phase of a
local light source. And a polarization diversity technique is used for the signal polarization state. In digital coherent systems, a tunable laser is also used on
the receiver side.
In IM/DD systems, the phase noise of the laser is
not an issue because the phase is not used as information. On the other hand, it is a critical issue in digitalVol. 9 No. 3 Mar. 2011

coherent systems, as described below. In a digital
coherent receiver, the frequencies of the local andsignal lights should not be exactly the same. The frequency offset is compensated for in a digital signal
processor. Although this can compensate for lowspeed variations in the phase or frequency, it cannot
compensate for high-speed variations due to theintrinsic phase noise of the light sources. Therefore,
the phase noise characteristics of the light sources
have a great influence on system performance. The
spectral linewidth is often used as an index of theamount of phase noise. As shown in Fig. 2, when the
linewidth is sufficiently narrow, the phase state can beclearly detected in the constellation map. As the linewidth increases, the phase angle variation increases
and the phase state can no longer be identified. In a
100-Gbit/s system, a linewidth of 1 MHz or less isrequired for both the transmitter light source and the
local light source [2].
3. Widely wavelength tunable lasers
In the last ten years, various kinds of tunable lasers
have been developed, and their performance has been
greatly improved. A tunable laser consists of a semiconductor gain region and a wavelength-tunable optical filter. The wavelength is tuned by changing thefilter wavelength. Tunable lasers are classified into
three structural types: an external cavity laser [3], a
distributed feedback (DFB) laser array [4], and aFeature Articles

Constellation

Q

Q
Phase noise

I

I

Spectrum
Linewidth

Linewidth

Optical frequency

(a)

(b)

Optical frequency

Fig. 2. Influence of laser linewidth in coherent systems.

Table 1. Wavelength-tunable lasers.
Laser structure

Linewidth

External cavity laser Excellent
DFB laser array

Good

Mode-hop free, stable

DBR laser

Fair

Current tuning, high-speed switching

distributed Bragg reflector (DBR) laser [5]–[7]. Allof these laser structures provide a tuning range ofmore than 35 nm, which is required for DWDM systems. The features of the three lasers are summarizedin Table 1.
The external cavity laser consists of a gain chip andspatially separated external optical filters, which arepackaged into a compact optical module by using a
hybrid integration technique. This type can easily
provide a wide tuning range because optimum opticalfilters can be selected. For example, external cavity
lasers with thermally tunable silicon etalon filters
have been commercialized for use in tunable transceivers [8]. Generally, the cavity length is long, and anarrow linewidth of less than 100 kHz can be easily
achieved. This laser is a strong candidate for a lightsource for digital coherent systems. Its drawbacks arethat complex tuning control is needed to suppressmode hopping and that it has many optical parts.
The DFB laser array is based on the DFB laser,which has been widely used in commercial optical
networks for a long time. The tuning range is expanded by integrating DFB lasers of different wavelengths.
An excellent feature of this laser is its mode stability
and reliability owing to its mode-hop-free tuningFeatures
Hybrid integration

characteristics. Moreover, it is suited to mass production because it is a monolithic chip. Its drawback is its
slow wavelength tuning, which is achieved throughtemperature control. DFB array lasers are widelyused in current 10-Gbit/s systems. The linewidth ofthe conventional DFB laser is several megahertz.
However, a narrower linewidth can be obtained by
optimizing the cavity structure. Linewidth reductionof a DFB laser array is described in detail in the next
section.
A DBR laser is also a monolithic chip. The wavelength can be tuned by controlling the refractive
index of the semiconductor-based DBR. Generally,
the refractive index is changed by a carrier plasma
effect induced by current injection. Therefore, thetuning time is a short as a few nanoseconds. Its drawback is that the linewidth is increased when the tuning
current is injected. However, it has been reported thata DBR-type laser with heaters for temperature-based
wavelength tuning has a narrow linewidth even during wavelength tuning [9].
As described above, all three laser types have bothadvantages and disadvantages, and they will be usedaccording to the required application.

NTT Technical Review

Feature Articles

DFB-laser

CouplerSOA

DFB laser length

450 µm

900 µm

1500 µm

Fig. 3. Photographs of TLA chips with different laser lengths.

4. Narrow-linewidth tunable DFB laser array
We have developed a tunable DFB laser array(TLA) [10], [11] because stable mode characteristics
are a great advantage in photonic networks. We have
reduced its spectral linewidth, as described below, tomake it applicable to 100-Gbit/s systems.
The linewidth in semiconductor lasers is proportional to the ratio of the spontaneous emission noise
to the total photon number in the laser cavity [12]. In
general, the linewidth can be reduced because thetotal photon number increases if the laser cavity islengthened. We fabricated TLAs having longer-cavity
DFB lasers and confirmed the linewidth characteristics. Photographs of the TLA chips are shown in
Fig. 3. The TLA consists of an array of 12 DFB
lasers, a 12 × 1 multimode interference (MMI) optical coupler, and a semiconductor optical amplifier(SOA). The output light from each DFB laser is introduced into the MMI coupler through an S-bend waveguide, and the light from the MMI coupler is amplified by the SOA. The length of the SOA region is1200 µm. We fabricated three types of TLA with DFB
laser lengths of 450, 900, and 1500 μm. The three
types have the same structure except for the DFB
laser length. The DFB lasers and SOA have an active
layer composed of compressively strained multiple
quantum wells, which is designed to achieve low
threshold operation over a wide DFB laser temperature range. The passive waveguide regions consist ofan InGaAsP bulk layer with a bandgap wavelength of
1.3 μm. The waveguide was formed with a buried
heterostructure of p-n current blocking layers. A l/4Vol. 9 No. 3 Mar. 2011

shifted grating was formed on the DFB laser region
by electron beam lithography and wet etching todetermine the lasing wavelength precisely. The wavelengths of the lasers were initially set to roughly thosespecified in the ITU-T grid [13] with a spacing of 400
GHz by designing the grating pitch, which corresponds to wavelength tuning with a temperaturechange of 35ºC (ITU-T: International Telecommunication Union, Telecommunication Standardization
Sector). Therefore, the TLA can be operated at anarbitrary optical frequency within a range of 4.8 THz(= 12 × 400 GHz).
The TLA chip was packaged in a butterfly-type
pigtail module together with a wavelength locker.
The chip contained two thermoelectric coolers: onefor the laser and the other for the wavelength locker.
It also had two lenses for optical coupling and an
optical isolator. The optical coupling efficiency fromthe chip output to the fiber was about -2 dB. The spectral linewidth on the 97 frequency grids with a 50GHz spacing is shown in Fig. 4. To adjust the frequency on the ITU-T grid, we controlled the laser
temperature in the 15–50°C range. The current to the
SOA was controlled to maintain fiber output power of
20 mW (13 dBm). The three TLAs covered a frequency range of 4.8 THz. A side-mode suppression
ratio of more than 45 dB was obtained for all the frequency grids. We measured the spectral linewidthwith a delayed self-heterodyne method using a 5-km
single-mode fiber and a 150-MHz acoustic-optic
modulator. The linewidths of the TLAs with DFB
laser lengths of 450, 900, and 1500 μm were 1–3
MHz, 300–600 kHz, and 90–160 kHz, respectively.
Feature Articles

L=450 µm

L=900 µm

L=1500 µm

193,000

194,000

195,000

Spectral linewidth (kHz)

3000
2500
2000
1500
1000
500
0
191,000

192,000

196,000

197,000

Optical frequency (GHz)

Fig. 4. Spectral linewidth characteristics.

Thus, the linewidths improved with increasing cavity
length. The linewidth of a TLA with a DFB laser
length of 900 or 1500 μm is less than 1 MHz, whichmeets the requirement for a 100-Gbit/s system.
5. Conclusions
For the 100-Gbit/s system now being developed asa next-generation optical communication system, we
have developed a high-performance tunable laser
array with low phase-noise characteristics. Narrow
linewidth operation of 90–160 kHz was demonstratedusing a TLA with 1500-μm-long DFB lasers. In addition to the linewidth characteristics described here,
the tunable laser requires higher power, a wider tuning range, and lower power consumption. Researchand development will continue with the aim ofobtaining tunable lasers with even better performance.
References
[1]
[2]

[3]



J. Buus and E. J. Murphy, “Tunable Lasers in Optical Networks,”
IEEE J. Lightwave Technol., Vol. 24, No. 1, pp. 5–11, 2006.
M. Seimetz, “Laser Linewidth Limitations for Optical Systems with
High-order Modulation Employing Feed Forward Digital Carrier
Phase Estimation,” Proc. of the Opt. Fiber Commun. Conf., San
Diego, CA, USA, 2008, Paper OtuM2.
B. Pezeshki, E. Vail, J. Kubicky, G. Yoffe, S. Zou, J. Heanue, P. Epp,
S. Rishton, D. Ton, B. Garaji, M. Emanuel, X. Hong, M. Sherback, V.
Agrawal, C. Chipman, and T. Razazan, “20-mW Widely Tunable
Laser Module Using DFB Array and MEMS Selection,” IEEE Photon.

Technol. Lett., Vol. 14, No. 10, pp. 1457–1459, 2002.
H. Oohashi, Y. Shibata, H. Ishii, Y. Kawaguchi, Y. Kondo, Y. Yoshikuni, and Y. Tohmori, “46.9-nm Wavelength-selectable Arrayed DFB
Lasers with Integrated MMI Coupler and SOA,” Proc. of Tech. Dig.,
IPRM’2001, Nara, Japan, FBI-2, pp. 575–578.
[5] V. Jayaraman, Z. M. Chuang, and L. A. Coldren, “Theory, Design, andPerformance of Extended Tuning Range Semiconductor Lasers with
Sampled Gratings,” IEEE J. Quantum. Electron., Vol. 29, No. 6, pp.
1824–1834, 1993.
[6] P. -J. Rigole, S. Nilsson, L. Bäckbom, T. Klinga, J. Wallin, B. Stalnacke, E. Berglind, and B. Stoltz, “114-nm Wavelength Tuning Rangeof a Vertical Grating Assisted Codirectional Coupler Laser with aSuper Structure Grating Distributed Bragg Reflector,” IEEE Photon.
Technol. Lett., Vol. 7, No. 7, pp. 697–699, 1995.
[7] H. Ishii, H. Tanobe, F. Kano, Y. Tohmori, Y. Kondo, and Y. Yoshikuni,“Quasicontinuous Wavelength Tuning in Super-structure-grating(SSG) DBR Lasers,” IEEE J. Quantum Electron., Vol. 32, No. 3, pp.
433–441, 1996.
[8] M. Finot, M. McDonald, B. Bettman, J. Sell, A. Daiber, W. B. Chapman, and W. J. Kozlovsky, “Thermally Tuned External Cavity Laserwith Micromachined Silicon Etalons: Design, Process and Reliability,” Proc. of Electronic Components and Technology Conference
2004, pp. 1818–823, Las Vegas, NV, USA.
[9] T. Kaneko, Y. Yamauchi, H. Tanaka, T. Machida, T. Ishikawa, T. Fujii,
and H. Shoji, “High-power and Low Phase Noise Full-band Tunable
LD for Coherent Applications,” Proc. of Opt. Fiber Commun. Conf.,
San Diego, CA, 2010, Paper OWU7.
[10] C. H. Henry, “Theory of the Linewidth of Semiconductor Lasers,”
IEEE J. Quantum Electron., Vol. 18, No. 2, pp. 259–264, 1982.
[11] H. Oohashi, H. Ishii, K. Kasaya, and Y. Tohmori, “Low-power-consumption Module with Tunable DFB Laser Array (TLA),” NTT
Technical Review, Vol. 4, No. 5, 2006.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2006
05040.pdf[12] H. Ishii, K. Kasaya, and H. Oohashi, “Spectral Linewidth Reduction
in Widely Wavelength Tunable DFB Laser Array,” IEEE J. Sel. Topics
in Quantum Electron., Vol. 15, No. 3, pp. 514–520, 2009.
[13] http://www.itu.int/home/[4]

NTT Technical Review

Feature Articles

Hiroyuki Ishii

Research Group Leader, Senior ResearchEngineer, Supervisor, Optical Integrated Device
Research Group, Photonics Device Laboratory,NTT Photonics Laboratories.
He received the B.E., M.E., and Ph.D. degrees
in electronics and communication engineeringfrom Waseda University, Tokyo, in 1988, 1990,
and 1999, respectively. He joined NTT Optoelectronics Laboratories (now NTT Photonics
Laboratories) in 1990. Since then, he has been
engaged in developmental research on semiconductor lasers and integrated devices for opticalcommunications systems. He is a member of theJapan Society of Applied Physics (JSAP), theInstitute of Electronics, Information and Communication Engineers (IEICE), and the IEEE/
Photonics Society.

Hiromi Oohashi

Executive Manager, Photonics Device Laboratory, NTT Photonics Laboratories.
She received the B.S. degree in applied physics
from Waseda University, Tokyo, and the M.S.
and Ph.D. degrees in physical electronics from
Tokyo Institute of Technology in 1985, 1987, and2007, respectively. She joined NTT Basic
Research Laboratories in 1987 and engaged inresearch on optical nonlinear processes in semiconductor materials. Since moving to NTT Optoelectronics Laboratories in 1993, she has been
engaged in R&D related to the temperaturedependence and reliability of semiconductor
lasers. Her current research interests include thedevelopment of optical devices for WDM systems. She is a member of IEEE, JSAP, and
IEICE.

Kazuo Kasaya

Senior Research Engineer, Optical Integrated
Device Research Group, Photonics Device Laboratory, NTT Photonics Laboratories.
He received the B.E. degree in electronic engineering from Yamagata University and the M.S.
degree in electronic engineering from Hokkaido
University in 1985 and 1987, respectively. In
1987, he joined NTT Electrical Communications
Laboratories, where he engaged in research on
optical waveguides and waveguide devices basedon InP. Since 1987, he has been engaged inresearch on the characterization of epitaxial
InGaAsP/inP heterostructures, butt-joint selective growth techniques, and the fabrication ofsemiconductor optical waveguide devices. He
has focused on the modeling and measurement of
the semiconductor waveguides. He has also been
engaged in work on optical devices for WDM
systems.

Vol. 9 No. 3 Mar. 2011

Feature Articles: R&D of Optical Component Technologies
for 100-Gbit/s Digital Coherent Communications

Multilevel Optical Modulator
Utilizing PLC-LiNbO3 Hybridintegration Technology
Shinji Mino†, Hiroshi Yamazaki, Takashi Goh,and Takashi Yamada
Abstract

Multilevel optical modulators are key devices for optical transmission systems with transmission ratesof 100 Gbit/s and beyond. For such modulators, NTT Photonics Laboratories has developed hybrid-integration technology for silica planar lightwave circuits (PLCs) and LiNbO3 phase modulator arrays. This
makes possible various kinds of multilevel modulator featuring a compact size, low loss, and high scalability. We review our recent progress in PLC-LiNbO3 technology and describe some integrated multilevel modulators: 100-Gbit/s PDM-QPSK and post-100G OFDM-QPSK and 64QAM modulators(PDM: polarization-division multiplexing, QPSK: quadrature phase-shift keying, 100G: 100-Gbit/s,
OFDM: orthogonal frequency-division multiplexing, QAM: quadrature amplitude modulation).

1. Introduction
Future large-capacity wavelength-division-multiplexing (WDM) transmission systems will require
advanced spectrally efficient multilevel modulation
formats, such as N-level phase-shift keying (N-PSK),
N-level quadrature amplitude modulation (N-QAM),
and orthogonal frequency-division multiplexing(OFDM), combined with polarization-division multiplexing (PDM) [1]. High-level QAMs have been usedin the latest record-setting experiments: transmissionof 69.1 Tbit/s using PDM-16QAM [2], the highest
spectral efficiency (SE) for 100-Gbit/s/ch-class transmission of 9.0 bit/s/Hz with PDM-64QAM [3], andthe highest potential SE of 12.4 bit/s/Hz with PDM512QAM [4] (ch: channel). OFDM is promising not
only for achieving a high SE [5], but also for enablinga bandwidth-variable optical network for efficient useof the spectral resource [6].
To accomplish those advanced modulations, multilevel electronics, such as arbitrary waveform genera† NTT Photonics Laboratories
Atsugi-shi, 243-0198 Japantors or digital-to-analog converters, have been used inmany transmission experiments [3], [4], [7]. They let
us cover various modulation formats with a simple
optical setup. On the other hand, optical multilevelsignal syntheses, in which only binary electronics areused, have also been studied extensively [2], [5],[8]–[22]. Those schemes are promising for highspeed multilevel modulations because binary electronics pose fewer challenges for high-speed operation than multilevel electronics do [13], [15], [16].
In this article, we briefly review technologies for
optical multilevel-signal syntheses and describe ourrecent work on integrated multilevel optical modulators using a hybrid configuration of silica planar
lightwave circuits (PLCs) and LiNbO3 (LN) phasemodulators.
2. Optical multilevel-signal syntheses andintegrated optical modulators
There have been many studies in which multilevel
optical modulations are achieved with combinationsof simple commercially available modulators, such as
Mach-Zehnder modulators (MZMs), straight phase
NTT Technical Review

Feature Articles

PLC
LN
PLC

Straight-line
phase modulators
Couplers, filters, etc.

Fig. 1. PLC-LN structure.

modulators, and I/Q modulators with a dual-parallel
MZM configuration (I: in-phase component, Q:
quadrature component). By connecting those modulators in tandem and adjusting the amplitude of eachbinary driving signal to an appropriate value,
researchers have achieved multilevel modulations,such as 8PSK [8], 16APSK [9], [10], 8QAM [11],and 16QAM [11], with high baud rates (ASPK:
amplitude and phase key shifting).
Integrated multilevel modulators have also attracted
much attention [12]–[22]. The integration provides
two major advantages. First, the transmitter setup issignificantly smaller. Second, we can connect modulator components in parallel much more easily than in
the case of discrete modulators because integration
eliminates fiber connection, which causes opticalphase fluctuation. A parallel configuration enables us
to use superposed modulation, which was originallydemonstrated with high-speed microwave transmission [23]. Integrated modulators for 16QAM havebeen demonstrated with several configurations, suchas a quad-parallel MZM configuration fabricatedwith LN and PLCs [12], a five-arm configuration
with quad-parallel electro-absorption modulators
fabricated with InP [13], and a dual-parallel dual-tandem MZM configuration fabricated with LN [14].
In multilevel modulator design, it is worth exploiting a particular characteristic of MZMs. When the
MZM is driven in a push-pull condition with a signal
amplitude of 2Vp (binary PSK mode), the output
optical signal has smaller distortions in symbol levels
than the driving electrical signal. This is because theoutput optical field of the MZM varies sinusoidallywith the driving voltage [15]. For various modulation
formats, transmitter configurations with only 2Vp
MZMs have also been investigated [15], [16]. The
key to implementing those all-2Vp-MZM configurations is the integration of MZMs and high-quality
passive optics because accurate control of the relativeVol. 9 No. 3 Mar. 2011

optical amplitude and phase in each optical path isrequired.
To achieve such integrations with high performancelevels, we have been developing hybrid integration
technology for PLCs and LN phase modulators.
3. PLC-LN modulators
3.1 Basic structure and concept
The basic structure of a hybrid-integrated PLC-LN
modulator is shown in Fig. 1. We use an LN chip
containing an array of simple straight phase modulators and PLCs containing all the other circuit components, such as couplers and filters. This structure
combines the large electro-optic bandwidth of LN
and the excellent transparency and design flexibilityof PLCs. Another advantage is that this configuration
is highly scalable because we can increase the integration level by increasing the number of phasemodulator arrays in the LN chip and devising PLCs
with corresponding complexity. As shown in Fig. 2,
we have developed various modulators with increasing integration levels [17]–[22]. Each modulator circuit consists only of 2Vp MZMs and passive components. Below, we describe PLC-LN modulators basedon PDM-QPSK for 100 Gbit/s and based on OFDMQPSK and 64QAM for post-100G applications. We
also briefly describe a modulator with a selectable
modulation level for post-100G applications.
3.2 100-Gbit/s PDM-QPSK modulator
The configuration of the PDM-QPSK modulator[19] utilizing PLC-LN integration technology isshown in Fig. 3(a). Eight straight phase modulatorswith four high-speed signal electrodes in a Z-cut LN
chip and thirteen couplers in PLCs make up two
QPSK modulator circuits connected in parallel. In
addition, a polarization multiplexing circuit, consisting of a polarization rotator with a half-wavelengthFeature Articles

64QAM [20], [21]Selectable modulation level [22]Integration level

OFDM-QPSK [1], [5]PDM-QPSK [19]RZ-DQPSK [18]DQPSK [17]

2006

2008

2009

2010

Year

DQPSK: differential QPSK
RZ:
return-to-zeroFig. 2. PLC-LN hybrid modulators.
(a)
PLC-L

LN

QPSK1

PLC-R
XI

TM

HWP
TE

XQ

PBC

YI
YQ

QPSK2

TM

TM+TE

HWP: half-wavelength plate
PLC-L, PLC-R: left and right parts of the PLC
TE: transverse electric wave
TM: transverse magnetic wave(b)

100G PDM-QPSK Modulator

Fig. 3. ( a) Configuration and (b) photograph of 100-Gbit/s PDM-QPSK utilizing PLC-LN integration
technology. 100G denotes 100 Gbit/s. (package size: 118 mm x 13.5 mm x 7 mm)

plate, and a waveguide polarization beam combiner(PBC) are connected to their output. A PLC-type
PBC is a compact Mach-Zehnder interferometer(MZI) about 10 mm in length and has an excellent
polarization extinction ratio of greater than 25 dBover the whole C-band wavelength range [24]. A pho

tograph of this module is shown in Fig. 3(b). The
module package size is 118 mm × 13.5 mm × 7 mm.
Including the fiber boots on both sides, it is 131 mm
long, which approaches the smallest size ever reported.
Typical characteristics of a 100-Gbit/s PDM-QPSKNTT Technical Review

Feature Articles

3.3 OFDM-QPSK modulator
The configuration of the OFDM-QPSK modulator[1], [5] is shown in Fig. 6. The modulator integrates a
PLC interleave filter, two QPSK modulation circuits,each with a dual-parallel MZM configuration, and an
output coupler. The input light for this modulator
consists of two subcarriers, which can be generated
by using another MZM driven with a clock signal.
The subcarriers are separated by the interleave filter
and modulated by different QPSK modulation circuits. The two QPSK signals are finally coupled andthe modulator outputs a two-subcarrier OFDMQPSK signal. The baud rate of the modulation, whichis equal to the frequency spacing between the subcarriers, is 13.9 Gbaud.
The spectrum of a 111-Gbit/s PDM-OFDM-QPSK
signal generated with the modulator and an external
PDM circuit is shown in Fig. 7. The signal bandwidthis 42 GHz, which is 1.5 times the baud rate and narrow enough for 50-GHz-grid WDM transmission.
Using this modulator, we achieved 13.5-Tbit/s (135 ×
111-Gbit/s/ch) WDM transmission over a distance of
7209 km [1], [5].

Table 1. Typical characteristics and target specificationsof a 100-Gbit/s PDM-QPSK modulator.
Parameter

Achieved value Target value

Insertion loss

8.7 dB< 14 dB

Polarization division loss
Optical return loss

0.1 dB> 35 dB< 1.5 dB
> 30 dB

Extinction ratio: parent MZIchild MZI> 46 dB> 22 dB

Polarization extinction ratio> 25 dB
31 dB> 20 dB> 20 dB

Electro-optical bandwidth> 27 GHz> 23 GHz

RF port Vπ @ 32 Gbaud< 3.5 V< 3.5 V

RF: radio frequency

3
XI
XQ
YI
YQ

0
S21 (dBe)

modulator are listed in Table 1. The overall opticalinsertion loss of our PDM-QPSK modulator is 8.7 dB
at a wavelength of 1.55 μm including a polarization
division intrinsic loss of 3 dB. The modulator’s frequency response is shown in Fig. 4. XI, XQ, YI, andYQ correspond to the four MZMs shown in Fig.
3(a).
The modulator has an electro-optic 3-dB bandwidthof more than 27 GHz. The driving voltage was lessthan 3.5 V at 32 Gbit/s. The measured eye pattern fora driving voltage of 3.0 V when the modulator was
driven with 32-Gbit/s non-return-to-zero 231-1 pseudorandom bit sequences in a back-to-back setup is
shown in Fig. 5. Clear eye opening was obtained inthis experiment. The Optical Internetworking Forum(OIF) standardized a 100-Gbit/s integrated modulator
in April 2010 [25]. Our 100-Gbit/s PDM-QPSK
modulator complies with the target specifications.

−3

−6

−9

0

10

20

30

40

Frequency (GHz)

Fig. 4. Frequency response.

Fig. 5. Measured eye pattern.

3.4 64QAM modulator
The configuration of the 64QAM modulator [20],[21] is shown in Fig. 8. Three QPSK modulation
circuits, each consisting of dual-parallel MZMs, areconnected in parallel by a pair of PLC asymmetric1×3/3×1 splitter/combiners, each with a power splitting/combining ratio of 4:2:1. These asymmetric circuits were designed using the wavefront-matching
method, which lets us optimize the waveguide patternVol. 9 No. 3 Mar. 2011

on the basis of the desired splitting/combining ratio.
PLC variable optical attenuators enable fine tuning of
the power ratio. The 64QAM signal is synthesized bycoupling the three QPSK signals with a field-amplitude ratio of 4:2:1 (power ratio of 16:4:1). The module has a small overall optical insertion loss of 5.5 dB,
Feature Articles

3.5 Selectable-modulation-level modulator
We also developed a selectable-modulation-level
modulator that lets us select QPSK, 8PSK, 8QAM, or
16QAM [22], [26]. This modulator was devised foruse in optical networks with a flexible modulation
format, which have become the focus of attention inrecent years [6]. In this modulator, we can flexibly
and adaptively select a suitable multilevel modulation
scheme taking account of the transmission condition.

13.9 GHz

PLC-L(38.0 mm × 8.4 mm)

LN(63.7 mm × 6.1 mm)

PLC-R(28.0 mm × 8.4 mm)

QPSK1
ILF

QPSK2
ILF: interleave filter

Fig. 6. Configuration of the OFDM-QPSK modulator.

Optical intensity (dB)as well as a broad electro-optic bandwidth of >25
GHz.
By driving the modulator with six 20-Gbaud binary
data signals and using an external PDM circuit, we
generated a 240-Gbit/s PDM-64QAM signal [20].
The signal was received with a coherent receiverusing a pilotless demodulation algorithm in an offline
digital signal processor. The constellations obtainedwith a back-to-back intradyne setup are shown in
Fig. 9. The 64 signal points are clearly distinguished.
The bit-error rate was better than 1.3 × 10-2. Thus, we
successfully demonstrated the record bit rate of 240
Gbit/s for PDM-64QAM using the modulator.

42 GHzFrequency (20 GHz per tick)Fig. 7. O ptical signal spectrum of 111-Gbit/s PDM-OFDMQPSK signals.

4. Conclusion
We have developed PLC-LN hybrid integration
technology for advanced multilevel modulators. Utilizing this technology, we have demonstrated various
advanced multilevel modulators, such as a PDMQPSK modulator for 100 Gbit/s and an OFDMQPSK modulator, a 64QAM modulator, and a selectable-modulation-level modulator for post-100G
applications. Each modulator shows excellent characteristics in terms of compact size and low insertion
optical loss and a practical level of optical loss andelectro-optic bandwidth. This technology is promising for optical transmission systems with channel
rates of 100 Gbit/s/ch and beyond and a transfer rate
well above 10 Tbit/s and for future optical networks.

PLC-L
LN
PLC-R
(14 mm × 7 mm) (64 mm × 6 mm) (34 mm × 7 mm)
QPSK1
4:3

QPSK2

VOA1
4:3

VOA2
2:1

2:1
VOA3
QPSK3

VOA: variable optical attenuator

Fig. 8. Configuration of the 64QAM modulator.

X-polarization

Y-polarization

Acknowledgments
This work is partly supported by the R&D projects
on “High-speed Optical Transport System Technologies” and “High-speed Optical Edge Node Technologies” of the Ministry of Internal Affairs and Communications (MIC) of Japan.

Fig. 9. Constellations of 240-Gbit/s PDM-64QAM signal.

NTT Technical Review

Feature Articles

References[1]

Y. Miyamoto and S. Suzuki, “Advanced Optical Modulation andMultiplexing Technologies for High-capacity OTN Based on 100
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[2] A. Sano, H. Masuda, T. Kobayashi, M. Fujiwara, K. Horikoshi, E.
Yoshida, Y. Miyamoto, M. Matsui, M. Mizoguchi, H. Yamazaki, Y.
Sakamaki, and H. Ishii, “69.1-Tb/s (432 × 171-Gb/s) C- and Extended
L-Band Transmission over 240 km Using PDM-16-QAM Modulation
and Digital Coherent Detection,” Proc. of OFC/NFOEC2010, paper
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[3] A. Sano, T. Kobayashi, A. Matsuura, S. Yamamoto, S. Yamanaka, E.
Yoshida, Y. Miyamoto, M. Matsui, M. Mizoguchi, and T. Mizuno,“100 × 120-Gb/s PDM 64-QAM Transmission over 160 km Using
Linewidth-tolerant Pilotless Digital Coherent Detection,” Proc. of
ECOC2010, paper PD2.4, Torino, Italy.
[4] S. Okamoto, K. Toyoda, T. Omiya, K. Kasai, M. Yoshida, and M.
Nakazawa, “512 QAM (54 Gbit/s) Coherent Optical Transmission
over 150 km with an Optical Bandwidth of 4.1 GHz,” Proc. of
ECOC2010, paper PD2.3, Torino, Italy.
[5] H. Masuda, E. Yamazaki, A. Sano, T. Yoshimatsu, T. Kobayashi, E.
Yoshida, Y. Miyamoto, S. Matsuoka, Y. Takatori, M. Mizoguchi, K.
Okada, K. Hagimoto, T. Yamada, and S. Kamei, “13.5-Tb/s (135 ×
111-Gb/s/ch) No-Guard-Interval Coherent OFDM Transmission over
6,248 km using SNR Maximized Second-order DRA in Extended Lband,” Proc. OFC/NFOEC’09, paper PDPB5, San Diego, CA, USA.
[6] H. Takara, B. Kozicki, Y. Sone, T. Tanaka, A. Watanabe, A. Hirano, K.
Yonenaga, and M. Jinno, “Distance-adaptive Super-wavelength Routing in Elastic Optical Path Network (SLICE) with Optical OFDM,”
Proc. of ECOC2010, paper We.8.D.2, Torino, Italy.
[7] S. Yamanaka, T. Kobayashi, A. Sano, H. Masuda, E. Yoshida, Y. Miyamoto, T. Nakagawa, M. Nagatani, and H. Nosaka, “11 × 171 Gb/s
PDM 16-QAM Transmission over 1440 km with a Spectral Efficiencyof 6.4 b/s/Hz using High-Speed DAC,” Proc. of ECOC2010, paper
We.8.C.1, Torino, Italy.
[8] S. Tsukamoto, D. –S, Ly-Gagnon, K. Katoh, and K. Kikuchi, “Coherent Demodulation of 40-Gbit/s Polarization-multiplexed QPSK Signals with 16-GHz Spacing after 200-km Transmission,” Proc. of
OFC’05, paper OThR5, Los Angeles, CA, USA.
[9] K. Sekine, N. Kikuchi, S. Sasaki, S. Hayase, C. Hasegawa, and T.
Sugawara, “40 Gbit/s, 16-ary (4 bit/symbol) Optical Modulation/
demodulation Scheme,” Electron. Lett., Vol. 41, No. 7, pp. 430–432,
2005.
[10] M. Seimetz, L. Molle, M. Gruner, D. -D. Gross, and R. Freund,“Transmission Reach Attainable for Single-Polarization and PolMux
Coherent Star 16QAM Systems in Comparison to 8PSK and QPSK at
10Gbaud,” Proc. OFC/NFOEC’09, paper OTuN2, San Diego, CA,USA.
[11] J. Yu and X. Zhou, “Ultra-high-capacity DWDM Transmission System for 100G and Beyond,” IEEE Commun. Mag., Vol. 48, No. 3, pp.
S56–S64, 2010.
[12] T. Sakamoto, A. Chiba, and T. Kawanishi, “50-Gb/s 16 QAM by aquad-parallel Mach-Zehnder modulator,” Proc. of ECOC2007, paper
PDS2.8, Berlin, Germany.

Vol. 9 No. 3 Mar. 2011[13] C. R. Doerr, P. J. Winzer, L. Zhang, L. Buhl, and N. J. Sauer, “Monolithic InP 16-QAM Modulator,” Proc. of OFC/NFOEC2008, paper
PDP20, San Diego, CA, USA.
[14] Guo-Wei Lu, T. Sakamoto, A. Chiba, T. Kawanishi, T. Miyazaki, K.
Higuma, M. Sudo, and J. Ichikawa, “16-QAM Transmitter Using
Monolithically Integrated Quad Mach-Zehnder IQ Modulator,” Proc.
of ECOC2010, paper Mo.1.F.3, Torino, Italy.
[15] N. Kikuchi, “Intersymbol Interference (ISI) Suppression Techniquefor Optical Binary and Multilevel Signal Generation,” J. Lightwave
Technol., Vol. 25, No. 8, pp. 2060–2068, 2007.
[16] T. Sakamoto, A. Chiba, and T. Kawanishi, “High-bit-rate Optical
QAM,” Proc. of OFC/NFOEC’09, paper OWG5, San Diego, CA,USA.
[17] T. Yamada, Y. Sakamaki, T. Saida, A. Kaneko, A. Sano, and Y. Miyamoto, “86-Gbit/s Differential Quadrature Phase-shift-keying Modulator Using Hybrid Assembly Technique with Planar Lightwave Circuitand LiNbO3 Devices,” Proc. of LEOS2006, paper ThDD4, Montreal,
Quebec, Canada.
[18] T. Yamada, Y. Sakamaki, T. Shibata, A. Kaneko, A. Sano, and Y. Miyamoto, “Compact 111-Gbit/s Integrated RZ-DQPSK Modulator Using
Hybrid Assembly Technique with Silica-based PLCs and LiNbO3
Devices,” Proc. of OFC/NFOEC2008, paper OThC3, San Diego, CA,USA.
[19] H. Yamazaki, T. Yamada, K. Suzuki, T. Goh, A. Kaneko, A. Sano, E.
Yamada, and Y. Miyamoto, “Integrated 100-Gb/s PDM-QPSK Modulator Using a Hybrid Assembly Technique with Silica-based PLCs and
LiNbO3 Phase Modulators,” Proc. of ECOC2008, paper Mo.3.C.1,
Brussels, Belgium.
[20] A. Sano, T. Kobayashi, K. Ishihara, H. Masuda, S. Yamamoto, K.
Mori, E. Yamazaki, E. Yoshida, Y. Miyamoto, T. Yamada, and H.
Yamazaki, “240-Gb/s Polarization-multiplexed 64-QAM Modulation
and Blind Detection Using PLC-LN Hybrid Integrated Modulator andDigital Coherent Receiver,” Proc. of ECOC2009, paper PD2.2, Vienna, Austria.
[21] H. Yamazaki, T. Yamada, T. Goh, Y. Sakamaki, and A. Kaneko,“64QAM Modulator with a Hybrid Configuration of Silica PLCs and
LiNbO3 Phase Modulators,” Photon. Technol. Lett., Vol. 22, No. 5, pp.
344–346, 2010.
[22] H. Yamazaki, T. Goh, A. Mori, and S. Mino, “Modulation-levelselectable Optical Modulator with a Hybrid Configuration of Silica
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We.8.E.1, Torino, Italy.
[23] K. Miyauchi, S. Seki, and H. Ishio, “New Technique for Generatingand Detecting Multilevel Signal Formats,” IEEE Trans. Commun.,Vol. 24, No. 2, pp. 263–267, 1976.
[24] T. Mizuno, T. Goh, T. Ohyama, Y. Hashizume, and A. Kaneko, “Integrated In-band OSNR Monitor Based on Planar Lightwave Circuit,”
Proc. of ECOC2009, paper 7.2.5, Vienna, Austria.
[25] Optical Internetworking Forum (OIF):
http://www.oiforum.com/public/documents/ OIF-PMQ-TX-01.0.pdf.
[26] H. Yamazaki and T. Goh, “Flexible-format Optical Modulators with a
Hybrid Configuration of Silica Planar Lightwave Circuits and LiNbO3Phase Modulators,” NTT Technical Review, Vol. 9, No. 4, 2011 (to be
published).

Feature Articles

Shinji Mino

Senior Research Engineer, Supervisor, Photonics Integration Laboratory, NTT Photonics Laboratories.
He received the B.Sc. degree in chemistry fromWaseda University, Tokyo, in 1986 and the M.Sc.
degree in chemistry and Ph.D. degree in electronic engineering from the University of Tokyoin 1988 and 1996, respectively. He joined NTT
Opto-Electronics Laboratories (now NTT Photonics Laboratories) in 1988. From 1993, he wasengaged in research on the hybrid integration ofvarious active optical devices and electronic ICs,
focusing particularly on the use of high-frequency circuits in silica PLCs. His researchinterests include various types of PLC hybrid
integration for optical active devices and electronic ICs, such as liquid crystal devices, LiNbO3
modulators, and optical semiconductor devices,such as photodiodes and laser diodes. He is asenior member of IEEE LEOS and the Instituteof Electronics, Information and Communication
Engineers (IEICE), and a member of the Japan
Society of Applied Physics (JSAP).

Hiroshi Yamazaki

Research Engineer, Photonics Integration
Laboratory, NTT Photonics Laboratories.
He received the B.S. degree in integrated
human studies and M.S. degree in human andenvironmental studies from Kyoto University in2003 and 2005, respectively. In 2005, he joined
NTT Photonics Laboratories, where he engaged
in research on optical waveguide devices forcommunication systems. His current researchinterests include devices and systems for opticaltransmission using advanced multilevel modulation formats. He is a member of IEICE.



Takashi Goh

Senior Research Engineer, Photonics Integration Laboratory, NTT Photonics Laboratories.
He received the B.S. and M.S. degrees in electronic and communication engineering fromWaseda University, Tokyo, in 1991 and 1993,
respectively. In 1993, he joined the NTT Optoelectronics Laboratories (now Photonics Laboratories), where he engaged in research on silicabased PLCs including thermo-optic switches,
arrayed-waveguide grating multiplexers, multidegree reconfigurable add-drop multiplexers,
and advanced modulators. From 2002 to 2004, he
was engaged in photonic network development
such as ROADM ring systems in NTT Innovation
Laboratories. He is a member of IEICE andJSAP.

Takashi Yamada

Senior Research Engineer, Photonics Integration Laboratory, NTT Photonics Laboratories.
He received the B.E. and M.E. degrees fromTohoku University, Miyagi, in 1994 and 1996,
respectively. In 1996, he joined NTT Opto-electronics Laboratories (now Photonics Laboratories). Since 2001, he has been engaged inresearch on high-speed optical functional modulators using a hybrid-assembly technique for silica-based PLCs and LN phase modulators. He isa member of IEICE.

NTT Technical Review

Feature Articles: R&D of Optical Component Technologies
for 100-Gbit/s Digital Coherent Communications

100-Gbit/s Optical Receiver
Front-end Module Technology
Ikuo Ogawa†, Takaharu Ohyama, Hiromasa Tanobe,
Ryoichi Kasahara, Satoshi Tsunashima, Yohei Sakamaki,
and Hiroto Kawakami
Abstract

We have been developing a 100-Gbit/s-class optical receiver front-end module with a hybrid integration structure using silica-based planar lightwave circuit technology to perform demultiplexing anddemodulation in digital coherent photonic network systems. In this article, we describe the module structure and the integration technology that we have developed at NTT Photonics Laboratories.

1. Configuration of digital coherent receiver
Digital coherent communication technology, which
is based on techniques for multilevel phase modulation and digital coherent reception, is being studied asa way to achieve ultrahigh-speed photonic networks
with a bit rate of 100 Gbit/s or more per channel.
Among several reported modulation formats andmultiplexing techniques, polarization division multiplexed quadrature phase shift keying (PDM-QPSK)*1
is promising for spectral efficiency and resistance tovarious types of dispersion, and it is being developed
intensively.
The basic configuration of the PDM-QPSK digital
coherent receiver is shown in Fig. 1 [1]. The receiveris composed of an optical front-end (FE), which
includes components from the optical input section to
the transimpedance amplifiers (TIAs), analog-todigital converters (ADCs), and a digital signal processor (DSP).
The optical receiver FE consists of an optical signal
processing section with a polarization beam splitter(PBS), a beam splitter (BS), and two 90° opticalhybrid mixers and an optical-to-electrical (OE) conversion section with eight photodiodes (PDs) and
four TIAs. With this receiver FE, the input PDM† NTT Photonics Laboratories
Atsugi-shi, 243-0198 Japan

QPSK-modulated signal light is separated into
orthogonal polarization components (X/Y polarizedwaves) and orthogonal phase components (I/Q channels; I: in-phase component, Q: quadrature component), which are converted into four high-speed differential electrical signals and output.
The optical receiver FE has functions for opticaldomain signal processing and OE conversion and iscomposed of many optical/electrical components.
This creates a need for high-density and well-controlled fabrication techniques for optoelectronic integration.
2. Fabrication issues and approaches
for optical receiver FE
Compared with conventional intensity modulation
direct detection methods, the digital coherent opticalreceiver FE requires more-sophisticated functionality. This is because precise and stable optical signal
processing is required to separate the X/Y and I/Q
components, and the phase and amplitude of theseparated signals must be preserved in the connection
from the optical stage to the electrical stage in orderto achieve the required receiver performance. However,*1	 PDM-QPSK: A type of phase modulation for digital signals. Twobits of data are allocated using four phase modulations on each of
the TE- and TM-polarized lights.

NTT Technical Review

Feature Articles

Optical receiver FE
PD
SignalPBS

90°
opticalhybrid

XI

TIA

ADC

XQ

TIA

ADC
DSP

Local
TLA

BS

90°
opticalhybrid

YI

TIA

ADC

YQ

TIA

ADC

PLC-DPOH

OE

DPOH: dual-polarization optical hybrid
TLA: tunable laser array

Electronic
devices

Electricalsignals

Opticaldevices

OpticalsignalsFig. 1. Configuration of digital coherent receiver.

in conventional technologies using multiple opticalfibers interconnecting individual devices, it is difficult to consistently control the optical phase and differential delay between fibers. In other words, implementation of the signal processing from the opticalstage through to the electrical stage in a stable integrated circuit has been a critical issue for achieving apractical, digital coherent optical receiver FE andobtaining the required receiver performance.
At NTT Photonics Laboratories, we are developing
basic techniques for hybrid integration using silicabased planar lightwave circuits (PLCs). We have successfully fabricated an integrated optical receiver FE
module incorporating all the required functions,
including a PBS, in a single package [2].
3. Module structure of integrated opticalreceiver FE and developed techniquesage. A cross-section of the structure near the opticalconnection between the PLC and OE subassembly isillustrated in Fig. 3. The multiport optical connection
between the PLC output ends and the PD array
mounted in the OE subassembly is implemented witha micro optic system using a micro-lens array and 90°
folding mirror. The power supply and electrical control and signal-output lines are all connected to an
external board by flexible printed circuit boards. The
module size is 27 × 50 × 6 mm3. The hybrid integration structure lets us use appropriate devices with
optimal materials and structures for both the opticalsignal processing and OE conversion sections,enabling us to achieve compact integration while
maintaining maximal performance and reliability forthe module as a whole.
Below, we give an overview of the elemental technologies developed for this integration.

A photograph of the integrated optical receiver FE
module with the upper cover removed is shown in
Fig. 2. The FE is composed of optical signal processing circuits and the OE sub-assembly. We integrated
the optical signal processing section including PBS,
BS, and two 90° optical hybrid mixers in a singlechip PLC. The OE sub-assembly contains PD and
TIA arrays in a compact, hermetically sealed pack-3.1 D
 igital coherent optical receiver circuit integrated on a single silica PLC chip
The optical signal processing required on the optical receiver FE needs stable and highly accurate control of optical phase and interference. To achieve this,we designed a single-chip PLC integrating two PBSs
and two 90° optical hybrids [3]. We call this circuit adual-polarization optical hybrid (DPOH). The circuit

Vol. 9 No. 3 Mar. 2011

Feature Articles

Input fiber

Micro collimator
optics

PLC-DPOH

10 mm

OE sub-assembly(behind metal plate)

Flexible printed circuit board

Fig. 2. Integrated optical receiver front-end module.

PLC(DPOH)

Collimator optics

1st lens

OE sub-assembly

MirrorSapphire window

2nd lens

TIA array

Window
OE subassembly

TIA
YQ

Metal
package

PD Heatsink

PD array

Ceramic
package

Flexibleprintedcircuitboard

Fig. 3. Integration structure.

configuration is shown in Fig. 4. The PBS consists ofa Mach-Zehnder interferometer *2 with grooves
formed near one waveguide arm, giving a phase difference of p to the orthogonal polarized waves [4].
This configuration yields a PBS that outputs TEpolarized light from the cross port and TM-polarized
light from the through port (TE: transverse electric,
TM: transverse magnetic).
The 90° hybrid is structured with optical waveguides arranged to interlace with optical couplers,and 2 × 2 multi-mode interference (MMI) couplers
are used. There are various kinds of waveguide-type
optical hybrids, such as a slab coupler [5] and a 4 × 4
MMI coupler [6], but this circuit with the interlaced
optical-coupler has the benefits of achieving both low
loss and orthogonality (phase difference of 90°).
For the DPOH, important performance indexes are
the polarization extinction ratio in the PBS, orthogonality in the optical hybrid, and losses and deviations.
The fabricated DPOH exhibited excellent results forthese: we measured excess loss of less than 2.5 dB,
loss deviations of less than 0.2 dB, and a polarization
extinction ratio greater than 25 dB. As shown in
Fig. 5, good values for orthogonality were also
obtained: less than ±1° over the wide wavelength
range from 1520 nm to 1620 nm.

*2 Mach–Zehnder interferometer: An optical circuit configurationthat uses interference between two optical paths to change thelight intensity.

NTT Technical Review

Feature Articles

PBS

90° optical hybridTM

Signal light

#1
#2
...

Local
oscillator light

#7
#8

TE

Input
CouplerThrough
Coupler

90°

Cross

90°

Groove

90°

90°

90°
: 2 x 2 MMI coupler

PBS

90° optical hybrid

Phase difference (degrees)Fig. 4. Circuit configuration of dual polarization optical hybrid (DPOH).

5
4
3
2
1
0
–1
–2
–3

TE
TM

–4
–5
1520

1540

1560

1580

1600

1620

Wavelength (nm)Fig. 5. Phase difference of fabricated DPOH.

3.2 C
 ompact, hermetically sealed OE subassembly
The optical-receiver-FE’s OE-conversion section
requires high reliability and high-speed operation forreceiving 100-Gbit/s-class PDM-QPSK signals.
Moreover, for hybrid integration, an optical interface
for multi-port optical connection to the optical waveguides is required. We have developed a compact,
hermetically sealed OE sub-assembly that meetsthese requirements.
The OE sub-assembly consists of a layered alumiVol. 9 No. 3 Mar. 2011

na-ceramic cavity in which the two-channel dual-PD
and two-channel TIA arrays are assembled (Fig. 3).
The high-frequency signal lines and power/control
electrical wiring are also formed on the ceramic layer.
The upper surface of the cavity is hermetically sealed
by a sapphire window and AuSn solder. The size ofthe fabricated OE subassembly is 8.2 × 9.2 × 1.4 mm3.
We confirmed that the high-frequency signal lines on
this package have a 3-dB transmission bandwidth of
more than 40 GHz. The sapphire window provides
the hermetic seal required to ensure reliability of the
InP semiconductor device while also functioning as
the optical interface: it provides an optical window
and a fixed surface for the optical connection to external devices. This structure allows us to obtain efficient multi-port optical connections between incident
lights and the PD array by using a micro-lens array.
3.3 M
 ulti-port optical connection using microlens array
The optical connection between the DPOH and PD
must be small in size and have low losses and stability with respect to fluctuations in ambient temperature. To achieve this, we chose to use a micro collimated optical system using a micro-lens array. The
first lens is at the PLC’s output facet and the second
lens is on the surface of the sapphire window of theOE sub-assembly; these lenses were fixed with

Feature Articles

0.5
Difference between
differential PD ports < 0.4 dB

0.08

Responsivity variation (dB)

Responsivity (A/W)

0.10

0.06
0.04
0.02
0.00

1

2

3

4 5
PDs

6

7

#1
#3
#5
#7

0.4
0.3
0.2
0.1

< ± 0.25 dB

0.0
–0.1
–0.2
–0.3
–0.4
–0.5
–20

8

#2
#4
#6
#8

0

20

40

60

80

100

Temperature (ºC)

Fig. 6. Responsivity of fabricated optical receiver FE
module.

Fig. 7. Relationship between responsivity and temperature.

14
X channel

–1

0

1

2
1.5
1
0.5
0
–0.5
–1
–1.5
–2
–2
2

Y channel–1

X channel

13

Q-factor (dB)

2
1.5
1
0.5
0
–0.5
–1
–1.5
–2
–2

Y channel

12
11
10
9

0

1

2
8
12

13

14

15

16

17

18

19

20

21

OSNR (dB) (Resolution: 0.1 nm)(a) Constellation(b) Relationship between Q-factor and OSNR

Fig. 8. Receiver characteristics for 112-Gbit/s PDM-QPSK signal.

ultraviolet-curable adhesive. We used a mirror
between the two lenses to change the optical axis of
the light emitted from the PLC by 90° and inject it
into the PD. With this structure, we achieved an
extremely compact optical connection with an optical
path length of only about 2.5 mm.
In designing the optical system, it is important toensure a wide tolerance so as to avoid PD responsivity degradation and port-to-port deviation, even when
the positions of the PLC output ends and PDs shift
owing to ambient temperature variation. For the fabricated receiver FE module, the maximum opticalmisalignment caused by differences in thermal
expansion coefficients across the operating temperature range of -5 to 80°C was estimated to be ±5 μm,
so the module was designed to handle this. The measured tolerance of the designed micro collimator
optics system was more than ±10 μm for a 0.2-dBdown width, ensuring sufficient tolerance for theoperating temperature range.
4. Characteristics of fabricated
PDM-QPSK coherent receiver FE module
The measured responsivity for all ports on the fabricated receiver FE module is shown in Fig. 6. It
includes the sensitivity characteristics of the PDs
themselves as well as an intrinsic loss of 9 dB fromNTT Technical Review

Feature Articles

the DPOH. Besides these, excess losses caused by the
optical system were estimated to be 0.4 dB, and the
responsivity deviation between adjacent PDs was lessthan 0.4 dB, so we achieved good optical connection
performance in terms of both losses and deviation.
The relationship between ambient temperature andresponsivity is shown in Fig. 7. The responsivity
variation was less than ±0.25 dB in the operating
temperature range of -5 to 80°C.
Next, we tested the receiver operation for a 112Gbit/s PDM-QPSK signal. The constellation plot andrelationship between optical signal-to-noise ratio(OSNR) and Q-factor are shown in Fig. 8. These
results confirm stable operation as a 100-Gbit/s-classoptical receiver FE.
5. Future plans
We plan to make further improvements to the key
device technology such as PLC, PD, and TIA, andtheir integration technology. We will also expand
their applications in next-generation optical integration modules needed for 100-Gbit/s-class-and-higher
multilevel-modulation optical transmission systems.
Acknowledgmentson “High-speed Optical Transport System Technologies” and “High-speed Optical Edge Node Technologies” of the Ministry of Internal Affairs and Communications (MIC) of Japan.
References
[1]
[2]

[3]

[4]

[5]

[6]

http://www.oiforum.com/public/documents/OIF_DPC_RX-01.0.pdf
T. Ohyama, I. Ogawa, H. Tanobe, R. Kasahara, S. Tsunashima, T.
Yoshimatsu, H. Fukuyama, T. Itoh, Y. Sakamaki, Y. Muramoto, H.
Kawakami, M. Ishikawa, S. Mino, and K. Murata, “All-in-one 100Gbit/s DP-QPSK Coherent Receiver Using Novel PLC-based Integration Structure with Low-loss and Wide-tolerance Multi-channel
Optical Coupling,” Proc. of OECC 2010, PD6, Sapporo, Japan.
Y. Sakamaki, H. Yamazaki, T. Mizuno, T. Goh, Y. Nasu, T. Hashimoto,
S. Kamei, K. Hattori, H. Takahashi, T. Kobayashi, and M. Ishikawa,“Dual polarisation optical hybrid using silica-based planar lightwave
circuit technology for digital coherent receiver,” Electron. Lett., Vol.
46, No. 1, pp. 58–60, 2010.
Y. Hashizume, R. Kasahara, T. Saida, Y. Inoue, and M. Okano, “Integrated Polarisation Beam Splitter Using Waveguide Birefringence
Dependence on Waveguide Core Width,” Electron. Lett., Vol. 37, No.
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Cappuzzo, A. Wong-Foy, E. Y. Chen, and L. T. Gomez, “Monolithic
Demodulator for 40-Gb/s DQPSK Using a Star Coupler,” J. of Lightwave Technol., Vol. 24, No. 1, pp. 171–174, 2006.
H. -G. Bach, A. Matiss, C. C. Leonhardt, R. Kunkel, D. Schmidt, M.
Schell, and A. Umbach, “Monolithic 90° Hybrid with Balanced PIN
Photodiodes for 100 Gbit/s PM-QPSK Receiver Applications,” Proc.
of OFC2009, OMK5, San Diego, CA, USA.

This work is partly supported by the R&D projects

Vol. 9 No. 3 Mar. 2011

Feature Articles

Ikuo Ogawa

Satoshi Tsunashima

Senior Research Engineer, Photonics Integration Laboratory, NTT Photonics Laboratories.
He received the B.S. and M.S. degrees inapplied physics from Waseda University, Tokyo,
in 1990 and 1992, respectively. In 1992, hejoined NTT Opto-electronics Laboratories. Since
then, he has been engaged in R&D of silicabased PLCs and hybrid integrated optical devices. He is a member of the Institute of Electronics,
Information and Communication Engineers(IEICE), the Japan Society of Applied Physics(JSAP), and the IEEE Photonics Society.

Research Engineer, High-speed Devices andTechnology Laboratory, NTT Photonics Laboratories.
He received the B.S. and M.S. degrees in electrical engineering from Toin University of Yokohama, Kanagawa, in 1996 and 1998, respectively.
In 1998, he joined NTT Optical System Laboratories, Yokosuka. His interests include highspeed circuits and modules for optical communications systems. He is a member of IEEE and
IEICE.

Takaharu Ohyama

Yohei Sakamaki

Senior Research Engineer, Photonics Integration Laboratory, NTT Photonics Laboratories.
He received the B.E. degree from Kyushu
Institute of Technology, Fukuoka, in 1992 andthe M.E. degree from Kyushu University, Fukuoka, in 1994. Since joining NTT Opto-electronics
Laboratories, Ibaraki, in 1994, he has been
engaged in research on hybrid integration in silica-based PLCs and semiconductor devices. He isa member of IEICE.

Hiromasa Tanobe

Senior Research Engineer, Photonics Integration Laboratory, NTT Photonics Laboratories.
He received the B.E. degree in physics from
Tokyo University of Science in 1989 and the
M.E. and Ph.D. degrees in electronics from
Tokyo Institute of Technology, where he studied
VCSELs with narrow spectral linewidth forcoherent optical communication systems in 1991
and 1994, respectively. In 1994, he joined NTT
Optoelectronics Laboratories and engaged in
R&D of temperature-insensitive semiconductor
optical devices for enabling low-power-dissipation WDM networks. During 1998–2001, he wasin NTT Communications, where he worked in
the Tier1 network project for NTT global IP network services and businesses. Since he joined
NTT Photonics Laboratories in 2001, his researchhas been on optical subsystems and assembly andpackaging technologies for their optical modules. He is a member of the IEEE Photonics
Society, JSAP, and IEICE.

Researcher, Photonic Transport Network Laboratory, NTT Network Innovation Laboratories.
He received the B.E. and M.E. degrees in material science and engineering from Kyoto University and the Ph.D. degree in electrical and electronic engineering from Tokyo Institute of Technology in 2002, 2004, and 2010, respectively. In
2004, he joined NTT Photonics Laboratories,
where he engaged in research on optical waveguide design using the wavefront matching
method and development of optical receivermodules such as a silica-waveguide DQPSK
demodulator and dual-polarization optical hybrid
for next-generation optical transmission systems.
He moved to NTT Network Innovation Laboratories in July 2010. He is a member of IEICE andthe IEEE/Photonics Society.

Hiroto Kawakami

Research Engineer, Photonic Transport Network Laboratory, NTT Network Innovation
Laboratories.
He received the B.S. and M.S. degrees in physics from Kyoto Industrial University and Hokkaido University in 1987 and 1989, respectively.
In 1989, he joined NTT Transmission Laboratories, Yokosuka, where he engaged in R&D ofhigh-speed optical communications systems. His
research interests include nonlinear effect in optical fiber. He is a member of IEEE and IEICE.

Ryoichi Kasahara

Senior Research Engineer, Photonics Integration Laboratory, NTT Photonics Laboratories.
He received the B.S. degree from the University of Electro-Communications, Tokyo, in 1995
and the M.S. degree from Tohoku University,
Miyagi, in 1997. In 1997, he joined NTT Optoelectronics (now Photonics) Laboratories, Ibaraki. Since then, he has been engaged in researchon silica-based PLCs and high-speed optoelectronic receivers for optical communication systems. He is a member of IEICE and JSAP.

NTT Technical Review

Feature Articles: R&D of Optical Component Technologies
for 100-Gbit/s Digital Coherent Communications

Photodiodes and Transimpedance
Amplifiers for 100-Gbit/s Digital
Coherent Optical Communications
Kimikazu Sano†, Toshihide Yoshimatsu,
Hiroyuki Fukuyama, and Yoshifumi Muramoto
Abstract

To increase transmission capacity and extend transmission distance, 100-Gbit/s digital coherent optical communications systems have been researched. NTT Photonics Laboratories has developed photodiodes that exhibit a good high-frequency response even under high optical input power and transimpedance amplifiers that have both broadband characteristics and a wide input dynamic range.

1. Introduction
To markedly increase transmission capacity andextend transmission distance, 100-Gbit/s digital
coherent optical communications systems haverecently been researched and developed. The architecture of optical receivers for such systems is shownin Fig. 1. A signal light transmitted through opticalfibers (bit rate: 125.6 Gbit/s) and a local light (continuous wave) are input to the optical receiver simultaneously. The local light is necessary in order todecode the signal light, whose signal format is dual
polarization quadrature phase shift keying (DPQPSK). Both the signal light and local light have two
optical polarization components (X pol. and Y pol.).
Each light is split into beams with different polarizations by polarization beam splitters. Then, the polarization-split lights are fed into 90° optical hybrids.
There the signal and local lights are mixed, and two
optical-phase-multiplexed components (I and Q,
which denote in-phase and quadrature, respectively)in the signal light are separated. The outputs of the
90° optical hybrids are of the differential style, soeach hybrid has four outputs (I-pos., I-neg, Q-pos.,and Q-neg. (pos.: positive, neg.: negative)). With the† NTT Photonics Laboratories
Atsugi-shi, 243-0198 Japanpolarization beam splitters and the 90° opticalhybrids, the signal light, which is both optical polarization multiplexed and optical phase multiplexed, isseparated into four independent differential signals.
Therefore, the baud rate of each of the four separated
differential signals is 31.4 Gbaud, i.e., one-fourth thatof the signal light.
Photodiodes (PDs) convert the high-speed (31.4Gbaud) optical signals into electrical current ones. To
convert four differential optical signals, eight PDs are
installed in the optical receiver.
Transimpedance amplifiers (TIAs) transform thehigh-speed electrical current signals into electricalvoltage ones, and they linearly amplify the signals to
output a constant voltage amplitude that the following analog-to-digital converters can handle. To transform and amplify four differential electrical signals
independently, four TIAs are used in the opticalreceiver.
2. PDs for 100-Gbit/s digital coherent
optical communications systems
In 100-Gbit/s digital coherent optical communication systems, high-power local light is used as one of
the inputs for the optical receiver. Therefore, PDs thatexhibit a good high-frequency response even underhigh optical input power are required. To meet thisNTT Technical Review

Feature Articles

PDs

TIAs

I-pos.

X pol.
I-pos.

I-neg.
90°
opticalhybrid Q-pos.

X pol.
I-neg.
X pol.
Q-pos.

Q-neg.
I-pos.

X pol.
Q-neg.
Y pol.
I-pos.

I-neg.
90°
opticalhybrid Q-pos.

Y pol.
I-neg.
Y pol.
Q-pos.

Q-neg.

Y pol.
Q-neg.

X pol.
Signal light(DP-QPSK format,
125.6 Gbit/s)

PBS

Y pol.

X pol.
Local light

PBS

Analogto-digitalconverter

Digital signal
processor

Electricalsignals

Y pol.

31.4 Gbaud x 4 channels
PBS: polarization beam splitter

Fig. 1. Architecture of optical receiver for 100-Gbit/s digital coherent optical communications.

n-type field control layer
Electrons

Electrons

p

p
i

Holes

i-type collection
layer

i
n

Opticalabsorption layer

Electric-field
intensity

i

Holes

n

Opticalabsorption layer

Electric-field
intensity
Distance

Distance(a)(b)

Fig. 2. Energy band diagrams for (a) conventional MIC-PD and (b) composite-field MIC-PD.

requirement, we have developed a new type of PD
called a composite-field maximized-induced-current
PD (composite-field MIC-PD) [1]. The energy band
diagrams for the conventional MIC-PD and the composite-field MIC-PD are compared in Fig. 2. In thecase of the conventional MIC-PD, under high opticalVol. 9 No. 3 Mar. 2011

input power, the many holes that accumulate in the
intrinsic (i-type) optical absorption layer weaken theelectrical field and degrade the high-frequency
responses of holes and electrons. This effect is known
as the space charge effect. In the composite-field
MIC-PD, to mitigate the space charge effect, aFeature Articles

40

O/E response (dB)2

VPD=-2 V

1

Low-power input (−4 dBm)
High-power input (+4 dBm)

0

−1
−2
−3
−4

0

10

20

30

40

Frequency (GHz)

Fig. 3. Frequency optical-to-electrical (O/E) responses fora fabricated composite-field MIC-PD under optical
input power of -4 dBm (low-power input) and +4
dBm (high-power input).

Composite-field
Conventional

IPD=2 mA
30
20
10
0

−5
−6

-3-dB-down frequency (GHz)

3

0

−1

−2

−3

−4

Bias voltage (V)Fig. 4. B ias voltage dependencies of -3-dB-down
frequencies for the composite-field MIC-PD
and conventional MIC-PD.

3. TIAs for 100-Gbit/s digital coherent
optical communications systems
negative (n-type) field control layer and an i-typewide bandgap collection layer are newly introduced.
These layers strengthen the electrical field of the itype optical absorption layer and lead to improved
high-frequency responses of holes and electrons
under high optical input power.
Measured frequency responses for a fabricatedcomposite-field MIC-PD under optical input powerof -4 dBm (low-power input) and +4 dBm (highpower input) are shown in Fig. 3. For both inputs, thefrequency responses are almost the same. The -3-dBdown frequencies for both inputs are 29 GHz. This
result demonstrates that the composite-field MIC-PD
relaxes the space charge effect and exhibits goodhigh-frequency responses even under high optical
input power.
The measured bias voltage dependences of the-3-dB-down frequencies of the composite-field andconventional MIC-PDs are compared in Fig. 4. In themeasurement, the photocurrent value was set to
2 mA, which is close to real photocurrent values in
100-Gbit/s systems. While the conventional MIC-PD
requires a bias voltage of -3.5 V for a 24-GHz -3-dBdown frequency, the composite-field MIC-PD
achieves a 29-GHz -3-dB-down frequency with only
a -2-V bias voltage. This shows that the electricalfield of the i-type optical absorption layer is sufficiently strengthened with a bias voltage as low as-2 V. The responsivity of the composite-field MICPD is around 0.8 A/W, which is also high enough for
100-Gbit/s systems.



In 100-Gbit/s digital coherent optical communications systems, TIAs need to amplify high-speed electrical signals of 31.4 Gbaud. It is empirically known
that amplification of a B-baud signal needs bandwidth of 0.7B Hz, where B denotes the baud value.
Therefore, TIAs require a broad bandwidth of 31.4
Gbaud × 0.7 = 22 GHz. In addition to the broad bandwidth, TIAs must maintain a constant voltage amplitude in a wide input current range of ~100 μA to~1 mA
In designing a TIA that could satisfy the above
requirements, we used InP heterojunction bipolartransistors (HBTs) with a 1-μm-wide emitter. Since
these InP HBTs exhibit high-frequency characteristics represented by a high current cut-off frequency(fT) of 170 GHz, they are suitable for designing a
TIA with a broad bandwidth of over 22 GHz.
The circuit diagram of the TIA that we designed isshown in Fig. 5. Photocurrent from the PDs is fed into
the TIA’s input differential terminals IT and IC. Then,the signal is amplified by the following circuit blocks:
TIA core, post amplifier, variable gain amplifier(VGA), high-gain broadband amplifier (HGBA), andoutput buffer. Finally, differential output with a constant voltage amplitude is launched from output terminals OT and OC. To make the output voltage
amplitude constant in the whole range of input current, a peak detector and an auto gain control (AGC)
circuit are monolithically integrated in the TIA. The
peak detector and the AGC circuit compare the real
output voltage amplitude of the HGBA with a target
NTT Technical Review

Feature Articles

AGC

THC

Peak detector
TIA core

PA

HGBA

IT
IC
VGA

OB

OT
OC

AOC
OMC

OMT
OB:
output buffer
OMC & OMT: terminals for connection to external capacitancePA:
post amplifierFig. 5. Circuit diagram of the TIA.

amplitude provided through terminal THC, and they
control the gain of the VGA so that the output voltage
amplitude of the HGBA is equal to the target one. In
this way, a function for achieving constant output
voltage amplitude is implemented in the TIA. The
TIA also contains an automatic offset canceling(AOC) circuit. The AOC circuit excludes DC voltage
offset inside the TIA and ensures that high-speed
signals are sufficiently amplified. The power supply
voltage for the TIA is -5.2 V, and power consumptionof one TIA is 660 mW (2.64 W for all four).
To make the output voltage amplitude constant over
the whole range of input current, the VGA gain iscontrolled by the AGC circuit. Therefore, a variable
range of VGA gain is also a key specification for
keeping the output voltage amplitude constant, and it
should be large enough to correspond to a wide input
current range. The circuit configuration of the VGA isshown in Fig. 6(a). The VGA gain is varied by changing current IS1: the gain increases (decreases) withincreasing (decreasing) IS1. The simulated frequency-gain characteristics of the VGA for minimum andmaximum current IS1 are shown in Fig 6(b). While alarge variable range of the gain is achieved at low
frequencies, the range is reduced in the high-frequency region because of the increase in minimum
gain. This is mainly due to the base-collector capacitances (Cbc) of transistors Q11 and Q12 (Fig. 6(a)),
which bypass the high-frequency signal from input toVol. 9 No. 3 Mar. 2011

output. To suppress the increase in minimum gain due
to Cbc, we added transistors Q21 and Q22 to the
VGA. In the circuit configuration in Fig. 6(a), thebase-collector capacitances (Cbc’) of Q21 and Q22cancel Cbc and suppress the increase in minimum
gain. As a result, the variable range of the gain is
widened by about 10 dB in the high-frequency
region.
The frequency response of transimpedance gain fora fabricated TIA is shown in Fig. 7. Transimpedance
gain at low frequency is 68 dBW (2510 W), and the-3-dB-down frequency is 23 GHz, which exceeds thevalue required for 100-Gbit/s systems (22 GHz).
The input current dependence of the differential
output voltage amplitude for the fabricated TIA isshown in Fig. 8. Constant output voltage amplitude of
540 mVppd (ppd: peak-to-peak, differential) was
confirmed for a wide input current range from 160
μApp to 2.6 mApp. This result shows that the integrated peak detector and AGC circuit successfully
controlled the output amplitude to keep it constant.
Furthermore, the variable range of the VGA gain was
sufficient to keep a constant output amplitude. The
inset of Fig. 8 shows a 32-Gbaud output eye-patternfor 260-μApp input. A clear output eye-pattern wasobserved for the 32-Gbaud input, which is close to
the baud rate for practical 100-Gbit/s systems (31.4
Gbaud).

Feature Articles

20
VCC

Max. gain (IS1: max)

0
RL2

Cbc

Cbc
IT

Variable gain range(w/ Q21,Q22)

−20
OT
OC
Cbc’

Cbc’

Q11 Q12Q21 Q22

IC

Voltage gain (dB)

RL1

Variable gain range(w/o Q21,Q22)

−40
−60

w/o Q21,Q22

−80
−100

IS1

w/ Q21,Q22

−120

VEE

Min. gain (IS1: min)−140
1.E+02
1.E+04
1.E+06(a)1.E+081.E+101.E+12Frequency (Hz)VCC: collector-side supply voltage
VEE: emitter-side supply voltage(b)Fig. 6. (a) Circuit configuration of VGA and (b) frequency-gain characteristics of VGA (simulated).

68 dBΩ

70

3 dB

60
50
40
30
20
10
0

23 GHz

0

10

20

30

40

50

60

Frequency (GHz)

Output voltage amplitude (Vppd)

Transimpedance gain (dBΩ)

80

32-Gbaud output
eye-pattern(260-µApp input)

0.8
0.6
0.4
0.2
0

0

1
2
Input current (mA)

3

Fig. 7. Frequency response of transimpedance gain for
the fabricated TIA.

Fig. 8. Input current dependence of differential output
voltage amplitude for the fabricated TIA.

4. Conclusion

broad bandwidth of over 22 GHz and constant output
amplitude in a wide input current range. These characteristics are indispensable for 100-Gbit/s systems.
In the future, we will research and develop photodiodes that can handle much higher optical input power
and transimpedance amplifiers that can keep a constant output amplitude in wider input current ranges.

We described high-speed photodiodes and transimpedance amplifiers for 100-Gbit/s digital coherent optical communications systems. For the photodiodes, we have newly devised composite-field maximized-induced-current photodiodes and confirmed
their good high-frequency responses under high optical input power conditions, which are the characteristics required for 100-Gbit/s systems. We designed
and fabricated the transimpedance amplifiers using
InP HBTs with a 1-μm-wide emitter and confirmed aAcknowledgment
This work was partly supported by the Ministry ofInternal Affairs and Communications (MIC) of JapanNTT Technical Review

Feature Articles

through the R&D project “High-speed Optical Transport System Technologies”.

Kimikazu Sano

Senior Research Engineer, High-speed Devices
and Technology Laboratory, NTT Photonics
Laboratories.
He received the B.S., M.S., and Ph.D. degrees
in electrical engineering from Waseda University,
Tokyo, in 1994, 1996, and 2004, respectively. He
joined NTT Laboratories in 1996. Since then, he
has worked on the design of ultrafast digital andanalog ICs/OEICs using GaAs MESFETs, InPbased HEMTs, InP-based HBTs, InP-based tunneling diodes, and InP-based photodiodes. From2005 to 2006, he was a visiting researcher at the
University of California, Los Angeles (UCLA),
where he researched a microwave/millimeter
sensing system. He received the Young Researcher’s Award from the International Conference on
Solid State Devices and Materials (SSDM) in
2003. He is a member of IEEE and the Instituteof Electronics, Information and Communication
Engineers (IEICE).

Toshihide Yoshimatsu

Research Engineer, High-speed Devices andTechnology Laboratory, NTT Photonics Laboratories.
He received the B.E. and M.E. degrees inapplied physics from Tohoku University, Miyagi,
in 1998 and 2000, respectively. He joined NTT
Photonics Laboratories in 2000. He has been
engaged in research on ultrafast opto-electronic
devices. He received the SSDM Paper Award
from SSDM in 2004. He is a member of IEICE
and the Japan Society of Applied Physics(JSAP).

Vol. 9 No. 3 Mar. 2011

Reference[1]

T. Yoshimatsu, Y. Muramoto, S. Kodama, T. Furuta, N. Shigekawa, H.
Yokoyama, and T. Ishibashi, “Composite-field MIC-PDs for Lowbias-voltage Operation,” Proc of the 22nd International Conference on
Indium Phosphide and Related Materials, pp. 417–420, Kagawa,Japan, 2010.

Hiroyuki Fukuyama

Senior Research Engineer, High-speed Devices
and Technology Laboratory, NTT Photonics
Laboratories.
He received the B.S. and M.S. degrees in physics from Keio University, Kanagawa, in 1988 and1990, respectively. In 1990, he joined NTT LSILaboratories, Kanagawa, where he engaged inresearch on resonant tunneling devices and theirmicrowave applications. He is currently engaged
in research on high-speed devices and circuitdesign for optical communications systems.

Yoshifumi Muramoto

Senior Research Engineer, High-speed Devices
and Technology Laboratory, NTT Photonics
Laboratories.
He received the B.E. and M.E. degrees from
Osaka Prefecture University in 1990 and 1992,
respectively. He joined NTT Laboratories in1992. He has been engaged in research on monolithically integrated photoreceivers and highspeed photodetectors. He is a member of IEICE
and JASP.

Regular Articles

Antenna Model and Its Application to
System Design in the Millimeter-wave
Wireless Personal Area Networks
Standard
Ichihiko Toyoda† and Tomohiro Seki
Abstract

This article describes an antenna model developed for the system design and standardization of
millimeter-wave wireless personal area networks (WPANs). It also discusses why a new antenna modelis required for standardization activities. The developed antenna model is a simple mathematical analog.
It provides a main-lobe pattern and averaged side-lobe level by setting the antenna’s half-power
beamwidth. This model was adopted as a reference antenna model in the channel model document of theIEEE 802.15.3c millimeter-wave WPAN task group.

1. Introduction
Wireless systems, such as cell phones, wireless
local area networks, and wireless personal area networks (WPANs), have come to be widely used in ourlives. These systems will also play an important rolein future home networks. On the other hand, with therapid progress of information and communications
technologies, including high-performance personal
computers (PCs) and high-speed Internet access lines
like fiber to the home, the data sets being handled byconsumers, such as video and music files, are drastically increasing in size year by year. Therefore, wireless systems are being pressured to support highspeed data transmission with gigabit-per-secondclass data rates. One practical way to achieve suchhigh-speed wireless systems is to allocate and use thehuge bandwidth available in the millimeter-wave
band. When these systems are used in home networks, technology standards are required because
home networks consist of devices provided by many
vendors.
† NTT Network Innovation Laboratories
Yokosuka-shi, 239-0847 JapanThis article focuses on an antenna model developed
for the standardization of millimeter-wave WPANs
and discusses why a new antenna model had to be
developed. The antenna model is a simple mathematical analog and provides a main-lobe pattern andaveraged side-lobe level by setting the antenna’s halfpower beamwidth. It enables comprehensive systemdesign by considering signals arriving from all directions including behind the antenna.
2. WPANs
WPANs are consumer-oriented short-range wireless communication systems linking personal devices. They were originally developed as low-rate communication systems for connecting a mouse and/or
keyboard to a personal computer, a car navigation
system to a cell phone, and a music player to a set ofheadphones. They were found to be a very cost effective way of linking devices. Two widely used WPAN
technologies are Bluetooth and ZigBee.
A very wide frequency band near 60 GHz has beenor will be allocated as an unlicensed band in many
countries. Examples are 59–66 GHz in Japan, 57–64
GHz in the USA, Canada, and Korea, and 57–66 GHz
NTT Technical Review

Regular Articles

ReceiverTransmitter

Fig. 1. Typical WPAN usage.

in European countries and Australia. This band is agood candidate for achieving ultrafast WPAN systems suitable for future home networks. To takeadvantage of the broad unlicensed bandwidth in the
60-GHz band, several standardization activities arefocusing on developing standards for this band [1].
The 60-GHz-band WPAN system is promising for
supporting uncompressed high-definition video
streaming and ultrafast downloading of huge files
from a server, namely kiosk file downloading.
3. Propagation channels of
millimeter-wave WPANs
All wireless systems use radio waves that propagate
through the air. The radio waves are reflected bywalls and diffracted by obstacles. As a result, thereceiver captures scattered signals that arrive frommany directions with different time offsets. This
propagation environment yields the propagation
channel or simply channel. The propagation channel
strongly affects system performance. Hence, accurate
modeling of it is important in designing new wirelesssystems.
A typical example of WPAN usage is schematicallyshown in Fig. 1. A transmitter and receiver are locatedVol. 9 No. 3 Mar. 2011in a small room. The sofa, chairs, table, and cabinet
act as obstacles. Signals from the transmitter arereflected and diffracted by the walls and obstacles.
They arrive at the receiver from different directions
with different time offsets. In this multipath environment, the delayed signals can improve the system
performance as well as degrading it. In a typical standardization process, several systems are proposed,
and their performances are evaluated and comparedin order to narrow down the proposals to only one. In
this process, each proposer must use the same channel model so that comparisons are correct and fair.
Therefore, standardization task groups for wirelesssystems must define the channel model before callingfor proposals.
For millimeter-wave WPAN system construction,
one must use a directional antenna because of thehigh propagation loss of millimeter-wave signals andtheir low transmission power, which is strictly limitedby law. The signal power received by the directional
antenna is strongly influenced by its antenna pattern
and is a significant determiner of system performance.
Thus, WPAN system design requires antenna patternevaluation as well as a channel model.

Regular ArticleszAntenna model

Antenna gain

G0

Actual antenna patternθySimple main-lobe function

G0/2

x

φ

Constant side lobe00

θ −3dB/2180°θ (deg.)Fig. 2. Basic concept of the antenna model.

4. Antenna model for millimeter-wave
WPAN system design
Beside the regulatory constraints, design goals suchas low power consumption also dictate low transmission power for WPAN systems. Since millimeterwave signals have high propagation loss, the use of adirectional antenna is essential. As described in section 3, WPAN systems are usually used in multipath
environments, so a system design must consider signals arriving from outside the antenna’s main lobe.
The requirements of the antenna model used for
WPAN system design are summarized as follows:(1)	Model antennas with half-power beamwidths of
15–60°, which are common in WPAN systems.
(2)	Include side-lobe effects.
(3)	Cover antenna patterns defined over 360°.
(4)	Provide a simple mathematical model that simplifies system simulation.
Among these requirements, (2) and (3) are unique to
WPAN systems because of their use in multipath
environments.
Many antenna models have been developed andused for the design and evaluation of various wirelesssystems [2], [3]. Here, we introduce a new antennamodel suitable for WPAN system design. The basic
concept is shown in Fig. 2. The red line shows theantenna pattern of a typical directional antenna. The
blue line shows the antenna pattern of the designmodel. The horizontal axis plots the angular offset
from the direction of antenna peak gain and the vertical axis plots antenna gain. As shown in this figure,the design model has a constant side-lobe level.
Actual performance of a designed wireless systemdepends on room size, room shape, locations andnumber of obstacles, and transmitter and receiverlocations. Hence, system design is performed forseveral typical cases using statistical channel models[4]. The channel model is created from measured datain some environments and is used to statistically generate signals arriving at the receiver. That is, the generated signals are not exactly identical to real signals.
This means that exact side-lobe patterns are unimportant and the averaged side-lobe level is more practical for this application even though the actual antennas do not have constant side lobes.
There are two ways to determine the side-lobelevel. One way is to consider practical applications.
For example, in the case of interference assessments,
the design side-lobe level is set a little bit higher than
the actual side-lobe level. This provides conservative
results for interference analyses. However, the antenna model described in this article is intended for new
systems that include PHY/MAC (physical layer,
medium access control) specifications. Thus, using
this conservative approach may cause significant
error because the side-lobe effects depend on thespecifications. The other way of determining the sidelobe level is to derive it from physical requirements,
i.e., the conservation of energy law.
We averaged the power outside the main lobe toobtain a side-lobe level that satisfies the physicalrequirements. The averaged side-lobe level Gsl can be
expressed as
4p – G0 ∫q0ml ∫0 D(q, f)•sinqdfdq,2pp∫qml / 2 ∫0 sinqdfdq/ 2 2pGsl =(1)

NTT Technical Review

Regular Articles

−20
−30
−40
−50
−60

−20
−30
−40
−50

0

45

90

135

180

−60

0

Measured data
Developed model−10
D(θ ) (dB)

D(θ ) (dB)0

Measured data
Developed model−10
D(θ ) (dB)

0
−10

−20
−30
−40
Measured data
Developed model

−50
0

45

90

135

180

−60

0

45

90

135

θ (deg.)θ (deg.)θ (deg.)(a) θ −3dB = 15°(b) θ −3dB = 30°(c) θ −3dB = 60°

180

Fig. 3. Comparison of calculated and measured antenna patterns.

where G0, D(q, f), and qml are the peak gain, directivity function normalized by the peak gain, and mainlobe angular width, respectively, and q and f are polar
coordinates. The second term of the numerator is thetotal power included in the main lobe. The denominator is the integration over the solid angle outside themain lobe. This expression ensures that the total radiated power i.e., the integration of the antenna pattern,
is kept at 4p.
To calculate this equation, we must determine G0,
D(q, f), and qml. Our approach uses, as the directivity
function of the main lobe, a Gaussian function of onlyq owing to its simplicity. This means that the modeled
antenna has a rotationally symmetric beam. G0 is
calculated from the theoretical response of the circular aperture antenna, which has a similar main-lobe
pattern to the Gaussian beam antenna. qml is determined by the angle at which the main-lobe function
decreases by -20 dB from its peak.
Equation (1) is not easy to calculate in a systemsimulation because its integration is difficult to solve
analytically. Our solution is to derive an approximate
expression using the results of a numerical integration.
The developed antenna model is formulated interms of directivity gain G(q, f) as follows: [5]2G(q,f)[dBi]=G0 –3.01•  2q 
 q-3dB 0−<q −<qml/2  (2)G(q,f)[dBi]=–0.411•ln(q-3dB)–10.6
qml/2<q −<180º (3)qml = 2.58 • q-3dB

(4)1.62  ,
G0=20 • log  sin(q-3dB/2) (5)Vol. 9 No. 3 Mar. 2011

where q-3dB is the antenna’s half-power beamwidthand q-3dB is in units of degrees. Equations (2) and (3)give the directivity gains of the main and side lobes,
respectively. Here, the directivity gain is not a function of f, which means that the antenna has a rotationally symmetric beam.
Antenna patterns calculated using the design modeland measured patterns for rectangular horn antennas
are shown in Fig. 3. As shown in this figure, the mainlobe patterns of the design model agree well with themeasured ones. The side-lobe levels of the model areconstant and well approximate the average values ofthe measured patterns. Thus, the antenna model iseffective in millimeter-wave WPAN system design.
5. Conclusion
This article elucidated the role of antenna models in
millimeter-wave WPAN standardization. Antenna
patterns along with channel models must be considered in order to achieve fair and correct assessment of
new wireless systems that use directional antennas
because WPAN systems are commonly used in multipath environments where signals come from many
directions. The antenna model described in this article is a simple mathematical analog with constantside-lobe level that reflects the average value. Thisfeature is suitable for designing millimeter-wave
WPAN systems. The antenna model has been adopted
as a reference antenna model in the channel model
document of the IEEE 802.15.3c millimeter-wave
WPAN task group [6].
Acknowledgment
This work was conducted as part of the discussions
Regular Articles

in the antenna working group of the Consortium forMillimeter Wave Practical Applications (CoMPA).
We thank all of the CoMPA members for their comments.
References
[1]

[2]

Y. Shoji, H. Harada, S. Kato, I. Toyoda, K. Takahashi, K. Kawasaki,
H. Ikeda, Y. Oishi, K. Maruhashi, H. Nakase, and M. Ando, “Millimeter-wave Technology and Standard Activity to Evolve Personal Area
Network,” IEICE Communications Society Magazine, No. 2, pp.
92–102, Sept. 2009. (in Japanese).
Rec. ITU-R F. 1245-1, “Mathematical Model of Average and Related
Radiation Patterns for Line-of-sight Point-to-point Radio-relay System Antennas for Use in Certain Coordination Studies and Interfer-

Ichihiko Toyoda

Senior Research Engineer, Wireless Systems
Innovation Laboratory, NTT Network Innovation
Laboratories.
He received the B.E., M.E., and Dr.Eng.
degrees in communication engineering from
Osaka University in 1985, 1987, and 1990,
respectively. In 1990, he joined NTT Radio Communication Systems Laboratories, where heengaged in developmental research based onelectromagnetic analysis of three-dimensional(3-D) and uniplanar MMICs. From 1994 to 1996,
he was with NTT Electronics Technology Corporation (NEL), where he developed wireless communication equipment and MMICs. From 1996
to 1997, he was with NTT Wireless Systems
Laboratories, where he conducted R&D on
highly integrated multifunctional MMICs, highfrequency Si MMICs and MMIC design software
based on the 3-D masterslice MMIC technology.
From 1997 to 2001, he was engaged in developing ultrahigh-speed digital ICs and MMICs for
optical and wireless communication systems as
Engineering Director of IC Design at NTT Electronics Corporation (NEL). His current interests
include millimeter- and quasi-millimeter-wave
high-speed wireless access systems and theirapplications. He is also active in developing
IEEE 802.11, 802.15 and other national standards and was a Vice Chair of the Consortium forMillimeter Wave Practical Applications(CoMPA). From 2007 to 2009, he was engaged
in business strategy and the incubation of R&D
activities at NTT Science and Core Technology
Laboratory Group. He was also a Visiting Associate Professor of Niigata University from 2004
to 2007 and is a Visiting Lecturer of Tokyo Denki
University from 2007. He was a Guest Editor ofa 1998 special issue on “3D-Components andActive Circuits” of the International Journal of
RF and Microwave Computer-Aided Engineering. He was an Associate Editor for the Instituteof Electronics, Information and Communication



[3]

[4]

[5]

[6]

ence Assessment in the Frequency Range from 1 GHz to about 70
GHz.”
3GPP Technical Report, “3rd Generation Partnership Project; Technical Specification Group Radio Access Networks; Spatial Channel
Model for Multiple Input Multiple Output (MIMO) Simulations(Release 8),” 3GPP TR 25.996, V.8.0.0, Dec. 2008.
Y. Shoji, H. Sawada, C.S. Choi, and H. Ogawa, “A Modified SVmodel Suitable for Line-of-sight Desk-top Usage of Millimeter-wave
WPAN Systems,” IEEE Trans. Antennas Propag., Vol. 57, No. 10, pp.
2940–2948, Oct. 2009.
I. Toyoda, M. Ando, K. Iigusa, H. Sawada, T. Seki, S. Nishi, S.
Kitazawa, A. Miura, Y. Fujita, H. Uchimura, and Y. Hirachi, “Mathematical Antenna Model with a Rotationally Symmetric Beam for
System Design of Wireless Personal Area Networks,” IEICE Trans.
Commun. (Japanese Edition), Vol. J93-B, No. 5, pp. 781–790, May2010 (in Japanese).
S. K. Yong, et al., “TG3c channel modeling sub-committee final
report,” IEEE 802.15-07-584-01, Mar. 2007.

Engineers (IEICE) Transactions on Electronics
from 1999 to 2002 and a Councilor, Tokyo Section, IEICE, from 2007 to 2009. He is a co-authorof “OFDM/OFDMA Text Book”, Impress R&D.
He received the 1993 Young Researcher’s Award
from IEICE, the Japan Microwave Prize presented at the 1994 Asia-Pacific Microwave Conference, the 18th Telecom System Technology
Award from the Telecommunications Advancement Foundation, First Prize for Propagation andAntenna Measurements at the 4th European
Conference on Antennas and Propagation(EuCAP2010), and many NTT R&D awards. He
was the Secretary of the IEICE Technical Committee on Microwaves from 2004 to 2006. He has
also served on the technical program committees
of several international conferences, on the millimeter-wave investigation committee of theInstitute of Electrical Engineers, Japan, and on
the IEICE Technical Committee on Microwave
Simulator Technologies. He is a senior memberof IEICE and a member of IEEE.

Tomohiro Seki

Senior Research Engineer, Wireless Systems
Innovation Laboratory, NTT Network Innovation
Laboratories.
He received the B.E., M.E., and Dr.Eng.
degrees in electrical engineering from Tokyo
University of Science in 1991, 1993, and 2006,
respectively. Since joining NTT in 1993, he has
been engaged in research on planar antennas andactive integrated antennas for the millimeterwave and microwave bands. He is currently
interested in system-on-package technologies formillimeter-wave communication systems. He
received the 1999 Young Engineer’s Award fromIEICE and the 2006 Best Paper Award from the
IEICE Communications Society. He is a senior
member of IEICE and a member of IEEE.

NTT Technical Review

Regular Articles

Compressed Sensing Technology for
Flexible Wireless System
Doohwan Lee†, Takayuki Yamada, Hiroyuki Shiba,
Yo Yamaguchi, and Kazuhiro Uehara
Abstract

We are developing a flexible wireless system (FWS) in response to the rapid development of andchanges to wireless radio environments. FWS is a unified wireless platform that simultaneously receives
various types of wireless signals at distributed remote stations and performs signal processing at thecentral station by transferring the received radio wave data via the wired access line. As a partial
fulfillment of our system, we have applied compressed sensing technology as a radio wave datacompression technology for FWS. Compressed sensing is a new framework for solving an ill-posed
inverse problem of a sparse signal. Direct translation of compressed sensing in the sense of wirelesstechnology is as follows: radio wave data can be received, transmitted, and reconstructed using subNyquist rate information without aliasing if the original radio wave is sparse. To provide a fullunderstanding of our approach, this article first reviews basic knowledge about compressed sensing andthen describes the application scenario of compressed sensing in FWS.

1. Introduction
The rapid development of and changes to wirelessradio environments require a unified platform thatcan flexibly deal with various wireless radio systems[1]. To satisfy this requirement, we are developing aflexible wireless system (FWS), which is composedof flexible access points and a flexible signal processing unit [2].
The concept of FWS is illustrated in Fig. 1. Multiple wireless signals are simultaneously received byflexible access points, which can receive a wide variety of wireless signals with frequencies ranging fromseveral hundred megahertz to several gigahertz. The
received radio wave data is transferred to the flexible
signal processing unit through a broadband wired
access line. The flexible signal processing unit performs multiple types of signal analysis by software
exploiting software defined radio and cognitive radio
technologies [3]. If necessary, previously stored dataat servers can also be used.
† NTT Network Innovation Laboratories
Yokosuka-shi, 239-0847 JapanThe huge bandwidth necessity for transferring thereceived radio wave data motivated us to develop ahighly flexible and efficient radio wave data compression technology. To accomplish this goal, weapplied recently developed compressed sensing technology.
Compressed sensing is a new framework for solving an ill-posed inverse problem of a sparse signal[4]. Direct translation of compressed sensing in thesense of wireless technology is as follows: radio wave
data can be received, transmitted, and reconstructedusing sub-Nyquist rate information without aliasing
if the original radio wave is sparse.
In relation to FWS, compressed sensing has two
advantages. First, it provides universality in wirelesssignal reception regardless of system types. This provides flexible signal reception because all types ofsignals can be received by a unified signal reception
method. Furthermore, no modifications are necessary
even when new wireless systems are introduced. Second, it enables signal reception and reconstruction ata lower rate than the Nyquist rate. This reduces theburden of data transfer between flexible access points
and the flexible signal processing unit.
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NetworkFlexible signal
processing unit

ServerIndoors
Outdoors

Flexible
access point

Wireless
system A

Wireless
system B

Sensors

Handsets

PCs

Flexible
access point
Wireless
system C

Home information
appliances

AVs

Sensors

PCs

AV: audio-visual system
PC: personal computer

Fig. 1. Concept of a flexible wireless system.

The remainder of this article is organized as follows: Section 2 reviews basic knowledge about compressed sensing, section 3 describes our compression
method, and section 4 concludes with a brief summary of the main points and a mention of futurework.
2. Compressed sensing
2.1 Basic concept
A simplified explanation of compressed sensing is
as follows: A signal projected linearly onto a lowerdimensional space can be used to reconstruct theoriginal higher-dimensional signal with high probability if the signal is sparse (explained in section 2.2)
and the projection matrix satisfies the restricted isometry property (RIP, explained in section 2.4).
In a mathematical sense, compressed sensing can
be stated as an ill-posed inverse problem. Normally,
the solution of an ill-posed inverse problem is notuniquely determined because the number of equations is smaller than the number of variables. However, the solution of an ill-posed inverse problem canbe uniquely determined by investigating all possible
cases provided that the signal is sparse. Moreover, if
Vol. 9 No. 3 Mar. 2011

an ill-posed inverse problem satisfies RIP and thesignal is sparse, the unique solution can be found witha practical degree of complexity.
For an intuitive understanding of compressed sensing, consider the following simple ill-posed inverse
problem.
Find m, n, and k such thatm + 3n - 2k = 1-m – n + k = -1
Normally, the solution is not uniquely determinedbecause the number of equations is smaller than thenumber of variables. However, if vector [m k n] has
only one nonzero element, the unique solution can beobtained by investigating all possible cases, as
below.
case 1) m≠0, n=k=0 -> m=1 (unique solution)case 2) n≠0, m=k=0 -> impossible
case 3) k≠0, m=n=0 -> impossible
Although the unique solution is available, this is an
NP-hard problem for which all possible cases must be
investigated. Consequently, it becomes impractical asRegular Articles

the number of dimensions of the signal increases.
This impracticality is overcome if the equation vector [1 3 -2; -1 -1 1] satisfies RIP. The core achievement of compressed sensing is that the above NPhard problem can be cast into an l1-norm minimization problem (explained in section 2.5) if the signal issparse and RIP is satisfied. L1-norm minimization
problems can be solved by linear programming,
which is a well established convex optimization
method, with practical complexity O(n3) [5], [6].
Considering the above example, the following two
statements can be made: First the sparsity of the signal assures the unique solution for compressed sensing. Second, RIP assures a practical degree of complexity for finding the unique solution for compressedsensing.
2.2 Sparse signal
A signal is called sparse when it is represented by asmall number of nonzero coefficients in any convenient domain. More specifically, N×1 signal X iscalled S-sparse if X is represented by the multiplication of any N×N transform matrix Y and N×1 coefficient vector s, and s has only S nonzero coefficients.
The definition of sparsity is not limited to the orthogonal transform domain (i.e., Fourier transform or
wavelet transform). If a signal is represented in a nonorthogonal domain, including any user-defined
domain, the signal is also called sparse [7].
2.3 Measurement
For a given N×1 signal X, measurement is definedas the linear projection of X onto M×1 signal Y. The
M×N matrix F that casts X onto Y is called the measurement matrix. Matrix description is given by
Y=FX. If X is represented by N×1 coefficient vector
s in the N×N transform domain Y , it is expressed as
Y=FYs.
The number of measurements is the number ofrows in the measurement matrix (M), which is also
equivalent to the number of dimensions of the output
signal. Therefore, the compression rate increases as
the number of measurements increases. Numerous
studies have been performed to investigate the minimum bound of the necessary number of measurements for a given signal sparsity [8 and references
therein]. It has been shown that S•log(N/S) measurements are enough for the reconstruction of an Ssparse signal when measurement matrix F consists ofrandom ensembles [9].



2.4 RIPThe most outstanding achievement of compressedsensing is the fact that RIP casts an NP-hard problem
onto an l1-norm minimization method [10], [11].
When an M×N measurement matrix F and a N×N
transform domain matrix Y satisfy the following
inequality for all S-sparse vectors, matrix Q(=FY) is
said to obey RIP of order S with d.
2(1-d )||s||22 <||– FYs||<(1+– d )||s||2

where ||s||2=Si s2i and d (0 <–d <1) is the smallest constant that satisfies the above inequality.
An intuitive explanation of RIP is as follows: theEuclidian distance between any two N×1 S-sparse
vectors is approximately preserved after the measurement as long as Q obeys RIP.
It has been proven that RIP is satisfied if measurement matrix F consists of random ensembles, whichyields the following surprising result: any unknown
sparse signals can be reconstructed by random measurement [10]. This property provides flexibility forthe compression of an unknown signal because signal-independent measurement is possible by the random measurement as long as the signal is sparse.
2.5 Reconstruction
Reconstruction of the compressed sensing refers tofinding N×1 S-sparse vector s from known M×1 measurement output matrix Y, M×N measurement matrix
F, and N×N transform matrix Y when Y=FYs(S<M<<N). Reconstruction of the original signal s
can be found via the l1-norm minimization problem,
as described below, as long as RIP is satisfied.
min||ŝ||1 subject to Y=FYŝ, ŝ∈RN,
if RIP satisfies ŝ=s,where ||ŝ||1=|s1|+|s2|+...|sN| and RN is the set of N×1
vector.
The l1-norm minimization problem finds ŝ thatminimizes the l1-norm subject to Y=FYŝ among all
possible S-sparse vectors. This seems to be an NPhard problem, but it can be cast into a convex optimization problem and solved by the linear programming
method. Furthermore, if RIP is satisfied, ŝ is identicalto the original vector s with high probability [10],[11].
If the measurement matrix consists of random
ensembles, flexible reconstruction is possible. In thecase that signal X is proved to be more sparsely
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X

X

N

N

Sampling

N

Compression

Compressed sensing

M

S

Decompression

Reconstruction

N

N

X̂

X̂

Fig. 2. Comparison between conventional compression and compressed sensing.

represented in another basis matrix Y’, surprisingly,
one does not need to conduct the measurement again
since the l1-norm minimization problem can besolved with Y and a new Q’(=FY’). This indicatesthat once the projection has been performed, thereconstruction can be performed with any convenientbasis matrix.
There are other approaches to the reconstruction ofcompressed sensing such as an orthogonal matching
pursuit algorithm, which uses a greedy iterative algorithm [12].
2.6 C omparison between conventional compression and compressed sensing
The difference between the conventional compression and compressed sensing is shown in Fig. 2. The
conventional sample-then-compress method compresses the signal by the signal-specific compression
method, which yields the optimal compression (Sdimensions). On the other hand, compressed sensing
conducts a signal-independent linear projection of theoriginal signal onto a lower-dimensional space (Mdimensional, S<M<<N), which yields poor compression performance. Therefore, it can be stated that theconventional compression method is superior to compressed sensing for the known signals in terms ofcompression performance.
However, compressed sensing has the following
advantages compared with the conventional compression method. First, it is suitable for dealing with an
unknown sparse signal. Second, it is robust to theintroduction of new types of wireless systems. When
new types of wireless systems are introduced, receivers (flexible access points in Fig. 1) do not need to bemodified because the signal-specific processing burden is moved from the receivers to the server (flexible
signal processing unit in Fig. 1). Third, it reduces theburden on receivers. For example, consider a sparse
signal of unknown frequency. In the case of the conventional sampling method, receivers must conductboth a fast Fourier transform and a search for nonzeroVol. 9 No. 3 Mar. 2011

coefficients. On the other hand, in the case of compressed sensing, receivers only need to conduct a
linear projection.
3. Application of compressed sensing for FWS
This section describes two radio wave data compression methods that utilize compressed sensing.
Both methods try to exploit the flexibility of compressed sensing by utilizing prior information. One
method uses a random sparse measurement matrix
based on random sampling [13] (or equivalently, random discard from all of the sampled data). The otheruses a random dense measurement matrix that conducts a full linear projection of sampled data [14].
3.1 Combined Nyquist and compressed sampling
The goal of this sampling method is to achieve
Nyquist-rate sampling of the known signal (hereinafter called the decoding signal) and compressed-rate
sampling of the unknown signal (hereinafter called
the sensing signal) in a single analog-to-digital converter. To achieve this goal, the following processes
are carried out.
At each flexible access point, multiple signals are
simultaneously received, filtered, and down-converted to the intermediate frequency (IF) band. In particular, decoding signals are converted to a lower center
frequency band than sensing signals, as shown in
Fig. 3. Signal down-conversion is done by tunablelocal oscillators and mixers. All down-converted signals are sampled by our method and transferred to theflexible signal processing unit.
Details of the combined Nyquist and compressed
sampling method are as follows. Suppose that L
decoding signals and M sensing signals are aligned in
the IF band, and the total bandwidths of these signals
are represented by Bdec and Bsens, respectively. For theconvenience of the explanation, Bgrid and BNyq are
defined as (4Bdec+2Bsens) and (2Bdec+Bsens), respectively. The purpose of the above setting is to achieveRegular Articles

Sensing signals

Decoding signals
D2

D1
S1

S2
Frequency

Down conversion
D2
D1
S1

S2
Frequency

Fig. 3. Example of frequency alignment of multiple signals.

(3)

…



1 0 0 0 0 0 0 … 0
0 0 1 0 0 0 0 … 0… 0
0 0 0 1 0 0 0
F= 0 0 0 0 1 0 0 … 0 
0 0 0 0 0 0 1 … 0
0 0 0 0 0 0 0 … 1

…
…
…
…
…
…
…
…

(1) Nyquist-rate sampling of the decoding signals
without aliasing from the sensing signals and (2)compressed-rate sampling of the sensing signals in asingle analog-to-digital converter simultaneously.
The detailed procedure of our method is as follows.
First, Bgrid-rate sampling is conducted. Second, only
some of the even (odd) samples are randomly discarded while all of odd (even) samples are preserved.
The locations of randomly discarded samples, which
are determined by the random sequences generator,
can be known to the flexible signal processing unit if
the initial seed of the random sequence generator isshared. Hereinafter, all the odd samples and theremaining even samples are called fixed samples andrandom samples, respectively. They are transferred to
the flexible signal processing unit via the wired
access line.
The mathematical description of our method is asfollows. For simplicity, we consider multiple sparse
signals in the frequency domain. The IF band signal
X=(Ys) is sparsely represented in the frequency
domain. The basis matrix Y is an N×N inverse Fourier transform, and s is the N×1 coefficient vector of
X in the frequency domain. Note that s has sequential
nonzero values in the lower frequency region andrandomly sparse nonzero values in the higher frequency region (e.g., s=[1111100100010001]). The
K×N projection matrix F has the following sparse
representation.

Note that each column indicates a sample point of
the signal. Every odd sample is preserved while someof the even samples are randomly discarded.
Then, the compressed sensing matrix Q(=FY)
becomes a K×N matrix consisting of every odd row
and randomly selected even rows of the inverse Fourier transform matrix. Projection vector Y is represented by Qs and signal reconstruction becomes theinverse problem of s =Q-1Y. This inverse problem issolvable as an l1-norm minimization problem becauses is sparse and Q consists of randomly selected rowsof the inverse Fourier transform matrix*.
Using transferred fixed and random samples fromflexible access points, the flexible signal processing
unit conducts the decoding and sensing process asfollows.
First, the decoding signals are decoded using only
fixed samples, which is equivalent to BNyq-rate sampling. Note that aliasing of the sensing signals occurs*

Compressed sensing theory has proved that randomly permutatedFourier ensembles satisfy RIP. Therefore, we can use randomly
selected rows of an inverse Fourier transform matrix as a sensing
matrix because Fourier ensembles and inverse Fourier ensembles
have identical statistical characteristics.

NTT Technical Review

Regular Articles

Non-aliased decoding signal
Aliased sensing signal
D1D2

S1, S2 aliased

Bdec

D2D1 D1D2

Bsens

S1, S2 aliased

D2D1

Frequency

Bdec

BNyq(=2Bdec+Bsens)

BNyq(=2Bdec+Bsens)
Bgrid(=2BNyq=4Bdec+2Bsens)

Fig. 4. Frequency domain representation of fixed samples.

Decoding signal subtracted
Sensing signal reconstructed

S1
Bdec

S2
Bsens

Frequency

Bdec

BNyq(=2Bdec+Bsens)

BNyq(=2Bdec+Bsens)
Bgrid(=2BNyq=4Bdec+2Bsens)

Fig. 5. F requency domain representation of sensing signals reconstructed from fixed andrandom samples after subtraction of the decoding signal.

because the sampling rate is insufficient. However, it
does not cause interference with the decoding signals.
Therefore, the decoding signals can be decoded byusing conventional decoding algorithms withoutaliasing. An example of fixed samples in the frequency
domain is shown in Fig. 4. Although the aliasing of
the sensing signals occurred owing to the insufficient
sampling rate, the decoding signal parts are intact.
Consequently, Nyquist-rate decoding performance isachieved for the decoding signals. Second, the decoding signal is subtracted from both the fixed and random samples. Third, the sensing signals are reconstructed using both fixed and random samples, whose
decoding signals have been subtracted. The reconstruction is done by solving the l1-norm minimization problem. An example of the reconstructed signal
in the frequency domain is shown in Fig. 5. Note thatVol. 9 No. 3 Mar. 2011

only sensing signals are reconstructed because thedecoding signals have been removed. Fourth, thesensing signals are identified in the reconstructedsignal by a conventional spectrum sensing algorithm
such as energy detection.
Some experimental results are shown in Figs. 6 and
7. Experiments were performed on 310-MHz-band
frequency shift keying (FSK) signals transmitted byradio frequency identification (RFID) tags. The RFID
tag bandwidth and the total bandwidths of decoding
signals and sensing signals were 0.3, 1.73, and 6.54
MHz, respectively. The channel between the RFID
tags and a flexible access point was a non-fading
additive white Gaussian noise channel.
Figure 6 compares the theoretical and experimental
symbol error rates for the decoding signal in terms of
Es/No (energy per symbol per noise power spectralRegular Articles

100
TheoryConventional method
Our method

Symbol error rate

10

-1

10-2

10-3

10-4

0

2

4

6

8

10

12

Es/No (dB)

Fig. 6. Symbol error rate comparison.

1.00

Probability of detection success

0.95
0.90
0.85
0.80
Es/No = 20 dB
Es/No = 17.5 dB
Es/No = 15 dB
Es/No = 12.5 dB
Es/No = 10 dB

0.75
0.70
0.65
0.65

0.70

0.75

0.80

0.85

0.90

0.95

1.00

Compression ratio

Fig. 7. Probability of detection success.

density). In the experiment using the conventional
method, only the down-converted decoding signal
was sampled at the Nyquist rate. In the experimentusing our method, the decoding signal and the sens

ing signals were combined in the IF band and sampled
by using our method. The performance curve for our
method matches those for the theoretical and conventional methods well, which shows that our sampling
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Measurement

Reconstruction

Weighted measurement
matrix generation

Weighted reconstruction
matrix generation

Randommeasurement
matrixgeneration

Weightgeneration

Randommeasurement
matrixgeneration

Weightgeneration

Controller

Controller

Flexible access point

Signal processing unit

Fig. 8. Block diagram of compressed sensing with weighted measurement matrix generation.

1
0.9
Detection success rate

0.8
0.7
0.6
0.5
0.4
0.3

No weight
Frequency domain weight
Time domain weight
Time-frequency domain weight

0.2
0.1
0

0.02

0.04

0.06

0.08

0.1

0.12

Compression rate

Fig. 9. Probability of detection success.

method guarantees Nyquist-rate decoding performance for the decoding signal.
The detection success rate is shown in Fig. 7. All
curves show relatively poor performance at a low
compression ratio. This is because reconstruction
fails if the number of samples is insufficient. However, Pd (detection success rate) increases with thecompression ratio. Approximately, 70% of the compression ratio can be achieved when Es/No is higher
than 17.5 dB.
Vol. 9 No. 3 Mar. 2011

3.2 C
 ompressed sensing with weighted measurement matrix
Our goal for the weighted measurement matrix
generation is to reduce the required number of measurements by using prior knowledge of the signal.
A block diagram of compressed sensing withweighted measurement matrix generation is shown in
Fig. 8. The weighted measurement matrix is generated by multiplying the random measurement matrix
and weight matrix, where the weight matrix is generated taking into consideration prior knowledge suchas the signal’s history. Note that identical weighted
and random measurement matrices are generated byboth the flexible access points and the signal processing unit for the reconstruction. If the weight needs tobe updated, necessary parameters are transmitted
from the signal processing unit to the flexible accesspoints.
To verify the efficiency of this method, we conducted an experiment using an RFID signal consisting of a periodically transmitted FSK signal. The total
bandwidth and the received signal bandwidth were 5
and 0.6 MHz, respectively. The time occupancy rateof the received signal was 0.25. Therefore, the timefrequency domain signal sparsity was 0.03. The timeand frequency domain weights were set to 2.0 and 1.5
using the signal reception history. The detection success rates for the conventional method and our
method are compared in Fig. 9. The compression
rates needed for perfect signal detection were 0.13,
Regular Articles

0.12, 0.09, and 0.08, respectively, when the appliedweights were no weight, time domain weight, frequency domain weight, and time-frequency domain
weight. These results confirm that enhanced
compression is achieved by our method.
4. Conclusion
To satisfy the requirement for a unified wirelessplatform, we are developing a flexible wireless system. As a partial fulfillment of such as system, thisarticle described a highly efficient radio wave datacompression method based on currently developed
compressed sensing technology. It also described two
radio wave data compression methods utilizing compressed sensing technology. Experiments results
verified that a compression rate that is slightly higher
than the Nyquist rate of the original sparse signal canbe achieved. Our future research will include developing further enhanced data compression methods interms of realtime operation and practical processing
burden using compressed sensing technology.
References
[1]

[2]



N, Takahashi, K. Akabane, M. Matsuo, M. Ohta, M. Harada, and K.
Okada, “Technologies Towards Networked Objects and Events in theReal World,” NTT Technical Review, Vol. 7, No. 5, 2009.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2009
05sf5.html
H. Shiba, K. Akabane, T. Yamada, and K. Uehara, “A Unified WirelessPlatform Architecture for a Wide Variety of Wireless Systems,” Proc.

of SDR’09 Technical Conference, Dec. 2009.
K. Uehara, K. Araki, and M. Umehira, “Trends in Research andDevelopment of Software Defined Radio,” NTT Technical Review,Vol. 1, No. 4, pp. 10–14, 2003.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2003
07010.pdf[4] E. J. Candès and M. B. Wakin, “An Introduction to Compressive
Sampling,” IEEE Signal Processing Mag., Vol. 25, No. 2, pp. 21–30,
Mar. 2008.
[5] E. J. Candès and T. Tao, “Decoding by Linear Programming,” IEEE
Trans. Inf. Theory, Vol. 51, No. 12, pp. 4203–4215, Dec. 2005.
[6] E. J. Candès and J. Romberg, “l1-magic: Recovery of Sparse Signals
via Convex Programming,” available online atwww.l1-magic.org. Oct. 2005.
[7] A. Cohen, W. Dahmen, and R. Devore, “Compressed Sensing andBest k-term Approximation,” Journal of the American MathematicalSociety, Vol. 22, No. 1, pp. 211–231, Jan. 2009.
[8] E. J. Candès, J. Romberg, and T. Tao, “Robust Uncertainty Principles:
Exact Signal Reconstruction from Highly Incomplete Frequency
Information,” IEEE Trans. Inf. Theory, Vol. 52, No. 2, pp. 489–509,
Feb. 2006.
[9] E. J. Candès, “The Restricted Isometry Property and Its Implications
for Compressed Sensing,” Comptes Rendus Mathematique, Vol. 346,
No. 9-10, pp. 589–592, May 2008.
[10] J. A. Tropp and A. C. Gilbert, “Signal Recovery from Random Measurement via Orthogonal Matching Pursuit,” IEEE Trans. Inf. Theory,
Vol. 53, No. 12, pp. 4655–4666, Dec. 2007.
[11] E. J. Candès and T. Tao, “Near Optimal Signal Recovery from Random Projections: Universal Encoding Strategies?” IEEE Trans. Inf.
Theory, Vol. 52, No. 12, pp. 5406–5245, Dec. 2006.
[12] R. Berinde and R. Indyk, “Sparse Recovery Using Sparse Random
Matrices,” preprint, 2008.
[13] D. Lee, T. Yamada, H. Shiba, Y. Yamaguchi, and K. Uehara, “Combined Nyquist and Compressed Sampling Method for the WirelessMultiband Receiver,” IEICE Trans. Commun., Vol. E93-B, No. 12,
Dec. 2010.
[14] D. Lee, T. Yamada, H. Shiba, Y. Yamaguchi, and K. Uehara, “Timefrequency Domain Weighted Measurement Matrix Generation Method for Compressed Sensing,” IEICE Society Conference, Sep. 2010.
[3]

NTT Technical Review

Regular Articles

Doohwan Lee

Yo Yamaguchi

Takayuki Yamada

Kazuhiro Uehara

Postdoctoral Research Engineer, Wireless Systems Innovation Laboratory, NTT Network
Innovation Laboratories.
He received the B.S. degree and completed the
M.S. course in electrical engineering from Seoul
National University, Seoul, Korea, in 2004 and2006, respectively. He received the Ph.D. degree
in electrical engineering and information systems
from the University of Tokyo in 2009. He is currently working at NTT Network Innovation
Laboratories as a postdoctoral researcher. His
research interests include compressed sensing,flexible wireless systems, software defined radio,
and cognitive radio. He received a Japanese government scholarship (Monbusho) during his
Ph.D. studies.

Research Engineer, Wireless Systems Innovation Laboratory, NTT Network Innovation Laboratories.
He received a B.E. degree from the Department
of Electronics, Faculty of Engineering of Doshisha University, Kyoto, in 2005 and the M.E.
degree in communications and computer engineering from the Graduate School of Informatics
of Kyoto University in 2007. Since joining NTT
Network Innovation Laboratories in 2007, he has
been engaged in research on flexible wirelesssystems. He is a member of IEEE.

Hiroyuki Shiba

Senior Research Engineer, Wireless Systems
Innovation Laboratory, NTT Network Innovation
Laboratories.
He received the B.E. and M.E. degrees from
Gunma University in 1995 and 1997, respectively. Since joining NTT Wireless Systems
Laboratories (now NTT Network Innovation
Laboratories) in 1997, he has been engaged inresearch on software defined radio and cognitive
radio technologies. He received the Young Engineer’s Award from the Institute of Electronics,
Information and Communication Engineers(IEICE) and the 18th Telecom System Technology Award from the Telecommunications
Advancement Foundation in 2001 and 2003,
respectively.

Vol. 9 No. 3 Mar. 2011

Senior Research Engineer, Wireless Systems
Innovation Laboratory, NTT Network Innovation
Laboratories.
He received the B.S. and M.S. degrees inchemistry from Osaka University and theDr.Eng. degree in communication engineeringfrom Tokyo Institute of Technology in 1989,
1991, and 2010, respectively. In 1991, he joined
NTT Radio Communication Systems Laboratories, where he engaged in R&D of MMICs. From1999 to 2001, he was an Associate Manager at
STE Telecommunication Engineering Co., Ltd.,
where he served as a technical consultant on
wireless communications. He took up his current
post in 2001. He is a member of IEEE and
IEICE.

Senior Research Engineer, Supervisor, Group
Leader, Wireless Systems Innovation Laboratory,
NTT Network Innovation Laboratories.
He received the B.E., M.E., and Ph.D. degrees
from Tohoku University, Miyagi, in 1987, 1989,
and 1992, respectively. In 1992, he joined NTT
and engaged in research on array antennas, active
antennas, and indoor propagation in the millimeter-wave and microwave frequency bands. From1997 to 1998, he was a Visiting Associate at the
Department of Electrical Engineering, California
Institute of Technology, USA. From 2003 to
2010, he was a part-time lecturer at the Department of Electrical Engineering, Tohoku University. His current interests include R&D of software defined radio and cognitive radio systems
and millimeter-wave multi-gigabit wireless systems. He is currently serving as Chair of theTechnical Committee on Software Radio, IEICE
Communication Society. He is a General CoChair of the 6th International Conference on
Cognitive Radio Oriented Wireless Networks
and Communications, CrownCom, May 2011.
He was a Guest Editor-in-Chief of the Special
Section on Wireless Distributed Networks,
IEICE Transactions on Communications,
December 2010. He received the Young Engineer’s Award and Excellent Paper Award fromIEICE in 1995 and 1997, respectively, the 1st
YRP Award in 2002, and the 18th Telecom System Technology Award from the Telecommunications Advancement Foundation in 2003,
respectively. He is a senior member of IEEE and
IEICE.

10

Global Standardization Activities

Electromagnetic Compatibility
Standardization Activities in
the Telecommunication Field at
the 2010 IEC/CISPR Seattle Meeting
Kimihiro Tajima†, Yoshiharu Akiyama, Norihito Hirasawa,and Fujio Amemiya
Abstract

This article summarizes recent electromagnetic compatibility (EMC) standardization activities in thetelecommunication field at the 2010 IEC/CISPR Plenary Meeting held in Seattle, Washington, USA,
from October 6 to October 14 and reports on the state of deliberations relevant to NTT’s telecommunication business. As EMC standards are an important issue for the NTT Group, it defines EMC requirements
for the provision of safe and secure telecommunication services.

1. Introduction
The NTT Group maintains in-house technicalrequirements (NTT-TRs) that set out the electromagnetic compatibility (EMC) quality levels to beadhered to when developing or procuring telecommunication equipment and devices. NTT-TRs stipulate EMC requirements (acceptable limits and measurement methods) to ensure safe and secure telecommunication services in terms of emissions (ofelectromagnetic disturbances), immunity (to electromagnetic disturbances), and overvoltage tolerance
capability.
The acceptable EMC limits and measurement
methods specified in NTT-TRs conform to international standards on information technology equipment (ITE) or telecommunication equipment set out
by organizations such as IEC/CISPR (explained
below) and ITU-T SG5 (International Telecommunication Union, Telecommunication Standardization
Sector, Study Group 5) so that enterprises in relatedindustrial sectors either in Japan or abroad can abide† NTT Energy and Environment Systems Laboratory
Musashino-shi, 180-8585 Japan

by the NTT-TRs.
This article summarizes events at the 2010 IEC/CISPR Plenary Meeting held in Seattle, Washington,
USA, from October 6 to October 14, 2010. It provides an update to last year’s article about the 2009
meeting [1].
2. Meeting overview
The Comité International Spécial des Perturbations
Radioélectriques (CISPR)––also known as the International Special Committee on Radio Interference––
is a special committee of the International Electrotechnical Commission (IEC). To ensure that there areconsistent global standards, it issues international
standards for the emission levels of unwanted electromagnetic disturbances from various devices (radio
interference sources) as well as for the apparatus andmethods used to measure such disturbances. The secretariat is located in Geneva, Switzerland.
CISPR membership includes 42 national committees and a number of related international organizations (International Council on Large Electric Systems (CIGRE), European Broadcasting Union (EBU),
European Telecommunications Standards Institute
NTT Technical Review

Global Standardization Activities(ETSI), International Amateur Radio Union (IARU),
and International Telecommunication Union, Radiocommunication Sector (ITU-R)). CISPR standards
function as Horizontal Standards within the IEC.
They are used across all Technical Committees (TCs)
and, as such, impact a wide range of industries.
CISPR comprises a Steering Committee and six
subcommittees (A, B, D, F, H, and I) under the CISPRPlenary Assembly (Fig. 1). Each subcommittee is
responsible for setting standards in its respective
industrial field. Working Groups (WGs), set up to
handle specific themes, meet throughout the year.
The 2010 IEC/CISPR Plenary Meeting was held at

the Washington State Convention & Trade Center inSeattle and lasted for eight days. The Steering Committee, the six subcommittees, 14 WGs, and four jointtask forces (JTFs) met in parallel with the Plenary
Meeting. Japan sent 38 delegates representing the
Ministry of Internal Affairs and Communications, theNational Institute of Information and Communications Technology, universities, corporations, andindustry groups. NTT sent four delegates. This year’s
IEC/CISPR Plenary Meeting was held alongside the74th IEC General Meeting, creating a very large conference that attracted 2800 delegates to some 90 TC
meetings over its two-week run (Photos 1–4).

(Secretary)

Plenary
meeting(Annual meeting)Steering
committee

Radio-interference measurements andSubcommittee A (SC-A)
statistical methods
Interference related to industrial, scientific,
Subcommittee B (SC-B)
and medical (ISM) radio-frequency
EM disturbances related to electric andSubcommittee D (SC-D)
electronic equipment on vehicles anddevices powered by internal-combustion
enginesInterference related to household appliances,
Subcommittee F (SC-F)
tools, lighting, and similar equipment(USA)

Subcommittee H (SC-H) Limits for the protection of radio services(Denmark)

Subcommittee I (SC-I)

EMC of ITE, multimedia equipment,
and receivers.

(Japan)(Germany)(Netherlands)(Japan)Fig. 1. IEC/CISPR organization.

Photo 1. Meeting place: Seattle Convention Center.

Vol. 9 No. 3 Mar. 2011

Photo 2. Meeting.

Global Standardization Activities

Photo 3. Opening ceremony party in IEC General Meeting.

Photo 4. Seattle Tower.

3. Impact of IEC/CISPR standardization
on NTT’s business
NTT Group’s in-house EMC regulations include
EMC standards for telecommunication equipment(in-house standards), which specify the minimum
EMC requirements and operational methods for telecommunication equipment that NTT uses to provide
telecommunication services as well as for telecommunication equipment provided to customers. NTTTRs consist of technical requirements taken from thein-house standards (Fig. 2) [2]. Currently, there arethree TR documents: “Technical requirements forelectromagnetic disturbance emitted from telecommunications equipment (TR550004)”, “Technicalrequirements for electromagnetic immunity of telecommunications equipment (TR549001)”, and“Technical requirements for resistibility of telecommunications equipment to overvoltage and overcurrent (TR189001)”. TR550004 covers electromagnetic
disturbances generated by telecommunication equipment, TR549001 covers the capability of telecommunication equipment to tolerate electromagnetic
disturbances, and TR189001 covers the capability oftelecommunication equipment to tolerate overvoltage. Telecommunication equipment specifications
cite these TRs as EMC requirements. The requirements in TR550004 are mandatory, while those in
TR549001 and TR189001 are currently recommendations.
TR549001 [3] complies with CISPR 22 and, domes­
tically, with the voluntary technical standards definedby the VCCI Council (VCCI). It also incorporates
NTT standards 1.1
EMC for telecommunications equipment
Ver. 3 (Dec 8, 2009)

Regulation
TR for Electromagnetic Disturbances Emitted
from Telecommunication Equipment
NTT-TR550004 Ver.4 (Dec 18, 2009)
Technical
Requirements

Recommendation
TR for Electromagnetic Immunity of
Telecommunications Equipment
NTT-TR549001 Ver. 3 (May 11, 2005)

Recommendation
TR for Resistibility of Telecommunications
Equipment to Overvoltage and Overcurrent
NTT-TR189001 Ver. 1 (Jan 31, 2003)

Fig. 2. NTT-TRs for EMC standards.

international standards from ITU-T and other bodies
as requirements that apply to telecommunicationequipment.
Since December 2009, we have been adding emission regulations for electromagnetic disturbances in
the 1–6 GHz band in conjunction with amendments
to international standards and domestic rulings(CISPR 22 edition 5.2) and have been adopting rules
for conducted disturbances at telecommunication
ports as related VCCI technical standards come into
effect.
TR549001 [4] complies with CISPR 24 and domesNTT Technical Review

Global Standardization Activities

tic rulings (the current CISPR committee of the Information and Communications Council). In Japan,
CISPR 24 formerly operated as a guideline for eachindustry, but the Telecommunication Technology
Committee (TTC) standardized it as JS-CISPR 24
Version 1 in August 2010 as a domestic standard forthe telecommunication industry. We expect that, with
the increasing prevalence of broadband services,more international standards and TRs associated with
TTC standards will be established to cope with EMC
failures in IP (Internet protocol) telecommunicationequipment.
NTT TRs are publicly available from NTT’s International Procurement web page [3], [4].
4. Main issues and discussion at the meeting
4.1 Subcommittee A
CISPR Subcommittee A is engaged in forming baseinternational standards for radio disturbance measurement apparatus and methods. The subcommittee’s main mission is preparing and revising the
CISPR 16 series of standards that specify radio disturbance and immunity measurement apparatus andmethods and are designated as base standards citedby all other CISPR standards.
At the Seattle meeting, NTT proposed a new
impedance stabilization network (ISN) for measuringconducted disturbances at telecommunication ports
to coincide with maintenance to CISPR 16-1-2(Radio disturbance and immunity measuring apparatus––Ancillary equipment––Conducted disturbances). As a result of NTT’s proposal, the inclusion of the
ISN in CISPR 16 will be studied after discussions of
its necessity in Subcommittee I, as described below.
4.2 Subcommittee I
Subcommittee I is involved in creating international standards regarding EMC of ITE, multimedia
equipment, and receivers. This subcommittee prepares and revises emissions standards (CISPR 22 and
CISPR 32) and immunity standards (CISPR 24 and
CISPR 35) for telecommunication equipment. It is
working on three issues that have a direct bearing on
NTT’s business.
(1)	Emission and immunity standards for multimedia equipment(2)	Measurement methods of and limits on disturbances from high-speed power line telecommunication (PLT) equipment(3)	New ISN for measuring conducted disturbancesat telecommunication ports
Vol. 9 No. 3 Mar. 2011

Issue (1) concerns the establishment of emission
standards (CISPR 32) and immunity standards(CISPR 35) that target ITE and broadcast receivers.
Since the functional barrier between them has disappeared, new standards that cover both categories arebeing drawn up. TR550004 (for emissions) andTR549001 (for immunity) are based on the existing
CISPR 22 and CISPR 24 standards, but these TRs are
expected to be replaced once CISPR 32 and CISPR
35 come into effect. The establishment of new standards that will govern NTT’s required EMC performance in the future is therefore a highly relevant
issue for NTT’s business. At the present time, CISPR
32 and CISPR 35 inherit most of the existing provisions without modification, but CISPR 35 is set to
add provisions for testing impulse noise effects on
xDSL (various types of digital subscriber line) services. We envision CISPR 32 being issued at theearliest in one to two years and CISPR 35 being
issued in two to three years.
Issue (2) concerns the addition to the existing
CISPR 22 standard of measurement methods of andlimits on disturbances from PLT equipment. Thisissue has been debated for more than ten years since1999 but no agreement has been reached yet within
CISPR. The Seattle meeting decided to shelve further
official standardization investigation in this area. Disturbances from PLT equipment are already regulated
in Japan under the Radio Act; therefore, the decision
to stop standardization at CISPR has no direct effecton NTT’s business. Nevertheless, the European Committee for Electrotechnical Standardization (CENELEC) is still pushing ahead with standardization:
once a European EN standard has been established,
we presume that it will be incorporated as a CISPR
standard. The original goal of creating a CISPR standard for PLT equipment was to unify in an international standard the many PLT equipment disturbancestandards operating in different countries and regions.
Should an EN standard become a CISPR standard, it
may prompt revisions to Japan’s Radio Act. For thisreason, we should continue to monitor developmentsin this area.
Issue (3) involves the inclusion in CISPR standardsof NTT’s newly developed ISN for measuring conducted disturbances at telecommunication ports.
Conventional ISNs perform well with well-balanced** Balance in this context refers to the electrical balance in the groundplane. A poorly balanced ground plane can lead to communication
signals being radiated as radio disturbance.

L1
AE port

EUT portC

1-a : 1+aC

Asymmetrical transformer

R

Disturbance voltage (dBµV)/current (dBµA)

Global Standardization Activities

Measurement results for a shunt-type ISN
8070Voltage

60
50
40
30
20
10
0

Current1

10Frequency (MHz)Measuring port

R
AE: auxiliary equipment
EUT: equipment under test

ReceiverFig. 3. Diagram of the asymmetric artificial network using
an asymmetrical transformer.

telecommunication lines, such as Ethernet lines. The
problem with conventional ISNs is that they produce
measurement errors when measuring poorly balanced
telecommunication lines. Now that NTT Energy andEnvironment Systems Laboratory has developed a
new ISN that resolves this problem, NTT is pressing
for its inclusion in CISPR standards. Because the new
ISN can be used for more accurate assessments of andcorrespondence to disturbances from ordinary telecommunication lines and xDSL lines, this issue will
impact NTT’s business.
A schematic diagram of the proposed ISN, whichuses an asymmetrical transformer, is shown in Fig. 3.
The way the voltage-characteristic measurements ofa transmission port are improved when a telecommunication device’s electromagnetic disturbance is measured with the proposed measurement apparatus isshown in Fig. 4 [5]. This example demonstrates thatthe proposed measurement apparatus, using an asymmetrical transformer circuit, can measure very poorly
balanced transmission ports (20 dB or less) and thatthe voltage measurements obtained concur with thecurrent characteristics.
4.3 State of discussions at JTFs and other venues
The JTF between CISPR subcommittees A and F(A&F JTF) is examining a simple alternative (CDNE
Disturbance voltage (dBµV)/current (dBµA)(a) When using a shunt-type ISN

80
70
60
50

Voltage

40
30
20
10
0

Current1

10Frequency (MHz)(b) When using conventional ISN

Fig. 4. Measurement results at the telecommunication ports.

method) for measuring radio-frequency disturbancesfrom lighting equipment in the frequency range from30 MHz to 300 MHz by a conducted disturbancemeasurement method that uses coupling decoupling
networks (CDNs) for conducted immunity tests.
Although this examination does not directly involvethe measurement of electromagnetic disturbances intelecommunication equipment or systems, NTT
Group experts are active in the discussions, as theirdirection needs to be monitored because any new
standards will require lower transient noise andsteady-state noise and lower energy consumption
from lighting equipment used in machine rooms anddatacenters. The committee draft on the CDNE
method submitted just prior to the Seattle meeting
was withdrawn because of too many technical deficiencies, according to a comment put forth by the
NTT Group. Instead, the identified issues were discussed point by point. The CDNE method will bedebated again in the A&F JTF after the committee
draft has been revised in the light of the Seattle disNTT Technical Review

Global Standardization Activities

cussions. We feel that it is necessary to continue towatch the correlation between the CDNE method andconventional measurement methods performed in
anechoic chambers.

house regulations, the NTT Group is committed tomaintaining a good electromagnetic environment andproviding high-quality, highly reliable telecommunication services.

5. Concluding remarks

References

This article described the relationship between
NTT’s EMC regulations and IEC/CISPR international standards, the main issues being debated within
CISPR, and the direction of discussions at the Seattle
Plenary Meeting. CISPR will continue to establish
new standards and update existing standards to keep
abreast of the various transformations in the electromagnetic environment, such as the convergence of
telecommunication equipment and broadcasting
equipment driven by broadband-service proliferationand the adoption of PLT and other new transmission
methods caused by the move to intelligent power
control.
Through participation in international EMC standardization processes and active promotion of in-Kimihiro Tajima

[1]

[2]

[3]
[4]
[5]

K. Tajima, Y. Akiyama, and F. Amemiya, “Standardization Activities
in IEC/CISPR for Communications Electromagnetic Compatibility(EMC),” NTT Technical Review, Vol. 8, No. 2, 2010.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2010
02gls.html
N. Hirasawa, Y. Honma, and Y. Akiyama, “Recent Activities Concerning NTT Technical Requirements for Electromagnetic Compatibility,”
NTT Technical Review, Vol. 9, No. 2, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr2011
02fa3.html
NTT-TR: Technical Requirements for Electromagnetic DisturbanceEmitted from Telecommunications Equipment (4th edition).
http://www.ntt.co.jp/ontime/eg/tr/tr.html
NTT-TR: Technical Requirement for Immunity of Telecommunications Equipment (3rd edition).
http://www.ntt.co.jp/ontime/eg/tr/tr.html
N. Hirasawa, Y. Akiyama, and F. Amemiya, “Impedance Stabilization
Networks by Using Asymmetrical Transformer for More Accurate
Conducted Disturbances Measurement on Power Line,” Proc. of EMC
Europe 2010 Wroclaw, Poland.

Norihito Hirasawa

Senior Research Engineer, NTT Energy andEnvironment Systems Laboratories.
He received the B.E. and M.E. degrees fromthe Department of Electronics at Kumamoto
University in 1986 and 1989, respectively. He
joined NTT Telecommunications Networks
Laboratories in 1989. He has been engaged instudies on optical-scheme-based measuringmethods in the EMC field and the developmentof mobile communication systems using infrared
rays for EMC. He is the secretary of the Japanese
National Committee of CISPR Group A. He is amember of IEICE and IEEE.

Engineer, EMC Technology Group, NTT
Energy and Environment Systems Laboratories.
He received the B.E. degree in electrical engineering from Tokyo University of Science,
Chiba, in 1998. He joined NTT Electrical Telecommunication Laboratory in 1998. He has been
researching EMC of broadband communications
such as PLT since 2008.

Yoshiharu Akiyama

Fujio Amemiya

Senior Research Engineer, EMC Technology
Group, Energy System Project, NTT Energy andEnvironment Systems Laboratories.
He received the B.E. degree in communicationengineering from the University of Electro-Communications, Tokyo, in 1990. Since joining NTT
in 1990, he has been researching EMC of broadband communications such as wireless local area
networks, DSLs, and PLT.

Vol. 9 No. 3 Mar. 2011

Senior Research Engineer, NTT Advanced
Technology Corporation.
He received the B.E., M.E., and Dr.Eng.
degrees in communication engineering fromTohoku University, Miyagi, in 1971, 1973, and2007, respectively. He joined the Musashino
Electrical Communication Laboratories, Nippon
Telegraph and Telephone Public Corporation(now NTT) in 1973. He has been involved in thedevelopment of digital telephone sets and in thedesign, evaluation, and EMC testing of communication equipment.

Papers Published in Technical Journals andConference Proceedings
Escaped-Huffman and Adaptive Recursive Rice Coding
for Lossless Compression of the Mapped Domain Linear
Prediction Residual
N. Harada, Y. Kamamoto, and T. Moriya
Proc. of ICASSP 2010, IEEE, pp. 4646–4649, Dallas, Texas,
USA.
ITU-T Recommendation G.711.0 has just been established. It
defines a lossless and stateless compression for G.711 packet payloads (for both A-law and μ-law). This paper introduces some coding
technologies proposed and applied to the G.711.0 codec, such as
Plus-Minus zero mapping for the mapped domain linear predictive
coding and escaped-Huffman coding combined with adaptive recursive Rice coding for lossless compression of the prediction residual.
Performance test results for those coding tools are shown in comparison with the results for the conventional technology. The performance is measured on the basis of the figure of merit (FoM), which
is a function of the trade-off between compression performance andcomputational complexity. The proposed tools improve the compression performance by 0.16% in total while keeping the computational
complexity of the encoder/decoder pair low (about 1.0 WMOPS on
average and 1.667 WMOPS in the worst case).

Emerging ITU-T Standard G.711.0—Lossless Compression of G.711 Pulse Code Modulation
N. Harada, Y. Kamamoto, T. Moriya, Y. Hiwasaki, M. A. Ramalho,
L. Netsch, J. Stachurski, L. Miao, H. Taddei, and F. Qi
Proc. of ICASSP 2010, IEEE, pp. 4658–4661, Dallas, Texas,
USA.
ITU-T Recommendation G.711 is the benchmark standard for narrowband telephony. It has been successful for many decades becauseof its proven voice quality, ubiquity, and utility. A new ITU-T recommendation, denoted G.711.0, has recently been established defining
lossless compression for G.711 packet payloads typically found in IP
networks. This paper presents a brief overview of technologies
employed within the G.711.0 standard and summarizes the compression and complexity results. It is shown that G.711.0 provides greaterthan 50% average compression in typical service provider environments while keeping low computational complexity for the encoder/decoder pair (1.0 WMOPS average, <1.7 WMOPS worst case) andlow memory footprint (about 5 k octets of RAM, 5.7 k octets ofROM, and 3.6 k of program memory measured in the number of basic
operators).

Voice Activity Detection Using Frame-wise Model Re-estimation Method Based on Gaussian Pruning with Weight
Normalization
M. Fujimoto, S. Watanabe, and T. Nakatani
Proc. of INTERSPEECH 2010, Makuhari, Chiba, Japan.
This paper proposes a frame-wise model re-estimation method
based on Gaussian pruning with weight normalization for noise
robust voice activity detection (VAD). Our previous work, switchingKalman-filter-based VAD, sequentially estimates a non-stationarynoise Gaussian mixture model (GMM) and constructs GMMs ofobserved noisy speech signals by composing pre-trained silence andclean GMMs and sequentially estimated noise GMMs. However, thecomposed models are not optimal because they do not fully reflect
the characteristics of the observed signal. Thus, to ensure the optimality of the composed models, we investigate a method for re-estimating the composed model. Since our VAD method works under framewise sequential processing, there are insufficient re-training data forre-estimation of all the model parameters. To solve this problem, we
propose a model re-estimation method that involves the extraction ofreliable information using Gaussian pruning with weight normalization. Namely, the proposed method re-estimates the model by pruning non-dominant Gaussian distributions in expressing the local
characteristics of each frame and by normalizing the Gaussian
weights of the remaining distributions.

Increase of Fundamental Oscillation Frequency in Resonant Tunneling Diode with Thin Barrier and Graded Emitter
Structure
S. Suzuki, A. Teranishi, M. Asada, H. Sugiyama, and H. Yokoyama
Proc. of Infrared Millimeter and Terahertz Waves (IRMMW-THz),Rome, Italy, 2010.
We obtained an increase in the oscillation frequency of resonant
tunneling diodes (RTDs) using a graded emitter and thin barriers for
reduced transit and tunneling times. The fundamental oscillation
frequency of 1.04 THz was achieved with this structure. The dependence of output power on oscillation frequency is also shown. The
output power was around 10 μW in the 0.9–1 THz region.

Wide-range and Fast-tracking Frequency Offset Estimatorfor Optical Coherent Receivers
T. Nakagawa, K. Ishihara, T. Kobayashi, R. Kudo, M. Matsui, Y.
Takatori, and M. Mizoguchi
Proc. of ECOC 2010, Torino, Italy.
A blind spectrum-based frequency offset estimator with fast tracking time is presented. A receiver using the proposed estimator toeliminate the frequency ambiguity of the mth power algorithm canachieve precise estimation over a wide frequency range.

Efficient Secure Auction Protocols Based on the BonehGoh-Nissim Encryption
T. Mitsunaga, Y. Manabe, and T. Okamoto
Proc. of SCIS 2010, IEICE, Takamatsu, Japan.
This paper presents efficient secure auction protocols for first priceauction and second price auction. Previous auction protocols are
based on a generally secure multi-party protocol called the mix-andmatch protocol. However, the time complexity of the mix-and-match
protocol is large, although it can securely calculate any logical circuits. The proposed protocols reduce the number of times the mixand-match protocol is used by replacing them with Boneh-Goh-Nissim encryption, which enables calculation of 2-DNF (disjunctive
normal form) of encrypted data.

NTT Technical Review

Papers Published in Technical Journals and Conference Proceedings

Spatial Pooling of One-dimensional Second-order Motion
Signals
K. Maruya and S. Nishida
Journal of Vision, Vol. 10, No. 13:24, pp. 1–18, 2010.
We can detect visual movements not only from luminance motion
signals (first-order motion) but also from non-luminance motion
signals (second-order motion). It has been established for first-ordermotion that the visual system pools local one-dimensional motion
signals across space and orientation to solve the aperture problem andto estimate two-dimensional object motion. In this study, we investigated (i) whether local one-dimensional second-order motion signals
are also pooled across space and orientation into a global 2D motion
and, if so, (ii) whether the second-order motion signals are pooled
independently of, or in cooperation with, first-order motion signals.
We measured the direction-discrimination performance and the rating of a global circular translation of four oscillating bars, eachdefined either by luminance or by a non-luminance attribute, such as
flicker or binocular depth. The results showed evidence of motion
pooling both when the stimulus consisted only of second-order bars
and when it consisted of first-order and second-order bars. We
observed global motion pooling across first- and second-ordermotions even when the first-order motion was not accompanied bytrackable position changes. These results suggest the presence of auniversal pooling system for first- and second-order one-dimensionalmotion signals.

Creation and Analysis of a Japanese Speaking Style Parallel Database for Expressive Speech Synthesis
H. Nakajima, N. Miyazaki, A. Yoshida, T. Nakamura, and H.
MizunoProc. of Oriental COCOSDA 2010, COCOSDA Asia Section,
Kathmandu, Nepal.
This paper describes a newly developed database for expressive
speech synthesis. This speech database is characterized by two features: i) the sentences are taken from real domains such as sales talk,storytelling, and telephone conversations, where speech is uttered in
expressive (or conversational) style, so sentences are domain-dependent and ii) each sentence is uttered in both reading style and expressive style, so this database stores parallel speaking style speech. This
database is designed to capture the acoustic and prosodic differences
between parallel styles and to elucidate the domain-dependent linguistic characteristics that cause those differences. This paper
describes both the concept of this speech database and the issues
raised by its implementation. We detail the basic characteristics andpreliminary results of two style comparisons to elucidate the linguistic characteristics that contribute to the establishment of expressive
speech synthesis.

Effect of Speech Sound Naturalness on the Neural Basisof Format Frequency Discrimination
S. Hiroya and F. H. Guenther
Proc. of Neuroscience 2010, the Society for Neuroscience, San
Diego, 2010.
Few previous imaging studies of speech perception have investigated the neural mechanisms underlying discriminability of format
frequencies for less natural vowel sounds. First, we developed a novel
method for controlling vowel naturalness on the basis of band-limited
finite impulse response filters related to the first four formats. The
results showed that naturalness was significantly reduced for soundswith decreasing filter bandwidths. Next, we performed a functional

Vol. 9 No. 3 Mar. 2011

magnetic resonance imaging study that investigated the neural basisof formant frequency discrimination in less natural vowel sounds.
The result showed that the left-lateralized premotor cortex was more
activated for less natural sounds, and the area overlapped that ofvowel production. This suggests that the involvement of the premotor
cortex varies depending on speech sound naturalness.

Fast Template Matching Based on Normalized Cross Correlation Using Adaptive Block Partitioning and InitialThreshold Estimation
M. Mori and K. Kashino
Proc. of 2010 IEEE International Symposium on Multimedia, pp.
196–203, Taichung, Taiwan.
This paper proposes a fast template matching method based on
normalized cross correlation (NCC). NCC is more robust against
image variations such as illumination changes than the widely usedsum of absolute difference (SAD). A problem with NCC has been its
high computation cost. To deal with this problem, we use adaptive
block partitioning and initial threshold estimation to extend the multilevel successive elimination algorithm. Adaptive block partitioning
provides efficient sub-block partitioning and tighter boundaries. Initial threshold estimation yields a larger boundary threshold. They
greatly suppress the number of search points at an earlier level fromthe beginning of search. The proposed method is exhaustive androbust with respect to template position and size. Experiments showthat our method is up to 400 times faster than the brute force method
and is significantly faster than conventional methods.

Coded Packet Immediate Access for Contention-based
Wireless Relay Networks
D. Umehara, S. Denno, M. Morikura, and T. Sugiyama
Proc. of the 4th International Conference on Signal Processing andCommunication Systems (ICSPCS), Vol. 1, No. 1, pp. 1–9, Gold
Coast, Australia, 2010.
This paper proposes a medium access control (MAC) protocol
with network coding on relay nodes for contention-based multihop
wireless relay networks. The proposed protocol is called coded
packet priority access (CPPA) protocol in which coded packets havehigher transmission opportunity than non-coded native packets atrelay nodes. In this paper, the performance of coded packet immediate access (CPIA) protocols, which are a subclass of CPPA protocols,
is evaluated for single-relay bidirectional symmetric traffic and upperand lower bounds of analytical throughput are derived for any given
node traffic. It is shown that the lower bound approximates to thethroughput obtained from computer simulations with high accuracy.
The conventional slotted ALOHA protocol with network coding(S-ALOHA/NC) is required to adapt the transmission probability ofa relay node to a rational function of node traffic so as to maximize
the throughput whereas the CPIA protocol achieves the maximize
throughput only if the relay node transmits no native packets. Furthermore it is clarified that the CPIA protocol is superior to the
S-ALOHA/NC protocol in delay for given retransmission probabilities of user nodes.

Enhancement of IEEE 802.11 and Network Coding forSingle-relay Multi-user Wireless Networks
D. Umehara, C. -H. Huang, S. Denno, M. Morikura, and T. SugiyamaPapers Published in Technical Journals and Conference Proceedings

Proc. of the 4th International Conference on Signal Processing andCommunication Systems (ICSPCS), Vol. 1, No. 1, pp. 1–9, Gold
Coast, Australia, 2010.
Network coding is a promising technique for improving system
performance in wireless multihop networks. In this paper, thethroughput and fairness in single-relay multiuser wireless networks
are evaluated. The carrier sense multiple access with collision avoidance (CSMA/CA) protocol and network coding are used in themedium access control (MAC) sublayer in such networks. The fairness of wireless medium access among stations (STAs), the accesspoint (AP), and the relay station (RS) results in asymmetric bidirectional flows via the RS; as a result, the wireless throughput decreases
substantially. To overcome this problem, an autonomous optimization of the minimum contention window size is developed for
CSMA/CA and network coding to assign appropriate transmission
opportunities to both the AP and RS. By optimizing the minimum
contention window size according to the number of STAs, the wireless throughput in single-relay multi-user networks can be improved
and fairness between bidirectional flows via the RS can be achieved.
Numerical analysis and computer simulations enable us to evaluate
the performances of CSMA/CA and network coding in single-relay
multi-user wireless networks.

Efficient Data Gathering for Hierarchical Sensor Networks
Y. Kishino, Y. Sakurai, K. Kamei, T. Maekawa, Y. Yanagisawa, andT. Okadome
Information Processing Society of Japan, Vol. 3, No. 4, pp. 82–93,
2010.
In this paper we propose an efficient data gathering method usinga hierarchical tree topology in a high-density sensor network. The
proposed method gathers sensor data using Singular Value Decomposition (SVD) for each cluster by taking advantage of periodicity andcorrelation among sensor data. It can reduce the amount of data inwireless communication and errors and achieve efficient data gathering. Our experimental result shows that the hierarchical network
topology and data gathering by SVD can reduce the amount of dataand errors when the level of network topology is high.

Single-electron Devices based on Si Nanoscale FETs
K. Nishiguchi and A. Fujiwara
Proc. of Workshop on Innovative Devices and Systems, WINDS,
Hawaii, USA, 2010.
A MOSFET-based circuit utilizing single electrons is demonstrated at room temperature. A nano-wire MOSFET can transfer single
electrons one after another to a storage node thanks to the extremely
small current leakage of the MOSFET. The electrons transferred to
the node are detected by another wire MOSFET, which is locatednear the node. The combination of these nano-wire MOSFETs allows
real-time monitoring of the single-electron transfer, which helps
microscopic understanding of individual electron movement in the
MOSFET. While the MOSFET can control the average movement of
single electrons, each movement of an individual electron is completely random. Such controllability and randomness of electron
movement is used for high-quality random-number generation(RNG) suitable for data processing that stochastically extracts themost preferable pattern among various ones. The MOSFET-based
RNG allows fast operation as well as high controllability, which leads
to flexible extraction of the preferable pattern. This stochastic dataprocessing promises high efficiency, fast operation, and low power

consumption like the human brain.

Risk Management and Intelligence Management during
Emergency
M. Higashida, Y. Maeda, and H. Hayashi
Journal of Disaster Research, Vol. 5, No. 6, pp. 636–637, 2010.
In the 15 years since Kobe’s Hanshin-Awaji Earthquake, awareness is growing that simply gathering information may not be enoughfor preparing systems, executing emergency responses, and making
decisions rapidly and precisely. The question has become how––andwhether––emergency response information can be used effectively
and efficiently for rapid disaster response, recovery, and rebuilding.
We analyzed emergency response decision making from the perspective of information processing, looking for the features organizations
need to process information efficiently. We also propose how to continuously improve emergency response performance.

Query Graph Pattern Optimization for Efficient Discovery
of Implicit Information within Linked Data
R. Sakai, K. Iiduka, H. Sato, T. Murayama, T. Kobayashi, H. Hattori, and T. Ishida
Information Processing Society of Japan, Vol. 51, No. 12, pp.
2298–2309, 2010.
Spreading the use of the Semantic Web and Linked Data has madeit possible to explore new connections between data which were notlinked before. The use of various query graph patterns allows us to
explore such connections and leads us to find potentially useful information; however, this information may not be reliable owing to its
linkages; for example, if the linkage between the data is weak. Moreover, in a huge set of Linked Data, there are too many patterns tofollow and many of them may contain similar semantic connections.
Our goal is to select query graph patterns that allow us to find reliable
information efficiently from a huge number of patterns. We propose
a method to reduce the number of query graph patterns while maintaining the pattern variations to meet different users’ needs. To
achieve high reliability for the information reached, we select thepatterns made of two paths. To ensure wide variations, we classify
existing patterns into some representative categories and keep all thecategories while we reduce the number. By verifying with real datasets, we confirmed that we could reduce the number by up to 9.1% of
its original and also underpinned the reliability of the resulting information.

Bounce Hardness Index of Gravitational Waves
F. Ishiyama and R. Takahashi
Classical and Quantum Gravity, Institute of Physics, Vol. 27, No.
24, p. 245021, 2010.
We present a method of mode analysis to search for signals withfrequency evolution and limited duration in a given data stream. Our
method is a natural expansion of Fourier analysis, and we can obtain
information about frequency evolution with high frequency precisionand high time resolution. Applications of this method to the analysis
of inspiral and burst signals show that the signals are characterized byan index that we name ‘bounce hardness’. The index corresponds to
the growth rate of the signals.

NTT Technical Review

Papers Published in Technical Journals and Conference Proceedings

Fundamental Oscillation of Resonant Tunneling Diodes
above 1 THz at Room Temperature
S. Suzuki, M. Asada, A. Teranishi, H. Sugiyama, and H. Yokoyama
Appl. Phys. Lett., Vol. 97, No. 24, p. 242102, 2010.
Fundamental oscillations up to 1.04 THz were achieved in resonant tunneling diodes at room temperature. A graded emitter and thinbarriers were introduced in GaInAs/AlAs double-barrier resonant
tunneling diodes to reduce the transit time in the collector depletion
region and the resonant tunneling time, respectively. Output powers
were 7 μW at 1.04 THz and around 10 μW in the 0.9–1 THz region.
A change in oscillation frequency of about 4% with bias voltage wasalso obtained.

Performance Analysis of Slotted ALOHA and Network
Coding for Single-relay Multi-user Wireless Networks
D. Umehara, S. Denno, M. Morikura, and T. Sugiyama
Ad Hoc Networks, Vol. 9, No. 2, pp. 164–179, 2011.
Deployment of wireless relay nodes can enhance system capacity,
extend wireless service coverage, and reduce energy consumption in
wireless networks. Network coding enables us to mix two or more

Vol. 9 No. 3 Mar. 2011

packets into a single coded packet at relay nodes and improve performances in wireless relay networks. In this paper, we succeed indeveloping analytical models of the throughput and delay on slotted
ALOHA (S-ALOHA) and S-ALOHA with network coding (SALOHA/NC) for single-relay multi-user wireless networks withbidirectional data flows. The analytical models involve the effects ofqueue saturation and unsaturation at the relay node. The throughput
and delay for each user node can be extracted from the total throughput and delay by using the analytical models. One can formulate
various optimization problems in traffic control in order to maximize
the throughput, minimize the delay, or achieve fairness of thethroughput or the delay. In particular, we clarify that the total
throughput is enhanced in the S-ALOHA/NC protocol on condition
that the transmission probability at the relay node is set to the valueon the boundary between queue saturation and unsaturation. Our
analysis provides achievable regions in throughput on two directional data flows at the relay node for both the S-ALOHA and SALOHA/NC protocols. As a result, we show that the achievable
region in throughput can be enhanced by using network coding andtraffic control.

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