600 V, 20 A
High Voltage 3-phase Motor DriverSIM2-202B

Data Sheet

Description

Package

The SIM2-202B is a high voltage 3-phase motor
driver in which transistors, pre-drive circuits, andbootstrap diodes with current-limiting resistors arehighly integrated. The product can run on a 3-shuntcurrent detection system and optimally control theinverter systems of medium-capacity motors that require
universal input standards. The product uses a compact
DIP40 package and supports an output current of 20 A.

DIP40 (Leadform: 2982, 2983)
Pin Pitch: 1.778 mm
Mold Dimensions: 35.7 mm × 14.6 mm × 4.2 mm

Features● Pb-free (RoHS Compliant)● Isolation Voltage: 2000 V (for 1 min)UL Recognition Pending (File No.: E118037)● Temperature Sensing Function● Built-in Bootstrap Diodes with Current Limiting
Resistors (250 Ω)● CMOS-compatible Input (3.3 V or 5 V)
● Fault Signal Output at Protection Activation● Protections Include:
Undervoltage Lockout for Power Supply
High-side (UVLO_VB): Auto-restartLow-side (UVLO_VCC): Auto-restart
Overcurrent Protection (OCP): Auto-restart
Thermal Shutdown (TSD): Auto-restart,
TSD operation temperature ±5 °C

Not to scale

Specifications● Breakdown Voltage: 600 V● Output Current: 20 A

Application
For motor drive such as air conditioner compressor
motor

CBOOT3

CBOOT2

CP3

CP2

CP1
CBOOT1

Typical Application

U1
VBB
23
20

VB1

VB2
VB3
14
17

HIN1

11 HIN1

HIN2

10 HIN2HIN3

9 HIN3

H-MIC

UV

Controller

W

27
30

M

33

VCC
8 VCC

7 COM

CVCC
LIN1

LIN1

6

LIN2

5 LIN2

LIN3

4

LS1

LIN3

36

LS2
38

L-MIC

5V

LS3
RFO
3

INT

40

FO

CFO
VDC

Controller power supply

DVT

2

1

Thermal

RVT

OCP
VT

CVT

CS

CDC

RO
A/D

CO

DRS1

RS

COM

SIM2-202B-DSE Rev.1.1
SANKEN ELECTRIC CO., LTD.
Aug. 05, 2024
https://www.sanken-ele.co.jp/en© SANKEN ELECTRIC CO., LTD. 2023

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SIM2-202B
Contents
Description ------------------------------------------------------------------------------------------------------ 1
Contents --------------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings----------------------------------------------------------------------------- 4
2. Recommended Operating Conditions ----------------------------------------------------------------- 5
3. Electrical Characteristics -------------------------------------------------------------------------------- 6
3.1. Characteristics of Control Parts------------------------------------------------------------------ 6
3.2. Bootstrap Diode Characteristics ----------------------------------------------------------------- 7
3.3. Thermal Resistance Characteristics ------------------------------------------------------------- 7
3.4. Transistor Characteristics ------------------------------------------------------------------------- 8
4. Mechanical Characteristics ----------------------------------------------------------------------------- 9
5. Insulation Distance ---------------------------------------------------------------------------------------- 9
6. Truth Table ----------------------------------------------------------------------------------------------- 10
7. Block Diagram ------------------------------------------------------------------------------------------- 11
8. Pin Configuration Definitions ------------------------------------------------------------------------- 12
9. Typical Applications ------------------------------------------------------------------------------------ 13
10. Physical Dimensions ------------------------------------------------------------------------------------ 15
10.1. DIP40 (Leadform: 2982) ------------------------------------------------------------------------- 15
10.2. DIP40 (Leadform: 2983) ------------------------------------------------------------------------- 16
10.3. Land Pattern Example (Leadform: 2982) ---------------------------------------------------- 17
10.4. Land Pattern Example (Leadform: 2983) ---------------------------------------------------- 17
10.5. Reference PCB Hole Sizes ----------------------------------------------------------------------- 18
11. Marking Diagram --------------------------------------------------------------------------------------- 19
12. Functional Descriptions -------------------------------------------------------------------------------- 20
12.1. Turning On and Off the IC ---------------------------------------------------------------------- 20
12.2. Pin Descriptions ----------------------------------------------------------------------------------- 20
12.2.1. U, V, and W----------------------------------------------------------------------------------- 20
12.2.2. VB1, VB2, and VB3 ------------------------------------------------------------------------- 20
12.2.3. VCC -------------------------------------------------------------------------------------------- 21
12.2.4. COM ------------------------------------------------------------------------------------------- 21
12.2.5. HIN1, HIN2, and HIN3; LIN1, LIN2, and LIN3 -------------------------------------- 22
12.2.6. VBB -------------------------------------------------------------------------------------------- 22
12.2.7. LS1, LS2, and LS3 -------------------------------------------------------------------------- 22
12.2.8. OCP -------------------------------------------------------------------------------------------- 23
12.2.9. FO ---------------------------------------------------------------------------------------------- 23
12.2.10. VT ---------------------------------------------------------------------------------------------- 24
12.3. Temperature Sensing Function ----------------------------------------------------------------- 24
12.4. Protection Functions ------------------------------------------------------------------------------ 25
12.4.1. Fault Signal Output ------------------------------------------------------------------------- 25
12.4.2. Undervoltage Lockout for Power Supply (UVLO) ----------------------------------- 25
12.4.3. Overcurrent Protection (OCP) ----------------------------------------------------------- 26
12.4.4. Thermal Shutdown (TSD) ----------------------------------------------------------------- 27
13. Design Notes ---------------------------------------------------------------------------------------------- 28
13.1. PCB Pattern Layout ------------------------------------------------------------------------------ 28
13.2. Considerations in Heatsink Mounting -------------------------------------------------------- 28
13.3. Considerations in IC Characteristics Measurement --------------------------------------- 28
14. Calculating Power Losses and Estimating Junction Temperature ---------------------------- 30
14.1. IGBT Steady-state Loss, PON -------------------------------------------------------------------- 30
14.2. IGBT Switching Loss, PSW ----------------------------------------------------------------------- 30

SIM2-202B-DSE Rev.1.1
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SIM2-202B
14.3. Estimating Junction Temperature of IGBT -------------------------------------------------- 30
15. Performance Curves ------------------------------------------------------------------------------------ 31
15.1. Performance Curves of Output Parts --------------------------------------------------------- 31
15.1.1. Output Transistor Performance Curves ------------------------------------------------ 31
15.1.2. Switching Loss Curves --------------------------------------------------------------------- 31
15.2. Allowable Effective Current Curves ----------------------------------------------------------- 32
15.3. Transient Thermal Resistance Curve --------------------------------------------------------- 33
15.4. Short Circuit SOA (Safe Operating Area) --------------------------------------------------- 33
16. Pattern Layout Example ------------------------------------------------------------------------------- 34
17. Typical Motor Driver Application ------------------------------------------------------------------- 36
Important Notes ---------------------------------------------------------------------------------------------- 37

SIM2-202B-DSE Rev.1.1
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Aug. 05, 2024
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SIM2-202B
1.

Absolute Maximum Ratings

Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); current coming
out of the IC (sourcing) is negative current (−).
Unless specifically noted, TA = 25 °C.
Parameter
SymbolConditions
Rating
Unit
Main Supply Voltage (DC)VDC
VBB–LSx
450
V
Main Supply Voltage (Surge)
VDC(SURGE)VBB–LSx
500
V
VCC = 15 V, IC = 100 μA,
IGBT Breakdown Voltage
VCES
600
V
VIN = 0 V
VCC
VCC–COM
0 to 20
Logic Supply Voltage
V
VBS
VBx–U/V/W
0 to 20
Output Current(1)IO
TC = 25 °C, TJ < 150 °C
20A
TC = 25 °C,
pulse width ≤ 100 μs, duty
Output Current (Pulse)
IOP
40
A
cycle = 1%,
single pulse
HINx–COM,
Input Voltage
VIN−0.5 to 7
V
LINx–COM
FO Pin Voltage
VFO
FO–COM−0.5 to 7V
OCP Pin Voltage
VOCP
OCP–COM−10 to 7
V(2)
TC(OP)
Operating Case Temperature−30 to 100
°C
(3)
TJ
Junction Temperature
150
°C
TSTG
Storage Temperature−40 to 150°C
Between surface of heatsink
Isolation Voltage(4)VISO(RMS)
side and each pin; AC, 60 Hz,
2000
V
1 min
(1)

Should be derated depending on an actual case temperature. See Section 15.2.
Refers to a case temperature measured during IC operation.
(3)
Refers to the junction temperature of each chip built in the IC, including the control MICs, transistors, andfreewheeling diodes.
(4)
Refers to voltage conditions to be applied between all of the pins and the case. All the pins have to be shorted.
(2)

SIM2-202B-DSE Rev.1.1
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SIM2-202B
2.

Recommended Operating Conditions
Parameter

SymbolConditions

Min.

Typ.

Max.

Unit

VDC

VBB–COM

—

300

400

V

VCC

VCC–COM

13.5

—

16.5

V

VBS

VBx–U/V/W

13

—

16.5

V

VIN

0

—

5.5

V

tIN(MIN)ON

0.5

—

—

μs

tIN(MIN)OFF

0.5

—

—

μs

Dead Time of Input Signal

tDEAD

1.5

—

—

μs

FO Pin Pull-up Resistor

RFO

3.3

—

10

kΩ

FO Pin Pull-up Voltage

VFO

3.0

—

5.5

V

FO Pin Noise Filter Capacitor

CFO

0.001

—

0.01

μF

(1)

RVT

100

—

—

kΩ

VT Pin Pull-down Capacitor

CVT

0.001

—

0.01

μF

Bootstrap Capacitor

CBOOT

10

—

220

μF

14

—

—

mΩ

Main Supply Voltage
Logic Supply Voltage
Input Voltage(HINx, LINx)
Minimum Input Pulse Width

VT Pin Pull-down Resistor

Shunt Resistor

(2)

RS

IOP ≤ 40 A

(3)

RO

—

—

100

Ω

RC Filter Capacitor

CO

—

—

10

nF

PWM Carrier Frequency

fC

—

—

20

kHz

RC Filter Resistor(1)

Refers to a combined resistance with the input impedance of the microcontroller.
Should be a low-inductance resistor.
(3)
Requires the time constants that satisfy the following equation (see also Section 12.4.3): R O × CO < 1.0 μs .
(2)SIM2-202B-DSE Rev.1.1
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SIM2-202B
3.

Electrical Characteristics

Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); current coming
out of the IC (sourcing) is negative current (−).
Unless specifically noted, TA = 25 °C, VCC = 15 V.

3.1.

Characteristics of Control Parts
Parameter

SymbolConditions

Min.

Typ.

Max.

Unit

Power Supply Operation
Logic Operation Start Voltage
Logic Operation Stop Voltage

VCC(ON)

VCC–COM

10.5

11.5

12.5

V

VBS(ON)VBx–U/V/W

9.5

10.5

11.5

V

VCC(OFF)

VCC–COM

10.0

11.0

12.0

V

VBS(OFF)VBx–U/V/W

9.0

10.0

11.0

V

—

2.1

—

mA

—

85

180

μA

VIH

—

2.0

2.5

V

VIL

1.0

1.5

—

V

ICC
Logic Supply Current

IBS

Input Signal
High Level Input Threshold Voltage(HINx, LINx)
Low Level Input Threshold Voltage(HINx, LINx)
High Level Input Current(HINx, LINx)
Low Level Input Current(HINx, LINx)
Fault Signal Output
FO Pin Voltage at Fault Signal
OutputFO Pin Voltage in Normal Operation

VBx–U/V/W = 15 V,
HINx = 5 V; VBx pin
current in 1-phase operation

IIH

VIN = 5 V

—

250

500

μA

IIL

VIN = 0 V

—

—

2

μA

VFOL

VFO = 5 V, RFO = 10 kΩ

0

—

0.5

V

VFOH

VFO = 5 V, RFO = 10 kΩ

4.8

—

—

V

OCP Threshold Voltage

VTRIP

OCP–COM

0.475

0.50

0.525

V

OCP Blanking TimetBK(OCP)

VOCP = 1.0 V

—

370

—

ns

5

10

—

ms

Protection

OCP Hold TimetP
(1)(2)VT

TJ(L-MIC) = 125 °C

3.016

3.142

3.268

V

(2)

TDH

No heatsink

115

120

125

°C

(2)

TDL

No heatsink

95

100

105

°C

Temperature Sensing Voltage
TSD Operating Temperature
TSD Releasing Temperature(1)(2)

Determined by the junction temperature of the low-side control parts, but not of the output transistors.
Guaranteed by design.

SIM2-202B-DSE Rev.1.1
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SIM2-202B
3.2.

Bootstrap Diode Characteristics
Parameter

SymbolConditions

Min.

Typ.

Max.

Unit

Bootstrap Diode Leakage Current

ILBD

VR = 600 V

—

—

10

μA

Bootstrap Diode Forward Voltage(1)VFB

IFB = 10 mA

—

3.6

—

V

Bootstrap Diode Series Resistor

RBOOT

TC = 25 °C

—

250

—

Ω

Conditions
1 element operating(IGBT)
1 element operating(freewheeling diode)

Min.

Typ.

Max.

Unit

—

—

3.0

°C/W

—

—

3.6

°C/W

3.3.

Thermal Resistance Characteristics
Parameter

SymbolR(J-C)Q(3)Junction-to-Case Thermal Resistance(2)

R(J-C)F(4)(1)

Includes a voltage drop in the current-limiting resistor.
Refers to a case temperature at the measurement point described in Figure 3-1, below.
(3)
Refers to steady-state thermal resistance between the junction of the built-in transistors and the case. For transient
thermal characteristics, see Section 15.3.
(4)
Refers to steady-state thermal resistance between the junction of the built-in freewheeling diodes and the case.
(2)

20

1

21

40
Measurement point

Figure 3-1.

Case Temperature Measurement Point

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SIM2-202B
3.4.

Transistor Characteristics
HINx/
LINx
0

trr
ton

td(on) trIC

toff
td(off) tf
90%

10%

0

VCE

0

Figure 3-2.
Parameter
Collector-to-Emitter Leakage
Current
Collector-to-Emitter Saturation
Voltage
Diode Forward Voltage

Switching Characteristics Definitions

SymbolConditions

Min.

Typ.

Max.

Unit

ICES

VCE = 600 V, VIN = 0 V

—

—

1

mA

VCE(SAT)IC = 20 A, VIN = 5 V

—

1.7

2.20

V

VF

IF = 20 A, VIN = 0 V

—

1.65

2.05

V

—

120

—

ns

—

1220

—

ns

—

70

—

ns

—

800

—

ns

—

40

—

ns

—

120

—

ns

—

1300

—

ns

—

110

—

ns

—

800

—

ns

—

70

—

ns

High-side Switching
Diode Reverse Recovery Time
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Timetrrtd(ON)trtd(OFF)VDC = 300 V,
IC = 15 A,
VIN = 0→5 V or 5→0 V,
TJ = 25 °C,
inductive loadtf

Low-side Switching
Diode Reverse Recovery Time
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Timetrrtd(ON)trtd(OFF)VDC = 300 V,
IC = 15 A,
VIN = 0→5 V or 5→0 V,
TJ = 25 °C,
inductive loadtfSIM2-202B-DSE Rev.1.1
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SIM2-202B
4.

Mechanical Characteristics
Parameter

Conditions

Min.

Typ.

Max.

Unit

Heatsink Mounting Screw Torque
*
0.588
—
0.784
N∙m
Flatness of Heatsink Attachment
See Figure 4-1.
0
—
100
μm
Area
Package Weight—6—g* Requires using a metric screw of M3 and a plain washer of 7 mm (φ). For more on screw tightening, see Section 13.2.
Heats sink+-

Heat sink
Measurement
position- +Figure 4-1.

5.

Flatness Measurement Position

Insulation DistanceParameter

Clearance

Conditions
Between heatsink* and leads.
See Figure 5-1.

Min.

Typ.

Max.

Unit

—

1.98

—

mm

Creepage
3.2——mm* Refers to when a heatsink to be mounted is flat. If your application requires a clearance exceeding the maximum
distance given above, use an alternative (e.g., a convex heatsink) that will meet the target requirement.

Creepage
Clearance
Heatsink

Figure 5-1.

Insulation Distance Definitions

SIM2-202B-DSE Rev.1.1
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SIM2-202B
6.

Truth Table

Table 6-1 is a truth table that provides the logic level definitions of operation modes.
In the case where HINx and LINx pin signals in each phase are high at the same time, both the high- and low-side
IGBTs become on (simultaneous on-state). Therefore, the input signals for the HINx and LINx pins, require dead time
setting so that such a simultaneous on-state event can be avoided.
After the IC recovers from a UVLO_VCC condition, the high- and low-side transistors resume switching, according
to the input logic levels of the HINx and LINx signals (level-triggered).
After the IC recovers from a UVLO_VB condition, the high-side transistors resume switching at the next rising edgeof an HINx signal (edge-triggered).
Table 6-1.
Mode

Normal Operation

Undervoltage Lockout for High-side
Power Supply (UVLO_VB)

Undervoltage Lockout for Low-side
Power Supply (UVLO_VCC)

Overcurrent Protection (OCP)

Thermal Shutdown (TSD)

HINx
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H

Truth Table for Operation Modes
LINx
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H

High-side Transistor
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
ON
OFF
ON

SIM2-202B-DSE Rev.1.1
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Low-side Transistor
OFF
OFF
ON
ON
OFF
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF

10

SIM2-202B
7.

Block Diagram

VB1
19 NC
20

17 VB2
16 NC

14

VB3

13 NC

H-MIC
VBB 23
UVLO

UVLO

UVLO

UVLO
HO3

11

HIN1

HO2
HO1

10 HIN2

Input Logic

9 HIN3High-side Level Shift
Driver

U 27
V 30
W

8 VCC

33

L-MIC

7 COM

UVLO

LO3

LIN1

6
5 LIN24 LIN3

Input Logic

Low-side Driver

LO2

LO1

LS1

OCP
reg

TSD

LS2
LS3

3 FO

36
38
40

2 OCP
1

VT

ThermalMonitor(VT)

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SIM2-202B
8.

Pin Configuration Definitions
Top View
LS3

1

VT

2

OCP

3

FO

4

LIN3

5

LIN2

6

LIN1

35

7

COM

34

8

VCC

9

HIN3

32

10

HIN2

31

11

HIN1

12

COM

29

13

NC

28

14

VB3

40
39

LS2

38

37

LS1

W

V

U

15

36

33

30

16

NC

25

17

VB2

24

VBB

Pin
Name
VT
OCP
FO1
LIN3
LIN2
LIN1
COM
VCC
HIN3
HIN2
HIN1
COM
NC

14

VB3

15
16
17
18
19
20
21
22
23
24
25
26

—
NC
VB2
—
NC
VB1
—
—
VBB
—
—
—

27

U

28
29

—
—

30

V

31
32

—
—

33

W

34
35
36
37
38
39
40

—
—
LS1
—
LS2
—
LS3

27

26

18

Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13

23

19

NC

22

20

VB1

21

Description
Temperature sensing voltage output
Input for overcurrent protection
Fault signal output
Logic input for W-phase low-side gate driver
Logic input for V-phase low-side gate driver
Logic input for U-phase low-side gate driver
Logic ground
Logic supply voltage input
Logic input for W-phase high-side gate driver
Logic input for V-phase high-side gate driver
Logic input for U-phase high-side gate driver(Pin trimmed) logic ground(Pin trimmed) no connection
W-phase high-side floating supply voltage
input
Pin removed(Pin trimmed) no connection
V-phase high-side floating supply voltage input
Pin removed(Pin trimmed) no connection
U-phase high-side floating supply voltage input
Pin removed
Pin removed
Positive DC bus supply voltage
Pin removed
Pin removed
Pin removed
U-phase output / U-phase high-side floating
supply groundPin removed
Pin removed
V-phase output / V-phase high-side floating
supply groundPin removed
Pin removed
W-phase output / W-phase high-side floating
supply groundPin removed
Pin removed
U-phase IGBT emitter
Pin removed
V-phase IGBT emitter
Pin removed
W-phase IGBT emitter

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SIM2-202B
9.

Typical Applications

CBOOT3CP3

CBOOT2

CP2

CP1
CBOOT1

CR filters and Zener diodes should be added to your application as needed. This is to protect each pin against surge
voltages causing malfunctions, and to avoid the IC being used under the conditions exceeding the absolute maximum
ratings where critical damage is inevitable. Then, check all the pins thoroughly under actual operating conditions toensure that your application works flawlessly.

U1
VBB
23
20

VB1

VB2
VB3
14
17

11 HIN1

HIN1

H-MIC

10 HIN2
9 HIN3

HIN2

HIN3

U
V

Controller

W

27
30

M

33

VCC
8 VCC

7 COM

CVCC
LIN1
5 LIN2
LIN3
6

LIN1

LIN2

LS1

36

4

LIN3

LS2
38

L-MIC

5V

LS3
RFO
3

INT

40

FO

CFO
VDC

Controller power supply

DVT

2

1

Thermal

RVT

OCP
VT

CVT

CS

CDC

RO
A/D

CO

DRS1

RS

COM

Figure 9-1.

Typical Application Using a Single Shunt Resistor

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CBOOT3

CP3

CBOOT2CP2

CBOOT1

CP1

SIM2-202B

U1

VBB
23
20

VB1

VB2
VB3
14
17

11 HIN1

HIN1

H-MIC

10 HIN2
9 HIN3

HIN2
HIN3

U

V

Controller

W

27
30

M

33

VCC
8 VCC
7 COM

CVCC
LIN1
5 LIN2
LIN3
6

LIN1
LIN2

4

LIN3

L-MIC

5V
RFO
3

INT

FO

CFO
LS1

36

VDC

Controller power supply
2

DVT

1

Thermal

RVT

OCP

LS2

38

VT
LS3

CVT

40

CS

CDC

RO3

CO3

A/D

CO2

RO2

CO1 RO1
DRS3
RS3
DRS2
RS2
DRS1
RS1

COM

Figure 9-2.

Typical Application Using Three Shunt Resistors

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14

SIM2-202B
10. Physical Dimensions

5.51 ±0.25

10.1. DIP40 (Leadform: 2982)
0.93 ±0.1
1.05(1.42)

0.9

1.13MAX
C

7-0.62

1.05 ±0.1

D

+0.1
-0.05

□ value: typical

Ｂ：３．５５６±０．２５

7.112 ±0.25

A

A

A

B

Enlarged view of B

Enlarged view of A (S = 10/1)

Ａ：５．３３４±０．２５

B(S=5:1)30.226 ±0.4
（Ends of pin）
+0.1
-0.05

B

GATE

Data Matrix areaA

(R0.5)

14

13 12
11 10 9

8

7

6

5

4

3

2

1

0.541

11.55

(Root of pin)
33.782 ±0.4

4.2 ±0.2

(2ﾟ)

17 16

8.63 ±0.3

20 19(Ends of pin)Pin 1 indicator

16.7 ±0.1※(Root of pin)

40

(Excludes mold flash)

38

FRAME

36

14.6 ±0.1

3317.25 ±0.430(Ends of pin)

GATE

27

1.3

23

2-3.3 ±0.1

32.7 ±0.1※+0.3

10.8 -0.4

0.42

8.63 ±0.335.7 ±0.3(Excludes mold flash)(Ends of pin)

※Gate burrs occur on either the left or right

10.8

+0.3
-0.4

(Ends of pin)AAAC C C C C C C C C C

5.51 ±0.25

14-0.52

+0.1
-0.05

E
+0.1
-0.05

+0.1

1.32 -0.05(7.31)

1.32

Ａ：５．３３４±０．２５

40

38

33

(1.5)

30

Ｃ：１．７７８±０．２５27Enlarged view of C

Enlarged view of D

(S=5:1)(S=5:1)23(6.28)

36(11.6)(1.5)(S=2:1)

0.63

+0.1
-0.05

1.00

+0.1
-0.05

TOP View(25.9)

1

2

3

4

5

6

7

8

9 10 11 12 13 14

16 17

19 20

Enllarged view of E
(S=5:1)NOTES:● Dimensions in millimeters● Dimensions exclude gate burrs. The actual gate may be generated on either the right or left side as illustrated.
● Pb-free (RoHS compliant)● Ejector pin marks left on the branding side include “○” and “◎”.

SIM2-202B-DSE Rev.1.1
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SIM2-202B

5.51±0.25

10.2. DIP40 (Leadform: 2983)

C

1.32

7-0.62

0.63

+0.1
-0.05

1.00

+0.1
-0.05

D

+0.1
-0.05

+0.1
-0.05

1.32

+0.1
-0.05

Ｂ：３．５５６±０．２５
Ａ：５．３３４±０．２５

B

GATE

2
ﾟ

A

9

Data Matrix area

(R0.5)

Pin 1 inducator
13 12
11 10 9

8

7

6

5

4

3

2

1

11.55
33.782 ±0.4

0.541
（Root of pin）

（Ends of pin）
A

AA

C C C C C C C C C C

4.2 ±0.2

33

36

30

27

23

25.9

1

2

3

4

5

6

7

8

9 10 11 12 13 14

16 17

19 20

0.93 ±0.1
1.05

+0.1

1.13MAX5.51 ±0.25

38

14 ±0.45

14-0.52 -0.05(7.31)

E(S=2:1)40

1.05 ±0.1

0.9

14

(2ﾟ)

17 16

8.74 ±0.35（Ends of pin）

20 19

TOP View(1.41)※(6.28)

40(1.42)

38

(1.5)

36

(11.6)

33（Root of pin）

30

(S=5:1)

14 ±0.45（Ends of pin）

27

17.48 ±0.45

23

GATE

1.3

※

Enlarged view of E

(S=5:1)

+0.1
-0.05

32.7 ±0.1

Enlarged view of D

(S=5:1)0.42

35.7 ±0.3（Excludes mold flash）

8.74 ±0.35（Ends of pin）

* Gate burrs occur on either the left or right.

（Ends of pin）

Enlarged view of C

(1.5)

B

16.7 ±0.1

B（Excludes mold flash）

A

FRAME

A

30.226 ±0.4

2-3.3 ±0.1

A14.6 ±0.1

7.112 ±0.25

Ａ：５．３３４±０．２５
Ｃ：１．７７８±０．２５□ value: typical

Enlarged vie of C (S = 10/1)

Enlarged view of B
(S=5:1)NOTES:● Dimensions in millimeters● Dimensions exclude gate burrs. The actual gate may be generated on either the right or left side as illustrated.
● Pb-free (RoHS compliant)● Ejector pin marks left on the branding side include “○” and “◎”.

SIM2-202B-DSE Rev.1.1
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SIM2-202B
10.3. Land Pattern Example (Leadform: 2982)
Pin 40Pin 23

8.625
0.541
φ9

0.541
32.7

17.25

φ9
8.625

Pin 1

Pin 201.778

Unit: mm

10.4. Land Pattern Example (Leadform: 2983)
Pin 40Pin 23
8.74

0.541

φ9

0.541

32.7

17.48

φ9
8.74

Pin 1

Pin 201.778

Unit: mm

SIM2-202B-DSE Rev.1.1
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SIM2-202B
10.5. Reference PCB Hole Sizes
With stopper
1.25

1.7

0.85

1.1

1.6

2.0

Pins 1 to 20

1.6

2.0

1.6

2.0

Pins 23 to 40

Without stopper
1.478

1.7

1.0

1.1

1.6

Pins 1 to 20

2.078

Pins 23 to 40
Unit：mm

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SIM2-202B
11. Marking Diagram
21
40

Branding Side
20
1

21

40

SIM2-202B

Part Number

YMDD

20

Control Symbol

1

Lot Number:
Y is the last digit of the year of manufacture (0 to 9)
M is the month of the year (1 to 9, O, N, or D)
DD is the day of the month (01 to 31)

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SIM2-202B
12. Functional Descriptions
All the characteristic values given in this section are
typical values, unless they are specified as minimum or
maximum.
For pin descriptions, this section employs a notation
system that denotes a pin name with the arbitrary letter“x”, depending on context. The U-, V-, and W-phases
are represented as the pin numbers 1, 2, and 3,
respectively. Thus, “the VBx pin” is used when referring
to any or all of the VB1, VB2, and VB3 pins.

Table 12-1. CBOOTx Capacitance vs. Charging Time atStartup
CBOOTx Capacitance (μF)

Reference Charging Time (s)

10

0.5

22

0.5

47

0.5

100

1.0

220

1.0

12.1. Turning On and Off the IC
The procedures listed below provide recommended
startup and shutdown sequences. To turn on the IC
properly, do not apply any voltage on the VBB, HINx,
and LINx pins until the VCC pin voltage has reached astable state (VCC(ON) ≥ 12.5 V). It is required to fully
charge bootstrap capacitors, CBOOTx, at startup (seeSection 12.2.2).
To turn off the IC, set the HINx and LINx pins tologic low (or “L”), and then decrease the VCC pin
voltage.

12.2. Pin Descriptions
12.2.1. U, V, and W
These pins are the outputs of the three phases, andserve as the connection terminals to the 3-phase motor.
These pins are the grounds of the high-side floating
power supplies for each phase, and are connected to thenegative nodes of bootstrap capacitors, CBOOTx.

12.2.2. VB1, VB2, and VB3
These are the inputs of the high-side floating power
supplies for the individual phases.
Voltages across the VBx and U/V/W pins should bemaintained within the recommended range (i.e., theLogic Supply Voltage, VBS) given in Section 2.
In each phase, a bootstrap capacitor, CBOOTx, should
be connected between the VBx and U/V/W pins. For
proper startup, turn on the low-side transistor first, thenfully charge the bootstrap capacitor, CBOOTx. Table 12-1
shows a relation between the charging time and thecapacitance of CBOOTx at startup.

For the capacitance of the bootstrap capacitors,
CBOOTx, choose the values that satisfy Equations (1) and(2). Note that capacitance tolerance and DC bias
characteristics must be taken into account when you
choose appropriate values for CBOOTx.
CBOOT (μF) > 800 × t L(OFF) (s)(1)

10 μF ≤ CBOOTx ≤ 220 μF(2)

In Equation (1), let tL(OFF) be the maximum off-time of
the low-side transistor (i.e., the non-charging time of
CBOOTx), measured in seconds.
Even while the high-side transistor is off, voltage
across the bootstrap capacitor keeps decreasing due topower dissipation in the IC. When the VBx pin voltage
decreases to VBS(OFF) or less, the high-side undervoltage
lockout (UVLO_VB) starts operating (see Section
12.4.2.1). Therefore, actual board checking should bedone thoroughly to validate that voltage across the VBx
pin maintains over 11.0 V (VBS > VBS(OFF)) during a lowfrequency operation such as a startup period.
As Figure 12-1 shows, a bootstrap diode, DBOOTx, anda current-limiting resistor, RBOOTx, are internally placed
in series between the VCC and VBx pins.

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SIM2-202B
VCC

DBOOT1VCC
8RBOOT1
DBOOT2
RBOOT2
DBOOT3

RBOOT3

U1

VB1
20

CBOOT2

VB2
17

7

L-MIC

HOx

R
U/V/W

CBOOT3
COM 7

Figure 12-2.

Internal Level-shifting Circuit

M

33 W

HINx

LO3

LO2
LO1

Set
Pulse
generator Reset

Q

27 U
30 V

COM

Input
logic

HINx

HO3

H-MIC

S

VB3
14
VBB
23
VDC

HO2
HO1

VBx

CBOOT1

0

LS1
36
LS2
38
40 LS3

Set
0
RS

Reset
0

Figure 12-1.

Bootstrap Circuit

Figure 12-2 shows an internal level-shifting circuit. A
high-side output signal, HOx, is generated according toan input signal on the HINx pin. When an input signal
on the HINx pin transits from low to high (rising edge),a “Set” signal is generated. When the HINx input
signal transits from high to low (falling edge), a “Reset”
signal is generated. These two signals are thentransmitted to the high-side by the level-shifting circuit
and are input to the SR flip-flop circuit. Finally, the SR
flip-flop circuit feeds an output signal, Q (i.e., HOx).
Figure 12-3 is a timing diagram describing how noiseor other detrimental effects will improperly influence thelevel-shifting process. When a noise-induced rapid
voltage drop between the VBx and U/V/W pins (“VBx–
U/V/W”) occurs after the Set signal generation, the next
Reset signal cannot be sent to the SR flip-flop circuit.
And the state of an HOx signal stays logic high (or “H”)
because the SR flip-flop does not respond. With the
HOx state being held high (i.e., the high-side transistor
is in an on-state), the next LINx signal turns on the lowside transistor and causes a simultaneously-on condition,
which may result in critical damage to the IC.
To protect the VBx pin against such a noise effect,
add a bootstrap capacitor, CBOOTx, in each phase. CBOOTx
must be placed near the IC and be connected between
the VBx and U/V/W pins with a minimal length oftraces.
To use an electrolytic capacitor, add a 0.01 μF to 0.1
μF bypass capacitor, CPx, in parallel near these pins used
for the same phase.

VBx–
U/V/W
0

VBS(ON)VBS(OFF)
Stays logic highQ
0

Figure 12-3.

Waveforms at VBx–U/V/W Voltage
Drop

12.2.3. VCC
This is the logic supply pin for the built-in control
MICs. The VCC pin is internally connected to the highside MIC and low-side MIC. To prevent malfunction
induced by supply ripples or other factors, put a 0.01 μF
to 0.1 μF ceramic capacitor, CVCC, near this pin. To
prevent damage caused by surge voltages, put an 18 V to
20 V Zener diode, DZ, between the VCC and COM pins.
Voltages to be applied between the VCC and COM
pins should be regulated within the recommended
operational range of VCC, given in Section 2.

12.2.4. COM
This is the logic ground pin for the built-in control
MICs. The COM pin is internally connected to the highside MIC and low-side MIC. Varying electric potentialof the logic ground can be a cause of improper
operations. Therefore, connect the logic ground as closeand short as possible to a shunt resistor, RS, at a singlepoint ground (or star ground) which is separated fromthe power ground (see Figure 12-4). Moreover, extreme
care should be taken in designing a PCB so that currents
from the power ground do not affect the COM pin.

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SIM2-202B
U1

VDC

VBB 23CS

CDC
LS1 367 COM

LS2 38RS

LS3 40

OCP

Figure 12-4.

Create a single-point
ground (a star ground) nearRS, but keep it separated
from the power ground.

Table 12-2. Input Signals for HINx and LINx Pins
Parameter
Input
Voltage
Input Pulse
Width
PWM
CarrierFrequency
Dead TimeHigh Level Signal

Low Level Signal

2.5 V < VIN < 5.5 V

0 V < VIN < 1.0 V≥0.5 μs≥0.5 μs≤20 kHz≥1.0 μs

U1

5V

Connections to Logic Ground12.2.5. HIN1, HIN2, and HIN3;
LIN1, LIN2, and LIN3
These are the logic supply pins for the built-in control
MICs. The HINx pin acts as a high-side controller; theLINx pin acts as a low-side controller. Figure 12-5
shows an internal circuit diagram of the HINx or LINx
pin. This is a CMOS Schmitt trigger circuit with a builtin 22 kΩ pull-down resistor, and its input logic is active
high.
Input signals across the HINx-COM and the LINxCOM pins in each phase should be set within the ranges
provided in Table 12-2, below. Note that dead time
setting must be done for HINx and LINx signals because
the IC does not have a dead time generator.
The higher PWM carrier frequency rises, the more
switching loss increases. Hence, the PWM carrier
frequency must be set so that operational casetemperatures and junction temperatures have sufficientmargins against the absolute maximum ranges, specified
in Section 1.
If the signals from the microcontroller become
unstable, the IC may result in malfunctions. To avoid
this event, the outputs from the microcontroller output
line should not be high impedance. Also, if the tracesfrom the microcontroller to the HINx or LINx pin (orboth) are too long, the traces may be interfered by noise.
Therefore, it is recommended to add an additional filter
or a pull-down resistor near the HINx or LINx pin as
needed (see Figure 12-6).
Here are filter circuit constants for reference:
RIN1x: 33 Ω to 100 Ω
RIN2x 1 kΩ to 10 kΩ
CINx: 100 pF to 1000 pF
Care should be taken in adding RIN1x and RIN2x to thetraces. When they are connected to each other, the input
voltage of the HINx and LINx pins becomes slightly
lower than the output voltage of the microcontroller.

2 kΩ

HINx
(LINx)22 kΩ

COMFigure 12-5.

Internal Circuit Diagram of HINx or
LINx Pin
U1

Input
signal

RIN1
HINx(LINx)RIN2

CIN

Controller

Figure 12-6.

Filter Circuit for HINx or LINx Pin

12.2.6. VBB
This is the input pin for the main supply voltage, i.e.,
the positive DC bus. All of the IGBT collectors of thehigh-side are connected to this pin. Voltages between
the VBB and COM pins should be set within therecommended range of the main supply voltage, V DC,
given in Section 2.
To suppress surge voltages, put a 0.01 μF to 0.1 μF
bypass capacitor, CS, near the VBB pin and anelectrolytic capacitor, CDC, with a minimal length of
PCB traces to the VBB pin.

12.2.7. LS1, LS2, and LS3
These are the emitter pins of the low-side IGBTs andare externally connected to a shunt resistor, RS.
When connecting a shunt resistor, use a resistor with

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SIM2-202B
low inductance, and place it as near as possible to the IC
with a minimum length of traces to the LSx and COM
pins. Otherwise, malfunction may occur because alonger circuit trace increases its inductance and thusincreases its susceptibility to improper operations. In
applications where long PCB traces are required, add afast recovery diode, DRS, between the LSx and COM
pins in order to prevent the IC from malfunctioning.
U1

VBB 23VDC
CS
CDC

LS1 36RS

LS2 387 COM

DRS

LS3 40OCP

Add a fast recovery
diode to a long trace.

Figure 12-7.

Put a shunt resistor near
the IC with a minimum
length to the LSx pin.

delay time is a period of time which starts when the IC
receives a fault flag turning on the internal transistor,
QFO, and continues until when the FO pin reaches its
threshold voltage (VIL) of 1.0 V or below (put simply,
until the time when the IC detects a low state, “L”).
Figure 12-11 shows the relationship between CFO andthe FO pin delay time. For avoiding repeated OCP
activations, the external microcontroller must shut off
any input signals to the IC within a fixed hold time, tP,
after the internal transistor (QFO) turn-on. tP is 5 ms
where minimum values of thermal characteristics aretaken into account (for more details, see Section 12.4.3).
When VIL = 1.0 V, the reference value of CFO is0.001 μF to 0.01 μF.
Motor operation must be controlled by the external
microcontroller so that it can immediately stop the motor
when fault signals are detected. To resume the motor
operation thereafter, set the motor to be resumed after alapse of ≥2 seconds.
VFO

U1

5V

RFO

Connections to LSx Pin

100 kΩ

FO
3

INT

50 Ω

12.2.8. OCP
This pin serves as the input of the overcurrent
protection (OCP) for monitoring the currents going
through the output transistors. Section 12.4.3 provides
further information about the OCP circuit configurationand its mechanism.

CFO

7

Figure 12-8.

12.2.9. FO

COMInternal Circuit Diagram of FO Pin and
Its Peripheral Circuit
QFO

ON

FO PinVoltagetD(FO)

VIL

0

Figure 12-9.

Fault Signal Voltage (V)This pin operates as the fault signal output. For moredetails, see Section 0.
Figure 12-8 illustrates an internal circuit diagram of
the FO pin and its peripheral circuit. The 100 kΩ pull-up
resistor is connected to the FO pin in the internal circuit,but the FO pin should be tied by a pull-up resistor, RFO,
to the external power supply to suppress the noise effect.
The external power supply voltage (i.e., the FO Pin Pullup Voltage, VFO) should range from 3.3 V to 5.5 V. The
filter capacitor of the FO pin, CFO, should have acapacitance of ≤0.01 μF.
Figure 12-10 shows a relation between the FO pin
voltage and the pull-up resistor, RFO. When the pull-up
resistor, RFO, has a too small resistance, the FO pin
voltage at fault signal output becomes high due to theon-resistance of a built-in transistor, QFO (Figure 12-8).
Therefore, it is recommended to use a 3.3 kΩ to 10 kΩpull-up resistor when the Low Level Input Threshold
Voltage of the microcontroller, VIL, is set to 1.0 V.
To suppress noise, add a filter capacitor, CFO, near the
IC with minimizing a trace length between the FO andCOM pins. Note that, however, this additional filtering
allows a delay time to occur, as seen in Figure 12-9. The

QFOFO Pin Delay Time, tD(FO)
TJ = 25°C

0.5

Max.
0.4 Typ.
Min.
0.3
0.2
0.1
0
0

2

4

6

8

10

RFO (kΩ)

Figure 12-10.

Fault Signal Voltage vs. Pull-up Resistor,

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SIM2-202B
Controller power supply

RFO

Delay TIme, tD(FO) (µs)

TJ = 25°C
0.20

DVT

Max.

Controller

1

VT

0.15
Typ.
0.10

RVT

CVT

Min.

7

COM

0.05

Figure 12-12.

VT Pin Peripheral Circuit

0.00
0

200

400

600

800

1000

CFO (pF)

Filter Capacitor, CFO vs. FO Pin Delay
Time, tD(FO)12.2.10. VT
This pin outputs temperature sensing voltages. The
external microcontroller can monitor the junction
temperature of the internal control IC, not of the output
transistors, with the VT pin. For more details, see
Section 12.3.

Max.
Typ.
Min.

3.5

VT Pin Voltage, VT (V)Figure 12-11.

4.0

3.0
2.5
2.0
1.5
1.0
0.5

12.3. Temperature Sensing Function
The microcontroller can monitor the junction
temperature of the internal control IC, throughtemperature sensing voltages that the VT pin outputs.
The SIM2-202B does not include any protections
against overtemperature, such as an IC shutdown or afault flag. Therefore, the IC must be set to stop its
operation as it detects an abnormal heating state withtemperature sensing voltages. A typical example isturning off input signals from the microcontroller.
Figure 12-13 shows a relation between the VT pin
voltage and temperature. Table 12-3 and Table 12-4
provide the details of variations found in Figure 12-13.
Temperature sensing voltages may exceed 3.0 V,
causing permanent damage to the IC in the worst case.
To protect the parts connected to the VT pin such as the
microcontroller, add a clamp diode, DVT, between the
microcontroller power supply and the VT pin (seeFigure 12-12).

25

50

75

100

125

150

Junction Temperature, TJ(MIC) (°C)

Figure 12-13. VT Pin Voltage, VT vs. Internal Control
IC Junction Temperature, TJ(MIC) (Design Value)
Table 12-3. TJ(MIC) Variation on VT Pin Voltage (Design
Value)VT Pin Voltage
(V)
1.283

TJ(MIC)(°C)
50 ± 23.142

125 ± 2

Table 12-4. VT Pin Voltage Variation on TJ(MIC) (Design
Value)TJ(MIC)(°C)
50

VT Pin Voltage(V)1.283 ± 0.04

125

3.142 ± 0.05

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SIM2-202B
12.4. Protection Functions
This section describes the various protection circuits
provided in the SIM2-202B. The protection circuits
include the undervoltage lockout for power supplies(UVLO), the overcurrent protection (OCP), and thethermal shutdown (TSD). In case one or more of these
protection circuits are activated, the FO pin outputs afault signal; as a result, the external microcontroller canstop the operations of the three phases by receiving thefault signal. In the following functional descriptions,“HOx” denotes a gate input signal on the high-side
transistor, whereas “LOx” denotes a gate input signal on
the low-side transistor (see also the diagram in Section
7). “VBx–U/V/W” refers to the voltages between the
VBx and U/V/W pins.

12.4.1. Fault Signal Output
In case one or more of the following protections are
actuated, an internal transistor, QFO, turns on, then the
FO pin becomes logic low (≤0.5 V).
1) Low-side undervoltage lockout (UVLO_VCC)
2) Overcurrent protection (OCP)
3) Thermal shutdown (TSD)
While the FO pin is in the low state, the low-side
transistors of each phase turn off. In normal operation,
the FO pin outputs a high signal of about 5 V. The fault
signal output time of the FO pin at OCP activation is thehold time, tP = 10 ms (typ.), fixed by a built-in feature of
the IC itself (see Section 12.4.3). The external
microcontroller receives the fault signals with its
interrupt pin (INT), and must be programmed to put the
HINx and LINx pins to logic low within thepredetermined hold time, tP. To resume motor operations
thereafter, set the motor to be resumed after a lapse of≥2 seconds.

UVLO_VB).
When the voltage between the VBx and U/V/W pins
(VBx–U/V/W) decreases to the Logic Operation Stop
Voltage (VBS(OFF) = 10.0 V) or less, the UVLO_VB
circuit in the corresponding phase gets activated and sets
an HOx signal to logic low.
When the voltage between the VBx and U/V/W pins
increases to the Logic Operation Start Voltage(VBS(ON) = 10.5 V) or more, the IC releases the
UVLO_VB condition. Then, the HOx signal becomes
logic high at the rising edge of the first input command
after the UVLO_VB release. Any fault signal is not
output from the FO pin during the UVLO_VB operation.
In addition, the VBx pin has an internal UVLO_VB
filter of about 3 μs, in order to prevent noise-induced
malfunctions.
HINx
0

LINx
0
UVLO_VB
operation

VBx–
U/V/W

VBS(OFF)UVLO release0
No FOx output at
UVLO_VB

FO

0
About 3 µs

HOx

In case the gate-driving voltages of the output
transistors decrease, their steady-state power dissipations
increase. This overheating condition may cause
permanent damage to the IC in the worst case. To
prevent this event, the SIM2-202B has the undervoltage
lockout (UVLO) circuits for both of the high- and lowside power supplies.

12.4.2.1. Undervoltage Lockout for
High-side Power Supply(UVLO_VB)
Figure 12-14 shows operational waveforms of theundervoltage lockout for high-side power supply (i.e.,

HOx restarts at
positive edge after
UVLO_VB release.

0

LOx
0

Figure 12-14.

12.4.2. Undervoltage Lockout for Power
Supply (UVLO)

VBS(ON)UVLO_VB Operational Waveforms

12.4.2.2. Undervoltage Lockout for
Low-side Power Supply(UVLO_VCC)
The VCC pin has the VCC pin undervoltage lockout(UVLO_VCC) circuit for low-side power supply.
The description hereafter provides the UVLO_VCC
operation of the VCC pin. As Figure 12-15 shows, when
the VCC pin voltage decreases to the Logic Operation
Stop Voltage (VCC(OFF) = 11.0 V) or less, theUVLO_VCC circuit in the U-phase gets activated andsets both of HO1 and LO1 signals to logic low. When
the VCC pin voltage increases to the Logic Operation
Start Voltage (VCC(ON) = 11.5 V) or more, the IC releases
the UVLO_VCC operation. Then it resumes transmitting
the HO1 and LO1 signals according to input commands

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SIM2-202B
on the HIN1 and LIN1 pins. During the UVLO_VCC
operation, the FO pin becomes logic low and sends fault
signal. In addition, the VCC pin has an internal
UVLO_VCC filter of about 3 μs, in order to prevent
noise-induced malfunctions.
HINx
0

LINx
0

About 3 µs

VCC

UVLO_VCC
operation

VCC(ON)VCC(OFF)0FO
0and Its Peripheral Circuit
Figure 12-17 shows operational waveforms when the
OCP pin detects an overcurrent condition. When the
OCP pin voltage increases to the OCP Threshold
Voltage (VTRIP = 0.50 V) or more, and remains in thiscondition for a period of the OCP Blanking Time(tBK(OCP) = 370 ns) or longer, the corresponding OCP
circuit is activated. When an internal delay time(tD(OCP) = 0.15 µs) has elapsed after the OCP activation,
the low-side output transistors turn off and the FO pin
becomes low state. Then, output current decreases as aresult of the low-side output transistor turn-offs. Even if
the OCP pin voltage falls below VTRIP, the IC holds theFO pin in the low state for a fixed hold time, t P = 10 ms.
Then, the output transistors operate according to input
signals.
To prevent noise-induced malfunctions, connect aceramic capacitor, CFO (about 000.1 μF to 00.1 μF) to
the FO pin.

HOx
HINx

0

0

LOx responds to input signal.

LINx

LOx
0

0

tBK(OCP)tBK(OCP)tD(OCP) 0.15 µs (typ.)tBK(OCP)

OCP

Figure 12-15.

UVLO_VCC Operational Waveforms

VTRIP

0

12.4.3. Overcurrent Protection (OCP)The OCP pin has the overcurrent protection (OCP)
circuit. Figure 12-16 is an internal circuit diagram
describing the OCP pin and its peripheral circuit.
The OCP pin detects overcurrents with voltage acrossan external shunt resistor, RS. Because the OCP pin isinternally pulled down, the OCP pin voltage increases
proportionally to a rise in the current running throughthe shunt resistor, RS.

tP
0

HOx

2

OCP

VTRIP
2 kΩ

VBB

2 kΩ

0

0

Blanking
filter
370 ns (typ.)

CO

7

COM

Output transistors
turn-off and QFOturn-on

LSx
A/D

RO

DRS

RS

COM

Figure 12-16.

OCP Operational Waveforms

23+

100 kΩ

HOx responds to input signal.

LOx

Figure 12-17.
U1

FO restarts
automatically after tP.

FO

Internal Circuit Diagram of OCP Pin

The OCP is used for detecting abnormal conditions,such as an output transistor shorted. In case short-circuit
conditions occur repeatedly, the output transistors can be
destroyed. To prevent such event, motor operation must
be controlled by the external microcontroller so that it
can immediately stop the motor when fault signals aredetected.
The external microcontroller receives the fault signals
with its interrupt pin (INT), and must be programmed to
put the HINx and LINx pins to logic low within thepredetermined hold time, tP. To resume motor operations
thereafter, set the motor to be resumed after a lapse of≥2 seconds.
For proper shunt resistor setting, your application

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SIM2-202B
must meet the following:● Use the shunt resistor that has a recommended
resistance, RS (see Section 2).
● Set the OCP pin input voltage to vary within the rated
OCP pin voltages, VOCP (see Section 1).
● Keep the current through the output transistors below
the rated output current (pulse), IOP (see Section 1).
It is required to use a resistor with low internal
inductance because high-frequency switching current
will flow through the shunt resistor, RS. In addition,choose a resistor with allowable power dissipationaccording to your application.
When you connect a CR filter (i.e., a pair of a filter
resistor, RO, and a filter capacitor, CO) to the OCP pin,care should be taken in setting the time constants of R O
and CO. The larger the time constant, the longer the timethat the OCP pin voltage rises to VTRIP. And this may
cause permanent damage to the transistors.
Consequently, a propagation delay of the IC must be
taken into account when you determine the time
constants. For RO and CO, their time constants must be
set to ≤1.0 µs. The filter capacitor, CO, should also beplaced near the IC, between the OCP and COM pinswith a minimal length of traces.
Note that overcurrents are undetectable when one ormore of the U, V, and W pins or their traces are shorted
to ground (ground fault). In case any of these pins falls
into a state of ground fault, the output transistors may bedestroyed.

HINx
0

LINx
0
TSD operation

TJ(L-MIC)

TDH
TDL

0
HOx responds to input signal.

HOx
0

LOx
0

FO
0

Figure 12-18.

TSD Operational Waveforms

When the temperature of the low-side MIC decreases
to the TSD Releasing Temperature (TDL = 100 °C) or
less thereafter, the shutdown condition is released. The
output transistors then resume operating according to
input signals. Also note that junction temperatures of theoutput transistors themselves are not monitored;
therefore, do not use the TSD function as an
overtemperature prevention for the output transistors.

12.4.4. Thermal Shutdown (TSD)The SIM2-202B incorporates the thermal shutdown(TSD) circuit in the low-side MIC (see Section 7). The
TSD circuit protects the IC from overheating, such asincreased power dissipation due to overload, or elevatedambient temperature at the device. When thetemperature of the low-side MIC exceeds the TSD
Operating Temperature (TDH = 120 °C) due to suchoverheating, the TSD circuit is activated. During theTSD operation, the IC turns off the low-side output
transistors and outputs a fault signal (see Figure 12-18).

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SIM2-202B
13. Design Notes
This section also employs the notation systemdescribed in the beginning of the previous section.

13.1. PCB Pattern Layout
Figure 13-1 shows a schematic diagram of a motor
drive circuit. The circuit consists of current paths having
high frequencies and high voltages, which also bringabout negative influences on IC operation, noiseinterference, and power dissipation. Therefore, PCB
trace layouts and component placements play animportant role in circuit designing. Current loops, whichhave high frequencies and high voltages, should be as
small and wide as possible, in order to maintain a lowimpedance state. In addition, ground traces should be as
wide and short as possible so that radiated EMI levels
can be reduced.

may be occurred due to creases at screw tightening.
Therefore, you should conduct thorough evaluations
before using these materials.
● When applying a silicone grease, make sure that there
are no foreign substances between the IC and aheatsink. Extreme care should be taken not to apply asilicone grease onto any device pins as much as
possible. The following requirements must be met for
proper grease application:− Grease thickness: 100 µm− Heatsink flatness: ±100 µm− Apply a silicone grease within the area indicated in
Figure 13-2, below.
Screw hole

Screw hole

7.3
7.3

M3

23

VBB

VDC

2.5

Figure 13-2.
27
30
33

L-MIC

U
V

Ground traces
should be wideand short.

M

W

LS1
36
LS2
38
LS3
40
High-frequency, high-voltage
current loops should be as small
and wide as possible.

Figure 13-1.

M3

Heatsink

U1

H-MIC

Thermal silicone
grease application area

High-frequency, High-voltage Current
Paths

13.2. Considerations in Heatsink Mounting
The following are the key considerations and theguidelines for mounting a heatsink:● Be sure to use a metric screw of M3 and a plain
washer of 7 mm (φ). When tightening the screws, usea torque screwdriver and tighten them within therange of screw torque defined in Section 4. Be sure to
avoid uneven tightening. Temporarily tighten the twoscrews first, then tighten them equally on both sides
until the specified screw torque is reached.
● When mounting a heatsink, it is recommended to use
silicone greases. If a thermally conductive sheet or anelectrically insulating sheet is used, package cracks

27.7

2.5

Unit: mm

Reference Application Area for Thermal
Silicone Grease

13.3. Considerations in IC Characteristics
Measurement
When measuring the breakdown voltage or leakage
current of the transistors incorporated in the IC, note thatthe gate and emitter of each transistor should have thesame potential. Moreover, care should be taken during
the measurement because the collectors of the high-side
transistors are all internally connected to the VBB pin.
The output (U, V, and W) pins are connected to theemitters of the corresponding high-side transistors,
whereas the LSx pins are connected to the emitters of
the low-side transistors. The gates of the high-side
transistors are pulled down to the corresponding output(U, V, and W) pins; similarly, the gates of the low-side
transistors are pulled down to the COM pin.
When measuring the breakdown voltage or leakage
current of the transistors incorporated in the IC, note that
all of the output (U, V, and W), LSx, and COM pins
must be appropriately connected. Otherwise, theswitching transistors may result in permanent damage.
The following are circuit diagrams representing
typical measurement circuits for breakdown voltage:
Figure 13-3 shows the high-side transistor (Q1H) in the
U-phase; Figure 13-4 shows the low-side transistor (Q1L)
in the U-phase. And all the pins that are not represented
in these figures are open.
Before conducting a measurement, be sure to isolate
the ground of the to-be-measured phase from those ofother two phases not to be measured. Then, in each of

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SIM2-202B
the two phases, which are separated not to be measured,connect the LSx and COM pins each other at the samepotential, and leave them unused and floated.
When measuring the leakage current between thecollector and emitter of a low-side transistor, connect the
VBx and output pins so that the potential of the VBx pin
is not lower than the potential of the corresponding
output pin (U, V, W).
U1
23
Q3H

Q2H

Q1H

27

H-MIC

30

Q3L

Q2L

L-MIC

COM

VBB

33
Q1L

U

V

V
W

LS1
36
LS2
38
LS3
40

7

Figure 13-3. Typical Measurement Circuit for Highside Transistor (Q1H) in U-phase
U1
20
17
14

23
H-MIC

Q3H

Q2H

30

L-MIC

COM

Q2L

VB2
VB3
VBB

Q1H

27

Q3L

VB1

33
Q1L

U
V
W

V

LS1
36
LS2
38
LS3
40

7

Figure 13-4. Typical Measurement Circuit for Lowside Transistor (Q1L) in U-phaseSIM2-202B-DSE Rev.1.1
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SIM2-202B
14. Calculating Power Losses andEstimating Junction Temperaturey = 0.075x + 0.882● DT0051: SIM2-202B Calculation Tool
https://www.semicon.sanken-ele.co.jp/en/calctool/igbt1_caltool_en.html

1.5
125 °C
1.0

25 °C 75 °C

0.5
0.0
0

2

4

6

8

10

12

16

18

20

Figure 14-1.

Linear Approximate Equation of VCE(SAT)vs. IC

Switching loss in an IGBT, PSW, can be calculated by
Equation (4), letting IM be the effective current value ofthe motor:

Steady-state loss in an IGBT can be computed byusing the VCE(SAT) vs. IC curves, listed in Section 15.1.1.
As expressed by the curves in Figure 14-1, a linear
approximation at a range the IC is actually used is
obtained by: VCE(SAT) = α × IC + β.
The values gained by the above calculation are thenapplied as parameters in Equation (3), below. Hence, theequation to obtain the IGBT steady-state loss, PON, is:
1 π(φ) × IC (φ) × DT × dφ
∫ V
2π 0 CE(SAT)

PSW =

VDC
√2
× fC × αE × IM ×
.
π
300

(4)

Where:
fC is the PWM carrier frequency (Hz),VDC is the main power supply voltage (V), i.e., the
VBB pin input voltage, andαE is the slope of the switching loss curve (see Section
15.1.2).

14.3. Estimating Junction Temperature of
IGBT
(3)

The junction temperature of an IGBT, T J, can be
estimated with Equation (5):
TJ = R (j−C)Q × (PON + PSW ) + TC .

Where:VCE(SAT) is the collector-to-emitter saturation voltage of
the IGBT (V),IC is the collector current of the IGBT (A),DT is the duty cycle, which is given by
DT =

14

IC (A)

14.2. IGBT Switching Loss, PSW

14.1. IGBT Steady-state Loss, PON

1 1
4= α( +
M × cos θ) IM 2
2 2 3π√2 1 π+β ( + M × cos θ) IM .
π
2 8

2.0

VCE(SAT) (V)This section describes the procedures to calculate
power losses in a switching transistor, and to estimate ajunction temperature. Note that the descriptions listed
here are applicable to the SIM2-202B, which iscontrolled by a 3-phase sine-wave PWM driving
strategy. Total power loss in an IGBT can be obtainedby taking the sum of steady-state loss, PON, andswitching loss, PSW. The following subsections containthe mathematical procedures to calculate the power
losses in an IGBT and its junction temperature.
For quick and easy references, we offer calculation
support tools online. Please visit our website to find out
more.

PON =

VCCx = 15 V

2.5

(5)

Where:
R(J-C)Q is the junction-to-case thermal resistance per
IGBT (°C/W), andTC is the case temperature (°C), measured at the point
defined in Figure 3-1.

1 + M × sin(φ + θ),
2

M is the modulation index (0 to 1),cosθ is the motor power factor (0 to 1),
IM is the effective motor current (A),α is the slope of the linear approximation in the
VCE(SAT) vs. IC curve, andβ is the intercept of the linear approximation in the
VCE(SAT) vs. IC curve.

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SIM2-202B
15. Performance Curves
15.1. Performance Curves of Output Parts
15.1.1. Output Transistor Performance Curves
VCCx = 15 V

2.5

1.5

VF (V)VCE(SAT) (V)2.0

125 °C
1.0
25 °C

75 °C

0.5
0.0
0

2

4

6

8

10

12

14

16

18

20

2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0

25 °C

75 °C
125 °C
02

4

6

IC (A)

Figure 15-1.

8

10

12

14

16

18

20

IF (A)IGBT VCE(SAT) vs. IC

Figure 15-2.

Freewheeling Diode VF vs. IF

15.1.2. Switching Loss Curves

1400

1200

1000

E (µJ)E (µJ)

1400

TJ = 125 °C

1200
800
600
400

2

4

6

8

10

12

14

16

18

800
600

TJ = 25 °C

200

0
0

TJ = 125 °C

1000

400

TJ = 25 °C

200

VCC = 15 V

1600

20

0
0

2

4

IC (A)

Figure 15-3.

High-side Switching Loss

SIM6811M

VB = 15 V

1600

SIM6811M

Conditions: VBB pin voltage = 300 V, half-bridge circuit with inductive load.
Switching Loss, E, is the sum of turn-on loss and turn-off loss.

6

8

10

12

14

16

18

20

IC (A)

Figure 15-4.

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Low-side Switching Loss

31

SIM2-202B
15.2. Allowable Effective Current Curves
The following curves represent allowable effective currents in 3-phase sine-wave PWM driving with parameters suchas typical VCE(SAT) and typical switching losses.
Operating conditions: VBB pin input voltage, VDC = 300 V; VCC pin input voltage, VCC = 15 V; modulation index,
M = 0.8; motor power factor, cosθ = 0.8; junction temperature, T J = 150 °C.
fC = 2 kHz

Allowable Effective Current (Arms)

20

15

10

5

0
25

50

75

100

125

150

TC (°C)
Figure 15-5.

Allowable Effective Current (fC = 2 kHz)fC = 16 kHz

Allowable Effective Current(Arms)

20

15

10

5

0
25

50

75

100

125

150

TC (°C)
Figure 15-6.

Allowable Effective Current (fC = 16 kHz)

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SIM2-202B
15.3. Transient Thermal Resistance Curve
The following graphs represent transient thermal resistance (the ratios of transient thermal resistance), with steadystate junction-to-case thermal resistance = 1. Note that the graph shows only IGBT characteristics; no freewheeling
diode characteristics are included.

Ratio of Transient Thermal
Resistance

1.00

0.10

0.01
0.001

0.01

0.1

1

10

Time (s)Figure 15-7.

Transient Thermal Resistance

15.4. Short Circuit SOA (Safe Operating Area)
Conditions: VDC ≤ 400 V, 13.5 V ≤ VCC ≤ 16.5 V, TJ = 125 °C, 1 pulse.

Collector Current, IC(Peak) (A)

200
150
100
Short Circuit
50
0
0

1

2
3
Pulse Width (µs)
Figure 15-8.

4

5

Short Circuit SOA

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SIM2-202B
16. Pattern Layout Example
This section contains the schematic diagrams of a PCB pattern layout example using an SIM2-202B series device.
Note that the pattern layout example only uses the parts illustrated in the circuit diagram below. For more details on
through holes, see Section 10.

(Top View)(Bottom View)
Figure 16-1.

Pattern Layout Example

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SIM2-202B
OCP

+5V

TP2

J4
1
1
2
3
4

R4
R5
R6

LIN1

7

HIN1

8

GND

1 VT
2 OCP
3 FO
4 LIN35 LIN26 LIN1TP6 TP5 TP4

LIN2

6

TP109

IPM1

LIN3

HIN2

GND

TP1

R3

GND

HIN3

VT

TP3

R1

OCP

5

FO

TP107

TP9

J5
LS1
LS2
3 LS3
1
2

LS3 40

RS3
TP100

TP10
TP11

R2

LS2 38
7 COM
C1 C2 C3 C4 C5 C6J3LS1 368 VCC
9 HIN310 HIN2
11 HIN1

R7
R8
R9

RS2

J1
1

RS1

PGND

2

C18
3

VBB

TP23

J6
1

VCC

2

GND

TP8

D7

J2

C7
W 33

C8 C9 C10 C11

TP7

1
TP33

VB3

W
VB2
V
VB1

U

Figure 16-2.

TP14

14 VB3

C15

TP13
TP17

TP16

TP19

U 27

V

4

5

U

TP27

C13

TP20

3
TP30

17 VB2
C16

V 30

C14

W

2

VBB 23
20 VB1C17

C12Circuit Diagram of PCB Pattern Layout Example

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SIM2-202B
17. Typical Motor Driver Application
This section contains the information on the typical motor driver application listed in the previous section, including
a circuit diagram, specifications, and the bill of the materials used.
● Motor Driver Specifications
IC
Main Supply Voltage, VDC
Rated Output Power

SIM2-202B
300 VDC (typ.)
1.8 kW● Circuit Diagram
See Figure 16-2.
● Bill of Materials
SymbolPart Type
C1
Chip ceramic capacitor
C2
Chip ceramic capacitor
C3
Chip ceramic capacitor
C4
Chip ceramic capacitor
C5
Chip ceramic capacitor
C6
Chip ceramic capacitor
C7
Electrolytic capacitor
C8
Chip ceramic capacitor
C9
Chip ceramic capacitor
C10
Chip ceramic capacitor
C11
Chip ceramic capacitor
C12Chip ceramic capacitor
C13
Chip ceramic capacitor
C14
Chip ceramic capacitor
C15Electrolytic capacitor
C16Electrolytic capacitor
C17Electrolytic capacitor
C18
Film capacitor
R1
Chip resistor
R2
Chip resistor
R3
Chip resistor
R4
Chip resistor
R5
Chip resistor
R6
Chip resistor
R7
Chip resistor
R8
Chip resistor
R9
Chip resistor
RS1*
Metal plate resistor
RS2*
Metal plate resistor
RS3*
Metal plate resistor
D7
Diode
IPM1
Motor Diver IC
J1
Connector
J2
Connector
J3
Pin header
J4
Pin header
J5
Pin header
J6
Pin header

Ratings
0.01 μF, 50 V
10 nF, 50 V
0.01 μF, 50 V
100 pF, 50 V
100 pF, 50 V
100 pF, 50 V
47 μF, 25 V
0.1 μF, 50 V
100 pF, 50 V
100 pF, 50 V
100 pF, 50 V
0.1 μF, 50 V
0.1 μF, 50 V
0.1 μF, 50 V
10 μF, 50 V
10 μF, 50 V
10 μF, 50 V
0.1 μF, 450 V
100 Ω, 1/8 W
Open10 kΩ, 1/8 W
100 Ω, 1/8 W
100 Ω, 1/8 W
100 Ω, 1/8 W
100 Ω, 1/8 W
100 Ω, 1/8 W
100 Ω, 1/8 W
14 mΩ, 2 W
14 mΩ, 2 W
14 mΩ, 2 W
Open
SIM2-202B
Equiv. to B2P3-VH
Equiv. to B3P5-VH
Equiv. to MA08-1
Equiv. to MA01-1
Equiv. to MA03-1
Equiv. to MA02-1* Refers to a part that requires adjustment based on operation performance in an actual application.

SIM2-202B-DSE Rev.1.1
SANKEN ELECTRIC CO., LTD.
Aug. 05, 2024
https://www.sanken-ele.co.jp/en© SANKEN ELECTRIC CO., LTD. 2023

36

SIM2-202B
Important Notes● All data, illustrations, graphs, tables and any other information included in this document (the “Information”) as to Sanken’s
products listed herein (the “Sanken Products”) are current as of the date this document is issued. The Information is subject to any
change without notice due to improvement of the Sanken Products, etc. Please make sure to confirm with a Sanken sales
representative that the contents set forth in this document reflect the latest revisions before use.
● The Sanken Products are intended for use as components of general purpose electronic equipment or apparatus (such as home
appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Prior to use of the Sanken Products,
please put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them toSanken. When considering use of the Sanken Products for any applications that require higher reliability (such as transportationequipment and its control systems, traffic signal control systems or equipment, disaster/crime alarm systems, various safety
devices, etc.), you must contact a Sanken sales representative to discuss the suitability of such use and put your signature, or affix
your name and seal, on the specification documents of the Sanken Products and return them to Sanken, prior to the use of theSanken Products. The Sanken Products are not intended for use in any applications that require extremely high reliability such as:
aerospace equipment; nuclear power control systems; and medical equipment or systems, whose failure or malfunction may result
in death or serious injury to people, i.e., medical devices in Class III or a higher class as defined by relevant laws of Japan(collectively, the “Specific Applications”). Sanken assumes no liability or responsibility whatsoever for any and all damages andlosses that may be suffered by you, users or any third party, resulting from the use of the Sanken Products in the Specific
Applications or in manner not in compliance with the instructions set forth herein.
● In the event of using the Sanken Products by either (i) combining other products or materials or both therewith or (ii) physically,
chemically or otherwise processing or treating or both the same, you must duly consider all possible risks that may result from all
such uses in advance and proceed therewith at your own responsibility.
● Although Sanken is making efforts to enhance the quality and reliability of its products, it is impossible to completely avoid theoccurrence of any failure or defect or both in semiconductor products at a certain rate. You must take, at your own responsibility,
preventative measures including using a sufficient safety design and confirming safety of any equipment or systems in/for which
the Sanken Products are used, upon due consideration of a failure occurrence rate and derating, etc., in order not to cause any
human injury or death, fire accident or social harm which may result from any failure or malfunction of the Sanken Products.
Please refer to the relevant specification documents and Sanken’s official website in relation to derating.
● No anti-radioactive ray design has been adopted for the Sanken Products.
● The circuit constant, operation examples, circuit examples, pattern layout examples, design examples, recommended examples, allinformation and evaluation results based thereon, etc., described in this document are presented for the sole purpose of reference ofuse of the Sanken Products.
● Sanken assumes no responsibility whatsoever for any and all damages and losses that may be suffered by you, users or any third
party, or any possible infringement of any and all property rights including intellectual property rights and any other rights of you,users or any third party, resulting from the Information.
● No information in this document can be transcribed or copied or both without Sanken’s prior written consent.
● Regarding the Information, no license, express, implied or otherwise, is granted hereby under any intellectual property rights andany other rights of Sanken.
● Unless otherwise agreed in writing between Sanken and you, Sanken makes no warranty of any kind, whether express or implied,
including, without limitation, any warranty (i) as to the quality or performance of the Sanken Products (such as implied warrantyof merchantability, and implied warranty of fitness for a particular purpose or special environment), (ii) that any Sanken Product isdelivered free of claims of third parties by way of infringement or the like, (iii) that may arise from course of performance, courseof dealing or usage of trade, and (iv) as to the Information (including its accuracy, usefulness, and reliability).
● In the event of using the Sanken Products, you must use the same after carefully examining all applicable environmental laws andregulations that regulate the inclusion or use or both of any particular controlled substances, including, but not limited to, the EU
RoHS Directive, so as to be in strict compliance with such applicable laws and regulations.
● You must not use the Sanken Products or the Information for the purpose of any military applications or use, including but notlimited to the development of weapons of mass destruction. In the event of exporting the Sanken Products or the Information, or
providing them for non-residents, you must comply with all applicable export control laws and regulations in each country
including the U.S. Export Administration Regulations (EAR) and the Foreign Exchange and Foreign Trade Act of Japan, andfollow the procedures required by such applicable laws and regulations.
● Sanken assumes no responsibility for any troubles, which may occur during the transportation of the Sanken Products including
the falling thereof, out of Sanken’s distribution network.
● Although Sanken has prepared this document with its due care to pursue the accuracy thereof, Sanken does not warrant that it iserror free and Sanken assumes no liability whatsoever for any and all damages and losses which may be suffered by you resulting
from any possible errors or omissions in connection with the Information.
● Please refer to our official website in relation to general instructions and directions for using the Sanken Products, and refer to therelevant specification documents in relation to particular precautions when using the Sanken Products.
● All rights and title in and to any specific trademark or tradename belong to Sanken and such original right holder(s).

DSGN-CEZ-16003

SIM2-202B-DSE Rev.1.1
SANKEN ELECTRIC CO., LTD.
Aug. 05, 2024
https://www.sanken-ele.co.jp/en© SANKEN ELECTRIC CO., LTD. 2023

37