DC to Single-phase AC Voltage Source Inverter with
Power Decoupling Circuit based on Flying Capacitor
Topology for PV System
Hiroki Watanabe, and Keisuke Kusaka

Keita Furukawa, Koji Orikawa and Jun-ichi Itoh

Department of Electrical engineering
Nagaoka University of Technology, NUT
Niigata, Japanhwatanabe@stn.nagaokaut.ac.jp

Department of Electrical engineering
Nagaoka University of Technology, NUT
Niigata, Japan
itoh@vos.nagaokaut.ac.jp

Abstract— A novel power decoupling circuit using a flying
capacitor topology is proposed in this paper. The inverters, which
are connected to a single-phase grid, have single-phase powerfluctuation at the twice the grid frequency. Thus, bulky
electrolytic capacitor is generally used as DC link capacitor. In
the proposed circuit, the power fluctuation is compensated by theflying capacitor in the flying capacitor DC-DC converter. The
proposed circuit does not need an additional magnetic
component in comparison with the conventional system, which
has a boost chopper and an inverter. The proposed converter isexperimentally tested with a 1-kW prototype. A voltage ripple attwice the frequency on the inverter DC voltage is suppressedfrom 35.1% to 4.6%. Moreover, the maximum efficiency of
94.5% with an output power of 1.0 kW is achieved. Finally, thedesign method of the boost-up inductor for proposed circuit isestimated by experiment. As a result, the error of the ripple
current between design and measurement value is 4.7%.

capacitor. However, the extra magnetic components andswitching devices are required. These additional components
decrease the efficiency, and increase the circuit volume.

Keywords—Photovoltaic; grid connected inverter; active power
decoupling; flying capacitor DC-DC converter; single-phase power
ripple.

I.

INTRODUCTION

In recent years, the Photovoltaic (PV) system is active
researched as a sustainable power solution. In order to supply
the solar power to single-phase grid, a Power Conditioning
system (PCS) is used. In general, the PCS is constructed by aboost chopper, and a Voltage Source Inverter (VSI) [1]. The
boost chopper is required the function as the boost-up andmaximum power point tracking (MPPT). The VSI is needed
for the grid connection. However, a conventional system needs
the large electrolytic capacitor on DC link due to the singlephase power fluctuation. The electrolytic capacitor has alimited lifetime, approximately less than 7000 hours at 105
degree Celsius operating temperature although the lifetime of a
PV panel is namely 25 years. As a result, periodical
maintenance is required on the conventional system.
In order to remove the bulky electrolytic capacitor, theactive power decoupling method has been studied [2]-[6].
These topologies can reduce the capacitance of the DC link

On the other hand, the general boost chopper has the large
magnetic component as the boost-up inductor for energy buffer.
This is because the general boost chopper has to store theenergy for boost-up of the input voltage by large inductor only.
As a result, the inductance should be designed widely.
In order to reduce the volume of the boost-up inductor, theflying capacitor type DC-DC converter is proposed. The flying
topology has the boost-up inductor and flying capacitor, andthese components is used for boost-up of the input voltage. In
generally, the energy density of the capacitor is large incomparison with the inductor. Thus, the inductance on the
flying capacitor DC-DC converter can be reduced more than
the general boost-up chopper.
In this paper, a novel power decoupling circuit that uses theflying capacitor topology is proposed in order to solve above
mentioned problems. The proposed circuit has the function of
the boost-up and single-phase power fluctuation compensation.
In the decoupling control strategy, the flying capacitor ischarged and discharged at the twice grid frequency. As aresults, the single-phase power fluctuation is compensatedwithout the large DC link capacitor. The advantages of the
proposed circuit are follows: 1) the additional magnetic
component for active power decoupling is not required; 2) the
inductance of the boost-up inductor can be reduced incomparison with conventional boost chopper. 3) Simple
configuration and easy control.
This paper is organized as follows: first, the configurationof the proposed circuit is shown. Next, the principle of thepower decoupling control is described. In addition, the design
method of the boost-up inductor is explained, and theinductance between the boost chopper and proposed circuit isestimated. Moreover, the operation of the proposed circuit isdemonstrated by the experiment. From the experimental results,
the voltage ripple at twice the grid frequency on the inverterDC voltage is suppressed from 35.1% to 4.6%. Finally, themaximum efficiency of 94.5% with the output power of 1.0
kW is achieved.
II.

S1

CIRCUIT TOPOLOGY

A. General configuration of the AC grid connection system
Fig. 1 shows a general configuration of the DC to singlephase AC grid connection system. The input voltage Vin isboosted up to more than the peak grid voltage Vac by the boost
chopper. When the PV panel is connected to the single-phasegrid by VSI, the single-phase power fluctuation which has
twice of the power grid frequency in the output side. It is oneof the cause to decay the control performance of MPPT. Thus,
the large electrolytic capacitor Cdc is connected to the DC line,
and instantaneous difference power between input and output
side is compensated by charge and discharge of Cdc. However,the life time of the conventional system is limited by the large
electrolytic capacitor.
B. Grid connection system with conventional active power
decoupling
Fig. 2 shows the circuit configuration with the conventional
active buffer decoupling circuit. In this system, the power
decoupling circuit is connected to the DC line instead of thelarge electrolytic capacitor. This topology is possible tocompensate the power fluctuation with small capacitor Cbuf.
Thus, this system is smaller size and longer life-time comparedwith the conventional circuit in Fig.1. This is because the small
film or ceramic capacitor can be used instead of the electrolytic
capacitor. However, the additional inductor and switching
devices are needed. These components lead to the low
efficiency, and increase the circuit volume.
C. Grid connection system with the proposed circuit
Fig.3 shows the grid connection system with the proposed
circuit based on flying capacitor DC-DC converter topology [7].
The proposed circuit has capability to compensate the singlephase power fluctuation using the flying capacitor Cfc which iscontrolled for active power decoupling. The advantages of the
proposed circuit are follows: 1) Active power decoupling canbe achieved without additional magnetic components; 2) the
inductance of the boost-up inductor can be reduced incomparison with the general boost-up chopper. Especially, theboost-up operation and power decoupling capability can beachieved by the flying capacitor DC-DC converter. Thus, thetotal efficiency is improved in comparison with theconventional circuit in Fig.2. This is because the additional
circuit for power decoupling is not required in the proposedsystem.
III.

Bulky electrolytic capacitor
is applied

Sup
iin

+

Lac
vac

Cdc

S2

Vin

Sun

Swn

Fig.1. General configuration for DC to single-phase AC grid connection
system. This circuit has a large electrolytic capacitor Cdc on the DC link part.
Cdc is usually used the bulky electirolytic capacitor.

S1

Sb1
Sup

iin

Lch

iac

Swp

Cbuf

Ld

Lac

Cdc

Sb2

S2

vac

Sun

Vin

Swn

Additional circuit for power
pulsation compensation
Fig.2 Power conditioner system using the conventional active power
decoupling method. This circuit needs an additional inductor andswitching devices. It cause low efficiency and large circuit volume.

S1

idc
Sup

iin

Swp

S2

Lfc

iac
Lac

vdc

vac

Cfc Cdc
vin

S3

vconv

Sun

Swn

S4
Capacitor for power decouplingFig.3. Proposed circuit using the flying capacitor DC-DC converter
topology. This circuit use the flying capacitor Cfc in order to compensate thesingle-phase power fluctuation. Thus, the additional component is notneeded.

pin

pbuf

＝

PRICIPLE OF THE ACTIVE POWER DECOUPLING

Fig. 4 shows the principle of the power decoupling
operation between the DC and AC sides [8-19]. When both theoutput voltage and current waveforms are sinusoidal, theinstantaneous output power pout is expressed as

Lch

iac

Swp

0

t

0

pout
Charge

＋
t

t

0

V I
pout  acp acp (1 cos2t )2Discharge
Input power
Buffer power
Output powerpin [W]
pbuf [W]pout [W]Fig.4. Compensation principle of the single-phase power fluctuation. The
power ripple that contains frequency twice of the grid frequency appears at
DC link voltage. In order to compensate the power fluctuation at input DC
side, buffer power pbuf is fluctuated by flying capacitor Cfc.

pout Vacp I acp
2(1  cos 2t ) 




S2

Where, Vacp is the peak voltage, Iacp is the peak current, and 
is the angular frequency of the output voltage. From (1), thepower ripple, that contains twice frequency of the power grid,appears at DC link.

iin Lfc
Cfc
vin

S4

In order to absorb the power ripple, the instantaneous
power pbuf, should be controlled by(a)1
pbuf  Vacp I acp cos2t 
2





S1

where, the polarity of the pbuf, is defined as positive when the
flying capacitor Cfc discharges. Note that the active power ofthe flying capacitor Cfc is zero. Due to the power decoupling,
the input power is matched to the output power. Thus, therelationship between the input and output power is expressedas1
pin  Vacp I acp  VIN I IN 
2
IV.



(3)

Capacitor charge modeiin Lfc
S3

Cfc

vin

(b) Capacitor discharge mode
Fig.5. Operation mode of the flying capacitor DC-DC converter. In
order to achieve the power decoupling, each duty period is adjusted by
the single-phase power fluctuation.

CONTROL STRAGEGY FOR THE PROPOSED CIRCUIT

Fig.5 shows the operation mode of the flying capacitor DCDC converter. The flying capacitor Cfc is charged or discharged
for boost-up and compensation of the power fluctuation. In the
proposed control, each switching duty is decided byrelationship between input and output power in Fig.1. Whenthe input power is large in comparison with the instantaneous
output power, the on duty of charge mode set widely. On theother hand, when the input power is small, the on duty ofdischarge mode should be set widely.
Fig.6 shows the control block diagram for the flying
capacitor DC-DC converter. In the proposed control, theAutomatic Current Regulator (ACR) and Automatic Voltage
Regulator (AVR) are implemented to control the generative
power Pin of PV and charge or discharge of Cfc. Note that, Pin iscontrolled by MPPT, and the input current iin* is calculated at
the maximum power point. Thus, the input current iin isregulated on the maximum power point by ACR.
In the flying capacitor control, the flying capacitor voltage
vfc is controlled to vary at the twice of the grid frequency inorder to compensate the single-phase power fluctuation by
AVR. The voltage reference vfc* is expressed as2

vpout 
pv *fc   dc  out sin 2t   1 
 2 C V  C
fc dc where, vdc is the DC link voltage, pout is the output power, Cfc isthe capacitance of the flying capacitor,  is the angularfrequency. From the flying capacitor voltage control, the power

1

Flying capacitor converter input current control

0
Carrier (180˚shifted)

vin
+

vin
iin* +
iin MPPT

16 kHz

0
1

d1

PI

+
+

vconv

S1

+
-

vdc-vfc

iin

d2 +
+

S2

+
-

vfc
vfc*

+
vfc

PI

S3
dbuf

+

D : minute current
Di + i for zero divide)

Flying capacitor voltage control

S4
dc

-vfc
vdc-vfc

Non-interfering control

Fig.6. Control block diagram for the flying capacitor DC-DC
converter. This is circuit is controlled based on the input curren andflying capacitor voltage control.

vac
vdc*

+

PI

idc*

2 sin q

iout*
+

PI

+
+

+
-

vdc

vdc
vac

PLL

q

Sun

iout
16 kHz
1
-1

Sup

-1

+
-

Swp
Swn

Fig.7. Control block diagram for VSI. The inverter output current
control and DC link voltage control is applied for grid connection.

fluctuation compensation duty reference dbuf is calculated. Note
that, the switching signal S1 to S4 is decided by the some dutyreference and triangle waveform on the modulation part.
However, dbuf interfere with the control performance of ACR.
As the results, the input current is fluctuated at the twice of thesingle-phase grid frequency. In order to solve this problem, thecontrol decoupling reference dc is added. The dc is expressed asdc  

v fc
vdc  v fc

d buf 

Fig.7 shows the control block diagram of the VSI. In order
to control the DC link voltage Vdc, reference value of AVR isset more than the grid voltage. Finally, the Phase Looked Loop
(PLL) is applied to ensure that the phase angle of the inverter
output current is identical to the grid.

V.

COMPONENT DESIGN FOR PROPOSED CIRCUIT

A. Flying capacitor Cfc
The flying capacitor Cfc is designed from pout which is theelectric storage energy to compensate the power fluctuation.
The Cfc is expressed as

C fc 

2 Pout (Vc max  Vc min )
2

2





reference and peak to peak value of the ripple current isconstant. However, the duty reference is not constant in the
proposed circuit. This is because the flying capacitor voltage vfc
is fluctuated in order to achieve the active power decoupling. It
is mean the duty reference and peak to peak value of the ripple
current swing. Thus, in the proposed circuit, the boost-up
inductor Lfc is designed when the current ripple is maximum
value.
When the active power decoupling is not applied, theinductance of Lfc is expressed as

L fc  

B. Boost-up inductor Lfc
The boost-up inductor Lfc is generally designed from ripple
current of the inductor current iL. In the conventional circuit, it
is easy to design the boost-up inductor because the dutyThe duty reference of the d1 and d2 are expressed as

d1 

Vin
1  cos(4ft )
Vdc





d2 


Vin   Vdc 1    1 cos(4ft ) 
Vdc   v fc





where, the duty reference d1 and d2 is included the frequency
component. This is given by the power decoupling duty dbuf
and the control decoupling reference dc. From the equation as(8) and (9), the boost-up inductor of the proposed circuit isInductance Lfc(normalized by Lchopper)

1.0
Boost-up rate : 5

0.8

Design value

0.6

Simulation value

0.4
0.2

fsw : 16 kHz
DI : 2.1 A
Vdc : 380 V
Lchopper : 1.8 mH

Boost-up rate : 2.5

0.0

0.1



where,  is the duty ratio, VL is inductor voltage, fsw is theswitching frequency, DI is the ripple ratio of the inductor
current. In comparison with the boost-up chopper, theinductance of the flying capacitor DC-DC converter can be
designed by one quarter. This is because the ripple current
frequency become the twofold of the switching frequency, andthe flying capacitor voltage Vfc is controlled at the half of DC
link voltage Vdc. However in the proposed circuit, the duty ratio
and the VL is swung due to the power decoupling control. Thus,
the boost-up inductor of the proposed circuit is designed by thesome duty reference d1 and d2 [20].



where, Pout is output power, Vcmax is maximum flying capacitor
voltage, Vcmin is minimum flying capacitor voltage,  is theangular frequency. In order to reduce the Cfc, the difference
value between Vcmax and Vcmin should be set widely. In otherwords, the peak voltage increase. Thus, Cfc is needed to design
less than the blocking voltage.

VL

4 f sw DI

0.3
0.2
Ripple voltage DVfc
(normalized by Vdc)

0.4

0.5

Fig.8 Relationship between the ripple voltage of the flying capacitor and inductance of the boost-up inductor.

expressed as

L fc 

Table.1 Simulation parameter

max maxVdc  v fc  Vin d1 , maxv fc  Vin d 2 
f sw DI

Fig.8 shows the relationship between the boost-up inductor
and ripple voltage. Where, the switching frequency fsw is 16
kHz, DC link voltage Vdc is 380 V, the ripple current DI is 2.1
A, and the inductance of the general boost-up chopper is 1.8
mH. In order to consider the validity of the designing equationby (10), the design value and simulation results are estimated.
In addition, the boost-up rate is changed from 2.5 to 5.
Moreover, the boost-up inductor Lfc is normalized by the
inductance of the boost-chopper Lchopper.
According to Fig.8, the design value and simulation result
are also matched. Thus, the validity of the design for boost-up
inductor is checked. In addition, the inductance rate is underthan 1p.u. at the all conditions. It is mean the boost-up inductor
can be design under than the inductance of the general boost-up
chopper. Moreover, the boost-up inductor can be most reduced
when the boost-up ratio is 2.5. This is because a lot of energy
for boost-up is needed when the boost-up ratio is high. Finally,
when the peak to peak voltage of the flying capacitor DVfc isincreased, the boost-up inductor Lfc become large. This isbecause the buffer power for the single-phase powerfluctuation is increased.
VI.

Input voltage

Vin

100 V

Input current

Iin

10 A

Switchingfrequency

fsw

16 kHzCfc
Cbuf
Cfilterv_gridf_gridPout

180 mF
20 mF
2 mH
200 Vrms
50 Hz
1 kW

nacr

4000 rad/s

navr

400 rad/s

Flying capacitor
DC link capacitor
Boost-up inductor
Grid voltage
Grid frequency
Output power
Angular frequency
for ACR
Angular frequency
for AVR

Input voltage vin

Input current iin

DC link voltage vdc

Flying capacitor voltage vfc
Grid voltage vac

SIMURATION AND EXPERIMENT

A. Simularion result
In this chapter, the validity of the single-phase powerfluctuation compensation is revealed by the simulation.
Table 1 shows the simulation parameter. Fig.9 shows thesimulation results of the proposed circuit. In the simulation, theoperation of MPPT is not estimated. The rated power of the
proposed circuit is 1 kW, and the large capacitor is not set tothe simulation parameter.
Fig.9 (a) shows the operation waveform without the power
decoupling operation. According to Fig.9 (a), the DC link
voltage vdc and inverter output current iac are distorted by thesingle-phase power fluctuation. In the proposed circuit, thecapacitance of the DC link capacitor Cdc is small. Thus, when
the single-phase power fluctuation is not compensated, the DC
link voltage vdc is included the twice grid frequency component.
As a result, the controlled performance for the inverter output
current control is decayed. From these reason, the bulky
electrolytic capacitor is needed on the DC link part in theconventional circuit. Due to use the electrolytic capacitor, thelife-time is limited. In addition, the circuit volume is increased.
Fig.9 (b) shows the operation waveform with the power
decoupling operation. According Fig.9 (b), the DC link ripple
voltage is reduced by 96.2%. In addition, the flying capacitor
voltage vfc is fluctuated by the twice grid frequency. Moreover,the flying capacitor average voltage is balanced at the halfvalue of the DC link voltage. Finally, the inverter output

Inverter output current iac

10 ms/div(a) Without power decoupling

Input voltage vin

Input current iin

DC link voltage vdc

Flying capacitor voltage vfc
Grid voltage vac

Inverter output current iac

10 ms/div(b) With power decouplingFig.9 Simulation result of the proposed circuit.

Fig.10 shows the harmonic analysis result of the DC link
voltage Vdc. According to Fig.10, the second order harmoniccomponent is reduced by 82.1% compared to the without
power decoupling. Thus, the single-phase power fluctuation iscompensated. The reason that the second order harmoniccomponent exist is because; (i) the compensation value is notenough at 1 kW (ii) the phase of the buffer power for singlephase power fluctuation compensation is not matching to thesingle-phase power grid. This will be improved in the future
work.

200
Harmonic components on
inverter DC voltage [V]current becomes sinusoidal waveform. From these results, thesingle-phase power ripple is compensated with the small
capacitor. Especially, the proposed circuit is not required the
additional circuit and electrolytic capacitor in order tocompensate the power decoupling.

Without active power decoupling160

82.1% reduced

120
With active power decoupling

80
40
0

2

4

6

8 10 12 14 16 18 20(100Hz)Harmonic number

Fig.10 Harmonic analysis result in simulation.
Table.2 Experimental parameter
Switching frequency

B. Experimental result
In order to demonstrate the validity of the proposed circuit,a 1 kW class prototype circuit is tested. Fig. 11 show theexperimental results in order to confirm the availability of the
proposed decoupling control. In this experiment, MPPT control
is not introduced for simplicity.
According to Fig. 11 (a), the input current iin is constant.
However, the inverter DC voltage vdc is fluctuated at twice ofthe single-phase grid frequency. This is because theinstantaneous difference value between input and output power
is compensated by the DC link capacitor Cdc. As a result, theTotal Harmonic Distortion (THD) of the output current iac isincreased.
According to Fig. 11 (b), the flying capacitor voltage vfc isfluctuated by the proposed control, and the vdc is constant.
From the results, the single-phase power fluctuation iscompensated by the flying capacitor Cfc. In addition the flying
capacitor average voltage is balanced at the half value of theDC link voltage. Finally, the output current iac became asinusoidal waveform by the proposed control. Especially, theproposed circuit can achieve the active power decoupling
without the additional circuit. Thus, the efficiency and power
density can be improved.

Capacitances

Finally, the ripple current of the boost-up inductor isestimated. Fig.14 shows the ripple current DI. In thisexperiment, peak to peak value of the ripple current DI isdesigned at 2.1 A. In addition, the inductance of the boost-up
inductor Lfc is designed from equation as (10). As a result, the

16

kHz

Cfc

180

mH

Cdc

60

mH

Lfc

2

mH

Lac

2.8

mH

Vin

150

V

Inverter DC voltage

Vdc

300

V

MOSFETs

S1-S4

IXYS, IXFN132N50P3

IGBTs

Sup，SunSvp，Svn

Fuji electric, 2MBI100VA

Inductances
Input voltage(%Z=2.3%)

Input current iin [5A/div]0

Inverter DC voltage vdc [250/div]

Voltage fluctuation is occurred0
Flying capacitor voltage vfc [100V/div]00

Fig.12 shows the harmonic analysis of the DC link voltage.
The second order harmonic component is reduced by 89.9%
compared to without the power decoupling control. However,the second order harmonic component is still included on theDC link voltage. This is because the power fluctuationcompensation value has the error by the actual single-phasepower fluctuation.
Fig.13 shows the efficiency characteristics of the proposed
circuit. From this result, maximum efficiency is 94.5% when
the output power is 1 kW. However, the efficiency at the lightload decrease. In order to improve the efficiency, the loss
analysis for the proposed circuit is conducted.

fsw

Output current iout [5A/div]

4[ms/div](a) Without power decoupling
Input current iin [5A/div]0

Inverter DC voltage vdc [250/div]

DC voltage become constantby proposed control0
Flying capacitor voltage vfc [100V/div]00
Output current iout [5A/div]

4[ms/div](b) With power decouplingFig.11 Experimental resulterror between the actual and design value is 4.7%. Therefore,
the validity of the design method is demonstrated byexperiment.
VII. CONCLUSION
In this paper, the novel power decoupling circuit that uses theflying capacitor topology is proposed in order to solve above
mentioned problems. The proposed circuit has the function of
the boost-up and single-phase power fluctuation compensation.
In the decoupling control strategy, the flying capacitor ischarged and discharged at the twice grid frequency. As aresults, the single-phase power fluctuation is compensatedwithout the large DC link capacitor. The advantages of the
proposed circuit are follows: 1) the additional magnetic
component for active power decoupling is not required; 2) the
inductance of the boost-up inductor can be reduced incomparison with conventional boost chopper. 3) Simple
constitution and easy control. In addition, the validity of thesingle-phase power fluctuation compensation is revealed by thesimulation and experiment.

[3]

[4]

[5]

[6]

With active power decoupling

1

0

2

4

6

8 10 12 14 16 18 20

Harmonic number

Fig.12 Harmonic analysis result in experiment.

Efficiency h [%]

95
94
93
92
91
200

400
600
800
Output power Pout [W]Fig.13 Efficiency characteristics.

1000

Inductor current ifc [1A/div]

DI : 2.0 A(Design value : 2.1 A)
The error between actualand design value is 4.7%
Inductor voltage vLfc [100V/div]

0

REFERENCES[2]

89.9% reduced(100Hz)In future works, the converter loss will be estimated inorder to improve the efficiency. In addition, optimization of theswitching frequency will be estimated. Moreover, the power
density both the conventional circuit and proposed circuit will
be compared.

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Without active power decoupling

10

0.1

From the experimental results, the flying capacitor vfc
voltage is fluctuated by the proposed control, and vdc isconstant. From the results, the single-phase power fluctuationis compensated by the flying capacitor Cfc. In addition the
flying capacitor average voltage is balanced at the half value of
the DC link voltage. Finally, the output current iout became asinusoidal waveform by the proposed control. Especially, theproposed circuit can achieve the active power decoupling
without the additional circuit. Thus, the efficiency and power
density can be improved.

[1](100%: DC voltage componet)

Harmonic components on
inverter DC voltage [%]100

40 msec/div
Fig.14 Estimation of the ripple current of the boost-up inductor.
[7]

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