Fundamental Verification of a Single-to-single Phase
Direct Power Converter for Wireless Power Transfer
Systems
Yuki Nakata, Yoshiya Ohnuma, Koji Orikawa, Goh Teck Chiang and Jun-ichi Itoh
Energy and Environmental Science
Nagaoka University of Technology
Nagaoka, Japan
nakata@stn.nagaokaut.ac.jp, itoh@vos.nagaokaut.ac.jp
Abstract— This paper proposes a single phase to single phasepower conversion that is based on the indirect type of matrix
converter, an active buffer circuit and boost chopper circuit.
Pulse density modulation (PDM) control which can achieve zerovoltage switching, is applied to the inverter part. From thesimulation results, the operation to compensate the power ripple
is confirmed because the DC link current is controlled
approximately 0.5 A constantly. However, there is the 35% of
the current ripple because of the quantization error when PDM
control is applied to the inverter. As a result, the THD of theoutput voltage and input current are 4.9% and 42.7%
respectively. As a result, a validity of the proposed circuit isconfirmed.

I.

INTRODUCTION

Recently, wireless power transmission (WPT) systems areactively studied and developed [1-3]. In particular, WPT
systems is composed of the magnetic resonant coupling or themagnetic induction, which are suitable for home appliancesand electronic vehicle, are receiving high attentions.
In WPT systems, the frequency for the receiving antenna
has to be same with the frequency of the power supply,
typically range from a several ten kHz to a few MHz.
However, in the home appliances which have a typical 50 Hz(or 60 Hz) frequency, an AC-AC power conversion that
intends to reduce the frequency is required.
In general, the power converter for high input frequency iscomposed from a diode rectifier because of no switchinglosses. However, due to the single phase power supply, thepower fluctuation which has a twice the frequency of theoutput frequency occurs at the DC bus. In order to reduce thefluctuation, passive components such as the electrolytic
capacitor is connected at the DC bus to smooth the energy
conversion. However, the electrolytic capacitor has several
issues, such as size, lifetime and cost. Therefore, there aresome methods to connect a boost converter with small film
capacitors instead of a large electrolytic capacitor in order toimprove the lifetime and costing issue.
On the other hand, the direct type of AC-AC conversion
techniques which are based on the concept of matrix converter
are actively researched for the field of single phase voltage
applications [4-6]. The direct type AC-AC conversion circuits
are mainly composed from switching devices only. The
passive components such as the boost reactor or thefilm/electrolytic capacitors are not used in the circuit. As theresults, the circuits can achieve small size and long lifetime.
In this paper, the authors propose a single phase to single
phase power conversion that is based on the indirect type ofmatrix converter and an active buffer circuit. The proposed
circuit features the following advantages;(a) Half of the output power is supplied directly from thediode rectifier to the inverter.
(b) The half value loss occurs because operation of
charging and discharging in the active buffer circuit at every
quarter of the output cycle.
(c) Discontinuous current mode is used in the charging
operation. As a result, the current sensor and a feedback
control are not required.
Moreover, since the input frequency is very high in the
WPT system, the inverter in the proposed circuit is appliedwith PDM to control the output voltage. The zero cross pointof the input voltage is taken as the switching timing for the
PDM. As the results, the inverter can achieve zero voltage
switching to improve the efficiency.
The structure of this paper is organized as follows; theproposed circuit topology is introduced at first. Then, thecontrol algorithm is explained in the chapter III. Finally,
simulation results are shown to demonstrate the validity of the
proposed circuit.

II.

CIRCUIT TOPOLOGY

A. Conventional Circuits
Figure 1 shows the conventional type of single phasecircuit diagram. Figure 1(a) shows the simplest circuit
structure which is based on a diode rectifier and a single phasevoltage inverter. However, this circuit has high harmoniccomponents in the input current. Figure 1(b) shows the PFC
circuit which is composed from a diode rectifier, a DC boost
converter and an inverter. The harmonic components of the
input current can be reduced, however the boost chopper
generates more losses, and hence the boost reactor andelectrolytic capacitor cause the circuit becomes larger in size.
Moreover, both of the circuits in Figure 1 require a large
electrolytic capacitor at the DC bus in order to compensate thepower ripple of the input power.
B. Proposed Circuit
Figure 2 shows the proposed circuit which can be appliedwith high input frequency. The input side is composed from a
diode rectifier with a LC input filter. The active buffer circuit
is connected at the DC bus, which can be divided into a charge
circuit and a discharge circuit. The main current does not passto the charge circuit and the discharge circuit. Therefore, theconduction losses which are generated from the active buffer
are relatively low. Furthermore, the discharge circuit
implements a small film capacitor to compensate the powerfluctuation at the DC bus.

(a) Diode rectifier and inverter type.

(b) Diode rectifier, boost chopper and inverter type.
Figure 1.

The inverter is implemented with PDM in order to reduce
the switching losses. PDM is a modulation that allows forming
a positive or a negative pulse waveform based on the pulse
width. Figure 3 shows the single phase operation of the PDM
for the proposed circuit. Since the WPT has a high frequency
input voltage, PDM is applied to form a pulse width for output
voltage at every half cycle of the input voltage is also the zerocross point of the waveform, and therefore the inverter canswitch at zero voltage. As a result, switching loss at theinverter stage is nearly to zero.
III.

Conventional circuits.

Figure 2. Proposed circuit.

CONTROL STRATEGY

A. Principle of the Power Ripple Compensation
Figure 4 shows the relationships between the input power,
the buffer power and the output power, in respect to the output
frequency. Since the input frequency is high, the input power
can be considered as a constant in respect to the output
frequency. The buffer power represents the fundemantal
operation of the active buffer circuit, which is basically toperform charging and discharging operation, in order toprovide a sustaintable single phase output.

Figure 3. PDM control waveform of proposed circuit.

To achieve a unity power load factor, the instantanous
power pout is represented by (1).
p out = v out ⋅ iout = {V AC sin(ωt )} ⋅ {I AC sin(ωt )}(1)
1
1= V AC I AC sin 2 (ωt ) = V AC I AC − V AC I AC cos(2ωt )22Where the VAC is the maximum output voltage, IAC is the
maximum output current and ω is the output angularfrequency. From (1), it can be known that the output power

Figure 4.

Compensation principle of power ripple.

fluactuates at twice the frequency of the output frequency. In
order to compensate the power fluctuation, the instantanous
buffer power (active buffer) pbuf needs to be controlled as (2).
1pbuf = − V AC I AC cos( 2ω t )
2

(2)

ic =

From (2), the charge circuit operates at the negative period of(-π/2<2ωt<π/2), and then the discharge circuit operates at thepostive period of (π/2<2ωt<3π/2). It can be known that theactive buffer is used for charging and discharging operations
only, thus the average power is nearly equaled to zero.
Therefore, small value of inductance and capacitance can be
implemented in the buffer circuit.
Once the power fluctuation is eliminated, the input power
pin is represented as (3), which is equivalent to the average
output power.
1
p in = V AC I AC
2

(4)

Also, since the iout is a continuous current, (5) can beestablished.

d REC + d C + d Z = 1

(5)

dC =

ic
=
i out

pin
1 VAC I AC=
Vin _ avg 2 Vin _ avg
1 V AC I AC
2 Vin _ avg

V AC
i
1
=
d REC = REC =I AC sin ωt 2 Vin _ avg sin ωt
i out

(6)

(7)

vc

=−

1 VAC I ACcos(2ωt )
2 vc

(8)

−

1 V AC I AC
cos( 2ωt )2 vc
1 V AC cos( 2ωt )(9)=−
2 v c sin ωt
I AC sin ωtThen, the dZ can be expressed as (10) from (5).

d Z = 1 − d REC − d C(10)Lastly, by replacing the VAC in dREC and dC with the
maximum output voltage command, the switching duty can berephrased as (11).
*
⎧
VAC
1
⎪d REC =2 Vin _ avg sin ωt⎪⎪*
1 V AC cos(2ωt )
⎪
=
−
d
⎨ C
2 vc sin ωt⎪⎪d = 1 − d
REC − d C
⎪ Z
⎪⎩

(11)

Secondary, Figure 5(b) shows the equivalent circuit during
the charging operation. During the charging operation, thedischarge circuit does not work and the switch SC is off. In thisperiod, the current irec and the inductor current il are controlled
by using the switch SREC and SL. SL is the charge switch.
Therefore, the equivalent circuit is obtained shown in Figure5(b). The switching duty for the dREC，dL and dZ, are obtainedby (12).

In order to control the input current constant, irec can be
expressed from (6). By substituting (4) into (6), dREC can becontrolled as shown in (7).

irec =

pbuf

However, vc is the instantaneous voltage of the capacitor, andtherefore the dC can be expressed as (9) from (4).

(3)

B. Control Approach
Figure 5(a) shows the equivalent circuit during thedischarging operation. Since the charge circuit does not workin this period, the current across Lbuf is zero. The input voltage
is considered as the average of the input voltage Vin_avg, andthe inverter is considered to be composed of a current source,
the switch SZ and the current iz. SZ represents the period ofzero voltage in the inverter. iz represents zero current pathway.
Equation (4) shows the switching duty for the dREC，dC，dZ,
where, SREC is the rectifier switch and SC is the discharge
switch.

⎡irec ⎤ ⎡d REC ⎤⎢ i ⎥ = ⎢ d ⎥⋅ i
⎢ c ⎥ ⎢ C ⎥ out⎢⎣ iz ⎥⎦ ⎢⎣ d Z ⎥⎦On the other hand, dC needs to be controlled in subjects tothe power fluctuation as expressed in (1). As long as thecapacitor can generate sufficient power to compensate thepower fluctuation, ic can be expressed from (8).

⎡i rec − i l + i z ⎤ ⎡ 1 ⎤⎢ i − i ⎥ = ⎢d ⎥ ⋅ i⎢ rec l ⎥ ⎢ rec ⎥ out⎥⎦ ⎢⎣ d Z ⎥⎦
⎢⎣
iz

(12)

The command of the inductor current il* is obtained by(13) according to the relationships between the buffer powerpbuf shown in (2) and the input voltage.

il = −pbuf
Vin _ avg=

1 V AC I ACcos(2ωt ) = il *2 Vin _ avg(13)In this paper, the inductor current il is controlled with thediscontinuous current mode [7]. In this case, in order toachieve sinusoidal input current, dL is expressed by (14).

dL =2Lbuf (v c − Vin _ avg )Vin _ avg v c Tsw⋅ il *

iout(14)

iout = I AC sin(ωt )Where Lbuf is the inductance of the charge circuit and Tsw is theswitching period.

(a) Equivalent circuit in discharge period.

Moreover, dREC is expressed by (15) with (6) and (12).

i −id REC = rec l =i out

I AC sin ωt

=

V AC
1
{1 − cos(2ωt )}2 Vin _ avg sin ωt=

V AC sin (ωt )=Vin _ avg sin ωt
2

iout

1 V AC I AC 1 V AC I AC−cos(2ωt )2 Vin _ avg 2 Vin _ avg(b) Equivalent circuit in charge period.

V AC sin ωt
Vin _ avg

iout = I AC sin(ωt )(15)

Figure 5. Equivalent circuits of proposed converter.

In addition, the inverter has the function, which changes
the polarity of output voltage and outputs the zero voltage.
The inverter changes the polarity by switching San and Sbn at
50 Hz, which is the output frequency. Sap and Sbp are switched(16) to output the zero voltage of the inverter using the pulse of dz,
which is quantized. Therefore, PDM control can achieved at
the inverter part.

Since the charge circuit operates independently from theinverter, (16) can be established.

d REC + d Z = 1
As a result, dZ is obtained by (17) with (15) and (16).
V AC sin ωt

IV.

SIMULATION RESULTS

A. Operation Waveforms(17)d Z = 1 − d REC = 1 −Figure 7 shows the simulation waveforms of the proposed
Vin _ avg
circuit. Table 1 shows the simulation conditions. Figure 7(a) is
Lastly, by replacing the VAC in dREC and dL with the the each operation waveforms, and Figure 7(b) is the operation
waveforms through a low pass filter.
maximum output voltage command VAC*， the switching duty
can be rephrased as (18).
From Figure 7, it is confirmed that the DC link current is
controlled approximately 0.5 A constantly. Considering thatthe DC link voltage is constant, it is seen that the power ripple*⎧
V AC sin ωt
is compensated by the active buffer. However, 35.6 % of the⎪d REC =power ripple exists. This is because the quantization error inV⎪in _ avg
PDM control for the inverter. As a result, the output voltage⎪
and the output power have a distortion at the zero cross of the
2 Lbuf (v c − Vin _ avg )⎪(18) output voltage. Therefore, the input power ripple occurs⋅ il *⎨d L =
Vin _ avg v c T sw⎪
because of the quantization error.
⎪*
V AC sin ωt⎪
Figure 8(a) shows the extended simulation waveforms of⎪d Z = 1 − Vthecharging operation. From Figure 8(a), it is confirmed thatin _ avg⎩
the inductor current il is discontinuous. In addition, the clamp
phenomenon does not occur. Moreover, from the output
C. Control Diagram
voltage, it is seen that the zero voltage switching is achieved
Figure 6 shows a control block diagram of the proposed in the inverter. Additionally, input current of the rectifier isconverter. The duty ratio commands are calculated from the like square wave, input current includes odd-order harmonics.
input voltage vin, the maximum output current IAC, which is
Figure 8(b) shows the extended simulation waveforms of
calculated from the output current iout, the buffer capacitor
voltage vc, the command of the output voltage vout*, the peak the discharging operation. From Figure 8(b), it is confirmedof the output voltage VAC* and the command of the angular that the output voltage is clamped to the capacitor voltage vc
frequency ω*. The gate pulses are given by comparing while the discharging current flows from the capacitor Cbuf.
However, the clamp phenomenon does not occur at the timing
between the duty command and the triangle carrier.

of the inverter switching, the zero voltage switching isachieved in the inverter. Therefore, it is noted that the clamp
phenomenon does not almost affect to the switching loss of
the inverter.
On the other hand, the quantization is not implemented in
the charge and discharge circuits. Therefore, the charge anddischarge circuits operate as the hard switching, which
generates the switching loss.

converter, an active buffer circuit and boost chopper circuit.
PDM control which can achieve zero voltage switching, isapplied to the inverter part.
From the simulation results, the operation to compensate
the power ripple is confirmed because the DC link current is
controlled approximately 0.5 A. However, there is the 35% of

From the results shown in above, the operation of thepower ripple compensation in the proposed circuit isconfirmed.
B. Harmonic Analysis
Figure 9 shows the harmonics analysis result for the output
voltage and input current. From Figure 9(a), the output voltage
does not consist of low-order harmonic components and theoutput voltage THD is 4.9%. In this case, output voltage
includes of the integral-multiple harmonic nearly to 10 kHz,
which is the carrier frequency used in this simulation. In
addition, the integral-multiple harmonic nearly to 200 kHz isalso included. 200 kHz of the harmonic components is thefluctuation components of the DC link voltage.

Figure 7. Control block diagram.

Figure 9(b) shows the harmonics analysis on the input
current. The input current includes of the integral-multiple
harmonic nearly to 100 kHz and therefore the input current
THD is 42.7%. Additionally, input current includes of theintegral-multiple harmonic nearly to 10 kHz because of thesame reason as case of output voltage.

TABLE I.

Parameter
Input voltage
Input frequency
Output voltage
Output frequency
Rload
Load
Lload

V. CONCLUSIONSThis paper proposed a single phase to single phase power
conversion that is based on the indirect type of matrix
4000Input voltage of rectifier vin[V]400
0-400 Input current of rectifier i [A]
in
5
0
-5
Output current of rectifier irec [A]
4
0
4
0
5
0
500
0
-500

Inductor current il[A]Catacitor current ic[A]Output voltage vout[V]Output current iout[A]
2
0
-2
0.00
0.01

0.02
0.03
Time t [s](a) Operation waveforms

0.04

SIMULATION PARAMETER.
Value
222 V (Average 200 V)
100 [kHz]70.7 V (Maximum 100 V)
50 Hz
50 Ω
10 mH

Input voltage of rectifier vin[V]-400 Input current of rectifier i [A]
in
5
0
-5
Output current of rectifier irec [A]
0.8
0.4
0
Inductor current il[A]0.40Catacitor current ic[A]0.4
0-0.4 Output voltage v [V]
out
100
0
-100
Output current iout[A]
2
0
-2
0.00
0.01
0.02
0.03
Time t [s](b) Operation waveforms after low pass filter

Figure 6. Simulation waveforms.

0.04

400
0

Input voltage of rectifier vin[V]400
0-400 Input current of rectifier i [A]
in
5
0
-5
Output current of rectifier irec [A]40-400 Input current of rectifier i [A]
in
5
0
-5
Output current of rectifier irec [A]40

Inductor current il[A]

4
0
5
0
500
0
-500

Input voltage of rectifier vin[V]Inductor current il[A]40Catacitor current ic[A]50Output voltage vout[V]Output current iout[A]
2
0
-2
8.0
8.1
8.2
8.3
Time t [ms](a) Charge period

500
0
-500

8.4

Catacitor current ic[A]Output voltage vout[V]Output current iout[A]
2
0
-2
14.0
14.1
14.2
14.3
Time t [ms](b) Discharge period

8.5

14.4

14.5

Output voltage vout[p.u.]

Figure 8. Extended operation waveforms.

(a) Harmonics analysis of output voltage.

(b) Harmonics analysis of input current.

Figure 9. Harmonic analysis results.

the current ripple because of the quantization error when PDM
control is applied to the inverter. As a result, the THD of theoutput voltage and input current are 4.9% and 42.7%
respectively.

[4]

[5]

From the results, the validity of the proposed circuit was
confirmed.
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