Novel modulation method for common-mode noise reduction
in Solid-State Transformer based on ISOP configuration
Naoto Kikuchi, Hiroki Watanabe, Keisuke Kusaka, Jun-ichi Itoh
Nagaoka University of Technology
1603-1, Kamitomioka-machi, Nagaoka, Niigata, JAPAN
Tel.: +81 / (258) –47.9533.
E-Mail: s195028@stn.nagaokaut.ac.jp
URL :http:// itohserver01.nagaokaut.ac.jp/itohlab/index.html

Keywords«Solid-State Transformer», «Converter control», «Power factor correction», «Resonant converter»,«EMC/EMI»

Abstract
This paper proposes a modulation method for the reduction of the common-mode noise in SolidState Transformer (SST) with the ISOP connection. Modular multilevel configurations based on the
ISOP connection increase the common-mode noise path because of increasing the switchingcomponents. Moreover, the cancellation of the common-mode noise using active common-mode
canceler is not able to be applied because of complex common-mode noise path in SST with the ISOP
connection. In the proposed method, one of the cells is driven by PWM in order to compensate for the
harmonic component. The other cells are driven by square-wave operation in order to share the load.
Therefore, the common-mode voltage is suppressed by the switching state of PFC. The advantage of the
proposed method is that the additional EMC filter is not necessary for the reduction of the commonmode noise. The operation waveform with the proposed method is shown in the experimental results.
The conducted emission is reduced by 11 dB and 7 dB in 200 kHz-band and 1 MHz-band, respectively.

Introduction
Recently, the DC microgrid has been attracted in terms of widespread use of the renewable energies.
Solid-State Transformer (SST) is the one of the key components of the distributed system proposed by
the Future Renewable Electric Energy Delivery and Management Systems Center [1-3]. SSTs are a
power electronic interface between a medium voltage system and a low voltage system, which provides
galvanic isolation with medium-frequency transformer [4]. The role of the power converter is the power
flow control and the compensation for the reactive power. The medium frequency transformer enables
to increase in the power density of the converter. Focusing on improvement of efficiency and power
density, various circuit topologies of SST have been proposed in this decade [1-10]. Modular multilevel
configurations in based on input series and output parallel (ISOP) have been widely used. The advantageof the ISOP connection is that low on-resister and low-switching loss devices are available because theapplied voltage on each cell is divided by the number of cells. For these topologies, SiC-MOSFETs havebeen widely used because of their fast switching and low on-resistance. However, these wide-bandgap
devices increase the common-mode noise due to the rapid switching behavior [11]. The emission limit
for information technology equipment is defined in the International Special Committee on RadioInterference (CISPR) 11. Therefore, the EMC filter is designed for compliance with CISPR 11/EN55011
standard [12]. The active common-mode canceler (ACC) based on the voltage cancellation method or
the current cancellation has been proposed in [13-20]. These filters have the advantage of suppressing
sufficiently the common-mode noise with a push-pull emitter follower amplifier. However, theadditional ACC is limited by the rated voltage of the amplifier. Therefore, It is not able to apply theadditional ACC to the medium-voltage system such as SST.
In this paper, a novel modulation method is proposed in order to reduce the common-mode noisein SST with the ISOP connection. The advantage of the proposed method is that the additional EMC

filter is not necessary for the reduction of the common-mode noise. The originality of this paper is thatthe modulation method uses the deference driving frequency in order to suppress the common-mode
voltage. Owing to the propose modulation, the leakage current is suppressed in comparison with theconventional modulation. Moreover, the new contribution of this paper is that the reduction of thecommon-mode noise by replacing high-frequency SiC devices to low frequency Si devices.
This paper is organized as follows: firstly, the system configuration of SST with the conventional
method and the proposed method is described. Secondly, the principle of the proposed method for the
reduction of the common mode noise is explained with the common-mode equivalent circuit of SST.
Finally, the conducted emission is compared between the conventional method and the proposed methodin the experiment.

System Configuration
Circuit configuration
Fig. 1 shows the circuit configuration of the single-phase SST when the number of cell is three.
Note that the number of cell is decided by the grid voltage and voltage rating of the power devices. Eachcell has a PFC stage and an isolated resonant DC/DC converter. The input of the PFC stage in the cells
is connected in series. The outputs of the isolated resonant DC/DC converters, which ensure the galvanic
isolation, are connected in parallel. The input diode rectifier is common for all cells in order to reduce
the number of components. The high-frequency operation contributes to minimizing the isolationtransformer. The transformer of the isolated resonant DC/DC converter is smaller than the commercial
frequency transformer because the switching frequency is higher than the grid frequency. Besides, theresonant capacitor Cr is connected to the primary side of the isolated transformer in series. The DC/DC
converter is controlled with open-loop control due to the constant voltage transfer ratio. The switchingfrequency is a little higher than the resonant frequency for zero-voltage switching (ZVS) operation.

Cell1(Square-wave Drive)
Resonant DC/DC Converter

PFC
s11

sdc dc11Lb

sdc dc21
1:1

sdc dc31
Vout

Vdc 1
sdc dc12Cr

s12

sdc dc22

sdc dc32

Cell2(Square-wave Drive)
s21
vin

Vdc 2

vconv
s22

Cell3 (PWM Drive)
s31
vpwm

Vdc 3

s32
Fig. 1. Circuit configuration of the single-phase SST.
The proposed modulation method is applied into the PFC stage.

Conventional method
Fig. 2 shows the block diagram of the conventional control method of the PFC stages. The
conventional method controls the inductor current with PWM in all cells. The overall PFC circuits
controls phase and amplitude of the input current to correct the input power factor. Then, reference of
the input current is given byiL* = I amp sin (t )(1)where Iamp is amplitude of the input current command. The phase of the input current is generated by
PLL from the phase of the grid voltage. Note that the ripple current is reduced by operating phase shifted
carrier in the PFC converter. Thus, the input voltage is equally divided because the switching timing isequally shifted.
Fig. 3 shows the switching pulse generation of the secondary side rectifier. The full-bridge
converter on the secondary side operates as a synchronous rectifier. The switching pulse is the same as
the pulse of the primary side. In the primary side, the resonant current ire is positive when Sdcdc11 , Sdcdc21,
Sdcdc32 are turn-on. Note that the phase of the primly side resonant current is a little different in order todesign resonant DC/DC converter. Similarly, Sdcdc12, Sdcdc22, Sdcdc31 are turn-on when the resonant current
is negative.

Proposed modulation method
Fig. 4 shows the relationship between the input voltage and the output voltage of the cell. The
switching state of the cell3 is followed by the boost mode. The cell3 is driven by the PWM operation inorder to compensate for the harmonic component of the other cells. The cell1 and cell2 are driven bysquare-wave operation. The output voltage of the cell operated with square-wave is determined by thecomparison with the voltage command of the PFC stage and the DC-link voltage of each cell. The
switching device on the upper arm of the cell1 turns on when the output voltage command vconv is higher
than DC-link voltage of the cell1. Similarly, the switching device on the upper arm of the cell2 turns onv
Boost Inductor in
Current Control
+ +
PI
-

Iin*

ABS

1
m

1
vdc 1
1

iL

0
sinq
PLL

1

vin

0

+
-

s11

NOT
Carrier
1
vdc 3

+
-

s12

s31
NOT

s32

Carrier
Phase-shifted
Fig. 2. Control block diagram of the PFC with the conventional method.
The conventional modulation of the PFC is driven by PWM.

ire

Sdcdc11
Sdcdc21,Sdcdc32
Sdcdc12
Sdcdc22,Sdcdc31
Fig. 3. Pulse generation for secondly side rectifier in DC/DC converter.

when the output voltage command is higher than the sum of the DC link voltages of the cell1 and thecell2. Thus, the output voltage of the cell1 and the cell2 is double of the grid frequency.
Fig. 5 shows the block diagram for the control of the input current with the proposed method. The
output voltage of the square-wave cells behave to the current controller as the disturbance because theoutput value of the PI controller is the total output voltage of all the cell converters. Thus, the input
voltage of the cell3 vin3 is given by(2)
vin3 = vin − vdc1ssqr11 − vdc 2 ssqr 21
where vdc1 and vdc2 are the DC-link voltage of cell1 and cell2, respectively. Moreover, ssqrn1 is theswitching function of the square-wave cell in the PFC stage. When the upper switch sn1 is on-state, ssqrn1
equals 1. When the upper switch sn1 is off-state, ssqrn1 equals 0. As shown in (2), the current controller
compensates the output voltage of the square-wave cells with the feed-forward control. Then, the output
voltage compensated is the output voltage of the cell3, the gate signal of the PFC circuit is determinedwith standardizing and comparing triangle carrier. Note that the output power of each square-wave cellis balanced by the sorting the switching state in SST [21].

V
Threshold voltage
Vdc 1 + Vdc 2

vinv

Output voltage(Cell2)
Output vol.(Cell1)
Output area(Cell3)

Vdc 1
0

s11
1
s21

0

1

Time

s

Time

s

0

Time
s
Fig. 4. Operation principle of the proposed method.
The relationship between the input voltage and the output voltage of cell #1 and #2, #3. (m = 3).

Iin*

Fig. 5. Control block diagram with the proposed method (m = 3).

Common-mode equivalent Circuit

Lb/2

Equivalent circuit model of PFC

vin/2

Fig. 6 shows the PFC circuit based on the input
series connection with the parasitic components.
This model consists two cell converters for thesimplification of the following analysis. Note that
this model does not consider the different values forthe parasitic capacitance, the parasitic inductanceand the parasitic resistance. The circuit model
considers the parasitic capacitance between theswitching component and the heatsink in order tosimulate the leakage current generated by theswitching operation of the PFC stage. Moreover,the circuit model is symmetric in order to design theequivalent model of the PFC stage.
Fig. 7 shows the equivalent circuit model of
PFC. Cpfc_gnd is the parasitic capacitance. Lpfc_gnd is
the parasitic inductance. Rpfc_gnd is the parasitic
resistance. Lb is boost inductance. The commonmode voltage-source vcom_pfc1, vcom_pfc2 are given byvcom _ pfc1 = swpfc11Vdc1 / 2 + swpfc 21Vdc 2 / 2(3)vcom _ pfc 2 = − swpfc11Vdc1 / 2 + swpfc 21Vdc 2 / 2

Vdc

swpfc12
s21
Vdc

vin/2
Lb/2

s22
Cpfc-GND

Lpfc-GND
Rpfc-GND
icom_pfc

Fig. 6. Circuit configuration of the PFC stage
with the parasitic components.
Z1

Lb/4

vcom_cell1

vcom_cell2Z2

2Cpfc-GND
Lpfc-GND/2

2Cpfc-GND
Lpfc-GND/2

Rpfc-GND/2

Rpfc-GND/2(4)

where Vdc1 and Vdc2 are DC-link voltage of each cell,swpfcn1 is the switching state of the upper arm
device, swpfcn2 is the switching state of the lower arm
device. Hence, the common-mode voltage ischanged by the switching state of each cell. As theshown in Fig. 7, the leakage current of the PFC isgiven by
icom _ pfc = (2vcom _ pfc1 + vcom _ pfc 2 ) / (2Z1 + Z 2 )(5)

swpfc11Z2

icom_pfc

Fig. 7. Common-mode equivalent modelof the PFC stage.
100
100

85dBA

Lecage current [dBA]

990kHzwhere Z1 is the impedance of the boost inductor Lb. 8080
Z2 is the combined impedance of the parasitic
capacitor Cpfc_gnd, the parasitic inductor Lpfc_gnd and 6060
the parasitic resistance Rpfc_gnd. Here, the common40
40
mode voltage vcom_pfc1 is twice impact of thecommon-mode voltage vcom_pfc2 as shown in (5). 2020
This means that suppressing the common-mode
voltage vcom_pfc1 is effective in order to attenuate the 00
Circuit modelleakage current in PFC. In the conventional method, -20
Equivalent model
-20
0.01
0.1
30
1
10
10000
1000001000000
10000000
the switching operation of the cell1 is caused byFrequency[MHz]PWM. On the other hand, in the proposed method, Fig. 8. Comparison of the leakage current between
the switching operation of the cell1 is double of thethe circuit model and the equivalent model
grid frequency in order to be driven by squarein the PFC stage.
wave. Thus, the common-mode voltage vcom_pfc1 issuppressed by the proposed method.
Fig. 8 shows the comparison of the leakage current with the circuit model and the equivalent modelin the PFC stage with the switching frequency of 30 kHz. The envelope of the leakage current
in the circuit model almost agrees with the equivalent model. Each model has the spectrum of maximum
value 85 dBA at the 990 kHz. This means that the frequency is the resonant frequency between theparasitic capacitor and the boost inductor.

Equivalent circuit model of resonant
DC/DC converter

Vdc /2swdc 1

Lecage current [dBA]

2Cs
Ls/2
Fig. 9 shows the circuit model of the resonant
Cout
DC/DC converter with the parasitic components.
Lm
This model consists one cell converter because the Vdc /2
2C
s
Ls/2
swdc 2gate signal of each cell is same with the open-loop
Cdc dc-GND
control. The circuit model considers the parasitic
Ldc dc-GND
components between the switching component andthe heatsink in order to simulate the leakage current
Rdc dc-GND
generated by the switching operation of the DC/DC
icom_dc dc
converter. Moreover, the circuit model issymmetric in order to design the equivalent model Fig. 9. Circuit configuration of resonant DC/DC
converter with the parasitic components.
of DC/DC converter.
Fig. 10 shows the common-mode equivalent
vcom_dc dc
model of DC/DC converter. Here, Cdcdc_gnd is theparasitic capacitance. Ldcdc_gnd is the parasitic
inductance. Rdcdc_gnd is the parasitic resistance. Note
Cdc dc-GND
that the magnetizing inductance Lm does not
Ldc dc-GND
consider because the indicator is shorted in the
Rdc dc-GND
equivalent model. The common-mode voltagesource vcom_dcdc, is given by
icom_dc dc
vcom _ dcdc = swdc1Vdc1 / 2 − swdc 2Vdc1 / 2(6)
Fig. 10. Common-mode equivalent model
where Vdc1 and Vdc2 are the DC-link voltage of eachof resonant DC/DC converter.
cell, swdc1 is the switching state of the upper arm
120
device and swdc2 is the switching state of the lower 120
Circuit model
101dBA
Equivalent model
100
2.3MHzarm device. Hence, the common-mode voltage is 100
80
80changed by the switching state of each cell.
Fig. 11 shows the comparison of the leakage 6060
current with the circuit model and the equivalent 4040
model in the resonant DC/DC converter with the 2020
switching frequency of 50 kHz. The envelope of the 00-20
leakage current in the circuit model almost agrees -20-40with the equivalent model. Each model has the -40-60-60
spectrum of the maximum value 101 dBA at the -80
-80
0.01
0.1
30
1
10
2.3 MHz. This means that the frequency is the
10000
1000001000000
10000000
Frequency[MHz]resonant frequency between the parasitic capacitor
Fig. 11. Comparison of the leakage current
and the parasitic inductance.
with the circuit model and the equivalent model
Equivalent circuit model of SST
in resonant DC/DC converter.
Fig. 12 shows the SST circuit model based on
Cell1
the ISOP connection with the parasitic components.
swpfc11swdc dc11
This model uses three cell converters for the
Lb/2
comparison with experimental model. Note that thismodel does not consider the different values for theswdc dc12
swpfc12
parasitic capacitance, the parasitic inductance and vin/2
Cpfc-GND
Cdc dc-GND
the parasitic resistance.
Lpfc-GND
Ldc dc-GND
Fig. 13 shows the common-mode equivalentR
Rdc dc-GND
pfc-GND
model of SST. This model considers the parasitic vin/2
component between the switching devices and theCell2heatsink in PFC and the DC/DC converter. Note
Lb/2
that the parasitic component of the secondly side
Cell3
rectifier does not consider because the conventional
icom_sst
method and the proposed method are driven by theFig. 12. Circuit configuration of SST
same operation with open-loop control.
with the parasitic components.

Lb/4

vcom_pfc1

vcom_dc dc1

vcom_pfc2

vcom_dc dc2

vcom_pfc3

vcom_dc dc3

Cpfc-GND
Lpfc-GND

Cdc dc-GND
Ldc dc-GND

Cpfc-GND
Lpfc-GND

Cdc dc-GND Cpfc-GND
Ldc dc-GND Lpfc-GND

Cdc dc-GND
Ldc dc-GND

Rpfc-GND

Rdc dc-GND

Rpfc-GND

Rdc dc-GND Rpfc-GND

Rdc dc-GND

icom_sst
Fig. 13. Common-mode equivalent model of SST.

Experimental results
Experimental result with the conventional
methodTable I shows the experimental parameters.
The input voltage is 200 V, the rated power is 1.0
kW, and the number of cells is three. Moreover, theprototype is operated with the conventional control
block diagram, as shown in Fig. 3, and the proposed
control, as shown in Fig. 5.
Fig. 16 shows the operation waveforms of theconventional method. Fig. 16(a) shows that the
input current THD is 3.18%, and the input power
factor is 0.99. Fig. 16(b) shows that each cell isdriven by PWM against grid voltage.

Experimental result with the proposed
modulation
Fig. 17 shows the operation waveforms of the
proposed method. In the proposed method, theswitching frequency of the PFC circuits is 30 kHz.
Fig. 17(a) shows that the input current THD is
2.91%, and the input power factor is 0.99. In

Lecage current [dBA]

Lecage current [dBA]

Fig. 14 shows the comparison of the leakage
120
current between the circuit model and the 120
103dBA
2.3MHzequivalent model in SST with the switching 100
100
frequency of 30 kHz in the PFC part using theconventional method. The switching frequency of 8080
DC/DC converter is 50 kHz with open-loop control.
60
The envelope of the leakage current in the circuit 60
model almost agrees with the equivalent model. 4040
Each model has the spectrum of the maximum value
20
20
103 dBA at the 2.3 MHz.
Circuit modelFig. 15 shows the comparison of the leakage 00
Equivalent model
0.1
30
1
10
1000000
10000000
current between the simulation model and the 100000
Frequency[MHz]experimental model. The leakage current has 74.4 Fig. 14. Comparison of the leakage current withdBA in 120 kHz-band and 87.6 dBA in 180 kHz- the circuit model and the equivalent model in SST.
band. Thus, the switching frequency components of
PFC is large impact in SST. Moreover, the 120
87.7dBA
180kHzsimulation model is the appropriate model because
100 72.4dBA
120kHzof almost the agreement with the experimental
result.
80
60
40
20

0
0.1

Simulation
Measurement
1Frequency[MHz]10

Fig. 15. Comparison of the leakage current
with simulation and experiment in SST.
Table I. Experimental parameters.
Input voltage
Vin
200 V rms
Rated output powe r
Pout
1.0 kW
Rated output voltage
Vout
50 V
Switching Device
SCT2080KE
fs
50 Hz
Grid F reqenc y1500 µF
Primary side capacitor
C1
Resonant capacitor
204 nFCr
Leakage inductor
Lr
50 µH
Seconda ry side capacitor
C23600 µF
Trans turns ration
N1:N 2
1:1
Num ber of cellsm3
30 kHzSwitching fre quency of PFC fsw _pfc
Switching fre quency of LLC fsw _llc
50 kHz30Input Voltage (500V/div)

Input Voltage
Voltage(500V/div)(500V/div)

0V

0V
Cell.1
Cell.1 Output
Output Voltage(100V/div)
Voltage(100V/div)
Input Current(10A/div)

THD:3.18%

0A

0V
Cell.1 –3 Output Voltage(200V/div)

Cell.2Cell.2 Output
Output Voltage(100V/div)
Voltage(100V/div)

0V
0V

0V
4[ms/div]

Cell.3Cell.3 Output
Output Voltage(100V/div)
Voltage(100V/div)

4[ms/div](a) Operation waveform.
(b) Output voltage of each cell.
Fig. 16. Operation waveform with the conventional method.
Input Voltage (500V/div)

Input Voltage (500V/div)

0V

0V
Cell.3 Output Voltage(100V/div)
Input Current(10A/div)

THD:2.91%

0A

0V
Output Ce ll Voltage(200V/div)

Cell.2 Output Voltage(100V/div)

0V
0V

0A
4[ms/div]

Cell.1 Output Voltage(100V/div)

4[ms/div](a) Operation waveform.
(b) Output voltage of each cell.
Fig. 17. Operation waveform with the proposed method.

Condcted Emission[dBV]

9.00E+01
90

8.00E+0180

11dB
reduction

7dB
reduction

7.00E+01
70

6.00E+01
60

5.00E+01
50

40
4.00E+01
0.1
100000Conventional
Proposed1
1000000

10
10000000

30

100000000

Freqency[MHz]Fig. 18. Frequency spectrum of the Conducted emission
with the conventional or the proposed method.
addition, Fig. 17(b) shows the output voltage of the square-wave cells in double of the grid frequency.
The PWM cell compensates the harmonic components of the square-wave cell.

Comparison of the conducted emission with the conventional and the proposed method.
Fig. 18 shows the analysis of the conducted emission with the conventional and the proposed
method. The proposed method reduces the carrier frequency component produced by PWM. Moreover,
the attenuation of almost 11dB and 7dB in 200 kHz-band and 1.2 MHz-band are achieved, respectively.
Fig. 19 shows the comparison of the frequency spectrum with applying PWM to PFC of each cellusing the proposed method. Focusing on the frequency spectrum of Cell1 and Cell3, the attenuation ofalmost 13 dB and 7 dB in 200 kHz-band and 2 MHz-band are achieved, respectively. Thus, the proposed
method is effective in order to reduce the conducted emission by applying PWM to the lower cell.

Condcted Emission[dBV]

90
90
80
80

13dB
reduction

7dB
reduction

70
70

60
60
50
50
40
40

30
30

20
20

0.1
100000

Cell1 PWM
Cell2 PWM
Circuitmodel
Cell3 PWM
Equivalentmodel
11000000

10
10000000

30

Frequency[MHz]Fig. 19. The comparison of the frequency spectrum with applying PWM
to each cell with the proposed method.

Conclusion
This paper had proposed a novel modulation method in order to reduce the common-mode noise in
SST based on the ISOP connection. In the proposed method, one of the cells is driven by PWM in order
to compensate for the harmonic component. This paper showed the reduction of the common-mode
voltage with the proposed method at the switching frequency. The principle of the proposed method wasshown by the equivalent circuit of SST. As the experimental result, the conducted emission was reducedby 11 dB at 200 kHz-band, 7 dB at 1 MHz-band with the proposed method. Moreover, the proposed
method is effective in order to reduce the conducted emission by applying PWM to the lower cell.

References[1] J. E. Huber and J. W. Kolar: "Applicability of Solid-State Transformers in Today’s and Future Distribution
Grids", IEEE Transactions on Smart Grid, Vol. 10, No. 1, pp. 317 -326, (2019).
[2] L. Ferreira Costa, G. De Carne, G. Buticchi and M. Liserre: "The Smart Transformer: A solid -statetransformer tailored to provide ancillary services to the distribution grid", IEEE Power Electronics Magazine,
Vol. 4, No. 2, pp. 56-67,(2017).
[3] J. E. Huber and J. W. Kolar, "Solid-State Transformers: On the Origins and Evolution of Key Concepts," inIEEE Industrial Electronics Magazine, vol. 10, no. 3, pp. 19-28, Sept. 2016.
[4] J. E. Huber and J. W. Kolar, “ Volume/weight/cost comparison of a 1MVA 10 kV/400 V solid-state against a
conventional low-frequency distribution transformer,” in Proc. IEEE Energy Convers. Congr. Expo. (ECCE),
Pittsburgh, PA, USA, Sep. 2014, pp. 4545–4552.
[5] J. E. Huber, J. Böhler, D. Rothmund and J. W. Kolar, "Analysis and cell-level experimental verification of a
25 kW all-SiC isolated front end 6.6 kV/400 V AC-DC solid-state transformer," in CPSS Transactions on PowerElectronics and Applications, vol. 2, no. 2, pp. 140-148, 2017.
[6] X. Cai et al., "Fluctuation Power Control Strategy for MMC-based SST to Reduce the Submodule Capacitor
Voltage Oscillation," 2019 10th International Conference on Power Electronics and ECCE Asia (ICPE 2019 ECCE Asia), Busan, Korea (South), 2019, pp. 2430-2435.
[7] T. M. Parreiras, A. P. Machado, F. V. Amaral, G. C. Lobato, J. A. S. Brito and B. C. Filho, "Forward DualActive-BridIEEE Transactions on Industry Applications, vol. 54, no. 6, pp. 6353-6363, Nov.-Dec. 2018.
[8] L. Zhang, J. Qin, Q. Duan and W. Sheng, "Component Sizing and Voltage Balancing of MMC-based SolidState Transformers Under Various ACLink Excitation Voltage Waveforms," 2019 IEEE Applied PowerElectronics Conference and Exposition (APEC), Anaheim, CA, USA, 2019, pp. 371-375.
[9] T. Liu et al., "Design and Implementation of High Efficiency Control Scheme of Dual Active Bridge Based
10 kV/1 MW Solid State Transformer for PV Application," in IEEE Transactions on Power Electronics, vol. 34,
no. 5, pp. 4223-4238, May 2019.
[10] A. Rodriguez et al., "Auxiliary power supply based on a modular ISOP flyback configuration with very highinput voltage," 2016 IEEE Energy Conversion Congress and Exposition (ECCE), Milwaukee, WI, 2016, pp. 1-7.

[11] N. Oswald, B. H. Stark, D. Holliday, C. Hargis and B. Drury: "Analysis of Shaped Pulse Transitions inPower Electronic Switching Waveforms for Reduced EMI Generation", IEEE Transactions on Industry
Applications, Vol. 47, No. 5, pp. 2154-2165, (2011).
[12] IEC CISPR 11 Edition.5.0:Industrial, Scientific And Medical Equipment -Radio-Frequency DisturbanceCharacteristics - Limits And Methods Of Measurement, IEC Standard,May,2009.
[13] S. Ogasawara, H. Ayano and H. Akagi: "An active circuit for cancellation of common-mode voltage
generated by a PWM inverter", IEEE Transactions on Power Electronics, Vol. 13, No. 5, pp. 835-841, (1998).
[14] M. C. D. Piazza, A. Ragusa, and G. Vitale, “Effects of common-mode active filtering in induction motor
drives for electric vehicles,” IEEE Trans. Veh. Technol., vol. 59, no. 6, pp. 2664–2673, Jul. 2010.
[15] W. Chen, X. Yang, J. Xue, and F. Wang, “A novel filter topology with active motor CM impedance
regulator in PWM ASD system,” IEEE Trans. Ind. Electron., vol. 61, no. 12, pp. 6938–6946, Dec. 2014.
[16] Yingliang Huang, Yongxiang Xu, Yong Li, Guijie Yang, Jibin Zou, "PWM Frequency Voltage Noise
Cancelation in Three-Phase VSI Using the Novel SVPWM Strategy", IEEE Transactions on Power Electronics,
vol.33, no.10, pp.8596-8606, 2018.
[17] Ziyou Lim, Ali I. Maswood, Gabriel Heo Peng Ooi, "Common-Mode Reduction for ANPC With Enhanced
Harmonic Profile Using Interleaved Sawtooth Carrier Phase-Disposition PWM", IEEE Transactions on
Industrial Electronics, vol.63, no.12, pp.7887-7897, 2016.
[18] D. Shin et al., “Analysis and design guide of active EMI filter in a compact package for reduction ofcommon-mode conducted emissions,” IEEE Trans. Electromagn. Compat., vol. 57, no. 4, pp. 660–671, Aug.
2015.
[19] H. Peng, B. Narayanasamy, A. I. Emon, Z. Yuan, M. Ul Hassan and F. Luo, "Design and Implementation of
Selective Active EMI Filter with Digital Resonant Controller," 2020 IEEE Energy Conversion Congress andExposition (ECCE), Detroit, MI, USA, 2020, pp. 5855-5861.
[20] Yingliang Huang, Yongxiang Xu, Wentao Zhang, Jibin Zou, "PWM Frequency Noise Cancellation in TwoSegment Three-Phase Motor Using Parallel Interleaved Inverters", IEEE Transactions on Power Electronics,
vol.34, no.3, pp.2515-2525, 2019.
[21] N. Kikuchi, J. -I. Itoh, K. Kusaka and H. N. Le, "Hybrid Multiple Chopper Cells of PWM and Square-wave
Operation for Solid-state Transformer," 2020 22nd (EPE'20 ECCE Europe), 2020, pp. P.1-P.10.