An Investigation of High Efficiency Operation
Conditions for a Three-Port Energy Source System
Using an Indirect Matrix Converter
Koji Kato Member, IEEE Member

Jun-ichi Itoh Member, IEEE Member

Sanken Electric CO, LTD.
667 Shimoakasaka Kawagoe city
Saitama, Japank.kato@sanken-ele.co.jp

Nagaoka University of Technology
1603-1 Kamitomioka-machi Nagaoka city
Niigata, Japan
Itoh@vos.nagaokaut.ac.jp
a capacitor in the DC link part [2-12]. The utilization of these
AC-AC direct converters in the renewable energy systems
can achieve advantages such as downsizing, long-life cycle
and low cost.[13-14] The IMC contains a DC link part,
therefore it is easily interconnected with a DC power supply.
Conversely, the interface converters that employ an IMC
have been proposed in Ref. [15-17].

Abstract— This paper describes an investigation of highefficiency operation conditions among three energy sources,
which consists of two AC and one DC power supplies. Theinterface converter, which is the indirect matrix converter(IMC) is connected with a boost DC-DC converter at the DC
link part of the IMC with an active snubber. In addition, theproposed converter can achieve a wide control range of output
voltage by controlling the active snubber circuit. The efficiencyof the interface converter depends on the power sharing ratioof each energy source. In order to determine the losses of the
proposed circuit, a loss analysis method is established in the
IMC. As a result, the high efficiency operation conditions andthe validity of the proposed circuit are confirmed by the loss
analysis. Furthermore, the experimental results confirmed thatthe input power factor is over 99% and the maximum
efficiency is 95.4%. Finally, the switching device optimization
is analyzed by the pareto frontier method to determine the costand efficiency for IMC.

I.

The proposed system has a lot of operation conditions
based on the energy source and load conditions. The losses
for the proposed converter are depending on these operation
conditions. However, it remains unclear that which operation
conditions could achieve the highest efficiency. In addition,
there is no discussion of optimization method for theswitching device.
The conventional loss analysis method of IMC, which issimulated from a circuit simulator (PSIM, Powersim
Technologis Inc, or PLECS, Plexim etc.), which has been
discussed in Ref. [18] are well used. This method canestimate the loss of the IMC regardless of the circuit
topology and control method. However this method is
unsuitable for the investigation of high efficiency operation
conditions for the proposed converter because many
conditions should be simulated to find the optimum point.
That is, the conventional method needs a lot of time tosimulate and calculate the IMC losses.

INTRODUCTION

Recently, renewable energy and hybrid electric vehicle(HEV) systems have attracted a lot of attentions incommunities. These renewable energy systems are such as
wind turbines, batteries and fuel cells. The application of theinterface power converters have been intensely studied inthese systems. A conventional power converter system,
which consists of a pulse width modulation (PWM) rectifier,a DC-DC converter and an inverter, requires an electrolytic
capacitor.[1-2] However, the electrolytic capacitor in aconventional system has several issues, such as size, life timeand cost.[] Nevertheless it is difficult to use electrolytic
capacitors for HEV applications, especially in terms of their
lifetime, which is affected by high temperature.

This paper investigates the high efficiency operation
conditions of the proposed system using an IMC and a DC
chopper. In order to determine the losses for the proposedsystem, mathematical equations are established to analysis
the IMC. Mathematical equations are easy to use foranalyzing the IMC losses under various conditions. At first,
in order to determine the losses of the proposed circuit, a loss
analysis method is established in the IMC by using
mathematical equations. Next, the high efficiency operation
condition of proposed system is discussed by using the loss
analysis method which is proposed by the authors. Moreover,On the other hand, another type of AC-AC directconverters without a large energy buffer are studied such as
the indirect matrix converter (IMC), which consists of acurrent source rectifier and a voltage source inverter without

978-1-4577-0541-0/11/$26.00 ©2011 IEEE

230

for the inverter and the DC-DC converter. The PWM pulseof the inverter and DC-DC converter carrier is obtained bycomparison of the carriers and voltage command, which is
calculated by the SVM. In the proposed method, the DC-DC
converter applies with the carrier comparison method isshown in Fig. 3. The zero voltage vectors of the inverter andlower arm switch Sbn of the the DC-DC converter must be
synchronized with the rectifier switching timing. Therefore,
the inverter carrier is inverted when the active snubberswitch is turned on. Zero current switching (ZCS) of therectifier stage is achieved at all time, i.e., the proposed
control method can control the DC-DC converter
independently.

the fundamental operation of the proposed method has been
confirmed by experimental results. Finally, the optimization
design for the switching device is analyzed by the pareto
front method to determine the cost and efficiency for IMC.
II.

CIRCUIT TOPOLOGY AND CONTROL STRATEGY

A.

Proposed circuit topology
Figure 1 shows the proposed circuit configuration. The
DC power supply interface converter is connecting at theDC link of the indirect matrix converter. In addition, theproposed converter can achieve a wide control range of
output voltage by controlling the active snubber circuit. The
voltage transfer ratio in this proposed circuit is improved byusing the active snubber circuit. This converter has six kindsof energy flow sections as shown in table 1. The requirementof power flows for a HEV system can be achieved by the
proposed converter.

Active DC/DC Voltage source
Current source Snubber
converter
inverterrectifierSrp

B. Proposed control strategy
Figure 2 shows the control block diagram of the proposed
converter. The proposed control method of the inverter stage
is based on a space vector modulation (SVM). However, a
DC-DC converter is difficult to add into the SVM, because
the 4-leg space vector is expressed by three dimensions [19].
Therefore, the DC-DC converter is controlled using thecarrier comparison method with the SVM [3]. In addition,
the DC-DC converter uses an automated current regulator(ACR) to regulate the battery current. The power distribution
ratio is then determined by the DC-DC converter current
command. The power distribution ratio between the AC
input power and the DC power supplies is controlled by the
DC-DC converter duty command with the active snubber
duty command.

Ssp Stp

R
S
T

Sc

Sbp

Sup

Svp

Swp
U
V
W

vc

Srn

Ssn

Sbn

Stn
Bn

Bp

Sun

Svn

Lb

vbatt

iL

M

Swn

DC power
supplyFigure 1. Proposed circuit.
Table 1. Energy flow of proposed converter.
Energy flow Power gridBatteryMotorsectionoperation
operation
operation
I
Generation
ChargeMotoring
II
Generation
ChargeGenerating
III
Generation
Discharge MotoringIV
Regeneration
ChargeGenerating
V
Regeneration Discharge Motoring
VI
Regeneration Discharge Generating

Figure 3 shows the following items in a half control
period: switching mode for each of the converters, the carrierFig.2. Control block diagram of proposed converter.

231

Table 2. Experimental parameters.

Ts/2
Tc/2

Rectifier stage
switching modeandDC link voltage

Trec/2

Vc

Vrt

Vst

Inverter stage vb*
carrier and T1+T2
commands
T1
Inverter stage
switching mode

V2

DC/DC
*
converter Sbp
PWM pulse

V1

V0

V1

V2

V7

V2

Input voltage
Input frequency

200[V]
50[Hz]

Carrier frequency

7.5[kHz]

Output frequency

40[Hz]DC power supply

100[V]

LC filter
Cut-off
frequency
Load
Commutation
time

V1

Zero vector

Figure 3. Relation between the inverter carrier, rectifier
pulse and DC-DC converter pulse.

III.

EXPERIMENTAL RESULTS FOR PROPOSED CIRSUIT

Table 2 presents the experimental parameters andconditions. The operation of the proposed circuit isdemonstrated by the experimental results.

(a) Energy flow section I.

Figure 4 shows the basic operation waveforms of the
proposed converter. In Fig. 4(a), the proposed converter
operates in energy flow section I. In addition, Fig. 4(b)shows the waveforms of the proposed converter for energy
flow section III. The waveforms of the proposed converter in
Fig. 4(b) are only for the boost type mode. The input andoutput currents show low harmonic waveforms for both
energy flows, and the DC current represents the battery
current. From Fig. 4(a), it is confirmed that the total
harmonic distortion (THD) of the input current, output
current and DC output current is 2.4, 1.9 and 1.9%,
respectively. The input power factor is 99% and theefficiency is 95.4%. The DC current THD is defined by (1).

I dc _ THD =(b) Energy flow section III.
Figure 4. Experimental waveforms.

I dc _ H
I dc

(1),

where Idc is the RMS value in the DC current and Idc_H isthe RMS value in the DC current harmonics.
Figure 5 shows the waveform of the proposed control
strategy for energy flow section III. The dashed line in the
middle indicates the change of operation. At first, theproposed converter operates in the boost type mode, after
which, it operates in the buck-boost type mode. Sinusoidal
waveforms without distortion were obtained for the input
current and the output voltage. In Fig. 5, no sag occurs in thevoltage and current when the operation mode is attempting achange. The output voltage for boost operation is 161 V,
while it is 180 V for buck-boost operation. Thus, the output
voltage range has been improved by implementing the
proposed circuit.

Figure 5. Experimental waveform.

Figure 6 shows the THDs of the input current, output
current and DC input current are 1.4%, 1.8% and 2.3%,

232

2 [mH]
6.6 [μF]
1[kHz]
R-L
2.5 [μs]

Input, output and DC current THD [%]respectively. In addition, the dead time error compensation isalready applied for the FPGA control, as reported in ref. [3];therefore, the proposed converter can obtain low THD values
for these currents.
Figure 7 shows the efficiency and input power factor of
the proposed circuit for two situations. In Fig.7 (a), all theswitches in the chopper are turned off, i.e., the converter
consists of only the indirect matrix converter and the active
snubber. The obtained data shows that the input power factor
is 99% and the efficiency is 95.4%. Note that the efficiency
of a conventional multi-power supply interface converterwith a large electrolytic capacitor is approximately 93%.
Therefore, the efficiency is improved by 2 or 3%.

DC current THD( )42
Input current THD( )0

Output current THD(

)
1000

500
Output Power[W]Figure 6. THD of the input, output and DC current.

Figure 7(b) shows the second situation, where theinverter side is removed from the converter by switching off
all the IGBTs in the inverter. The DC-DC converter thenoperates in boost mode. The results show that the input
power factor is over 99% and the maximum efficiency is
93.7%. The efficiency drops due to the increment ofconduction loss in the DC-DC converter. The conduction
loss becomes larger, because the output voltage of the DCDC converter is lower than the inverter output voltage, which
is set to 100 V. For that reason, the current in the DC-DC
converter is forced to increase. In addition, the efficiency of
the indirect matrix converter can be improved by 1-2% whenreverse-blocking IGBTs (RB-IGBT) are applied in therectifier stage.

P.F.

100
98

Efficiency

96
94
92
90

0

500

1000

1500

Output Power[W](a) Efficiency of the AC input to AC output when the DCDC converter leg is stopped.

LOSS CALCULATION BY MATHEMATICAL EXPRESSIONS
Efficiency, Input power factor [%]IV.

6This chapter explains the power loss expression of the
proposed system. The IMC loss is expressed in mathematicalscheme. The proposed system is assumed to operate in an
ideal state. That is, the losses contains of no snubber loss, LC
filter loss and other.

A. Rectifier stage losses
Figure 8 shows the equivalent circuit for the IMC. The
rectifier stage generates conduction loss only, because therectifier is applied with the zero current switching (ZCS). In
addition, the inverter stage conduction loss is same to theconventional inverter. In order to determine the losses for the
proposed circuit, the rectifier stage and the inverter stage
losses are calculated by the following equations.

(b) Efficiency for AC to DC when the inverter legs are
stopped.
Figure 7. Efficiency and input power factor.

The rectifier stage conduction loss pc_rec is expressed by(2) by using the DC link current idc and the correctoremmiter voltage of switching device vce.

pc _ rec = 2idc vce

Srp

Ssp

Stp

Sup

Svp

Swp

(2)
M

The DC link current of the IMC needs to indentify to
calculate the switching harmonics, because the waveform is
a PWM. The DC link current expresses in (3) is used for the
inverter stage switching function and output current.

Srn SsnStn

Sun

Svn Swn

Figure. 8. Indirect matrix converter.

233

idc = sup iu + svp iv + s wp iw
2 ∞ ⎧1⎡3⎫= I o ⎢ λ cos θ 0 + ∑ ⎨ sin nπDu cos nω s t cos(ωo t + θ 0 )⎬π n =1 ⎩ n
⎣4
⎭
∞
2 ⎧1
2
⎫
+ ∑ ⎨ sin nπDv cos nω s t cos(ω o t − π + θ 0 )⎬π n =1 ⎩ n
3⎭+

2 ∞ ⎧14⎫⎤∑ ⎨ sin nπDw cos nω s t cos(ωo t − π + θ 0 )⎬⎥π n =1 ⎩ n
3⎭⎦(a) Rectifier(b) Inverter
Fig.9. Equivalent circuit for the IMC.

(3)
The average conduction loss of the rectifier stage is
obtained by (4) by using corrector-emitter voltage vce, output
current Io and the DC link current coefficient Kidc(λ,θo).
Pc _ rec =

1
0.8

=

0.6

1 To
∫ 2v ce _ rec i dc dt
To 0

(4)

=
=

0.4

=

= 2vce _ rec I o K idc (λ , θ 0 )0.2

where, T0 is one cycle of output current and Io is output
current peak value. The DC link current coefficient Kidc
Kidc(λ,θo) is given from Fig.10.

=0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Output power factor

1

Fig. 10. DC link current coefficient : Kidc(λ,θo).

Figure 10 shows relationship between the DC linkcurrent coefficient Kidc(λ,θo), the moduration index λ and theload power factor θo.
B. Inveter stage losses
The conduction loss of the inverter stage is same to theconventional inverter. For example, the instantaneous
conduction loss of u-phase upper arm IGBT is expressed in(5) by using the output current Io, modulation index λ and theload power factor cosθο.

pc_inv = vce _ inv iu Du= vce _ inv I o sin(ω o t + θ 0 )1/ f sλ sin(ω o t ) + 1
2

Fig.11 DC link voltage for IMC(5)

The average conduction loss is expressed by (6). The
FWD conduction loss is similar to (6). The total conduction
loss of inverter stage is expressed by (7).
Pc _ I =The switching loss psw_inv in the inverter stage isexpressed by (8) by using the DC link voltage Edc, theswitching frequency fs and the output current Io.

λ sin(ω o t ) + 1
1 To
vce _ inv I o sin(ω o t + θ 0 )
dt
∫
0
To
2

⎛1 λ
⎞
⎛ 1 λ
⎞
= I out k i1 ⎜ ++ cos θ 0 ⎟cos θ 0 ⎟ + I out k i 2 ⎜
8
3
π
2
π
8
⎝
⎠
⎝
⎠

where, the device corrector-emmiter voltage vce_inv isapproximated as vce_inv=ki1iu+ki2 using the device datasheet.

Psw _ inv =

2

⎧
⎞
⎛1 λ
Pc _ inv = 6 I o ⎨ I o (k i1 + k f 1 )⎜ +cos θ 0 ⎟
π
8
3
⎠
⎝
⎩
⎞⎫
⎛ 1 λ
+ (k i 2 + k f 2 )⎜+ cos θ 0 ⎟⎬⎠⎭⎝ 2π 812π

f s ( K on I o + K off I o + K r I o ) E dc / K edc

(8)

(6)

The DC link voltage of IMC contains ripple voltage.
There is no energy buffer for the DC link of IMC. Therefore
the average DC link voltage of IMC is expressed by (9).

(7)

Edc =

234

9

π

Vmi

(9)

Table 3 Loss Analysis parameter.

The DC/DC converter losses are same to the inverter
stage losses. This paper does not discuss the loss analysis of
the DC/DC converter.
V.

Input line voltage
200 [V]
Input frequency
50 [Hz]Carrier frequency
10[kHz]Output current Io
4.72[A]
Rectifier device[20]Inverter device[21]VERIFICATION HIGH EFFICIENCY OPERATIONCONDITIONS

Rectifier Loss [W]

A. Experimental results for proposed loss analysis method
Figure 12 shows the loss analysis results for the proposed
method and conventional method. The proposed loss
analysis results are well agreed with the conventional results.
Figure 13 shows the loss analysis and experimental
results. The loss analysis results are well agreed with theexperimental results with a 6 % error ratio. The proposed
loss analysis method is suitable to determine the highefficiency operation conditions. In addition the DC/DC
converter losses can be analyzed similarly to the inverter
stage losses.

(a) Rectifier stage loss

B. High efficiency operation conditions
Figure 14 shows the high efficiency operation area forthe proposed system. The efficiency of the proposed systemefficiency is higher than the BTB system in the entire power
sharing ratio. In the energy flow section III as shown in Fig.
14(b), the efficiencies for the IMC system efficiency and the
BTB system are almost the same when the power sharing
ratio is ‘0’. All the power is provided between the DC-DC
converter and the inverter. In this case, the circuit topologyof the proposed system is same to the BTB system. The
proposed converter achieves the lowest losses while all thepower is merely provided from the rectifier side to the load,
as shown in Fig. 14(a). This is because the rectifier stage isapplied with the ZCS. For example in the HEV application,
the proposed system is suitable for the series hybrid
connection where almost all the power is coming from thegenerator to the motor.

(b) Inverter stage loss
Fig.12. IMC loss analysis results.

Total loss[W]VI.

2 [mH]
6.6 [μF]
Cut-off frequency
1 [kHz]Modulation index
1.0
SK80GM063 (Semikron)
2MBI150U2A-060 (Fuji electric)
LC filter

OPTIMAIZATION METHOD FOR THE PROPOSEDCONVERTER

A. Optimization method by pareto-front
Figure 15 shows the four requirements needed to beconsidered for the performance design of a power converter,
which are the efficiency, size, lifetime and cost. The cost of apower converter is an important topic, because there is tradeoff relationship between the cost and other topics as shown

Fig.13. Experimental result.

98
IMC system

96
High efficiency
operation area

94
BTB system

92

0

0.2

0.4

0.6

0.8
Pac
Power sharing ratio
Pdc + Pac

1(a) Energy flow section I.
(b) Energy flow section III.
Fig.14. High efficiency operation conditions for proposed system.

235

in Fig.15 (b).

Specifications- Rating power - Rating current- Switching frequency- Modulation index, etc...

The optimization method for power converter is widely
discussed. The pareto-front method considers multipleobjectives to achieve an optimize design. This paper
discusses the cost-efficiency design for the IMC by using thepareto-front of IMC.

Device parameter

Initial value of device
parameter- Collector – emittersaturation voltage- Diode forward voltage- Tern-on time, etc...

B. Cost-efficiency design for IMC
Figure 16 shows the cost-efficiency optimization design
flowchart. At first, the loss of IMC is calculated bymathematical scheme and circuit specifications as shown in
Table 4. The IMC is assumed to operate in an ideal state.
That is, the losses contains of only the semiconductor
switches loss without the snubber loss, LC filter loss andother.

Loss calculation

Loss calculation- Equation (1)-(11)Cost calculation

Cost calculation- Equation (12)Costrequirement ?

No

Yes

Then, the cost of IMC is calculated by Eq. (10).
Cost=A×chip area(Current rating) + B

Circuit specifications(10),

Efficiency – cost
optimization

Fig. 16 Cost-efficiency optimization design flowchart

where the cost is assumed to be proportional to the chiparea of semiconductor device. The cost coefficient A is
proportional to the chip area, which is defined as a 1 p.u. at
rated 80 A. In addition, the second term of Eq.12 is definedas the initial cost, which is 10% of the device cost. The lossof IMC is calculated by a IGBT with rated voltage 600V
and rated current 5A to 600A [20-24].

Rating power
Input voltage
Output voltage
Output current
Switching frequency

Finally, the maximum efficiency is estimated by referringto the cost. The proposed method can determine the optimal
point of the cost-efficiency from the trade-off curve.

1000

Table 4 Circuit specifications.

Figure 17 shows the loss calculation results of IMC basedon each rated current of IGBT. For example, the IGBT in thepossible area as shown in Fig.18 can be used to design a 10kW IMC. The conduction loss of an IMC is possible to be
reduced with the use of big rated current IGBT. However,the conduction loss can not improve drastically using over
200A IGBT. That is, there is a trade-off for the cost andefficiency.

10 kW
200 V
173V
33A
10 kHzSwitchingdevice[20-24]

Enable area

800
Loss [W]

Mitsubishi electricFuji electric
ToshibaInfineon
Semikron

600
400

97% efficiency

2000Fgure 18 shows the pareto optimal solution and paretofront for the cost and efficiency. When the cost is more than
2 p.u., the efficiency can not be improved drastically. On the

100

200
300
400
Current rating [A]500

Efficiency [%]Efficiency. Volume, Lifetime

Fig.17 Loss calculation(a) Radar chart(b) Trade-off carve
Fig.15 Requirement of power converter
Fig.18 Pareto-front of efficiency-cost curve

236

600

other hand, the efficiency decreased for under the 1 p.u. cost.
There is an optimal point of the cost-efficiency between 1
p.u. and 2.p.u. cost. The optimal point of the cost-efficiency
can be achieved based on the design concept and theapplications.

[8]

Kolar, J.W.; Baumann, M.; Schafmeister, F.; and Ertl, H. "Novel
Three Phase AC-DC-AC Sparse Matrix Converter", IEEE APEC
2002.
[9] Minari, Y.; Shinohara, K.; and Ueda, R. "PWM-rectifier/voltagesource inverter without DC link components for induction motor
drive", IEE Proc. on Electric Power Applications, Vol. 140, No. 6, pp.
363 .368, Nov. 1993[10] Klumpner, C.; Wijekoon, T.; and Wheeler, P. "Active Compensationof Unbalanced Supply Voltage for Two-Stage Direct Power
Converters Using the Clamp Capacitor" PESC'05, pp.2376 - 2382,
2005[11] Pena, R.; Cardenas, R.; Reyes, E.; Clare, J.; and Wheeler, P. “A
Topology for Multiple Generation System with Doubly Fed Induction
Machines and Indirect Matrix Converter”, IEEE Trans. on Industrial
Electronics, Vol. 56, pp.4181-4193, Oct. 2009.
[12] Correa, P.; Rodriguez, J.; Rivera, M.; Espinoza, J.R.; and Kolar, J.W“Predictive Control of an Indirect Matrix Converter”, IEEE Trans. on
Industrial Electronics, Vol. 56, Issue. 6, pp. 1847-1853, June 2009.
[13] Goto, S.; Ogasawara, S.; and Funato, H. "A New Power Converter
Circuit Combining an Inverter with a Matrix Converter," IEEJ SPC06-101, 2006(in japanese)[14] Itoh, J.; and Tamura, H. "A Novel Control Strategy for a Combined
System Using Both Matrix Converter and Inverter without
Interconnection Reactors", IEEE PESC2008, pp.1741-1747, 2008[15] Kato, K.; and Itoh, J. "A Novel Control Method of Direct Interface
Converters for Several Power Supplies" 12th European Conference
on Power Electronics and Applications 2007[16] Kato, K.; and Itoh, J. " Control Method for a Three-Port Interface
Converter Using an Indirect Matrix Converter with an Active
Snubber Circuit", THE 13th IEEE Power Electronics and Motion
Control Conference,448, 2008.
[17] Koji Kato, Jun-ichi Itoh: “Control Strategy for a Buck-boost Type
Direct Interface Converter Using an Indirect Matrix Converter withan Active Snubber” The Applied Power Electronics Conference andExposition, p.p. 1684 - 1691 (2010)[18] Itoh, J.; Iida, T.; and Odaka, A. " Realization of High Efficiency AC
link Converter System based on AC-AC Direct Conversion
Techniques with RB-IGBT" Industrial Electronics Conference, Paris,,PF-012149,2006[19] Katsis, D.; Wheeler, P.W.; Clare, J.C.; and Emprongham, L. "A
Utility Power Supply Based on a Four-Output Leg Matrix Converter"
IEEE IAS 2005, pp.2355-2359[20] Fuji Electric: Datasheet of IGBT module published at
http://www.fujielectric.co.jp[21] SEMIKRON: Datasheet of IGBT module published at
http://www.semikron.com[22] Infineon:
Datasheetof
IGBT
modulepublishedat
http://www.infineon.com[23] Mitsubishi Electric: Datasheet of IGBT module published at
http://www.mitsubishielectric.co.jp/business/device/[24] TOSHIBA: Datasheet of IGBT module published at
http://www.semicon.toshiba.co.jp/

VII. CONCLUSION
This paper investigates the highest efficiency area could
be achieved based on the operation sections of the proposedsystem. In order to determine the losses of the proposed
circuit, the IMC loss analysis method is proposed. The
highest efficiency operation conditions and the validity of
proposed circuit are confirmed by the loss analysis. In
addition, the fundamental operation of the proposed method
has been confirmed with the experimental results. Finally,
the switching device optimization method is proposed by thepareto-front which is referring to the cost and efficiency ofan IMC.
This study was supported by Industrial Technology Grant
Program in 2009 from New Energy and Industrial
Technology Development Organization (NEDO) of Japan.
REFERENCES
[1]

[2]

[3]

[4]

[5]

[6]

[7]

Archarya, K.; Mazumder, S.K.; and Basu, I. “Reaching Criterion of aThree-Phase Voltage-Source Inverter Operating with Passive andNonlinear Loads and Its Impact on Global Stability”, IEEE Trans. on
Industrial Electronics, Vol. 55, Issue.4, pp. 1795-1812, April 2008.
Cruz, S.M.A.; and Ferreira, M. “Comparison between back-to-backand matrix converter drives under faulty conditions”, in 13h European
Conference on Power Electronics and Applications, Barcelona, pp. 110, Sept. 2009.
Wheeler, P. W.; Rodriguez, J.; Clare, J. C.; and Empringham, L.
“Matrix Converters: A Technology Review” IEEE Transactions on
Industry Electronics Vol. 49, No. 2, pp274-288, 2002
Itoh, J.; Sato, I.; Ohguchi, H.; Sato, K.; Odaka, A.; and Eguchi, N. "A
Control Method for the Matrix Converter Based on Virtual AC-DCAC Conversion Using Carrier Comparison Method"IEEJ Vol.124-D
No.5,2004(in Japanese)
Itoh, J.; Sato, I.; Odaka, A.; Ohguchi, H.; and Kodachi, K. "A Novel
Approach to Practical Matrix Converter Motor drive System with
RB-IGBT" Power Electronics Specialists Conference 2004
Kolar, J. W.; Friedli, T.; Krismer, F.; and Round, S. D. "The Essenceof Three-Phase AC-AC Converter Systems" Power Electronics
Motion Control Conference 2008 pp.27-42
Wei, L.; Matsusita, Y.; and Lipo, T.A. "Investigation of Dual-bridge
Matrix Converter Operating under Unbalanced Source Voltage" IEEE
Power Electronics Specialist Conference 2003, 1293(2003)

237