Improvement in Input current waveform ofHigh Efficiency AC-AC Converter for Online UPS
Jun-ichi Itoh

Kazuki Yoneda, Hiroki Takahashi

Dept. of Science Technology Innovation
Nagaoka University of Technology
Nagaoka, Niigata, Japan
itoh@vos.nagaokaut.ac.jp

Dept. of Electrical, Electronics and Information Engineering
Nagaoka University of Technology
Nagaoka, Niigata, Japan
yoneda@stn.nagaokaut.ac.jp, thiroki@stn.nagaokaut.ac.jp

Abstract— This paper proposes a switching method and a LC
design method in order to suppress the distortion of the input
current which occurs in a high efficiency AC-AC converter. The
proposed AC-AC converter which is used in online-type
Uninterruptible Power Supplies (UPS) is constructed by a T-type
three-level rectifier and a T-type three-level inverter. The
switching loss of the proposed AC-AC converter is drasticallyreduced because the switching frequency is reduced to six timesof grid frequency. In order to suppress the distortion of the input
current, elimination methods of the output surge voltage and thediscontinuity of the input current are proposed. For decreasing
the surge voltage, a current commutation strategy which uses anoverlapped switching in order to maintain the current path isapplied. Besides, in order to eliminate the discontinuous current
on the input side, LC components in the circuit are designed in
the condition that the input phase angle is maintained above 30
deg. As a result, the output surge voltage is suppressed to almost
zero and the total harmonic distortion (under 40th harmonics ofthe fundamental frequency) of input current is reduced by 51%.

the high switching frequency. On the other hand, the converter
witch the switching frequency of the rectifier part is only six
times of the grid frequency has been proposed in [7]. However,
the inverter part is still operated with PWM method, which
results in high switching loss.

Keywords—UPS; AC-AC converter

I. INTRODUCTION
Recently, UPSs for server rooms or line factories have been
actively researched [1]. Generally, configurations of the UPSs
are divided into a standby-type and an online-type. The
standby-type UPS has an advantage that when the grid is innormal state, load current flows only through AC switches.
Therefore, power loss in the normal state is very small.
However, when the grid failure occurs, the detection of thevoltage drop takes several milliseconds and the load voltage isinterrupted during the detection period [2]. On the other hand,the online-type provides non interrupted power even when thegrid suddenly fails because the online-type UPS provides
power by batteries continuously. However, this operation
requires PWM control which generates switching loss evenwhen the grid is in the normal state.
In order to reduce this switching loss, multilevel converters
have been proposed for UPS applications [3-6]. In multilevel
converters, by applying devices with low voltage rating, theswitching loss can be reduced. However, the PWM method isstill necessary to control the input current and the output
voltage into the sinusoidal waveform. Therefore, the reductionof the switching loss at stable grid condition is limited due toIn this paper, the converter which is constructed by a Ttype three-level rectifier and a T-type three-level inverter is
proposed. The proposed converter significantly reduces theswitching loss because the switching frequencies in both therectifier and the inverter are reduced to six times of the gridfrequency. The characteristics of the proposed converter are as
follows: 1) when the grid voltage fluctuates, the rectifier in the
proposed converter operates in boost mode with PWM method
in order to maintain the constant output voltage; 2) when the
failures of the power grid occur, the load power can besupplied from batteries. Furthermore, the voltage interruption iscompletely avoided because the DC-link capacitor energy
maintains constant output voltage. In other words, this
proposed converter not only reduces the switching loss in thestable operation of the grid but also compensates for the grid
failures. Therefore, the proposed converter is suitable for the
online-type UPS applications. Furthermore, the proposed
converter is expected to have high reliability and long lifetime,
because instead of electrolytic capacitors, the film capacitors
can be applied at DC link. However, there is a problem in the
proposed method, which is distortion of the input current. The
distortion of the input current has two causes; surge voltage ofthe output voltages by the inappropriate commutation of theinverter and discontinuity of the input currents by the improper
design of the input LC filter. Therefore, in this paper, in orderto suppress the surge voltage and eliminate the discontinuity of
the input current, an improved switching method and a LC
filter design method are proposed. In order to eliminate thesurge voltage and the distortion of the input current, a current
commutation strategy which uses an overlapped switching inorder to ensure the current path is applied. Besides, in order toeliminate the discontinuous current, the LC filter is designed in
the condition that the input phase angle is maintained above 30
deg.
This paper is organized as follows: first the control methodof the proposed converter is explained and the basic operationis confirmed; second, the problems are described and analyzed.
Third, the improved switching method and the LC filter designmethod of the proposed circuit are explained. Finally, thevalidity of the proposed methods is confirmed by experiment.
II. SYSTEM CONFIGURATION
A. Conventional UPS circuits
Fig. 1 shows the conventional circuit configurations for
UPS. Fig. 1(a) shows a standby-type UPS whereas Fig. 1(b)shows an online-type UPS. In the standby-type UPS, when thegrid is in normal state, the power is supplied to the load fromthe grid through AC switches. Therefore, the power loss is verysmall. In contrast, when the grid failure occurs, the AC
switches are opened and an inverter in the UPS starts tooperate. Then, the load power is supplied from the batteries by
the inverter. However, there is an interruption time of several
milliseconds during the operation mode is changing, which isundesirable in many applications.
On the other hand, with the online-type UPS, CVCF
(Constant Voltage Constant Frequency) power is supplied to
the load by using PWM method on both the rectifier and theinverter. The power from the grid is stored temporarily in thebatteries by the rectifier and then is output to the load by the
inverter. Therefore, the interruption time of this method is
considered to be zero. This enables the online-type UPS to be
applied in applications that require high reliability. However,there is the problem in this method, which the PWM control of
the rectifier and the inverter are used regardless of the gridcondition. As the result, the switching loss generates all thetime.
B. Proposed UPS circuit
Fig. 2 shows the proposed circuit diagram. The proposed
circuit consists of a 3-phase 3-level T-type AC-DC-AC
converter [8], batteries and a buck chopper. In the proposed
circuit, a voltage ripple in DC-link voltage whose frequency is
six times of the grid frequency (300 Hz) is utilized. As a result,large electrolytic capacitors for smoothing the DC link voltage
are unnecessary, and the switching frequency is also reduced
significantly. Specifically, the maximum voltage vmax, themedium voltage vmid and the minimum voltage vmin of the input
three-phase voltage are connected to p, o and n points in DClink without smoothing by large electrolytic capacitors. It
should be noted that the bidirectional switch of the rectifier
turns on to conduct vmid whereas the diode bridge selects vmax
and vmin automatically. After that, the three-phase voltage isprovided to the load by the inverter whose switches turn each
60 degrees of an output voltage vector phase in the samemanner as the rectifier. Therefore, the proposed converter
reduces the switching loss drastically when the grid condition
is stable. Besides, when the grid voltage decreases, the rectifieris operated in boost mode by PWM control. This boost mode
maintains that the DC-link voltage and the output voltage areconstant. Moreover, when the interruption of the grid occurs,
the load power is supplied from the battery through the buckchopper and the inverter without interruption because small theDC-link capacitors maintain DC-link line voltage whenchanging operation mode.

(a) Standby-type.

(b) Online-type.
Fig. 1. Conventional circuits for UPS. Topology (a) has very low loss.
However, there is interruption time when the grid fails. Topology (b)has no interruption time. However losses are increases due to highswitching frequency.

Fig. 2. AC-AC converter for UPS which was proposed in [9]. This circuit
is considered as conventional circuit in this paper.

Fig. 3. Control block diagram of CVCF. This control is operated byreferring control area (state number).

III. CONTROL METHOD AND PROBLEMSOF PROPOSED CIRCUIT
A. CVCF Control by switching each 60 degrees in stable gridcondition
Fig. 3 shows the control block diagram when the grid is innormal state. Fig. 4 shows the relationship between the input
voltages and the variable that is used for the selection of thecontrol area (state number). Table 1 shows the switching tableof the rectifier and the inverter. In Fig. 3, the state number isdetermined based on the magnitude relationship of the input
phase voltages vr, vs and vt as shown in Fig. 4. As the result, thestate number changes each 60 degree of the input voltage phaseand the switching patterns of the rectifier and the inverter are
decided by referring state number as shown in Table 1.
B. Problems of switching each 60 degrees
Fig. 5 shows the waveforms of the proposed circuit when
the grid is stable [9]. From the experimental results, due to theswitching operation of the inverter at 300 Hz, the proposed
converter achieves the sinusoidal load voltage without using
PWM control. From Fig. 5, the discontinuity of the input
current waveform that worsens input current THD isconfirmed. In addition, the surge voltages occur in the output
voltage waveform. The surge voltages worsen THD of the
input current because the proposed circuit has only small DClink capacitor. These causes of the distortion of the input
current have not yet been explained.

Fig. 4. Relationship between input voltage and state number. The control
area is decided by state number.
Table 1 Switching table of AC-AC converter control which was proposedin [9].

IV. IMPROVEMENT OF SWITCHING METHODTHAT SUPPRESSES SURGE VOLTAGESIn this chapter, the switching method for elimination of thesurge voltage is proposed. If the surge voltage is eliminated,
the waveform of the output voltage in the proposed circuit
becomes sinusoidal waveform without any high frequency
harmonics. Therefore, the downsizing of output filter isachieved by the elimination of the surge voltage. At first, themechanism why the surge voltage occurs is explained.
Table 2 shows specification of the prototype circuit. Fig. 6
shows the proposed circuit where the bidirectional switch isconstructed from two MOSFETS connected anti-series. In [9],two MOSFETs of the bidirectional switch in the inverter partare driven as only one unit, which means they are turned off orturned on at same moment. However, unlike the simulation, an
experimental prototype requires dead time. For this reason, all
the switches in one leg are turned off in dead times. With an
inductive load, the output current path is required at all time.
As the result, when the output current path is suspended indead time, the energy of load side stored in inductors causes
the surge voltage in the inverter output voltage. In order toovercome this problem, the overlap period is added into thedriving signal of two MOSFETs in the bidirectional switch.
This avoids the suspension of the output current path.
Fig. 7 shows the operation waveform of the input phasevoltage, the output phase voltage and switching patterns (only r
leg and u leg are shown) that are able to eliminate the surge
voltage. Table 3 shows all of the switching patterns with added
overlap periods. From Fig. 7 and table 3, it is understood that
two MOSFETs of a bidirectional switch are driven separately.

Fig. 5. Operation waveforms of prototype circuit with conventional
control method. There are problems of surge voltage and current ringing.

In Fig. 7, the switches Sum1 and Sum2 are driven complementary
concerning Sup and Sun. Thus, on-state periods of bidirectionalswitches are given overlap time to get current path in the deadtime.

Fig. 8 shows the current paths in STATE I, in the dead time
between STATE I and STATE II, and in STATE II. For
simplification, input power factor is set as unity. In the methodof Fig. 7, Sum2 is turned on before Sum1 and Sum2 get off-state as
shown in Fig. 8(a). Sum1 and Sup are given dead times to preventthe short mode between point p and point o. Then, the on-stateof Sum1 is retained because Sum2 has no relation with short mode
between point p and point o. In this manner, a current path ofu-phase is kept, the current flows from point o through Sum2
and Sum1 (diode). As a result, the load current is kept flowing
continuously. Therefore, the suspension of the load current
path in [9] is avoided by those switching patterns.

Table 2 Specifications of prototype circuit.

V. DESIGN METHOD THAT ELIMINATES THE DISCONTINITY OF
THE INPUT CURRENT
A. Causes of ringing in input current
Fig. 9 shows the relationship between the input voltage andthe phase of the input current. In the proposed circuit, themaximum phase voltage and the minimum phase voltage are
selected by diodes. When the maximum phase is r phase, theupside diode of r phase must be on state. Otherwise, themaximum phase voltage is not conducted correctly. The diodeis able to become on state by setting the limit of the phaseangle θ within ±30 deg. in case that the input current
waveforms is sinusoidal. In contrast, when θ is outside therange of ±30 deg., the input current becomes discontinuous
because the current direction is switched abruptly. Hence, thecontinuity of the input current is decided by following equation.

θ < 30 deg .

Fig. 6. Proposed circuit diagram with bidirectional switches that are
constructed from two MOSFETs connected anti-series. If two
MOSFETs are turned off at the same time, the current path isblocked. This results in the surge voltage.

(1)

Where θ is decided by the input inductors LIN, the DC-link
capacitors CDC, and the load condition. Therefore, thesuppression of the discontinuous mode is achieved by setting
circuit parameters and load conditions to satisfy the equation(1). In this paper, the design principle to satisfy the equation (1)is proposed.
B. Analysis by using single-phase equivalent circuit
Fig. 10 (a) shows the single-phase equivalent circuit of the
proposed circuit. In any switching state, the proposed circuit
can be considered as this equivalent circuit, where thecapacitance C’ is derived by delta-star transformation of DClink capacitors CDC. Thus, the value of C’ is three times of the
CDC. The impedance of the equivalent circuit is derived asfollowing equation.
Z = jωLIN +jωLOUT + ROUT
− ω 2 C ' LOUT + jωC ' ROUT + 1(2)

Following equation are derived by dividing real part andimaginary part from the equation (2).

Z ＝Z RE + Z IM

(3)

Fig. 7. Operation waveforms of prototype circuit. The switching patterns
are include overlaps.
Table 3. Switching tables with overlaps.It suppresses the surge voltage.

Z RE＝

ROUT(1 − ω C ' LOUT ) 2 + (ωC ' ROUT ) 2
2

Z IM ＝(4)22(ωLIN + ωLOUT − ω 3C ' LOUT − ωC ' ROUT )(1 − ω 2 C ' LOUT ) 2 + (ωC ' ROUT ) 2(5)

In addition, the single-phase equivalent circuit is consideredas RL equivalent circuit that is shown in Fig. 10 (b).
Furthermore, the phase angle θ is calculated by assigning ZRE
and ZIM to following equation.

θ = cos −1

Z RE
2

Z RE + Z IM

2

(6)

C. Nondimensional design equations
Previous sections confirmed that the feasibility of 60 degreeswitching with continuous current waveforms is decided by
calculation of phase angle θ. Next, in order to design the DC
link capacitor and the input inductor, first let the ratio between
ZRE and ZIM be r, which can be expressed as (7).
2

r=

2

Z L + Z LOUT ( Z LOUT + Z ROUT )
Z IM
＝ IN
−
Z RE
Z ROUTZ ROUT Z C '(7)Then, the right part of the above equation is normalized asfollows,r=% X L IN + % X LOUT
% X ROUT

2−% X LOUT + % X ROUT

2

% X C ' % X ROUT

(8)

After that, (6) can be written as in (9).

θ = cos −1

Z RE
2

Z RE + r 2 Z RE

(9)2

Next, the ratio r can be expressed as a function of the input
phase angle θ.

r = tan θ(10)

It can be understood that, in order to satisfy (1), the ratio r
is necessary to be designed in a specific limitation. In order tocalculate this limitation, first the admittance of the DC link
capacitor %YC’ is derived from (8) and (10),%YC ' =

% X LIN + % X LOUT − tan θ % X ROUT
2

% X LOUT + % X ROUT

2

Fig. 8. Current paths in the inverter from STATE I to STATE II. In deadtime (b), surge voltage is prevented by Sum1 which is added overlap time.

Fig. 9. A conduction condition for a rectifier diode.

Fig. 10. Equivalent circuits of the proposed circuit.

Fig. 11. The design map for input inductors and DC capacitors.

(11)

Because (11) cannot be solved simply, it will be drawn intoa map as follows.
D. Design of input inductor and DC link capacitor by using
LC mapFig. 11 shows the LC map which is used to design
LIN,C’(CDC). Because (11) is also dependent on the conditionof load, the load range where the input current flows
continuously is necessary to be limited. Note that by changing%XRout, the load power is changed. In this paper, the heaviest
load of %XRout is set as 100%, whereas the lightest load of%XRout is set as 1000% (%XLout=6.8% const.). Fig. 11(a),(b)shows the region of (11) in the conditions of the heaviest load
and the lightest load, respectively. The painted part is drawn by
varying both the input phase angle θ from -30 deg. to 30 deg.
and the normalized impedance of input inductor %XLin. By
overlapping the painted region in both Fig. 11(a) and (b), theregion where input current flows continuously in all load range
is obtained and shown in Fig.11(c). The region in Fig.11(c) isformed by the line in Fig.11(a) where θ = 30 deg. and the line
in Fig.11(b) where θ = -30 deg.. In the experimental conditionof this paper, the value of %XLin on the x-axis and the value of%YC’ are as follows,% X LIN = tan θ % X ROUT − % X LOUT = 50.9%%YC ' =

% X LOUT − tan θ % X ROUT
2

% X LOUT + % X ROUT

2

= 5.8%

Fig. 12. Operation waveforms and switching pattern of T-type three levels
rectifier with the proposed method.

(12)
 

In this paper, the point (5.7%, 4.6%) is selected as shown in
Fig.11(c). It should be noted that; if %YC’ is designed as highvalues, the transition time for the battery operation in case ofgrid fail also becomes long. Therefore, the high values of %YC’
is preferred. In the viewpoint of cost and efficiency, the low
values of %XLin is preferred. However, in case of voltage dip,
the input inductor is used to boost up the voltage [7].
Therefore, if %XLin is designed as too low values, the highcurrent ripple in boost mode becomes a problem.

Fig. 13. Operation waveforms and switching pattern of T-type three levels
inverter. The surge voltage has suppressed by proposed switching pattern.

VI. EXPERIMENTAL VERIFICATIONS
A. Operation waveforms of stable grid condition
In order to confirm the fundamental operation of the
proposed circuit, this chapter shows experimental results by a 3
kW prototype. The input voltage and the input frequency are
set to 200 V, 50 Hz, sinusoidal waveform. The load is a RLload whose parameters are set to obtain a rated power of 3 kW.
Fig. 12 shows the operation waveforms and switchingpatterns of T-type three levels rectifier when the grid is stable
at rated load. In the proposed circuit, the maximum phase andthe minimum phase of the input voltage are rectified by thediode bridge rectifier. On the other hand, the medium phasevoltage is rectified by using the medium phase switches Srm,
Ssm, Stm. As a result, the DC-link voltage vmax - vmid oscillates at
300Hz as six times of the grid frequency. It should be not thatdead time is not required for the medium phase switches
because the diode rectifier prevents short circuit. Those results
confirmed the basic operation of the rectifier part.

Fig. 14. Efficiency characteristic with respect to power. The proposed
circuit has high efficiency. The efficiency becomes even higher atlight-load condition due to the reduced conduction loss.

Fig. 13 the shows operation waveforms and switchingpatterns of Sup, Sum1, Sum2 and Sun of the T-type three-level
inverter when the grid is stable. From the experimental results,
it is conclude that, thanks to the switching operation of theinverter at 300Hz, the output voltage becomes a sinusoidal
voltage. Furthermore, the surges of the output voltage aresuppressed to almost zero by adding the overlap period into thedriving signal of the bidirectional switches in the inverter.
Therefore, downsizing and loss reduction of the EMI filter are
expected with the proposed circuit.
B. Efficiency evaluation
In order to confirm the validity of the proposed converter
from the viewpoint of high efficiency, in this section, theefficiency of the prototype circuit is evaluated.

Fig. 14 shows the efficiency characteristic with respect to
output power. The load power is changed by adjusting load
resistance. The switching frequency of the simulated
conventional online-type converter in Fig. 1 (b) is set to 20
kHz. Because the switching frequency of the proposed circuit
is only 300 Hz, the switching loss of the proposed converter isreduced by 99% compared to the conventional circuit at thestable grid condition [9]. As a result, the proposed circuitachieves high efficiency of 97.2% at rated load of 3 kW.
C. Confirmation of the proposed LC design method
In this section, THD of the input current in the prototype
which is designed by the proposed LC design method ismeasured.
Fig. 15 shows the calculated values by (7), (9) and theexperimental values of the input phase angle θ when the load
power is varied. In order to confirm the validity of the
proposed LC design method, the point (%YC=9.2%) outside thepainted part shown in Fig. 11(c) is also selected. From Fig. 15,
it is understood that, the experimental values of the input phaseangle θ agree to the calculated values. Moreover, in case that
the LC is designed based on Fig. 11(c), the lowest limit where(1) is still satisfied is 280W, whereas the lowest limit is just
560W in case that the LC is designed outside of the painted
part in Fig.11 (c). The input current at the power lower than thelowest limit becomes discontinuous and decreases THD.
Fig. 16-17 shows the input current waveform at 500W
(point a in Fig. 15) and 200W (point b in Fig. 15), respectively.
It is concluded that, at point a when the input phase angle θ ishigher than 30 deg., the current becomes discontinuous,
whereas at point b when the input phase angle θ is smaller than
30 deg., the current flows continuously.
Fig. 18 shows THD of the input current ( less than 40th )when the load is varied. From Fig. 18, it is understood that atlight load THD worsens. At 500W, THD at point a where %YC’
is designed based on the proposed LC design method isimproved by 51% compared to THD of the point which isintentionally chosen outside the painted part in Fig. 11(c).
Moreover, when the power at 200W which is lower than thelowest limit, because (1) is not satisfied, THD of the input
current worsens to 22%.
VII. CONCLUTION
This paper proposes novel methods for improvement of
input current waveform of high efficiency AC-AC converter
for online-type UPS [9].The proposed converter achieves
CVCF operation with the switching frequency of 300 Hz forthe grid of 50 Hz. By designing parameter of LC and theoverlap periods of the inverter switching patterns, theelimination of the surge of the output voltage and the ringing of
the input current which are the unsolved problems in [9], areachieved. Specifically, the surge voltage of the output voltage
is suppressed to almost zero, whereas THD of the input current
is reduced by 51%. Moreover, the efficiency of 97.2% at rated
load of 3 kW is confirmed.

80%YC = 9.2%(Calc.) (CDC = 8.8 μF)

70%YC = 9.2%(Exp.)

60
50
40

%YC = 4.6%(Calc.)(CDC = 4.4 μF)a%YC = 4.6%(Exp.)

30
20
10
0

Applicability range ofthe 60deg. Switching

b
0

1

2
Load power [kW]3

4

Fig. 15. Phase angle characteristics with respect to load power. The
applicability range of the 60deg. switching has confirmed by referringa border value of 30 deg..

Fig. 16. Operation waveforms of the prototype circuit (point a). In thisresult, the discontinuous input current is confirmed.

Fig. 17. Operation waveforms of the prototype circuit (point b). In thisresult, the continuous input current is confirmed.

Fig. 18. THD characteristics of the prototype circuit. Because, the red dots(%YC’=4.6%) is designed based on the proposed LC design method,
THD is obtained as low values even at light load.

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