Study on ﬁrst-level trigger of the Belle II experiment using upgradedsilicon strip detector(新型シリコンストリップ検出器を用いた Belle II 実験初段トリガーの研究)

By
Tomoyuki Shimasaki
島崎 奉文

A Master Thesis
修士論文

Submitted to
The University of Tokyo
Department of Physics, Graduate School of Science
On January 27th, 2023
Thesis Supervisor: Takeo Higuchi 樋口 岳雄

ABSTRACTIn order to explore new physics beyond the Standard Model, the Belle II experiment plans toaccumulate the integrated luminosity of 50 ab−1 . The SuperKEKB collider, an accelerator used in the
Belle II experiment, is designed to achieve the world’s highest luminosity of 6.0 × 1035 cm−2 s−1 so that
we can accumulate the target data volume in reasonable time scale of about 15 years. However, the data
generated by SuperKEKB with such high luminosity is so large that the data acquisition (DAQ) systemcannot store all of it due to the limited bandwidth of the sampling rate and data transfer of each Belle II
sub-detector. For this reason, the ﬁrst-level trigger system is employed, which determines if each event
is of interest and selects the data to be stored. For stable operation of the DAQ system, the maximum
average Level-1 trigger rate is set to be 30 kHz. However, the trigger rate is expected to exceed thelimit at the target luminosity in the future due to harsh beam backgrounds. The major contributor to
the background trigger rate is considered to be particles produced outside of the interaction point (IP),which are called Oﬀ-IP particles. They cannot be suﬃciently rejected by the current Level-1 trigger
system due to its low capability to identify particle production positions. Therefore, a new Level-1
trigger system with higher position resolution is desired.
The Silicon Vertex Detector (SVD), which is a type of silicon strip detector and responsible forparticle decay vertex reconstruction in cooperation with the Pixel Detector (PXD). It has high position
resolution for charged particles, however, has no function for the Level-1 trigger. The Thin Fine-Pitch
SVD (TFP-SVD) is being developed as the next generation vertex detector. It will have higher position
resolution than the current SVD and have function for the Level-1 trigger. Therefore, we developed new
trigger algorithm using the TFP-SVD in simulation to eﬃciently reject Oﬀ-IP particles and suppress
the background trigger rate. As a result, we conﬁrmed that the TFP-SVD trigger has suﬃcient trigger
eﬃciency and Oﬀ-IP particle rejection power. Furthermore, fake triggers, which are derived from faketracks reconstructed by harsh background sensor hits, can be suppressed by the TFP-SVD trigger by
combining with the current trigger system. By introducing the TFP-SVD trigger, it is expected thatthe upper limits of the trigger rate, 30 kHz, can be observed even at the target luminosity. After thesimulation study, we implemented the TFP-SVD trigger as ﬁrmware and conﬁrmed its feasibility.

Contents

1 Introduction
1.1 CKM matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Motivation of a new Level-1 trigger . . . . . . . . . . . . . . . . . . . . . . . . .

1
1
4

2 The Belle II experiment
2.1 SuperKEKB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Belle II detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Silicon Vertex Detector (SVD) . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.1 Double-sided Silicon Strip Detector (DSSD) . . . . . . . . . . . . . . . .
2.3.2 Front-end readout electronics: APV25 . . . . . . . . . . . . . . . . . . .
2.3.3 Readout chain of the SVD data . . . . . . . . . . . . . . . . . . . . . . .
2.4 Beam background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.1 Beam background sources . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.2 Geometrical distribution of beam background . . . . . . . . . . . . . . .
2.4.3 Injection beam background . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 Data-Acquisition (DAQ) system . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6 Level-1 trigger system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6.1 Structure of the Level-1 trigger system . . . . . . . . . . . . . . . . . . .
2.6.2 Universal Trigger board . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6.3 CDC sub-trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7 Thin Fine-Pitch SVD (TFP-SVD) . . . . . . . . . . . . . . . . . . . . . . . . .
2.7.1 Speciﬁcation of the TFP-DSSD sensor . . . . . . . . . . . . . . . . . . .
2.7.2 Front-end readout electronics: SNAP128 . . . . . . . . . . . . . . . . . .
2.7.3 Self trigger signal output of SNAP128 . . . . . . . . . . . . . . . . . . .

6
6
9
12
14
15
16
17
17
19
19
20
21
22
23
23
27
29
30
32

3 TFP-SVD sub-trigger
34
3.1 Projection of the Level-1 trigger rate at the target luminosity . . . . . . . . . . 34
3.2 Basic strategy of the TFP-SVD trigger . . . . . . . . . . . . . . . . . . . . . . . 37
3.2.1 Assumptions on the TFP-SVD detector design for the studies in this thesis 37
3.2.2 Matching with the CDC sub-trigger . . . . . . . . . . . . . . . . . . . . 39
3.3 Requirements for TFP-SVD trigger . . . . . . . . . . . . . . . . . . . . . . . . . 42
4 Development of TFP-SVD trigger algorithm
4.1 Generation of the cell pattern tables . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Trigger algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2.1 N-128 algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2.2 PN-128 and PN-64 algorithms . . . . . . . . . . . . . . . . . . . . . . .
iii

44
45
47
47
53

4.3

Latching of online hit signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

57

5 Generation of test samples
5.1 Test case 1: On-IP particle study . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Test case 2: Oﬀ-IP particle study . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Test case 3: Beam background study . . . . . . . . . . . . . . . . . . . . . . . .

60
60
61
62

6 Performance evaluation
6.1 Evaluation of the trigger eﬃciency . . . . . . . . . . . . . . . . . . . . . . . . .
6.2 Evaluation of the discrimination power for On-IP particles . . . . . . . . . . . .
6.3 Evaluation of the fake trigger probability . . . . . . . . . . . . . . . . . . . . .
6.4 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

65
65
70
72
72

7 Firmware development for TFP-SVD trigger
7.1 Core logic circuit of TFP-SVD trigger . . . . . . . . . . . . . . . . . . . . . . .
7.2 Operation test of the FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.3 Overall conﬁguration of the ﬁrmware . . . . . . . . . . . . . . . . . . . . . . . .
7.3.1 Data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.3.2 Trigger latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

75
75
80
80
80
81
82

8 Conclusion

84

References

86iv

Chapter 1
Introduction
The Standard Model (SM) predicts most of the phenomena in the elementary particle physics
at the energy scale up to O(1) TeV. However, it is not considered to be the ultimate theory
because of the large number of parameters, large discrepancies in particles masses and coupling
constants, and the existence of dark matter. To search for new theories beyond the SM,
experimental measurements with much higher precision are required. B-Factory, which is a
type of particle collider experiment designed to produce a large number of B mesons so that
their properties and behavior can be measured precisely, has made a signiﬁcant contribution to
our understanding of particle physics. In particular, the Belle experiment [1], which was locatedin KEK, Tsukuba (Japan), and designed to produce many B B̄ pairs as decay products from
Υ(4S), observed CP violation in B B̄ oscillations and validated the Kobayashi and Maskawa’s
theory [2].
The Belle II experiment is the successor B-Factory to the Belle experiment. Its centerof mass energy of the asymmetric energy e− e+ collider is set to the resonance of Υ(4S) as
with the Belle. However, the Belle II experiment aims to measure far more B B̄ pairs withthe ﬁfty-fold higher integrated luminosity than the Belle experiment and measures the CP
asymmetries in the B decays described in Section 1.1 with much more precision to validate theSM. Furthermore, the Belle II experiment can explore the τ physics and dark sector.
Those measurements can be supported by high statistics data. However, since the bandwidth of the sampling rate and data transfer of each Belle II sub-detector is ﬁnite, it is notpossible to store all of the data generated by such a high luminosity accelerator. For this reason, the Belle II experiment employs the ﬁrst-level trigger system called “Level-1 trigger” toselect data before recording. For stable operation of the data acquisition system, the maximum
average Level-1 trigger rate is limited to 30 kHz, and we plans to accumulate the integrated
luminosity of 50 ab−1 in about 15 years.

1.1

CKM matrix

The Belle II experiment challenges a wide range of physics. One of the important examples is
the measurement of the CKM matrix.
The SM is described by a quantum ﬁeld theory with the internal gauge symmetries ofSU(3)C × SU(2)L × U(1)Y . It contains the fermion ﬁelds, which account for “matter particles”,
the electroweak boson ﬁelds, which are based on the SU(2)L × U(1)Y symmetry, the gluon
ﬁelds, which are based on the SU(3)C symmetry, and the Higgs ﬁelds. The fermion ﬁelds areclassiﬁed into the quark ﬁelds, which are coupled with the gluons, and lepton ﬁelds, which are1not coupled with the gluons. Furthermore, quark ﬁelds consists of three generations of up-type
quarks uk and down-type quarks dk where k = 1, 2, 3 denotes the generation index. Whilethe left-handed quark ﬁelds (ukL and dkL ) form doubles of the SU(2)L group, the right-handed
quark ﬁelds (ukR and dkR ) are singlets. The Higgs ﬁelds (ϕ0 and ϕ± ) also form doublet. Their
doublets are represented as
(
)
( +)
( )
†
ϕ
uk
ϕ0
c
, Φ=
, Φ =
ΨkL =
(k = 1, 2, 3)
(1.1)
dk L
ϕ0
−ϕ−
The Lagrangian LI , in which the quark ﬁelds couple with Higgs ﬁelds, is represented by
]
∑[ U
D
−LI =
ΨjL ΦdkR + h.c.
Mjk ΨjL Φc ukR + Mjk
(1.2)
j,k
U,D
where Mjk
are coupling constants between the quark ﬁelds and Higgs ﬁelds, and h.c. standsfor Hermitian conjugate. If the ϕ0 has nonzero vacuum expectation via spontaneous breakingof the SU(2)L × U(1)Y symmetry, the mass terms of the quarks are obtained]v ∑[ UD
Mjk ujL dkR + Mjk−Lm = √
dkL dkR + h.c.
2 j,k
(1.3)
)
v (
U
D
= √ U L M UR + DL M DR + h.c. ∈ LI
2√
where v/ 2 is a nonzero vacuum expectation value, UL,R = (u, c, t)L,R and DL,R = (d, s, b)L,R
are vectors of up-type and down-type quarks respectively, and M U,D are 3×3 complex matrices.
The u, c, t, d, s, and b are weak eigenstates. However, the time evolution of the quarkﬁelds are described by their mass eigenstates, which can be obtained by diagonalizing the M U
and M D as
†
†
U
U
U
D
M U = SLU Mdiag
SR, M D = SLD Mdiag
SR
(1.4)
U,D
U
D
where SL,R
are Unitary matrices, Mdiag= diag(mu , mc , mt ), and Mdiag= diag(md , ms , mb )are diagonal matrices with quark masses. By substituting these, Eq. (1.3) is rewritten as)v ( ′ U′D′
−Lm = √ U L Mdiag
UR′ + DL Mdiag
DR+ h.c.
2
[
]
∑
(1.5)
v
′
=√
mx u′xL u′xR + my dyL d′yR + h.c.
2 x=u,c,t y=d,s,b′
U′D
where UL,R
≡ SL,R
UL,R = (u′ , c′ , t′ )L,R and DL,R
≡ SL,R
DL,R = (d′ , s′ , b′ )L,R are mass eigenstate vectors of the quarks.
The conversion of the eigenstates gives rise to the generation mixing of the quarks throughthe charged weak interaction.
]g [−LW = √W U L γ µ DL Wµ+ + h.c.
2]gW [ ′ µ= √ U L γ V DL′ Wµ+ + h.c.
(1.6)
2
]
[
∑
g
′
∗ ′
= √W
u′jL γ µ Vjk d′kL Wµ+ + dkL γ µ Vjk
ujL Wµ−2 j,k2

where Wµ± denotes the W bosons, γ µ is a gamma matrix, gW is the coupling constant between
the quark ﬁelds and the weak bosons, and V ≡ SLU SLD† = (Vij ) (i, j = 1, 2, 3) is a 3 × 3 unitarymatrix called the Cabibbo-Kobayashi-Maskawa (CKM) matrix.
 V11 V12 V13
Vud Vus Vub(1.7)
V = V21 V22 V23  =  Vcd Vcs Vcb 
Vtd Vts Vtb
V31 V32 V33
There are many conventions to represent the CKM matrix. It is experimentally known
that |Vub |2 ≪ |Vcb |2 ≪ |Vus |2 , and the Wolfenstein parameterization is used to exhibit thishierarchy:
1 − λ2 /2λAλ3 (ρ − iη) + O(λ4 )
V =
(1.8)
−λ
1 − λ2 /2
Aλ2
32
Aλ (1 − ρ − iη)−Aλ1
where λ ≃ 0.22, and A, ρ, and η are O(1).
The unitarity condition of the CKM matrix leads to nine independent equations. The one
most relevant to B physics is∗
Vud Vub+ Vcd Vcb∗ + Vtd Vtb∗ = 0,

(1.9)

in which all the terms are order O(Aλ3 ). Eq. (1.9) is represented as a triangle in the complex
plane as shown in Fig. 1.1, which is called the “unitarity triangle” and each angle is given by()
Vcd Vcb∗
ϕ1 = arg − ∗Vtd Vtb()
V Vtb∗(1.10)
ϕ2 = arg − td
∗
Vud
Vub
(
∗ )
Vud Vub.
ϕ3 = arg − ∗Vcd Vcb
The independent measurements of these three angles lead to the veriﬁcation of the SM. Thisis one of the purpose of the Belle II experiment [3].
The angle ϕ1 can be determined via the b → cc̄s transitions. The mode of B → J/ψKS0 iscalled the “golden mode” for the ϕ1 determination because it has small theoretical uncertainty
and clean experimental signature. The angle ϕ2 can be determined via the b → uūd transitions.
Especially, B → ππ and B → ρρ decay modes are studied by analyzing the isospin symmetry
in these transitions. The angle ϕ3 is precisely measured via the CP asymmetry in the decay
modes of B → D∗ K ∗ and B → D∗ π.

3

Figure 1.1: Unitarity triangle [3].

1.2

Motivation of a new Level-1 trigger

The SuperKEKB collider, an accelerator used in the Belle II experiment, achieved the instantaneous luminosity of 4.7 × 1034 cm−2 s−1 in June 2022. For more eﬃcient data taking, we willcontinue to increase the luminosity by tuning the machine parameters. On the other hand,
the increase in the luminosity results in the higher beam background rate. At the target luminosity of 6.0 × 1035 cm−2 s−1 , the average Level-1 trigger rate is expected to exceed the upper
limit of 30 kHz. The major contributor to the background trigger rate is considered to be Oﬀ
Interaction Point (Oﬀ-IP) particles, which are produced outside of the beam interaction point.
The Oﬀ-IP particles are expected to be rejected by selecting their production positions. The
current main trigger system is the Central Drift Chamber (CDC) trigger, which reconstructs
the particle trajectories and identiﬁes the particle production positions. However, as describedin Section 3.1, the CDC trigger cannot suﬃciently reject the Oﬀ-IP particles due to its limited
position resolution. Therefore, a new Level-1 trigger system with better position resolution isdesired. Fake triggers, which are derived from fake tracks reconstructed by harsh backgroundsensor hits, also contribute to the background trigger rate. However, the new trigger with highposition resolution is expected to suppress the fake trigger.
The Silicon Vertex Detector (SVD), which is a type of silicon strip detector and responsible
for particle decay vertex reconstruction in cooperation with the Pixel Detector (PXD), hashigh position resolution of a few tens of micrometers for charged particles. However, it has
no function for the Level-1 trigger. The Thin Fine-Pitch SVD (TFP-SVD), which is being
developed as the next generation vertex detector, will have higher position resolution than thecurrent SVD and have the ability to output signals that can be used for the Level-1 trigger.
With the aim of developing a new trigger system that can reject Oﬀ-IP particles eﬃciently
and suppress the background trigger rate, this thesis develops the trigger algorithm using
the TFP-SVD detector by simulation and reports the results of its performance evaluations.
Furthermore, the feasibility of the TFP-SVD trigger system as ﬁrmware is also veriﬁed after4

the simulation study.
This thesis consists of 8 chapters including this introduction. Chapter 2 explains the conﬁguration and features of the Belle II experiment. Chapter 3 evaluates the future Level-1 trigger rate
and proposes a new sub-trigger system using the TFP-SVD. The trigger algorithm developedin simulation is described in Chapter 4. In order to evaluate the performance of the algorithm,
Chapter 5 considers the test cases and Chapter 6 shows the results. Chapter 7 conﬁrms thefeasibility of its implementation. In Chapter 8, we summarize this thesis with description of
our achievements.

5

Chapter 2
The Belle II experiment
In this chapter, the accelerator and the sub-detectors of the Belle II experiment are described,
emphasizing important features. In particular, the Silicon Vertex Detector (SVD), beam background, and the Level-1 trigger system are elaborated since they are closely related to ourstudy. Furthermore, the ongoing TFP-SVD plan, which aims to upgrade the SVD, is also
described.

2.1SuperKEKBThe SuperKEKB collider shown in Fig. 2.1 is an accelerator using electron and positron beams.
√
The center-of-mass energy s is set to 10.58 GeV, which is the Υ(4S) resonance energy, tostudy B B̄ pairs produced by the Υ(4S) decays. SuperKEKB consists of the linear accelerator(linac), the positron damping ring, and the two main storage rings (electron and positronrings). The ring for the 7 GeV electron beam is called the High Energy Ring (HER), while thering for the 4 GeV positron beam is called the Low Energy Ring (LER). The asymmetric beamenergies result in the Lorentz boost of the e+ e− center-of-mass system with the boost factorof βγ = 0.28. The radio frequency (RF) of the accelerating cavities in the linac alternately
generates phases that accelerate and decelerate particles. Therefore, particles in the beam
locally gather and form “bunches”. Dipole and quadrupole magnets are installed in the main
ring to control the orbits and emittances of the electron and positron beams. In particular, themagnets for the ﬁnal beam focusing are called QCS. The electron and positron beams circulate
in the main rings and collide at one interaction point (IP), which is surrounded by the Belle IIdetector.
The luminosity L of the beam crossing in a collider is given by the following formula,assuming ﬂat beams and equal horizontal and vertical beam sizes for two beams at the IP [4]:L=

γ± I± ζy± RL∗
2ere βy±
R ζy

(2.1)

where γ, e, and re are the Lorentz factor, elementary electric charge, and electron classicalradius, respectively, I is the beam current, ζy is the vertical beam-beam parameter, βy∗ isthe vertical beta function at the IP, and RL and Rζy represent the reduction factors for the
luminosity and the vertical beam-beam parameter, which arise from the crossing angle andthe hourglass eﬀect. The suﬃx “±” speciﬁes the positron(+) or electron(−). According to
Eq. (2.1), if βy∗ becomes smaller, the luminosity becomes higher. However, it is limited by the6length of the bunch σz .

βy∗ > σz

(2.2)

SuperKEB adopts the “Nano-Beam” scheme [5]. The basic idea of the scheme is to squeeze
the βy∗ by minimizing the longitudinal size of the overlap region of the two beams, which isthe eﬀective bunch length d. In the scheme, two bunches collide with large crossing angle of
2ϕ = 83 mrad, resulting in a small eﬀective length. Fig. 2.2 shows a schematic of the beamcollision in the Nano-Beam scheme. In this case, the lower limit of the βy∗ is given byβy∗ > d ≈

σx∗
ϕ

(2.3)

where σx∗ is the horizontal beam size at the IP, and becomes much smaller than the actual
bunch length σz . The design machine parameters of the SuperKEKB collider are shown in
Table 2.1.

Figure 2.1: The SuperKEKB collider7

Figure 2.2: Schematic of the Nano-Beam scheme

Table 2.1: Design machine parameters of the SuperKEKB collider [6]Beam energy [GeV]
Beam current I [A]
Number of bunches
Vertical beam-beam parameter ζyVertical beta function βy∗ [mm]Bunch length σz [mm]Luminosity [cm−2 s−1 ]LER (e+ ) HER (e− )
4
7
3.60
2.62
2500
2500
0.08810.0807
0.27
0.30
6.0
5.0
35
8 × 10

At ﬁrst, SuperKEKB is designed to achieve the luminosity of 8.0 × 1035 cm−2 s−1 to accumulate the integrated luminosity of 50 ab−1 in about 15 years. However, after the operation of
the accelerator for several years, the recent target luminosity is set to 6.0 × 1035 cm−2 s−1 maintaining the target integrated luminosity of 50 ab−1 . The luminosity projection of SuperKEKB
is shown in Fig. 2.3.

Figure 2.3: Luminosity projection of SuperKEKB [7]. The blue line represents the integrated
luminosity, and the red line represents the instantaneous luminosity.

8

2.2

Belle II detector

As shown in Fig. 2.4, the Belle II detector [4] surrounds the IP and consists of seven subdetectors: Pixel Detector (PXD), Silicon Vertex Detector (SVD), Central Drift Chamber(CDC), Time of Propagation counter (TOP), Aerogel Ring Imaging Cherenkov counter (ARICH),
Electromagnetic Calorimeter (ECL), and KL0 and µ detector (KLM). Each sub-detector detects
particles produced by the e− e+ collisions and measures their various properties. A superconducting solenoid magnet is placed between the ECL and KLM, generating a 1.5 T magnetic
ﬁeld along the beam axis. The magnetic ﬁeld bends trajectories of charged particles, allowing
the measurement of their momenta and signs of charge.

Figure 2.4: The Belle II detector

The global coordinate system of the Belle II detector is set as a right-handed Cartesiansystem with the origin at the IP. As shown in Fig. 2.5, z-axis points toward the angle bisector of
the outgoing HER beam and incoming LER beam. The radius r, polar angle θ, and azimuthal
angle ϕ are deﬁned as√r = x2 + y 2
( √
)
2
2
2
(2.4)
θ = arccos z/ x + y + z
ϕ = arctan (y/x).

9Figure 2.5: The global coordinate system of the Belle II detector

Each sub-detector is introduced below. The SVD is explained in detail in Section 2.3.
PXD The PXD is the innermost sub-detector of the Belle II detector and constitutes the
Vertex Detector (VXD) together with the SVD. It consists of two layers of silicon pixel sensors,whose radii are 14 mm and 22 mm. The sensors are fabricated based on the Depleted P-channel
Filed Eﬀect Transistor (DEPFET) technology, which is a semiconductor detector conceptthat combines the signal detection and ampliﬁcation within one device, allowing for very thin
(50 µm) sensors. The size of each pixel is 50 × 55 µm2 for inner layer and 50 × 75 µm2 for outerlayer.
CDC The CDC mainly plays two important roles. First, it reconstructs charged particle
trajectories and measures their momenta precisely. Second, it provides particle identiﬁcation
measuring energy loss within its detector volume. Low momentum particles which do notreach the outer particle identiﬁcation detectors (the TOP or ARICH) can be identiﬁed using
the CDC. The CDC has more than 56,000 wires basically stretched in the z direction, ﬁlledwith the gas mixture of 50 % He and 50 % C2 H6 . A high voltage (> 30 kV/cm) is applied tothose wires: the anode wires are called the “sense wire”s and the cathode wires are called the“ﬁeld wire”s. The CDC has 14,336 sense wires and 42,240 ﬁeld wires. If charged particles
interact with and ionize the gas, ionized electrons are accelerated toward the sense wires by
the electric ﬁeld impressed between the sense wires and ﬁeld wires. The accelerated electrons
ionize other atoms, and the secondary electrons further ionize other atoms, resulting in anelectron avalanche. The avalanche induces current in the wires and the front-end electronics
detect the signals. The ionized location due to the incident particle is detected by measuring
the drift time from the ionized location to the sense wires, which is basically proportional tothe distance between the two locations.
Fig. 2.6 shows the cross-sectional view of the CDC on the r − z plane. The CDC has 56
layers of sense wires, each layer has 160 – 384 sense wires. The 56 layers are divided into 9“Super Layer (SL)”s: the innermost SL has 8 layers and each of the outer 8 SLs has 6 layers.
The SLs are numbered from inner to outer as SL0, SL1, · · · , SL8. In the even-numbered SLs
represented by solid line in Fig. 2.6, all wires are strung exactly along the z-axis to reconstruct
the 2-dimensional tracks (2D tracks). These SLs and their wires are called the “axial” layers
10and “axial” wires. In the odd-numbered SLs represented by dashed line in the ﬁgure, all wires
slightly deviate from z-axis to reconstruct the 3-dimensional tracks (3D tracks) by combining
them with axial wires. These SLs and their wires are called the “stereo” layers and “stereo”
wires. Moreover, the concept of “cell” is deﬁned as a set of each sense wire and 8 ﬁeld wires
surrounding that sense wire. As shown in Fig. 2.7, the ﬁeld wires are shared by adjacentcells. The smaller the cell size is, the shorter the maximum drift time and the lower the beam
background inﬂuence. Since the innermost super layer (SL0) is exposed to an intense beam
background, the cell size in the SL0 is about half of that in the outer SLs.

Figure 2.6: Cross-sectional view of the CDC on the r − z plane. The solid lines represent axial
layers and the dashed lines represent stereo layers.

Figure 2.7: The cell size (upper left), the number of cells (lower left), and the structure of
the cells on the x − y plane (right) are shown [8]. In the upper right ﬁgure, sense wires are
represented by orange points and ﬁeld wires are represented by white circles.

11

TOP The TOP is placed in the barrel region outside of the CDC and responsible for particle
identiﬁcation of K ± and π ± . The TOP measures the time of propagation of the Cherenkov
photons internally reﬂected inside a quartz radiator. The micro-channel plate photomultipliertubes (MCP-PMTs), installed at the end surfaces of the quartz, reconstructs the Cherenkov
image from the 3-dimensional information provided by the two-diensional local coordinate(x, y) and precise timing. The time information with high resolution better than 50 ps provided
by the MCP-PMTs is also used as good timing trigger at the Level-1 trigger system.
ARICH The ARICH is placed in the foward end-cap and responsible for particle identiﬁcation of K ± and π ± as well as the TOP. In the ARICH, a charged particle passing through asilica aerogel radiator produces the Cherenkov photons. The Hybrid Avalanch Photo Detector(HAPD) reconstructs the Cherenkov ring image and separates K ± from π ± by the diﬀerencein the Cherenkov angles.
ECL The ECL consists of 6624 CsI(Tl) crystals placed in barrel section with an inner radiusof 1.25 m, and 2112 CsI(Tl) crystals placed in end-caps at z = 1.96 m (forward) and z =−1.02 m (backward). The PIN photo-diodes detect the scintillation light which determines
energies and angular coordinates of electrons and photons.
KLM The KLM consists of an alternating sandwich of iron plates and active detector elements, which are located outside of the superconducting solenoid. It has 15 detector layers and14 iron plates in the barrel region, and 14 detector layers and 14 iron plates in each end-cap.
The iron plates serve as the magnetic ﬂux return for the solenoid. Muons traverse the KLM
along nearly straight lines, while hadrons cause nuclear interactions in the iron plates. The
detectors, which consist of Resistive Plate Chambers (RPCs) and plastic scintillators, detectthe diﬀerence in the trajectories of the particles and identify the muons. On the other hand,
KL0 mesons are identiﬁed by detecting hadronic showers induced by the nuclear interactions.

2.3

Silicon Vertex Detector (SVD)

The SVD [9] constitutes the outer four layers of the VXD and contributes to inner tracking,estimation of the region-of-interest (RoI) on the PXD sensors, and particle identiﬁcation byenergy loss measurements. The whole VXD structure is shown in Fig. 2.8. In the VXD, theinner two layers named as layer 1 and 2 are the PXD and the outer four layers named aslayer 3 – 6 are the SVD. Each SVD layer consists of 7 – 16 “ladder”s, and 2 – 5 sensors
are mounted on each ladder. As shown in Fig. 2.9, the ladders are located cylindrically andtheir radii are 39 mm, 80 mm, 104 mm, and 135 mm, respectively. These ladders are numberedcounterclockwise when viewed from the LER beam axis. Fig. 2.10 shows the cross-section of
the SVD. The sensors are named FW, +Z, CE, -Z, and BW according to their positions on
the ladders.
In order to minimize the multiple scattering for high precision reconstruction of particle
tracks, the number of layers is reduced by orthogonally implanting strips on both sides of thesensor. The sensor based on this technology is called the Double-sided Silicon Strip Detector(DSSD) sensor. In addition, to suppress the electrical noise level, a “chip-on-sensor” concept is
employed to implement the front-end readout electronics. They are explained in the following
sections.
12Figure 2.8: Vertex Detector (VXD)

Figure 2.9: Cross-section of the VXD on the x − y plane. The layer 1 – 2 are the PXD andthe layer 3 – 6 are the SVD

Figure 2.10: Cross-section of the SVD on the r − z plane13

2.3.1

Double-sided Silicon Strip Detector (DSSD)

The structure of the DSSD is shown in Fig. 2.11. The DSSD sensor used in the SVD is madeof the n-type silicon substrate, on which more deeply doped strips on the top and bottom sidesof the sensor bulk are implanted perpendicular to each other. The p+ -strips are called the Pstrips and the n+ -strips are called the N-strips. It is known that an electron accumulation layer
is created under the bulk-SiO2 interface. It reduces the interstrip resistance between N-strips
and results in the charge sharing among those strips [10]. Therefore, p+ -strips, called p-stops,
are implanted between N-strips to insulate them and avoid the charge sharing in the N-strips.
The readout aluminum (Al) electrodes are placed on every other strips. The strips on which
the readout electrodes are not placed are called ﬂoating strips. The thickness of the DSSD
sensor is 300 µm and 320 µm. The material budget per layer corresponds to approximately
0.7 % of the radiation length. The geometrical details of the DSSD are shown in Table 2.2.
An inverse bias voltage of 100 V is applied between P-strips and N-strips of the DSSD
to fully deplete the bulk in the SVD operation. When a particle passes through the sensor,
electron-hole pairs are produced along the particle trajectory. The electrons and holes drift
toward N-strips and P-strips respectively by the impressed bias voltage, and then the current
induced in the strips by the carrier migration is read out by the Al electrodes. The signals
induced in the ﬂoating strips are read out by the neighboring readout electrodes. P-strips
provide ϕ information and N-strips provide z information, oﬀering the 2-dimensional particle
positions.

Figure 2.11: Structure of the DSSD sensor

14

Table 2.2: Geometrical details of the DSSD sensors used in the SVD
Location
Active area [mm2 ]Thickness
Number of readout P-strips
Number of readout N-strips
Pitch b/w readout P-strips
Pitch b/w readout N-strips
2.3.2

Small rectangular
Layer 3122.90 × 38.55
320 µm
768
768
50 µm
160 µmLarge rectangular
Layer 4–6 (except FW)
122.90 × 57.72
320 µm
768
512
75 µm
240 µmTrapezoidal
Layer 4–6 (FW)122.76 × (38.42–57.59)
300 µm768
512
50–75 µm
240 µmFront-end readout electronics: APV25

The signal generated in the strips of the DSSD is read out by APV25, which is a front-end
ASIC (Application Speciﬁc Integrated Circuit) of the SVD [11]. APV25 is a low-noise charge
sensitive ampliﬁer chip designed with the 250 nm CMOS technology, and it is characterized by
fast signal shaping time, good time resolution, and strong radiation tolerance. However, fastershaping time causes larger noise. In order to suppress the noise to an acceptable level, readoutchips should be placed as close to the sensor as possible. For this reason, APV25 is locatedon a ﬂexible circuit placed on top of the sensor. There is a layer of foam between the ﬂexible
circuit and the sensor for electrical and thermal insulation.
APV25 has 128 input channels. The internal circuit of each channel is shown in Fig. 2.12.
A Minimum Ionising Particle (MIP) generates about 25,000 electron-hole pairs in the DSSD
volume. First, the charge signal induced by them is ampliﬁed by a pre-ampliﬁer (preamp).
Depending on the type of the carrier (electron or hole), opposite signal polarities arrive at the
input of the preamp. In order to reduce power supply range while maintaining the capability
to handle both signal polarities, an optional inverter is introduced after the preamp, by which
signal polarity is always positive at the subsequent circuit. The following block is a CR-RC
shaper to shape the ampliﬁed signal. The shaper output is stored to the pipeline of 192 analog
cell memories at a frequency of 31.8 MHz, 1/16 of the SuperKEKB RF clock of 509 MHz. The
pipeline serves as a ring buﬀer memory, in which the stored samples are held until readout
due to the arrival of the trigger signal or overwritten by new samples. If a sample is read out,
its voltage is converted into a current at APSP (Analog Pulse Shape Processor). The samples
from all 128 channels are serialized at the MUX (Multiplexer), then output with 12-bit digital
header (3 start bits, 8 bits for readout cell address, and one error bit). Fig. 2.13 shows theoutput from one APV25, which consists of 12-bit and sequential 128 analog values.
There are two data taking modes: 6-sample mode and 3-sample mode. In the 6(3)-sample
mode, six(three) cells of data are read out in one event. For the 6(3)-sample mode, whenthe Level-1 trigger signal (Section 2.6) arrives, the 6(3) cells that are requested for output
are protected in order not to be overwritten before the readout is completed. The addressesof the protected cells are recorded in 32-depth FIFO (First-In First-out). If other trigger
arrives before the previous readout processing is completed, additional other 6(3) cells areprotected. The maximum number of protected cells is 32 due to the depth of the FIFO. Thus,
the maximum available pipeline depth to wait for the Level-1 trigger arrival is 160 (= 192 −32),
which leads the maximum trigger latency time of 5.0 µs (≈ 160 × 1/31.8 MHz).

15

MUX gain

128:1
Differential
MUX
current
output amp

inverterpipelinepreampAPSP

shaperS/H

Figure 2.12: Block diagram of one channel in APV25

Figure 2.13: Output data from APV25 [12]. The horizontal axis shows time counted by theclock of 31.8 MHz.
2.3.3

Readout chain of the SVD data

The main elements of the SVD readout chain are shown in Fig. 2.14. APV25 outputs are sent
to the junction boards located in the DOCKs, which are space reserved for interconnections ofcables and services, close to the CDC end-plates. The junction boards are also connected to
power supply required for the sensor bias and the APV25 power. After the junction boards,
the outputs are sent to the FADC (Flash Analog to Digital Converter) boards located on topof the Belle II detector, in which the analog data is digitized. In the digitization process, an
online “zero-supression” processing is performed. In this process, the strip signal is converted
in the unit of the electrical noise on the strip, called signal-to-noise ratio (SNR), and the16strip is classiﬁed into a “ﬁred” strip when either of samples in the strip signal exceeds a given
threshold, otherwise classiﬁed into an “unﬁred” strip. Only the ﬁred strips are transferredto the subsequent pipeline toward the Data-Acquisition (DAQ) system (Section 2.5). The
electrical noise is evaluated for each strip as the root mean square (RMS) of the pedestal
signals. The SNR threshold is common for all of the strips, and the current value for the
online zero-suppression is 3.0 SNR.

Figure 2.14: Readout chain of the SVD data

2.4

Beam background

The purpose of the Belle II detector is to detect particles produced by the electron-positron
beam collision at the IP. However, the beam particles sometimes deviate their design orbits
and hit the beam pipe, generating electromagnetic showers. The particles produced by theshowers can intrude into the detector volume and make noise signals in the sensors. They
are called beam background particles. The beam background can cause serious problems suchas radiation damage in sensors, bad reconstruction purity, high fake trigger rate, and DAQ
throughput saturation.
2.4.1

Beam background sources

Depending on its production process, beam background can be divided into single-beam background and luminosity background. The single-beam background is caused by interactionsof the electron or positron beam that can happen even without the opposite beam. On theother hand, the luminosity background is induced by the collision of the electron and positron
beams, thus it is also called collision background.

17

The single beam background is mainly categorized into three components, Touschek scattering, beam-gas scattering, and synchrotron radiation, while the luminosity background iscategorized into two components, two-photon process and radiative Bhabha scattering.
Touschek scattering Touschek scattering is a scattering process between particles within abeam bunch. Some of the scattered particles deviate their orbit and hit beam pipe or magnet
walls. The amount of Touschek scattering from all bunches is proportional toI2σ x σ y σ z nb E 3(2.5)

where I is the beam current, σy is the vertical bunch size, nb is the number of beam bunches,
and E is the beam energy [4]. Since the beam size in the nano-beam scheme is very small(σy ≈ 50 nm), the eﬀect from Touschek scattering is important. Moreover, it is more important
for the LER than the HER due to their asymmetric energy.
Beam-gas scattering Beam-gas scattering is an interaction between the beam particles
and the molecules of the residual gas in the beam pipe, which changes the beam particle momenta. Beam-gas scattering is caused by Coulomb scattering and Bremsstrahlung process. The
coulomb scattering changes particle trajectories directly through electromagnetic interaction.
The bremsstrahlung is a higher order eﬀect in a strong electric ﬁeld, in which charged particles
lose their energy with the radiation of photons. The event rate of the bremsstrahlung is low
and low-momentum particles are stopped by collimators in the main ring. Hence, the coulomb
scattering is the main source of the beam-gas background. The beam-gas scattering eﬀect is
proportional to the beam current I and the vacuum pressure P inside the beam pipe. The P
has linear dependency on the I. Therefore, the beam-gas scattering is almost proportional to
the square of the I similarly to the Touschek scattering.
Synchrotron radiation Synchrotron radiation (SR) is a electromagnetic radiation emitted
when relativistic charged particles are accelerated by a magnetic ﬁeld. Since the SR power
is proportional to the beam energy squared and magnetic ﬁeld squared, the eﬀect is more
important for the HER than the LER. The energy spectrum of the SR photons ranges froma few keV to tens of keV, and its contribution to the detector background is predicted to be
negligible [13, 14].
Two-photon process Two-photon process e+ e− → e+ e− e+ e− produces low-momentum
electron-positron pairs. The Feynman diagram of this process is shown in left side of Fig. 2.15.
The low-momentum particles spiral inside the SVD volume by the magnetic ﬁeld and makemany hits on the sensors. The two-photon process is the largest component of the luminosity
background for the SVD. The rate of the two-photon process is proportional to the luminosity
L.
Radiative Bhabha scattering Radiative Bhabha process e+ e− → e+ e− γ produces photons
through the process shown in the right side of Fig. 2.15. It is the second largest component of
the luminosity background on the SVD. The photons from this process ﬂy in the directionof the beam axis and interact with the materials, resulting in electromagnetic showers. In
18addition, electrons and positrons losing their energy are bent their trajectories by QCS placedaround the interaction region (IR) and hit the walls of magnets, where electromagnetic showers
are generated. The rate of the radiative Bhabha scattering is also proportional to the luminosity
L.
Radiative Bhabha process is classiﬁed according to the scattering angle of electron or
positron (θe± ). If one of the θe± is larger than 10◦ and the other is larger than 1◦ , theevent is called “BHWideLargeAngle (BHWide LA)”. If the event is not BHWide LA and bothof the θe± are larger than 0.5◦ , it is called “BHWide”. In other cases, it is called “RBB”.

Figure 2.15: Feynman diagrams of the luminosity backgrounds. The left diagram shows two
photon process and the right diagram shows radiative Bhabha scattering.
2.4.2

Geometrical distribution of beam backgroundSpatial distribution of production positions of charged particles was studied in Ref. [15]. In
Fig. 2.16, two obvious hot spots can be seen at z = 0.6 m and z = 1.1 m. The location of thesespots corresponds to the LER beam pipe. Since the beam size needs to be widened once in
QCS located around z = 1.1 m in order to be focused at the IP, the diameter of the beam pipearound z = 1.1 m is small relative to the beam size. Therefore, background events are expected
to be generated there. There is another hot spot around z = 0.6 m because no backgroundshields such as tungsten shields are located there. Such particles produced outside of the IP
are called the “Oﬀ-IP particle”s, which are expected to be the major background source. In
contrast to them, the particles produced at the IP are called the “On-IP particle”s.

Figure 2.16: Top view of the vertices reconstruction studies in 2019 [15]. Hot spots in theforward region correspond to locations where many background events are generated.

2.4.3

Injection beam background

Regarding the beam injection, SuperKEKB adopts the “continuous injection scheme”, in whichbeams are injected at a frequency of 50 Hz in parallel with the data taking for the eﬃcient data19

acquisition. The injected beams are unstable and produce more background in the detectors
for a brief interval (∼ 100 µs) after each injection. Thus, the events right after the injections,which include more background noise, are vetoed and not sent to the Data-Acquisition system(Section 2.5).

2.5

Data-Acquisition (DAQ) system

The Data-Acquisition (DAQ) system reads out signals from the sub-detectors and records
the data. However, the data from the Belle II detector are enormous (of course, background
events greatly contribute to it) and all of them cannot be recorded due to the limitation of
the storage capacity and the bandwidth of the data transfer. For this reason, the Belle IIexperiment employs the trigger system to select physics events to be recorded in the DAQ.
The trigger system of Belle II has two stages: the Level-1 trigger, described in Section 2.6,
performs ﬁrst selection of the events, and then the High-Level Trigger (HLT), which is theonline software trigger, further reduces the data volume.
Fig. 2.17 shows the conceptual design of the Belle II DAQ system. The front-end electronics
and digitizers are placed nearby the corresponding sub-detectors. The digitized data of eachsub-detector are temporarily stored in its buﬀer memory. The timing distribution system
distributes the 127 MHz clock, Level-1 trigger signal, and other control signals to all the subdetector readout boards and COPPER (COmmon Pipeline Platform for Electronics Readout)
boards through the FTSW (Frontend-Timing-SWitch) modules.
After receiving the Level-1 trigger signal, the data stored in the local memory of eachsub-detector except for the PXD are transferred into COPPER boards through optical ﬁbers
using the Belle2Link, a homemade data transfer protocol. The data are then formatted by the
on-board CPU and sent to the readout PCs via the GbE (Gigabit Ethernet) links. After the
preliminary event reconstruction in Event Builder 1, the full event reconstruction is performedin the HLT servers, where high-level trigger decision is made. The selected data are sent toEvent Builder 2 [16]. The data from the PXD are so large that it waits for the reconstructed
information from the HLT. By using the RoI information from the HLT, the PXD data of
about 1 MB are reduced by a factor of 10. Finally, the reduced PXD data are merged with
the HLT processed data and recorded in the storage of the DAQ. The maximum record rateof the fully reconstructed data is designed to be 1.8 GB/s. The designed performance for the
DAQ is summarized in Table 2.3.
Table 2.3: Designed performance for the DAQ [17]Level-1 trigger rate
Event size except the PXD
Data ﬂow after Level-1
PXD data reduction rate
HLT rate reduction rate
Data record rate

20

Maximum value
30 kHz
1 MB
30 GB/s
1/10
1/3 - 1/6
1.8 GB/s

Figure 2.17: Conceptual design of the Belle II DAQ system [16]2.6

Level-1 trigger system

The Level-1 trigger is the ﬁrst-level trigger system of the Belle II experiment. The requirements√
are summarized in Table 2.4. The total cross sections at s = 10.58 GeV and trigger rates
at the designed luminosity of 8.0 × 1035 cm−2 s−1 for physics events of interest are listed inTable 2.5. Since the trigger rate due to physics events of interest is estimated to be 15 kHz,the trigger rate due to background events must be less than 15 kHz to meet the limit of thetrigger rate of 30 kHz.
Table 2.4: Requirements for the Level-1 trigger [4]Maximum average trigger rate
Fixed latency
Minimum two-event separation

21

Requirement
30 kHz4.2 µs200 ns√
Table 2.5: Cross sections s = 10.58 GeV and trigger rates at the designed luminosity [18].
The rates of Bhabha scattering and γγ event are pre-scaled by a factor of 100 because of theirlarge cross sections.
Υ(4S)
Hadron production from continuumµ+ µ−τ +τ −
Bhabhaγγ
Two photon
Total
2.6.1

σ [nb]
1.2
2.8
0.8
0.8
44
2.4
∼ 80
67

Level-1 trigger rate [Hz]
960
2200
640
640
350 (prescaled by 100)19 (prescaled by 100)
∼ 10000∼ 15000

Structure of the Level-1 trigger system

The Level-1 trigger system [4, 18] consists of four sub-trigger systems, Global Reconstruction
Logic (GRL), and Global Decision Logic (GDL). The schematic overview of the system is shownin Fig. 2.18. The clock frequency used for the Level-1 trigger system is 127 MHz, which is oneforth of the RF frequency of SuperKEKB of 509 MHz. In the ﬁrst step of the trigger system,
several sub-triggers are generated by individual sub-detectors: the CDC sub-trigger, ECL subtrigger, TOP sub-trigger, and KLM sub-trigger. The CDC trigger is also called “track trigger”,
which provides the charged track information on momentum, position, charge, and multiplicity.
The details are described in Section 2.6.3. The event rate of the B B̄ including photons in theﬁnal state is about 50 % of the total B B̄ production. Therefore, as well as the CDC track
trigger, the ECL trigger that is sensitive to the photons is also helpful to ﬁnd the B B̄ events.
It provides the position, energy, and size of the ECL clusters. The trigger decision is mademainly by the CDC trigger and ECL trigger. The TOP trigger is used to precisely determine
the event occurrence timing. The KLM trigger is used to identify muons, and its information is
combined with the CDC and ECL triggers at the GRL, which performs particle identiﬁcationfor electron, photon, and other hadrons by combining the information from sub-triggers. The
matching information from the GRL is expected to make the discrimination between lowmultiplicity events and background events more eﬃcient*1 . The GDL receives signals fromsub-triggers and from the GRL, and makes the ﬁnal Level-1 trigger decision. The trigger
signals of the diﬀerent sub-triggers from the same event are generated at diﬀerent timing. The
GDL performs a timing adjustment to compensate for the diﬀerent latencies before matching
the sub-triggers and making the trigger decision. In the GDL, multiple trigger conditions
called “trigger bit”s are set for various decay modes (Section 3.1): if either of the conditions
is satisﬁed, the corresponding trigger bit is asserted and the Level-1 trigger signal is issued.
The Level-1 trigger signal is designed to be output to the FTSW exactly 4.2 µs after the beamcollision.

*1

The decay event of τ or dark sector particle, which includes a small number of visible particles in the ﬁnal
state, are often confused with Bhabha event (elastic scattering between electron and positron without γ).

22Figure 2.18: Schematic overview of the Level-1 trigger system
2.6.2

Universal Trigger board

The Universal Trigger (UT) board is developed to realize the following features required by
the Level-1 trigger system [18].
1. FPGA (Field Programmable Gate Array) is introduced into the Level-1 trigger system sothat the trigger logic can be changed to accommodate future situations without replacing
hardware.
2. High-speed serial communication is used. In Belle, the data transfer between modules
is performed using diﬀerential emmiter-coupled logic, which needs two signal lines perchannel. The change of the communication method enables 100 times faster data transfer
and reduces the number of signal lines by a factor of 10.
The current available UT boards are the UT3 (third generation of UT board), which was
produced in 2012, and the UT4 (4th generation of UT board), which was produced in 2016.
The speciﬁcations of the UT3 and UT4 are shown in Table 2.6. In the table, GTH, GTX, andGHY are protocols for the high-speed serial communication provided by Intel. Fig. 2.19 is aphotograph of the UT4 board. Moreover, the development plan of the UT5, 5th generation of
the UT board, is ongoing.
2.6.3

CDC sub-trigger

The CDC trigger [18, 17] is the main sub-trigger system and has the highest trigger rate among
all the sub-triggers. Therefore, the CDC trigger impacts the performance of the Level-1 trigger
system signiﬁcantly. The conﬁguration of the CDC trigger is shown in Fig. 2.20. The CDC
trigger has two types of tracking systems: the 2D track trigger and 3D track trigger. Using
the axial wires, the 2D track trigger measures the the number of charged particles, charge,transverse momentum*2 pT , and azimuthal angle ϕ. In addition to these information, by using*2

Transverse momentum is the component of three-dimensional momentum perpendicular to the z-axis

23

Table 2.6: Speciﬁcations of the UT3 and UT4model of FPGA
The number of logic gatesBand width of Opt module
IO
Sub FPGA

UT3
Xilinx Virtex6
XC6VHX380 / 565T
382k / 580k
530 Gbps
GTH 11.18 Gbps × 24 lanes
GTX 6.6 Gbps × 40 lanes-

UT4
Xilinx Virtex Ultrascale
XCVU080 / 160
975k / 2026k
1300 Gbps
GTY 25 Gbps × 32 lanes
GTH 15 Gbps × 32 lanes
Artix 7 XC7A15T(16k gates)

Figure 2.19: The photograph of the UT4 board
the stereo wires, the 3D track trigger measures the production z-positions of the particles, it
is a very powerful tool to reject the Oﬀ-IP particles.
The CDC has 302 front-end electronics, each of which reads out the 48 sense wires. For
the CDC trigger, 292 front-ends are used due to the high background rate in the inner most
3 layers. The clock frequency of the front-ends for the sub-trigger system is 31.75 MHz, onefourth of 127 MHz. The Merger board merges the data from four CDC front-ends and sends
the merged data to the Track Segment Finder (TSF) module.
By using the hit data from the Merger, “Track Segment” hits are formed by the TSF
modules. The structures of TSFs are shown in Fig. 2.21. In the ﬁgure, each square represents
a CDC cell, described in the CDC part of Section 2.2. Each TSF contains ﬁve layers. The TSF
on the SL0 is shaped to be sensitive to the track from the IP. On the other hand, the TSFs on
the other SLs is shaped to accommodate the curved track due to the magnetic ﬁeld. The total
number of TSFs is 2,336. Adjacent TSFs are located on the next cells, thus sharing the 10(6)same cells with each other for SL0(other SLs). The TSF is classiﬁed as a “track segment” if
at least four out of the ﬁve layers have hits. The red cells represent the ﬁrst priority cells,
and the orange cells represent the second priority cells. If the ﬁrst priority cell has a hit, thehit is called “priority hit”. The information on the position and hit timing of the TSF is
assumed to be that of its priority hit, and only the information of the priority hit is sent to24the subsequent tracking processing. If the ﬁrst priority cell does not have hit, the hits of thesecond priority cells provide the information. If there is no hit on the ﬁrst priority cell andthe second priority cells, the information of TSFs is ignored. The overall arrangement of TSFs
is shown in Fig. 2.22. TSFs are designed to reconstruct the track of charged particles withpT > 0.3 GeV.
Using the information from the 1,312 TSFs on the axial SLs, the 2D tracker module reconstruct the 2-dimensional track (2D track). Since a charged particle curves on the x − yplane passing through the IP in the magnetic ﬁeld, its track can be determined by identifyingr and ϕ where r is the radius and ϕ is the azimuthal angle of the center of the circle. The
information on the r and ϕ is determined from the track segment hits using “Hough Transformation” method [19]. Furthermore, 3-dimensional tracks (3D tracks) are reconstructed using
2D tracks and track segment hits of TSFs on the stereo SLs. In this calculation, the hit timing
information is also used. After the 3D track trigger, the information on the full momentum
including the z-component pz and the production z position of the track ∆z can be obtained,
which is sent to the GRL for matching with the information from other sub-trigger systems.

Figure 2.20: The overall conﬁguration of the CDC trigger. GTP, GTY, and GTH are represent
the protocols for the high-speed serial communication.

25

Figure 2.21: The structure of TSFs on the SL0 (left) and the other SLs (right). Each square
represents a CDC cell. The red cell is the ﬁrst priority cell and the two orange cells are thesecond priority cells.

Figure 2.22: Cross-section of the CDC on the x − y plane. Only 1/8 of all TSFs are shown.

26

2.7

Thin Fine-Pitch SVD (TFP-SVD)

As described below, we are now having several concerns in the operation of the current SVD
coming from the harsh beam background. Furthermore, as discussed in Section 3.1, the Level-1
trigger rate is in a severe situation against the limit of 30 kHz. For these reason, the development plan of a new DSSD with thinner thickness and ﬁner strip pitches compared with thecurrent SVD is under discussion [20]. The new SVD is named “Thin Fine-Pitch SVD (TFPSVD)”. The TFP-SVD is intended as a replacement for the current SVD to improve the beam
background tolerance, the reconstruction performance, and the Level-1 trigger performance.
Moreover, a more ambitious target is to replace the inner part of the CDC layers with the
TFP-SVD for higher beam background tolerance in that region.
Radiation damage Long-term irradiation to the silicon sensor causes radiation damage tothe surface and bulk of the sensor, degrading its performance. The radiation damage can beevaluated by the total ionizing dose (TID) and the non-ionizing energy loss (NIEL). In the
TID, incident particles ionize atoms in the sensor and change the surface states. The NIEL
causes displacement of atoms in the sensor bulk region. The NIEL eﬀect mainly leads to anincrease in leakage current and a change in doping concentration. In particular, the latter
causes a change in the full depletion voltage and requires higher power supply, making theoperation of the silicon sensor more diﬃcult. The expected radiation tolerance of the current
SVD sensor is about 10 Mrad for the TID, and about 1013 neq/cm2 for the NIEL where neq isa unit represented as an equivalent to NIEL of 1 MeV neutrons. The beam background rate
at the design luminosity (L = 8.0 × 1035 cm−2 s−1 ) is estimated by the simulation based on the
beam background study in November 2020. The results, which are re-scaled using Data/MC
ratios to compensate the gaps between simulation and data, are shown in Table 2.7. The
detail of the simulation technique is described in Section 5.3. The safety factors derived asratios of limits to expectations are also shown in the table. While the safety factor is above 1,
the simulation can be optimistic because it assumes a perfect conﬁguration of the collimators
ignoring the beam injection eﬃciency, and it does not take the injection beam background into
account. Therefore, a larger safety factor of about 5 is desirable by extending the limitation.
Table 2.7: Expectations and limits for the radiation damage of the SVD. Expectations arecalculated by multiplying the expectation per single year [9] by the operating period of SuperKEKB.
TID
NIEL

Expectation
2.2 Mrad (10 years)
5.2 × 1012 neq/cm2 (10 years)

Limit
10 Mrad1013 neq/cm2

Safety factor
4.5
1.9

Reconstruction performance A vertex of a particle which decays in the SVD volume
and leaves no hit signals in the PXD must be reconstructed using the SVD hit signals. An
important example is KS , which is essential for the indirect CP violation measurement, e.g.
B → KS π 0 , B → KS KS KS , and B → KS π 0 γ. The vertex resolution for such decay modes islargely degraded by the multiple scattering in the material of the DSSD sensor. The eﬀect ofthe multiple scattering is also critical for the low-momentum track reconstruction. The current

27

material budget per SVD layer corresponds to 0.7 % of the radiation length, however, smallermaterial budget is desirable.
Hit signals of background particles and those due to physics particles of interest are sometimes indistinguishable. Therefore, the large number of hit signals due to beam background
events also degrades the reconstruction performance because of so many fake tracks. This eﬀect
is evaluated by the “hit occupancy”, which is deﬁned as the average fraction of the number ofﬁred strips to the total number of strips. It is required that the hit occupancy of the innermost
layer (layer 3) should be less than 5 % [21]. The expectation at the designed luminosity isshown in Table 2.8. The safety factor of 1.7 is obtained, which is not suﬃcient for the same
reason described above.
Table 2.8: Expectations and limits for the hit occupancy of the SVD. The assumption of thesimulation is the same as the Table 2.7.
Hit occupancy (layer 3)

Expectation
about 3 %

Limit
5%

Safety factor
1.7

Background tolerance on the CDC The inﬂuence of the beam background on the wire
hit rate is biggest issue for the CDC. An increase in the wire hit rate changes electrical ﬁeld
around the wires due to the space charge eﬀect and degrades the signal gain. The limit on thewire hit rate is roughly estimated to be about 200 kHz. The estimation of the wire hit rate
at the target luminosity is done by the simulation based on the beam background study in
May 2020. Fig. 2.23 shows the result of the CDC hit rates per sense wire of 56 layers. In thesimulation, the 55th layer is masked due to malfunction. It is found that the average hit ratesof the inner layers exceed the limitation of 200 kHz.

Figure 2.23: Expectation of the CDC hit rate [22]28

2.7.1

Speciﬁcation of the TFP-DSSD sensor

A new DSSD sensor, called “TFP-DSSD” sensor, is being developed to be used in the TFPSVD. To obtain a safety factor of 5, the target beam background tolerances are set as• Hit rate: 10 MHz/cm2• TID: 11 Mrad (10 year)• NIEL: 2.6 × 1013 neq/cm2
For these target, the TFP-DSSD plans to have the sensor thickness of about 140 µm andstrip pitches of 100 µm or less. The thinner thickness compared to the current thickness of
300 − 320 µm has two beneﬁts. One is the smaller material budget corresponding to 0.19 %of the radiation length, which will improve the KS vertex reconstruction resolution and lowmomentum track resolution. The other is the smaller change in full depletion voltage afterradiation damages. The full depletion voltage VFD is given by
VFD =

d2
2ϵSi ρµe(2.6)

where d is the sensor thickness, ϵSi is the permittivity in silicon, ρ is the silicon resistivity,and µe is the electron mobility [23]. According to this equation, the full depletion voltage is
proportional to the square of the sensor thickness. Fig. 2.24 shows the relation between the full
depletion voltage and the NIEL damage in a silicon sensor with 300 µm thickness. Considering
the target NIEL tolerance of 2.6 × 1013 neq/cm2 , it needs power supply of about 150 V to fully
deplete the sensor bulk. If other parameters are ﬁxed, full depletion voltage of the TFP-DSSD
is 37.5 V, which can be applied by a usual power supply.

Figure 2.24: The observed change of the full depletion voltage as a function of the irradiated
1 MeV-neutron equivalence ﬂux [24]29The ﬁrst prototype of the TFP-DSSD sensor was fabricated by Micron Semiconductor in
England and delivered to KEK by the end of May 2021. Its speciﬁcation is summarized inTable 2.9. The thinner the sensor and the smaller the strip pitch, the smaller the charge
induced in each strip. In order to concentrate the charge on each strip, all the ﬂoating strips
were removed in the prototype. This prototype has the size of 52.6 mm × 59.0 mm, which is
too small to cover the whole detector volume. Therefore, a lager TFP-DSSD sensor is underdevelopment. However, in the larger sensor, the strip length becomes longer and the detector
capacitance becomes larger. This can cause the degradation of the signal-to-noise ratio (SNR).
It may be critical especially for tracks with large incident angles, which have short pass lengths
L (= strip-pitch/ sin θ where θ is the incident angle). To assure enough SNR, larger strip pitch
is being considered in the next prototype.
Table 2.9: Speciﬁcation of the ﬁrst prototype of the TFP-DSSD sensor
Size
Active area
Thickness
Number of P-strips
Number of N-strips
Pitch b/w P-strips
Pitch b/w N-strips
Floating strip
Full depletion voltage

2.7.2

Value
52.6 mm × 59.0 mm
51.2 mm × 57.6 mm
140 µm
1024
768
50 µm
75 µm
No
< 15 V

Front-end readout electronics: SNAP128

New front-end readout electronics for the TFP-DSSD is also under development to meet therequirements for the TFP-SVD. It is named “SNAP128”. SNAP128, developed in 180 nm
CMOS technology, has 128 input channels and digitizes the analog signals internally. The
development is being done by the electrical system group in KEK, based on the SliT128
readout ASIC for KEK g-2 experiment [25].
The internal structure of one channel is shown in Fig. 2.25. The diagram consists of theanalog part and the digital part. In the analog part, similarly to APV25, an input analog signal
is ampliﬁed and shaped at the CSA (Charge Sensitive Ampliﬁer) and the CR-RC shaper. In thecomparator, the shaper output is compared with a threshold voltage and converted into binary
data. The threshold is given by the external input voltage and internal 8-bit DAC (Digital-toAnalog Converter). The comparator has two selectable polarities so that the chip can read out
the signal from either side of the sensor. In the example shown in Fig. 2.26, the comparator
outputs logic-high when the negative signal is below the threshold. The comparator outputs
are sampled at the frequency of 127 MHz and stored in the ring buﬀer. Each clock that reads
out samples is named “frame”. The depth of the ring buﬀer is 2048, therefore, the maximum
trigger latency is about 16 µs (≈ 2048 × 1/127 MHz). For the suppression of the hit occupancy
and hit rate, the hit time information with the resolution of 7.87 ns (≈ 1/127 MHz) is enoughto distinguish the physics particle hits and the beam background hits.
When the Level-1 trigger signal arrives, the samples at the requested address in the ring30

buﬀer of all the 128 channels are read out and recorded in a 128-channel × 1024-depth FIFO.
After that, the samples of the 128 channels are serialized and output via the line of D FPGA D(Fig. 2.25). Fig. 2.27 shows the structure of the binary output data. In the output data, theheader bits (3 start bits, 1 bit error ﬂag, and 10 bits for readout address) are followed by the
hit information bits in order of frame.
The ﬁrst prototype SNAP128 named “SNAP128A” was produced by SilTerra in Malaysia
and delivered to KEK in April 2021. Its performance was evaluated in detail and the results
will be fed back into the next design [12].

Figure 2.25: Block diagram of one channel in the SNAP128

Figure 2.26: Schematic for binary output [12]. In this example, the comparator is set tonegative polarity and output 1 when the shaper output is below the comparator threshold.

31

Figure 2.27: Structure of the binary output from SNAP128 [12]2.7.3

Self trigger signal output of SNAP128

The TFP-SVD is planed to participate in the Level-1 trigger system as a sub-trigger in order tosuppress the trigger rate under future harsh background environment. It is described in moredetail in Chapter 3. For use in the sub-trigger system, SNAP128 is also designed to output asignal, which is the logic OR of the hit signals from several channels, in a diﬀerent path fromthe D FPGA D (Fig. 2.25) without waiting for the arrival of the Level-1 trigger signal. The
more detailed block diagram of the digital part of SNAP128 is shown in Fig. 2.28. In this ﬁgure,
SNAP SMPs read out the digitized data from the comparator and write them into the ringbuﬀer. For the sub-trigger system, the hit signals are extracted from the SNAP SMPs of all
the 128 channels. The lower limit (SELFTRG LOWER) and upper limit (SELFTRG UPPER)
can be set for the duration of the logic-high of the hit signals. Furthermore, a waiting time
(SELFTFG TIME) can also be set. When at least one channel has a signal with duration
between the lower and upper limits, the output from the D SELFTRG becomes logic-high for
one frame after the waiting time. The clock of the D SELFTRG is synchronized with thesampling rate of the SNAP SMP of 127 MHz.
The ﬁltering process of the output signals using the duration is called “Duration Cut”
in this thesis. An example of the Duration Cut is shown in Fig. 2.29. In simulation, theduration of logic-high of the background signal tends to be longer than that of the physics
signal. Therefore, it is expected to roughly select the physics signals by the Duration Cut.
The optimization of the lower and upper limits, and the waiting time is a next task, however,the contribution of the latency generated by Duration Cut to the trigger latency should betaken into account.

32

Figure 2.28: Block diagram of the digital part in SNAP128.

Figure 2.29: Output timing of D SELFTRG. In this example, the SELFTRG LOWER is set
to be 5 and the SELFTRG UPEER is set to be 10. Since the duration of the logic-high of thechannel 0 is 7, the D SELFTRG becomes logic-high for one clock after waiting the clocks of
the SELFTRG UPPER and SELFTRIG TIME from the rise of the channel 0.

33

Chapter 3
TFP-SVD sub-trigger
The Level-1 trigger is required to suppress its maximum average rate less than 30 kHz. However,at the current luminosity of 4.7 × 1034 cm−2 s−1 in June 2022, which is 1/10 of the target
luminosity of 6.0 × 1035 cm−2 s−1 , the current trigger rate has reached about 8 kHz. Therefore,
the future trigger rate is expected to exceed the limit. The trigger rate projection based on thecurrent situation is discussed in Section 3.1. The main contributor to the background rate isalso described in the section. To suppress the background rate and meet the upper limit of thetrigger rate, we develop the trigger algorithm using the TFP-SVD detector. Section 3.2 explains
the basic strategy of the TFP-SVD trigger, then Section 3.3 determines the requirements for
its performance.

3.1

Projection of the Level-1 trigger rate at the target luminosity

The Level-1 trigger system has several trigger conditions called “trigger bit”s for various physics
purposes. Table 3.1 shows the trigger conditions of “B B̄ CDCTRG”, which is the CDC trigger
bit for B B̄ events, “B B̄ ECLTRG”, which is the ECL trigger bit for B B̄ events, and “Lowmulti CDCTRG”, which is the CDC trigger bit for low-multiplicity events. More than 99 % of
the B B̄ events are triggered by the B B̄ CDCTRG and B B̄ ECLTRG [26]. There are several
other trigger bits besides these three trigger bits in the current Level-1 trigger, however, it isexpected to be diﬃcult to maintain all the trigger bits at the target luminosity. Considering
the purpose of the Belle II experiment, it is important to maintain the trigger bits of the
B B̄ CDCTRG and B B̄ ECLTRG. In addition to this, the Low-multi CDCTRG should be also
maintained for the τ and dark sector physics.
Based on the current trigger rate, the future trigger rate is projected by scaling withthe luminosity. The current trigger rates and projected trigger rates are shown in Table
3.2. The “Total CDCTRG” bit is the integrated trigger bit of the B B̄ CDCTRG and Lowmulti CDCTRG. The sum of the rates of multiple trigger bits overestimates the integrated
trigger rate because the multiple trigger bits can satisfy their trigger conditions for the same
event. Hence, in order to calculate the Total CDCTRG rate, the “exclusive rate” is introduced.
In the calculation of the exclusive rates, trigger bits are prioritized and the raw rates are
distributed to them according to their priority to avoid double-counting. In the calculation of
the Total CDCTRG rate, the B B̄ CDCTRG is prioritized over the Low-multi CDCTRG, andthe trigger of the Low-multi CDCTRG is ignored if the B B̄ CDCTRG issues its trigger for thesame event.
Since the CDC and ECL triggers also correlate somewhat each other, their rate cannot be34

Table 3.1: Trigger conditions of each trigger bit. All trigger bits reject the injection beam
background. The Bhabha event is identiﬁed as an event that meets the conditions showed in
the bottom row, and the Bhabha veto rejects the Bhabha events.
Trigger bit
B B̄ CDCTRG

B B̄ ECLTRG
Low-multi CDCTRG

Trigger condition{CDC 2D track ≥ 3 AND CDC 3D track ≥ 1}
OR
{CDC 2D track ≥ 2 AND CDC 3D track ≥ 1}
AND Angle between CDC tracks ≥ 90◦ AND Bhabha veto
{ECL cluster ≥ 3 AND Bhabha veto at the end-cap}
OR{ECL energy ≥ 1 GeV AND Bhabha veto}
CDC 3D track ≥ 1 AND Momentum ≥ 0.7 GeV/c AND Bhabha veto
{
}
{
}
∑
◦
165◦ < {θCM < 190◦ AND
160
200◦
}
{ < ∆ϕCM < }1
E 0 > 3 GeV AND ECM> 3 GeV{ CM}
01
AND ECM> 4.5 GeV OR ECM> 4.5 GeVAND
Bhabha event∑whereθCM is the sum of the polar angles of two ECL clusters,∆ϕCM is the diﬀerence of the azimuthal angles of two ECL clusters,0
1
and ECMand ECMare the energies of the ECL clusters
in the center-of-mass system.

simply summed. The CDC trigger accounts for the highest trigger rate, therefore, this thesis
focuses on the reduction of the CDC background trigger rate. Therefore, instead of considering
the limit of 30 kHz for the total trigger bits, we consider the individual upper limit of 20 kHz for
the Total CDCTRG by trisecting the total limit and distributing them to those three trigger
bits (B B̄ CDCTRG, Low-multi CDCTRG, and B B̄ ECLTRG). In the Table 3.2, it can beseen that the future rate of the Total CDCTRG is above the upper limit of 20 kHz.
Table 3.2: Projected rates of each trigger bit. The current raw rate and current luminosity
are as of June 18, 2022. In the calculation of the exclusive rates, the priorities are set as
B B̄ CDCTRG > Low-multi CDCTRG. The Total CDCTRG and B B̄ ECLTRG are above
their upper limits of 20 kHz and 10 kHz, respectively.
Trigger bit
Luminosity [cm−2 s−1 ]B B̄ CDCTRG
Low-multi CDCTRG
Total CDCTRG
B B̄ ECLTRG

Current
raw rate
4 × 1034
1.9 kHz
2.6 kHz
–
1.1 kHz

Current
exclusive rate
4 × 1034
1.9 kHz
1.7 kHz3.6 kHz
1.1 kHz

Futureexclusive rate
6 × 1035
28.7 kHz
25.3 kHz
54.0 kHz17.1 kHzAs a breakdown of each trigger rate, the ratio of physics rate and background rate is
assumed to be the ratio of events selected and not selected by the HLT. Based on the data
in June 2022, the physics rates and background rates for each trigger bit are calculated. The
results are shown in Table 3.3. To meet upper limit while maintaining the physics trigger rate,35

the Total CDCTRG must reduce its background rate by about 83 %.
Table 3.3: Breakdown of the future exclusive rates of each trigger bit at L = 6.0×1035 cm−2 s−1
Trigger bit
B B̄ CDCTRG
Low-multi CDCTRG
Total CDCTRG
B B̄ ECL

Total rate [kHz]
28.7
25.3
54.0
17.1

Physics rate [kHz]7.0(24 %)5.7(23 %)12.7(24 %)9.6(56 %)Background rate [kHz]21.7(76 %)19.6(78 %)41.3(76 %)7.5(44 %)As discussed in Section 2.4.2, one of the main contributor to the background rate is considered to be Oﬀ-IP particles. They are expected to be rejected by selecting the production
z-positions of the particles. The current condition of the CDC trigger to select the particle
production position is |z| < 15 cm to assure enough trigger eﬃciency for the physics events ofinterest. Figure 3.1 shows the relation between the production z-positions of the particles inthe 3D track trigger reconstruction and in the oﬄine reconstruction. It can be seen that many
production positions determined to have large |z| in the oﬄine reconstruction are determined
to be close to the origin in the CDC trigger. Thus, Oﬀ-IP particles with |z| > 15 cm are
expected to remain even after the selection by the CDC trigger.

Figure 3.1: Relation between z production positions in 3D track trigger reconstruction andthose in the oﬄine reconstruction [27]. In this study, the data in March 2021 was used. The
plots indicated by the red circle are the particles, which are determined to be Oﬀ-IP particles
in the oﬄine reconstruction and to be particles near the IP in the CDC trigger.
The beam background and electrical noise in the readout electronics increase the hit occupancy due to the background noise hits. Even if there is no On-IP particle, the noise hits36can accidentally satisfy the trigger condition of the CDC trigger bit, resulting in fake triggers.
Another main contributor to the background rate is considered to be the fake triggers.

3.2

Basic strategy of the TFP-SVD trigger

The TFP-SVD trigger is a track trigger which selects only tracks from the IP. It reconstructs
particle trajectories using the hit signals from the D SELFTRG of the SNAP128 chips. Whilethe concrete design of the TFP-SVD is not determined yet, the performance evaluation of the
new trigger system using simulation software and development of the trigger algorithm require
to assume some reasonable detector conﬁguration. Thus, the geometry of the TFP-SVD forthe studies is developed based on the current SVD geometry as described in Section 3.2.1.
The TFP-SVD trigger is planned to be used with the CDC trigger to help it to reject beam
background particles which cannot be rejected by the CDC trigger alone.
3.2.1

Assumptions on the TFP-SVD detector design for the studies in this thesis

TFP-DSSD sensor
All the current sensors (small rectangular, large rectangular, and trapezoidal) are replacedwith the TFP-DSSD sensors. The size of the sensor active area is assumed to be the same as
the current DSSD sensor shown in Table 2.2. The number of P-strips and the pitch between
them are also assumed to be the same as the current sensor. The pitch of N-strips is changed
to 80 µm, just by dividing the N-strip pitch of the current DSSD sensor by two for the layer-3
sensors and by three for the layer-4, 5, and 6 sensors. Therefore, one TFP-DSSD sensor has
two or three times larger number of N-strips than the current DSSD sensor. No ﬂoating strips
are placed and all the strips are read out by SNAP128. The assumption on the TFP-DSSD
sensor geometry is summarized in Table 3.4. The target of the TFP-SVD sensor geometry has
the thickness of 140 µm and the strip pitches of 75 µm for P-strips and 85 µm for N-strips. The
assumed sensor thickness and strip pitches in Table 3.4 are almost consistent with the target
value, and the realistic performance can be evaluated using the assumption.
Table 3.4: Assumption on the TFP-DSSD sensor geometry for the studies in this thesis
Thickness
Number of P-strips
Number of N-strips
Pitch b/w P-strips
Pitch b/w N-strips
Floating strip

Current DSSD
300 – 320 µm
768
512 – 768
50 – 75 µm
160 – 240 µm
Yes

TFP-DSSD
140 µm768
1536
50 – 75 µm
80 µm
No

The sensor locations are assumed to be the same as the locations of the current SVD
sensors. Thus, the assumed geometry of the TFP-SVD consists of four cylindrical layers
located at 39 mm, 80 mm, 104 mm, and 135 mm from the z-axis, respectively. There are 7
ladders in layer 3, 10 ladders in layer 4, 12 ladders in layer 5, and 16 ladders in layer 6. Fig. 3.2
shows the TFP-SVD geometry formed by strips of the TFP-DSSD sensors. In the TFP-SVD,
IDs are assigned to each ladder and each sensor as shown in Fig. 3.3.

37

y [cm]

15
10
5
0
-5
-10
-15
15
10

-10

0z

[cm] 10

20

30

-5
-10
40 -15

0

5

cm
]

-20

x[

-30

Figure 3.2: Geometry of the TFP-SVD formed by strips of the TFP-DSSD sensors. Theblue(red) line segments represent the N(P)-strips.
SNAP128
For the TFP-SVD trigger, the binary output from the D SELFTRG at 127 MHz is used. Since
the tracking performance deteriorates if the hit occupancy exceeds O(1 %), it is desirable toaim for an hit occupancy of O(0.1 %) or less [9]. It is known that if the SNR (signal-to-noise
ratio) is set to more than 4, the hit occupancy due to the electrical noise becomes less thanO(0.1 %) [28]. Hence, the threshold of SNR > 4 is applied to the comparator in SNAP128,
which is the digitization processing described in Section 2.7.2.
The output signal from the D SELFTRG of SNAP128 is the logic OR of the hit signals in
multiple strips. The set of the multiple strips is named “cell” in this thesis. The cell of P-strips
is called P-cell, and that of N-strips is called N-cell. If the number of OR’ed strips containedin each cell is n, the cell is called n-cell. In this study, two types of n-cells are examined:
128-cell and 64-cell. When at least one strip of the cell is ﬁred, the cell is also ﬁred, however, itcannot determine which strip is ﬁred. Therefore, the position resolution depends on the widthof the cell. Considering the strip pitches (50–80 µm), the cell width is about 0.6 – 1.0 cm for128-cell and 0.3 – 0.5 cm for 64-cell. The schematic of the cell is described in Fig. 3.4, and the
3-dimensional graphic images of the 128-P-cell and 128-N-cell are displayed in Fig. 3.5.
In the overall geometry, the TFP-SVD has 132,096 P-strips and 264,192 N-strips. Therefore,
in the case of 128-cell, it has 1032 (= 132, 096/128) P-cells and 2064 (= 264, 192/128) N-cells.

38

Figure 3.3: TFP-SVD geometry projected on the x−y plane (top) and the z −x plane (bottom)
Similarly, in the case of 64-cells, it has 2064 P-cells and 4128 N-cells. The assumptions on
SNAP128 and the cells are shown in Table 3.5.

3.2.2

Matching with the CDC sub-trigger

In order to help the CDC trigger to ﬁnd On-IP particles correctly, the TFP-SVD trigger tries to
ﬁnd On-IP particles at the same event. These sub-trigger results are sent to the GRL (Global
Reconstruction Logic) to take the track matching. If either one sub-trigger cannot ﬁnd any
On-IP particles, the GRL assumes that there is no On-IP particle in the event and the GDL(Global Decision Logic) does not issue the Level-1 trigger signal for that event. By taking
the logic AND of the CDC and TFP-SVD trigger results in this way, the background CDC
39

Figure 3.4: Schematic of the cell concept in the case of the N-side of the sensor

Figure 3.5: Graphical images of the 128-cells. The left(Right) shows a P(N)-cell in sensor S6.3of ladder L6.7.
sub-triggers can be suppressed.
SNAP128 outputs hit signals at the frequency of 127 MHz. At every frame of the clock
frequency (7.87 ns), the TFP-SVD trigger provides the trigger decision results. On the other
hand, due to the large variation of the electron drift time in the CDC, the time resolution of the
CDC trigger is larger than that of the TFP-SVD trigger. Fig. 3.6 shows the time distributionof the issued CDC trigger at the Bhabha event data. In this plots, the time origin is set tocollision time measured by the TOP that has very precise time resolution (TOP T0). The
RMS and 3-sigma interval of the time distribution is about 10 ns and 60 ns, respectively. Thus,
the CDC trigger signal can be expected to come within 60 ns with a high conﬁdence level. In
that time window, the TFP-SVD makes about 8 trigger decisions. In order to ﬁnd the same40

Table 3.5: Assumption on SNAP128 and the cells
Output rate
Zero suppression
Number of strips to be taken OR
Number of P-cells
Number of N-cells
Width of P-cell
Width of N-cell

128-cell
127 MHz
SNR > 4
128
1032
2064
0.64 – 0.96 cm
1.02 cm64-cell
127 MHz
SNR > 4
64
2064
4128
0.32 – 0.48 cm
0.51 cm

particle in both detectors, the logic OR of the trigger results in 8 frames of the TFP-SVD
trigger must be used. A schematic of the trigger matching structure is shown in Fig. 3.7.

Figure 3.6: Time distribution of the CDC trigger [29]. RMS of the distribution is 10.3 ns. The
time origin is set to collision time measured by the TOP.

41

Figure 3.7: Schematic of matching the CDC trigger and TFP-SVD trigger by taking the logic
AND of them

3.3

Requirements for TFP-SVD trigger

The performance of the TFP-SVD trigger is characterized by the three criteria: the trigger
eﬃciency, discrimination power for On-IP particles, and fake trigger probability.
Trigger eﬃciency The TFP-SVD trigger should issue sub-trigger if the event involves the
On-IP particles. The trigger eﬃciency is deﬁned as the probability of ﬁnding the events with
the On-IP particles:
Trigger eﬃciency =# triggered events involving the On-IP particles# events involving the On-IP particles(3.1)

where # events means the number of events. The current trigger eﬃciency of B B̄ CDCTRG
is about 95 %. To require the same eﬃciency level as the CDC trigger bit, the target trigger
eﬃciency of the TFP-SVD trigger is set to be 95 % or more.
Discrimination power for On-IP particles On the other hand, in order to discriminate
the Oﬀ-IP particles, the ﬁnding probability of the events with the Oﬀ-IP particles should bedecreased to zero. The z position range where the trigger probability is above 1 % is deﬁned asa “particle selection area”, which represents the z position resolution of the TFP-SVD trigger.
As mentioned in Section 3.1, the current CDC trigger requires |z| < 15 cm for the particle
production position. To improve the resolution, the target of the particle selection area of the
TFP-SVD trigger is set to be |z| < 5 cm, which is 1/3 of the CDC trigger condition.
Fake trigger probability In the TFP-SVD trigger, the eﬀect of the fake trigger, in which
the ﬁred cells due to the noise hits can accidentally satisfy the trigger condition of the TFPSVD trigger, is also important. The fake trigger probability is deﬁned as# triggered events in which only background particles are produced.
# events in which only background particles are produced(3.2)
As long as beam background exists, the TFP-SVD trigger always issues a fake trigger
with this probability per frame. Assuming that the TFP-SVD and CDC triggers due tothe background noise are independent, the CDC background trigger rate is reduced to the
Fake trigger probability =42percentage of the fake trigger probability. As explained above, the logic OR of the TFP-SVD
triggers in any continuous 8 frames is used to take the matching with the CDC trigger. In
order to reduce the CDC background trigger rate by a factor of 10, our target on the fake
trigger probability is set to be less than 10 % for the time window of the 8 frames. In this case,the background trigger rate is reduced by 90 % and, as shown in Table 3.6, the CDC trigger
rate can meet the upper limit of 20 kHz.

Table 3.6: Projected exclusive rates of the CDC trigger bits at the target luminosity of L =6.0 × 1035 cm−2 s−1 when taking the matching with the TFP-SVD trigger. The rates when
taking the matching are calculated by adding the physics rates to background rates reduced
to the target fake trigger probability of 10 %.
Trigger bit
B B̄ CDCTRG

Low-multi CDCTRG

Physics rate
Background rate
Total rate
Physics rate
Background rate
Total rate

Total CDCTRG

No matching [kHz]
7.0
21.7
28.7
5.7
19.6
25.3
54.0

Matching [kHz]
7.0
2.2
9.2
5.7
2.0
7.7
16.8

Our target values on each evaluation index are summarized in Table 3.7.
Table 3.7: Targets on each evaluation index
Index
Trigger eﬃciency
Particle selection area
Fake trigger probability (8 frames)

43

Target> 95 %|z| < 5 cm
< 10 %

Chapter 4
Development of TFP-SVD trigger algorithm
When a particle passes through the TFP-DSSD sensor, cells(strips) on which the particle
passes are ﬁred. Thus, the particle trajectory can be represented by a combination of the ﬁred
cells(strips) in the four layers (layer 3 to layer 6), which is called a “cell(strip) pattern”. On-IP
particles have diﬀerent cell patterns from Oﬀ-IP particles. Ignoring the track bending due tothe magnetic ﬁeld, in the case of On-IP particles, the ﬁred cells in the four layers and the IPshould be connected with a straight line. In practical, because of the magnetic ﬁeld, they areconnected with a curved line. On the other hand, it is not necessarily for the case of Oﬀ-IP
particles. All the possible cell patterns created by On-IP particles are collected by simulation,and they are listed up in a table, called a “cell pattern table”. By comparing ﬁred cells with thecell pattern table, it is determined if the pattern of the ﬁred cells is caused by the On-IP track
or not, then the decision is sent to the GRL. In this thesis, hit signals and ﬁred strips(cells)
under the actual accelerator operation are called “online” hit signals and “online” strips(cells)
to distinguish them from the hit signals or strips(cells) obtained in the simulation process togenerate the cell pattern tables or test samples (Chapter 5).
The main purpose of the TFP-SVD trigger is to identify the z position of the particle
production. The z positions of the particle hits can be obtained by the N-cells. However, if
only the N-cells are used, many fake tracks may be reconstructed by hits scattered randomly
in the ϕ direction. The P-cells, which provide the ϕ positions of the particle hits, can reduce
the possibility of the reconstruction of fake tracks. Therefore, we can consider two diﬀerent
trigger algorithms: the “N-algorithm”, which uses only the N-cells, and the “PN-algorithm”
which uses both the P-cells and N-cells. The number of cell patterns using only N-cells is lessthan that using both P-cells and N-cells. Therefore, compared to the PN-algorithm, the Nalgorithm is expected to save resources when implemented as ﬁrmware due to the smaller sizeof the cell pattern table. At the same time, we can also consider more two diﬀerent algorithms
using 128-cells or 64-cells. Eventually, there are four possible trigger algorithms as shown in
Table 4.1. In this thesis, we study three of the four trigger algorithms except for the N-64
algorithm.
Table 4.1: Possible trigger algorithms. In this thesis, the N-64 algorithm is skipped.
128-cells
64-cells

Only N-cells
N-128 algorithm(N-64 algorithm)

44

Both P-cells and N-cells
PN-128 algorithm
PN-64 algorithm

The purpose of this chapter is to elaborate each trigger algorithm. Section 4.1 describes
how to generate the cell pattern tables. The trigger algorithms using their cell pattern tables
are explained in Section 4.2. When comparing online hit signals with the cell pattern table,
the timing discrepancies in online hit signals of diﬀerent layers should be considered. Section
4.3 shows the operation to compensate the timing discrepancies.

4.1

Generation of the cell pattern tables

The way to represent the particle trajectory using cells depends on the trigger algorithm. Thissection describes how to generate the cell pattern table. In order to generate the pattern
table, the Monte Carlo (MC) simulation is performed on the basf2 (Belle II Analysis Software
Framework) software [30]. In this study, the simulation to collect On-IP particle cell patterns
is performed in the following three steps for each event. First, a particle gun generates one
charged particle at the IP. Second, Geant4 [31] simulates the behavior of the particle under themagnetic ﬁeld and the interaction between the particle and the TFP-DSSD sensor. Third, thedetector response is emulated from energy depositions in the sensitive sensor volume and hit
signals of each strips are generated as a binary data. The array of the strip hits are converted
to the array of the cell hits by taking the logic OR to the strip hits in the 128-cell groups or
64-cell groups.
In order to collect all the possible cell patterns of On-IP particle tracks, a large enoughnumber of events are simulated. For the N-128 and PN-128 algorithms, one million events are
simulated. Changing from the 128-cells to 64-cells, the number of cell patterns increases by
a factor of 10. Hence, for the PN-64 algorithm, twenty million events are simulated. In each
event, the parameters of momentum and its direction (θ and ϕ) are randomly determined from
uniform distributions within given ranges. The parameters are shown in Table 4.2.
Table 4.2: Parameters of the particle gun for creating the pattern tables. In each event,
momentum, polar angle, and azimuthal angle are extracted from uniform distributions within
the given ranges.
Parameters
Particle
Production point x
Production point y
Production point z
Range of momentum p
Range of polar angle θRange of azimuthal angle ϕ

Value
µ±
x = 0 cmy = 0 cmz = 0 cm
0.2 GeV/c ≤ p ≤ 3.0 GeV/c0◦ ≤ θ < 180◦0◦ ≤ ϕ < 360◦
(128-cell) 1,000,000(64-cell) 20,000,000

Number of events

After the MC simulation, the following operations extracting the hit patterns are performedon the hit data to construct the cell pattern table.
Extraction of one-way track After ﬂying out the TFP-SVD detector volume, low-momentum
tracks with small radius circular trajectories can go into the detector volume again. The re45

turned track also creates the ﬁred cells. However, they are not necessary for the pattern table.
In this thesis, the hits created at time t ≤ T /2 where T is the period of circular motion are
called “hits on the way path”, while the hits at time t > T /2 are called “hits on the way backpath”. The MC simulation provides T and each hit time (t). Using those information, only
hits on the way path are extracted (Fig. 4.1).
Extraction of cell patterns from hit cluster In 95 % events, one particle leaves hits incontinuous multiple strips on one side of the sensor. The group of the continuous hits is calleda cluster. The cluster shape can change even if the particles are generated with the exactly
same kinematics due to the variation of the electrical noise in the readout electronics. In order
to cover the possible pattern of the hit cluster, the cell patterns are reconstructed by repeatedly
extracting one hit from each layer as shown in Fig. 4.1. Therefore, multiple cell patterns are
obtained from one hit cluster, each of which is a subset of the original hit cluster.
Deduplication Since each cell has a width of about 0.3 – 1.0 cm, some particle tracks areconverted into the same cell pattern. Thus, the duplicate patterns are deleted. In this step,
the initial 1,000,000 or 20,000,000 patterns are signiﬁcantly reduced. The eventual numbers ofpatterns are described in Section 4.2.

Figure 4.1: Operations of the extraction of hits on the way path and extraction of cell patterns
from hit cluster

46

4.2

Trigger algorithm

Trigger algorithms are developed in the software at ﬁrst to evaluate the performance using theMC simulation. This section describes details of the trigger algorithms and explains how thealgorithms are implemented in software.
4.2.1

N-128 algorithm

The N-128 algorithm introduces a new concept of N-ring-cell, which is a set of N-cells having
the same z-coordinate aligned on the circumference of each layer. The graphical image is shownin Fig. 4.2. Layer 3, 4, 5, and 6 have 24, 36, 48, and 60 ring-cells respectively, and there are 168
ring-cells in total. These ring-cells have unique IDs ranging from 0 to 167. In this algorithm,
each item in the cell pattern table is represented by a combination of these ring-cell IDs. Sincea single particle basically makes one hit cell on the N-side of the sensor in each layer while
ﬂying from layer 3 to layer 6, its track can be basically represented by a combination of fourring-cell IDs as shown in Fig. 4.3.

Figure 4.2: Graphical image of an N-ring-cell. As an example, the ring-cell with ID 137 onlayer 6 is displayed.
When executing the algorithm in software, a combination of N-ring-cells is encoded into a
bit string of 168-width: the ring-cell with ID 0 corresponds to the beginning of the bit string,
the ring-cell with ID 1 corresponds to the second bit of the bit string, and so on. Initially,
all bits are set to ‘0’, then, when the ring-cell with ID n is ﬁred, the n-th bit changes to ‘1’.
Therefore, each particle track is typically represented by a bit string of 168-width with four ‘1’
bits corresponding to layer 3, 4, 5, and 6 (Fig. 4.3).
The concern about using only the N-ring-cells is they have no ϕ information at all. In the
representation using only the N-ring-cells, many ﬁred cell patterns due to beam background or
47

Figure 4.3: An example of ﬁred ring-cells due to a particle passing through sensors. The
combination of four ﬁred ring-cells are encoded into a bit string of 168-width.
electrical noise can be indistinguishable from On-IP particle cell patterns. It leads a high fake
trigger rate. The 2D track and 3D track of the CDC sub-trigger contain the information of the
trajectory direction in ϕ. To suppress the fake trigger at the matching of the TFP-SVD and
CDC triggers, the TFP-SVD trigger can also send the track ϕ information and the matchingof the two triggers can be taken only if the ϕ of the tracks are consistent. For this purpose,the cell patterns are grouped by the layer-6 ladder containing the ﬁred cell in each pattern.
Each group of the patterns is considered as a small cell pattern table, resulting in 16 small cellpattern tables in total (16 is the number of the layer-6 ladders). When collecting the On-IP
particle track pattern in Section 4.1, the IDs of the inner ladders (layer-3, 4, and 5 ladders)passed through by particles are also collected and compiled as the “inner ladder list” for eachladder of layer 6. Fig. 4.4 shows the case of making the cell pattern table of ladder L6.1.
In this example, particles which are generated at the IP and reach ladder L6.1 possibly passthrough the inner ladders of L3.1, L3.2, L4.1, L4.10, L5.1, L5.2, and L5.12. Thus, the innerladder list for ladder L6.1 holds those ladder IDs. Each of these ladders in the inner ladder list
is classiﬁed as “in-section” ladder, otherwise, the ladder is classiﬁed as “out-section” ladder.
Before comparing the online hits with the cell pattern table, the hits of the out-section ladders
are truncated and only hits of the in-section ladders are converted into a bit string (Fig. 4.5).
After that, the comparison between online hits and the cell pattern table is executed. The
same procedure is repeated for each ladder from L6.1 to L6.16 while reclassifying the innerladders as in-section or out-section.
48

In this trigger algorithm, each of the 16 cell pattern tables contains approximately 500
patterns. Since each cell pattern is represented by a bit string of 168-width, the size of eachtable is roughly 10 kB (≈ 168 bits × 500). It is a small enough data size to be implemented in
the FPGA used in Chapter 7.

Figure 4.4: Track patterns that can reach the ladder L6.1 in the MC simulation

Figure 4.5: Masking the online hits of the out-section ladders in the case of ladder L6.1

49

Trigger condition
In practical, apart from the hit cells created by the On-IP particles, there are also hit cells
randomly due to the beam background and electrical noise. To deal with the additional random
hits, the comparison between the online hit pattern and each pattern in the cell pattern table
is to be made only on the bits where the pattern in the table has a ﬁred cell ‘1’. An example
is shown in Fig. 4.6.

Figure 4.6: Comparison between online hits and a pattern of the table. In this example, thetrigger condition is met because the bit string of online hit pattern has four ‘1’s in the sameplace as the pattern in the table.
This comparison is performed as follows in software so that even if there are several extra‘1’s in online hit bit string, they are ignored. It is called “trigger condition”.
if ( bitsonline AND bitstable) == bitstablethenjj
sub-trigger = 1

(4.1)

else
sub-trigger = 0

where bitsonline is the bit string of online hits and bitstable
is the bit string of j-th pattern of thejcell pattern table. By taking the logic AND of the online hits and the table before performing
the equivalence operation (==), we can ignore the ‘1’s except for the positions in which thepattern of the table has ‘1’s.
In the algorithm, comparison between online hits and the pattern tables starts with ladderL6.1 after masking the hits of out-section ladder for ladder L6.1. If trigger condition is met for
at least one pattern of the table, the sub-trigger signal is set to ‘1’ and the trigger algorithm isstopped, otherwise, it moves to comparison in ladder L6.2 after re-truncating the online hits.
If no patterns of the table met the trigger condition in the loop, the event is considered to haveno On-IP particles and the sub-trigger signal is set to ‘0’. The ﬂowchart of this algorithm is
described in Fig. 4.7.
Relaxed trigger condition
Fig. 4.8 shows the TFP-SVD geometry projected onto the z − x plane. In this ﬁgure, sensors
placed perpendicularly to the z − x plane (x > 0) are colored alternately yellow and orange.
The blue circles indicate the sensor insensitive areas at the edges of the sensors. If a particle
passes through these insensitive areas, no hit signals are recorded. The relation between thesensor hit eﬃciency, which is deﬁned as follows, and θ is shown in Fig. 4.9.
Sensor hit eﬃciency =# events where there is at least one hit on the layer# total events
50

(4.2)

Figure 4.7: Flowchart of the N-128 trigger algorithm
In fact, we can see that hit eﬃciency drops signiﬁcantly in the θ regions where the sensor
insensitive area is located. The θ regions where insensitive area exists are listed in Table 4.3.
The above trigger condition requires perfect matching using all the four layers. Thus, if
online hits of all four layers cannot be obtained, the trigger condition cannot be met, resulting
in a low trigger eﬃciency. For this reason, we consider other two trigger conditions: “3/4-allθmatching” and “3/4-selectedθ matching”. Hereafter, the above trigger condition is named“Full matching”.

51

Sensor efficiency [%]Figure 4.8: TFP-SVD geometry projected onto the z − x plane. Sensor insensitive areas aremarked with blue circles.

110
100
90
80
70
60
50
40
30
20
10
0

Sensor efficiency vs (pt 0.5GeV/c)

20

layer 3layer 4layer 5layer 6
all layers
30 40 50

60

70

80

90

[° ]

100 110 120 130 140 150 all

Figure 4.9: Relation between sensor hit eﬃciency and polar angle θ
3/4-allθ matching Aiming for a high trigger eﬃciency, the 3/4-allθ matching condition
requires matching between online hits and the pattern table using any three out of the four
layers. In the comparison using hits of only the layer 4, 5, and 6, online hits and the table canbe matched even if the layer 3 has no hits. In this trigger condition, the comparisons without

Table 4.3: Regions of θ where the sensor insensitive areas exist
Layer 3Layer 4Layer 5Layer 6

Regions of θ50◦ ≤ θ < 60◦40◦ ≤ θ < 50◦ , 110◦ ≤ θ < 120◦◦30 ≤ θ < 40◦ , 60◦ ≤ θ < 70◦ , 120◦ ≤ θ < 130◦20◦ ≤ θ < 30◦ , 40◦ ≤ θ < 50◦ , 90◦ ≤ θ < 100◦ , 130◦ ≤ θ < 140◦52

the layer 3, 4, 5, or 6 are performed independently. If the trigger condition is met in the atleast one comparison, the sub-trigger is issued. The trigger condition of the 3/4-allθ matchingis represented by{}if( bits wo3online AND bits wo3table) == bits wo3table
j
j
{
}
OR
( bits wo4online AND bits wo4table) == bits wo4tablejj{}) == bits wo5tableOR( bits wo5online AND bits wo5table
j
j
}
{
(4.3)
table
)
==
bits
wo6
then
OR
( bits wo6online AND bits wo6tablejj
sub-trigger = 1
else
sub-trigger = 0
where bits won is the bit string except of the layer n (n = 3, 4, 5, 6).
3/4-selectedθ matching While the 3/4-allθ matching condition is expected to increase thetrigger eﬃciency, it is also expected to increase the fake trigger probability with its relaxed
condition. Another strategy is to limit the θ regions to which the matching condition using
three layers is applied. From Fig. 4.9, we can select the θ regions where the sensor hit eﬃciency
is lower than 90 % as shown in Table 4.4. The θ regions listed in this table is named “loweﬃciency θ region”. We can estimate the particle ejection angle θ by the position of the ﬁred
cells of layer 6 or 5. In the 3/4-selectedθ matching condition, the matching condition using
three layers except for the corresponding layer is applied if the particle ejection angle θ is in
the low-eﬃciency θ region, otherwise, the Eq. (4.1) is applied. The trigger condition of the
3/4-selectedθ matching is represented as follows.
if θ ∈ Low-eﬃciency θ region of layer n then) == bits wontablethenif ( bits wononline AND bits wontablejj
sub-trigger = 1
(4.4)

else
sub-trigger = 0
else
Full matching condition Eq. (4.1)

4.2.2

PN-128 and PN-64 algorithms

The PN-128 and PN-64 algorithms use both the P-cells and N-cells. The number of cells in eachlayer is shown in Table 4.5. These 128(64)-cells are assigned unique IDs from 0 to 3096(6192).
Since a single particle basically makes one hit on each side of the sensor of each layer while
ﬂying from layer 3 to layer 6, its track can be basically represented by a combination of eightcell IDs: four N-cell IDs and four P-cell IDs. Fig. 4.10 shows the case of the PN-128 algorithm.
53

Table 4.4: Low-eﬃciency θ region. In these regions, the sensor hit eﬃciency is lower than 90 %.
In this table, θ regions are chosen at 5◦ intervals
Layer 3Layer 4Layer 5Layer 6

Regions of θ50◦ ≤ θ < 55◦
40◦ ≤ θ < 45◦ , 110◦ ≤ θ < 120◦65◦ ≤ θ < 70◦ , 125◦ ≤ θ < 130◦45◦ ≤ θ < 50◦ , 90◦ ≤ θ < 95◦

As with the N-128 algorithm, the combination of the P-cells and N-cells is encoded into a bit
string of 3096(6192)-width in the case of the PN-128(64) algorithm (Fig. 4.10).
In the case of the PN-128 and PN-64 algorithms, all track patterns for all ladders oflayer 6 are included in one table because there is no need to distinguish ladders to obtainthe ϕ information. After the processing for generating the cell pattern tables, described in
Section 4.1, 88,553 patterns remain for the PN-128 algorithm and 793,764 patterns remain for
the PN-64 algorithm. For the PN-128 algorithm, since each pattern is represented by a bit
string of 3096-width, the table size is about 33 MB (≈ 3096 bits × 88, 553). For the PN-64
algorithm, since each pattern is represented by a bit string of 6192-width, the table size isabout 586 MB. These sizes are much larger than that of the N-128 algorithm. Their feasibilityof the implementation as ﬁrmware are discussed in Chapter 7.
Table 4.5: Number of cells in each layer
Layer 3 P-cell
Layer 3 N-cell
Layer 4 P-cell
Layer 4 N-cell
Layer 5 P-cell
Layer 5 N-cell
Layer 6 P-cell
Layer 6 N-cell
Total

128-cell
84
168
180
360
288
576
480
960
3096

64-cell
168
336
360
720
576
1152
960
1920
6192

As with the N-128 algorithm, the trigger conditions of the Full matching, 3/4-allθ matching, and 3/4-selectedθ matching are applied by these two algorithms. The ﬂowchart of thesealgorithms is represented in Fig. 4.11. The diﬀerence between N-algorithm and PN-algorithm
in the ﬂowchart is that the PN-algorithm has all patterns in one table, therefore, there is noloop for the ladder in layer 6.

54

Figure 4.10: Fired cells due to a particle passing through sensors in the case of the PN-128
algorithm. Red(Blue) rectangles represent ﬁred P(N)-cells. The combination of eight ﬁred
cells are encoded into a bit string of 3096-width.

55

Figure 4.11: Flowchart of the PN-128 and -64 trigger algorithm

56

4.3

Latching of online hit signal

Since the sampling rate of SNAP128 is 127 MHz, the time window for one frame is about
7.87 ns. The typical momentum of particles produced at SuperKEKB (center-of-mass energy√s = 10.58 GeV) and recorded by the Belle II detector ranges from several ten MeV/c toseveral thousand MeV/c. With such momentum, the time for a particle to pass through the
TFP-SVD volume from the IP to the layer 6 is estimated to be about 1 − 5 ns, which is within
the time window of one frame of SNAP128. Therefore, basically, it is expected that cells ﬁred
in the same frame can be attributed to the same particle, while cells ﬁred at diﬀerent frames
can be attributed to diﬀerent particles.
However, we must consider that physics events do not occur in sync with the SNAP128
clock. In addition, the time it takes for the voltage of the strip signal to rise and exceed thecomparator threshold is not constant. Therefore, all the cells are not always ﬁred in the same
frame by a single particle.
Furthermore, this ﬂuctuation is expected to be more pronounced between P-cells and N-cells
due to other mechanism. The collected charges on the P-strip are carried by holes, while thoseon the N-strips are carried by electrons. When a particle passes through a sensor, electrons andholes are produced simultaneously and begin to drift in the sensor bulk under the combined
eﬀect of the electric and magnetic ﬁelds. However, the eﬀective masses of electrons and holes
are diﬀerent in silicon crystals, resulting in a systematic diﬀerences in their drift times [23]. In
the MC simulation, the drift velocity of carriers are calculated byv(E, B) =µE + µµH E × B + µµ2H B(E · B)
1 + µ2H |B|2

(4.5)

where E is electric ﬁeld, B is magnetic ﬁeld, µ is carrier mobility, µH = µ · rH is Hall mobility
and rH is Hall factor [9]. The main factor that creates the diﬀerence between electron andhole velocities is the mobility. The mean values of mobility is 1225.8 cm2 /V · s for electronand 410.1 cm2 /V · s for hole in the MC simulation. The production of a signal in a strip issimulated by a simpliﬁed model, which does not take into account the eﬀect of induced signal
on the strips due to charge moving in the sensor (Ramo-Shockley theorem [32, 33]), and it
occurs when the carriers are collected on the strip. In this model, the signal production time
is calculated by
1 d
(4.6)
t= ·
2 vz
where d is the distance from the location where the carrier is generated to the sensor surface
and vz is the carrier velocity in the z direction. Fig. 4.12 shows histograms of the signal
production times due to electrons or holes. This histogram suggests that the signal production
by the holes tends to take longer time of a few nanoseconds than that by the electrons. This
fact means that the ﬁred timing of the P-cells tends to be later than that of N-cells.
In order to compensate for these timing discrepancies among the cells, the online hit signals
from SNAP128 must be latched for several frames. The number of frames to be latched is called“latch frame number” in this thesis. In the simulation, the latch frame numbers are optimised
to be 1 for the N-algorithm and 2 for the PN-algorithm. Fig. 4.13 shows an event where asingle particle passes through from layer 3 to layer 6. In this example, the bits of the N-cellsof all layers rise in frame 0, while the bits of the P-cells of layer 3, 5 and 6 rise one frame later
due to the systematic discrepancy between N-cell and P-cell. Furthermore, the bit of the P-cell57

Electron
Hole

50
40

Electron: mean=1.5, std=0.9
Hole : mean=3.2, std=2.5

30
20
10
0
0.0

1.0

2.0

3.0 4.0 5.0 6.0 7.0
Signal production time [ns]

8.0

9.0

Figure 4.12: Histogram of signal production time. Blue(Orange) represents signal production
time due to the electrons(holes).
of layer 4 rises one more frame later due to statistical ﬂuctuation. By latching each signal for
two frames, all signals of four layers and both sensor sides are obtained in frame 2.
The operation of latching online hit signal is expected to lead a high fake trigger rate. In
real situation, multiple strips are ﬁred and form a cluster when a particle passes through asensor. Fig. 4.14 shows the time distributions of signal production in the strips of the current
SVD. It suggests that the strip at the edge of a cluster has a hit time signiﬁcantly smaller thanthat of the central strip [9]. This eﬀect may be explained by the Ramo-Shockley eﬀect, which
is not taken into account in the MC simulation. From this fact, the cells in the TFP-SVD
may also be ﬁred much faster than in the MC simulation due to the same eﬀect and the time
discrepancies among cells may not be as large as observed in the simulation. The optimal latch
frame number should be studied using the actual TFP-DSSD sensor in the future.

58

Figure 4.13: The operation to latch the online hit signals for two frames. Black rectangle
represents original rising edge of bit. Orange rectangle represents extended bits.

Figure 4.14: Time distributions of the SVD strips belonging to layer 3 clusters of size 3
for perpendicular tracks in di-muon events reconstructed in several runs of 2019 data. The
time distribution of central strip is shown in red, while the overlaid time distributions of theleft(right) edges strips is shown green(blue) [9]59Chapter 5Generation of test samples
In order to evaluate the performance of the TFP-SVD trigger, test samples that simulate
the online hits assuming the following three types of situations are generated. By applying
the trigger algorithms developed in Section 4.2 to these test samples, the evaluation indicesdiscussed in Section 3.3 are investigated.
test case 1

On-IP particle study

test case 2

Oﬀ-IP particle study

test case 3

Beam background study

As described in Section 4.1, the MC simulations to generate test samples are performed.
The simulated hit signals are sampled for 10 frames in each event. By applying the trigger
algorithm to those hit signals of each frame, ten trigger decisions are obtained per event in
Chapter 6.

5.1

Test case 1: On-IP particle study

For the evaluation of the trigger eﬃciency, test samples that simulate the behavior of the
On-IP particles are generated as shown in Fig. 5.1 (left). 100,000 events are simulated, andone charged particle is generated at the IP in each event. The range of the parameters ofmomentum p and its direction (θ and ϕ) are set for the MC simulation as shown in Table
5.1. In each event, p, θ, and ϕ are randomly determined from uniform distributions within thegiven ranges.

60

Table 5.1: Parameters for the MC simulation of the On-IP particle study. In each event,
momentum, polar angle and azimuthal angle are extracted from uniform distributions within
the given ranges.
Parameters
Particle
Production point x
Production point y
Production point z
Range of momentum p
Range of polar angle θRange of azimuthal angle ϕ
Number of events

Value
µ−
x = 0 cmy = 0 cmz = 0 cm
0.1 GeV/c ≤ p ≤ 3.0 GeV/c0◦ ≤ θ < 180◦0◦ ≤ ϕ < 360◦
100,000

Figure 5.1: Illustration of the MC simulation for the On-IP particle study (left) and for theOﬀ-IP particle study (right)

5.2

Test case 2: Oﬀ-IP particle study

For the evaluation of the Oﬀ-IP particle rejection power, test samples that simulate the behaviorof the Oﬀ-IP particles are generated as shown in Fig. 5.1 (right). 100,000 events are simulated,and one charged particle is generated at various points on the z-axis in each event. Similarly tothe test case 1, parameters of z, p, θ, and ϕ are randomly determined within the given ranges
shown in Table 5.2.

61

Table 5.2: Parameters for the MC simulation of the Oﬀ-IP particle study. At each event,production point, momentum, polar angle and azimuthal angle are extracted from uniform
distributions withing the given ranges.
Parameters
Particle
Production point x
Production point yRange of production point z
Range of momentum p
Range of polar angle θRange of azimuthal angle ϕ
Number of events

5.3

Value
µ−
x = 0 cmy = 0 cm
−10 cm ≤ z ≤ 10 cm
0.1 GeV/c ≤ p ≤ 3.0 GeV/c0◦ ≤ θ < 180◦0◦ ≤ ϕ < 360◦
100,000

Test case 3: Beam background study

In order to evaluate the fake trigger probability, test samples that simulate the behavior of thebeam background particles are generated. For this test case, 10,000 events are simulated.
As explained in Section 2.4, the main components of the beam background in SuperKEKB
are Touschek eﬀect, Coulomb scattering, Bremsstrahlung, two-photon process, and radiative
Bhabha (RBB, BHWide, and BHWide LA). These eﬀects generate many secondary particles,
some of which spiral inside the TFP-SVD volume by the magnetic ﬁeld and make many hitson the sensor. To simulate their generation and behavior, dedicated software of modules
are used for each beam background component. For the Touschek, Coulomb scattering, andBremsstrahlung, SAD (Strategic Accelerator Design) software [34] is used to simulate thepropagation and loss of beam particles along the beam ring. AAFH [35] is used for the twophoton events, BBBREM [36] for the RBB, BHWIDE [37] for the BHWide and BHWide LA.
The Geant4 is used to simulate the interaction between those particles and sensors as usual.
These events are generated at the design luminosity of L = 8.0 × 1035 cm−2 s−1 .
The background studies [38] have understood background levels in the IR (Interaction
Region) and observed discrepancies between the simulation and the measured background. In
the studies, data/MC factors which represents the ratio between measured hit occupancy andsimulated hit occupancy have been introduced to correct the background simulation. Table
5.3 shows the data/MC factors, which is calculated using the background studies based on thedataset of the 2020 runs and adopted by the SVD group [9].
Since the geometry of the TFP-SVD detector is assumed to be the same as that of the
SVD detector, it is expected that the replacement of the SVD with the TFP-SVD does not
signiﬁcantly aﬀect the beam background situation. Therefore, we continue to adopt the above
ratios to scale the results of the beam background simulation with the TFP-SVD geometry.
After generating each beam background component, they are mixed and the TFP-SVD hit
samples are created at the design luminosity. When creating the TFP-SVD hits, the time ofsensor hits and energy depositions in the TFP-SVD are randomized by a dedicated digitizer
module. To evaluate the background level, the “cell hit occupancy” is deﬁned as an averagefraction of the number of ﬁred cells to the total number of cells. This value depends on theoperation of the hit signal latching described in Section 4.3, because the cells ﬁred in the62Table 5.3: Data/MC ratios for each component of beam backgrounds. In the backgroundstudies, the design machine parameters are considered at L = 8.0 × 1035 cm−2 s−1 .
Component
two-photon
RBB
BHWideBHWide LA
HER Brems
HER Coulomb
HER Touschek
LER Brems
LER Coulomb
LER Touschek

Data/MC ratio
1
1
1
1
3
3
0.2
5
5
4

previous frame contribute to the number of ﬁred cells in the next frame. Table 5.4 and Table
5.5 show the cell hit occupancies in each layer at the design luminosity, and Fig. 5.2 is an event
display which shows ﬁred cells by the beam background.
Table 5.4: 128-cell hit occupancy in each layer at the design luminosity of L = 8.0 ×1035 cm−2 s−1
P-cells of layer 3
N-cells of layer 3
P-cells of layer 4
N-cells of layer 4
P-cells of layer 5
N-cells of layer 5
P-cells of layer 6
N-cells of layer 6
P-cells of all layers
N-cells of all layers
Total

No latch
7.03 %
2.94 %
4.32 %
1.25 %
4.05 %
1.07 %
3.14 %
0.74 %
3.92 %
1.10 %
2.04 %

Latch for one frame
11.2 %
4.84 %
7.54 %
2.13 %
7.24 %
1.84 %
5.75 %
1.29 %
6.92 %
1.88 %
3.56 %

63

Latch for two frames
14.8 %
6.49 %
10.5 %
2.93 %
10.2 %
2.55 %
8.20 %
1.80 %
9.70 %
2.59 %
4.96 %

Table 5.5: 64-cell hit occupancy in each layer at the design luminosity of L = 8.0×1035 cm−2 s−1
Latch for one frame
6.37 %
2.64 %
4.15 %
1.13 %
3.94 %
0.98 %
3.07 %
0.69 %
3.77 %
1.01 %
1.93 %

Latch for two frames
8.49 %
3.57 %
5.85 %
1.57 %
5.62 %
1.37 %
4.41 %
0.96 %
5.33 %
1.39 %
2.71 %

15
10
5
0
-5
-10
-15
15
10

y [cm]

P-cells of layer 3
N-cells of layer 3
P-cells of layer 4
N-cells of layer 4
P-cells of layer 5
N-cells of layer 5
P-cells of layer 6
N-cells of layer 6
P-cells of all layers
N-cells of all layers
Total

No latch
3.92 %
1.58 %
2.35 %
0.66 %
2.18 %
0.57 %
1.66 %
0.39 %
2.11 %
0.59 %
1.09 %-100z[cm] 10

20

30

0

5

]

-20

x[
cm

-30

-5
-10
40 -15Figure 5.2: Event display of a certain beam background event at the design luminosity of
L = 8.0 × 1035 cm−2 s−1 . Red(Blue) rectangles represent ﬁred 128-P(N)-cells.

64Chapter 6
Performance evaluation
In this chapter, the N-128, PN-128, and PN-64 algorithms are applied to each test case generated in Chapter 5 and their performances are evaluated.

6.1

Evaluation of the trigger eﬃciency

In this section, the trigger algorithms are applied to the test case 1 (On-IP particle study) andtheir trigger eﬃciencies are evaluated.
N-128 algorithm First of all, the eﬃciency of the N-128 algorithm is evaluated. At the sametime, the eﬀect of the relaxed trigger conditions of the 3/4-allθ matching and 3/4-selectedθ
matching are discussed.
Fig. 6.1 shows the trigger eﬃciency as a function of the particle transverse momentum
pT . The events in which θ is in the range of 17◦ to 150◦ are selected for the trigger eﬃciency
calculation. The result of the Full matching condition is represented by the blue plots. This
plots shows that the trigger eﬃciency does not strongly dependent on pT . The average trigger
eﬃciency for the events with pT > 0.2 GeV/c is 90.5 %, which is below the target of 95 %.
Fig. 6.2 shows the trigger eﬃciency as a function of the particle ejection angle θ. The eventswith pT of larger than 0.5 GeV/c are selected. The dependency of the trigger eﬃciency on θ canbe seen in this ﬁgure. As anticipated in Section 4.2.1, the trigger eﬃciency drops signiﬁcantlyin the θ regions listed in Table 4.3.
In Fig. 6.1 and Fig. 6.2, the orange plots represent the trigger eﬃciency of the 3/4-allθmatching condition, and the green plots represent that of the 3/4-selectedθ matching condition.
In Fig. 6.1, the average trigger eﬃciency for the events with pT > 0.2 GeV/c is 98.4 % for the
3/4-allθ matching condition and 95.7 % for the 3/4-selectedθ matching condition. Fig. 6.2
shows that the dependency of trigger eﬃciency on θ are weakened for these two conditions.
From these facts, the Full matching condition is not useful due to the existence of the sensor
insensitive areas. On the other hand, 3/4-allθ matching condition can cover the direction of
the low sensor hit eﬃciency and achieve the high trigger eﬃciency above the target of 95 %.
Even in the case of 3/4-selectedθ matching condition, although the trigger eﬃciency is lower
than the 3/4-allθ matching due to limited application of the relaxed matching condition, it
still be above the target.

65Trigger efficiency vs pT (17

150 )

100
80
70
60
50
40
30

3.0

2.8

2.6

2.4

2.2

pT [GeV/c]

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.0

0

Full matching
3/4-all matching
3/4-selected matching

0.6

10

0.4

20

0.2

Trigger efficiency [%]90

Figure 6.1: Eﬃciencies of the N-128 algorithm for On-IP particles. The horizontal axis istransverse momentum pT . The blue(orange, green) plots represent the Full(3/4-allθ, 3/4selectedθ) matching condition.

66

Trigger efficiency vs (pT 0.5GeV/c)
100
80
70
60
50
40
30
20

0

0

18

0

17

0

16

0

15

0

14

0

13

0

12

0

[° ]

11

10

70

60

50

40

30

20

10

0

0

90

Full matching
3/4-all matching
3/4-selected matching

10

80

Trigger efficiency [%]90

Figure 6.2: Eﬃciencies of the N-128 algorithm for On-IP particles. The horizontal axis is particle ejection angle θ. The blue(orange, green) plots represent the Full(3/4-allθ, 3/4-selectedθ)matching condition.
PN-128 and PN-64 algorithms The eﬃciencies of the PN-128 algorithm are shown in
Fig. 6.3 and Fig. 6.4. The eﬃciencies of the PN-64 algorithm are shown in Fig. 6.5 andFig. 6.6. As with the N-128 algorithm, it can be seen that the trigger eﬃciencies of theFull matching conditions are low level and have θ dependence, while the 3/4-allθ matching
and the 3/4-selectedθ matching condition have high trigger eﬃciencies. Those results are
summarized in Table 6.1. The eﬃciency of the PN-algorithms are slightly lower than thatof the N-algorithm because they require matching using more cells than the N-algorithm.
However, from the viewpoint of the trigger eﬃciency, no signiﬁcant diﬀerences can be seenamong these algorithms.
Table 6.1: Trigger eﬃciencies of each trigger algorithm and each trigger condition. The averagevalue is calculated using the events with pT > 0.2 GeV/c
N-128
PN-128
PN-64

Full matching
90.5 %
89.8 %
89.9 %

3/4-allθ matching
98.4 %
97.9 %
97.3 %

67

3/4-selectedθ matching
95.7 %
94.8 %
94.2 %

Trigger efficiency vs pT (17

150 )

100
80
70
60
50
40
30
20

3.0

2.8

2.6

2.4

2.2

pT [GeV/c]

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.2

0.0

0

0.6

Full matching
3/4-all matching
3/4-selected matching

10

0.4

Trigger efficiency [%]90

Figure 6.3: Eﬃciencies of the PN-128 algorithm for On-IP particles. The horizontal axis
is transverse momentum pT . The blue(orange, green) plots represent the Full(3/4-allθ, 3/4selectedθ) matching condition.

Trigger efficiency vs (pT 0.5GeV/c)
100
80
70
60
50
40
30
20

70

60

50

40

30

20

10

0

0

10
0
11
0
12
0
13
0
14
0
15
0
16
0
17
0
18
0

10

90

Full matching
3/4-all matching
3/4-selected matching80

Trigger efficiency [%]

90

[° ]

Figure 6.4: Eﬃciencies of the PN-128 algorithm for On-IP particles. The horizontal axis
is particle ejection angle θ. The blue(orange, green) plots represent the Full(3/4-allθ, 3/4selectedθ) matching condition.
68

Trigger efficiency vs pT (17

150 )

100
80
70
60
50
40
30
20

3.0

2.8

2.6

2.4

2.2

pT [GeV/c]

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.2

0.0

0

0.6

Full matching
3/4-all matching
3/4-selected matching

10

0.4

Trigger efficiency [%]90

Figure 6.5: Eﬃciencies of the PN-64 algorithm for On-IP particles. The horizontal axis istransverse momentum pT . The blue(orange, green) plots represent the Full(3/4-allθ, 3/4selectedθ) matching condition.

Trigger efficiency vs (pT 0.5GeV/c)
100
80
70
60
50
40
30
20

70

60

50

40

30

20

10

0

0

10
0
11
0
12
0
13
0
14
0
15
0
16
0
17
0
18
0

10

90

Full matching
3/4-all matching
3/4-selected matching80

Trigger efficiency [%]

90

[° ]

Figure 6.6: Eﬃciencies of the PN-64 algorithm for On-IP particles. The horizontal axis is particle ejection angle θ. The blue(orange, green) plots represent the Full(3/4-allθ, 3/4-selectedθ)matching condition.
69

6.2

Evaluation of the discrimination power for On-IP particles

In this section, the trigger algorithms are applied to the test case 2 (Oﬀ-IP particle study) andtheir particle selection areas, deﬁned in Section 3.3, are evaluated. In this section and the next
section, only the 3/4 matching conditions are considered.
Fig. 6.7 shows the trigger eﬃciency as a function of the particle production point z underthe 3/4-allθ matching condition. The events with pT ≥ 0.5 GeV/c and 30◦ ≤ θ ≤ 120◦ areselected for the trigger eﬃciency calculation. The blue plots represent the result of the N128 algorithm, the orange plots represent that of the PN-128 algorithm, and the green plots
represent that of the PN-64 algorithm. These three plots show similar behavior. They havehigh trigger eﬃciencies about 98 % around the IP (z = 0) and decrease as z moves away fromthe origin. However, the widths of the three plots are diﬀerent according to their capability todiscriminate On-IP particles from Oﬀ-IP particles. The full width at half maximum (FWHM)
of the plots is 5.2 cm for the N-128 algorithm, 4.2 cm for the the PN-128 algorithm, and 2.2 cm
for the PN-64 algorithm. Moreover, the particle selection area is −5.9 cm < z < 6.9 cm for the
N-128 algorithm, −4.3 cm < z < 4.3 cm for the PN-128 algorithm, and −2.1 cm < z < 2.3 cm
for the PN-64 algorithm. From these fact, the PN-algorithms have higher Oﬀ-IP particle
rejection power than the N-algorithm. Furthermore, it is also found that the algorithm using
64-cell has much higher discrimination power than that using 128-cell.

Trigger efficiency vs z (pT 0.5GeV/c , 30

N-128 algorithm
PN-128 algorithm
PN-64 algorithm

100
90

Trigger efficiency [%]

120 )

80
70
60
50
40
30
20
10

-10
.0
-9.
0
-8.
0
-7.
0
-6.
0
-5.
0
-4.
0
-3.
0
-2.
0
-1.
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
.0

0

z coordinate of particle production point [cm]Figure 6.7: Trigger eﬃciencies under the 3/4-allθ matching condition for Oﬀ-IP particles. The
horizontal axis is particle production point z. The blue(orange, green) plots represent theN-128(PN-128, PN-64) algorithm.
70Fig. 6.8 shows the trigger eﬃciency as a function of the particle production point z underthe 3/4-selectedθ matching condition. The same trend as above can be seen in this ﬁgure,however, the widths of these plots are much narrower than above. The FWHMs and particle
selection areas are summarized in Table 6.2. It is found that the particle selection areas of
all the algorithms except for the N-128 algorithm can achieve the target of |z| < 5 cm. From
the table, it can be seen that FWHMs of the 3/4-selectedθ matching condition is about halfof that of the 3/4-allθ matching condition. From this facts, the relaxed matching condition
signiﬁcantly reduces the z position resolution of the trigger.

Trigger efficiency vs z (pT 0.5GeV/c , 30

N-128 algorithm
PN-128 algorithm
PN-64 algorithm

100
90

Trigger efficiency [%]

120 )

80
70
60
50
40
30
20
10

-10
.0
-9.
0
-8.
0
-7.
0
-6.
0
-5.
0
-4.
0
-3.
0
-2.
0
-1.
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
.0

0

z coordinate of particle production point [cm]Figure 6.8: Trigger eﬃciencies of 3/4-selectedθ matching condition for Oﬀ-IP particles. The
horizontal axis is particle production point z. The blue(orange, green) plots represent theN-128(PN-128, PN-64) algorithm.

Table 6.2: FWHMs and particle selection areas of each trigger algorithm and each trigger
condition

N-128
PN-128PN-64

3/4-allθ matching
FWHM Particle selection area
5.4 cm −5.9 cm < z < 6.9 cm
4.2 cm −4.3 cm < z < 4.3 cm
2.2 cm −2.1 cm < z < 2.3 cm

71

3/4-selectedθ matching
FWHM Particle selection area
2.6 cm −3.9 cm < z < 5.1 cm
2.2 cm −3.3 cm < z < 3.3 cm
1.0 cm −1.7 cm < z < 1.7 cm

6.3

Evaluation of the fake trigger probability

In this section, the trigger algorithms are applied to the test case 3 (Beam background study)
and their fake trigger probability are evaluated. The TFP-SVD trigger, synchronized with the
SNAP128 clock of 127 MHz, makes trigger decision every about 8 ns. Thus, the fake trigger
probability is evaluated in that time window. At the same time, as described in Section 3.2.2,
the fake trigger probability must be evaluated in the time window of about 60 ns when matching
it with the CDC trigger. Therefore, the fake trigger probability of the logic OR of 8 frames isalso evaluated.
The fake trigger probabilities per frame are shown in Table 6.3, and those per 8 frames
are shown in Table 6.4. Under a harsh beam background, since many particles contribute to
the fake track reconstruction, high position resolution is required to suppress the fake trigger
due to such tracks. Since the PN-algorithm (4 layers × 2 sides) checks more hits and has atighter trigger conditions than the N-algorithm (4 layers × 1 side), its fake trigger probability
is smaller. Especially for the PN-algorithm with 3/4-selectedθ matching condition, those value
for 8 frames are below the target of 10 %.
Table 6.3: Fake trigger probability per frame of each trigger algorithm and each trigger condition
N-128
PN-128PN-64

3/4-allθ matching
51.0 %
10.8 %
5.2 %3/4-selectedθ matching
8.4 %
1.6 %
0.9 %

Table 6.4: Fake trigger probability per 8 frame of each trigger algorithm and each trigger
condition
N-128
PN-128PN-64

6.4

3/4-allθ matching
94.6 %
35.8 %
18.2 %

3/4-selectedθ matching
35.8 %
5.6 %3.1 %Discussion

We evaluated the performance of the three diﬀerent algorithms with the three diﬀerent trigger
conditions in the three test cases. In terms of the fake trigger probability, the 3/4-selectedθ
matching condition shows the best performance among the three trigger conditions. The performances of the trigger algorithms with the 3/4-selectedθ matching condition are summarizedin Table 6.5.

72

Table 6.5: Performance of each trigger algorithm under the 3/4-selectedθ matching condition
N-128
PN-128
PN-64

Trigger eﬃciency
95.7 %
94.8 %
94.2 %

Particle selection area
−3.9 cm < z < 5.1 cm−3.3 cm < z < 3.3 cm−1.7 cm < z < 1.7 cm

Fake trigger probability
35.8 %
5.6 %3.1 %Trigger eﬃciency
From the On-IP particle study, it is found that sensor insensitive area constraints the trigger
eﬃciency. It is attributed to the geometry of the sensor, any improvement cannot be expected
as long as the trigger condition requires perfect matching between online hits and the pattern
table using all four layers. Therefore, we have to allow for missing hits in at least one layer fora high trigger eﬃciency. In fact, while the trigger eﬃciencies under the Full matching condition
are below the target of 95 %, those under the 3/4-allθ matching condition are above the target.
Regarding the 3/4-selectedθ matching condition, all trigger eﬃciencies show the values close
to 95 % as shown in Table 6.5.
Considering the discrimination power for On-IP particles and the fake trigger probability
discussed below, the PN-128 and PN-64 algorithms are desired. However, their trigger eﬃciencies are slightly below the target due to the existence of the sensor insensitive areas. Twoideas can be considered in order to increase the trigger eﬃciency. One is to relax the trigger
conditions further. Trigger conditions allowing for two or more missing hits while maintaining
the current SVD geometry are expected to result in unacceptable low discrimination power for
On-IP particles and high fake trigger probability. Thus, at the same time, it is also necessary
to consider increasing the number of layers by replacing part of layers of the CDC or involving
the PXD. In that case, we can allow for missing hits in more layers to improve the trigger
eﬃciency. The other is to reduce the insensitive areas of the sensors by increasing the sensor
size. However, the larger the sensor size, the longer the strip length, resulting in the larger
electrical noise. Therefore, this idea must be carefully considered in the TFP-SVD upgrading
project.
Discrimination power for On-IP particles
The Oﬀ-IP particle study shows that all the TFP-SVD triggers have so strong discrimination
power for On-IP particles compared to the CDC trigger. In particular, the PN-128 and PN-64
algorithms with the 3/4-selectedθ matching condition achieve the target of |z| < 5 cm. They
can narrow the limit on the current particle selection area of the CDC trigger |z| < 15 cm
by a factor of 3 or more. The particle selection area of the PN-64 algorithm is about half ofthat of the PN-128 algorithm. From this fact, the algorithm using the 64-cells has stronger
discrimination power for On-IP particles. Therefore, there is room to consider other algorithms
using further smaller cells.
The shape of the plots in the 3/4-selectedθ matching condition is sharper than that in the
3/4-allθ matching condition. This fact means matching condition using only three out of thefour layers signiﬁcantly reduces the z position resolution of the trigger.

73

Fake trigger probability
The PN-algorithms with 3/4-selectedθ matching condition can achieve the target on the fake
trigger probability. However, the obtained values of a few percent per frame are interpreted asa fake trigger rate of O(1) MHz. Hence, it is diﬃcult to use them as a standalone sub-trigger.
By taking the matching of the CDC and TFP-SVD triggers, the TFP-SVD trigger oﬀers tosigniﬁcantly suppress the fake CDC triggers. The fake trigger rate is expected to be reducedby more than a factor of 10. Considering the reduction of the CDC background trigger rateby taking the matching of the CDC and TFP-SVD triggers, the future trigger rate projectionsin Table 3.2 are modiﬁed as Table 6.6 and the upper limit of 20 kHz for the Total CDCTRG
can be observed. Furthermore, additional trigger bits for other physics events can participate
in the available space of the trigger rate.
Table 6.6: Projected exclusive rates of the CDC trigger bits at the target luminosity of L =6.0 × 1035 cm−2 s−1 when taking the matching with the TFP-SVD trigger. For the TFP-SVD
trigger algorithms, 3/4-selectedθ matching condition is applied.
Trigger bit
B B̄ CDCTRG
Low-multi CDCTRG
Total CDCTRGNo TFP-SVD trigger
28.7 kHz
25.3 kHz
54.0 kHzMatching with
PN-128 algorithm
8.2 kHz6.8 kHz15.0 kHzMatching with
PN-64 algorithm
7.7 kHz
6.3 kHz14.0 kHzIn the calculation of the projected CDC trigger rates in Table 6.6, we considered thesimplest matching method, which takes the logic AND of the CDC and TFP-SVD triggers.
We can also consider another more complicated matching method called ϕ-matching. The
concentric TFP-SVD and CDC detectors are divided into several sections in the ϕ direction.
The ϕ-matching determines whether the TFP-SVD and CDC simultaneously ﬁnd particles inthe same ϕ section. This matching method is expected to have strong rejection power for low
momentum background particles, which do not reach the CDC volume and make many hits in
the TFP-SVD. As a next task, we should develop the ϕ-matching algorithm.

74

Chapter 7
Firmware development for TFP-SVD trigger
In this chapter, the TFP-SVD trigger algorithms developed in Chapter 4 is implemented asﬁrmware. For the ﬁrst trial, the PN-128 algorithm is chosen, which has a medium number ofcells and table patterns.

7.1

Core logic circuit of TFP-SVD trigger

The PN-128 trigger is implemented in the UT4. The FPGA of Xilinx Virtex Ultrascale
XCVU080 is mounted on the test board, whose speciﬁcation is shown in Table 2.6. The
clock frequency of the FPGA is set to 127 MHz. As described in Section 4.2, the algorithm
consists of three steps. First, the online hit signal is latched for two clocks. Second, the online
hit signal is compared with each pattern of the cell pattern table, which contains 88,553 patterns. Finally, trigger decision is made: trigger signal is issued if the online hits match at least
one pattern of the pattern table, otherwise the event is vetoed.
The circuit to latch online hit signal is realized as shown in Fig. 7.1. In this circuit, an
input signal is split into two, and one is latched for one clock by a ﬂip-ﬂop. By taking the
logic OR of the direct input signal and the latched signal, the output signal becomes the logic
OR of the previous frame signal and the current frame signal. By latching the output signal
further using another ﬂip-ﬂop and taking the logic OR with the direct input signal, the ﬁnal
output becomes the logic OR of three frames. This component is named “latch circuit”. The
relation between input signal and output signal of the latch circuit is shown in Fig. 7.2. It canbe seen that the input signal rises in frame 0 and falls in frame 1, while the output signal rises
in frame 0 and falls in frame 3.
Online hits and each pattern of the pattern table are represented by a bit string of 3096width. Since the width of the bit string is too long to be implemented into a single bit arrayof the FPGA, it is divided into eight sub-strings. Each sub-string corresponds to each layerfrom 3 to 6 and to one of the sensor surface sides, either P-side or N-side. For example, since
there are 960 cells on the N-side of the layer 6, the sub-string for the section is implemented
in a bit array with 960-width.
In this study, the trigger conditions of the Full matching and 3/4-allθ matching are tried to
be implemented on a test basis. For the Full matching condition, the circuit to compare online
hits with each pattern of the pattern table is realized as Fig. 7.3. It is named “comparison
circuit”. The patterns of the table, whose size is about 32 MB (≈ 3096 width × 88, 553 depth),
are stored in registers of the FPGA. The comparisons are performed for each sub-string. Aftertaking the logic AND of the pattern and online hits, the equivalence operation (=) between
75

the result and the pattern is performed. If all the results of comparison for each sub-string are“TRUE”, a sub-output signal is set to ‘1’, otherwise the sub-output signal is set to ‘0’. For the
3/4-allθ matching condition, the comparison between online hits and each pattern of the table
is performed as Fig. 7.4. The comparison without one layer is realized on ﬁrmware by not using
the corresponding sub-strings. For example, when performing a comparison without layer 3,
the same component as the comparison circuit of the Full matching condition except that substrings for P-side and N-side of layer 3 are not used is applied. The comparisons without layer
4, 5, or 6 are performed in the same way, then, the sub-output signal is generated by taking
the logic OR of those four results.
These comparison circuits are executed for all patterns of the cell pattern table in parallel,and sub-outputs for the number of patterns of the table are generated. To issue the sub-trigger
signal if the online hit signal matches at least one patterns of the table, the logic OR of all
the 88,553 sub-outputs is taken at the end of the overall circuit of the algorithm. The overall
circuit is shown in Fig. 7.5. The circuit is called “core logic circuit”. When taking the logic ORof the sub-outputs, several ﬂip-ﬂops are needed to meet the timing constraint of the FPGA.
These ﬂip-ﬂops at this part determine the overall latency of the algorithm. The core logic
circuit can be implemented in one UT4 board. Table 7.1 shows the resource utilization of the
FPGA. It can be seen that there is adequate room for resource despite the implementation of
the large pattern table and a lot of comparison circuits.

Figure 7.1: Latch circuit to extend bit rise state by two frames

Table 7.1: Resource utilization of the FPGA
Look-up table (LUT)
RAM for LUT
Flip-ﬂop registers (FF)Block RAM (BRAM)
IO
Global buﬀer (BUFG)

Full matching
8.43 %
0.44 %
1.67 %
2.67 %
11 %0.31 %

76

3/4-allθ matching
9.41 %
0.49 %
1.47 %
2.74 %
11.82 %
0.31 %

Figure 7.2: Output of the latch circuit in simulation. The bit of the signal named “INPUT”
rises in frame 0 and falls in frame 1. The bit of the signal named “OUTPUT” rises in frame 0
and falls in frame 3.

77

Figure 7.3: Comparison circuit for the Full matching trigger condition. 3p(n) and 6p(n)represent the p(n) side of the layer 3 and 6. The online hits and the pattern of the table arecompared for each sub-string.

78

Figure 7.4: Comparison circuit for the 3/4-allθ matching trigger condition. The left side shows
the sub component for the comparison without layer 3, in which sub-strings for P-side andN-side of layer 3 are not used. The sub-output signal is the logic OR of the outputs form thesub components without layer 3, 4, 5, or 6.

Figure 7.5: Core logic circuit. In this ﬁgure, the notation of the sub-strings is simpliﬁed andrepresented as a single 3096-bit signal.
79

7.2

Operation test of the FPGA

For operation test whether the core logic is implemented correctly, the test samples generated
in Chapter 5 are input in the core logic circuit, and the output sub-trigger signal is checked if
the results are the same as the simulation results in Chapter 6. The hit samples are stored in
Block RAM (BRAM) of the FPGA, in which the hit signal of each frame of each event is inturn input into the core logic circuit at the frequency of 127 MHz. The trigger output can bechecked using ChipScope, which is a tool to probe internal signals of the FPGA.
For each test case, 2000 events are input and the results of the triggers are examined.
Fig. 7.6 shows the snapshot of ChipScope. As a result, it is conﬁrmed that the core logic circuit
reproduces the results obtained by the simulation. From this fact, the algorithm developedin Chapter 4 can be realized as ﬁrmware. The signal of the “Input ﬂag” in Fig. 7.6 is set to‘1’ when each event is input to the core logic. By counting the gap between the clocks of the“Input ﬂag” and trigger output, the latency of the core logic can be measured. For both theFull matching and 3/4-allθ matching conditions, the latencies are less than 100 ns (10 clocks).

Figure 7.6: Snapshot of the ChipScope. From this output, trigger result and the latency of thecore logic can be examined.

7.3

Overall conﬁguration of the ﬁrmware

This section explains the overall data transfer from front-end ASICs to the GRL (Section 2.6.1)
and estimates the trigger latency of the TFP-SVD trigger.
7.3.1

Data transfer

The considered design of the overall ﬁrmware setup is shown in Fig. 7.7. The entire TFP-SVD
detector contains 3096 SNAP128 front-end ASICs. Their digitized signals are converted into
optical signals and transmitted via optical ﬁber cables to the UT4 board in which the core
logic circuit is implemented. To receive the optical signals of more than 15 Gbps, the protocolof the GTY will be used. The UT4 board is planned to be placed in Electronics Hut (E-Hut)located about 20 m away from the Belle II detector, where various back-end readout systems
and monitoring systems are placed [39, 40]. Due to the distance between the SNAP128 chips
and E-Hut and the fact that the UT4 board has only 32 GTY lanes, the electrical to opticalconversion will be performed in several steps. The ﬁrst conversion chips are installed in the80

DOCKs (Section 2.3.3), and each one receives and serializes signals from the 12 channels of Nside chips or from 6 channels of P-side chips. In this case, 172 conversion chips are required foreach side (N-side or P-side). 29 intermediate boards with FPGA will be provided to serialize all
the 344 lanes of the optical signals from the ﬁrst conversion chips. Each of 28 boards receives
6 N-side lanes and 6 P-side lanes, and last one receives 4 N-side lanes and 4 P-side lanes. The
FPGA in the board for 6 N-side lanes and 6 P-side lanes have to process the data with the rateof about 15 Gbps, which includes not only core data of about 13 Gbps but also extra bits forthe noise robustness. As mentioned above, the data transmission can be realized by the GTY
protocol, whose design maximum rate is 25 Gbps. The UT4 board receives those data with 29
GTY input lanes, then makes trigger decision and output sub-trigger signal to the GRL.
7.3.2

Trigger latency

As described in Section 2.7.3, for the output of a hit signal from the D SEFLTRG, SNAP128
requires several clocks due to the Duration Cut process. The values of the SELFTRG UPPER
and SELFTRG TIME have not been optimized yet, however, 500 ns is considered to be suﬃcient [41]. The overall latency can be estimated by counting the time required for the Duration
cut process in SNAP128, serialization/deserialization of signals, transmission through opticalﬁber cables, and the core logic processing. Serialization and deserialization require about
250 ns, respectively. The propagation of light in the ﬁber cable is assumed to take 5 ns permeter. In our estimation, total latency is about 2.5 µs, in which it takes 1900 ns for hit signals to reach the UT4 board, 100 ns for the core logic and 500 ns for trigger signal to reachthe GRL. From this estimation, it is feasible that the TFP-SVD trigger will satisfy the ﬁxed
latency of 4.2 µs shown in Table 2.4. The GRL will perform some process such as matchingof the TFP-SVD trigger and the CDC trigger after receiving the sub-trigger signals, and the
GDL will output the ﬁnal Level-1 trigger signal, which is send to each front-end modules of
the Belle II detector. The current Level-1 trigger system, the processing of the GRL and GDLtakes about 500 ns and it takes about 400–500 ns for the Level-1 trigger signal output fromthe GDL to reach the APV25 chips, the current front-end ASICs of the SVD. If the samelatency is assumed, it takes about 1 µs for Level-1 trigger signal to reach the SNAP128 chips
after GRL receiving the sub-trigger signal from the UT4 board. After all, the total trigger
latency from the beam collision to the arrival of the Level-1 trigger signal at SNAP128 is about
3.5 µs, which is within the SNAP128’s maximum acceptable trigger latency of 16 µs describedin Section 2.7.2.

81

Figure 7.7: Overall setup of the ﬁrmware

7.4

Discussion

It is conﬁrmed that the trigger condition of the Full matching and 3/4-allθ matching for the
PN-128 algorithm can be implemented to the FPGA. Currently, the maximum trigger latency
is limited by the SVD and KLM up to about 5 µs. Table 7.2 shows the acceptable trigger
latencies for each front-end of the sub-detectors. Even after the replacement of the current
SVD with the TFP-SVD, the limit will be maintained by the KLM. The estimated trigger
latency of about 3.5 µs meets the limit of the maximum trigger latency.
Table 7.2: Maximum acceptable Level-1 trigger latency [42]Sub detector
PXD
SVD
CDC
TOP
ARICH
ECL
KLM

Value
5.2 µs at present (3 times larger in the future)
5.0 µs at present (about 10 µs with the TFP-SVD)
15 µs + more
9–12 µs
10–15 µs
> 15 µs
5.2 µsIn this thesis, we focused on the implementation of the PN-128 algorithm. As a next task,
we must conﬁrm the feasibility of the implementation of the PN-64 algorithm. The PN-64
algorithm has twice as many channels (3096 for PN-128, 6192 for PN-64) and ten times aslarge table size (88, 553 depth for PN-128, 793, 764 depth for PN-64) as the PN-128 algorithm.

82Hence, while the PN-128 algorithm can be implemented in one UT4 board, the PN-64 may
require additional UT boards. The trigger latency must be also checked because there isadditional latency associated with the serialization, deserialization, and conversion between
the electric and optical signals between UT boards. Considering the current resource usage ofabout 9 %, one additional subsequent UT4 board is expected to be enough. In that case, theadditional latency can be estimated to be 600 ns under the same assumptions of Section 7.3.2,
which can be absorbed by the gap between the current estimation of 3.5 µs and the limit of
5 µs. In addition, the next generation of the UT board, UT5, is currently under discussion.
Its upgraded speciﬁcation is expected to suppress the increase of the core logic latency andto accommodate more input channels and larger table size. Furthermore, the limit on the
maximum trigger latency can be extended in the future by improving the readout system of
sub-detectors, especially for the KLM.
The D SELFTRG clock and SELFTRG TIME clock in the Duration Cut process of SNAP128
have not been determined yet, which account for about 15 % of the total trigger latency of
3.5 µs. They have to be determined in terms of not only the properties of the physics andbeam background particles but also the trigger latency. We will study the characteristics ofbeam background signals to ﬁnd the optimal values for the D SELFTRG and SELFTRG TIME
clocks.

83

Chapter 8
Conclusion
The Standard Model (SM) predicts almost all phenomena of elementary particle physics up
to the energy scale of O(1) TeV, however, it is not considered to be the ultimate theory. To
explore new physic laws beyond the SM, the SuperKEKB collider and the Belle II detector
plan to accumulate 50 ab−1 of data in about 15 years of operation with the target luminosity of
6.0×1035 cm−2 s−1 . As of June 2022, the world’s highest luminosity of about 4.7×1034 cm−2 s−1
has already been achieved. However, as the luminosity increases, the beam background fromthe accelerator also increases, resulting in the higher Level-1 trigger rate. The current trigger
rate have reached about 8 kHz and it is projected to exceed the limit of 30 kHz under harshbeam background environment in the future. Therefore, the Level-1 trigger system needs to be
improved to remove beam background more eﬃciently. On the other hand, the upgrading planof the SVD detector, TFP-SVD plan, is under discussion to enhance the background tolerance
and improve the position resolution. The TFP-SVD detector is planed to be installed after
the long-term shutdown of Belle II in 2027.
This thesis proposes new sub-trigger system using the TFP-SVD to eﬃciently remove fake
CDC track triggers due to the Oﬀ-IP particles, which is expected to be major componentof the beam background, and reports the performance of the developed trigger algorithm.
Furthermore, the feasibility of the TFP-SVD trigger is conﬁrmed through the implementationof the algorithm into the FPGA of the UT4 board.
Achievements
First of all, the trigger algorithm was developed and implemented in the software to evaluate
the performance. With the reasonable assumption on the design of the TFP-DSSD sensor
and SNAP128 chip, we considered three diﬀerent trigger algorithms depending on the cell
type: the N-128, PN-128, and PN-64 algorithms. Moreover, we developed the three trigger
conditions: the Full, 3/4-allθ, and 3/4-selectedθ matching conditions. The Full matchingcondition requires the matching between online hits and the pattern table using four layers.
The 3/4-allθ matching requires the matching using only three out of the four layers. The
3/4-selectedθ matching applies the matching condition using only three layers to the limited θ
direction. To evaluate performance of these trigger algorithms, the trigger eﬃciency, particle
selection area, and fake trigger probability were evaluated for the three test cases.
It was found that the Full matching trigger condition could not achieve suﬃcient trigger
eﬃciency due to the existence of the sensor insensitive areas. On the other hand, the 3/4-allθand 3/4-selectedθ matching conditions covered the areas and achieved the trigger eﬃciencies

84

around 95 % or more. For these two matching conditions, any signiﬁcant diﬀerences in the trigger eﬃciencies were not observed among the three algorithms. Regarding the discrimination
power for On-IP particles, the 3/4-selectedθ matching condition obtained narrower particle
selection area than the 3/4-allθ matching condition. Regarding the fake trigger probability,
more signiﬁcant diﬀerences could be seen. The 3/4-selectedθ matching condition had remarkably smaller fake trigger probability than the 3/4-allθ matching condition. Furthermore, underthe 3/4-selectedθ matching condition, while the N-128 algorithm showed a fake trigger probability of about 35 %, the PN-128 and PN-64 algorithms showed those of about 5 % or less. As
a result, the PN-128 and PN-64 algorithms with the 3/4-selectedθ matching condition met therequirements for the particle rejection area and the fake trigger probability.
The performance of the PN-128 and PN-64 algorithms with the 3/4-selectedθ matchingcondition are summarized in Table 8.1. Regarding the trigger eﬃciency, although their valuesof 94.8 % and 94.2 % are slightly below the target of 95 %, they are close to the eﬃciencyof the current CDC trigger bits. Regarding the background rejection power, as discussed in
Section 6.4, by taking the matching of the TFP-SVD and CDC triggers, the trigger rate of
the Total CDCTRG trigger bit is projected to be about 15 kHz at the target luminosity, whichmeets the limit of 20 kHz.
From these facts, these two triggers are expected to provide enough trigger eﬃciency andbackground rejection power to the Level-1 trigger system so that the DAQ will operate stably
and the trigger bits for the B-physics as well as the τ and dark sector physics will be maintainedin the future.

Table 8.1: Performance of the PN-128 and PN-64 algorithms under the 3/4-selectedθ matchingcondition
PN-128
PN-64

Trigger eﬃciency
94.8 %
94.2 %

Particle selection area
−3.3 cm < z < 3.3 cm−1.7 cm < z < 1.7 cm

Fake trigger probability
5.6 %
3.1 %

After the simulation study, we implemented the PN-128 algorithm as ﬁrmware and performed
the operation test. We conﬁrmed that the pattern table and the comparison circuits could beaccommodated in the FPGA in one UT4 board and the trigger latency was estimated to meetthe current requirement of 5 µs. Through these tests, we could conﬁrm the feasibility of the
TFP-SVD trigger concept.

85

References[1] J. Brodzicka et al. Physics Achievements from the Belle Experiment. arXiv, 2012. https://arxiv.org/abs/1212.5342.
[2] T. Maskawa M. Kobayashi. CP-Violation in the Renormalizable Theory of Weak Interaction. Progress of Theoretical Physics, 49(2):652–657, February 1973.
[3] E. Kou et al. The Belle II Physics Book. Progress of Theoretical and Experimental Physics,
2019(12), December 2019.
[4] Belle II collaboration. Belle II Technical Design Report.
[5] P. Raimondi. private communication, 2006.
[6] SuperKEKB. Final Design Parameters. https://www-superkekb.kek.jp/index.html.
[7] SuperKEKB. Luminosity projection.
projection.html.

https://www-superkekb.kek.jp/Luminosity_[8] N. Taniguchi (Belle II collaboration). Central Drift Chamber for Belle-II. Journal of
Instrumentation, 12, 2017.
[9] K. Adamczyk et al. (Belle II SVD collaboration). The design, construction, operation andperformance of the Belle II silicon vertex detector. Journal of Instrumentation, 17:11042,
2022.
[10] V. Chabaud et al. The DELPHI Silicon Strip Mixrovertex Detector with Double Sided
Readout. Nuclear Instruments and Methods in Physics Research Section A, 368(2):314–
332, 1996.
[11] M. French et al. Design and results from the APV25, a deep sub-micron CMOS front-end
chip for the CMS tracker. Nuclear Instruments and Methods in Physics Research Section
A, 466(2):359–365, 2001.
[12] Zihan Wang. Performance studies of Thin Fine-Pitch Silicon Vertex Detector for Belle II
Vertex Detector upgrade, 2022.
[13] P. M. Lewis et al. First Measurements of Beam Backgrounds at SuperKEKB. Nuclear
Instruments and Methods in Physics Research Section A, 2018.
[14] Hikaru Tanigawa. A study of beam background from SuperKEKB on Belle II SiliconVertex Detector, 2018.

86

[15] A. Paladino et al. (Belle II Beam Background Group). Beam background evaluation at
SuperKEKB and Belle II. Journal of Instrumentation, 15, 2020.
[16] R. Itoh et al. Data ﬂow and high level trigger of belle ii daq system. IEEE Transactions
on Nuclear Science, 60(5):3720–3724, 2013.
[17] Ping Ni. Upgrade of Two Dimensional Track Trigger on Central Drift Chamber aimed forBelle II Targeted Luminosity, 2022.
[18] Y. Iwasaki et al. Belle II 実験トリガーシステム, 2015.
[19] P. V. C. Hough. Machine Analysis of Bubble Chamber Pictures.
590914:554–558, 1959.

Conf. Proc. C,[20] V. Bhardwaj et al. private communication, 2021.
[21] J. Wiechczynski. private communication.
[22] Sun-Young Ryu. Cdc beam background. B2GM, February 2021.
[23] Glenn F. Knoll. Radiation detection and measurement. Wiley New York, 3rd ed. edition,
1989.
[24] Michael Moll. Radiation Damage in Silicon Particle Detectors. PhD thesis, Hamburg U,
1999.
[25] T. Kishishita et al. SliT: A Strip-Sensor Readout Chip With Subnanosecond Time Walkfor the J-PARC Muon g − 2/EDM Experiment. IEEE Transactions on Nuclear Science,
67(9):2089–2095, 2020.
[26] T. Koga. private communication, 2022.
[27] C. Kiesling. B2GM, October 2021.
[28] Yuma Uematsu et al. private communication.
[29] Y. Sue. private communication, 2020.
[30] T. Kuhr et al. The Belle II Core Software. December 2018. arxiv:1809.04299[physics.compph].
[31] S.Agostinelli et al. (GEANT4 Collaboration). GEANT4 – a simulation toolkit. Nuclear
Instruments and Methods in Physics Research Section A, 506(3):250–303, 2003.
[32] S. Ramo. Currents Induced by Electron Motion. Proceedings of the I.R.E, 27:584, 1939.
[33] W. Shockley. Currents to Conductors Induced by a Moving Point Charge. Journal ofApplied Physics, 9:635, 1938.
[34] SAD Home Page. https://acc-physics.kek.jp/SAD/.
[35] F.A. Berends et al. Complete lowest-order calculations for four-lepton ﬁnal states inelectron-positron collisions. Nuclear Physics B, 253:441–463, 1985.

87

[36] R. Kleiss et al. BBBREM ― Monte Carlo simulation of radiative Bhabha scattering in
the very forward direction. Computer Physics Communications, 81(3):372–380, 1994.
[37] S. Jadach et al. BHWIDE 1.00: O(α) YFS exponentiated Monte Carlo for Bhabha scattering at wide angles for LEP1/SLC and LEP2. Physics Letters B, 390(1–4):298–308,
1997.
[38] P. M. Lewis et al. First Measurement of Beam Backgrounds at SuperKEKB. Nucl.
Instrum. Meth. A, 914:69–144, 2019.
[39] S. Park et al. Environmental Monitoring for Belle II. 21st IEEE Real Time Conference,
2018.
[40] M. Nakao et al. Data acquisition for Belle II. Journal of Instrumentation, 5, 2010.
[41] K. Nakamura. private communication.
[42] T. Koga. TRG upgrade. Belle II Trigger/DAQ workshop 2022, December 2022. Nara,
Japan.

88

Acknowledgements
First of all, I would like to thank my supervisor, Associate Professor Takeo Higuchi, foroﬀering me the opportunity to participate in the Belle II experiment and encouraging my work.
I would like to thank Katsuro Nakamura and Koji Hara for inviting me to the TFP-SVD
upgrade project and spending their precious time to instruct me. I am also grateful to Taichiro
Koga and the TRG group, who shared their practical knowledge about the Level-1 trigger andﬁrmware. I would like to thank Toru Tsuboyama, Yoshiyuki Onuki, and Akimasa Ishikawa foradvising me in my studies.
I would like to thank Yo Sato, Hikaru Tanigawa, Yuma Uematsu, and Zihan Wang forsharing their experience and knowledge. I am also grateful my colleague, Fumiaki Otani, who
made my life in Kashiwa and Tsukuba enjoyable.
This research was supported by Forefront Physics and Mathematics Program to Drive
Transformation (FoPM), a World-leading Innovative Graduate Study (WINGS) Program, theUniversity of Tokyo.
Finally, I would like to appreciate my parents for encouraging me to go on to the graduate
school and supporting my university life.