Mitsubishi Electric, Ritsumeikan University and JST Develop Security
Solution for IoT Devices
Protects the safety and security of embedded devices by using individual differences of LSIs
TOKYO, February 5, 2015 – Mitsubishi Electric Corporation (TOKYO:6503), Ritsumeikan University
and Japan Science and Technology Agency (JST) today announced that they have developed a security
technology that uses the individual differences of large scale integrations (LSIs) arising during theirfabrication to ensure confidentiality and authentication for interconnected devices in the Internet of things(IoT). The new technology helps to reduce security risks for networked devices by protecting embedded
programs and preventing spoofing. Mitsubishi Electric will begin applying the technology in its products
from April 2016.

LSIs make calculations based on internal circuits that dictate output, so LSIs with the same circuits yield thesame results when processing the same input. Intermediate routes to the computation result, however, aredifferent in each LSI, serving as something like a fingerprint, which the new technology uses to generateunique IDs for LSIs with the same circuits. The unique ID cannot be analyzed even by opening the LSIpackage and examining its insides because the ID appears only while the circuit is running. The embedded
program is encrypted so that it can be decrypted and used only in the device that has the LSI with a specified
ID. It is also possible to configure devices to connect only with devices that have specified IDs.

Silicon wafer

Same circuit deployedin all LSIs

Even though final output is same,intermediate routes are different
from LSI to LSI
LSI#1

LSI#2

LSI#3

Fig. 1 Slight differences in computation processes of circuit gates in different LSIs

The unique ID is generated as follows:
Step1. Count the number of glitches (peaks) that arise on signal input. If the number is even, assign 0 as anoutput bit, and if odd, 1.
Step2. Repeatedly change the signal input and compute the corresponding output bit, thus generating aunique ID.

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LSI#1Signalinput

Glitches(peaks)
arise inoutput signal

1

2

3

3 glitches ⇒ Assign value 1
LSI#2

12

Repeatedly change input
signal and convert itto a bit value

2 glitches ⇒ Assign value 0For example, unique ID
10110101101 generatedcollecting all the generated bits

LSI#3
Same circuits deployedin each LSI
1 glitch ⇒ Assign value 1Fig. 2 Unique ID generation

Three functions—generation of unique ID, encryption and authentication—can be implemented in a small
circuit area by letting them share some of their components. The required area is one third of that in the casewhere each function is separately implemented. In addition, prototype LSIs developed jointly with
Ritsumeikan University using multiple manufacturing processes have been confirmed to generate unique IDs
stably, so the technology can be modularized and thereby easily applied in a general LSI design flow.

Fig. 3 Prototype LSIs that generate unique IDs via signal transition(Left: 65 nm, 2.1 square mm; Right: 180 nm, 2.5 square mm)

As the use of networked embedded devices increases, countermeasures to prevent program analysis,
falsification, data theft and device spoofing are becoming more important. Especially in the case ofembedded devices with high safety demands, complete measures for program and data protection arerequired. Generally, ID information for cryptographic use is stored in memory embedded in a device, andthis information remains in memory even after powering off, so analysis of the ID is possible by opening theLSI package and examining its insides.

Patents
Pending patents for the technology announced in this news release number five in Japan and 32 abroad.
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Media Inquiries
Public Relations Division, Mitsubishi Electric Corporation
2-7-3, Marunouchi, Chiyoda-ku, Tokyo 100-8310, Japan
prd.gnews@nk.MitsubishiElectric.co.jp
Fax: +81-3-3218-2431

Technical Inquiries
Mitsubishi Electric Corporation:
Information Technology R&D Center, Mitsubishi Electric Corporation
5-1-1, Ofuna, Kamakura, Kanagawa 247-8501, Japan
Fax: +81-467-41-2142
URL: https://www.MitsubishiElectric.com/ssl/contact/company/rd/form.html

Ritsumeikan University:
College of Science and Engineering, Ritsumeikan University
Professor Takeshi Fujino
1-1-1, Nojihigashi, Kusatsu, Shiga 525-8577, Japan
Phone: +81-77-561-5150 Fax: +81-77-561-2663
E-mail: fujino@se.ritsumei.ac.jp

JST projects
Department of Innovation Research, Japan Science and Technology Agency
7, Gobancho, Chiyoda-ku, Tokyo 102-0076, Japan
Tel: +81-3-3512-3526

Fax: +81-3-3222-2064

crest@jst.go.jp
NotePart of this development has been achieved in "The Design and Evaluation Methodology of Dependable VLSI for Tamper
Resistance" (Principal investigator: Prof. Takeshi Fujino of Ritsumeikan University), a research theme in "Fundamental
Technologies for Dependable VLSI System" (Research supervisor: Dr. Shojiro Asai), which is a research area of CREST, astrategic basic research program funded by Japan Science and Technology Agency.

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