Optimizing the SiC Plasma Etching Process For Manufacturing Power Devices
H. Oda1, P. Wood2, H. Ogiya1, S. Miyoshi1 and O. Tsuji1
1

Research and Development Department, Samco Inc.,
36 Waraya-cho, Takeda, Fushimi-ku, Kyoto 612-8443, Japan075-621-7841, p-rie@samco.co.jp
2

Opto Films Research and Development Department, Samco Inc.,
1227 Innsbruck Dr. Sunnyvale, CA 94089, U.S.A.
(408) 734-0459, pwood@samcointl.com

Keywords: SiC, ICP Etching, SiC-MOSFET, Micro-Trenching
AbstractIn this research, we optimized SiC trench etching using anICP etching system in order to improve the problems of low
SiC etching rate, low selectivity (SiC/SiO2), andmicro-trenches. The ICP etching system we used was aSamco Model RIE-600iP, which was specifically developed forthe purpose of etching SiC. For this SiC trench etching study,
we used SF6, O2, and Ar process gases. After verifying that
adjusting the process parameters affected the SiC trench
etching results, it became clear that we could improve the SiC
etching rate by adjusting the bias power, prevent micro-trench
generation by adjusting the space between the electrodes(electrode gap), and improve selectivity (SiC/SiO2) byadjusting the process pressure. In doing so, we were able toimprove the major problems of SiC trench etching. By
adjusting the various parameters and optimizing the SiC
trench etch, we were able to achieve an etching rate of 775
nm/min, a selectivity of 13.4 (SiC/SiO2), and a desirable
etching shape without micro-trenches.

INTRODUCTION
Power devices are used in a wide variety of fields,
including consumer electronics, the automotive industry,
communications, and electrical power, and these devices
currently use Si as the device substrate material. However,Si-based power devices are approaching the limit of thematerial capabilities of Si, and it is believed that it will bevery difficult to make major improvements to the current
performance.
SiC has received a lot of attention in recent years as a
new material for power devices.
Compared to themainstream Si, the wide-gap semiconductor SiC has
excellent material qualities including high electricalbreakdown strength (ten times that of Si) and thermal
conductivity (three times that of Si). Current evidence
suggests that SiC power devices can surpass Si powerdevices with high voltage endurance, low electricalresistance, high speed switching, and high temperature
operation [1]. Therefore, we are actively moving forwardwith our research and development on power device
fabrication using this material.
A broad range of technology is required for
manufacturing SiC power devices. That includes the SiC
plasma etching technology that is essential for
manufacturing these devices. However, SiC is a difficult
material to etch, as it has a high binding energy. Plasmaetching of SiC often exhibits the problems of a low SiC
etching rate, a low selectivity compared to the etching mask,a lack of etching control, and a rough surface after etching.
As an example of what SiC power device manufacturing
demands from SiC plasma etching, we can look at SiC
trench etching. SiC trench etching is required in themanufacturing of the SiC MOSFET trenches that we are
actively pursuing in our research and development. In SiC
trench etching, it is vital to achieve a high SiC etching rate(>500 nm/min) and high etch selectivity (SiC/SiO2), whileat the same time controlling the etching shape(perpendicular sidewalls, with no micro-trenches) andsidewall smoothness. In order to meet these challenges, it
is absolutely necessary that we improve upon theseproblems in SiC plasma etching.
In order to improve these problem areas of SiC plasma
etching, Samco Inc. developed an ICP etching system, theRIE-600iP, that was targeted for the fabrication of SiC
power devices. We optimized the RIE-600iP system, andthe associated SiC plasma etching process by employing
our extensive experience in compound semiconductor
plasma etching research. We were able to see significant
improvement in the problem areas of SiC plasma etching:
low SiC etching rate, low mask etch selectivity, and etchingshape control.
In this paper, we will show how we optimized the SiC

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plasma etching process using the RIE-600iP ICP etchingsystem, with special attention focused on how we optimized
the SiC trench etching process.
EXPERIMENTAL DETAILSThe samples we used in the SiC trench etching study
were 3-inch 4H-SiC wafers with a SiO2 mask about 2 !mthick. We cleaved the wafers into chips (10 mm x 10 mmsquares), and fixed them using silicon oil to a 6’’
thermal-oxide-layered Si tray. The RIE-600iP ICP etchingsystem we used in the SiC trench etching was equippedwith a new uniquely optimized Tornado® ICP coil. Whenetching, we applied up to 2 kW of 13.56 MHz of RF power
to the planar ICP coil electrode (ICP power), and up to500W of 13.56MHz of RF power (bias power) to the lower,wafer electrode. The carrier wafer tray holding the SiC
chip sample was electrostatically clamped to the bias
electrode and helium backside cooled. The electrodetemperature was maintained at 80°C. The clamping andhelium backside cooling of the tray was key to moderating
the temperature rise of the sample during the energetic
etching process. We added a mechanism that allowed thelower electrode to be raised or lowered, which enabled us tochange the distance (electrode gap) between the ICP coiland the lower electrode. As a means of heating the sample
consistently before the start of SiC trench etching, wecarried out a pre-process clean on the sample for one
minute. In the pre-process, we used a mixture of O2 andAr. For the SiC trench etching, we used mixtures of SF6,O2, and Ar. In order to optimize the SiC trench etchingprocess, we adjusted the ICP power, bias power, electrodegap, and process pressure. We used a SEM (JEOLJSM-7600F) to confirm the etching shape, etching rate, andthe etch selectivity (SiC/SiO2).
RESULTS AND DISCUSSION
Early SiC trench etching process development exhibited
problems such as SiC etching rates of less than 200 nm/min,a low etch selectivity (SiC/SiO2) around 2-3, andmicro-trench generation. Figure 1 shows a result we hadfrom a SiC trench etching experiment in another model ofthe ICP etching system. The SiC trench width was 3.5 !m,the SiC etching depth was 1.9 !m, the etching rate was 186
nm/min, the selectivity (SiC/SiO2) was 3.1, and there wereundesirable micro-trenches formed along the edges of theSiC trench.

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Figure 1臖A 3.5 !m wide SiC trench etching result from an early SiC
trench etching experiment in another ICP etching system, showing
micro-trenches (white circle).

Out of the list of problems we had in our SiC trench
etching development, we decided to first work on
improving the low SiC etching rate. As is often seen inplasma etching of other materials, there are many cases
where the etching rate goes up by increasing the ICP power
and the bias power. With that in mind, we tested thepossibility of increasing the SiC etching rate by increasing
the ICP power and the bias power to a higher level thanprevious SiC trench etching processes.
It was found that the SiC etching rate did not increasesignificantly by increasing the ICP power. However, wedid find that there was some benefit to increasing the ICP
power in that with an increase in the ICP power, the etchselectivity (SiC/SiO2) went up. For example, in the SiC
trench etching process which was similar to the processused to fabricate the trench in Fig. 1, the etch selectivity(SiC/SiO2) improved by 1.8 times by increasing the ICP
power from 800W to 2kW.
The SiC etching rate was increased by increasing the bias
power. Figure 2 shows the relationship between bias
power and the SiC etching rate. When the bias power wasincreased from 100W to 500W, the SiC etching rate rosefrom 178 nm/min. to 412 nm/min. For the etch rate andselectivity data shown in Fig. 2, we set the ICP power to2kW, the process pressure to 0.6 Pa, the total gas flow to100 SCCM, and the electrode gap to 90 mm.

CS MANTECH Conference, May 18th - 21st, 2015, Scottsdale, Arizona, USAflow was 100 SCCM. Figures 3 (a) and (b) show therelationship between bias power and micro-trench
formation. When the bias power was increased from
300W to 500W, the micro-trenches became smaller.
Figures 3, (b) and (c) show the relationship between theelectrode gap and micro-trench formation. When theelectrode gap was adjusted from 90 mm to 170 mm, themicro-trenches became smaller. For the sample shown in
Fig. 3 (c), where there was no micro-trench formation, theSiC etching rate was 438 nm/min and the etch selectivity
Although we eliminated the(SiC/SiO2) was 2.8.
micro-trenches by adjusting the bias power and electrodegap, the selectivity unfortunately decreased.

Figure 2臖Relationship between bias power and SiC etching rate, SiO2
etching rate and SiC/SiO2 etch selectivity.

Since we had made some progress on the problems of
low SiC etching rate and low selectivity, we next sought toimprove the micro-trench problem.
It is generally
believed that micro-trenches are created by ionsconcentrated on the trench sidewalls. Since the amount ofion energy pulled into the sample features increases when
we apply a higher bias power, we can predict that themicro-trenches would become larger with higher bias power.
In contrast, when we decrease the bias power, the amountof ion energy pulled into the sample features decreases, andwe can predict that the micro-trenches would become
smaller. We have many etching results from ICP plasma
etching of SiO2 and other materials that proved thisprediction [2]. However, despite these predictions, welearned that in SiC trench etching, increasing the bias poweris effective in reducing micro-trenches.
Based on the effectiveness of increasing the bias power
to reduce micro-trenches, one might also think thatstrengthening the self-bias (Vdc) would be effective as well.
Although bias power tops the list for parameters that canchange Vdc, it is possible to change Vdc with otherparameters. At this point, we tried changing the electrodegap. Vdc becomes stronger by increasing the electrode gap,and weaker by decreasing it. In past SiC trench etchingexperiments, we set the electrode gap to 90 mm, but withthe purpose of strengthening the Vdc, we tried setting it to170 mm. Our results from this study found that the 170mm electrode gap reduced the micro-trench formation morethan the 90 mm electrode gap.
Figure 3 shows the relationship between bias power,electrode gap, and micro-trench formation. The width of
the SiC trench was 3.5 !m and the etching depth was about
2 !m. For the samples shown in in Fig. 3, the ICP power
was 2kW, the process pressure was 0.6 Pa, and the total gas

7(a) Bias = 300W𤩍electrode gap = 90 mm
SiC etching rate = 330 nm/min𤩍etch selectivity 膅SiC/SiO2䐢 = 4.6(b) Bias = 500W𤩍electrode gap = 90 mm
SiC etching rate = 412 nm/min𤩍etch selectivity 膅SiC/SiO2䐢 = 4.6(c) Bias = 500W𤩍electrode gap = 170 mm
SiC etching rate = 438 nm/min𤩍etch selectivity 膅SiC/SiO2䐢 = 2.8Figure 3臖Relationship of bias power and electrode gap to micro-trench
formation during SiC etching

After improving the low SiC etching rate andmico-trench formation problem, we focused on the task ofincreasing the selectivity (SiC/SiO2) while at the same time

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maintaining a high etching rate and preventing theformation of micro-trenches.
In order to raise the selectivity (SiC/SiO2), it wasnecessary to either raise the SiC etching rate, and/or lower
the SiO2 etching rate. In addition to the ICP power, bias
power, and the electrode gap, the process pressure wasanother parameter that contributed to the etching rates of
the SiC and etch mask material. When we investigated therelationship between process pressure and selectivity, it
became clear that raising the process pressure significantly
increased the etch selectivity (SiC/SiO2).
This wasbecause the SiC etching rate went up dramatically, while
the SiO2 etching rate dropped with increasing pressure.
Figure 4 shows the relationship that process pressure haswith the etching rate and etch selectivity (SiC/SiO2).
When we increased the process pressure from 1 Pa to 3 Pa,
the selectivity (SiC/SiO2) rose from 2.9 to 9.6. For the SiC
etching in Figure 4, the ICP power was 2kW, the bias
power was 450W, the total gas flow was 100 SCCM, andthe electrode gap was 170 mm.

parameter had on the overall SiC etching performance, andto continue adjusting the various critical parameters until an
optimized process was obtained.

Figure 5臖SiC trench etching result from optimized SiC trench etchingprocess.

CONCLUSIONS
We optimized the SiC trench etching process parameters
while utilizing a new ICP etching system. Prior tooptimizing the SiC trench etching process we had problems
with low etching rate, low selectivity, and micro-trench
formation, but we were able to solve these problems byadjusting the ICP power, bias power, electrode gap, andprocess pressure.
Adjusting these parameters andoptimizing the SiC trench etching allowed us to achieve ahigh etching rate of 775 nm/min, a high etch selectivity of13.4, and a desirable etching feature shape without theformation of micro-trenches.
ACKNOWLEDGEMENTS
The authors gratefully acknowledge S. Motoyama and M.
Hiramoto for their technical support and C. Oshige for hishelp during the experiments. We are also very grateful toT. Kimoto (Kyoto University) for his time and effort.
REFERENCES

Figure 4臖SiC etch rate and SiC/SiO2 selectivity versus the process pressureWith this reported process parameter study, we were able
to improve upon all of the areas in which we had problems
with SiC trench etching in the past. The optimized trench
etching process results are shown in Fig. 5. With a SiC
trench width of 3 !m, SiC etching depth of 2.3 !m, SiC
etching rate of 775 nm/min, and etch selectivity (SiC/SiO2)
of 13.4, we were also able to attain a desirable etching
feature shape (perpendicular sidewall with no micro-trench).
For the SiC etching in Fig. 5, the ICP power was 2kW, thebias power was 400W, the process pressure was 3 Pa, thetotal gas flow was 100 SCCM, and the electrode gap was170 mm.

1. M. S. Chinthavali, B. Ozpineci, L. M. Tolbert, and H.
Zhang, 2008, Materials Science Forum, 600-603, 1239
2. H. Oda, unpublished SAMCO Inc. internal data.
ACRONYMS
ICP: Inductively Coupled Plasma
MOSFET: Metal-Oxide Semiconductor
Transistor
RF: Radio Frequency
SEM: Scanning Electron Microscope

Field-Effect

In order to attain the desired SiC trench etching results, it
was necessary to verify the effect that adjusting each128

CS MANTECH Conference, May 18th - 21st, 2015, Scottsdale, Arizona, USA