LT3439
Slew Rate Controlled
Ultralow Noise1A Isolated
DC/DC Transformer DriverU

FEATURESDESCRIPTIOReduced Conducted and Radiated EMI■ Single Resistor Control of Output Switch Voltage
and Current Slew Rates■ Cross Conduction Prevention Circuitry■ Two 1A Current Limited Power Switches■ Low Minimum Supply Voltage: 2.8V
■ Low Shutdown Current: < 20µA
■ 50% Duty Cycle■ 20kHz to 250kHz Oscillator Frequency■ Synchronizable to 300kHz■ Overcurrent and Overtemperature Protected

The LT®3439 is a push-pull DC/DC transformer driver that
reduces conducted and radiated electromagnetic interference (EMI). Ultralow noise and EMI are achieved bycontrolling the output switch voltage and current slew
rates. Slew rates are user adjustable to optimize output
noise versus efficiency. The LT3439 can reduce highfrequency harmonic content by as much as 40dB with only
a minor decrease in efficiency.

■

The LT3439 includes two 1A current limited power switches
to ensure start-up under heavy loads. It also includes anoscillator that can be synchronized to an external clock formore accurate placement of switcher harmonics. Protection features include current limiting, undervoltage lockout, thermal shutdown and cross conduction prevention
circuitry.

U
APPLICATIO S
Low Noise Isolated Supplies
Radio and Telecom Supplies■ Distributed Supplies■ Medical Instruments■ Precision Instruments■ Low Noise Filament Supplies■■

The LT3439 is available in a thermally enhanced 16-pin
TSSOP with an exposed backside.
, LTC and LT are registered trademarks of Linear Technology Corporation.

U

TYPICAL APPLICATIO

Low Noise 5V to 5V Push-Pull DC/DC Transformer
5V Output NoiseOPTIONAL
VIN
5V

D1

T1
CIN
22µF
10V

13
11

VIN
SHDN

COL A
LT343956680pF 7
16.9k

COL B

SYNC
CT

RSL

RT
GND
10

PGND

•

•

•

•

L1 33µH

A
C1
47µF
6.3V

3

C2
47µF
6.3V

B

VOUT
5V
500mA

B
200µV/DIV

14
D2

4
34k

1, 16

CIN: MURATA GRM235Y5V226Z10
C1, C2: TDK C4532X5R0J476M
D1, D2: MBR0520
L1: TDK SLF6028T-330MR69
T1: COILTRONICS 15835

A
20mV/DIV3439 TA01

5µs/DIV

3439 TA01b

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W W

W

AXI U

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ABSOLUTERATI GSU
U
W
PACKAGE/ORDER I FOR ATIO

(Note 1)

VIN Voltage ............................................................. 20V
COL A, COL B Voltage ............................................. 35V
SHDN, SYNC Voltage .............................................. 20V
Maximum Junction Temperature ......................... 150°C
Operating Junction Temperature Range(Note 2) ............................................ – 40°C to 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C

TOP VIEW
PGND

1

16 PGND

NC

2

15 NC

COL A

3

14 COL B

RSL

4

13 VIN

SYNC

5

12 NC

CT

6

11 SHDN

RT

7

10 GNDNC

8

9

ORDER PARTNUMBER
LT3439EFE

FE PART
MARKINGNC

3439EFE

FE PACKAGE
16-LEAD PLASTIC TSSOPTJMAX = 125°C, θJA = 40°C/ W
NOTE: BACKSIDE OF PACKAGE CONNECTED TO GND

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = 5V; RT = 16.9k; CT = 680pF; RSL = 16.9k; COL A, COL B, SHDN pins open, unless otherwise noted.
SYMBOLPARAMETERCONDITIONS

MIN

TYP

MAX

UNITS

17.5

V

Supply and Shutdown
VIN

Operating Range

VIN(MIN)

Minimum Input Voltage

IVIN

Supply Current

IVIN(SHDN)

Supply Current in Shutdown Mode

2.8V ≤ VIN ≤ 17.5V, VSHDN = 0V

VSHDN(ON)

Shutdown Turn-On Threshold

VSHDN(OFF)
ISHDN

●

2.8
2.55

2.8V ≤ VIN ≤ 17.5V

2.7

V

●

12

mA

5

20

µA

2.8V ≤ VIN ≤ 17.5V

●

1.3

1.4

V

Shutdown Turn-Off Threshold

2.8V ≤ VIN ≤ 17.5V

●

1.20

1.26

Shutdown Pin Current Hysteresis

2.8V ≤ VIN ≤ 17.5V, VSHDN = 1.4V

●

10

20

V
40

µA

Oscillator and Sync
fMAX

Oscillator Frequency

●

250

kHz

fSYNC

Synchronization Frequency Range

●

300

kHz

VSYNC

SYNC Pin Threshold

●

RSYNC

SYNC Pin Input Resistance

1.4

2.25

V

40

kΩ

50

%

50

V

Output Switches (COL A, COL B)
DC

Switch Duty Cycle

BV

Output Switch Breakdown Voltage

2.8V ≤ VIN ≤ 17.5V●

RON

Output Switch On Resistance

ICOLA or ICOLB = 0.75A●

ILIM(MAX)

Switch Current Limit

●

35
1.2

0.5

0.95

Ω

1.4

1.65

A

Slew Control
VSLEWR

Output Voltage Slew Rising Edge

Collector A or B

17

V/µs

VSLEWF

Output Voltage Slew Falling Edge

Collector A or B

17

V/µs

ISLEWR

Output Current Slew Rising Edge

Collector A or B

5

A/µs

ISLEWF

Output Current Slew Falling Edge

Collector A or B

5

A/µs

Note 1: Absolute Maximum Ratings are those values beyond which the lifeof a device may be impaired.

Note 2: The LT3439E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization andcorrelation with statistical process controls.
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TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current in Shutdown Modevs Temperature

2.750

16

2.700

14
SUPPLY CURRENT (µA)

INPUT VOLTAGE (V)

2.650
2.600
2.550
2.500
2.450
2.400

120

12
17.5V
10
8
5V
6
4
2.7V

2

2.350
2.300
–50 –2500–50 –25

25 50 75 100 125 150
TEMPERATURE (°C)

Oscillator Frequency
vs Temperature

OSCILLATOR FREQUENCY (kHz)Minimum Input Voltage
vs Temperature

0

100
95
90

80
–50 –25

25 50 75 100 125 150
TEMPERATURE (°C)

25
125°C

24

TA = 25°C

22

SUPPLY CURRENT (mA)

0.5
25°C
0.4
0.3
0.2

SHDN PIN CURRENT (µA)

20

85°C

25 50 75 100 125 150
TEMPERATURE (°C)

SHDN Pin Hysteresis Current
vs Temperature

0.8
0.7

0

3439 G03

Supply Current vs Slew Resistor

0.9

SWITCH VOLTAGE (V)105

3439 G02

Switch Voltage Drop
vs Switch Current

15

10

20
18
16
14

5

12

0.1

0

0
0.1 0.2 0.3

0

0.4 0.5 0.6 0.7 0.8 0.9 1.0
SWITCH CURRENT (A)

10000
30000
20000
SLEW RESISTOR (Ω)

2.0

1.6

1.34

1.2

1.5

VOLTAGE THRESHOLD (V)THRESHOLD VOLTAGE (V)

1.8

1.4

25 50 75 100 125 150
TEMPERATURE (°C)

SYNC Pin Voltage Thresholdvs Temperature

1.35

1.6

0

3439 G06

SHDN Pin Voltage Thresholdvs Temperature

Current Limit vs Temperature

1.33
1.32
1.31
1.30
1.29

1.4
1.3
1.2
1.1

1.0
0.8
–50 –2510–50 –25

40000
3439 G05

3439 G04

CURRENT LIMIT (A)

110

85

3439 G01

0.6

RT = 16.9k
115 CT = 680pF

1.28

0

25 50 75 100 125 150
TEMPERATURE (°C)
3439 G07

1.27–50 –250

25 50 75 100 125 150
TEMPERATURE (°C)
3439 G08

1.0–50 –250

25 50 75 100 125 150
TEMPERATURE (°C)
3439 G09

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PI FU CTIO S
PGND (Pins 1, 16): Power ground is connected to theemitter of the power switches via an internal sense resistor. It has large currents flowing through it and should beconnected to a good quality ground plane.

RT (Pin 7): The oscillator resistor pin is used to set the
charge and discharge currents of the oscillator capacitor.
The nominal value is 16.9k. The resistance can be adjusted
between ±25% of nominal for better frequency accuracy.

COL A, COL B (Pins 3, 14): These are the open collectorsof the output power switches. They are connected to theouter terminals of the center tap transformer. Large currents flow into these pins so external traces should be kept
as short as possible.

SHDN (Pin 11): The SHDN pin is used to shut down thepart. Grounding this pin will disable all internal circuitry.
Increasing the SHDN voltage above the turn-on threshold
will enable the part. At the turn-on threshold, approximately 20µA of current is sourced out of the pin. This
current, in conjunction with the Thevenin resistance on thepin, sets up the hysteresis. This allows the user to set theundervoltage lockout (UVLO) of the supply and the amountof start-up hysteresis with a resistor divider off of the input
voltage. Above 2.1V on the SHDN pin, the hysteresis
current is reduced to zero. If unused the pin can be left
floating or tied directly to the input voltage.

RSL (Pin 4): The slew control resistor sets the maximum
current and voltage slew rate for the collectors A and B.
The minimum resistor value is 3.4k for fast slewing and the
maximum resistor is 34k for slow slewing. For moredetails, see “Slew Rate Setting” in the Applications Information section of this data sheet.
SYNC (Pin 5): The SYNC pin can be used to synchronize
the oscillator to an external clock. RT and CT should be set
such that the oscillator clock frequency is approximately
10% below the external clock frequency. If unused, thispin should be tied to GND. For more details, see “Oscillator
Sync” in the Applications Information section of this data
sheet.

GND (Pin 10): Signal Ground. The oscillator, slew control
circuitry and the internal regulator are referred to signal
ground. Internally, signal ground is tied to substrate andthe exposed backside of the device. Connect the GND pin
to the ground plane and keep the connection free of large
currents.

CT (Pin 6): The oscillator capacitor pin is used in conjunction with the RT pin to set the oscillator frequency. For
RT = 16.9k, CT can be calculated as follows:

VIN (Pin 13): This is the supply pin for the part and shouldbe bypassed with a 4.7µF or greater, low ESR capacitor.
When VIN ≤ 2.5V, an internal undervoltage lockout circuit
will trip and turn both outputs off.

CT(nF) = 70/fOSC(kHz)The transformer operating frequency and the frequencyof each output is one half of the frequency of the oscillator.

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LT3439W

BLOCK DIAGRA

D1

T1

•

VIN

•

•

11

13

3
LT3439SHDN VIN

LDO
REGULATORINTERNAL VCC
7
CT
6
5

SLEW
CONTROL

FF

•

COUT
D2

14
COLB

OUTPUT
DRIVERS

Q
T

RT

COLA

VOUT

QB

RT
CT

+

OSCILLATOR

16

RSENSE

–

SYNC
10

GND

4

PGND

1

RSL
3439 BDRSLU
OPERATIO
Push-Pull Topology
The push-pull DC transformer topology is a very straightforward switching power supply. The two switches areturned on out of phase at 50% duty cycles. During theswitch on time, VIN is applied across the primary side of
the transformer. The voltage on the secondary side of thetransformer is simply VIN times the turns ratio. The diodes
rectify the secondary voltage and generate the output
voltage. The output capacitor is for hold-up and filtering.
Some of the topology’s advantages are: 1) Stepping up or
down the input voltage can easily be done by setting theturns ratio. 2) The transformer provides isolation between
the input and output. 3) Each switch cycle applies VIN
across the transformer in opposite polarities. Therefore,
the transformer core never saturates and a separate reset
circuit is not necessary.
The push-pull topology is not without its concerns. An
imbalance in the two sides of the transformer caneventually cause the transformer to saturate. Also, during the turn-off of the switches, the leakage inductancecauses a large undesirable voltage spike. The LT3439
slew control feature addresses both of these concerns
and is discussed in the Applications Information section.
Slew Control
Control of voltage and current slew rate is maintained via
two feedback loops. One loop controls the output switch
collector voltage dV/dt and the other loop controls theemitter current dI/dt. Output slew control is achieved bycomparing the two currents generated by these slewing
events to a current set by the external resistor RSL. The twocontrol loops work together to provide a smooth transition
from voltage slew control to current slew control.
Internal Regulator
Most of the control circuitry operates from an internal 2.4V
low dropout regulator that is powered from VIN. VIN cansn3439 3439fs

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LT3439U
OPERATIO
vary from 2.8V to 17.5V with very little change in device
performance. When the part is in shutdown mode, theinternal regulator is turned off, drawing less than 20µA of
current from VIN.

Overtemperature Protection

Overcurrent Protection

Undervoltage Lockout Protection

A linearly controlled current limit circuit is provided toprotect the circuit from excessive currents and to facilitatestart-up into a highly capacitive load. Upon reaching current limit, the switching cycle is not terminated, instead thebase drive to the output transistor is regulated to maintainthe maximum current over the entire switch cycle. Very highpower dissipation in the switches occurs during this modeof operation. If the current limit is enabled for a long enoughperiod of time, over temperature protection shutdown will
be enabled to protect the device.

When VIN is below 2.55V the part will go into undervoltage
lockout mode where both output drivers are turned off.

When the IC has exceeded the maximum temperature thepart will trigger the overtemperature protection circuit
where both output drivers are turned off.

No Load Operation
The operation of the supply is stable all the way down tozero load and a preload is not required.

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APPLICATIO S I FOR ATIO

Reducing EMI from switching power supplies has traditionally invoked fear in designers. Many switchers aredesigned solely on efficiency and, as such, produce waveforms filled with high frequency harmonics that propagate
through the rest of the supply.
The LT3439 provides control of two of the primary variables for controlling EMI while switching inductive loads:
switch voltage slew rate and switch current slew rate. The
use of this part will reduce noise and EMI over conventional switch mode controllers. Because these variables
are under control, a supply built with this part will exhibit
far less tendency to create EMI and less chance of running
into problems during production.
It is beyond the scope of this data sheet to get into EMI
fundamentals. AN70, “A Monolithic Switching Regulator
with 100µV Output Noise” contains much information
concerning noise in switching regulators and should be
consulted.
Oscillator Frequency
The internal oscillator generates the switching frequency
that determines the fundamental positioning of theharmonics. Using quality external components is important to ensure oscillator frequency stability. A current
defined by external resistor RT charges and discharges
the capacitor CT creating a saw tooth waveform where theoutputs’ states change at the peak. The frequency of each
output is one half of the frequency of the oscillator.
By having both components external, the user has greater
flexibility in setting the frequency and the frequency is lesssusceptible to any temperature variations in the device.
The external capacitance CT is chosen by:CT(nF) = 1183/[fOSC(kHz) • RT(kΩ)]
where fOSC is the desired oscillator frequency.
For RT equal to 16.9k, this simplifies to:CT(nF) = 70/fOSC(kHz)e.g., CT = 1nF for fOSC = 70kHz
Nominally, RT should be set to 16.9k.
Low tolerance and low temperature coefficient components are recommended.

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APPLICATIO S I FOR ATIO
Oscillator SYNC

The oscillator can be synchronized to an external clock.
Set the RC timing components for an oscillator frequency
10% below the desired sync frequency.
It is recommended that the SYNC pin be driven with asquare wave that has an amplitude greater than 2V, a pulse
width greater than 1µs and a rise time less than 500ns. The
rising edge of the sync waveform triggers the change inthe state of the outputs.
Slew Rate Setting
Setting the LT3439 maximum slew rate is easy. The
external resistor to ground on the RSL pin sets the maximum slew rate. To determine the maximum slew rateconnect a 50k resistor pot with a 3.4k series resistance to
the RSL pin. Start at the lowest resistance setting andincrease the pot until the noise level meets your requirements. Note that slower slewing waveforms will lower the
power supply efficiency. Consult Linear Technology Application Note 70, “A Monolithic Switching Regulator with
100µV Output Noise” for recommended noise measurement techniques.
Shutdown
The SHDN pin is used to shut down the part. Grounding
this pin will disable all internal circuitry.
Increasing the SHDN voltage above the turn-on threshold,approximately 1.3V, will enable the part. At the turn-on
threshold approximately 20µA of current is sourced out ofthe pin. This current, in conjunction with the Thevenin
resistance on the pin, sets up the amount of hysteresis.
This allows the user to set the turn-on voltage of the supply
and the start-up hysteresis with a resistor divider. The
hysteresis can be used to prevent the part from shutting
down due to input voltage sag from an initial high current
draw. When the SHDN pin is greater than 2.1V, thehysteresis current is reduced to zero.

 R + RB 
VON =  A
 •V
 RB  SHDN
RA
SHDN

VIN
RB

3439 AI01

VON is the input voltage at which the supply will turn on and
VSHDN is the SHDN pin turn-on threshold, typically 1.3V.
 ∆VVHYST = RA •  SHDN + ISHDN RA || RB

VHYST is the actual hysteresis voltage seen at the input
voltage. ISHDN is the current hysteresis sourced by the IC
at the turn-on threshold, typically 20µA. ∆VSHDN is thevoltage hysteresis seen at the SHDN pin at the turn-on
threshold, typically 35mV.
The resistors can be calculated as follows:
RA =
RB =

(VHYST • VSHDN – VON • ∆VSHDN)ISHDN • VSHDN(VHYST • VSHDN – VON • ∆VSHDN)ISHDN • ( VON – VSHDN )For example if the turn-on voltage was to be set at 5V with
0.5V of hysteresis:

RA =
RB =

(0.5V • 1.3V – 5V • 35mV) = 18.27k
20µA • 1.3V

(0.5V • 1.3V – 5V • 35mV) = 6.42k
20µA • (5V – 1.3V )The nearest 1% values would be 18.2k and 6.49k.
A resistor in series with the SHDN pin could further change
hysteresis without changing the turn-on voltage.

In addition to the current hysteresis, there is also approximately 35mV of voltage hysteresis on the SHDN pin.

Thermal Considerations

If a resistor divider is used to set the turn on threshold theresistors are determined by the following equations:

Decreasing the noise by lowering the slew rate of theoutput switches does not come for free. Lower slew rates
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APPLICATIO S I FOR ATIO

mean greater switching losses in the internal output
switches. However, efficiency is only modestly reduced
for a large improvement in EMI.
Care should be taken to ensure that the worst-case input
voltage and load current conditions do not cause an
excessive die temperature. The total power dissipation of
the IC is dominated by three loss terms, regulator losses,
saturation losses and switching losses. The following
formulas may be used to approximate these losses:
1. Regulator Dissipation:

NOMINALOUTPUT
VOLTAGEOUTPUT
POWER

COILTRONICSPART NUMBER

5V
5V
5V
5V
5V
5V
12V

12V
12V
±15V
±15V
12V
12V
–12V

1.5W
3.0W
1.5W
3.0W
1.5W
10W
6W

CTX02-13716-X1
CTX02-13665-X1
CTX02-13713-X1
CTX02-13664-X1
CTX02-13834-X3
CTX02-13949-X1
CTX02-16076

If your application is not listed, the LTC Applications groupis available to assist in the choice and/or the design of thetransformer.

where I is the average switch current.
2. Switch Saturation Dissipation:
PVSAT = (VSAT)(I)In the design/selection of the transformer the following
characteristics are critical and should be considered.

3. Switch Switching Dissipation:

Turns RatioI( –2.3 • 10 –4 • RSL + 10.8
(

NOMINALINPUT
VOLTAGE

These transformers will yield slightly high output voltages
so that they can accommodate an LDO regulator on the
output.

I PVIN = VIN  12mA + 60 

PSW = 10 –6 • VIN • I • fOSC

Table 1)+
–1.7 • 10 –3 • RSL + 65.8 V)Total IC power dissipation (PD) is the sum of these threeterms. Die junction temperature can be computed asfollows:
TJ = TAMB + (PD)(θJA)
where TAMB is the ambient temperature, TJ is the junction
temperature and θJA is the thermal resistance from junction to ambient.
The LT3439 comes in the 16-pin TSSOP with exposed
backside package that has a very low junction-to-ambient
thermal resistance (θJA) of approximately 40°C/W.
Transformer Design
Table 1 lists recommended center tapped transformers fora variety of input voltage, output voltage and power
combinations.

The turns ratio of the transformer determines the output
voltage. The following equation can be used as a first passto calculate the turns ratio:
NS VOUT + VF=
NP VIN – VSW

where VF is the forward voltage of the output diode and
VSW is the voltage drop across the internal switches (seeTypical Performance curves).
Sufficient margin should be added to the turns ratio toaccount for voltage drops due to transformer winding
resistances. Also, if using an LDO for regulating the output
voltage, don’t forget to take into account the voltage dropthat should be added to VOUT.
Magnetizing Current
The primary inductance of the transformer causes a ripple
current that is independent of load current. The ripple
current manifests itself in the output voltage through theparasitic resistances of the supply. Increasing the transformer magnetizing inductance can reduce the ripple
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APPLICATIO S I FOR ATIO

current. This can be accomplished by adding more turns
onto a given core or selecting a new core with a higher
inductance per turn squared characteristic (AL).
The following equation can be used to set the transformer
primary inductance:t
LPRI = VIN ON∆I
tON can be calculated by 1/fOSC.
∆I is somewhat arbitrary but a general rule of thumb is toset it between 10% to 30% of IPRI where IPRI is calculated
as follows:
IPRI =

VOUT • IOUT
VIN Effof the switching cycle do not match, the transformer’s flux
level walks up the BH curve and the transformer goes into
saturation. This is undesirable because the effective magnetizing inductance drops off and the magnetizing current
increases rapidly. Fortunately, there are parasitics in thecircuit that counteract the transformer saturation. Whenthe transformer begins to saturate the magnetizing current increases in one half of the switching cycle andtherefore, the IR drops increase thereby reducing the volt/
second product of that half cycle. The transformer balanceis maintained. Also, the losses in the transformer and themain switches have positive temperature coefficients eliminating the potential for thermal runaway. The LT3439 cancompensate for small circuit imbalances, however careshould be taken to balance both sides of the circuit
including transformer design and PCB layout.

Eff can be estimated at 70%.

Transformer Design Example

Winding Resistance

The following is an example of the design of a DC transformer for a 5V to 5V at 500mA supply.

Resistance in either the primary or secondary winding will
reduce overall efficiency and degrade load regulation. If
efficiency or load regulation is unsatisfactory, verify thatthe voltage drops in the transformer windings are notexcessive.
Leakage Inductance
When the output switches turn off, the transformer leakage inductance causes a voltage spike on the output
switch collector. The size of the voltage spike is proportional to the magnitude of the leakage inductance and to
the square of the load current (energy stored in the leakage
inductance). The voltage spike should be limited so that it
does not exceed the voltage breakdown of the output
switches. This can be accomplished by reducing thetransformer’s leakage inductance or by reducing the maximum slew rate. The voltage slew control will limit thevoltage spike by dissipating the leakage energy in the
power switches.
Transformer Imbalance
A common concern for the push-pull topology is transformer imbalance. If the volt/second products of each half

Supply specs: VIN = 5V, VOUT = 5V, IOUT = 500mA,
fOSC = 100kHz
Assume: VF = 0.5V (forward voltage of output diode)
Efficiency ≈ 70%
Calculate the primary switch current (IPRI):IPRI =

VOUT • IOUT 5V • 500mA== 0.714A
VIN Eff
5V • 70%

The “Switch Voltage Drop vs Switch Current” Typical
Performance curve gives a typical value of the switch
voltage drop (VSW) for a given switch current (IPRI). In thisexample, IPRI ≈ 0.7A, therefore VSW ≈ 0.5V.
Next, calculate the turns ratio:

NS VOUT + VF 5V + 0.5V==
= 1.22
NP VIN – VSW 5V – 0.5V
Add 15% margin to account for winding resistance of thetransformer:NS= 1.22 + 15% = 1.41
NP
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APPLICATIO S I FOR ATIOThe primary inductance is then calculated:
1

1
fOSC
LPRI = VIN= 5 100kHz = 467µH∆IPRI
0.107 A∆I = 15% of IPRI = 0.15 • 0.714A = 0.107 A

Next, build a transformer with the calculated values ofturns ratio and primary inductance. Minimize resistance inthe windings. The turns ratio can be tweaked to get the
specified output voltage.
Capacitors
The DC transformer topology runs effectively at 100%
duty cycle (50% each side). This means that the input
supply current is approximately constant. Therefore, large“hold-up type” capacitors are not necessary. A low value(> 4.7µF), low ESR ceramic will be adequate to filter highfrequency noise at the input.
The output capacitors supply energy to the output load only
during switch transitions. Therefore, large capacitancevalues are not necessary. Low ESR, surface mount capacitors such as ceramic, OS-CON of POSCAPs are recommended. An additional LC filter can be added in addition tothe output capacitor to further reduce output noise.

Optional LC Filter
An optional LC filter, as shown on the Typical Applicationon the first page of this data sheet, should be included if
ultralow noise and ripple are required. It is recommended
that the corner frequency of the filter should be set a
decade below the switching frequency so that the switch
noise is attenuated by a factor of 100. For example, if the
fOSC = 100kHz, then fCORNER = 10kHz where:

fCORNER12 • π LC

Output Voltage Regulation
The output voltage of the DC transformer topology isunregulated. Variations in the input voltage will cause theoutput voltage to vary because the output voltage is afunction of the input voltage and the transformer turnratio. Also, variations in the output load will cause theoutput voltage to change because of circuit parasitics,
such as the transformer DC resistance and power switch
on resistance. If regulation is necessary, a post regulator
such as a linear regulator can be added to the output of the
supply. See the Typical Applications for examples ofadding a linear regulator.
More Help

Transformer winding capacitance between the isolated
primary and secondary have parasitic currents that cancause noise on the grounds. Providing a high frequency,
low impedance path between the primary and secondary
gives the parasitic currents a local return path. A 2.2nF, 1kV
ceramic capacitor is recommended.

AN70: “A Monolithic Switching Regulator with 100µV
Output Noise” contains much information concerning
applications and noise measurement techniques.

Switching Diode Selection

AN29: “Some Thoughts on DC-DC Converters” also havegeneral knowledge on switching regulators.

A fast recovery, surface mount diode such as a Schottky
is recommended. The proximity of the diodes to thetransformer outputs is important and should be as close
as possible with short, wide traces connecting them.

AN19: “LT1070 Design Manual”

An LTC SwitcherCADTM model is available to verify design
performance.
The LTC Applications department is always ready to lenda helping hand.
SwitcherCAD is a trademark of Linear Technology Corporation.

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10

LT3439U

TYPICAL APPLICATIO

Low Noise 5V to ±12V Push-Pull DC Transformer
OPTIONAL
D1

+

D2

C3
47µF

T1
13

C1
4.7µF
SHDN

COLA

7
CT
820pF

RT
16.9k

SYNC

•

•

14

COLB

RT

4

RSL
GND

R8
10k

D4

PGND

10

R1
442k

+

C9
39µF

D3
OPTIONAL

CT

ADJ

VOUT
12V
80mA

R2
49.9k

RSI
16.9k

1, 16

C11
2.2nF
1kV

C1: TAIYO YUDEN JMK212BJ475KG
C3-C6: SANYO OS-CON 20SVQP47M
C9, C10: SANYO OS-CON 16SVQPA39M
C11: AVX 1206AC222MA11A
D1-D4: MMBD914
L1, L2: COILCRAFT DT1608C-333
T1: COILTRONICS CTX02-16030

+

6

•

GND

3

LT3439
5

•

+

C5
47µF

L2

BYP
LT1964-BYP
IN
OUT

C6
47µF

GND

+

11

VIN

C4
47µF

C7
0.01µFADJ

C80.01µF

R3
442k

+

VIN
5V

BYP
LT1761-BYP
IN
OUT

L1

VOUT
–12V
C10 80mA
39µF

3439 TA02

R4
49.9k

U

PACKAGE DESCRIPTIOFE Package
16-Lead Plastic TSSOP (4.4mm)(Reference LTC DWG # 05-08-1663)

Exposed Pad Variation BA
4.90 – 5.10*(.193 – .201)

2.74(.108)

2.74(.108)
16 1514 13 12 1110

6.60 ±0.1092.74(.108)

4.50 ±0.10
SEE NOTE 4

2.74 6.40(.108) BSC

0.45 ±0.05
1.05 ±0.10
0.65 BSC
1 2 3 4 5 6 7 8RECOMMENDED SOLDER PAD LAYOUT

1.10(.0433)MAX

4.30 – 4.50*(.169 – .177)
0° – 8°0.09 – 0.20(.0036 – .0079)

0.45 – 0.75(.018 – .030)

NOTE:
1. CONTROLLING DIMENSION: MILLIMETERSMILLIMETERS
2. DIMENSIONS ARE IN(INCHES)3. DRAWING NOT TO SCALE

0.65(.0256)
BSC

0.195 – 0.30(.0077 – .0118)

0.05 – 0.15(.002 – .006)
FE16 (BA) TSSOP 0203

4. RECOMMENDED MINIMUM PCB METAL SIZEFOR EXPOSED PAD ATTACHMENT*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASHSHALL NOT EXCEED 0.150mm (.006") PER SIDE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

11

LT3439U

TYPICAL APPLICATIO

Low Noise 12V to –12V, 6W Push-Pull DC Transformer
OPTIONAL
VIN
12V

T1
C1
4.7µF

C2
0.1µF
11

13

•

VIN
SHDN

COLA
LT3439

5
6
7
CT
680pF

RT
16.9k

SYNC

COLB

CT
RT

RSL
GND
10

PGND
1, 16

L2
33µH

D1

•
C3
15µF

3

•

•

14
4
RSI
16.9k

C4
15µF

LT1175
IN
ILIM2
ILIM4
OUT
GND

SENSE

VOUT
–12V
500mA

C5
4.7µF
3439 TA03

D2

R1
150k

R2
324k

C1: TDK C3216X5R1C475K
C3, C4: TDK C4532X5R1E156M
C5: TEK C3216X5R1C475K
D1, D2: MBRA130LT3
L1: COILCRAFT DO1608C-333
T1: COILTRONICS CTX02-16076

RELATED PARTS
PART NUMBER

DESCRIPTIONCOMMENTS

LT1533Slew Rate Controlled Ultralow Noise 1A Switching Regulator

VIN: 2.7V to 23V, IQ (Supply): 12mA, ISD: <12µA, SO-16, Low
Noise: <100µVP-P, Independent Control of Switch Voltage andCurrent Slew Rates

LT1534/LT1534-1

Slew Rate Controlled Ultralow Noise 2A Switching Regulators

VIN: 2.7V to 23V, IQ (Supply): 12mA, ISD: <12µA, SO-16, Low
Noise: <2mVP-P, Independent Control of Switch Voltage andCurrent Slew Rates

LT1683Slew Rate Controlled Ultralow Noise Push-Pull Controller

VIN: 2.7V to 20V, IQ (Supply): 25mA, ISD: <24µA, SSOP-20, Low
Noise: <200µVP-P, Independent Control of Switch Voltage andCurrent Slew Rates

LT1738Slew Rate Controlled Ultralow Noise DC/DC Controller

VIN: 2.7V to 20V, IQ (Supply): 12mA, ISD: <24µA, SSOP-20, Greatly
Reduced Conducted and Radiated EMI, Independent Control of
Switch Voltage and Current Slew Rates

LT1763500mA, Low Noise Micropower, LDO

VIN: 1.8V to 20V, VOUT(MIN): 1.22V, Dropout Voltage (V at IOUT):
0.30V, IQ (Supply): 30µA, VOUT: 1.5V, 1.8V, 2.5V, 3V, 3.3V, 5V,
ISD: <1µA, SO-8, Low Noise: <20µVRMSP-P

LT1764/LT1764A

3A, Low Noise, Fast Transient Response, LDOs

VIN: 2.7V to 20V, VOUT(MIN): 1.21V, Dropout Voltage (V at IOUT):
0.34V, IQ (Supply): 1mA, VOUT: 1.8V, 2.5V, 3.3V, ISD: <1µA,
DD, TO220-5, Low Noise: <40µVRMSP-P, “A” Version Stable with
Ceramic Capacitors

LT1962300mA, Low Noise Micropower, LDO

VIN: 1.8V to 20V, VOUT(MIN): 1.22V, Dropout Voltage (V at IOUT):
0.27V, IQ (Supply): 30µA, VOUT: 1.5V, 1.8V, 2.5V, 3V, 3.3V, 5V,
ISD: <1µA, MS8, Low Noise: <20µVRMSP-P

LT1963/LT1963A

1.5A, Low Noise, Fast Transient Response, LDOs

VIN: 2.1V to 20V, VOUT(MIN): 1.21V, Dropout Voltage (V at IOUT):
0.34V, IQ (Supply): 1mA, VOUT: 1.5V, 1.8V, 2.5V, 3.3V, ISD: <1µA,
DD, TO220-5, SOT-223, SO-8, Low Noise: <40µVRMSP-P, “A” Version
Stable with Ceramic Capacitors

LT1964200mA, Low Noise Micropower, Negative LDO

VIN: –0.9V to –20V, VOUT(MIN): –1.21V, Dropout Voltage (V at IOUT):
0.34V, IQ (Supply): 30µA, VOUT: Adj, –5V, ISD: <3µA, ThinSOTTM,
Low Noise: <30µVRMSP-P, Stable with Ceramic Capacitors

ThinSOT is a trademark of Linear Technology Corporation.
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12

Linear Technology Corporation

LT/TP 0303 2K • PRINTED IN USA

1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

 LINEAR TECHNOLOGY CORPORATION 2002