参考資料
CC3301, CC3300
JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

CC330x SimpleLink™ Wi-Fi 6 と Bluetooth® Low Energy のコンパニオン IC
1 特長
主な特長
•
•
•
•
•
•

Wi-Fi 6 (802.11ax)
CC33x1 デバイスで Bluetooth® Low Energy 5.4 を使用
TCP/IP スタックを実行できる任意のプロセッサまたは
マイコン ホストへのコンパニオン IC
内蔵 2.4GHz PA により、最大 +20.5dBm の出力電力で完全なワイヤレス ソリューションを実現。
動作温度：-40℃～+105℃
最大 50Mbps のアプリケーション スループット•

2 アプリケーション
•

拡張機能
•

Wi-Fi 6
– 2.4GHz、20MHz、単一の空間ストリーム– IEEE 802.11b/g/n/ax をサポートする MAC、ベースバンドおよび RF トランシーバ– ターゲット ウェイク時間 (TWT)、OFDMA、MUMIMO (ダウンリンク)、基本サービス セット カラーリ
ング、トリガ フレームにより効率を向上– WPA2 と WPA3 をサポートする、ハードウェア ベースの暗号化と復号化– 非常に優れた相互運用性– 4 ビット SDIO または SPI ホスト インターフェイスのサポート•

Bluetooth Low Energy 5.4– LE Coded PHY (長距離)、LE 2M PHY (高速)、ア
ドバタイズ拡張機能– UART または共有 SDIO 用のオプション搭載ホスト
コントローラ インターフェイス (HCI) トランスポート•強化されたセキュリティ– セキュアなホスト インターフェイス– ファームウェア認証– アンチ ロールバック保護•

マルチロール サポート (同時 STA と AP など) により、異なる RF チャネル (Wi-Fi ネットワーク) 上の Wi-Fi
デバイスに接続
オプションでアンテナのダイバーシティまたは選択も可
能••

追加の 2.4GHz 無線 (Thread や Zigbee など) との外部共存のための 3 線式または 1 線式 PTA•

パワー マネージメント– VMAIN、VIO、Vpp：1.8V– VPA：3.3V
クロック ソース•– 40MHz の XTAL 高速クロック– 内部低速クロックまたは外部 32.768kHz 低速クロック
小型パッケージ サイズ– 40 ピン、5mm x 5mm のクワッド フラット ノーリード(QFN) パッケージ、0.4mm ピッチで、設計が容易

•

•

•

•
•

グリッド インフラ– 電気メーター– ストリング インバータ– マイクロ インバータ– エネルギー ストレージ電力変換システム (PCS)– EV 充電インフラ
ビル / ホーム オートメーション– HVAC コントローラ– HVAC ゲートウェイ– サーモスタット– ビルのセキュリティ ゲートウェイ– ガレージのドア システム
– IP ネットワーク カメラ / ビデオ ドアベル
– ワイヤレス セキュリティ カメラ
家電製品– 冷蔵庫 / 冷凍庫– オーブン– 洗濯機 / 乾燥機– 住宅用給湯 / 暖房システム– 空気清浄機と加湿器– コーヒー メーカー
– エアコン室内機– ロボット掃除機– ロボット芝刈り機
医療用– 点滴用ポンプ– 電子式病院用ベッド / ベッド制御– マルチパラメータ メディカル モニタ– 血圧計– CPAP 機器– 遠隔医療システム– 超音波スキャナ– 超音波スマート プローブ
– 電動歯ブラシ
リテール オートメーションおよびペイメント
プリンタ

このリソースの元の言語は英語です。 翻訳は概要を便宜的に提供するもので、自動化ツール (機械翻訳) を使用していることがあり、TI では翻訳の正確性および妥当性につきましては一切保証いたしません。 実際の設計などの前には、ti.com で必ず最新の英語版をご参照くださいますようお願いいたします。

English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

3 概要
SimpleLink™ Wi-Fi CC33xx デバイス ファミリは、手頃な価格と信頼性を両立しており、エンジニアはより多くのアプリケーションを自信を持って接続できます。CC33xx は、シングルチップの Wi-Fi 6 および Bluetooth Low Energy 5.4 デバ
イスです。CC3300 および CC3301 は、このピン互換ファミリの初のデバイスです。
••

CC3300：2.4GHz Wi-Fi 6 コンパニオン IC。
CC3301：2.4GHz Wi-Fi 6 および Bluetooth Low Energy 5.4 コンパニオン IC。

CC330x は、Wi-Fi 6 および BLE を提供すると同時に、Wi-Fi 4 (802.11 b/g/n) および Wi-Fi 5 (802.11ac) との互換性を維持します。これらの CC330x は、 テキサス・インスツルメンツの第 10 世代コネクティビティ コンボ チップです。そのため、CC330x は実績のあるテクノロジーをベースにしています。これらのデバイスは、TCP/IP を実行する Linux または
RTOS ホストを使用する、コスト重視の組込みアプリケーションでの使用に最適です。CC330x は、IoT (モノのインターネット) 向け組込みデバイス アプリケーションで Wi-Fi 6 の効率性を実現し、PCB のフットプリントが小さく、部品表も極めて最適化されています。
製品情報

2

部品番号

Wi-Fi 2.4-GHz SISO

CC3300ENJARSBR✔

CC3301ENJARSBR✔

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Bluetooth Low Energy✔

Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

4 システム図
図 4-1 に、CC3301 の基本的なシステム図を示します。

CC330x Wi-Fi and BLE Companion IC
Interfaces

Wi-Fi & BLE CoreSDIO /SPIDMA

Crypto

OTP

UART
Wi-Fi
MAC / Modem

BLE
MAC / Modem

Coexistence
2.4GHz Wi-Fi / BLE RF
Antenna Diversity

nReset

2.4GHzANT

System
Power
Packet RAM

Execution / Data RAM

Clock

図 4-1. CC3301 のハイレベルなシステム図

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Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

Table of Contents
1 特長................................................................................... 1
2 アプリケーション...................................................................1
3 概要................................................................................... 2
4 システム図.......................................................................... 3
5 Terminal Configuration and Functions..........................5
5.1 Pin Diagram................................................................ 5
5.2 Pin Attributes...............................................................6
6 Specifications.................................................................. 8
6.1 Absolute Maximum Ratings........................................ 8
6.2 ESD Ratings............................................................... 8
6.3 Recommended Operating Conditions.........................8
6.4 Electrical Characteristics.............................................96.5 Thermal Resistance Characteristics........................... 9
6.6 WLAN Performance: 2.4-GHz Receiver
Characteristics...............................................................96.7 WLAN Performance: 2.4-GHz Transmitter Power.... 10
6.8 BLE Performance: Receiver Characteristics.............10
6.9 BLE Performance - Transmitter Characteristics........11
6.10 Current Consumption - WLAN Static Modes.......... 12

4

6.11 Current Consumption - WLAN Use Cases..............12
6.12 Current Consumption - BLE Static Modes.............. 13
6.13 Current Consumption - Device States.................... 13
6.14 Timing and Switching Characteristics..................... 13
6.15 Interface Timing Characteristics..............................15
7 Applications, Implementation, and Layout................. 18
8 Device and Documentation Support............................19
8.1 サード・パーティ製品に関する免責事項.......................198.2 製品の命名規則......................................................... 19
8.3 Tools and Software................................................... 19
8.4 Documentation Support............................................ 20
8.5 サポート・リソース........................................................ 20
8.6 Trademarks............................................................... 21
8.7 静電気放電に関する注意事項.................................... 21
8.8 用語集....................................................................... 21
9 Revision History............................................................ 21
10 Mechanical, Packaging, and Orderable
Information.................................................................... 22

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Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

5 Terminal Configuration and Functions
5.1 Pin Diagram

22 SDIO_D2
21 SDIO_D3

24 SDIO_D0
23 SDIO_D1

26 SWCLK
25 GND

28 LOGGER
27 SWDIO

30 HOST_IRQ_BLE
29 HOST_IRQ_WL

図 5-1 shows pin assignments for the 40-pin WQFN package.

20 GND
19 SDIO CLK

DIG_LDO_OUT 31
VDD_MAIN_IN 32

18 SDIO CMD
17 VIONRESET 33
SLOW_CLK_IN 34

16 GND
15 ANT_SEL

VPP_IN 35
FAST_CLK_REQ 36

14 UART TX
13 UART RX

NC 37
NC 38

12 UART CTS
11 UART RTS

PA_LDO_IN 39
9
COEX_REQ 10

8COEX_PRIORITY

6
HFXT_P

75
VDDA_IN2

HFXT_M

4

COEX_GRANT

3
GND

2
RF_BG

VDDA_IN1

1
PA_LDO_OUT

PA_LDO_IN 40

図 5-1. CC3301 Pin Diagram

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Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

5.2 Pin Attributes

6

表 5-1. Pin Attributes
DIR (I/O)

VOLTAGELEVELSHUTDOWN STATE

STATE
AFTER
POWERUPPIN

SIGNAL NAMETYPE

DESCRIPTION

1

PA_LDO_OUT

Analog

2

RF_BG

RF

3

GND

GND

GND

4

VDDA_IN1

POW

1.8 V supply for analog domain

5

VDDA_IN2

POW

1.8 V supply for analog domain

6

HFXT_P

Analog

7

HFXT_M

Analog8

COEX_GRANT2Digital

O

VIO

PD

PD

External coexistence interface grant

9

COEX_PRIORITY2

Digital

I

VIO

PU

PU

External coexistence interface priority

10

COEX_REQ2

Digital

I

VIO

PU

PU

External coexistence interface request

11

UART RTS

Digital

O

VIO

PU

PU

Device RTS signal - flow control
for BLE HCI

12

UART CTS

Digital

I

VIO

PU

PU

Device CTS signal - flow control
for BLE HCI

13

UART RX

Digital

I

VIO

PU

PU

UART RX for BLE HCI

14

UART TX

Digital

O

VIO

PU

PU

UART TX for BLE HCI

15

ANT_SEL2

Digital

O

VIO

PD

PD

Antenna select control line

16

GND

GND

GND

17

VIO

POW

1.8 V IO supply

18

SDIO CMD

Digital

I/O

VIO

HiZ

HiZ

SDIO command or SPI PICO

19

SDIO CLK

Digital

I

VIO

HiZ

HiZ

SDIO clock or SPI clock

20

GND

GND

21

SDIO D3

Digital

I/O

VIO

HiZ

PU

SDIO data D3 or SPI CS

22

SDIO D2

Digital

I/O

VIO

HiZ

HiZ

SDIO data D2

23

SDIO D1

Digital

I/O

VIO

HiZ

HiZ

SDIO data D1

24

SDIO D0

Digital

I/O

VIO

HiZ

HiZ

SDIO data D0 or SPI POCI

25

GND

GND

26

SWCLK

Digital

I

VIO

PD

PD

Serial wire debug clock

27

SWDIO

Digital

I/O

VIO

PU

PU

Serial wire debug I/O

28

LOGGER3

Digital

O

VIO

PU

PU

Tracer (UART TX debug logger)

29

HOST_IRQ_WL3

Digital

O

VIO

PD

0

Interrupt request to host for
WLAN

RF power amplifier LDO output
Bluetooth Low Energy and
WLAN 2.4-GHz RF port

I/O

Sine

XTAL_P
XTAL_N

GND

GND

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Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

表 5-1. Pin Attributes (続き)SHUTDOWN STATE

STATE
AFTER
POWERUPDESCRIPTIONPD

PDInterrupt request to host for BLE(in shared SDIO mode)

PIN

SIGNAL NAMETYPE

DIR (I/O)

VOLTAGELEVEL

30

HOST_IRQ_BLE3

Digital

O

VIO

31

DIG_LDO_OUT

AnalogO

32

VDD_MAIN_IN

POW

33

nRESET

Digital

I

VIO

PD

PD

Reset line for enabling or
disabling device (active low)34

SLOW_CLK_IN

Digital

I

VIO

PD

PD

32.768-kHz RTC clock input

35

VPP_IN

POW

36

FAST_CLK_REQ

Digital

37

NC

NC

Connect to GND

38

NC

NC

Connect to GND

39

PA_LDO_IN

POW

3.3 V supply for PA

40

PA_LDO_IN

POW

3.3 V supply for PA

Digital LDO output todecoupling capacitor
1.8 V supply input for SRAM
and digital

1.8 V OTP programming input
supply
O

VIO

PD

PD

Fast clock request from thedevice1. All digital I/O's (with the exception of SDIO signals) are Hi-Z when the device is in shutdown mode withinternal PU/PD according to the "shutdown state" column.
2. See software release notes for support level.
3. LOGGER and HOST_IRQ_WL pins are sensed by the device during boot, see CC33xx Hardware
Integration.

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Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

6 Specifications
All specifications are given at the CC3301 pins. Typical values are measured with nominal device at 25°C.

6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
PINS

MIN

MAX

UNIT

VPA

VDD PA Voltage

PARAMETER

39,40

–0.5

4.2

V

VMAIN

Main supply voltage for analog and digital - VDD_MAIN_IN,
VDDA_IN1, VDDA_IN2

32, 4, 5

–0.5

2.1

V

17

–0.5

2.1

V

VDD IO Voltage
VIO

–0.5

VIO + 0.5

V

HFXT_P Input Voltage

6

–0.5

2.1

V

VPP

VPP OTP Voltage

35

–0.5

2.1

V

TA

Operating Ambient Temperature

–40

105

°C

Tstg

Storage temperature

–55

155

°C

(1)

Input Voltage to all digital pins

Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated underRecommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.

6.2 ESD Ratings
VALUE

V(ESD)(1)

Human body model (HBM), per
AEC Q100-002(1)RF pins±1000

Other pins

±2000

Charged device model (CDM), per
AEC Q100-011

RF pins±250

Other pins

±500

Electrostatic discharge

UNIT

V

AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted)
PARAMETER

PINS

MIN

TYP

MAX

1.62

1.8

1.98

VMAIN

Main supply voltage digital and analog - VDD_MAIN_IN,
VDDA_IN1, VDDA_IN2

32,4,5VPA

DC supply rail for PA

39,40

3

3.3

3.6

VIO

DC supply rail for input/output

17

1.62

1.8

1.98

VPP

DC supply rail for OTP memory

35

1.62

1.8

TA

Operating ambient temperature–40

Maximum power dissipation

UNIT

V

1.98
85/105(1)

°C

2

W

(1)

The CC3300 and CC3301 devices may operate at temperatures of up to 105°C. This allows the device to be used reliably inapplications that may be exposed to higher ambient temperature over certain periods of the product’s life. At temperatures higher than85°C, the WLAN/BLE performance may degrade.

8

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English Data Sheet: SWRS294

CC3301, CC3300

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

6.4 Electrical Characteristics
PARAMETERTESTCONDITIONDESCRIPTION

MIN

TYP

MAX

VIH

High Level Input Voltage

0.65 x VIO

VIO

VIL

Low Level Input Voltage

00.35 x VIO

VOHHigh Level Output Voltage

at 4mA

VIO – 0.45

VIO

VOL

Low Level Output Voltage

at 4mA

0

0.45

UNIT

V

6.5 Thermal Resistance Characteristics
THERMAL METRIC(1)DESCRIPTION

UNIT

RθJA

Junction-to-ambient thermal resistance (According to JEDEC
30.5
EIA/JESD 51 document)

RθJC(top)

Junction-to-case (top) thermal resistance

16.7

RθJB

Junction-to-board thermal resistance

10

ΨJT

Junction-to-top characterization parameter

0.1

ΨJB

Junction-to-board characterization parameter

10RθJC(bot)

Junction-to-case (bottom) thermal resistance

1.7

(1)

°C/W

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

6.6 WLAN Performance: 2.4-GHz Receiver Characteristics
PARAMETERTEST CONDITIONSMINOperational Frequency Range

Sensitivity: 8% PER for 11b rates, 10%
PER for 11g/n/ax rates

Maximum input level: 8% PER for 11b
rates, 10% PER for 11g/n/ax rates

Adjacent Channel Rejection

RSSI Accuracy

TYP

2412
1 Mbps DSSS

-98

2 Mbps DSSS

-95.3

11 Mbps CCK-90

6 Mbps OFDM

-93.2

54 Mbps OFDM

-75.5

HT MCS0 MM 4K-93

HT MCS7 MM 4K-72.9

HE MCS0 4K-92.7

HE MCS7 4K-72.5

1 DSSS0

OFDM6, HT MCS0, HE MCS00

OFDM54, HT MCS7, HE MCS7-9

1 Mbps DSSS

45

11 Mbps CCK

39

6 Mbps OFDM

20

54 Mbps OFDM

3HT MCS020HT MCS7

3HE MCS016

HE MCS7-1-90 dBm to -30dBm

Copyright © 2024 Texas Instruments Incorporated

-3

MAX

UNIT

2472

MHZ

dBm

dBm

dB

3

dB

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English Data Sheet: SWRS294

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

6.7 WLAN Performance: 2.4-GHz Transmitter PowerPARAMETERTEST CONDITIONS

Operational Frequency Range

Maximum output power at VPA > 3.0 V

MIN

TYP

2412
1 Mbps DSSS

20.5

6 Mbps OFDM

20.2

54 Mbps OFDM

17.4

HT MCS0 MM

20.2

HT MCS7 MM

17.4

HE MCS0

20.2

HE MCS7

17.3

MAX

UNIT

2472

MHz

dBm

6.8 BLE Performance: Receiver Characteristics
PARAMETERTEST CONDITION

MIN

TYP

MAX

UNIT

BLE 125Kbps (LE Coded) Receiver Characteristics-102.2

Receiver sensitivity

PER <30.2%

Receiver saturation

PER <30.2%

Co-channel rejection(1)Wanted signal at -79 dBm, modulated interferer inchannel10

Selectivity, ±1 MHz(1)Wanted signal at -79 dBm, modulated interferer at±1 MHz.

0/0

Selectivity, ±2 MHz(1)Wanted signal at -79 dBm, modulated interferer at±2 MHz.

-37 / -30

Selectivity, ±3 MHz(1)Wanted signal at -79 dBm, modulated interferer at±3 MHz.

-39 / -36

Selectivity, ±4 MHz(1)Wanted signal at -79 dBm, modulated interferer at±4 MHz.

-45 / -41

RSSI Accuracy

Dynamic range of -90 to -20dBm

dBm

0

-4

dBm
dB
dB
dB
dB
dB
4

dB

BLE 500Kbps (LE Coded) Receiver Characteristics
Receiver sensitivity

PER <30.2%

-99.8

dBm

0

Receiver saturation

PER <30.2%

Co-channel rejection(1)Wanted signal at -72 dBm, modulated interferer inchannel.

10

Selectivity, ±1 MHz(1)Wanted signal at -72 dBm, modulated interferer at±1 MHz.

0/0

Selectivity, ±2 MHz(1)Wanted signal at -72 dBm, modulated interferer at±2 MHz.

-35 / -25

Selectivity, ±3 MHz(1)Wanted signal at -72 dBm, modulated interferer at±3 MHz.

-40 / -37

Selectivity, ±4 MHz(1)Wanted signal at -72 dBm, modulated interferer at±4 MHz.

-45 / -40

RSSI Accuracy

Dynamic range of -90 to -20dBm

-4

dBm
dB
dB
dB
dB
dB
4

dB

BLE 1Mbps (LE 1M) Receiver Characteristics
Receiver sensitivity(2)PER <30.2%, 37-byte packets

–99.4

dBm

Receiver sensitivity(2)PER <30.2%, 255 byte-packets

–98.1

dBm

Receiver saturation

PER <30.2%0dBm

Co-channel rejection(1)Wanted signal at -67 dBm, modulated interferer inchannel

10

dB

10

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English Data Sheet: SWRS294

CC3301, CC3300

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

PARAMETERTEST CONDITION

MIN

TYP

MAX

UNIT

Selectivity, ±1 MHz(1)Wanted signal at -67 dBm, modulated interferer at±1 MHz0/0dB

Selectivity, ±2 MHz(1)Wanted signal at -67 dBm, modulated interferer at±2 MHz.

-35 / -28

dB

Selectivity, ±3 MHz(1)Wanted signal at -67 dBm, modulated interferer at±3 MHz-38 / -32

dB

Selectivity, ±4 MHz(1)Wanted signal at -67 dBm, modulated interferer at±4 MHz-45 / -40dB

Out-of-band blocking

30 MHz to 2000 MHz, Wanted signal at -67 dBm

–23

dBm

Out-of-band blocking

2003 MHz to 2399 MHz, Wanted signal at -67
dBm

–30

dBm

Out-of-band blocking2484 MHz to 2997 MHz, Wanted signal at -67
dBm

–30

dBm

Out-of-band blocking

3000 MHz to 6 GHz, Wanted signal at -67 dBm

–21

dBm

Intermodulation

Wanted signal at 2402 MHz, -64 dBm. Twointerferers at 2405 and 2408 MHz respectively, at
the given power level

–40

dBm

RSSI accuracy

Dynamic range of -90 to -20dBm

-4

4

dB

BLE 2Mbps (LE 2M) Receiver Characteristics
Receiver sensitivity(3)PER <30.2%

-95.2

dBm

Receiver saturation

PER <30.2%0dBm

Co-channel rejection(1)Wanted signal at -67 dBm, modulated interferer inchannel10dB

Selectivity, ±2 MHz(1)Wanted signal at -67 dBm, modulated interferer at±2 MHz.

0/0dB

Selectivity, ±4 MHz(1)Wanted signal at -67 dBm, modulated interferer at±4 MHz-35 / -28

dB

Selectivity, ±6 MHz(1)Wanted signal at -67 dBm, modulated interferer at±6 MHz-35 / -28

dB

Alternate channel rejection, ±8MHz(1)

Wanted signal at -67 dBm, modulated interferer at±8 MHz-37 / -32dB

Out-of-band blocking

30 MHz to 2000 MHz, Wanted signal at -67 dBm

–23

dBm

Out-of-band blocking

2003 MHz to 2399 MHz, Wanted signal at -67
dBm

–30

dBm

Out-of-band blocking2484 MHz to 2997 MHz, Wanted signal at -67
dBm

–30

dBm

Out-of-band blocking

3000 MHz to 6 GHz, Wanted signal at -67 dBm

–21

dBm

Intermodulation

Wanted signal at 2402 MHz, -64 dBm. Twointerferers at 2405 and 2408 MHz respectively, at
the given power level

–44

dBm

RSSI Accuracy

Dynamic range of -90 to -20dBm

(1)
(2)
(3)

-4

4

dB

Numbers given as C/I dB
BLE 1M PHY sensitivity on channels 17 and 39 may degrade by up to 2.5 dB
BLE 2M PHY sensitivity on channel 17 may degrade by up to 1.5 dB

6.9 BLE Performance - Transmitter Characteristics
The CC330X devices support BLE TX setting 0,5,10, or 20 dBm
PARAMETERDESCRIPTION

MIN

Output Power, highest
setting

Copyright © 2024 Texas Instruments Incorporated

TYP
20

MAX

UNIT
dBm

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6.10 Current Consumption - WLAN Static Modes
All results are based on measurements taken using the RadioTool evaluation application (typ values are taken with nominal
devices at room temp).
PARAMETERTEST CONDITION
1 DSSS

6 OFDM

TX power = 20.5 dBm

TX power = 20.2 dBm

54 OFDM

TX power = 17.4 dBm

HT MCS0

TX power = 20.2 dBm

SUPPLY

TYP
92

VPA

250

290

VMain

105

170

VPA

250

290

VMain

110

VPA

180

HT MCS7

TX power = 17.4 dBm

245
110

VMain
VPA

HE MCS0

TX power = 20.2 dBm

TX power = 17.3 dBm

105

VMain

240
110

VMain
VPA

180
62

VMain

Continuous RX

VPA

(1)

mA

180

VPA
HE MCS7

UNIT

105

VMain
VPA

Continuous TX(1)

MAX

VMain

0

Peak current VPA can hit 340mA during device calibration.
Peak current VMAIN of 185mA including periperhals and internal cortex

6.11 Current Consumption - WLAN Use Cases
Nominal device at room temp
MODE

DTIM=1

DTIM=3DTM=5

12DESCRIPTIONMIN

System with 3.3V to Ext. DC/DC at 85% efficiency
WLAN beacon reception every DTIM=1 (~102ms)
System with 1.8V
WLAN beacon reception every DTIM=1 (~102ms)
System with 3.3V to Ext. DC/DC at 85% efficiency
WLAN beacon reception every DTIM=1 (~102ms)
System with 1.8V
WLAN beacon reception every DTIM=1 (~102ms)
System with 3.3V to Ext. DC/DC at 85% efficiency
WLAN beacon reception every DTIM=1 (~102ms)
System with 1.8V
WLAN beacon reception every DTIM=1 (~102ms)

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TYP

MAX

UNIT

637
980

371
570

µA

319
490

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

6.12 Current Consumption - BLE Static Modes
PARAMETERTEST CONDITIONSUPPLY

TX power = 0 dBm

TX, Max Duty Cycle

TYP

VMain

TX power = 10 dBm

TX power = 20 dBm

RX

MAX

UNIT

102

VPA

35

VMain

102

VPA

100

VMain

105

VPA

250

VMain

62

VPA

0

mA

6.13 Current Consumption - Device States
Nominal device at room temp
MODE

DESCRIPTIONSUPPLY

Shutdown

External supplies are available, device
held in reset (nReset is low)

Sleep

Low power mode - RAM in retention

TYP

VMain + VPP

10

VPA

2

VMain + VPP

330

VPA

UNIT

uA

2

6.14 Timing and Switching Characteristics
6.14.1 Power Supply Sequencing
For proper operation of the CC330x device, perform the recommended power-up sequencing as follows:
1. All supplies (VDD_MAIN_IN, VDDA, VIO, VPA) must be available before nReset is released.
2. For an external slow clock, ensure that the clock is stable before nReset is deasserted (high).
3. The nReset pin should be held low for at least 10 us after stabilization of the external power supplies.
6.14.2 Clocking Specifications
The CC330x device uses two clocks for operation:••

A fast clock running at 40 MHz for WLAN/BLE functions
A slow clock running at 32.768 kHz for low power modes

The slow clock can be generated internally or externally. The fast clock must be generated externally.
6.14.2.1 Slow Clock Generated Internally
In order to minimize external components, the slow clock can be generated by an internal oscillator. However,this clock is less accurate and consumes more power than sourcing the slow clock externally. For this scenario
the Slow_CLK_IN pin should be left not connected.
6.14.2.2 Slow Clock Using an External Oscillator
For optimal power consumption, the slow clock can be generated externally by an oscillator or sourced from
elsewhere in the system. The external source must meet the requirements listed below. This clock should be fed
into the CC330x pin Slow_CLK_IN and should be stable before nReset is deasserted and device is enabled.

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6.14.2.2.1 External Slow Clock Requirements
PARAMETER

Description

Input slow clock frequency

Square wave

Frequency accuracy

Inital + temperature + aging

MIN

TYP

MAX

UNIT

±250

ppm

70

%

100

ns
V

32768

Input Duty cycle

30

50

10% to 90% (rise) and 90% to 10%(fall) of digital signal level

Hz

Tr/Tf

Rise and fall time

VIL

Input low level00.35 x VIO

VIHInput high level

0.65 x VIO

1.95

Input impedence

1

V
MΩ

Input capacitance5

pF

6.14.2.3 Fast Clock Using an External Crystal (XTAL)The CC330x device supports a crystal-based fast clock (XTAL). The crystal is fed directly between HFXT_P and
HFXT_M pins with suitable loading capacitors, and must meet the requirements below.
6.14.2.3.1 External Fast Clock XTAL Specifications
PARAMETERTEST CONDITIONSMINSupported frequencies

MAX

40

Frequency accuracy
Load Capacitance, CL

TYP

Initial + temperature + aging(1)

5

Equivalent series
resistance, ESR
Drive level

100

UNIT
MHz

+/- 25

ppm

13

pF

30

Ω
uW

(1)

Load capacitance, CL= [C1*C2] / [C1 + C2] + CP, where C1, C2 are the capacitors connected on HFXT_P and HFXT_M, respectively,
and CP is the parasitic capacitance (typically 1 to 2 pF). For example, for C1 = C2 = 6.2pF and CP = 2pF, then CL = 5pF.

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

6.15 Interface Timing Characteristics
6.15.1 SDIO Timing Specifications
SDIO is the main host interface for WLAN, and it supports a maximum clock rate of 52 MHz. The CC330x device
also supports shared SDIO interface for both BLE and WLAN.
6.15.1.1 SDIO Timing Diagram - Default Speed

図 6-1. SDIO Default Input Timing

図 6-2. SDIO Default Output Timing
6.15.1.2 SDIO Timing Parameters - Default Speed
PARAMETERDESCRIPTION

MIN

MAX

UNIT

26

MHz

fclockClock frequency, CLK

tHighHigh Period

10

tLow

Low Period

10

tTLH

Rise time, CLK

10

tTHL

Fall time, CLK

10

tISU

Setup time, input valid before CLK ↑5

tIH

Hold time, input valid after CLK ↑

5

tODLY

Delay time, CLK ↓ to output valid

2

14

CL

Capacitive load on outputs

15

40

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6.15.1.3 SDIO Timing Diagram - High Speed

図 6-3. SDIO HS Input Timing

図 6-4. SDIO HS Output Timing
6.15.1.4 SDIO Timing Parameters - High Speed
PARAMETERDESCRIPTION

MIN

MAX

UNIT

52

MHz

fclockClock frequency, CLK

tHighHigh Period

7

tLow

Low Period

7

tTLH

Rise time, CLK

3

tTHL

Fall time, CLK

3

tISU

Setup time, input valid before CLK ↑6tIH

Hold time, input valid after CLK ↑

2

tODLY

Delay time, CLK ↓ to output valid

2

14

CL

Capacitive load on outputs

15

40

16

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

6.15.2 SPI Timing Specifications
SPI is another host interface for WLAN. The CC330x device also supports shared SPI interface for both BLE and
WLAN.
6.15.2.1 SPI Timing Diagram

図 6-5. SPI Timing
6.15.2.2 SPI Timing Parameters
PARAMETERDESCRIPTION

MIN

fclockClock frequency, CLK

tHighHigh Period

10

tLow

Low Period

10

tTLH

Rise time, CLKtTHL

Fall time, CLK

UNIT

26

MHz

3
3

tCSsu

CS Setup time, CS valid before CLK ↑

3

tISU

PICO, input valid before CLK ↑3tIH

PICO Hold time, input valid after CLK ↑3tDr, tDf - Active

Delay time, CLK ↑/↓ to output valid

2tDr, tDf - Sleep

Delay time, CLK ↑/↓ to output valid

CL

Capacitive load on outputs

Copyright © 2024 Texas Instruments Incorporated

MAX

ns

10
12

15

40

pF

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

6.15.3 UART 4-Wire Interface
UART is the main host interface for BLE, which supports host controller interface (HCI) transport layer.
6.15.3.1 UART Timing Parameters
PARAMETERCONDITIONMINBaud rate

TYP

37.5

MAX

UNIT

4364

kbps

Baud rate accuracy per byte

Receive/Transmit

-2.5

+1.5

%

Baud rate accuracy per bit

Receive/Transmit

-12.5

+12.5

%

1

Byte

CTS low to TX_DATA on

0

CTS high to TX_DATA off

2

ms

Hardware flow control

CTS high pulse width1

RTS low to RX_DATA onbit0

RTS high to RX_DATA off

2

ms

Interupt set to 1/4 FIFO

16

Byte

7 Applications, Implementation, and Layout
注Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI ’ s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
図 7-1 shows the reference schematic for the CC3301 using an optimized bill of materials.
1V8

CC3301 TARGET

1V8
1V8
C1
0.1uF
C2
0.1uF

C3
0.1uF

E1

GND
GND

50Ohm
i
RF_BG

CC1
32

1V8
C4
0.1uF

4
5

C5
0.1uF

GND

17
35

3V3
GND

39
40

C6
1.0uF

VDDPA_OUT 1
C7
1.0uF

DIG_LDO_OUT 31

VDD_MAIN_IN

VSS

VDDA_IN1
VDDA_IN2

RF_BG
HFXT_PVIO

HFXT_M
VPP_INVSS
ANT_SEL

PA_LDO_IN
PA_LDO_IN

COEX_GRANT
COEX_PRIORITY
COEX_REQ

PA_LDO_OUT
DIG_LDO_OUT

SDIO_CLKSDIO_CMDSDIO_D0
SDIO_D1
SDIO_D2
SDIO_D3

GND
GND

C8
1uF SLOW_CLK_IN
RESET
GND

LOGGER

34
33
28

Slow_Clock_In
Reset
Logger

SWCLK
SWDIO

FAST_CLK_REQ

GND

UART_RX
UART_TX
UART_CTSUART_RTS

36
37
13
14
12
11

TESTP/FAST_CLK_REQ/IFORCEVSS
UART_RX
UART_TX
UART_CTSUART_RTS

Host_IRQ_BLE
Host_IRQ_WL
EP
VSS
VSS
VSS

FL1
1

IN

OUT

GND

38

50Ohm
i

GND
GND

3

6
5
4

GND

3
2
1

M830520
1V8

C9

2
4

C0G/NP0
0201
10pF

L1

DNP

L2

DNP

GND

GND

DEA162450BT-1295A1

2
6-40°C to +85°C
1.95dB
2400-2500MHz

HFXT_P7

HFXT_M

3
15

COEX_GRANT
COEX_PRIORITY
COEX_REQ

19
18
24
23
22
21

GND

HFXT_PR1

HFXT_M

150
1

C11

50V
6.8pF

GND
GND

2
4

50V
6.8pF

Y1

SWCLK
SWDIO

30
29

3

C10

SDIO_CLKSDIO_CMDSDIO_D0
SDIO_D1
SDIO_D2
SDIO_D3

26
27

GND

GND

ANT_SEL

8
9
10

GND

GND

GND

IRQ_BLEIRQ_WL41

The slow clock can be generated internally. An external slow clock
can be optionally used to save power.

16
20
25

CC3301NG0ARSBR
1V8
Y2

GND

4

1

+Vs

Standby/Operation

OutputGND

3

SLOW_CLK_IN

2

LFSPXO073707REEL

GND

図 7-1. CC3301 Reference Schematic
1. The slow clock can be generated internally. An external slow clock can be optionally used to save power.
2. For more information on antenna selection and matching, please see the CC33xx Hardware Integration.

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

8 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,generate code, and develop solutions are listed below.

8.1 サード・パーティ製品に関する免責事項
サード・パーティ製品またはサービスに関するテキサス・インスツルメンツの出版物は、単独またはテキサス・インスツルメン
ツの製品、サービスと一緒に提供される場合に関係なく、サード・パーティ製品またはサービスの適合性に関する是認、サード・パーティ製品またはサービスの是認の表明を意味するものではありません。

8.2 製品の命名規則
デバイスの開発進展フロー：X

実験的デバイス。最終デバイスの電気的特性を必ずしも表さず、量産アセンブリ・フローを使用しない可能性があります。

P

プロトタイプ・デバイス。最終的なシリコン・ダイとは限らず、最終的な電気的特性を満たさない可能性があります。

空白 認定済みのシリコン・ダイの量産バージョン。
サポート・ツールの開発進展フロー：
TMDX

開発サポート製品。テキサス・インスツルメンツの社内認定試験はまだ完了していません。

TMDS

完全に認定済みの開発サポート製品です。

X および P デバイスと TMDX 開発サポート・ツールは、以下の免責事項の下で出荷されます。
デバイスの開発進展フロー：
TMX 実験的デバイス。最終デバイスの電気的特性を必ずしも表さず、量産アセンブリ・フローを使用しない可能性があります。
TMP プロトタイプ・デバイス。最終的なシリコン・ダイとは限らず、最終的な電気的特性を満たさない可能性があります。
TMS 認定済みのシリコン・ダイの量産バージョン。
サポート・ツールの開発進展フロー：
TMDX

開発サポート製品。テキサス・インスツルメンツの社内認定試験はまだ完了していません。

TMDS

完全に認定済みの開発サポート製品です。

TMX および TMP デバイスと TMDX 開発サポート・ツールは、以下の免責事項の下で出荷されます。
「開発中の製品は、社内での評価用です」。
量産デバイスおよび TMDS 開発サポート・ツールの特性は完全に明確化されており、デバイスの品質と信頼性が十分に示されています。テキサス・インスツルメンツの標準保証が適用されます。
プロトタイプ・デバイス (X または P) の方が標準的な量産デバイスに比べて故障率が大きいと予測されます。これらのデバイスは予測される最終使用時の故障率が未定義であるため、テキサス・インスツルメンツでは、それらのデバイスを量産システムで使用しないよう推奨しています。認定済みの量産デバイスのみを使用する必要があります。

8.3 Tools and Software
Design Kits and Evaluation Modules
CC330x Reference
Design Files

CC330x reference design CAD source files. TI recommends using this design as areference when creating the layout in order to achieve the RF performance listed inthis datasheet.

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CC3301 BoosterPack
plug-in module

www.ti.com/ja-jp

The CC3301 BoosterPack™ plug-in module (BP-CC3301) is a test and development
board that can be easily connected to TI LaunchPad™ development kits or processor
boards; thus enabling rapid software development.

CC3301 M.2 card plug-in The CC3301 M.2 card plug-in module (M2-CC3301) is a test and development board
modulethat can be easily connected to TI processor boards or other processor boards with
an M.2 Key E interface support; thus enabling rapid software development.
SoftwareSimpleLink Wi-Fi SimpleLink Wi-Fi Toolbox is a collection of tools to help development and testing of the
Toolbox
CC33xx. The Wi-Fi toolbox package provides all the capabilities required to debug andmonitor WLAN/Bluetooth® Low Energy firmware with a host, perform RF validation tests, runpretest for regulatory certification testing, and debug hardware and software platform
integration issues.
CC33xx device
drivers

The CC33XX are single-chip Wi-Fi 6 and Bluetooth Low Energy 5.4 companion devices
suitable for both Linux and RTOS based systems. CC33XX-SOFTWARE is a collection ofsoftware development sources aimed to facilitate quick setup, out-of-box experience, andaccelerate development in Linux or RTOS environments.

8.4 Documentation Support
ドキュメントの更新についての通知を受け取るには、www.tij.co.jp のデバイス製品フォルダを開いてください。[通知] をクリックして登録すると、変更されたすべての製品情報に関するダイジェストを毎週受け取ることができます。 変更の詳細については、修正されたドキュメントに含まれている改訂履歴をご覧ください。
Application Reports
CC33xx Production Texas Instruments™ provides many resources in order to assist users in quickly examining
Line Guide
the functionality and performance of their devices. This document provides the necessary
information to guide the user in production line testing for CC33xx. The device's functions
can be checked using tools and software provided by Texas Instruments. Performance
testing is more involved as external equipment is required for thorough examination.
SimpleLink CC33xx This document describes the CC33xx security related features, which are made available
Security Features to vendors through an ecosystem that incorporates simple and concise APIs, tools, anddocumentation
User's Guides
CC33xx WLAN
Features User's
Guide

This document provides information about CC33xx family of devices and Wi-Fi® features,
as well as TI proprietary enhancements. The document does not provide the complete
application programming interface (API) set, but a high-level overview of the features.

CC33xx Hardware
Integration

This document describes how to integrate the CC330x into any system and the hardware
requirements for this device. Layout and schematic considerations are listed here as well,which TI highly recommends following in order to achieve the device performance listed inthis datasheet.

8.5 サポート・リソース
テキサス・インスツルメンツ E2E™ サポート・フォーラムは、エンジニアが検証済みの回答と設計に関するヒントをエキスパートから迅速かつ直接得ることができる場所です。既存の回答を検索したり、独自の質問をしたりすることで、設計で必要な支援を迅速に得ることができます。

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JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

リンクされているコンテンツは、各寄稿者により「現状のまま」提供されるものです。これらはテキサス・インスツルメンツの仕様を構成するものではなく、必ずしもテキサス・インスツルメンツの見解を反映したものではありません。テキサス・インスツ
ルメンツの使用条件を参照してください。

8.6 Trademarks
SimpleLink™ is a trademark of Ti.
テキサス・インスツルメンツ E2E™ is a trademark of Texas Instruments.
Bluetooth® is a registered trademark of Bluetooth SIG, Inc..
すべての商標は、それぞれの所有者に帰属します。

8.7 静電気放電に関する注意事項

この IC は、ESD によって破損する可能性があります。テキサス・インスツルメンツは、IC を取り扱う際には常に適切な注意を払うことを推奨します。正しい取り扱いおよび設置手順に従わない場合、デバイスを破損するおそれがあります。
ESD による破損は、わずかな性能低下からデバイスの完全な故障まで多岐にわたります。精密な IC の場合、パラメータがわずかに変化するだけで公表されている仕様から外れる可能性があるため、破損が発生しやすくなっています。

8.8 用語集
テキサス・インスツルメンツ用語集

この用語集には、用語や略語の一覧および定義が記載されています。

9 Revision History
資料番号末尾の英字は改訂を表しています。その改訂履歴は英語版に準じています。
Changes from October 5, 2023 to December 19, 2023 (from Revision C (October 2023) to
Revision D (December 2023))
Page• Updated specifications data and test conditions to production values............................................................... 8• Updated reference schematic...........................................................................................................................18

Copyright © 2024 Texas Instruments Incorporated

資料に関するフィードバック (ご意見やお問い合わせ) を送信

21

Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300
JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

www.ti.com/ja-jp

10 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and revision ofthis document. For browser-based versions of this data sheet, refer to the left-hand navigation.

22

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Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

PACKAGE OUTLINE

RSB0040B

WQFN - 0.8 mm max height
SCALE 3.000

PLASTIC QUAD FLATPACK - NO LEAD
5.15
4.85

B

A

PIN 1 INDEX AREA

5.15
4.85

0.8
0.7
C
SEATING PLANE
0.08 C0.05
0.00
2X 3.6(0.2) TYPSYMM

EXPOSEDTHERMAL PAD

11

20

10

2X 3.6

21

SYMM

41

3.5 0.1

30

1
36X 0.4
PIN 1 ID

31

40
40X

0.5
0.3

40X

0.25
0.15
0.1
0.05

C A B
C
4219094/B 09/2023

NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com

Copyright © 2024 Texas Instruments Incorporated

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23

Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

EXAMPLE BOARD LAYOUT

RSB0040B

WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
( 3.5)
SYMM

40

31

40X (0.6)

40X (0.2)

SEE SOLDER MASKDETAIL30

1

36X (0.4)(R0.05) TYP(0.75) TYP

41

SYMM

(4.8)

( 0.2) TYP
VIA

21

10

11

20
(0.75) TYP(4.8)

LAND PATTERN EXAMPLEEXPOSED METAL SHOWNSCALE: 20X

0.05 MAXALL AROUND

0.05 MIN
ALL AROUNDMETAL UNDERSOLDER MASKMETAL EDGEEXPOSED METALSOLDER MASKOPENINGEXPOSEDMETALNON SOLDER MASKDEFINED(PREFERRED)SOLDER MASKOPENINGSOLDER MASK DEFINEDSOLDER MASK DETAILS
4219094/B 09/2023
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shownon this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

24

資料に関するフィードバック (ご意見やお問い合わせ) を送信

Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

CC3301, CC3300

www.ti.com/ja-jp

JAJSRA0D – MARCH 2023 – REVISED DECEMBER 2023

EXAMPLE STENCIL DESIGNRSB0040B

WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(0.375) TYP(0.75) TYP

40

31

40X (0.6)

40X (0.2)30

136X (0.4)(0.75) TYP(R0.05) TYP

41(0.375) TYP
(4.8)

SYMM

16X ( 0.55)

METAL
TYP
10

21

11

20

SYMM

(4.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 MM THICK STENCILSCALE: 20X
EXPOSED PAD 41
40% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

4219094/B 09/2023

NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.

www.ti.com

Copyright © 2024 Texas Instruments Incorporated

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25

Product Folder Links: CC3301 CC3300
English Data Sheet: SWRS294

PACKAGE OPTION ADDENDUM
www.ti.com

17-Jan-2024

PACKAGING INFORMATION
Orderable Device

Status(1)

Package Type Package Pins Package
Drawing
Qty

Eco Plan(2)

Lead finish/
Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking(3)

Samples

(4/5)

(6)

CC3300ENJARSBR

ACTIVE

WQFN

RSB

40

3000

RoHS & Green

NIPDAU

Level-2-260C-1 YEAR

-40 to 105

CC3300ENJA

Samples

CC3301ENJARSBR

ACTIVE

WQFN

RSB

40

3000

RoHS & Green

NIPDAU

Level-2-260C-1 YEAR

-40 to 105

CC3301
ENJA

Samples(1)

The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)

RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.
(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to twolines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE OPTION ADDENDUM
www.ti.com

17-Jan-2024

Addendum-Page 2

PACKAGE OUTLINE

RSB0040B

WQFN - 0.8 mm max height
SCALE 3.000

PLASTIC QUAD FLATPACK - NO LEAD
5.15
4.85

B

A

PIN 1 INDEX AREA

5.15
4.85

0.8
0.7
C
SEATING PLANE
0.08 C0.05
0.00
2X 3.6(0.2) TYPSYMM

EXPOSEDTHERMAL PAD

11

20

10

21

SYMM

41

2X 3.6

3.5 0.1

30

1
36X 0.4
PIN 1 ID

31

40
40X

0.5
0.3

40X

0.25
0.15
0.1
0.05

C A B
C
4219094/B 09/2023

NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com

EXAMPLE BOARD LAYOUT

RSB0040B

WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
( 3.5)
SYMM

40

31

40X (0.6)

40X (0.2)

SEE SOLDER MASKDETAIL30

1

36X (0.4)(0.75) TYP(R0.05) TYP

41

SYMM

(4.8)

( 0.2) TYP
VIA

21

10

11

20
(0.75) TYP(4.8)

LAND PATTERN EXAMPLEEXPOSED METAL SHOWNSCALE: 20X

0.05 MIN
ALL AROUND

0.05 MAXALL AROUNDMETAL UNDERSOLDER MASKMETAL EDGEEXPOSED METALSOLDER MASKOPENINGEXPOSEDMETALNON SOLDER MASKDEFINED(PREFERRED)SOLDER MASKOPENINGSOLDER MASK DEFINEDSOLDER MASK DETAILS
4219094/B 09/2023
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shownon this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

EXAMPLE STENCIL DESIGNRSB0040B

WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(0.375) TYP(0.75) TYP

40

31

40X (0.6)

40X (0.2)30

136X (0.4)(0.75) TYP(R0.05) TYP

41(0.375) TYP
(4.8)

SYMM

16X ( 0.55)

METAL
TYP

10

21

11

SYMM

20

(4.8)

SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCILSCALE: 20X
EXPOSED PAD 41
40% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

4219094/B 09/2023

NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.

www.ti.com

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