2011 Spintronics Workshop on LSI
June 13, 2011
Rihga Royal Hotel Kyoto, Kyoto, Japan

2011 Spintronics Workshop on LSI

Opening Remarks- Spintronics for Nonvolatile Electronics Hideo Ohno
Center for Spintronics Integrated Systems
Tohoku University, Sendai, Japan

Supported by the FIRST program of JSPS.
http://www.csis.tohoku.ac.jp/

Challenges
Static power
Dynamic power
Interconnection delay
Feature size
Making memories
Nonvolatile
SmallEmbedded in interconnection
Part of logic

Nonvolatile CMOS Electronics

2

Comparison of memories
Next Generation Nonvolatile Memory
SRAM DRAM
Cell Size

2～ 130 F 4～ 8 F2PRAM

4F

2ReRAM

Spin (STT)RAMMRAM

22FeRAM24～ 6 F 16～ 40 F 4～ 64F 12～ 25 F

High SpeedOperation◎

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Nonvolatility－－○

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Endurance(limitationof W/Ecycle)

◎(∞）

◎(∞）

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△○
⇒◎

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Lower
power
operation

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2T. Endoh, ITRS Emerging Research Memory Technologies Workshop2010
T. Endoh, STS in SEMICON Korea2010 (Invited)System (Memory) Hierarchy
Nonvolatile
Logic-in-Memory

current

near futurefuture

Magnetic tunnel junction based memory elements to counter dynamic andstatic power, and interconnection delay
Ohno et al. IEDM 2010

Magnetic Tunnel Junction
A Spintronics Device

RAP − RP2P 2=Tunnel MagnetoResistance (TMR) =RP
1− P2Parallel

EE

Antiparallel

Ferromagnet 1 Insulator

Ferromagnet 2

Room temperature TMR: Miyazaki and Tezuka (Tohoku U.), J. Mag. Mag. Mat. 1995 and Moodera et al. Phys. Rev. Lett. 1995.

Magnetic Tunnel Junction Configurations

two terminal

three terminal

nonvolatile, fast and high endurance
6

MTJ for VLSI: A wish list
1. Small footprint (F nm)2. High output (TMR ratio > 100%)
3. Nonvolatility (∆=E/kBT >40)
4. Low switching current (IC0 < F µA)
5. Back-end-of-the-line compatibility (350 oC)
6. Endurance
7. Fast read & write
8. Low resistance for low voltage operation
9. Low error rate
10. Low cost

Ic0 and ∆=E/kBT

Parallel

Antiparallel

EThermal fluctuationk BT> kBT

Ic0 and ∆=E/kBT
perpendicular1
E =  M S H K V = KV22αγe(KV )IC 0 =µB g∝ αEParallel

Parallel

Antiparallel

AntiparallelE

Thermal fluctuation

k BT

Thermal fluctuation=E(Kshape+ K crystalline ) VE

k BT

Perpendicular MgO-CoFeB MTJ
JC0 = 3.8 MA/cm2(IC0 = 48 μA)
E/kBT ~ 40
TMR ratio = 110%
Ta = 350oC

40 nm

(b)
(a)

Top electrode
Cr/Au
Ru
Ta

interface perpendicularanisotropy

CoFeB
MgO
CoFeB

Ta(c)
Ru
Ta
SiO2/Si sub.

Bottom electrode

5 nm

S. Ikeda et al., Nat. Mat. 9, 721 (2010), K. Miura et al., MMM 2010

Scaling
perpendicular100
IC0 = 100 µA
IC0 = 50 µA
IC0 = 30 µA
IC0 = 20 µA

908070E/kBT1E =  M S H K V = KV22αγe(KV )IC 0 =µB g∝ αE605040α = 0.015

30α = 0.009

20High K =1M S H K and low α
2I C 0 = 3.4 ×103 α [ µA] for E = 60k BT

α = 0.029

α = 0.006

10000.01

0.02

α0.03

0.040.05

α versus Ku

Damping parameter, α10.1

CoFeB/Pd/[Co/Pd]x6 [1]Pt/Co/Pt [2][Co/Pt]xn [3]Pd/Co/Pd/[Co/Ni]x3/Pd/Co/Pd [4][Co/Pt]x12 [5]Ta/CoFeB/MgO [6]0.01
In-plane
CoFeB

1E-3 -31010-210-1

1Ku (x105 J/m3)
Ref. [1] E. P. Sajitha, et. al., IEEE Transactions on Magnetics, 46, 2056 (2010)[2] S. Mizukami, et. al., App. Phys. Lett., 96, 152502 (2010)[3] A. Barman, et. al., J. App. Phys., 101, 09D102 (2007)[4] J.-M. Beaujour, et. al., Phys. Rev. B., 80, 180415R (2009)[5] N. Fujita, et. al., J. Magn. Magn. Mater., 320, 3019 (2008)[6] S. Ikeda, et. al., Nat. Mat., 9, 721 (2010)

10100

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How small can we go?

CoPtCr-SiO2, Takei et al., Fuji Electric review 55 (2009) 6..

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Center for Spintronics Integrated Systems
Funded by the FIRST Program of JSPS
Tohoku University

CSIS home page http://www.csis.tohoku.ac.jp

Center for Spintronics

Steering Committee

Integrated Systems (CSIS)
Director： Hideo Ohno
Deputy Director： Tetsuo Endoh, Naoki Kasai

Advisory Committee
Technical Advisory Committee

Support office
Spintronics materials

Shoji Ikeda (Tohoku Univ.)

Spintronics devices

Yasuo Ando (Tohoku Univ.)

New spintronics materials and devices
Spintronics processingFumihiro Matsukura (Tohoku Univ.)

Nobuyuki Ishiwata ( NEC )Spintronics logic design and IP development

Takahiro Hanyu (Tohoku Univ.)

Design tool development for spintronics VLSI

Tetsuo Endoh (Tohoku Univ.)

Spintronics VLSI demonstration

Tadahiko Sugibayashi ( NEC ) Tsukuba site : Tsukuba Innovation Arena (TIA)
 Participating organization :Tohoku University, NEC, Hitachi, ULVAC,
National Institute of Material Science,
University of Tokyo Collaborating organization : AIST, JST