3-1

IEEE Asian Solid-State Circuits Conference
November 3-5, 2008 / Fukuoka, Japan

500Mbps, 670μW/pin Capacitively Coupled
Receiver with Self Reset Schemefor Wireless Connectors
Katsuyuki Ikeuchi, Kenichi Inagaki, Hideki Kusamitsu*, **, Toshiyasu Ito*, **, Makoto Takamiya,
and Takayasu Sakurai
The University of Tokyo, Tokyo, Japan, * Association of Super-Advanced Electronics Technologies (ASET),** Yamaichi Electronics Co. Ltd, Tokyo, JapanThe complex spring mechanism implemented in each pin
Abstract- Using capacitively coupled signaling, thefor low profile connectors reduces the number of times thefeasibility of implementing an electronic connector as short asconnector can be detached to as few as 5 times. To reduce
240μm in height is demonstrated for the first time using
the force needed to attach/detach a connector with many
0.18μm CMOS technology and 125μm FR4 printed circuit
pins, Zero Insertion Force (ZIF) connectors which hold andERDUGV 3&%¶V  0D[LPXP GDWD rate of 500Mbps/pin and
3.6Gbps/mm2 are measured with 670μW/pin of power
release the connector pins with a lever, were developed
which however consumes much space so cannot be used inconsumption even with large parasitic capacitance associatedspace critical places.
with the FR4 board. Compared to the conventional circuits,
Wireless connectors however, do not need pressure tothe proposed self reset circuit FDQ VHQG VLJQDOV [ IDVWHU DW
reduce resistance nor do they need scraping mechanisms,
WKH VDPH SDUDVLWLF FDSDFLWDQFH RU DOORZ [ PRUH SDUDVLWLF
thus simplifying the structure. They could reduce footprint
capacitance at the same data rate.
and faulty connections. The capacitive coupling technique
Keywords: Capacitive coupling, Low-profile connector andused here will also be useful in implementing a connector
3UR[LPLW\FRPPXQLFDWLRQthat has large number of pins. In a case where 10,000 pins
are necessary and 20gf of pressure is needed for a stable
Introduction
mechanical connection, 200kgf is needed to press theconnector, while in the case of wireless connectors, there is
There is a strong demand for low-profile components tono need to put pressure on the pins.
reduce the thickness of recent portable electronic appliances
VXFK DV PRELOH SKRQHV ODSWRS 3&¶V DQG 3'$¶V ,Q WKLV
Table Ipaper, using capacitively coupled signaling, the feasibility
Comparison of mechanical and wireless connectorof implementing an electronic connector as short as 240μm
in height is demonstrated for the first time using 0.18μm&RQYHQWLRQDO
1RQ
CMOS technology.
PHFKDQLFDOFRQWDFWLQJ
Recently, proximity communication technology has
3UHVVXUHSLQ
JaJ
been investigated extensively mainly for the purpose oftransferring data among stacked chips [1-5]. In order to+HLJKWPPaPP
realize a detachable connector, interconnections over3LQGHQVLW\SLQPP SLQVPP
organic FR4 printed circuit boards were used, which haveorders of magnitude higher parasitic capacitance compared
5HOLDELOLW\䂦䂾
to interconnections on chips. This increases the technicaldifficulty of detachable connectors, compared to:DWHUSURRI
䂾㬍
chip-to-chip communication.
Mechanical Connectors vs Wireless Connectors

Table I compares the mechanical and wirelessconnectors.

Mechanical connectors need to scrape off residue andoxides of the surface of the connectors, and apply ~20g ofpressure to maintain low resistances and stable connections.
They are facing many problems for applying this pressure.

978-1-4244-2605-8/08/$25.00 ©2008 IEEE

Connectors vs Chip-to-chip Communications
For non-contacting chip to chip communication, there93

are two main approaches, using capacitive coupling andusing inductive coupling. When implementing connectors
RQ 3&%¶V WKH LQGXFWRU RU FDSDFLWRU PXVW EH GUDZQ RQ WKH
3&% &RPPRQ WHFKQRORJ\ IRU 3&%¶V LV P OLQH DQGspace, so using inductors drawQRQ3&%¶VZLOOrequire morearea per pin compared to capacitively coupled connectors.
The wireless connector demonstrated here, andpreviously reported capacitively coupled chip to chip
FRPPXQLFDWLRQ FLUFXLWV VKDUH VLPLODU WRSRORJLHV EXW DUHcompletely different in that for the connector, the parasitic
FDSDFLWDQFH LV YHU\ ODUJH I)aS)  DQG GLIIHU EHWZHHQSLQ WR SLQ EHFDXVH RI SDUDVLWLF FDSDFLWDQFH RQ 3&% ERDUGV
which may vary according to the pattern on the PCB, andI/O diodes on the receiver chip which are excluded in chip
to chip communication. Therefore, capacitively coupledtechnology was chosen over inductively coupledcommunication for the connector.
)RUFDSDFLWLYHO\FRXSOHGFRPPXQLFDWLRQWKHVLJQDOLVDOZD\V SXOOHG EDFN WR D NQRZQ '& OHYHO 7KH VLJQDO WKDWSURSDJDWHVIURPWKHRXWSXWRIWKH7; 7;RXW WRWKHLQSXW5; 5;LQ  FDQ EH FDOFXODWHG XVLQJ WKH FRXSOLQJ
capacitance CC, parasitic capacitance on the RX side CPR
and the resistance of the resistor or transistor which pulls
WKHYROWDJHRI5;LQWRWKH'&OHYHO5RDVVKRZQLQILJ97;

Ĳ

5;FRUH 2XWSXWFLUFXLW
EXIIHU

5;287
9+ELDV

7;RXW
5;LQ

+LJKSXOVH
GHWHFWRU

9/ELDV/RZSXOVH
GHWHFWRU

5HVHW'HOD\7'

95()
6HOIUHVHWFLUFXLW)LJ6FKHPDWLFRIFRQQHFWRUUHFHLYHUFLUFXLW

95;
㱠&& &3595;

7;

3DGVRQ
3&%

97;
 V& 3555


V&&
 V& 3555

55 :KHQ55 LVVPDOO㱠LVVKRUWEXW95; LVVPDOO:KHQ55 LVODUJH㱠 LV
ORQJEXW95; LVODUJH
97;  V& 35 55
V&& 5597;& 35  
V&& 55 &&)LJ6LPXODWHGZDYHIRUPVRIUHFHLYHUFLUFXLWDW0ESV

55 &&  &35)LJ5HODWLRQVKLSEHWZHHQ9RX, RR and Ĳ

signal frequency. In the case of connectors, the parasitic
capacitance and coupling capacitaQFHERWKYDU\IURPSLQWR
pin. To mitigate the tradeoff, when the receiver circuit waits
for a signal, the reset transistor is turned off so that RR isKLJK HQDEOLQJ ODUJH VLJQDO LQSXW DQG ZKHQ WKH VLJQDO LV
GHWHFWHGLWLVSXOOHGEDFNE\WXUQLQJWKHUHVHWWUDQVLVWRURQ
to create a low resistance RR )LJ  VKRZV WKH UHFHLYHU
circuit without the self reset circuit.
)LJ  VKRZV WKURXJK VLPXODWLRQ WKH PD[LPXP GDWD
rate of the receiver with a constant RR and self reset circuit.
The self reset circuit can send signals at the same data rate
ZLWK [ PRUH SDUDVLWLF FDSDFLWDQFH RU [ IDVWHU DW WKHsame parasitic capacitance compared to conventional
FLUFXLWV)RUFRQQHFWRUV&PR/CCLVDERXWWRPDNLQJWKH
self reset circuit, more important than chip to chipThis shows that the resistance RR causes a tradeoff
EHWZHHQWKHLQSXWYROWDJHDW5;LQ9RX and the time to reset
the signal 7.
Proposed Capacitively Coupled Receiver
7R RYHUFRPH WKH SUREOHPV VKRZQ DERYH D GXDOWKUHVKROGWULEDQGVLJQDOGHWHFWLRQVFKHPHDQGDVHOIUHVHWFLUFXLWDUHSURSRVHG)LJVKRZVWKHFLUFXLWVFKHPDWLF
The dual threshold scheme consists of two sets ofamplifiers and inverters to detect three regions, signaltransition to high, signal transition to low, and no signaltransition. Simulated waveforms are shown in fig.3.
As seen in the previous section, the selection of theresistor RR is a tradeoff of input voltage and maximum

94Input and output waveforms at 500Mbps are shown infig. 7. The data is 28-1 bit PRBS signals. The BER bathtub

connectors with low parasitic capacitances.
This receiver scheme enables the use of voltage levelsignaling for TX. This accounts for either increasing thepulse swing at the receiver by 2x compared to [1], increase
the data rate of the signal by 2x compared to [3], reduce thenumber of pads needed for 1 channel by 1/2 thereby
reducing power at the TX buffer by 1/2, and area of the pinsby 1/2 compared to [5].

7;3DGVRQ
3&%5;FRUH 2XWSXWFLUFXLW
EXIIHU

5;287
9+ELDV

7;RXW
5;LQ+LJKSXOVH
GHWHFWRU

9/ELDV/RZSXOVH
GHWHFWRU

Fig. 6 Illustration of measurement setup and chip micrograph95()

Fig. 4 Receiver circuit without self reset'DWDUDWH>0ESV@

2XWSXW
GDWD
287

3URSRVHG
6HOIUHVHWFLUFXLW[PRUH&35,QSXWGDWD
7;RXWQVGLY[IDVWHU

&RQYHQWLRQDO
&RQVWDQWUHVLVWRUFLUFXLW







Fig. 7 Measured input and output waveforms at 500Mbps

is measured and drawn as shown in fig. 8. The timing
&35&&Fig. 5 Simulated dependence of the maximum data rate of conventional
and proposed circuits on CPR/CC.

Measured Results
To prove the feasibility of this scheme, the receivercircuit was implemented in 0.18μm CMOS technology. Thesize of the core circuit of the receiver is 35μm by 65μm.
The 250μm square non-contacting pads were made using
100μm thick FR4 boards with 125μm L/S technology. Theconnector is 240μm in height. To ensure insulation, 20μm
thick solder masks were laminated on all connector pads.
The measurement setup is illustrated in fig. 6.

Fig. 8 BER Bathtub curve at 500Mbps.

tolerance is 0.6UI at BER of 10-18.

95100μm thick FR4 boards with 125μm L/S technology anddemonstrated communication with the distance of 40μm.
The connector was measured at a maximum data rate of500Mbps and had 0.6 UI timing margin, while dissipating
670μW/pin.
Also, scalability of this scheme using 65nm CMOS
was checked by simulation to operate at speeds up to 2Gbps
while dissipating 760μW/pin.

ELWSVHXGRUDQGRPVLJQDOV
3RZHU>:SLQ@

Acknowledgment













Useful discussions with and support from K.Iizuka,
S.Miyata of Sharp Corp., Y.Nakata of Matsushita ElectricIndustrial Co. Ltd., Y.Komoto of Advantest Corp., H.K.Kimof Univ. of Tokyo are acknowledged. This project is
supported in part by New Energy and Industrial Technology
Development Organization (NEDO), The EDA tools areprovided by VLSI Design and Education Center(VDEC),
the University of Tokyo in collaboration with Synopsys, Inc.
Cadence Design Systems, Inc.

,QSXWGDWDUDWH>*ESV@Fig. 9 Power versus input data rate

Power dissipation is shown in fig. 9. The core of thereceiver circuit uses 360μW when there is no signal. Since
the current mirror circuit for the bias can be shared bymultiple receiver circuits, the static power of each circuit
decreases when the number of RX circuits increase. At themaximum data rate, the measured power is 670μW/pin,excluding the power for the output buffer.
Table II summarizes the performance of the connector
chip. Simulated results show the scalability of this circuit.

References[1] K. Kanda, D. Antono, K. Ishida, H. Kawaguchi, T. Kuroda, and7 6DNXUDL ³$ *EVFK PW/pin Wireless Superconnect:6&  ,QWHUIDFH 6FKHPH´ ,((( ,QWHUQDWLRQDO 6ROLG6WDWH
&LUFXLWV&RQIHUHQFH ,66&& , pp.186-187, Feb. 2003.
[2] N. Miura, H. Ishikuro, T. SaNXUDLDQG7.XURGD³$S-E
Inductive-Coupling Inter-Chip Data Transceiver with'LJLWDOO\&RQWUROOHG 3UHFLVH 3XOVH 6KDSLQJ´ ,(((,QWHUQDWLRQDO 6ROLG6WDWH &LUFXLWV &RQIHUHQFH ,66&& ,pp.358-359, Feb. 2007.
[3] R. Canegallo, A. Fazzi, L. Ciccarelli, L. Magagni, F. Natali, P.
5RODQGL ( -XQJ / 'L &LRFFLR DQG 5 *XHUULHUL ³'
Capacitive Interconnections for High Speed Interchip&RPPXQLFDWLRQ´ ,((( &XVWRP ,QWHJUDWHG &LUFXLWV&RQIHUHQFH &,&& , pp.1-7, 2007.
[4] R. Drost, R. Hopkins, R. Ho DQG , 6XWKUHODQG ³3UR[LPLW\&RPPXQLFDWLRQ´ LQ -RXUQDO RI 6ROLG 6WDWH &LUFXLWV,pp.1529-1530, Vol. 39, No. 9, Sep. 2004.
>@ 4 *XQ $ ;X - .R DQG 0 &KDQJ ³7ZR *EVSLQ
/RZ3RZHU ,QWHUFRQQHFW 0HWKRGV IRU ' ,&V´ ,(((,QWHUQDWLRQDO 6ROLG6WDWH &LUFXLWV &RQIHUHQFH ,66&& ,pp.448-449, Feb. 2007.

Conclusion
A capacitively coupled receiver circuit with a dual
threshold tri-state signal detection and a self reset circuit is
proposed for wireless connectors. A wireless connector
using this topology was demonstrated using 0.18μm CMOS
technology. Simulation showed that this self reset circuit
enabled the circuit to work 2.8x faster at the same parasitic
capacitance or with 6x parasitic capacitance at the same
Table IIPerformance summary of measured and simulated receiver
0HDVXUHG

6LPXODWHG&026WHFKQRORJ\P0HWDO&026

QP&026

3RZHUVXSSO\995HFHLYHUFRUHVL]HP;P

P;P

0D[LPXPGDWDUDWH

0ESV

*ESV

3RZHU#PD[GDWD
UDWH

:SLQ

:SLQ%RDUGWHFKQRORJ\POLQHVSDFHRQPWKLFN)56DPHDVOHIW%RDUGSDGVL]HP;P

6DPHDVOHIW'LVWDQFHEHWZHHQIDFLQJSDGV

P SDGPHWDOFRYHUHGE\VROGHUPDVN

6DPHDVOHIW

data rate compared to conventional circuits.
The size of the core circuit of the receiver is 35μm by
65μm. 250μm square non-contacting pads were made using96