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PAPER

Special Section on Analog Circuits and Related SoC Integration Technologies

EMI Camera LSI (EMcam) with On-Chip Loop Antenna Matrix to
Measure EMI Noise Spectrum and Distribution
Naoki MASUNAGA†∗ , Koichi ISHIDA††a) , Members, Takayasu SAKURAI†† , Fellow,
and Makoto TAKAMIYA††† , Member

SUMMARY
This paper presents a new type of electromagnetic interference (EMI) measurement system. An EMI Camera LSI (EMcam) witha 12 × 4 on-chip 250 × 50 μm2 loop antenna matrix in 65 nm CMOS is developed. EMcam achieves both the 2D electric scanning and 60 μm-levelspatial precision. The down-conversion architecture increases the bandwidth of EMcam and enables the measurement of EMI spectrum up to
3.3 GHz. The shared IF-block scheme is proposed to relax both the increase of power and area penalty, which are inherent issues of the matrix
measurement. The power and the area are reduced by 74% and 73%, respectively. EMI measurement with the smallest 32×12 μm2 antenna to dateis also demonstrated.
key words: electromagnetic interference, on-chip loop antenna, downconversion, noise distribution

1.

Introduction

Electromagnetic interference (EMI) that degrades the dependability of electronic equipments is becoming a serious
issue. Electromagnetic compatibility (EMC) at the LSI levelhas been important, because LSIs are often the main noise
source in electronic equipments [1]. In particular, intrasystem EMC problem in small electronic equipments such ascell-phones is concerned because of (1) the increasing density of the packaging, (2) the increasing number of various
RF transceivers within a electronic device, and (3) the increasing signal frequency higher than 1 GHz, which resultin the downsizing of the EMI antenna. In order to measure
the EMI noise generated from the fine pattern on PCB or
the on-chip interconnect, 2D EMI distribution measurementwith 60 μm-level spatial precision, which is finer than typical PCB design rule, is required.
Figure 1 shows dimensions and spatial resolution ofrecent EMI measurement systems [2]–[8]. To eﬃciently
and accurately measure the 2D EMI distribution, the electric scanning instead of the conventional mechanical scanning of the EMI probe [2] is required. All the conventional
measurement method, however, do not satisfy both the 2D
electric scanning and the 60 μm precision. The spatial preManuscript received October 18, 2011.
Manuscript revised January 26, 2012.
†
The author was with the Institute of Industrial Science, The
University of Tokyo, Tokyo, 153-8505 Japan.
††
The authors are with Institute of Industrial Science, The University of Tokyo, Tokyo, 153-8505 Japan.
†††
The author is with VLSI Design and Education Center, The
University of Tokyo, Tokyo, 113-8654 Japan.
∗
Presently, with Terumo Corporation, Tokyo, 100-0005 Japan.
a) E-mail: ishida@iis.u-tokyo.ac.jp
DOI: 10.1587/transele.E95.C.1059

Fig. 1 Dimension and spatial resolution of recent EMI measurement
systems.

cision of the conventional 2D electric scanning [3]–[5] ismore than 7.5 mm. Though the smallest EMI probe with50 × 22 μm2 is reported [7], the probe is single and used forthe mechanical scanning.
To solve the problem of the conventional EMI measurement methods, an EMI camera LSI (EMcam) with thematrix of on-chip loop antennas and measurement circuits is
proposed. The feasibility of 2D EMI distribution measurement with 60 μm-level spatial precision is demonstrated byusing the EMcam [9].
2.

EMI Camera LSI (EMcam)

2.1 Overview of EMcam
Figure 2 shows an overview and benefits of the proposed
EMcam. The EMcam chip consists of an EMI measurement
circuit as shown in Fig. 3 and on-chip loop antennas. By
putting the EMcam on top of the DUT LSI, the EMcam measures within-die 2D distributions of EMI noise at various
frequencies. The EMcam can measure also the EMI noise
distribution on a PCB in the same way. Both the locationof the EMI noise source and its frequency can be measured
simultaneously with 60 μm-level spatial precision.
2.2 Measurement Core Circuit and Operation
Figure 3 shows the block diagram of the measurement corecircuit in the EMcam. The EMI noise is picked up by the onchip loop antenna. Then the EMI noise is down-converted

c 2012 The Institute of Electronics, Information and Communication Engineers
Copyright IEICE TRANS. ELECTRON., VOL.E95–C, NO.6 JUNE 20121060

c 2010Fig. 4 Circuit schematics. (a) Mixer. (b) Amplifier (one stage) (IEEE).

Fig. 2c 2010 IEEE).
Overview and benefits of the proposed EMcam (Fig. 5 Principle of EMI noise spectrum measurement using the circuit inc 2010 IEEE)
Fig. 3. (c 2010Fig. 3 Block diagram of measurement core circuit in EMcam (IEEE).

by the mixer. The down-converted noise, fIF is given by fIF= | fE MI − fLO |, where fE MI and fLO are the frequencies of the
EMI noise and the non-overlap clock generator (NCG), respectively. Then fIF is amplified and filtered by LPF. Whilethe noise inputs are simply amplified by high-bandwidth
amplifiers in [8], the down-conversion is very important in
our matrix measurement, because the down-converted noise
can be handled with the low-bandwidth amplifiers that consume low power. That is, the total power consumption canbe reduced with a high bandwidth up to 3.3 GHz for the EMI
noise measurement.
Figures 4(a) and (b) show schematics of the mixer andthe amplifiers in Fig. 3. The passive mixer is used to reduce
the power consumption. To amplify diﬀerential voltage in-duced by RF magnetic field, the amplifier consists of threestage fully-diﬀerential amplifiers with the common mode
feedback by resistors suppressing RF electric field-induced
voltages (Fig. 4(b) shows one stage for simplicity). The simulated open loop gain and the unity gain frequency of theamplifier are 16 dB and 6.2 GHz, respectively.
Figure 5 shows a procedure to obtain the EMI noise
spectrum using the circuit in Fig. 3. For instance, when fE MI
is 1 GHz and fLO is set at 999 MHz, fIF is 1 MHz by thedown-conversion. The noise power at 1 MHz can be measured by using LPF with the cut-oﬀ frequency of 3 MHz.
By sweeping fLO and measuring VOut shown in Fig. 3 at eachfLO (e.g. fLO is swept from 15 MHz to 3 GHz, 3 MHz step),
the EMI noise spectrum is obtained.
2.3 Matrix Circuits for EMI Measurement
Figures 6(a) and (b) show schematics of a straightforward
and the proposed matrix circuits in the EMcam, respectively.
Although 12 × 4 antenna matrix circuits are implemented
in our design, the schematics in Fig. 6 are drawn as 4 × 4

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Fig. 7 Schematic of (a) straightforward and (b) proposed measurementc 2010 IEEE).
circuit array in EMcam (Fig. 6 Schematic of (a) straightforward and (b) proposed matrix circuits
c 2010 IEEE).
in EMcam (matrix circuits for simplicity. In order to relax both the increasing power and area penalty, which are inherent issues
for the matrix measurement, the IF block is shared among
4 antennas, which is enabled by the proposed measurement
circuit array. In the straightforward matrix circuits, each antenna has a mixer and a high-power IF block. In contrast, inthe proposed matrix circuits, each antenna has the proposed‘mixer and antenna selector (MAS)’ circuit, and 4 antennas
share a decoder and the IF block. By sharing the high-power
IF block, the power and the circuit area are reduced by 74%
and 73%, respectively.
Figures 7(a) and (b) show schematics of the straightforward and proposed measurement circuit array in the EMcam, respectively. The circuit in Fig. 7(b) is a part of the
proposed matrix in Fig. 6(b). The analog signal (Out) is converted to a digital signal by a rectifier and a comparator toeﬃciently get the measured outputs from the matrix. In thestraightforward circuit array, there are series switches between the mixer and the IF block. Noise signals detectedin the on-chip loop antenna are attenuated by the series
switches and the sensitivity of the measurement circuit becomes lower. In contrast, in the proposed circuit array, eachantenna has the NCG and MAS circuit. By controlling LO
and LOb in MAS, MAS operates as the mixer or the antenna
selector with small area and power overhead. When sel0 is
high, MAS operates as the mixer. When sel0 is low, both LO
and LOb are low, and the antenna is separated from the amplifiers. In this way, the proposed MAS can operate as boththe mixer and antenna selector. Since the number of transistor switches in the signal path can be reduced, the sensitivity
problem can be minimized. In addition, in MAS, only an antenna coil under measurement is connected to the amplifiers.
Remaining neighbor antenna coils are left open. Therefore,
mutual inductances between the coils can be negligible.
3.

Measurement Results

3.1 EMcam Chip
The front-end block of the EMcam shown in Fig. 7(b) was
fabricated with 1.2 V, 65 nm CMOS process. The chip micrographs and layouts are shown in Fig. 8. Figure 8(a)shows overall circuit of the EMcam chip. A 12 × 4 on-chiploop antenna matrix is embedded and the size of the antenna
is 250 × 50 μm2 . The antenna pitch is 260 μm and 60 μm ina horizontal and vertical direction, respectively. Figure 8(b)shows a layout of a measurement circuit in the EMcam. The
core area of the MAS and NCG is 46 μm2 . In contrast, thatof the amplifiers is 2130 μm2 ; it is much larger than that of
the MAS and NCG. Figure 8(c) shows the photomicrographand layout of the standard antenna (250 × 50 μm2 ).

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Fig. 10

Photograph of the measurement setup for the oﬀ-chip DUT.

Fig. 8 Chip microphotographs and layouts. (a) Overall circuit of EMcam. (b) Measurement circuit in EMcam. (c) Antenna.

Fig. 11 Measured output waveforms of the EMcam with the signal
generator (a) oﬀ and (b) on.

Fig. 9Chip microphotograph and layout of smallest antenna.

In order to show the feasibility of the EMI noise measurement with higher-spatial resolution, the smallest size
loop antenna (32 × 12 μm2 ) is fabricated. Figure 9 shows
the photomicrograph and layout of the smallest antenna.
3.2 Oﬀ-Chip DUT
Figure 10 shows the photograph of the measurement setup
to verify the detection of the EMI noise by the oﬀ-chip DUT.
The oﬀ-chip DUT is made with the center core of the thincoaxial cable and the other side is connected to an external
1 GHz signal generator that emulates the EMI noise.
Figures 11(a) and (b) show the output waveforms of the
EMcam with the signal generator oﬀ and on, respectively.

The frequencies of fE MI and fLO are 1 GHz and 1.0006 GHz,
respectively. The frequency of, fIF is 600 kHz. In Fig. 11(b),the output shows 600 kHz sinusoidal wave. This shows theoﬀ-chip EMI detection is successful and the EMcam measures not the power-supply noise but the oﬀ-chip EMI noise.
3.3 On-Chip DUT
In order to carry out stand-alone measurement of the EMcam chip, EMI noise emulators are also embedded on thesame chip, namely on-chip DUT. Figures 12 (a) and (b)show schematics of the two DUTs for EMI noise emulation. In the DUT (wire), a long on-chip wire is driven by
an oﬀ-chip signal generator to emulate arbitrary waveformsof EMI noise. The DUT (buﬀer) emulates clock buﬀers toemulate the global clock distribution in the logic circuits.
Figure 13 shows the photograph of the measurement setup
for the on-chip DUT. The EMI noise to be measured is fed

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Fig. 15Layout of the DUT (wire) and the antenna in Fig. 14.

In Fig. 15, the magnetic flux density B is described by
Fig. 12 On-chip DUTs for EMI noise generation. (a) DUT (wire). (b)c 2010 IEEE).
DUT (buﬀer) (

B=

μ0 i
· ,
2π r

(1)

where μ0 , r, and i are the magnetic permeability, the distancefrom the DUT, and the current in the DUT, respectively. And
the magnetic flux Φm is calculated by using (1),
 x+50

1
μ0
·i·c
dr
B · dS =
Φm =
2π
r
S
x


x + 50μ0=· i · c · ln
,
(2)
2π
x
where
i = A sin ωt,
Fig. 13

Photograph of the measurement setup for the on-chip DUT.

Fig. 14 Measured and calculated dependence of EMcam output on thec 2010 IEEE).
distance between DUT (wire) and antenna (by the external signal source, fE MI . The external local oscillator, fLO drives the mixer in the EMcam chip.
Figure 14 shows a measured and calculated dependence of the amplitude of the EMcam output on the distance
between the DUT (wire) of 2 GHz sine and the antenna. The
power input to the DUT by fE MI is approximately 5 mW. In
this measurement, the NCG is turned oﬀ and the noise inputs are not down-converted and directly measured without
LPF. The following is a procedure of the calculated resultsin Fig. 14.

(3)

where A is the amplitude of the current. Therefore, the induced electromotive force v(t) in the antenna is calculated
by using (2) and (3),
x + 50dΦm (t)v (t) =
= μ0 Afc (cos ωt) ln
,
(4)
dt
x
where f is the frequency of the current. v(t) is proportional
to ln((x + 50)/x). That means the EMcam output is proportional to the function ln((x+50)/x). In Fig. 14, the measured
results agree with the calculated results, although there aresome uncertainties such as A and x.
To check the operation of a mixer, an EMI measurement with the proposed down-conversion architecture iscompared to that with the oﬀ-chip spectrum analyzer instead of the architecture. The EMI noise is emulated using the DUT (wire) and the oﬀ-chip 1 GHz signal generator.
The fLO sweeps from 15 MHz to 3.35 GHz at 2.7 MHz step.
Each measurement point takes 24 seconds and the total timefor 1192 measurement point, from 15 MHz to 3.35 GHz, isapproximately 8 hours. To reduce the measurement timein practical use, number of measurement point should be
optimized. Figure 16(a) shows measured EMI noise spectrum using the oﬀ-chip spectrum analyzer, when the NCG isturned oﬀ same as Fig. 14. Figure 16(b) shows corresponding EMI noise spectrum using the EMcam when the NCG
is turned on. In Figs. 16(a) and (b), the noise peaks matchat 1 GHz, 2 GHz, and 3 GHz. This confirms the operation of
the mixer. On the other hand, the peak intensity ratios between 1, 2, and 3 GHz diﬀer between Figs. 16(a) and 16(b).
The diﬀerences are caused by the unity gain of the amplifier.

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Fig. 16 EMI noise spectra with DUT (wire). (a) Spectrum for reference
measured by external spectrum analyzer. (b) Spectrum measured by the
EMcam chip.

rect input, the unity gain frequency is 3 GHz. In contrast,with the proposed down-converted input ( fIF =2 MHz), theequivalent unity gain frequency is 11 GHz. The 3 GHz peakin Fig. 16(b) is higher than that in Fig. 16(a), which agrees
with the bandwidth in Fig. 17.
Measurements with the EMI noise generated by the
DUT (buﬀer) are carried out to emulate the clock buﬀer
noise, which is the main EMI noise source in a digital
LSI. Figures 18(a) and (b) show EMI noise waveform andspectrum of DUT (buﬀer) using the oﬀ-chip oscilloscopeand spectrum analyzer, respectively, when VDD of the DUT(buﬀer) is 1.2 V. The NCG is turned oﬀ, same as Fig. 14.
In Fig. 18(a), the EMI noise waveform is clearly shown at
the rising and falling edge of the 30 MHz clock signal. Figure 18(c) shows corresponding EMI noise spectrum using
the EMcam when the NCG is turned on. In Figs. 18(b) and(c), the noise peaks match at 30 MHz and odd numbers of
this. This confirms the validity of the EMcam. Figure 18(d)shows a measured dependence of the amplitude of the EMcam output on the power supply voltage of the DUT (buﬀer),
when the NCG is turned on. The fLO is 29.5 MHz. The amplitude is reduced with the reduced power supply voltage,
because the EMI noise generation is reduced.
Figure 19 shows a within-die 2D distribution of EMI
noise measured with the 12 × 4 on-chip loop antenna matrixof the EMcam. The antenna pitch is 260 μm and 60 μm ina horizontal and vertical direction, respectively. The DUT
wire goes across the matrix. At this time fE MI and fLO
are 1 GHz and 1.0006 GHz, respectively. As the distance
between the DUT and the antenna increases, the measured
EMI noise decreases.
In order to show the possibility of an EMcam withhigher-spatial resolution, EMI measurement with the smallest size loop antenna (32 × 12 μm2 ) is demonstrated. In thismeasurement, the NCG is turned oﬀ same as Fig. 15. Figure 20 shows a measured dependence of the amplitude of
the EMcam output on the amplitude of the DUT (wire) input. As the input amplitude decreases, the output amplitude
linearly decreases, which shows a reasonable operation of
the smallest antenna. The performance is summarized inTable 1.
4.

Fig. 17 Simulated frequency response of the measurement circuits withand without antenna.

Thanks to the down-conversion architecture, the proposed
EMcam successfully measures the noise peak intensity up
to 3.3 GHz while the noise peak intensity in Fig. 16(a) is attenuated.
Figure 17 shows the simulated frequency response of
the measurement circuits (NCG, the Mixer, and the Amplifiers) in Fig. 3. Frequency responses including antennacharacteristic of 20 dB/decade are also plotted. With the di-Conclusion

An EMI Camera LSI with a 12 × 4 on-chip loop antenna
matrix in 65 nm CMOS is presented. The feasibility of thewithin-die 2D EMI distribution measurement with 60 μmlevel spatial resolution is demonstrated without mechanicalscanning. The down-conversion architecture and ‘mixer andantenna selector (MAS)’ are proposed to relax both the increase of power and area penalty, which are inherent issuesof the matrix measurement. The down-conversion architecture increases the bandwidth of EMcam and enables themeasurement of EMI spectrum. The shared IF block architecture reduced the power and the area by 74% and 73%, respectively. MAS reduces the switches and prevents the EMI
attenuation due to the switches. EMI measurement with the

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Fig. 19 Within-die 2D distribution of EMI noise measured with the 12×4
c 2010 IEEE).
on-chip antenna matrix (Fig. 20 Measured dependence of EMcam output on DUT (wire) input
c 2010 IEEE).
with the smallest antenna (Table 1

c 2010 IEEE)
Performance summary of the EMI camera LSI. (smallest antenna (32 × 12 μm2 ) is also achieved. The measurement result with the smallest antenna demonstrates thefeasibility of an EMI noise measurement with higher-spatial
resolution in the future.
Acknowledgments
This work is partially supported by METI. The VLSI chips
were fabricated through the chip fabrication program of
VDEC in collaboration with STARC.
Fig. 18 EMI noise of DUT (buﬀer). (a) Noise waveform. (b) Noise
spectrum for reference. (c) Noise spectrum using the EMcam. (d) Meac
sured dependence of EMcam output on power supply voltage of DUT (2010 IEEE).

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Zschieschang, H. Klauk, M. Takamiya, T. Someya, and T. Sakurai,“Stretchable EMI measurement sheet with 8 × 8 coil array, 2 V organic CMOS decoder, and 0.18 μm silicon CMOS LSIs for electricand magnetic field detection,” IEEE J. Solid-State Circuits, vol.45,
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[5] N. Masunaga, K. Ishida, Z. Zhou, T. Yasufuku, T. Sekitani, T.
Someya, M. Takamiya, and T. Sakurai, “A flexible EMI measurement sheet to measure electric and magnetic fields separately with distributed antennas and LSI’s,” IEEE International Symposium on Electromagnetic Compatibility, pp.156–160, Austin, USA, Aug. 2009.
[6] N. Uddin and A. Thiede, “Switchable double-sensor integrated active probe for near-field scanner,” Proc. 6th European Microwave Integrated Circuits Conference (EuMIC), pp.37–40, Oct. 2011.
[7] N. Ando, N. Masuda, N. Tarnaki, T. Kuriyama, S. Saito, K. Kato, K.
Ohashi, M. Saito, and M. Yarnaguchi, “Miniaturized thin-film magnetic field probe with high spatial resolution for LSI chip measurement,” IEEE International Symposium on Electromagnetic Compatibility, vol.2, pp.357–362, Santa Clara, USA, Aug. 2004.
[8] S. Aoyama, S. Kawahito, and M. Yamaguchi, “An active magnetic
probe array for the multiple-point concurrent measurement of electromagnetic emissions,” IEEE Trans. Magn., vol.42, no.10, pp.3303–
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Naoki Masunaga
received the B.S. and
M.S. degrees in electronic engineering from
Sophia University, Tokyo, Japan and Universityof Tokyo, Tokyo, Japan, in 2008 and 2010, respectively. His research interests are in the fieldof integrated circuit design. He is now with
Terumo Corporation.

Koichi Ishidareceived the B.S. degree
in electronics engineering from the University
of Electro-Communications, Tokyo, Japan, in
1998, and received the M.S. and Ph.D. degrees
in electronics engineering from the Universityof Tokyo, Tokyo, Japan, in 2002 and 2005, respectively. He joined Nippon Avionics Co.,
Ltd. Yokohama, Japan in 1989, where he developed high-reliability hybrid microcircuits foraerospace programs. Since July 2007, he has
been working at Institute of Industrial Science,
the University of Tokyo as a research associate. His research interests include low-voltage low-power CMOS analog circuits, on-chip power supply
circuits, and large-area flexible electronics. He is a member of IEEE.

Takayasu Sakurai
received the Ph.D. degree in EE from the University of Tokyo in 1981.
In 1981 he joined Toshiba Corporation, where
he designed CMOS DRAM, SRAM, RISC processors, DSPs, and SoC Solutions. He has
worked extensively on interconnect delay andcapacitance modeling known as Sakurai modeland alpha power-law MOS model. From 1988
through 1990, he was a visiting researcher at
the University of California Berkeley, where heconducted research in the field of VLSI CAD.
From 1996, he has been a professor at the University of Tokyo, working
on low-power high-speed VLSI, memory design, interconnects, ubiquitouselectronics, organic IC’s and large-area electronics. He has published morethan 400 technical publications including 100 invited presentations and several books and filed more than 200 patents. He will be an executive committee chair for VLSI Symposia and a steering committee chair for IEEE
A-SSCC from 2010. He served as a conference chair for the Symp. on
VLSI Circuits, and ICICDT, a vice chair for ASPDAC, a TPC chair for the
A-SSCC, and VLSI symp., an executive committee member for ISLPEDand a program committee member for ISSCC, CICC, A-SSCC, DAC, ESSCIRC, ICCAD, ISLPED, and other international conferences. He is arecipient of 2010 IEEE Donald O. Pederson Award in Solid-State Circuits,
2010 IEEE Paul Rappaport award, 2010 IEICE Electronics Society award,
2009 achievement award of IEICE, 2005 IEEE ICICDT award, 2004 IEEE
Takuo Sugano award and 2005 P&I patent of the year award and four product awards. He gave keynote speech at more than 50 conferences including
ISSCC, ESSCIRC and ISLPED. He was an elected AdCom member for
the IEEE Solid-State Circuits Society and an IEEE CAS and SSCS distinguished lecturer. He is a STARC Fellow and IEEE Fellow.

Makoto Takamiya
received the B.S., M.S.,
and Ph.D. degrees in electronic engineeringfrom the University of Tokyo, Japan, in 1995,
1997, and 2000, respectively. In 2000, he joined
NEC Corporation, Japan, where he was engaged
in the circuit design of high speed digital LSI’s.
In 2005, he joined University of Tokyo, Japan,
where he is an associate professor of VLSI Design and Education Center. His research interests include the circuit design of the low-power
RF circuits, the ultra low-voltage logic circuits,
the low-voltage DC-DC converters, and the large area electronics with organic transistors. He is a member of the technical program committee forIEEE Symposium on VLSI Circuits. He received 2009 and 2010 IEEE Paul
Rappaport Awards.